From 9caa845d4f95b88fada21bc1737a5d7cd62342e0 Mon Sep 17 00:00:00 2001 From: Billy Laws Date: Wed, 5 Apr 2023 15:09:08 +0100 Subject: [PATCH] Avoid using interconnect for texture data copies Since the interonnect copies aren't visible or tracked by texture manager, this could cause the texture manager to effectively miss the upload. --- .../main/cpp/skyline/soc/gm20b/engines/inline2memory.cpp | 2 +- .../main/cpp/skyline/soc/gm20b/engines/maxwell_dma.cpp | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/app/src/main/cpp/skyline/soc/gm20b/engines/inline2memory.cpp b/app/src/main/cpp/skyline/soc/gm20b/engines/inline2memory.cpp index 8b16de4d..e32ec8f1 100644 --- a/app/src/main/cpp/skyline/soc/gm20b/engines/inline2memory.cpp +++ b/app/src/main/cpp/skyline/soc/gm20b/engines/inline2memory.cpp @@ -62,7 +62,7 @@ namespace skyline::soc::gm20b::engine { inlineCopy(tempBuffer.data()); - interconnect.Upload(u64{state.offsetOut}, span{tempBuffer}); + channelCtx.asCtx->gmmu.Write(state.offsetOut, span(tempBuffer)); } else { inlineCopy(dstMappings.front().data()); } diff --git a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_dma.cpp b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_dma.cpp index 974c5cee..6ca09059 100644 --- a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_dma.cpp +++ b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_dma.cpp @@ -134,11 +134,12 @@ namespace skyline::soc::gm20b::engine { }); } else [[likely]] { // Both Linear, copy as is. - if ((*registers.pitchIn == *registers.pitchOut) && (*registers.pitchIn == *registers.lineLengthIn)) - interconnect.Copy(dstMappings.front(), srcMappings.front()); - else + if ((*registers.pitchIn == *registers.pitchOut) && (*registers.pitchIn == *registers.lineLengthIn)) { + std::memcpy(dstMappings.front().data(), srcMappings.front().data(), *registers.lineLengthIn * *registers.lineCount); + } else { for (size_t linesToCopy{*registers.lineCount}, srcCopyOffset{}, dstCopyOffset{}; linesToCopy; --linesToCopy, srcCopyOffset += *registers.pitchIn, dstCopyOffset += *registers.pitchOut) - interconnect.Copy(dstMappings.front().subspan(dstCopyOffset, u64{*registers.lineLengthIn}), srcMappings.front().subspan(srcCopyOffset, u64{*registers.lineLengthIn})); + std::memcpy(dstMappings.front().subspan(dstCopyOffset).data(), srcMappings.front().subspan(srcCopyOffset).data(), *registers.lineLengthIn); + } } }