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Implement Maxwell 3D Textures
Implements parsing for the Maxwell 3D TIC pool and conversion of a TIC into a `GuestTexture`, support is limited to pitch-linear RGB565/A8R8G8B8 textures at the moment but will be extended as games utilize more formats and layouts. Support for 1D buffers is also omitted at the moment since they need special handling with them effectively being treated as buffers in Vulkan rather than images.
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@ -12,6 +12,7 @@
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#include "command_executor.h"
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#include "types/tsc.h"
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#include "types/tic.h"
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namespace skyline::gpu::interconnect {
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namespace maxwell3d = soc::gm20b::engine::maxwell3d::type;
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@ -1548,6 +1549,146 @@ namespace skyline::gpu::interconnect {
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private:
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u32 bindlessTextureConstantBufferIndex{};
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struct PoolTexture : public FenceCycleDependency {
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GuestTexture guest;
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std::weak_ptr<TextureView> view;
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};
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struct TexturePool {
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IOVA iova;
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u32 maximumIndex;
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span<TextureImageControl> imageControls;
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std::unordered_map<TextureImageControl, PoolTexture, util::ObjectHash<TextureImageControl>> textures;
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} texturePool{};
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public:
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void SetBindlessTextureConstantBufferIndex(u32 index) {
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bindlessTextureConstantBufferIndex = index;
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}
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void SetTexturePoolIovaHigh(u32 high) {
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texturePool.iova.high = high;
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texturePool.imageControls = nullptr;
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}
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void SetTexturePoolIovaLow(u32 low) {
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texturePool.iova.low = low;
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texturePool.imageControls = nullptr;
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}
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void SetTexturePoolMaximumIndex(u32 index) {
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texturePool.maximumIndex = index;
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texturePool.imageControls = nullptr;
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}
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private:
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texture::Format ConvertTicFormat(TextureImageControl::FormatWord format) {
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using TIC = TextureImageControl;
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#define TIC_FORMAT(format, componentR, componentG, componentB, componentA, swizzleX, swizzleY, swizzleZ, swizzleW) TIC::FormatWord{TIC::ImageFormat::format, TIC::ImageComponent::componentR, TIC::ImageComponent::componentG, TIC::ImageComponent::componentB, TIC::ImageComponent::componentA, TIC::ImageSwizzle::swizzleX, TIC::ImageSwizzle::swizzleY, TIC::ImageSwizzle::swizzleZ, TIC::ImageSwizzle::swizzleW}.Raw()
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#define TIC_FORMAT_SC(format, component, swizzleX, swizzleY, swizzleZ, swizzleW) TIC_FORMAT(format, component, component, component, component, swizzleX, swizzleY, swizzleZ, swizzleW)
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switch (format.Raw()) {
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case TIC_FORMAT_SC(B5G6R5, Unorm, B, G, R, OneFloat):
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return format::R5G6B5Unorm;
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case TIC_FORMAT_SC(A8R8G8B8, Unorm, R, G, B, A):
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return format::A8B8G8R8Unorm;
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default:
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throw exception("Cannot translate TIC format: 0x{:X}", static_cast<u32>(format.Raw()));
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}
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#undef TIC_FORMAT_SC
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#undef TIC_FORMAT
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}
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std::shared_ptr<TextureView> GetPoolTextureView(u32 index) {
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if (!texturePool.imageControls.valid()) {
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auto mappings{channelCtx.asCtx->gmmu.TranslateRange(texturePool.iova, texturePool.maximumIndex * sizeof(TextureImageControl))};
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if (mappings.size() != 1)
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throw exception("Texture pool mapping count is unexpected: {}", mappings.size());
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texturePool.imageControls = mappings.front().cast<TextureImageControl>();
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}
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TextureImageControl &textureControl{texturePool.imageControls[index]};
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auto textureIt{texturePool.textures.insert({textureControl, {}})};
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auto &poolTexture{textureIt.first->second};
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if (textureIt.second) {
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// If the entry didn't exist prior then we need to convert the TIC to a GuestTexture
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auto &guest{poolTexture.guest};
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guest.format = ConvertTicFormat(textureControl.formatWord);
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constexpr size_t CubeFaceCount{6}; //!< The amount of faces of a cube
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guest.baseArrayLayer = static_cast<u16>(textureControl.BaseLayer());
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guest.dimensions = texture::Dimensions(textureControl.widthMinusOne + 1, textureControl.heightMinusOne + 1, 1);
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u16 depth{static_cast<u16>(textureControl.depthMinusOne + 1)};
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using TicType = TextureImageControl::TextureType;
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using TexType = texture::TextureType;
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switch (textureControl.textureType) {
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case TicType::e1D:
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guest.type = TexType::e1D;
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guest.layerCount = 1;
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break;
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case TicType::e1DArray:
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guest.type = TexType::e1D;
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guest.layerCount = depth;
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break;
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case TicType::e1DBuffer:
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throw exception("1D Buffers are not supported");
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case TicType::e2D:
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case TicType::e2DNoMipmap:
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guest.type = TexType::e2D;
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guest.layerCount = 1;
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break;
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case TicType::e2DArray:
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guest.type = TexType::e2D;
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guest.layerCount = depth;
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break;
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case TicType::e3D:
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guest.type = TexType::e3D;
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guest.layerCount = 1;
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guest.dimensions.depth = depth;
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break;
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case TicType::eCubemap:
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guest.type = TexType::e2D;
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guest.layerCount = CubeFaceCount;
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break;
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case TicType::eCubeArray:
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guest.type = TexType::e2D;
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guest.layerCount = depth * CubeFaceCount;
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break;
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}
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size_t size; //!< The size of the texture in bytes
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if (textureControl.headerType == TextureImageControl::HeaderType::Pitch) {
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u32 pitch{static_cast<u32>(textureControl.tileConfig.pitchHigh) << TextureImageControl::TileConfig::PitchAlignmentBits};
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guest.tileConfig = {
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.mode = texture::TileMode::Pitch,
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.pitch = pitch,
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};
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size = pitch * guest.dimensions.height * guest.dimensions.depth * guest.layerCount;
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} else {
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throw exception("Unsupported TIC Header Type: {}", static_cast<u32>(textureControl.headerType));
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}
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auto mappings{channelCtx.asCtx->gmmu.TranslateRange(textureControl.Iova(), size)};
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guest.mappings.assign(mappings.begin(), mappings.end());
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} else if (auto textureView{poolTexture.view.lock()}; textureView != nullptr) {
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// If the entry already exists and the view is still valid then we return it directly
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return textureView;
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}
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auto textureView{gpu.texture.FindOrCreate(poolTexture.guest)};
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poolTexture.view = textureView;
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return textureView;
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}
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/* Samplers */
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private:
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struct Sampler : public vk::raii::Sampler, public FenceCycleDependency {
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@ -1577,6 +1718,7 @@ namespace skyline::gpu::interconnect {
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samplerPool.samplerControls = nullptr;
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}
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private:
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vk::Filter ConvertSamplerFilter(TextureSamplerControl::Filter filter) {
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using TscFilter = TextureSamplerControl::Filter;
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using VkFilter = vk::Filter;
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@ -1753,11 +1895,6 @@ namespace skyline::gpu::interconnect {
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return sampler = std::make_shared<Sampler>(gpu.vkDevice, samplerInfo.get<vk::SamplerCreateInfo>());
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}
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public:
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void SetBindlessTextureConstantBufferIndex(u32 index) {
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bindlessTextureConstantBufferIndex = index;
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}
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public:
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void SetIndexBufferStartIovaHigh(u32 high) {
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indexBuffer.start.high = high;
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app/src/main/cpp/skyline/gpu/interconnect/types/tic.h
Normal file
341
app/src/main/cpp/skyline/gpu/interconnect/types/tic.h
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@ -0,0 +1,341 @@
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// SPDX-License-Identifier: MPL-2.0
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// Copyright © 2021 Skyline Team and Contributors (https://github.com/skyline-emu/)
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// Copyright © 2018-2020 fincs (https://github.com/devkitPro/deko3d)
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#pragma once
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#include <bit>
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#include <common/base.h>
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namespace skyline::gpu::interconnect {
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#pragma pack(push, 1)
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/**
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* @brief The Texture Image Control is a descriptor used to configure the texture unit in Maxwell GPUs
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* @url https://github.com/envytools/envytools/blob/master/rnndb/graph/gm200_texture.xml
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* @url https://github.com/devkitPro/deko3d/blob/00c12d1f4809014f1cc22719dd2e3476735eec64/source/maxwell/texture_image_control_block.h
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* @note Any members with underscore number suffixes represent a bitfield range of a value that member represents
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* @note Any enumerations that have numerical enumerants are prefixed with 'e'
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*/
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struct TextureImageControl {
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/**
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* @note An underscore may be used to describe a different block in a format
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*/
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enum class ImageFormat : u32 {
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R32G32B32A32 = 0x01,
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R32G32B32 = 0x02,
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R16G16B16A16 = 0x03,
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R32G32 = 0x04,
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R32B24G8 = 0x05,
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Etc2Rgb = 0x06,
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X8B8G8R8 = 0x07,
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A8R8G8B8 = 0x08,
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A2B10G10R10 = 0x09,
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Etc2RgbPta = 0x0A,
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Etc2Rgba = 0x0B,
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R16G16 = 0x0C,
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G8R24 = 0x0D,
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G24R8 = 0x0E,
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R32 = 0x0F,
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BC6hSf16 = 0x10,
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BC6hUf16 = 0x11,
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A4B4G4R4 = 0x12,
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A5B5G5R1 = 0x13,
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A1B5G5R5 = 0x14,
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B5G6R5 = 0x15,
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B6G5R5 = 0x16,
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BC7U = 0x17,
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G8R8 = 0x18,
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Eac = 0x19,
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EacX2 = 0x1A,
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R16 = 0x1B,
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Y8Video = 0x1C,
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R8 = 0x1D,
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G4R4 = 0x1E,
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R1 = 0x1F,
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E5B9G9R9SharedExponent = 0x20,
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BF10GF11RF11 = 0x21,
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G8B8G8R8 = 0x22,
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B8G8R8G8 = 0x23,
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Dxt1 = 0x24,
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Dxt23 = 0x25,
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Dxt45 = 0x26,
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Dxn1 = 0x27,
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Dxn2 = 0x28,
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Z24S8 = 0x29,
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X8Z24 = 0x2A,
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S8Z24 = 0x2B,
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X4V4Z24_Cov4R4V = 0x2C,
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X4V4Z24_Cov8R8V = 0x2D,
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V8Z24_Cov4R12V = 0x2E,
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ZF32 = 0x2F,
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ZF32_X24S8 = 0x30,
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X8Z24_X20V4S8_Cov4R4V = 0x31,
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X8Z24_X20V4S8_Cov8R8V = 0x32,
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ZF32_X20V4X8_Cov4R4V = 0x33,
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ZF32_X20V4X8_Cov8R8V = 0x34,
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ZF32_X20V4S8_Cov4R4V = 0x35,
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ZF32_X20V4S8_Cov8R8V = 0x36,
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X8Z24_X16V8S8_Cov4R12V = 0x37,
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ZF32_X16V8X8_Cov4R12V = 0x38,
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ZF32_X16V8S8_Cov4R12V = 0x39,
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Z16 = 0x3A,
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V8Z24_Cov8R24V = 0x3B,
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X8Z24_X16V8S8_Cov8R24V = 0x3C,
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ZF32_X16V8X8_Cov8R24V = 0x3D,
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ZF32_X16V8S8_Cov8R24V = 0x3E,
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Astc4x4 = 0x40,
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Astc5x5 = 0x41,
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Astc6x6 = 0x42,
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Astc8x8 = 0x44,
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Astc10x10 = 0x45,
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Astc12x12 = 0x46,
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Astc5x4 = 0x50,
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Astc6x5 = 0x51,
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Astc8x6 = 0x52,
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Astc10x8 = 0x53,
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Astc12x10 = 0x54,
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Astc8x5 = 0x55,
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Astc10x5 = 0x56,
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Astc10x6 = 0x57,
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};
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enum class ImageComponent : u32 {
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Snorm = 1,
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Unorm = 2,
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Sint = 3,
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Uint = 4,
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SnormForceFp16 = 5,
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UnormForceFp16 = 6,
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Float = 7,
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};
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enum class ImageSwizzle : u32 {
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Zero = 0,
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R = 2,
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G = 3,
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B = 4,
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A = 5,
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OneInt = 6,
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OneFloat = 7,
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};
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enum class HeaderType : u32 {
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Buffer1D = 0,
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PitchColorKey = 1,
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Pitch = 2,
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BlockLinear = 3,
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BlockLinearColorKey = 4,
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};
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enum class TextureType : u32 {
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e1D = 0,
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e2D = 1,
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e3D = 2,
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eCubemap = 3,
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e1DArray = 4,
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e2DArray = 5,
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e1DBuffer = 6,
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e2DNoMipmap = 7,
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eCubeArray = 8,
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};
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enum class MsaaMode : u32 {
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e1x1 = 0,
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e2x1 = 1,
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e2x2 = 2,
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e4x2 = 3,
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e4x2D3D = 4,
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e2x1D3D = 5,
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e4x4 = 6,
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e2x2Vc4 = 8,
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e2x2Vc12 = 9,
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e4x2Vc8 = 10,
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e4x2Vc24 = 11,
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};
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enum class LodQuality : u32 {
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Low = 0,
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High = 1,
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};
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enum class SectorPromotion : u32 {
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None = 0,
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To2V = 1,
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To2H = 2,
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To4 = 3,
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};
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enum class BorderSize : u32 {
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One = 0,
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Two = 1,
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Four = 2,
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Eight = 3,
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SamplerColor = 7,
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};
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enum class AnisotropySpreadModifier : u32 {
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None = 0,
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One = 1,
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Two = 2,
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Sqrt = 3,
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};
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enum class AnisotropySpread : u32 {
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Half = 0,
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One = 1,
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Two = 2,
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Max = 3,
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};
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enum class MaxAnisotropy : u32 {
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e1to1 = 0,
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e2to1 = 1,
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e4to1 = 2,
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e6to1 = 3,
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e8to1 = 4,
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e10to1 = 5,
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e12to1 = 6,
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e16to1 = 7,
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};
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// 0x00
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struct FormatWord {
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ImageFormat format : 7;
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ImageComponent componentR : 3;
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ImageComponent componentG : 3;
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ImageComponent componentB : 3;
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ImageComponent componentA : 3;
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ImageSwizzle swizzleX : 3;
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ImageSwizzle swizzleY : 3;
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ImageSwizzle swizzleZ : 3;
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ImageSwizzle swizzleW : 3;
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u32 _pad_ : 1;
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bool operator==(const FormatWord &) const = default;
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constexpr u32 Raw() const {
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if (std::is_constant_evaluated()) {
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u32 raw{};
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raw <<= 1;
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raw |= static_cast<u32>(swizzleW);
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raw <<= 3;
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raw |= static_cast<u32>(swizzleZ);
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raw <<= 3;
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raw |= static_cast<u32>(swizzleY);
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raw <<= 3;
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raw |= static_cast<u32>(swizzleX);
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raw <<= 3;
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raw |= static_cast<u32>(componentA);
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raw <<= 3;
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raw |= static_cast<u32>(componentB);
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raw <<= 3;
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raw |= static_cast<u32>(componentG);
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raw <<= 3;
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raw |= static_cast<u32>(componentR);
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raw <<= 7;
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raw |= static_cast<u32>(format);
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return raw;
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} else {
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return util::BitCast<u32>(*this);
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}
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}
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} formatWord;
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// 0x04
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u32 addressLow;
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// 0x08
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u32 addressHigh : 16;
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u32 viewLayerBase_3_7 : 5;
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HeaderType headerType : 3;
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u32 loadStoreHint : 1;
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u32 viewCoherencyHash : 4;
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u32 viewLayerBase_8_10 : 3;
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// 0x0C
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union TileConfig {
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u16 widthMinusOne_16_31;
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constexpr static size_t PitchAlignmentBits{5}; //!< The amount of bits that are 0 in the pitch due to alignment (Aligned to 32 bytes)
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u16 pitchHigh; //!< Upper 16-bits of the 21-bit pitch, lower bits are implicitly zero due to alignment
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struct {
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u16 tileWidthGobsLog2 : 3;
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u16 tileHeightGobsLog2 : 3;
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u16 tileDepthGobsLog2 : 3;
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u16 _pad0_ : 1;
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u16 sparseTileWidthGobsLog2 : 3;
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u16 gob3d : 1;
|
||||
u16 _pad1_ : 2;
|
||||
};
|
||||
u16 raw;
|
||||
|
||||
bool operator==(const TileConfig &other) const {
|
||||
return raw == other.raw;
|
||||
}
|
||||
} tileConfig;
|
||||
u16 lodAnisotropyQuality_2 : 1;
|
||||
LodQuality lodAnisotropyQuality : 1;
|
||||
LodQuality lodIsotropyQuality : 1;
|
||||
AnisotropySpreadModifier anisotropyCoarseSpreadModifier : 2;
|
||||
u16 anisotropySpreadScale : 5;
|
||||
u16 useHeaderOptControl : 1;
|
||||
u16 depthTexture : 1;
|
||||
u16 mipMaxLevels : 4;
|
||||
|
||||
// 0x10
|
||||
u32 widthMinusOne : 16;
|
||||
u32 viewLayerBase_0_2 : 3;
|
||||
u32 anisotropySpreadMaxLog2 : 3;
|
||||
u32 isSrgb : 1;
|
||||
TextureType textureType : 4;
|
||||
SectorPromotion sectorPromotion : 2;
|
||||
BorderSize borderSize : 3;
|
||||
|
||||
// 0x14
|
||||
u32 heightMinusOne : 16;
|
||||
u32 depthMinusOne : 14;
|
||||
u32 isSparse : 1;
|
||||
u32 normalizedCoordinates : 1;
|
||||
|
||||
// 0x18
|
||||
u32 colorKeyOp : 1;
|
||||
u32 trilinOpt : 5;
|
||||
u32 mipLodBias : 13;
|
||||
u32 anisoBias : 4;
|
||||
AnisotropySpread anisotropyFineSpread : 2;
|
||||
AnisotropySpread anisotropyCoarseSpread : 2;
|
||||
MaxAnisotropy maxAnisotropy : 3;
|
||||
AnisotropySpreadModifier anisotropyFineSpreadModifier : 2;
|
||||
|
||||
// 0x1C
|
||||
union ViewConfig {
|
||||
u32 colorKeyValue;
|
||||
struct {
|
||||
u32 viewMipMinLevel : 4;
|
||||
u32 viewMipMaxLevel : 4;
|
||||
MsaaMode msaaMode : 4;
|
||||
u32 minLodClamp : 12;
|
||||
u32 _pad2_ : 8;
|
||||
};
|
||||
u32 raw;
|
||||
|
||||
bool operator==(const ViewConfig &other) const {
|
||||
return raw == other.raw;
|
||||
}
|
||||
} viewConfig;
|
||||
|
||||
bool operator==(const TextureImageControl &) const = default;
|
||||
|
||||
u64 Iova() {
|
||||
return (static_cast<u64>(addressHigh) << 32) | addressLow;
|
||||
}
|
||||
|
||||
u32 BaseLayer() {
|
||||
return static_cast<u32>(viewLayerBase_0_2 | (viewLayerBase_3_7 << 3) | (viewLayerBase_8_10 << 8));
|
||||
}
|
||||
};
|
||||
static_assert(sizeof(TextureImageControl) == 0x20);
|
||||
|
||||
#pragma pack(pop)
|
||||
}
|
@ -7,6 +7,8 @@
|
||||
#include <common/base.h>
|
||||
|
||||
namespace skyline::gpu::interconnect {
|
||||
#pragma pack(push, 1)
|
||||
|
||||
/**
|
||||
* @brief The Texture Sampler Control is a descriptor used to configure the texture sampler in Maxwell GPUs
|
||||
* @url https://github.com/envytools/envytools/blob/master/rnndb/graph/g80_texture.xml#L367
|
||||
@ -133,4 +135,6 @@ namespace skyline::gpu::interconnect {
|
||||
}
|
||||
};
|
||||
static_assert(sizeof(TextureSamplerControl) == 0x20);
|
||||
|
||||
#pragma pack(pop)
|
||||
}
|
||||
|
@ -16,6 +16,7 @@ namespace skyline::gpu::format {
|
||||
constexpr Format R5G6B5Unorm{sizeof(u16), vkf::eR5G6B5UnormPack16};
|
||||
constexpr Format A2B10G10R10Unorm{sizeof(u32), vkf::eA2B10G10R10UnormPack32};
|
||||
constexpr Format A8B8G8R8Srgb{sizeof(u32), vkf::eA8B8G8R8SrgbPack32};
|
||||
constexpr Format A8B8G8R8Unorm{sizeof(u32), vkf::eA8B8G8R8UnormPack32};
|
||||
constexpr Format A8B8G8R8Snorm{sizeof(u32), vkf::eA8B8G8R8SnormPack32};
|
||||
constexpr Format R16G16Unorm{sizeof(u32), vkf::eR16G16Unorm};
|
||||
constexpr Format R16G16Snorm{sizeof(u32), vkf::eR16G16Snorm};
|
||||
|
@ -477,6 +477,16 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
|
||||
context.SetSamplerPoolMaximumIndex(maximumIndex);
|
||||
})
|
||||
|
||||
MAXWELL3D_STRUCT_STRUCT_CASE(texturePool, address, high, {
|
||||
context.SetTexturePoolIovaHigh(high);
|
||||
})
|
||||
MAXWELL3D_STRUCT_STRUCT_CASE(texturePool, address, low, {
|
||||
context.SetTexturePoolIovaLow(low);
|
||||
})
|
||||
MAXWELL3D_STRUCT_CASE(texturePool, maximumIndex, {
|
||||
context.SetTexturePoolMaximumIndex(maximumIndex);
|
||||
})
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user