Avoid redundantly passing executor in ctors when it's already in ChannelCtx

This commit is contained in:
Billy Laws 2022-10-25 20:55:50 +01:00
parent 463394ba72
commit c5ec484d9a
9 changed files with 28 additions and 27 deletions

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@ -106,7 +106,10 @@ namespace skyline::gpu::interconnect {
return texture;
}
Fermi2D::Fermi2D(GPU &gpu, soc::gm20b::ChannelContext &channelCtx, gpu::interconnect::CommandExecutor &executor) : gpu(gpu), channelCtx(channelCtx), executor(executor) {}
Fermi2D::Fermi2D(GPU &gpu, soc::gm20b::ChannelContext &channelCtx)
: gpu{gpu},
channelCtx{channelCtx},
executor{channelCtx.executor} {}
void Fermi2D::Blit(const Surface &srcSurface, const Surface &dstSurface, float srcRectX, float srcRectY, u32 dstRectWidth, u32 dstRectHeight, u32 dstRectX, u32 dstRectY, float duDx, float dvDy, SampleModeOrigin sampleOrigin, bool resolve, SampleModeFilter filter) {
// TODO: When we support MSAA perform a resolve operation rather than blit when the `resolve` flag is set.

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@ -36,7 +36,7 @@ namespace skyline::gpu::interconnect {
gpu::GuestTexture GetGuestTexture(const Surface &surface);
public:
Fermi2D(GPU &gpu, soc::gm20b::ChannelContext &channelCtx, gpu::interconnect::CommandExecutor &executor);
Fermi2D(GPU &gpu, soc::gm20b::ChannelContext &channelCtx);
void Blit(const Surface &srcSurface, const Surface &dstSurface, float srcRectX, float srcRectY, u32 dstRectWidth, u32 dstRectHeight, u32 dstRectX, u32 dstRectY, float duDx, float dvDy, SampleModeOrigin sampleOrigin, bool resolve, SampleModeFilter filter);
};

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@ -4,7 +4,7 @@
#include <gpu/interconnect/command_executor.h>
#include <gpu/interconnect/conversion/quads.h>
#include <vulkan/vulkan_structs.hpp>
#include <soc/gm20b/channel.h>
#include "common/utils.h"
#include "maxwell_3d.h"
#include "common.h"
@ -13,19 +13,18 @@
namespace skyline::gpu::interconnect::maxwell3d {
Maxwell3D::Maxwell3D(GPU &gpu,
soc::gm20b::ChannelContext &channelCtx,
gpu::interconnect::CommandExecutor &executor,
nce::NCE &nce,
skyline::kernel::MemoryManager &memoryManager,
DirtyManager &manager,
const EngineRegisterBundle &registerBundle)
: ctx{channelCtx, executor, gpu, nce, memoryManager},
: ctx{channelCtx, channelCtx.executor, gpu, nce, memoryManager},
activeState{manager, registerBundle.activeStateRegisters},
clearEngineRegisters{registerBundle.clearRegisters},
constantBuffers{manager, registerBundle.constantBufferSelectorRegisters},
samplers{manager, registerBundle.samplerPoolRegisters},
textures{manager, registerBundle.texturePoolRegisters},
directState{activeState.directState} {
executor.AddFlushCallback([this] {
ctx.executor.AddFlushCallback([this] {
if (attachedDescriptorSets) {
ctx.executor.AttachDependency(attachedDescriptorSets);
attachedDescriptorSets = nullptr;
@ -40,7 +39,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
constantBuffers.DisableQuickBind();
});
executor.AddPipelineChangeCallback([this] {
ctx.executor.AddPipelineChangeCallback([this] {
activeState.MarkAllDirty();
activeDescriptorSet = nullptr;
});

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@ -61,7 +61,6 @@ namespace skyline::gpu::interconnect::maxwell3d {
Maxwell3D(GPU &gpu,
soc::gm20b::ChannelContext &channelCtx,
gpu::interconnect::CommandExecutor &executor,
nce::NCE &nce,
kernel::MemoryManager &memoryManager,
DirtyManager &manager,

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@ -5,13 +5,13 @@
namespace skyline::soc::gm20b {
ChannelContext::ChannelContext(const DeviceState &state, std::shared_ptr<AddressSpaceContext> pAsCtx, size_t numEntries)
: asCtx(std::move(pAsCtx)),
executor(state),
maxwell3D(state, *this, macroState, executor),
fermi2D(state, *this, macroState, executor),
maxwellDma(state, *this, executor),
keplerCompute(state, *this),
inline2Memory(*this),
gpfifo(state, *this, numEntries),
: asCtx{std::move(pAsCtx)},
executor{state},
maxwell3D{state, *this, macroState},
fermi2D{state, *this, macroState},
maxwellDma{state, *this},
keplerCompute{state, *this},
inline2Memory{state, *this},
gpfifo{state, *this, numEntries},
globalChannelLock{state.gpu->channelLock} {}
}

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@ -6,11 +6,11 @@
#include "fermi_2d.h"
namespace skyline::soc::gm20b::engine::fermi2d {
Fermi2D::Fermi2D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState, gpu::interconnect::CommandExecutor &executor)
: MacroEngineBase(macroState),
syncpoints(state.soc->host1x.syncpoints),
interconnect(*state.gpu, channelCtx, executor),
channelCtx(channelCtx) {}
Fermi2D::Fermi2D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState)
: MacroEngineBase{macroState},
syncpoints{state.soc->host1x.syncpoints},
interconnect{*state.gpu, channelCtx},
channelCtx{channelCtx} {}
void Fermi2D::HandleMethod(u32 method, u32 argument) {
registers.raw[method] = argument;

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@ -86,7 +86,7 @@ namespace skyline::soc::gm20b::engine::fermi2d {
Registers registers{};
Fermi2D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState, gpu::interconnect::CommandExecutor &executor);
Fermi2D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState);
void CallMethodFromMacro(u32 method, u32 argument) override;

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@ -61,14 +61,14 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
registers.begin->op : type::ConvertPrimitiveTopologyToDrawTopology(*registers.primitiveTopology);
}
Maxwell3D::Maxwell3D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState, gpu::interconnect::CommandExecutor &executor)
Maxwell3D::Maxwell3D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState)
: MacroEngineBase{macroState},
syncpoints{state.soc->host1x.syncpoints},
i2m{channelCtx},
i2m{state, channelCtx},
dirtyManager{registers},
interconnect{*state.gpu, channelCtx, executor, *state.nce, state.process->memory, dirtyManager, MakeEngineRegisters(registers)},
interconnect{*state.gpu, channelCtx, *state.nce, state.process->memory, dirtyManager, MakeEngineRegisters(registers)},
channelCtx{channelCtx} {
executor.AddFlushCallback([this]() { FlushEngineState(); });
channelCtx.executor.AddFlushCallback([this]() { FlushEngineState(); });
InitializeRegisters();
}

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@ -364,7 +364,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
ChannelContext &channelCtx;
Maxwell3D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState, gpu::interconnect::CommandExecutor &executor);
Maxwell3D(const DeviceState &state, ChannelContext &channelCtx, MacroState &macroState);
/**
* @brief Initializes Maxwell 3D registers to their default values