From e0c487f6075bf9dccb8fbf3f24ccd1d180ab142c Mon Sep 17 00:00:00 2001
From: Billy Laws <blaws05@gmail.com>
Date: Wed, 5 Apr 2023 15:03:00 +0100
Subject: [PATCH] Fix system register state handling

We failed to preserve NCSZ, and and we stored instead of loaded FPCR when returning to guest.
---
 .../main/cpp/skyline/kernel/types/KThread.cpp |  1 +
 app/src/main/cpp/skyline/nce/guest.S          | 23 ++++++++++++-------
 app/src/main/cpp/skyline/nce/guest.h          |  5 ++--
 3 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/app/src/main/cpp/skyline/kernel/types/KThread.cpp b/app/src/main/cpp/skyline/kernel/types/KThread.cpp
index 3f4d93fc..e0c7f546 100644
--- a/app/src/main/cpp/skyline/kernel/types/KThread.cpp
+++ b/app/src/main/cpp/skyline/kernel/types/KThread.cpp
@@ -141,6 +141,7 @@ namespace skyline::kernel::type {
             "MOV X29, XZR\n\t"
             "MSR FPSR, XZR\n\t"
             "MSR FPCR, XZR\n\t"
+            "MSR NZCV, XZR\n\t"
             "DUP V0.16B, WZR\n\t"
             "DUP V1.16B, WZR\n\t"
             "DUP V2.16B, WZR\n\t"
diff --git a/app/src/main/cpp/skyline/nce/guest.S b/app/src/main/cpp/skyline/nce/guest.S
index 969bff3b..18887eb3 100644
--- a/app/src/main/cpp/skyline/nce/guest.S
+++ b/app/src/main/cpp/skyline/nce/guest.S
@@ -38,11 +38,16 @@ SaveCtx:
     STP Q28, Q29, [LR, #(0xA0 + 16 * 28)]
     STP Q30, Q31, [LR, #(0xA0 + 16 * 30)]
 
-    /* Store FPCR/FPSR */
+
+    /* Store System Registers */
+    STR X0, [SP, #-16]!
     MRS	X0, FPSR
     STR	W0, [LR, #0x298]
-    MRS	X1, FPCR
-    STR	W1, [LR, #0x29C]
+    MRS	X0, FPCR
+    STR	W0, [LR, #0x29C]
+    MRS	X0, NZCV
+    STR	W0, [LR, #0x2C0]
+    LDR X0, [SP], #16
 
     /* Restore Scratch Register */
     LDR LR, [SP, #8]
@@ -72,11 +77,13 @@ LoadCtx:
     LDP Q28, Q29, [LR, #(0xA0 + 16 * 28)]
     LDP Q30, Q31, [LR, #(0xA0 + 16 * 30)]
 
-    /* Store FPCR/FPSR */
-    MRS	X0, FPSR
-    STR	W0, [LR, #0x298]
-    MRS	X1, FPCR
-    STR	W1, [LR, #0x29C]
+    /* Load System Registers */
+    LDR	W0, [LR, #0x298]
+    MSR	FPSR, X0
+    LDR	W0, [LR, #0x29C]
+    MSR	FPCR, X0
+    LDR	W0, [LR, #0x2C0]
+    MSR	NZCV, X0
 
     /* Load GP Registers */
     LDP X0, X1, [LR, #(8 * 0)]
diff --git a/app/src/main/cpp/skyline/nce/guest.h b/app/src/main/cpp/skyline/nce/guest.h
index c49d9a90..3576300e 100644
--- a/app/src/main/cpp/skyline/nce/guest.h
+++ b/app/src/main/cpp/skyline/nce/guest.h
@@ -98,13 +98,14 @@ namespace skyline {
             u8 *hostSp; //!< Host Stack Pointer, same as above
             u8 *tpidrroEl0; //!< Emulated HOS TPIDRRO_EL0
             u8 *tpidrEl0; //!< Emulated HOS TPIDR_EL0
+            u32 nzcv;
             const DeviceState *state;
             u64 magic{constant::SkyTlsMagic};
         };
 
         namespace guest {
-            constexpr size_t SaveCtxSize{34}; //!< The size of the SaveCtx function in 32-bit ARMv8 instructions
-            constexpr size_t LoadCtxSize{34}; //!< The size of the LoadCtx function in 32-bit ARMv8 instructions
+            constexpr size_t SaveCtxSize{38}; //!< The size of the SaveCtx function in 32-bit ARMv8 instructions
+            constexpr size_t LoadCtxSize{36}; //!< The size of the LoadCtx function in 32-bit ARMv8 instructions
 
             /**
              * @brief Saves the context from CPU registers into TLS