Fix Clock Rescaling Bug (Introduced in #135)

There was a mistake in the code-style refactor where the signature in the instruction encoding of `MRS` was set to `0xD54` instead of `0xD53` which would cause a SIGILL (Illegal Instruction) for devices which had their HW timer frequency equivalent to the Switch (19.2MHz) as a modified `MRS` would be deployed there. This issue should not affect devices which perform clock rescaling as the `MRS` instruction there is encoded by the assembler.
This commit is contained in:
PixelyIon 2021-03-10 14:56:01 +05:30
parent 75b769ca1d
commit e90dd672af

View File

@ -60,7 +60,7 @@ namespace skyline::nce {
* @url https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/mrs-move-system-register * @url https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/mrs-move-system-register
*/ */
struct Mrs { struct Mrs {
constexpr Mrs(u32 srcReg, registers::X destReg) : srcReg(srcReg), destReg(destReg), sig(0xD54) {} constexpr Mrs(u32 srcReg, registers::X destReg) : srcReg(srcReg), destReg(destReg), sig(0xD53) {}
constexpr bool Verify() { constexpr bool Verify() {
return (sig == 0xD53); return (sig == 0xD53);