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Optimize code (#1060)
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c4633bad27
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@ -1307,7 +1307,7 @@ void S9xInitBSX (void)
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uint8 *header = r1 ? Memory.ROM + 0x7FC0 : Memory.ROM + 0xFFC0;
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uint8 *header = r1 ? Memory.ROM + 0x7FC0 : Memory.ROM + 0xFFC0;
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FlashMode = (header[0x18] & 0xEF) == 0x20 ? FALSE : TRUE;
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FlashMode = (header[0x18] & 0xEF) == 0x20 ? FALSE : TRUE;
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FlashSize = (header[0x19] & 0x20) ? PSRAM_SIZE : FLASH_SIZE;
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FlashSize = FLASH_SIZE;
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// Fix Block Allocation Flags
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// Fix Block Allocation Flags
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// (for games that don't have it setup properly,
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// (for games that don't have it setup properly,
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@ -1376,38 +1376,12 @@ void S9xResetBSX (void)
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BSX.out_index = 0;
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BSX.out_index = 0;
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memset(BSX.output, 0, sizeof(BSX.output));
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memset(BSX.output, 0, sizeof(BSX.output));
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if(bsxBiosLoadFailed) {
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BSX.MMC[0x02] = FlashMode ? 0x80: 0;
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// per bios: run from psram or flash card
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if (FlashSize == PSRAM_SIZE)
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{
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memcpy(PSRAM, FlashROM, PSRAM_SIZE);
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BSX.MMC[0x01] = 0x80;
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BSX.MMC[0x03] = 0x80;
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BSX.MMC[0x04] = 0x80;
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BSX.MMC[0x0C] = 0x80;
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BSX.MMC[0x0D] = 0x80;
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}
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else
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{
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BSX.MMC[0x03] = 0x80;
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BSX.MMC[0x05] = 0x80;
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BSX.MMC[0x06] = 0x80;
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BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
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}
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BSX.MMC[0x0E] = 0x80;
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}
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else {
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// starting from the bios
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// starting from the bios
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BSX.MMC[0x02] = BSX.MMC[0x03] = BSX.MMC[0x05] = BSX.MMC[0x06] = 0x80;
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BSX.MMC[0x02] = BSX.MMC[0x03] = BSX.MMC[0x05] = BSX.MMC[0x06] = 0x80;
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BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
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BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
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BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80;
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BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80;
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BSX.MMC[0x0E] = 0x80;
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BSX.MMC[0x0E] = 0x80;
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}
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// default register values
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// default register values
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BSX.PPU[0x2196 - BSXPPUBASE] = 0x10;
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BSX.PPU[0x2196 - BSXPPUBASE] = 0x10;
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@ -4,7 +4,6 @@
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For further information, consult the LICENSE file in the root directory.
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For further information, consult the LICENSE file in the root directory.
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\*****************************************************************************/
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\*****************************************************************************/
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#ifndef _CPUOPS_H_
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#ifndef _CPUOPS_H_
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#define _CPUOPS_H_
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#define _CPUOPS_H_
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@ -1955,7 +1955,7 @@ void CMemory::ClearSRAM (bool8 onlyNonSavedSRAM)
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return;
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return;
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// TODO: If SRAM size changes change this value as well
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// TODO: If SRAM size changes change this value as well
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memset(SRAM, SNESGameFixes.SRAMInitialValue, (32,0x80000));
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memset(SRAM, SNESGameFixes.SRAMInitialValue, 0x80000);
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}
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}
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bool8 CMemory::LoadSRAM (const char *filename)
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bool8 CMemory::LoadSRAM (const char *filename)
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@ -3769,7 +3769,6 @@ void CMemory::ApplyROMFixes (void)
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if (Timings.DMACPUSync != 18)
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if (Timings.DMACPUSync != 18)
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printf("DMA sync: %d\n", Timings.DMACPUSync);
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printf("DMA sync: %d\n", Timings.DMACPUSync);
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// SRAM initial value
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// SRAM initial value
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if (match_na("HITOMI3"))
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if (match_na("HITOMI3"))
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{
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{
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@ -99,11 +99,7 @@ __extension__
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#endif
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#endif
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typedef long long int64;
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typedef long long int64;
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typedef unsigned long long uint64;
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typedef unsigned long long uint64;
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#ifdef PTR_NOT_INT
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typedef size_t pint;
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typedef size_t pint;
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#else // __PTR_NOT_INT
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typedef size_t pint;
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#endif // __PTR_NOT_INT
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#endif // __WIN32__
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#endif // __WIN32__
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#endif // HAVE_STDINT_H
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#endif // HAVE_STDINT_H
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#endif // snes9x_types_defined
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#endif // snes9x_types_defined
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@ -125,6 +125,7 @@ void S9xSA1MainLoop (void)
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S9xSA1Opcode_IRQ();
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S9xSA1Opcode_IRQ();
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}
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}
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}
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}
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#undef CPU
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#undef CPU
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int cycles = CPU.Cycles * 3;
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int cycles = CPU.Cycles * 3;
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#define CPU SA1
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#define CPU SA1
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