Optimize code (#1060)

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bladeoner 2023-03-17 17:14:53 +01:00 committed by GitHub
parent c4633bad27
commit 4e73f18af9
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12 changed files with 27 additions and 58 deletions

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@ -1307,7 +1307,7 @@ void S9xInitBSX (void)
uint8 *header = r1 ? Memory.ROM + 0x7FC0 : Memory.ROM + 0xFFC0; uint8 *header = r1 ? Memory.ROM + 0x7FC0 : Memory.ROM + 0xFFC0;
FlashMode = (header[0x18] & 0xEF) == 0x20 ? FALSE : TRUE; FlashMode = (header[0x18] & 0xEF) == 0x20 ? FALSE : TRUE;
FlashSize = (header[0x19] & 0x20) ? PSRAM_SIZE : FLASH_SIZE; FlashSize = FLASH_SIZE;
// Fix Block Allocation Flags // Fix Block Allocation Flags
// (for games that don't have it setup properly, // (for games that don't have it setup properly,
@ -1376,38 +1376,12 @@ void S9xResetBSX (void)
BSX.out_index = 0; BSX.out_index = 0;
memset(BSX.output, 0, sizeof(BSX.output)); memset(BSX.output, 0, sizeof(BSX.output));
if(bsxBiosLoadFailed) {
BSX.MMC[0x02] = FlashMode ? 0x80: 0;
// per bios: run from psram or flash card
if (FlashSize == PSRAM_SIZE)
{
memcpy(PSRAM, FlashROM, PSRAM_SIZE);
BSX.MMC[0x01] = 0x80;
BSX.MMC[0x03] = 0x80;
BSX.MMC[0x04] = 0x80;
BSX.MMC[0x0C] = 0x80;
BSX.MMC[0x0D] = 0x80;
}
else
{
BSX.MMC[0x03] = 0x80;
BSX.MMC[0x05] = 0x80;
BSX.MMC[0x06] = 0x80;
BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
}
BSX.MMC[0x0E] = 0x80;
}
else {
// starting from the bios // starting from the bios
BSX.MMC[0x02] = BSX.MMC[0x03] = BSX.MMC[0x05] = BSX.MMC[0x06] = 0x80; BSX.MMC[0x02] = BSX.MMC[0x03] = BSX.MMC[0x05] = BSX.MMC[0x06] = 0x80;
BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80; BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80; BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80;
BSX.MMC[0x0E] = 0x80; BSX.MMC[0x0E] = 0x80;
}
// default register values // default register values
BSX.PPU[0x2196 - BSXPPUBASE] = 0x10; BSX.PPU[0x2196 - BSXPPUBASE] = 0x10;

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@ -4,7 +4,6 @@
For further information, consult the LICENSE file in the root directory. For further information, consult the LICENSE file in the root directory.
\*****************************************************************************/ \*****************************************************************************/
#ifndef _CPUOPS_H_ #ifndef _CPUOPS_H_
#define _CPUOPS_H_ #define _CPUOPS_H_

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@ -1955,7 +1955,7 @@ void CMemory::ClearSRAM (bool8 onlyNonSavedSRAM)
return; return;
// TODO: If SRAM size changes change this value as well // TODO: If SRAM size changes change this value as well
memset(SRAM, SNESGameFixes.SRAMInitialValue, (32,0x80000)); memset(SRAM, SNESGameFixes.SRAMInitialValue, 0x80000);
} }
bool8 CMemory::LoadSRAM (const char *filename) bool8 CMemory::LoadSRAM (const char *filename)
@ -3769,7 +3769,6 @@ void CMemory::ApplyROMFixes (void)
if (Timings.DMACPUSync != 18) if (Timings.DMACPUSync != 18)
printf("DMA sync: %d\n", Timings.DMACPUSync); printf("DMA sync: %d\n", Timings.DMACPUSync);
// SRAM initial value // SRAM initial value
if (match_na("HITOMI3")) if (match_na("HITOMI3"))
{ {

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@ -99,11 +99,7 @@ __extension__
#endif #endif
typedef long long int64; typedef long long int64;
typedef unsigned long long uint64; typedef unsigned long long uint64;
#ifdef PTR_NOT_INT
typedef size_t pint; typedef size_t pint;
#else // __PTR_NOT_INT
typedef size_t pint;
#endif // __PTR_NOT_INT
#endif // __WIN32__ #endif // __WIN32__
#endif // HAVE_STDINT_H #endif // HAVE_STDINT_H
#endif // snes9x_types_defined #endif // snes9x_types_defined

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@ -125,6 +125,7 @@ void S9xSA1MainLoop (void)
S9xSA1Opcode_IRQ(); S9xSA1Opcode_IRQ();
} }
} }
#undef CPU #undef CPU
int cycles = CPU.Cycles * 3; int cycles = CPU.Cycles * 3;
#define CPU SA1 #define CPU SA1