mirror of
https://github.com/dborth/snes9xgx.git
synced 2024-11-30 14:34:22 +01:00
fix SPC crash that happens on some games, eg: chrono trigger
(http://www.snes9x.com/phpbb3/viewtopic.php?f=6&t=6881) the snes9x team gave up and replaced the core, but others have fixed it https://bitbucket.org/mpyne/game-music-emu/issues/18/spc_cpucpp-492-always-assert-s
This commit is contained in:
Daryl Borth
parent
05a607a8f7
commit
4f2234cbc2
@ -282,7 +282,7 @@ static unsigned char const glitch_probs [3] [256] =
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// If write isn't preceded by read, data has this added to it
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int const no_read_before_write = 0x2000;
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void SNES_SPC::cpu_write_smp_reg_( int data, rel_time_t time, int addr )
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void SNES_SPC::cpu_write_smp_reg_( int data, rel_time_t time, uint16_t addr )
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{
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switch ( addr )
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{
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@ -383,7 +383,7 @@ void SNES_SPC::cpu_write_smp_reg_( int data, rel_time_t time, int addr )
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}
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}
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void SNES_SPC::cpu_write_smp_reg( int data, rel_time_t time, int addr )
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void SNES_SPC::cpu_write_smp_reg( int data, rel_time_t time, uint16_t addr )
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{
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if ( addr == r_dspdata ) // 99%
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dsp_write( data, time );
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@ -393,23 +393,15 @@ void SNES_SPC::cpu_write_smp_reg( int data, rel_time_t time, int addr )
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void SNES_SPC::cpu_write_high( int data, int i, rel_time_t time )
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{
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if ( i < rom_size )
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{
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m.hi_ram [i] = (uint8_t) data;
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if ( m.rom_enabled )
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RAM [i + rom_addr] = m.rom [i]; // restore overwritten ROM
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}
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else
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{
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//assert( *(&(RAM [0]) + i + rom_addr) == (uint8_t) data );
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*(&(RAM [0]) + i + rom_addr) = cpu_pad_fill; // restore overwritten padding
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cpu_write( data, i + rom_addr - 0x10000, time );
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}
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m.hi_ram [i] = (uint8_t) data;
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if ( m.rom_enabled )
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RAM [i + rom_addr] = m.rom [i]; // restore overwritten ROM
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}
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int const bits_in_int = CHAR_BIT * sizeof (int);
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void SNES_SPC::cpu_write( int data, int addr, rel_time_t time )
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void SNES_SPC::cpu_write( int data, uint16_t addr, rel_time_t time )
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{
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MEM_ACCESS( time, addr )
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@ -463,7 +455,7 @@ inline int SNES_SPC::cpu_read_smp_reg( int reg, rel_time_t time )
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return result;
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}
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int SNES_SPC::cpu_read( int addr, rel_time_t time )
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int SNES_SPC::cpu_read( uint16_t addr, rel_time_t time )
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{
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MEM_ACCESS( time, addr )
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@ -4,6 +4,8 @@
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#ifndef SNES_SPC_H
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#define SNES_SPC_H
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#include <stdint.h>
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#include "SPC_DSP.h"
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#include "blargg_endian.h"
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@ -171,12 +173,12 @@ private:
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struct
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{
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int pc;
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int a;
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int x;
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int y;
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int psw;
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int sp;
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uint16_t pc;
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uint8_t a;
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uint8_t x;
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uint8_t y;
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uint8_t psw;
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uint8_t sp;
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} cpu_regs;
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rel_time_t dsp_time;
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@ -202,13 +204,11 @@ private:
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struct
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{
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// padding to neutralize address overflow
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union {
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uint8_t padding1 [0x100];
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uint16_t align; // makes compiler align data for 16-bit access
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} padding1 [1];
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uint8_t ram [0x10000];
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uint8_t padding2 [0x100];
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// padding to neutralize address overflow -- but this is
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// still undefined behavior! TODO: remove and instead properly
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// guard usage of emulated memory
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uint8_t padding1 [0x100];
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alignas(uint16_t) uint8_t ram [0x10000 + 0x100];
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} ram;
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};
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state_t m;
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@ -244,13 +244,13 @@ private:
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Timer* run_timer ( Timer* t, rel_time_t );
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int dsp_read ( rel_time_t );
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void dsp_write ( int data, rel_time_t );
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void cpu_write_smp_reg_( int data, rel_time_t, int addr );
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void cpu_write_smp_reg ( int data, rel_time_t, int addr );
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void cpu_write_smp_reg_( int data, rel_time_t, uint16_t addr );
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void cpu_write_smp_reg ( int data, rel_time_t, uint16_t addr );
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void cpu_write_high ( int data, int i, rel_time_t );
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void cpu_write ( int data, int addr, rel_time_t );
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void cpu_write ( int data, uint16_t addr, rel_time_t );
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int cpu_read_smp_reg ( int i, rel_time_t );
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int cpu_read ( int addr, rel_time_t );
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unsigned CPU_mem_bit ( uint8_t const* pc, rel_time_t );
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int cpu_read ( uint16_t addr, rel_time_t );
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unsigned CPU_mem_bit ( uint16_t pc, rel_time_t );
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bool check_echo_access ( int addr );
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uint8_t* run_until_( time_t end_time );
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@ -154,7 +154,7 @@ void SNES_SPC::ram_loaded()
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// Put STOP instruction around memory to catch PC underflow/overflow
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memset( m.ram.padding1, cpu_pad_fill, sizeof m.ram.padding1 );
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memset( m.ram.padding2, cpu_pad_fill, sizeof m.ram.padding2 );
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memset( m.ram.ram + 0x10000, cpu_pad_fill, sizeof m.ram.padding1 );
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}
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// Registers were just loaded. Applies these new values.
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@ -66,62 +66,37 @@ Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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#define READ_DP( time, addr ) READ ( time, DP_ADDR( addr ) )
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#define WRITE_DP( time, addr, data ) WRITE( time, DP_ADDR( addr ), data )
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#define READ_PROG16( addr ) GET_LE16( ram + (addr) )
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#define READ_PROG16( addr ) (RAM [addr & 0xffff] | (RAM [(addr + 1) & 0xffff] << 8))
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#define SET_PC( n ) (pc = ram + (n))
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#define GET_PC() (pc - ram)
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#define READ_PC( pc ) (*(pc))
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#define READ_PC16( pc ) GET_LE16( pc )
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#define SET_PC( n ) (pc = n)
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#define GET_PC() (pc)
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#define READ_PC( pc ) (ram [pc])
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#define READ_PC16( pc ) READ_PROG16( pc )
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// TODO: remove non-wrapping versions?
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#define SPC_NO_SP_WRAPAROUND 0
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#define SET_SP( v ) (sp = v)
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#define GET_SP() ((uint8_t) (sp))
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#define SET_SP( v ) (sp = ram + 0x101 + (v))
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#define GET_SP() (sp - 0x101 - ram)
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#if SPC_NO_SP_WRAPAROUND
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#define PUSH16( v ) (sp -= 2, SET_LE16( sp, v ))
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#define PUSH( v ) (void) (*--sp = (uint8_t) (v))
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#define POP( out ) (void) ((out) = *sp++)
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#else
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#define PUSH16( data )\
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{\
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int addr = (sp -= 2) - ram;\
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if ( addr > 0x100 )\
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{\
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SET_LE16( sp, data );\
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}\
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else\
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{\
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ram [(uint8_t) addr + 0x100] = (uint8_t) data;\
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sp [1] = (uint8_t) (data >> 8);\
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sp += 0x100;\
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}\
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PUSH( (data & 0xff00) >> 8 );\
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PUSH( data & 0xff );\
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}
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#define PUSH( data )\
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{\
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*--sp = (uint8_t) (data);\
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if ( sp - ram == 0x100 )\
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sp += 0x100;\
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ram [0x100 + sp] = (uint8_t) (data);\
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--sp;\
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}
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#define POP( out )\
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{\
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out = *sp++;\
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if ( sp - ram == 0x201 )\
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{\
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out = sp [-0x101];\
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sp -= 0x100;\
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}\
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++sp;\
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out = ram [0x100 + sp];\
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}
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#endif
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#define MEM_BIT( rel ) CPU_mem_bit( pc, rel_time + rel )
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unsigned SNES_SPC::CPU_mem_bit( uint8_t const* pc, rel_time_t rel_time )
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unsigned SNES_SPC::CPU_mem_bit( uint16_t pc, rel_time_t rel_time )
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{
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unsigned addr = READ_PC16( pc );
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unsigned t = READ( 0, addr & 0x1FFF ) >> (addr >> 13);
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@ -163,11 +138,11 @@ int const nz_neg_mask = 0x880; // either bit set indicates N flag set
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SPC_CPU_RUN_FUNC
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{
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uint8_t* const ram = RAM;
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int a = m.cpu_regs.a;
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int x = m.cpu_regs.x;
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int y = m.cpu_regs.y;
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uint8_t const* pc;
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uint8_t* sp;
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uint8_t a = m.cpu_regs.a;
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uint8_t x = m.cpu_regs.x;
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uint8_t y = m.cpu_regs.y;
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uint16_t pc;
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uint8_t sp;
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int psw;
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int c;
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int nz;
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@ -183,7 +158,7 @@ SPC_CPU_RUN_FUNC
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// Main loop
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cbranch_taken_loop:
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pc += *(BOOST::int8_t const*) pc;
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pc += (int8_t) ram [pc];
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inc_pc_loop:
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pc++;
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loop:
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@ -195,7 +170,7 @@ loop:
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check( (unsigned) x < 0x100 );
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check( (unsigned) y < 0x100 );
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opcode = *pc;
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opcode = ram [pc];
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if (allow_time_overflow && rel_time >= 0 )
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goto stop;
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if ( (rel_time += m.cycle_table [opcode]) > 0 && !allow_time_overflow)
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@ -219,14 +194,9 @@ loop:
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PROFILE_TIMER_LOOP( 0xE4, pc [1], 2 );
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*/
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#ifdef DEBUGGER
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if (debug_trace)
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debug_do_trace(a, x, y, pc, sp, psw, c, nz, dp);
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#endif
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// TODO: if PC is at end of memory, this will get wrong operand (very obscure)
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data = *++pc;
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pc++;
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data = ram [pc];
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switch ( opcode )
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{
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@ -257,23 +227,12 @@ loop:
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}
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case 0x6F:// RET
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#if SPC_NO_SP_WRAPAROUND
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{
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SET_PC( GET_LE16( sp ) );
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sp += 2;
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uint8_t l, h;
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POP( l );
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POP( h );
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SET_PC( l | (h << 8) );
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}
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#else
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{
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int addr = sp - ram;
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SET_PC( GET_LE16( sp ) );
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sp += 2;
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if ( addr < 0x1FF )
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goto loop;
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SET_PC( sp [-0x101] * 0x100 + ram [(uint8_t) addr + 0x100] );
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sp -= 0x100;
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}
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#endif
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goto loop;
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case 0xE4: // MOV a,dp
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@ -493,7 +452,7 @@ loop:
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case 0xAF: // MOV (X)+,A
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WRITE_DP( 0, x, a + no_read_before_write );
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x++;
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x = (uint8_t) (x + 1);
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goto loop;
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// 5. 8-BIT LOGIC OPERATION COMMANDS
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@ -512,7 +471,7 @@ loop:
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case op + 0x01: /* dp,dp */\
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data = READ_DP( -3, data );\
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case op + 0x10:{/*dp,imm*/\
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uint8_t const* addr2 = pc + 1;\
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uint16_t addr2 = pc + 1;\
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pc += 2;\
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addr = READ_PC( addr2 ) + dp;\
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}\
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@ -816,7 +775,7 @@ loop:
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unsigned temp = y * a;
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a = (uint8_t) temp;
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nz = ((temp >> 1) | temp) & 0x7F;
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y = temp >> 8;
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y = (uint8_t) (temp >> 8);
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nz |= y;
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goto loop;
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}
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@ -846,6 +805,7 @@ loop:
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nz = (uint8_t) a;
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a = (uint8_t) a;
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y = (uint8_t) y;
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goto loop;
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}
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@ -1009,10 +969,12 @@ loop:
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{
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int temp;
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uint8_t l, h;
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case 0x7F: // RET1
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temp = *sp;
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SET_PC( GET_LE16( sp + 1 ) );
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sp += 3;
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POP (temp);
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POP (l);
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POP (h);
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SET_PC( l | (h << 8) );
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goto set_psw;
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case 0x8E: // POP PSW
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POP( temp );
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@ -1204,9 +1166,9 @@ loop:
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m.cpu_error = "SPC emulation error";
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goto stop;
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} // switch
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}
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}
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out_of_time:
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rel_time -= m.cycle_table [*pc]; // undo partial execution of opcode
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rel_time -= m.cycle_table [ ram [pc] ]; // undo partial execution of opcode
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stop:
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// Uncache registers
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