mirror of
https://github.com/dborth/snes9xgx.git
synced 2024-11-24 03:29:22 +01:00
Fixes from Snes9x 1.51+
- Fixed invalid memory accesses in C4 and OBC1. MMX3 Toxic Seahorse stage now can be emulated with HDMA. (zones) - Updated snapshot to prevent desync. Added some variables related to APU and HDMA. (gocha)
This commit is contained in:
parent
2fc796d4b1
commit
adf61aef32
@ -255,8 +255,8 @@ void S9xResetAPU ()
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IAPU.WaitAddress2 = NULL;
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IAPU.WaitCounter = 0;
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#endif
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IAPU.NextAPUTimerPos = 0;
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IAPU.APUTimerCounter = 0;
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APU.NextAPUTimerPos = 0;
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APU.APUTimerCounter = 0;
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APU.ShowROM = TRUE;
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IAPU.RAM [0xf1] = 0x80;
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@ -283,6 +283,9 @@ void S9xResetAPU ()
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S9xResetSound (TRUE);
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S9xSetEchoEnable (0);
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IAPU.OUTXNotifier = false;
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IAPU.ENVXNotifier = false;
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}
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void S9xSetAPUDSP (uint8 byte)
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@ -479,9 +482,9 @@ void S9xSetAPUDSP (uint8 byte)
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{
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APURegisters.PC = IAPU.PC - IAPU.RAM;
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S9xAPUPackStatus();
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#ifndef NGC
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#ifndef NGC
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S9xSPCDump (S9xGetFilenameInc((".spc"), SPC_DIR));
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#endif
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#endif
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spc_is_dumping = 0;
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}
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}
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@ -913,18 +916,18 @@ void S9xSetAPUTimer (uint16 Address, uint8 byte)
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void S9xAPUExecute (void)
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{
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while ((CPU.Cycles << SNES_APU_ACCURACY) >= IAPU.NextAPUTimerPos)
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while ((CPU.Cycles << SNES_APU_ACCURACY) >= APU.NextAPUTimerPos)
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{
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// catch up the APU timers
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if (IAPU.APUExecuting)
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{
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while (APU.Cycles < IAPU.NextAPUTimerPos)
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while (APU.Cycles < APU.NextAPUTimerPos)
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APU_EXECUTE1();
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}
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else
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APU.Cycles = IAPU.NextAPUTimerPos;
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APU.Cycles = APU.NextAPUTimerPos;
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IAPU.NextAPUTimerPos += SNES_APUTIMER2_CYCLE_SCALED;
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APU.NextAPUTimerPos += SNES_APUTIMER2_CYCLE_SCALED;
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if (APU.TimerEnabled [2])
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{
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@ -940,9 +943,9 @@ void S9xAPUExecute (void)
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}
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}
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if (++IAPU.APUTimerCounter == 8)
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if (++APU.APUTimerCounter == 8)
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{
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IAPU.APUTimerCounter = 0;
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APU.APUTimerCounter = 0;
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if (APU.TimerEnabled [0])
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{
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@ -992,8 +995,10 @@ uint8 S9xGetAPUDSP ()
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switch (reg)
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{
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case APU_KON:
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IAPU.KONNotifier = true;
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break;
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case APU_KOFF:
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IAPU.KOFFNotifier = true;
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break;
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case APU_OUTX + 0x00:
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@ -1004,16 +1009,20 @@ uint8 S9xGetAPUDSP ()
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case APU_OUTX + 0x50:
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case APU_OUTX + 0x60:
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case APU_OUTX + 0x70:
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if(Settings.FakeMuteFix)
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{
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// hack that is off by default: fixes Terranigma desync
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return (0);
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}
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else
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{
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if (SoundData.channels [reg >> 4].state == SOUND_SILENT)
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IAPU.OUTXNotifier = true;
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if(Settings.FakeMuteFix)
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{
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// hack that is off by default: fixes Terranigma desync
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return (0);
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return (int8) (SoundData.channels [reg >> 4].out_sample >> 8);
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}
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else
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{
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if (SoundData.channels [reg >> 4].state == SOUND_SILENT)
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return (0);
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return (int8) (SoundData.channels [reg >> 4].out_sample >> 8);
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}
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}
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case APU_ENVX + 0x00:
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@ -1024,9 +1033,14 @@ uint8 S9xGetAPUDSP ()
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case APU_ENVX + 0x50:
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case APU_ENVX + 0x60:
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case APU_ENVX + 0x70:
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{
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IAPU.ENVXNotifier = true;
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return (S9xGetEnvelopeHeight (reg >> 4));
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}
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case APU_ENDX:
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IAPU.ENDXNotifier = true;
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// To fix speech in Magical Drop 2 6/11/00
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// APU.DSP [APU_ENDX] = 0;
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break;
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@ -183,11 +183,14 @@ struct SIAPU
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uint8 _Zero;
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uint8 _Overflow;
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uint32 TimerErrorCounter;
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int32 NextAPUTimerPos;
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int32 APUTimerCounter;
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uint32 Scanline;
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int32 OneCycle;
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int32 TwoCycles;
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bool8 KONNotifier;
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bool8 KOFFNotifier;
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bool8 OUTXNotifier;
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bool8 ENVXNotifier;
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bool8 ENDXNotifier;
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};
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struct SAPU
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@ -204,6 +207,8 @@ struct SAPU
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bool8 TimerEnabled [3];
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bool8 TimerValueWritten [3];
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int32 Cycles;
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int32 NextAPUTimerPos;
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int32 APUTimerCounter;
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};
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EXTERN_C struct SAPU APU;
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@ -308,13 +308,18 @@ EXTERN_C void C4LoaDMem(char *C4RAM)
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}
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#endif
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uint8 *S9xGetBasePointerC4 (uint16 Address)
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uint8 * S9xGetBasePointerC4 (uint16 Address)
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{
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if((Address&~MEMMAP_MASK)>=(0x7f40&~MEMMAP_MASK) &&
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(Address&~MEMMAP_MASK)<=(0x7f5e&~MEMMAP_MASK)){
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return NULL;
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}
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return Memory.C4RAM-0x6000;
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if (Address >= 0x7f40 && Address <= 0x7f5e)
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return (NULL);
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return (Memory.C4RAM - 0x6000);
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}
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uint8 * S9xGetMemPointerC4 (uint16 Address)
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{
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if (Address >= 0x7f40 && Address <= 0x7f5e)
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return (NULL);
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return (Memory.C4RAM - 0x6000 + (Address & 0xffff));
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}
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}//end extern C
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@ -372,13 +372,13 @@ void S9xDoHEventProcessing (void)
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break;
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case HC_HDMA_START_EVENT:
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if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
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if (PPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
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{
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#ifdef DEBUGGER
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sprintf(mes, "*** HDMA HC:%04d, Channel:%02x", CPU.Cycles, IPPU.HDMA);
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sprintf(mes, "*** HDMA HC:%04d, Channel:%02x", CPU.Cycles, PPU.HDMA);
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S9xTraceMessage(mes);
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#endif
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IPPU.HDMA = S9xDoHDMA(IPPU.HDMA);
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PPU.HDMA = S9xDoHDMA(PPU.HDMA);
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}
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S9xCheckMissingHTimerPosition(Timings.HDMAStart);
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@ -403,7 +403,7 @@ void S9xDoHEventProcessing (void)
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#endif
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CPU.Cycles -= Timings.H_Max;
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IAPU.NextAPUTimerPos -= (Timings.H_Max << SNES_APU_ACCURACY);
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APU.NextAPUTimerPos -= (Timings.H_Max << SNES_APU_ACCURACY);
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APU.Cycles -= (Timings.H_Max << SNES_APU_ACCURACY);
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if ((Timings.NMITriggerPos != 0xffff) && (Timings.NMITriggerPos >= Timings.H_Max))
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@ -471,7 +471,7 @@ void S9xDoHEventProcessing (void)
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if (CPU.V_Counter == PPU.ScreenHeight + FIRST_VISIBLE_LINE) // VBlank starts from V=225(240).
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{
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S9xEndScreenRefresh();
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IPPU.HDMA = 0;
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PPU.HDMA = 0;
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// Bits 7 and 6 of $4212 are computed when read in S9xGetPPU.
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#ifdef DEBUGGER
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missing.dma_this_frame = 0;
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@ -1403,7 +1403,7 @@ static inline bool8 HDMAReadLineCount(int d){
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DMA[d].Repeat = FALSE;
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DMA[d].LineCount = 128;
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if(DMA[d].HDMAIndirectAddressing){
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if(IPPU.HDMA&(0xfe<<d)){
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if(PPU.HDMA&(0xfe<<d)){
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DMA[d].Address++;
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CPU.Cycles+=SLOW_ONE_CYCLE*2;
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} else {
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@ -1439,26 +1439,26 @@ static inline bool8 HDMAReadLineCount(int d){
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void S9xStartHDMA () {
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if (Settings.DisableHDMA)
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IPPU.HDMA = 0;
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PPU.HDMA = 0;
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else
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missing.hdma_this_frame = IPPU.HDMA = Memory.FillRAM [0x420c];
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missing.hdma_this_frame = PPU.HDMA = Memory.FillRAM [0x420c];
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IPPU.HDMAEnded = 0;
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PPU.HDMAEnded = 0;
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CPU.InHDMA = TRUE;
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CPU.InDMAorHDMA = TRUE;
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// XXX: Not quite right...
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if (IPPU.HDMA != 0) CPU.Cycles += Timings.DMACPUSync;
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if (PPU.HDMA != 0) CPU.Cycles += Timings.DMACPUSync;
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for (uint8 i = 0; i < 8; i++)
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{
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if (IPPU.HDMA & (1 << i))
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if (PPU.HDMA & (1 << i))
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{
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DMA [i].Address = DMA[i].AAddress;
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if (!HDMAReadLineCount(i)) {
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IPPU.HDMA &= ~(1<<i);
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IPPU.HDMAEnded |= (1<<i);
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PPU.HDMA &= ~(1<<i);
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PPU.HDMAEnded |= (1<<i);
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}
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} else {
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DMA[i].DoTransfer = FALSE;
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@ -1469,7 +1469,7 @@ void S9xStartHDMA () {
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CPU.InHDMA = FALSE;
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CPU.InDMAorHDMA = CPU.InDMA;
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CPU.HDMARanInDMA = CPU.InDMA ? IPPU.HDMA : 0;
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CPU.HDMARanInDMA = CPU.InDMA ? PPU.HDMA : 0;
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}
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#ifdef DEBUGGER
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@ -1734,7 +1734,7 @@ uint8 S9xDoHDMA (uint8 byte)
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if (!--p->LineCount) {
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if (!HDMAReadLineCount(d)) {
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byte &= ~mask;
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IPPU.HDMAEnded |= mask;
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PPU.HDMAEnded |= mask;
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p->DoTransfer = FALSE;
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continue;
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}
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@ -792,10 +792,10 @@ INLINE uint8 *GetBasePointer (uint32 Address)
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return (Memory.SRAM + (((Address & 0x7fff) - 0x6000 + ((Address & 0xf0000) >> 3)) & Memory.SRAMMask) - (Address&0xffff));
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case CMemory::MAP_C4:
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return S9xGetBasePointerC4(Address);
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return (S9xGetBasePointerC4(Address & 0xffff));
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case CMemory::MAP_OBC_RAM:
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return GetBasePointerOBC1(Address);
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return (S9xGetBasePointerOBC1(Address & 0xffff));
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case CMemory::MAP_DEBUG:
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#ifdef DEBUGGER
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@ -848,10 +848,10 @@ INLINE uint8 *S9xGetMemPointer (uint32 Address)
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return (Memory.SRAM + (((Address & 0x7fff) - 0x6000 + ((Address & 0xf0000) >> 3)) & Memory.SRAMMask));
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case CMemory::MAP_C4:
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return S9xGetBasePointerC4(Address) + (Address&0xffff);
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return (S9xGetMemPointerC4(Address & 0xffff));
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case CMemory::MAP_OBC_RAM:
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return GetMemPointerOBC1(Address);
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return (S9xGetMemPointerOBC1(Address & 0xffff));
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case CMemory::MAP_DEBUG:
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#ifdef DEBUGGER
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@ -930,11 +930,11 @@ INLINE void S9xSetPCBase (uint32 Address)
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return;
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case CMemory::MAP_C4:
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CPU.PCBase = S9xGetBasePointerC4(Address);
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CPU.PCBase = S9xGetBasePointerC4(Address & 0xffff);
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return;
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case CMemory::MAP_OBC_RAM:
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CPU.PCBase = GetBasePointerOBC1(Address);
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CPU.PCBase = S9xGetBasePointerOBC1(Address & 0xffff);
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return;
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case CMemory::MAP_BSX:
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@ -382,7 +382,6 @@ void S9xStartScreenRefresh(){
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IPPU.RenderedFramesCount = 0;
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IPPU.FrameCount = 0;
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}
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++IPPU.TotalEmulatedFrames;
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}
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void RenderLine(uint8 C) {
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@ -530,6 +529,7 @@ void S9xEndScreenRefresh() {
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}
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}
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}
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++IPPU.TotalEmulatedFrames;
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}
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@ -331,7 +331,7 @@ inline uint16 COLOR_SUB(uint16, uint16);
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inline uint16 COLOR_SUB(uint16 C1, uint16 C2)
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{
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uint16 mC1, mC2, v = 0;
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uint16 mC1, mC2, v = ALPHA_BITS_MASK;
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mC1 = C1 & FIRST_COLOR_MASK;
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mC2 = C2 & FIRST_COLOR_MASK;
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@ -173,9 +173,7 @@
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#include "fxemu.h"
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#include "gfx.h"
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#include "soundux.h"
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#include "cheats.h"
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#include "sa1.h"
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#include "bsx.h"
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#include "spc7110.h"
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@ -204,8 +202,6 @@ struct SAPURegisters APURegisters;
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struct SSettings Settings;
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struct SDSP1 DSP1;
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struct SSA1Registers SA1Registers;
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struct SSA1 SA1;
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@ -216,10 +212,6 @@ struct SMulti Multi;
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SSoundData SoundData;
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SnesModel M1SNES={1,3,2};
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SnesModel M2SNES={2,4,3};
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SnesModel* Model=&M1SNES;
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#if defined(ZSNES_FX) || defined(ZSNES_C4)
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uint8 *ROM = NULL;
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uint8 *SRAM = NULL;
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@ -235,6 +227,12 @@ unsigned char OpenBus = 0;
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END_EXTERN_C
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struct SDSP1 DSP1;
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SnesModel M1SNES={1,3,2};
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SnesModel M2SNES={2,4,3};
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SnesModel* Model=&M1SNES;
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#ifndef ZSNES_FX
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struct FxInit_s SuperFX;
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#else
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@ -292,7 +290,6 @@ uint32 current_graphic_format = RGB565;
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#endif
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uint8 GetBank = 0;
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struct SCheatData Cheat;
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volatile SoundStatus so;
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@ -1996,25 +1996,6 @@ void CMemory::InitROM (void)
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else
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Settings.PAL = FALSE;
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//// Initialize emulation
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Timings.H_Max_Master = SNES_CYCLES_PER_SCANLINE;
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Timings.H_Max = Timings.H_Max_Master;
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Timings.HBlankStart = SNES_HBLANK_START_HC;
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Timings.HBlankEnd = SNES_HBLANK_END_HC;
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Timings.HDMAInit = SNES_HDMA_INIT_HC;
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Timings.HDMAStart = SNES_HDMA_START_HC;
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Timings.RenderPos = SNES_RENDER_START_HC;
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Timings.V_Max_Master = Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER;
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Timings.V_Max = Timings.V_Max_Master;
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/* From byuu: The total delay time for both the initial (H)DMA sync (to the DMA clock),
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and the end (H)DMA sync (back to the last CPU cycle's mcycle rate (6, 8, or 12)) always takes between 12-24 mcycles.
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Possible delays: { 12, 14, 16, 18, 20, 22, 24 }
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XXX: Snes9x can't emulate this timing :( so let's use the average value... */
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Timings.DMACPUSync = 18;
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if (Settings.PAL)
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{
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Settings.FrameTime = Settings.FrameTimePAL;
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@ -2057,6 +2038,23 @@ void CMemory::InitROM (void)
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SET_UI_COLOR(0, 128, 255);
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}
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//// Initialize emulation
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Timings.H_Max_Master = SNES_CYCLES_PER_SCANLINE;
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Timings.H_Max = Timings.H_Max_Master;
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Timings.HBlankStart = SNES_HBLANK_START_HC;
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Timings.HBlankEnd = SNES_HBLANK_END_HC;
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Timings.HDMAInit = SNES_HDMA_INIT_HC;
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Timings.HDMAStart = SNES_HDMA_START_HC;
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Timings.RenderPos = SNES_RENDER_START_HC;
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Timings.V_Max_Master = Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER;
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Timings.V_Max = Timings.V_Max_Master;
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/* From byuu: The total delay time for both the initial (H)DMA sync (to the DMA clock),
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and the end (H)DMA sync (back to the last CPU cycle's mcycle rate (6, 8, or 12)) always takes between 12-24 mcycles.
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Possible delays: { 12, 14, 16, 18, 20, 22, 24 }
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XXX: Snes9x can't emulate this timing :( so let's use the average value... */
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Timings.DMACPUSync = 18;
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IAPU.OneCycle = SNES_APU_ONE_CYCLE_SCALED;
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CPU.FastROMSpeed = 0;
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||||
|
@ -252,20 +252,18 @@ void SetOBC1 (uint8 Byte, uint16 Address)
|
||||
OBC1_RAM[Address & 0x1fff] = Byte;
|
||||
}
|
||||
|
||||
uint8 *GetBasePointerOBC1(uint32 Address)
|
||||
uint8 * S9xGetBasePointerOBC1 (uint16 Address)
|
||||
{
|
||||
Address=Address&0xffff;
|
||||
if((Address&~MEMMAP_MASK)>=(0x7ff0&~MEMMAP_MASK) &&
|
||||
(Address&~MEMMAP_MASK)<=(0x7ff6&~MEMMAP_MASK)) return NULL;
|
||||
return OBC1_RAM + (Address & 0x1fff);
|
||||
if (Address >= 0x7ff0 && Address <= 0x7ff6)
|
||||
return (NULL);
|
||||
return (OBC1_RAM - 0x6000);
|
||||
}
|
||||
|
||||
uint8 *GetMemPointerOBC1(uint32 Address)
|
||||
uint8 * S9xGetMemPointerOBC1 (uint16 Address)
|
||||
{
|
||||
Address=Address&0xffff;
|
||||
if((Address&~MEMMAP_MASK)>=(0x7ff0&~MEMMAP_MASK) &&
|
||||
(Address&~MEMMAP_MASK)<=(0x7ff6&~MEMMAP_MASK)) return NULL;
|
||||
return OBC1_RAM + (Address & 0x1fff);
|
||||
if (Address >= 0x7ff0 && Address <= 0x7ff6)
|
||||
return (NULL);
|
||||
return (OBC1_RAM - 0x6000 + (Address & 0xffff));
|
||||
}
|
||||
|
||||
void ResetOBC1()
|
||||
|
@ -167,8 +167,8 @@
|
||||
START_EXTERN_C
|
||||
uint8 GetOBC1 (uint16 Address);
|
||||
void SetOBC1 (uint8 Byte, uint16 Address);
|
||||
uint8 *GetBasePointerOBC1(uint32 Address);
|
||||
uint8 *GetMemPointerOBC1(uint32 Address);
|
||||
uint8 * S9xGetBasePointerOBC1 (uint16);
|
||||
uint8 * S9xGetMemPointerOBC1 (uint16);
|
||||
void ResetOBC1();//bool8 full);
|
||||
END_EXTERN_C
|
||||
|
||||
|
@ -261,8 +261,6 @@ typedef unsigned long long uint64;
|
||||
# include <systypes.h>
|
||||
# else
|
||||
|
||||
#define SNES_JOY_READ_CALLBACKS
|
||||
|
||||
typedef unsigned char uint8;
|
||||
typedef unsigned short uint16;
|
||||
typedef signed char int8;
|
||||
@ -276,6 +274,16 @@ typedef long int32;
|
||||
# define RIGHTSHIFT_IS_SAR
|
||||
# endif
|
||||
|
||||
# if defined(_MSC_VER) && (_MSC_VER == 1400) /* VC8.0 */
|
||||
/* temporary solution for fatal error C1063 (cl.exe 14.00.50727.762) */
|
||||
# ifdef RIGHTSHIFT_IS_SAR
|
||||
# undef RIGHTSHIFT_IS_SAR
|
||||
# endif /* RIGHTSHIFT_IS_SAR */
|
||||
# define RIGHTSHIFT_INT8_IS_SAR
|
||||
# define RIGHTSHIFT_INT16_IS_SAR
|
||||
# define RIGHTSHIFT_INT32_IS_SAR
|
||||
# endif /* VC8.0 */
|
||||
|
||||
typedef unsigned int uint32;
|
||||
|
||||
# endif /* __BORLANDC__ */
|
||||
@ -335,9 +343,15 @@ void _splitpath (const char *path, char *drive, char *dir, char *fname,
|
||||
#else /* __WIN32__ */
|
||||
#define strcasecmp stricmp
|
||||
#define strncasecmp strnicmp
|
||||
|
||||
#define SNES_JOY_READ_CALLBACKS
|
||||
|
||||
#endif
|
||||
|
||||
EXTERN_C void S9xGenerateSound ();
|
||||
#ifdef __WIN32__
|
||||
EXTERN_C void S9xGenerateFrameSound ();
|
||||
#endif
|
||||
|
||||
#ifdef STORM
|
||||
EXTERN_C int soundsignal;
|
||||
|
@ -2088,10 +2088,10 @@ void S9xSetCPU (uint8 byte, uint16 Address)
|
||||
if (Settings.DisableHDMA)
|
||||
byte = 0;
|
||||
Memory.FillRAM[0x420c] = byte;
|
||||
//printf("$%02x is written to $420c at HC:%d, V:%d, IPPU.HDMA:$%02x, IPPU.HDMAEnded:$%02x\n", byte, CPU.Cycles, CPU.V_Counter, IPPU.HDMA, IPPU.HDMAEnded);
|
||||
//printf("$%02x is written to $420c at HC:%d, V:%d, PPU.HDMA:$%02x, PPU.HDMAEnded:$%02x\n", byte, CPU.Cycles, CPU.V_Counter, PPU.HDMA, PPU.HDMAEnded);
|
||||
// FIXME
|
||||
// Yoshi's Island / Genjyu Ryodan, Mortal Kombat, Tales of Phantasia
|
||||
IPPU.HDMA = byte&~IPPU.HDMAEnded;
|
||||
PPU.HDMA = byte&~PPU.HDMAEnded;
|
||||
break;
|
||||
|
||||
case 0x420d:
|
||||
@ -2306,7 +2306,7 @@ void S9xSetCPU (uint8 byte, uint16 Address)
|
||||
DMA[d].LineCount = 128;
|
||||
DMA[d].Repeat = !!(byte & 0x80);
|
||||
}
|
||||
//printf("$%02x is written to $43%da at HC:%d, V:%d, IPPU.HDMA:$%02x, IPPU.HDMAEnded:$%02x\n", byte, d, CPU.Cycles, CPU.V_Counter, IPPU.HDMA, IPPU.HDMAEnded);
|
||||
//printf("$%02x is written to $43%da at HC:%d, V:%d, PPU.HDMA:$%02x, PPU.HDMAEnded:$%02x\n", byte, d, CPU.Cycles, CPU.V_Counter, PPU.HDMA, PPU.HDMAEnded);
|
||||
return;
|
||||
|
||||
case 0x430B:
|
||||
@ -2422,11 +2422,14 @@ uint8 S9xGetCPU (uint16 Address)
|
||||
|
||||
if (Address < 0x4200)
|
||||
{
|
||||
#ifdef SNES_JOY_READ_CALLBACKS
|
||||
extern bool8 pad_read;
|
||||
if(Address==0x4016 || Address==0x4017)
|
||||
S9xOnSNESPadRead(), pad_read = true;
|
||||
{
|
||||
extern bool8 pad_read;
|
||||
#ifdef SNES_JOY_READ_CALLBACKS
|
||||
S9xOnSNESPadRead();
|
||||
#endif
|
||||
pad_read = true;
|
||||
}
|
||||
|
||||
CPU.Cycles += ONE_CYCLE;
|
||||
switch (Address)
|
||||
@ -2516,13 +2519,14 @@ uint8 S9xGetCPU (uint16 Address)
|
||||
case 0x421d:
|
||||
case 0x421e:
|
||||
case 0x421f:
|
||||
#ifdef SNES_JOY_READ_CALLBACKS
|
||||
{
|
||||
extern bool8 pad_read;
|
||||
if(Memory.FillRAM[0x4200] & 1)
|
||||
S9xOnSNESPadRead(), pad_read = true;
|
||||
}
|
||||
{
|
||||
extern bool8 pad_read;
|
||||
#ifdef SNES_JOY_READ_CALLBACKS
|
||||
S9xOnSNESPadRead();
|
||||
#endif
|
||||
pad_read = true;
|
||||
}
|
||||
// Joypads 1-4 button and direction state.
|
||||
return (Memory.FillRAM [Address]);
|
||||
|
||||
@ -2824,8 +2828,8 @@ void S9xSoftResetPPU ()
|
||||
PPU.Need16x8Mulitply = FALSE;
|
||||
|
||||
IPPU.ColorsChanged = TRUE;
|
||||
IPPU.HDMA = 0;
|
||||
IPPU.HDMAEnded = 0;
|
||||
PPU.HDMA = 0;
|
||||
PPU.HDMAEnded = 0;
|
||||
IPPU.MaxBrightness = 0;
|
||||
IPPU.LatchedBlanking = 0;
|
||||
IPPU.OBJChanged = TRUE;
|
||||
|
@ -196,8 +196,6 @@ struct ClipData {
|
||||
|
||||
struct InternalPPU {
|
||||
bool8 ColorsChanged;
|
||||
uint8 HDMA;
|
||||
uint8 HDMAEnded;
|
||||
uint8 MaxBrightness;
|
||||
bool8 LatchedBlanking;
|
||||
bool8 OBJChanged;
|
||||
@ -344,6 +342,9 @@ struct SPPU {
|
||||
uint16 GunVLatch;
|
||||
uint16 GunHLatch;
|
||||
short VTimerPosition;
|
||||
|
||||
uint8 HDMA;
|
||||
uint8 HDMAEnded;
|
||||
};
|
||||
|
||||
#define CLIP_OR 0
|
||||
@ -407,7 +408,8 @@ void S9xSetC4 (uint8 Byte, uint16 Address);
|
||||
uint8 S9xGetC4 (uint16 Address);
|
||||
void S9xSetC4RAM (uint8 Byte, uint16 Address);
|
||||
uint8 S9xGetC4RAM (uint16 Address);
|
||||
uint8 *S9xGetBasePointerC4 (uint16 Address);
|
||||
uint8 * S9xGetBasePointerC4 (uint16);
|
||||
uint8 * S9xGetMemPointerC4 (uint16);
|
||||
|
||||
void S9xUpdateHVTimerPosition (void);
|
||||
void S9xCheckMissingHTimerPosition (int32);
|
||||
|
@ -231,7 +231,7 @@ void S9xResetSaveTimer(bool8 dontsave){
|
||||
static time_t t=-1;
|
||||
|
||||
if(!dontsave && t!=-1 && time(NULL)-t>300){{
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
char def [PATH_MAX];
|
||||
char filename [PATH_MAX];
|
||||
char drive [_MAX_DRIVE];
|
||||
@ -298,7 +298,7 @@ struct SnapshotMovieInfo
|
||||
#undef STRUCT
|
||||
#define STRUCT struct SnapshotMovieInfo
|
||||
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
static FreezeData SnapMovie [] = {
|
||||
INT_ENTRY(1, MovieInputDataSize),
|
||||
};
|
||||
@ -499,6 +499,9 @@ static FreezeData SnapPPU [] = {
|
||||
INT_ENTRY(3, GunVLatch),
|
||||
INT_ENTRY(3, GunHLatch),
|
||||
INT_ENTRY(2, VTimerPosition),
|
||||
|
||||
INT_ENTRY(5, HDMA),
|
||||
INT_ENTRY(5, HDMAEnded),
|
||||
};
|
||||
|
||||
#undef STRUCT
|
||||
@ -545,6 +548,8 @@ static FreezeData SnapAPU [] = {
|
||||
ARRAY_ENTRY(1, TimerEnabled, 3, uint8_ARRAY_V),
|
||||
ARRAY_ENTRY(1, TimerValueWritten, 3, uint8_ARRAY_V),
|
||||
INT_ENTRY(4, Cycles),
|
||||
INT_ENTRY(5, NextAPUTimerPos),
|
||||
INT_ENTRY(5, APUTimerCounter),
|
||||
};
|
||||
|
||||
#undef STRUCT
|
||||
@ -936,10 +941,6 @@ void UnfreezeStructFromCopy (void *base, FreezeData *fields, int num_fields, uin
|
||||
|
||||
int UnfreezeBlockCopy (STREAM stream, char *name, uint8** block, int size);
|
||||
|
||||
void S9xCloseSnapshotFile (FILE *stream)
|
||||
{
|
||||
fclose(stream);
|
||||
}
|
||||
bool8 Snapshot (const char *filename)
|
||||
{
|
||||
return (S9xFreezeGame (filename));
|
||||
@ -956,8 +957,9 @@ bool8 S9xFreezeGame (const char *filename)
|
||||
S9xPrepareSoundForSnapshotSave (FALSE);
|
||||
|
||||
S9xFreezeToStream (stream);
|
||||
#ifndef NGC
|
||||
S9xCloseSnapshotFile (stream);
|
||||
|
||||
#endif
|
||||
S9xPrepareSoundForSnapshotSave (TRUE);
|
||||
|
||||
S9xResetSaveTimer (TRUE);
|
||||
@ -1043,7 +1045,9 @@ bool8 S9xUnfreezeGame (const char *filename)
|
||||
S9xMessage (S9X_ERROR, S9X_ROM_NOT_FOUND, String);
|
||||
break;
|
||||
}
|
||||
#ifndef NGC
|
||||
S9xCloseSnapshotFile (snapshot);
|
||||
#endif
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
@ -1254,7 +1258,7 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
|
||||
int version;
|
||||
int len = strlen (SNAPSHOT_MAGIC) + 1 + 4 + 1;
|
||||
#ifdef NGC
|
||||
#ifdef NGC
|
||||
GetMem(buffer, len);
|
||||
#else
|
||||
if (READ_STREAM (buffer, len, stream) != len)
|
||||
@ -1270,7 +1274,7 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
|
||||
unfreezing_from_stream = true;
|
||||
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
if (strcasecmp (rom_filename, Memory.ROMFilename) != 0 &&
|
||||
strcasecmp (S9xBasename (rom_filename), S9xBasename (Memory.ROMFilename)) != 0)
|
||||
{
|
||||
@ -1359,7 +1363,7 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
if (Settings.BS)
|
||||
break;
|
||||
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
// movie
|
||||
{
|
||||
SnapshotMovieInfo mi;
|
||||
@ -1408,7 +1412,7 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
UnfreezeStructCopy (stream, "IPU", &local_dummy[0], SnapIPPU, COUNT(SnapIPPU), version); // obsolete
|
||||
UnfreezeStructCopy (stream, "GFX", &local_dummy[1], SnapGFX, COUNT(SnapGFX), version); // obsolete
|
||||
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
UnfreezeStructCopy (stream, "SHO", &local_screenshot, SnapScreenshot, COUNT(SnapScreenshot), version);
|
||||
#endif
|
||||
result=SUCCESS;
|
||||
@ -1512,7 +1516,7 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
GSU.pfRpix = fx_apfPlotTable[GSU.vMode + 5];
|
||||
}
|
||||
#endif
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
if(GFX.Screen)
|
||||
if(local_screenshot)
|
||||
{
|
||||
@ -1658,8 +1662,13 @@ int S9xUnfreezeFromStream (STREAM stream)
|
||||
if (Settings.SDD1)
|
||||
S9xSDD1PostLoadState ();
|
||||
|
||||
IAPU.NextAPUTimerPos = (CPU.Cycles << SNES_APU_ACCURACY);
|
||||
IAPU.APUTimerCounter = 0;
|
||||
if (version < 5)
|
||||
{
|
||||
// This is not correct, it causes desyncs frequently.
|
||||
// So they have been stored in a snapshot since ver.5.
|
||||
APU.NextAPUTimerPos = (CPU.Cycles << SNES_APU_ACCURACY);
|
||||
APU.APUTimerCounter = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (local_cpu) delete [] local_cpu;
|
||||
@ -1857,7 +1866,7 @@ void FreezeStruct (STREAM stream, char *name, void *base, FreezeData *fields,
|
||||
}
|
||||
}
|
||||
//fprintf(stderr, "%s: Wrote %d bytes\n", name, ptr-block);
|
||||
#ifndef NGC
|
||||
#ifndef NGC
|
||||
FreezeBlock (stream, name, block, len);
|
||||
#else
|
||||
NGCFreezeBlock(name, block, len);
|
||||
@ -1891,18 +1900,18 @@ void FreezeBlock (STREAM stream, char *name, uint8 *block, int size)
|
||||
void NGCFreezeStruct()
|
||||
{
|
||||
STREAM s = NULL;
|
||||
|
||||
|
||||
FreezeStruct (s,"CPU", &CPU, SnapCPU, COUNT (SnapCPU));
|
||||
FreezeStruct (s,"REG", &Registers, SnapRegisters, COUNT (SnapRegisters));
|
||||
FreezeStruct (s,"PPU", &PPU, SnapPPU, COUNT (SnapPPU));
|
||||
FreezeStruct (s,"DMA", DMA, SnapDMA, COUNT (SnapDMA));
|
||||
|
||||
|
||||
// RAM and VRAM
|
||||
NGCFreezeBlock ("VRA", Memory.VRAM, 0x10000);
|
||||
NGCFreezeBlock ("RAM", Memory.RAM, 0x20000);
|
||||
NGCFreezeBlock ("SRA", Memory.SRAM, 0x20000);
|
||||
NGCFreezeBlock ("FIL", Memory.FillRAM, 0x8000);
|
||||
|
||||
|
||||
if (Settings.APUEnabled)
|
||||
{
|
||||
// APU
|
||||
@ -1918,7 +1927,7 @@ void NGCFreezeStruct()
|
||||
struct SControlSnapshot ctl_snap;
|
||||
S9xControlPreSave(&ctl_snap);
|
||||
FreezeStruct (s,"CTL", &ctl_snap, SnapControls, COUNT (SnapControls));
|
||||
|
||||
|
||||
// Timings
|
||||
FreezeStruct (s,"TIM", &Timings, SnapTimings, COUNT (SnapTimings));
|
||||
|
||||
@ -1927,7 +1936,7 @@ void NGCFreezeStruct()
|
||||
{
|
||||
S9xSA1PackStatus ();
|
||||
FreezeStruct (s,"SA1", &SA1, SnapSA1, COUNT (SnapSA1));
|
||||
FreezeStruct (s,"SAR", &SA1Registers, SnapSA1Registers,
|
||||
FreezeStruct (s,"SAR", &SA1Registers, SnapSA1Registers,
|
||||
COUNT (SnapSA1Registers));
|
||||
}
|
||||
|
||||
|
@ -167,7 +167,7 @@
|
||||
#include "snes9x.h"
|
||||
|
||||
#define SNAPSHOT_MAGIC "#!snes9x"
|
||||
#define SNAPSHOT_VERSION 4
|
||||
#define SNAPSHOT_VERSION 5
|
||||
|
||||
#define SUCCESS 1
|
||||
#define WRONG_FORMAT (-1)
|
||||
|
Loading…
Reference in New Issue
Block a user