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https://github.com/dborth/snes9xgx.git
synced 2024-12-25 02:31:50 +01:00
Added SA-1 NMI and fixed its override mode. (zones)
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63e1f9c391
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@ -400,7 +400,7 @@ void S9xDoHEventProcessing (void)
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if (PPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
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{
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#ifdef DEBUGGER
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S9xTraceFormattedMessage("*** HDMA HC:%04d, Channel:%02x", CPU.Cycles, PPU.HDMA);
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S9xTraceFormattedMessage("*** HDMA Transfer HC:%04d, Channel:%02x", CPU.Cycles, PPU.HDMA);
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#endif
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PPU.HDMA = S9xDoHDMA(PPU.HDMA);
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}
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@ -595,3 +595,4 @@ void S9xDoHEventProcessing (void)
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eventname[CPU.WhichEvent], CPU.NextEvent, CPU.Cycles);
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#endif
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}
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@ -2857,7 +2857,11 @@ void S9xOpcode_IRQ (void)
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{
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#ifdef DEBUGGER
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if (CPU.Flags & TRACE_FLAG)
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#ifdef SA1_OPCODES
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S9xTraceMessage("*** SA1 IRQ");
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#else
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S9xTraceMessage("*** IRQ");
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#endif
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#endif
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// IRQ and NMI do an opcode fetch as their first "IO" cycle.
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@ -2928,7 +2932,11 @@ void S9xOpcode_NMI (void)
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{
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#ifdef DEBUGGER
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if (CPU.Flags & TRACE_FLAG)
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#ifdef SA1_OPCODES
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S9xTraceMessage("*** SA1 NMI");
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#else
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S9xTraceMessage("*** NMI");
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#endif
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#endif
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// IRQ and NMI do an opcode fetch as their first "IO" cycle.
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@ -2949,7 +2957,7 @@ void S9xOpcode_NMI (void)
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AddCycles(2 * SLOW_ONE_CYCLE);
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S9xSA1SetPCBase(Memory.FillRAM[0x2205] | (Memory.FillRAM[0x2206] << 8));
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#else
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if (Settings.SA1 && (Memory.FillRAM[0x2209] & 0x20))
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if (Settings.SA1 && (Memory.FillRAM[0x2209] & 0x10))
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{
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OpenBus = Memory.FillRAM[0x220d];
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AddCycles(2 * SLOW_ONE_CYCLE);
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@ -4016,3 +4024,4 @@ struct SOpcodes S9xOpcodesSlow[256] =
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{ OpFASlow }, { OpFB }, { OpFCSlow }, { OpFDSlow }, { OpFESlow },
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{ OpFFSlow }
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};
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@ -361,7 +361,7 @@ uint8 S9xGetSA1 (uint32 address)
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}
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default:
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printf("R: %04x\n", address);
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//printf("R: %04x\n", address);
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break;
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}
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@ -393,12 +393,10 @@ void S9xSetSA1 (uint8 byte, uint32 address)
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if (byte & 0x10)
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{
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Memory.FillRAM[0x2301] |= 0x10;
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#ifdef DEBUGGER
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printf("###SA1 NMI\n");
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#endif
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if (Memory.FillRAM[0x220a] & 0x10)
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{
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//
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SA1.Flags |= NMI_FLAG;
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SA1.Executing = !SA1.Waiting && SA1.S9xOpcodes;
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}
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}
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@ -487,9 +485,8 @@ void S9xSetSA1 (uint8 byte, uint32 address)
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if (((byte ^ Memory.FillRAM[0x220a]) & 0x10) && (Memory.FillRAM[0x2301] & byte & 0x10))
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{
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#ifdef DEBUGGER
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printf("###SA1 NMI\n");
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#endif
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SA1.Flags |= NMI_FLAG;
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//SA1.Executing = !SA1.Waiting;
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}
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break;
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@ -513,7 +510,7 @@ void S9xSetSA1 (uint8 byte, uint32 address)
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Memory.FillRAM[0x2301] &= ~0x20;
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}
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if (byte & 0x10) // Clear NMI
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if (byte & 0x10)
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Memory.FillRAM[0x2301] &= ~0x10;
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if (!SA1.IRQActive)
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@ -1136,3 +1133,4 @@ void S9xSA1SetPCBase (uint32 address)
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return;
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}
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}
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@ -229,10 +229,13 @@
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void S9xSA1MainLoop (void)
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{
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#if 0
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if (SA1.Flags & NMI_FLAG)
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{
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if (Memory.FillRAM[0x2200] & 0x10)
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{
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SA1.Flags &= ~NMI_FLAG;
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Memory.FillRAM[0x2301] |= 0x10;
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if (SA1.WaitingForInterrupt)
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{
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SA1.WaitingForInterrupt = FALSE;
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@ -241,7 +244,7 @@ void S9xSA1MainLoop (void)
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S9xSA1Opcode_NMI();
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}
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#endif
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}
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if (SA1.Flags & IRQ_FLAG)
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{
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@ -297,3 +300,4 @@ void S9xSA1MainLoop (void)
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(*Opcodes[Op].S9xOpcode)();
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}
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}
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