The-Homebrew-Cloud/snes9xgx
2
0
Fork 0
mirror of https://github.com/dborth/snes9xgx.git synced 2024-11-23 19:19:22 +01:00
Code Issues Packages Projects Releases Wiki Activity

revert recent APU changes. they would randomly compile "wrong" - out <=

Browse Source 
&m.extra_buf [extra_size] assert would trigger
This commit is contained in:
Daryl Borth 2018-08-22 10:35:43 -06:00
parent f69cd5baee
commit e67a58812b
8 changed files with 115 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
source/snes9x/apu/SNES_SPC.cpp
View File

@ -391,22 +391,25 @@ void SNES_SPC::cpu_write_smp_reg( int data, rel_time_t time, uint16_t addr )
cpu_write_smp_reg_( data, time, addr ); cpu_write_smp_reg_( data, time, addr );
} }
void SNES_SPC::cpu_write_high( int data, uint8_t i ) void SNES_SPC::cpu_write_high( int data, int i, rel_time_t time )
{ {
m.hi_ram [i] = (uint8_t) data; m.hi_ram [i] = (uint8_t) data;
if ( m.rom_enabled ) if ( m.rom_enabled )
RAM [i + rom_addr] = m.rom [i]; // restore overwritten ROM RAM [i + rom_addr] = m.rom [i]; // restore overwritten ROM
} }
int const bits_in_int = CHAR_BIT * sizeof (int);
void SNES_SPC::cpu_write( int data, uint16_t addr, rel_time_t time ) void SNES_SPC::cpu_write( int data, uint16_t addr, rel_time_t time )
{ {
MEM_ACCESS( time, addr ) MEM_ACCESS( time, addr )
// RAM // RAM
RAM [addr] = (uint8_t) data; RAM [addr] = (uint8_t) data;
if ( addr >= 0xF0 ) // 64% int reg = addr - 0xF0;
if ( reg >= 0 ) // 64%
{ {
const uint16_t reg = addr - 0xF0;
// $F0-$FF // $F0-$FF
if ( reg < reg_count ) // 87% if ( reg < reg_count ) // 87%
{ {
@ -420,12 +423,18 @@ void SNES_SPC::cpu_write( int data, uint16_t addr, rel_time_t time )
#endif #endif
// Registers other than $F2 and $F4-$F7 // Registers other than $F2 and $F4-$F7
if ( reg != 2 && (reg < 4 || reg > 7) ) // 36% //if ( reg != 2 && reg != 4 && reg != 5 && reg != 6 && reg != 7 )
// TODO: this is a bit on the fragile side
if ( ((~0x2F00 << (bits_in_int - 16)) << reg) < 0 ) // 36%
cpu_write_smp_reg( data, time, reg ); cpu_write_smp_reg( data, time, reg );
} }
// High mem/address wrap-around // High mem/address wrap-around
else if ( addr >= rom_addr ) // 1% in IPL ROM area or address wrapped around else
cpu_write_high( data, addr - rom_addr ); {
reg -= rom_addr - 0xF0;
if ( reg >= 0 ) // 1% in IPL ROM area or address wrapped around
cpu_write_high( data, reg, time );
}
} }
} }
@ -490,7 +499,7 @@ int SNES_SPC::cpu_read( uint16_t addr, rel_time_t time )
// Prefix and suffix for CPU emulator function // Prefix and suffix for CPU emulator function
#define SPC_CPU_RUN_FUNC \ #define SPC_CPU_RUN_FUNC \
uint8_t* SNES_SPC::run_until_( time_t end_time )\ BOOST::uint8_t* SNES_SPC::run_until_( time_t end_time )\
{\ {\
rel_time_t rel_time = m.spc_time - end_time;\ rel_time_t rel_time = m.spc_time - end_time;\
/*assert( rel_time <= 0 );*/\ /*assert( rel_time <= 0 );*/\

18
source/snes9x/apu/SNES_SPC.h
View File

@ -10,13 +10,15 @@
#include "blargg_endian.h" #include "blargg_endian.h"
#ifdef DEBUGGER #ifdef DEBUGGER
#include "../snes9x.h" #include "snes9x.h"
#include "../display.h" #include "display.h"
#include "../debug.h" #include "debug.h"
#endif #endif
struct SNES_SPC { struct SNES_SPC {
public: public:
typedef BOOST::uint8_t uint8_t;
// Must be called once before using // Must be called once before using
blargg_err_t init(); blargg_err_t init();
@ -65,6 +67,10 @@ public:
enum { voice_count = 8 }; enum { voice_count = 8 };
void mute_voices( int mask ); void mute_voices( int mask );
// If true, prevents channels and global volumes from being phase-negated.
// Only supported by fast DSP.
void disable_surround( bool disable = true );
// Sets tempo, where tempo_unit = normal, tempo_unit / 2 = half speed, etc. // Sets tempo, where tempo_unit = normal, tempo_unit / 2 = half speed, etc.
enum { tempo_unit = 0x100 }; enum { tempo_unit = 0x100 };
void set_tempo( int ); void set_tempo( int );
@ -129,6 +135,8 @@ public:
public: public:
BLARGG_DISABLE_NOTHROW BLARGG_DISABLE_NOTHROW
typedef BOOST::uint16_t uint16_t;
// Time relative to m_spc_time. Speeds up code a bit by eliminating need to // Time relative to m_spc_time. Speeds up code a bit by eliminating need to
// constantly add m_spc_time to time from CPU. CPU uses time that ends at // constantly add m_spc_time to time from CPU. CPU uses time that ends at
// 0 to eliminate reloading end time every instruction. It pays off. // 0 to eliminate reloading end time every instruction. It pays off.
@ -238,7 +246,7 @@ private:
void dsp_write ( int data, rel_time_t ); void dsp_write ( int data, rel_time_t );
void cpu_write_smp_reg_( int data, rel_time_t, uint16_t addr ); void cpu_write_smp_reg_( int data, rel_time_t, uint16_t addr );
void cpu_write_smp_reg ( int data, rel_time_t, uint16_t addr ); void cpu_write_smp_reg ( int data, rel_time_t, uint16_t addr );
void cpu_write_high ( int data, uint8_t i ); void cpu_write_high ( int data, int i, rel_time_t );
void cpu_write ( int data, uint16_t addr, rel_time_t ); void cpu_write ( int data, uint16_t addr, rel_time_t );
int cpu_read_smp_reg ( int i, rel_time_t ); int cpu_read_smp_reg ( int i, rel_time_t );
int cpu_read ( uint16_t addr, rel_time_t ); int cpu_read ( uint16_t addr, rel_time_t );
@ -292,6 +300,8 @@ inline void SNES_SPC::write_port( time_t t, int port, int data )
} }
inline void SNES_SPC::mute_voices( int mask ) { dsp.mute_voices( mask ); } inline void SNES_SPC::mute_voices( int mask ) { dsp.mute_voices( mask ); }
inline void SNES_SPC::disable_surround( bool disable ) { dsp.disable_surround( disable ); }
#if !SPC_NO_COPY_STATE_FUNCS #if !SPC_NO_COPY_STATE_FUNCS
inline bool SNES_SPC::check_kon() { return dsp.check_kon(); } inline bool SNES_SPC::check_kon() { return dsp.check_kon(); }

2
source/snes9x/apu/SNES_SPC_misc.cpp
View File

@ -409,7 +409,7 @@ void SNES_SPC::dsp_set_stereo_switch( int value )
dsp.set_stereo_switch( value ); dsp.set_stereo_switch( value );
} }
uint8_t SNES_SPC::dsp_reg_value( int ch, int addr ) SNES_SPC::uint8_t SNES_SPC::dsp_reg_value( int ch, int addr )
{ {
return dsp.reg_value( ch, addr ); return dsp.reg_value( ch, addr );
} }

18
source/snes9x/apu/SPC_CPU.h
View File

@ -66,7 +66,7 @@ Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#define READ_DP( time, addr ) READ ( time, DP_ADDR( addr ) ) #define READ_DP( time, addr ) READ ( time, DP_ADDR( addr ) )
#define WRITE_DP( time, addr, data ) WRITE( time, DP_ADDR( addr ), data ) #define WRITE_DP( time, addr, data ) WRITE( time, DP_ADDR( addr ), data )
#define READ_PROG16( addr ) (RAM [(addr) & 0xffff] | (RAM [((addr) + 1) & 0xffff] << 8)) #define READ_PROG16( addr ) (RAM [addr & 0xffff] | (RAM [(addr + 1) & 0xffff] << 8))
#define SET_PC( n ) (pc = n) #define SET_PC( n ) (pc = n)
#define GET_PC() (pc) #define GET_PC() (pc)
@ -205,10 +205,10 @@ loop:
#define BRANCH( cond )\ #define BRANCH( cond )\
{\ {\
pc++;\ pc++;\
pc += (int8_t) data;\ pc += (BOOST::int8_t) data;\
if ( cond )\ if ( cond )\
goto loop;\ goto loop;\
pc -= (int8_t) data;\ pc -= (BOOST::int8_t) data;\
rel_time -= 2;\ rel_time -= 2;\
goto loop;\ goto loop;\
} }
@ -261,7 +261,8 @@ loop:
REGS [i] = (uint8_t) data; REGS [i] = (uint8_t) data;
// Registers other than $F2 and $F4-$F7 // Registers other than $F2 and $F4-$F7
if ( i != 2 && (i < 4 || i > 7)) // 12% //if ( i != 2 && i != 4 && i != 5 && i != 6 && i != 7 )
if ( ((~0x2F00 << (bits_in_int - 16)) << i) < 0 ) // 12%
cpu_write_smp_reg( data, rel_time, i ); cpu_write_smp_reg( data, rel_time, i );
} }
} }
@ -844,7 +845,7 @@ loop:
// 12. BRANCHING COMMANDS // 12. BRANCHING COMMANDS
case 0x2F: // BRA rel case 0x2F: // BRA rel
pc += (int8_t) data; pc += (BOOST::int8_t) data;
goto inc_pc_loop; goto inc_pc_loop;
case 0x30: // BMI case 0x30: // BMI
@ -1148,8 +1149,11 @@ loop:
case 0xFF:{// STOP case 0xFF:{// STOP
// handle PC wrap-around // handle PC wrap-around
if ( pc == 0x0000 ) unsigned addr = GET_PC() - 1;
if ( addr >= 0x10000 )
{ {
addr &= 0xFFFF;
SET_PC( addr );
dprintf( "SPC: PC wrapped around\n" ); dprintf( "SPC: PC wrapped around\n" );
goto loop; goto loop;
} }
@ -1168,6 +1172,8 @@ out_of_time:
stop: stop:
// Uncache registers // Uncache registers
if ( GET_PC() >= 0x10000 )
dprintf( "SPC: PC wrapped around\n" );
m.cpu_regs.pc = (uint16_t) GET_PC(); m.cpu_regs.pc = (uint16_t) GET_PC();
m.cpu_regs.sp = ( uint8_t) GET_SP(); m.cpu_regs.sp = ( uint8_t) GET_SP();
m.cpu_regs.a = ( uint8_t) a; m.cpu_regs.a = ( uint8_t) a;

8
source/snes9x/apu/SPC_DSP.cpp
View File

@ -27,11 +27,11 @@ Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#endif #endif
// TODO: add to blargg_endian.h // TODO: add to blargg_endian.h
#define GET_LE16SA( addr ) ((int16_t) GET_LE16( addr )) #define GET_LE16SA( addr ) ((BOOST::int16_t) GET_LE16( addr ))
#define GET_LE16A( addr ) GET_LE16( addr ) #define GET_LE16A( addr ) GET_LE16( addr )
#define SET_LE16A( addr, data ) SET_LE16( addr, data ) #define SET_LE16A( addr, data ) SET_LE16( addr, data )
static uint8_t const initial_regs [SPC_DSP::register_count] = static BOOST::uint8_t const initial_regs [SPC_DSP::register_count] =
{ {
0x45,0x8B,0x5A,0x9A,0xE4,0x82,0x1B,0x78,0x00,0x00,0xAA,0x96,0x89,0x0E,0xE0,0x80, 0x45,0x8B,0x5A,0x9A,0xE4,0x82,0x1B,0x78,0x00,0x00,0xAA,0x96,0x89,0x0E,0xE0,0x80,
0x2A,0x49,0x3D,0xBA,0x14,0xA0,0xAC,0xC5,0x00,0x00,0x51,0xBB,0x9C,0x4E,0x7B,0xFF, 0x2A,0x49,0x3D,0xBA,0x14,0xA0,0xAC,0xC5,0x00,0x00,0x51,0xBB,0x9C,0x4E,0x7B,0xFF,
@ -906,7 +906,7 @@ void SPC_State_Copier::copy( void* state, size_t size )
int SPC_State_Copier::copy_int( int state, int size ) int SPC_State_Copier::copy_int( int state, int size )
{ {
uint8_t s [2]; BOOST::uint8_t s [2];
SET_LE16( s, state ); SET_LE16( s, state );
func( buf, &s, size ); func( buf, &s, size );
return GET_LE16( s ); return GET_LE16( s );
@ -1057,7 +1057,7 @@ void SPC_DSP::set_stereo_switch( int value )
stereo_switch = value; stereo_switch = value;
} }
uint8_t SPC_DSP::reg_value( int ch, int addr ) SPC_DSP::uint8_t SPC_DSP::reg_value( int ch, int addr )
{ {
return m.voices[ch].regs[addr]; return m.voices[ch].regs[addr];
} }

9
source/snes9x/apu/SPC_DSP.h
View File

@ -10,6 +10,8 @@ extern "C" { typedef void (*dsp_copy_func_t)( unsigned char** io, void* state, s
class SPC_DSP { class SPC_DSP {
public: public:
typedef BOOST::uint8_t uint8_t;
// Setup // Setup
// Initializes DSP and has it use the 64K RAM provided // Initializes DSP and has it use the 64K RAM provided
@ -109,6 +111,9 @@ public:
public: public:
BLARGG_DISABLE_NOTHROW BLARGG_DISABLE_NOTHROW
typedef BOOST::int8_t int8_t;
typedef BOOST::int16_t int16_t;
enum { echo_hist_size = 8 }; enum { echo_hist_size = 8 };
enum env_mode_t { env_release, env_attack, env_decay, env_sustain }; enum env_mode_t { env_release, env_attack, env_decay, env_sustain };
@ -305,8 +310,8 @@ public:
#define SPC_COPY( type, state )\ #define SPC_COPY( type, state )\
{\ {\
state = (type) copier.copy_int( state, sizeof (type) );\ state = (BOOST::type) copier.copy_int( state, sizeof (BOOST::type) );\
assert( (type) state == state );\ assert( (BOOST::type) state == state );\
} }
#endif #endif

46
source/snes9x/apu/blargg_common.h
View File

@ -134,8 +134,52 @@ public:
typedef unsigned blargg_ulong; typedef unsigned blargg_ulong;
#endif #endif
// BOOST::int8_t etc.
// HAVE_STDINT_H: If defined, use <stdint.h> for int8_t etc. // HAVE_STDINT_H: If defined, use <stdint.h> for int8_t etc.
#include <stdint.h> #if defined (HAVE_STDINT_H)
#include <stdint.h>
#define BOOST
// HAVE_INTTYPES_H: If defined, use <stdint.h> for int8_t etc.
#elif defined (HAVE_INTTYPES_H)
#include <inttypes.h>
#define BOOST
#else
struct BOOST
{
#if UCHAR_MAX == 0xFF && SCHAR_MAX == 0x7F
typedef signed char int8_t;
typedef unsigned char uint8_t;
#else
// No suitable 8-bit type available
typedef struct see_blargg_common_h int8_t;
typedef struct see_blargg_common_h uint8_t;
#endif
#if USHRT_MAX == 0xFFFF
typedef short int16_t;
typedef unsigned short uint16_t;
#else
// No suitable 16-bit type available
typedef struct see_blargg_common_h int16_t;
typedef struct see_blargg_common_h uint16_t;
#endif
#if ULONG_MAX == 0xFFFFFFFF
typedef long int32_t;
typedef unsigned long uint32_t;
#elif UINT_MAX == 0xFFFFFFFF
typedef int int32_t;
typedef unsigned int uint32_t;
#else
// No suitable 32-bit type available
typedef struct see_blargg_common_h int32_t;
typedef struct see_blargg_common_h uint32_t;
#endif
};
#endif
#endif #endif
#endif #endif

32
source/snes9x/apu/blargg_endian.h
View File

@ -122,15 +122,15 @@ inline void set_be32( void* p, blargg_ulong n )
#if BLARGG_NONPORTABLE #if BLARGG_NONPORTABLE
// Optimized implementation if byte order is known // Optimized implementation if byte order is known
#if BLARGG_LITTLE_ENDIAN #if BLARGG_LITTLE_ENDIAN
#define GET_LE16( addr ) (*(uint16_t*) (addr)) #define GET_LE16( addr ) (*(BOOST::uint16_t*) (addr))
#define GET_LE32( addr ) (*(uint32_t*) (addr)) #define GET_LE32( addr ) (*(BOOST::uint32_t*) (addr))
#define SET_LE16( addr, data ) (void) (*(uint16_t*) (addr) = (data)) #define SET_LE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
#define SET_LE32( addr, data ) (void) (*(uint32_t*) (addr) = (data)) #define SET_LE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
#elif BLARGG_BIG_ENDIAN #elif BLARGG_BIG_ENDIAN
#define GET_BE16( addr ) (*(uint16_t*) (addr)) #define GET_BE16( addr ) (*(BOOST::uint16_t*) (addr))
#define GET_BE32( addr ) (*(uint32_t*) (addr)) #define GET_BE32( addr ) (*(BOOST::uint32_t*) (addr))
#define SET_BE16( addr, data ) (void) (*(uint16_t*) (addr) = (data)) #define SET_BE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
#define SET_BE32( addr, data ) (void) (*(uint32_t*) (addr) = (data)) #define SET_BE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
#if BLARGG_CPU_POWERPC #if BLARGG_CPU_POWERPC
// PowerPC has special byte-reversed instructions // PowerPC has special byte-reversed instructions
@ -171,13 +171,13 @@ inline void set_be32( void* p, blargg_ulong n )
// auto-selecting versions // auto-selecting versions
inline void set_le( uint16_t* p, unsigned n ) { SET_LE16( p, n ); } inline void set_le( BOOST::uint16_t* p, unsigned n ) { SET_LE16( p, n ); }
inline void set_le( uint32_t* p, blargg_ulong n ) { SET_LE32( p, n ); } inline void set_le( BOOST::uint32_t* p, blargg_ulong n ) { SET_LE32( p, n ); }
inline void set_be( uint16_t* p, unsigned n ) { SET_BE16( p, n ); } inline void set_be( BOOST::uint16_t* p, unsigned n ) { SET_BE16( p, n ); }
inline void set_be( uint32_t* p, blargg_ulong n ) { SET_BE32( p, n ); } inline void set_be( BOOST::uint32_t* p, blargg_ulong n ) { SET_BE32( p, n ); }
inline unsigned get_le( uint16_t* p ) { return GET_LE16( p ); } inline unsigned get_le( BOOST::uint16_t* p ) { return GET_LE16( p ); }
inline blargg_ulong get_le( uint32_t* p ) { return GET_LE32( p ); } inline blargg_ulong get_le( BOOST::uint32_t* p ) { return GET_LE32( p ); }
inline unsigned get_be( uint16_t* p ) { return GET_BE16( p ); } inline unsigned get_be( BOOST::uint16_t* p ) { return GET_BE16( p ); }
inline blargg_ulong get_be( uint32_t* p ) { return GET_BE32( p ); } inline blargg_ulong get_be( BOOST::uint32_t* p ) { return GET_BE32( p ); }
#endif #endif