mirror of
https://github.com/dborth/snes9xgx.git
synced 2024-12-27 03:31:50 +01:00
1642 lines
62 KiB
C++
1642 lines
62 KiB
C++
/**********************************************************************************
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Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
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Jerremy Koot (jkoot@snes9x.com)
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(c) Copyright 2002 - 2004 Matthew Kendora
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(c) Copyright 2002 - 2005 Peter Bortas (peter@bortas.org)
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(c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/)
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(c) Copyright 2001 - 2006 John Weidman (jweidman@slip.net)
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(c) Copyright 2002 - 2006 Brad Jorsch (anomie@users.sourceforge.net),
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funkyass (funkyass@spam.shaw.ca),
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Kris Bleakley (codeviolation@hotmail.com),
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Nach (n-a-c-h@users.sourceforge.net), and
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zones (kasumitokoduck@yahoo.com)
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BS-X C emulator code
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(c) Copyright 2005 - 2006 Dreamer Nom,
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zones
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C4 x86 assembler and some C emulation code
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(c) Copyright 2000 - 2003 _Demo_ (_demo_@zsnes.com),
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Nach,
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zsKnight (zsknight@zsnes.com)
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C4 C++ code
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(c) Copyright 2003 - 2006 Brad Jorsch,
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Nach
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DSP-1 emulator code
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(c) Copyright 1998 - 2006 _Demo_,
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Andreas Naive (andreasnaive@gmail.com)
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Gary Henderson,
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Ivar (ivar@snes9x.com),
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John Weidman,
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Kris Bleakley,
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Matthew Kendora,
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Nach,
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neviksti (neviksti@hotmail.com)
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DSP-2 emulator code
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(c) Copyright 2003 John Weidman,
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Kris Bleakley,
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Lord Nightmare (lord_nightmare@users.sourceforge.net),
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Matthew Kendora,
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neviksti
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DSP-3 emulator code
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(c) Copyright 2003 - 2006 John Weidman,
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Kris Bleakley,
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Lancer,
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z80 gaiden
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DSP-4 emulator code
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(c) Copyright 2004 - 2006 Dreamer Nom,
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John Weidman,
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Kris Bleakley,
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Nach,
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z80 gaiden
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OBC1 emulator code
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(c) Copyright 2001 - 2004 zsKnight,
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pagefault (pagefault@zsnes.com),
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Kris Bleakley,
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Ported from x86 assembler to C by sanmaiwashi
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SPC7110 and RTC C++ emulator code
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(c) Copyright 2002 Matthew Kendora with research by
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zsKnight,
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John Weidman,
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Dark Force
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S-DD1 C emulator code
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(c) Copyright 2003 Brad Jorsch with research by
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Andreas Naive,
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John Weidman
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S-RTC C emulator code
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(c) Copyright 2001-2006 byuu,
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John Weidman
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ST010 C++ emulator code
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(c) Copyright 2003 Feather,
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John Weidman,
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Kris Bleakley,
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Matthew Kendora
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Super FX x86 assembler emulator code
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(c) Copyright 1998 - 2003 _Demo_,
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pagefault,
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zsKnight,
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Super FX C emulator code
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(c) Copyright 1997 - 1999 Ivar,
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Gary Henderson,
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John Weidman
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Sound DSP emulator code is derived from SNEeSe and OpenSPC:
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(c) Copyright 1998 - 2003 Brad Martin
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(c) Copyright 1998 - 2006 Charles Bilyue'
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SH assembler code partly based on x86 assembler code
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(c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
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2xSaI filter
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(c) Copyright 1999 - 2001 Derek Liauw Kie Fa
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HQ2x filter
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(c) Copyright 2003 Maxim Stepin (maxim@hiend3d.com)
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Specific ports contains the works of other authors. See headers in
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individual files.
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Snes9x homepage: http://www.snes9x.com
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Permission to use, copy, modify and/or distribute Snes9x in both binary
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and source form, for non-commercial purposes, is hereby granted without
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fee, providing that this license information and copyright notice appear
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with all copies and any derived work.
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This software is provided 'as-is', without any express or implied
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warranty. In no event shall the authors be held liable for any damages
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arising from the use of this software or it's derivatives.
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Snes9x is freeware for PERSONAL USE only. Commercial users should
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seek permission of the copyright holders first. Commercial use includes,
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but is not limited to, charging money for Snes9x or software derived from
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Snes9x, including Snes9x or derivatives in commercial game bundles, and/or
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using Snes9x as a promotion for your commercial product.
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The copyright holders request that bug fixes and improvements to the code
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should be forwarded to them so everyone can benefit from the modifications
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in future versions.
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Super NES and Super Nintendo Entertainment System are trademarks of
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Nintendo Co., Limited and its subsidiary companies.
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**********************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#include "snes9x.h"
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#include "memmap.h"
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#include "ppu.h"
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#include "cpuexec.h"
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#include "missing.h"
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#include "dma.h"
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#include "apu.h"
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#include "gfx.h"
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#include "sa1.h"
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#include "spc7110.h"
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#ifdef SDD1_DECOMP
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#include "sdd1emu.h"
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#endif
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#ifdef SDD1_DECOMP
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uint8 buffer[0x10000];
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#endif
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extern int HDMA_ModeByteCounts [8];
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extern uint8 *HDMAMemPointers [8];
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#if defined(__linux__) || defined(__WIN32__) || defined(__MACOSX__)
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static int S9xCompareSDD1IndexEntries (const void *p1, const void *p2)
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{
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return (*(uint32 *) p1 - *(uint32 *) p2);
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}
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#endif
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static inline void S9xTrySyncAPUInDMA (void)
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{
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#ifdef SPC700_C
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S9xUpdateAPUTimer();
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APU_EXECUTE();
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#endif
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}
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/**********************************************************************************************/
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/* S9xDoDMA() */
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/* This function preforms the general dma transfer */
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/**********************************************************************************************/
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void S9xDoDMA (uint8 Channel)
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{
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uint8 Work;
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if (Channel > 7 || CPU.InDMA)
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return;
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CPU.InDMA = TRUE;
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bool8 in_sa1_dma = FALSE;
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uint8 *in_sdd1_dma = NULL;
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uint8 *spc7110_dma=NULL;
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bool s7_wrap=false;
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SDMA *d = &DMA[Channel];
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int32 count = d->TransferBytes;
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if (count == 0)
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count = 0x10000;
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int inc = d->AAddressFixed ? 0 : (!d->AAddressDecrement ? 1 : -1);
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if((d->ABank==0x7E || d->ABank==0x7F) && d->BAddress==0x80 && !d->TransferDirection)
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{
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d->AAddress+= d->TransferBytes;
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//does an invalid DMA actually take time?
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// I'd say yes, since 'invalid' is probably just the WRAM chip
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// not being able to read and write itself at the same time
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// And no, PPU.WRAM should not be updated.
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CPU.Cycles+=(d->TransferBytes+1)*SLOW_ONE_CYCLE;
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S9xTrySyncAPUInDMA();
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#ifdef DEBUGGER
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if (Settings.TraceDMA)
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{
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sprintf (String, "DMA[%d]: %s Mode: %d 0x%02X%04X->0x21%02X Bytes: %d (%s) V-Line:%ld -- ABORT WRAM Bank%02X->$2180",
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Channel, d->TransferDirection ? "read" : "write",
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d->TransferMode, d->ABank, d->AAddress,
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d->BAddress, d->TransferBytes,
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d->AAddressFixed ? "fixed" :
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(d->AAddressDecrement ? "dec" : "inc"),
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CPU.V_Counter, d->ABank);
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S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
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}
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#endif
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goto update_address;
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}
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switch (d->BAddress)
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{
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case 0x18:
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case 0x19:
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if (IPPU.RenderThisFrame)
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FLUSH_REDRAW ();
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break;
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}
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if (Settings.SDD1)
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{
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if (d->AAddressFixed && Memory.FillRAM [0x4801] > 0)
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{
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// XXX: Should probably verify that we're DMAing from ROM? And
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// somewhere we should make sure we're not running across a mapping
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// boundary too.
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// Hacky support for pre-decompressed S-DD1 data
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inc = !d->AAddressDecrement ? 1 : -1;
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uint32 address = (((d->ABank << 16) | d->AAddress) & 0xfffff) << 4;
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address |= Memory.FillRAM [0x4804 + ((d->ABank - 0xc0) >> 4)];
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#ifdef SDD1_DECOMP
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if(Settings.SDD1Pack)
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{
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uint8* in_ptr=GetBasePointer(((d->ABank << 16) | d->AAddress));
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if(in_ptr){
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in_ptr+=d->AAddress;
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SDD1_decompress(buffer,in_ptr,d->TransferBytes);
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} else {
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sprintf(String, "S-DD1 DMA from non-block address $%02X:%04X", d->ABank, d->AAddress);
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S9xMessage(S9X_WARNING, S9X_DMA_TRACE, String);
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}
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in_sdd1_dma=buffer;
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#ifdef SDD1_VERIFY
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void *ptr = bsearch (&address, Memory.SDD1Index,
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Memory.SDD1Entries, 12, S9xCompareSDD1IndexEntries);
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if(memcmp(buffer, ptr, d->TransferBytes))
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{
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uint8 *p = Memory.SDD1LoggedData;
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bool8 found = FALSE;
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uint8 SDD1Bank = Memory.FillRAM [0x4804 + ((d->ABank - 0xc0) >> 4)] | 0xf0;
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for (uint32 i = 0; i < Memory.SDD1LoggedDataCount; i++, p += 8)
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{
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if (*p == d->ABank ||
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*(p + 1) == (d->AAddress >> 8) &&
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*(p + 2) == (d->AAddress & 0xff) &&
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*(p + 3) == (count >> 8) &&
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*(p + 4) == (count & 0xff) &&
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*(p + 7) == SDD1Bank)
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{
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found = TRUE;
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}
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}
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if (!found && Memory.SDD1LoggedDataCount < MEMMAP_MAX_SDD1_LOGGED_ENTRIES)
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{
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int j=0;
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while(ptr[j]==buffer[j])
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j++;
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*p = d->ABank;
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*(p + 1) = d->AAddress >> 8;
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*(p + 2) = d->AAddress & 0xff;
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*(p + 3) = j&0xFF;
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*(p + 4) = (j>>8)&0xFF;
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*(p + 7) = SDD1Bank;
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Memory.SDD1LoggedDataCount += 1;
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}
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}
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#endif
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}
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else
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{
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#endif
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#if defined(__linux__) || defined(__WIN32__) || defined(__MACOSX__)
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void *ptr = bsearch (&address, Memory.SDD1Index,
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Memory.SDD1Entries, 12, S9xCompareSDD1IndexEntries);
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if (ptr)
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in_sdd1_dma = *(uint32 *) ((uint8 *) ptr + 4) + Memory.SDD1Data;
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#else
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uint8 *ptr = Memory.SDD1Index;
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for (uint32 e = 0; e < Memory.SDD1Entries; e++, ptr += 12)
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{
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if (address == *(uint32 *) ptr)
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{
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in_sdd1_dma = *(uint32 *) (ptr + 4) + Memory.SDD1Data;
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break;
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}
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}
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#endif
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if (!in_sdd1_dma)
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{
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// No matching decompressed data found. Must be some new
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// graphics not encountered before. Log it if it hasn't been
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// already.
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uint8 *p = Memory.SDD1LoggedData;
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bool8 found = FALSE;
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uint8 SDD1Bank = Memory.FillRAM [0x4804 + ((d->ABank - 0xc0) >> 4)] | 0xf0;
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for (uint32 i = 0; i < Memory.SDD1LoggedDataCount; i++, p += 8)
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{
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if (*p == d->ABank ||
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*(p + 1) == (d->AAddress >> 8) &&
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*(p + 2) == (d->AAddress & 0xff) &&
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*(p + 3) == (count >> 8) &&
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*(p + 4) == (count & 0xff) &&
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*(p + 7) == SDD1Bank)
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{
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found = TRUE;
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break;
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}
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}
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if (!found && Memory.SDD1LoggedDataCount < MEMMAP_MAX_SDD1_LOGGED_ENTRIES)
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{
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*p = d->ABank;
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*(p + 1) = d->AAddress >> 8;
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*(p + 2) = d->AAddress & 0xff;
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*(p + 3) = count >> 8;
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*(p + 4) = count & 0xff;
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*(p + 7) = SDD1Bank;
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Memory.SDD1LoggedDataCount += 1;
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}
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}
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}
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#ifdef SDD1_DECOMP
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}
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#endif
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Memory.FillRAM [0x4801] = 0;
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}
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if(Settings.SPC7110&&(d->AAddress==0x4800||d->ABank==0x50))
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{
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uint32 i,j;
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i=(s7r.reg4805|(s7r.reg4806<<8));
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#ifdef SPC7110_DEBUG
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printf("DMA Transfer of %04X bytes from %02X%02X%02X:%02X, offset of %04X, internal bank of %04X, multiplier %02X\n",d->TransferBytes,s7r.reg4803,s7r.reg4802,s7r.reg4801, s7r.reg4804,i, s7r.bank50Internal, s7r.AlignBy);
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#endif
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i*=s7r.AlignBy;
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i+=s7r.bank50Internal;
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i%=DECOMP_BUFFER_SIZE;
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j=0;
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if((i+d->TransferBytes)<DECOMP_BUFFER_SIZE)
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{
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spc7110_dma=&s7r.bank50[i];
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}
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else
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{
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spc7110_dma=new uint8[d->TransferBytes];
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j=DECOMP_BUFFER_SIZE-i;
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memcpy(spc7110_dma, &s7r.bank50[i], j);
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memcpy(&spc7110_dma[j],s7r.bank50,d->TransferBytes-j);
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s7_wrap=true;
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}
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int icount=s7r.reg4809|(s7r.reg480A<<8);
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icount-=d->TransferBytes;
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s7r.reg4809=0x00ff&icount;
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s7r.reg480A=(0xff00&icount)>>8;
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s7r.bank50Internal+=d->TransferBytes;
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s7r.bank50Internal%=DECOMP_BUFFER_SIZE;
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inc=1;
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d->AAddress-=count;
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}
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if (d->BAddress == 0x18 && SA1.in_char_dma && (d->ABank & 0xf0) == 0x40)
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{
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// Perform packed bitmap to PPU character format conversion on the
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// data before transmitting it to V-RAM via-DMA.
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int num_chars = 1 << ((Memory.FillRAM [0x2231] >> 2) & 7);
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int depth = (Memory.FillRAM [0x2231] & 3) == 0 ? 8 :
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(Memory.FillRAM [0x2231] & 3) == 1 ? 4 : 2;
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int bytes_per_char = 8 * depth;
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int bytes_per_line = depth * num_chars;
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int char_line_bytes = bytes_per_char * num_chars;
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uint32 addr = (d->AAddress / char_line_bytes) * char_line_bytes;
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uint8 *base = GetBasePointer ((d->ABank << 16) + addr);
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if(!base){
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sprintf(String, "SA-1 DMA from non-block address $%02X:%04X", d->ABank, addr);
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S9xMessage(S9X_WARNING, S9X_DMA_TRACE, String);
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base=Memory.ROM;
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}
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base+=addr;
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uint8 *buffer = &Memory.ROM [CMemory::MAX_ROM_SIZE - 0x10000];
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uint8 *p = buffer;
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uint32 inc = char_line_bytes - (d->AAddress % char_line_bytes);
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uint32 char_count = inc / bytes_per_char;
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in_sa1_dma = TRUE;
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//printf ("%08x,", base); fflush (stdout);
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//printf ("depth = %d, count = %d, bytes_per_char = %d, bytes_per_line = %d, num_chars = %d, char_line_bytes = %d\n",
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//depth, count, bytes_per_char, bytes_per_line, num_chars, char_line_bytes);
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int i;
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switch (depth)
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{
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case 2:
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for (i = 0; i < count; i += inc, base += char_line_bytes,
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inc = char_line_bytes, char_count = num_chars)
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{
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uint8 *line = base + (num_chars - char_count) * 2;
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for (uint32 j = 0; j < char_count && p - buffer < count;
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j++, line += 2)
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{
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uint8 *q = line;
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for (int l = 0; l < 8; l++, q += bytes_per_line)
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{
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for (int b = 0; b < 2; b++)
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{
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uint8 r = *(q + b);
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*(p + 0) = (*(p + 0) << 1) | ((r >> 0) & 1);
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*(p + 1) = (*(p + 1) << 1) | ((r >> 1) & 1);
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*(p + 0) = (*(p + 0) << 1) | ((r >> 2) & 1);
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*(p + 1) = (*(p + 1) << 1) | ((r >> 3) & 1);
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*(p + 0) = (*(p + 0) << 1) | ((r >> 4) & 1);
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*(p + 1) = (*(p + 1) << 1) | ((r >> 5) & 1);
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*(p + 0) = (*(p + 0) << 1) | ((r >> 6) & 1);
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*(p + 1) = (*(p + 1) << 1) | ((r >> 7) & 1);
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}
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p += 2;
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}
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}
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}
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break;
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case 4:
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for (i = 0; i < count; i += inc, base += char_line_bytes,
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inc = char_line_bytes, char_count = num_chars)
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{
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uint8 *line = base + (num_chars - char_count) * 4;
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for (uint32 j = 0; j < char_count && p - buffer < count;
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j++, line += 4)
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{
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uint8 *q = line;
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for (int l = 0; l < 8; l++, q += bytes_per_line)
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{
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for (int b = 0; b < 4; b++)
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{
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uint8 r = *(q + b);
|
|
*(p + 0) = (*(p + 0) << 1) | ((r >> 0) & 1);
|
|
*(p + 1) = (*(p + 1) << 1) | ((r >> 1) & 1);
|
|
*(p + 16) = (*(p + 16) << 1) | ((r >> 2) & 1);
|
|
*(p + 17) = (*(p + 17) << 1) | ((r >> 3) & 1);
|
|
*(p + 0) = (*(p + 0) << 1) | ((r >> 4) & 1);
|
|
*(p + 1) = (*(p + 1) << 1) | ((r >> 5) & 1);
|
|
*(p + 16) = (*(p + 16) << 1) | ((r >> 6) & 1);
|
|
*(p + 17) = (*(p + 17) << 1) | ((r >> 7) & 1);
|
|
}
|
|
p += 2;
|
|
}
|
|
p += 32 - 16;
|
|
}
|
|
}
|
|
break;
|
|
case 8:
|
|
for (i = 0; i < count; i += inc, base += char_line_bytes,
|
|
inc = char_line_bytes, char_count = num_chars)
|
|
{
|
|
uint8 *line = base + (num_chars - char_count) * 8;
|
|
for (uint32 j = 0; j < char_count && p - buffer < count;
|
|
j++, line += 8)
|
|
{
|
|
uint8 *q = line;
|
|
for (int l = 0; l < 8; l++, q += bytes_per_line)
|
|
{
|
|
for (int b = 0; b < 8; b++)
|
|
{
|
|
uint8 r = *(q + b);
|
|
*(p + 0) = (*(p + 0) << 1) | ((r >> 0) & 1);
|
|
*(p + 1) = (*(p + 1) << 1) | ((r >> 1) & 1);
|
|
*(p + 16) = (*(p + 16) << 1) | ((r >> 2) & 1);
|
|
*(p + 17) = (*(p + 17) << 1) | ((r >> 3) & 1);
|
|
*(p + 32) = (*(p + 32) << 1) | ((r >> 4) & 1);
|
|
*(p + 33) = (*(p + 33) << 1) | ((r >> 5) & 1);
|
|
*(p + 48) = (*(p + 48) << 1) | ((r >> 6) & 1);
|
|
*(p + 49) = (*(p + 49) << 1) | ((r >> 7) & 1);
|
|
}
|
|
p += 2;
|
|
}
|
|
p += 64 - 16;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
#ifdef DEBUGGER
|
|
if (Settings.TraceDMA)
|
|
{
|
|
sprintf (String, "DMA[%d]: %s Mode: %d 0x%02X%04X->0x21%02X Bytes: %d (%s) V-Line:%ld",
|
|
Channel, d->TransferDirection ? "read" : "write",
|
|
d->TransferMode, d->ABank, d->AAddress,
|
|
d->BAddress, d->TransferBytes,
|
|
d->AAddressFixed ? "fixed" :
|
|
(d->AAddressDecrement ? "dec" : "inc"),
|
|
CPU.V_Counter);
|
|
if (d->BAddress == 0x18 || d->BAddress == 0x19 || d->BAddress == 0x39 || d->BAddress == 0x3a)
|
|
sprintf (String, "%s VRAM: %04X (%d,%d) %s", String,
|
|
PPU.VMA.Address,
|
|
PPU.VMA.Increment, PPU.VMA.FullGraphicCount,
|
|
PPU.VMA.High ? "word" : "byte");
|
|
|
|
else
|
|
if (d->BAddress == 0x22 || d->BAddress == 0x3b)
|
|
|
|
sprintf (String, "%s CGRAM: %02X (%x)", String, PPU.CGADD,
|
|
PPU.CGFLIP);
|
|
else
|
|
if (d->BAddress == 0x04 || d->BAddress == 0x38)
|
|
sprintf (String, "%s OBJADDR: %04X", String, PPU.OAMAddr);
|
|
S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
|
|
}
|
|
#endif
|
|
|
|
if (!d->TransferDirection)
|
|
{
|
|
//reflects extra cycle used by DMA
|
|
CPU.Cycles += SLOW_ONE_CYCLE * (count+1);
|
|
S9xTrySyncAPUInDMA();
|
|
|
|
uint8 *base = GetBasePointer((d->ABank << 16) + d->AAddress);
|
|
uint16 p = d->AAddress;
|
|
int rem = count;
|
|
int b = 0;
|
|
count = d->AAddressFixed ? rem : (d->AAddressDecrement ? ((p&MEMMAP_MASK)+1) : (MEMMAP_BLOCK_SIZE-(p&MEMMAP_MASK)));
|
|
bool8 inWRAM_DMA = FALSE;
|
|
|
|
if (in_sa1_dma)
|
|
{
|
|
base = &Memory.ROM [CMemory::MAX_ROM_SIZE - 0x10000];
|
|
p = 0;
|
|
count = rem;
|
|
}
|
|
|
|
if (in_sdd1_dma)
|
|
{
|
|
base = in_sdd1_dma;
|
|
p = 0;
|
|
count = rem;
|
|
}
|
|
|
|
if (spc7110_dma)
|
|
{
|
|
base = spc7110_dma;
|
|
p = 0;
|
|
count = rem;
|
|
}
|
|
|
|
inWRAM_DMA = ((!in_sa1_dma && !in_sdd1_dma && !spc7110_dma) &&
|
|
(d->ABank == 0x7e || d->ABank == 0x7f || (!(d->ABank & 0x40) && d->AAddress < 0x2000)));
|
|
|
|
while(1){
|
|
if(count>rem) count=rem;
|
|
rem -= count;
|
|
if (inc > 0)
|
|
d->AAddress += count;
|
|
else if (inc < 0)
|
|
d->AAddress -= count;
|
|
//CPU.InWRAM_DMA = (base>=Memory.RAM && base<Memory.RAM+0x20000);
|
|
CPU.InWRAM_DMA = inWRAM_DMA;
|
|
|
|
if(!base){
|
|
// DMA SLOW PATH
|
|
if (d->TransferMode == 0 || d->TransferMode == 2 || d->TransferMode == 6)
|
|
{
|
|
do
|
|
{
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
}
|
|
else if (d->TransferMode == 1 || d->TransferMode == 5)
|
|
{
|
|
// This is a variation on Duff's Device. It is legal C/C++,
|
|
// see http://www.lysator.liu.se/c/duffs-device.html
|
|
switch(b){
|
|
default:
|
|
while (count > 1)
|
|
{
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
count--;
|
|
|
|
case 1:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
count --;
|
|
}
|
|
}
|
|
if (count == 1)
|
|
{
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
b = 1;
|
|
} else {
|
|
b = 0;
|
|
}
|
|
}
|
|
else if (d->TransferMode == 3 || d->TransferMode == 7)
|
|
{
|
|
switch(b){
|
|
default:
|
|
do
|
|
{
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 1;
|
|
break;
|
|
}
|
|
|
|
case 1:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 2;
|
|
break;
|
|
}
|
|
|
|
case 2:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 3;
|
|
break;
|
|
}
|
|
|
|
case 3:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
if(--count<=0){
|
|
b = 0;
|
|
break;
|
|
}
|
|
} while (1);
|
|
}
|
|
}
|
|
else if (d->TransferMode == 4)
|
|
{
|
|
switch(b){
|
|
default:
|
|
do
|
|
{
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 1;
|
|
break;
|
|
}
|
|
|
|
case 1:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 2;
|
|
break;
|
|
}
|
|
|
|
case 2:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2102 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 3;
|
|
break;
|
|
}
|
|
|
|
case 3:
|
|
Work = S9xGetByte((d->ABank << 16) + p);
|
|
S9xSetPPU (Work, 0x2103 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
if (--count <= 0){
|
|
b = 0;
|
|
break;
|
|
}
|
|
} while (1);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
#ifdef DEBUGGER
|
|
// if (Settings.TraceDMA)
|
|
{
|
|
sprintf (String, "Unknown DMA transfer mode: %d on channel %d\n",
|
|
d->TransferMode, Channel);
|
|
S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
|
|
}
|
|
#endif
|
|
}
|
|
} else {
|
|
// DMA FAST PATH
|
|
if (d->TransferMode == 0 || d->TransferMode == 2 || d->TransferMode == 6)
|
|
{
|
|
switch (d->BAddress)
|
|
{
|
|
case 0x04:
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2104(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
break;
|
|
case 0x18:
|
|
#ifndef CORRECT_VRAM_READS
|
|
IPPU.FirstVRAMRead = TRUE;
|
|
#endif
|
|
if (!PPU.VMA.FullGraphicCount)
|
|
{
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_linear(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
}
|
|
else
|
|
{
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_tile(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
}
|
|
break;
|
|
case 0x19:
|
|
#ifndef CORRECT_VRAM_READS
|
|
IPPU.FirstVRAMRead = TRUE;
|
|
#endif
|
|
if (!PPU.VMA.FullGraphicCount)
|
|
{
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2119_linear(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
}
|
|
else
|
|
{
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2119_tile(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
}
|
|
break;
|
|
case 0x22:
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2122(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
break;
|
|
case 0x80:
|
|
if(!CPU.InWRAM_DMA){
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2180(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
} else {
|
|
count=0;
|
|
}
|
|
break;
|
|
default:
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
} while (--count > 0);
|
|
break;
|
|
}
|
|
}
|
|
else if (d->TransferMode == 1 || d->TransferMode == 5)
|
|
{
|
|
if (d->BAddress == 0x18)
|
|
{
|
|
// Write to V-RAM
|
|
#ifndef CORRECT_VRAM_READS
|
|
IPPU.FirstVRAMRead = TRUE;
|
|
#endif
|
|
if (!PPU.VMA.FullGraphicCount)
|
|
{
|
|
switch(b){
|
|
default:
|
|
while (count > 1)
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_linear(Work);
|
|
p += inc;
|
|
count--;
|
|
|
|
case 1:
|
|
Work = *(base + p);
|
|
REGISTER_2119_linear(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
count--;
|
|
}
|
|
}
|
|
if (count == 1)
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_linear(Work);
|
|
p += inc;
|
|
b = 1;
|
|
} else {
|
|
b = 0;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
switch(b){
|
|
default:
|
|
while (count > 1)
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_tile(Work);
|
|
p += inc;
|
|
count--;
|
|
|
|
case 1:
|
|
Work = *(base + p);
|
|
REGISTER_2119_tile(Work);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
count--;
|
|
}
|
|
}
|
|
if (count == 1)
|
|
{
|
|
Work = *(base + p);
|
|
REGISTER_2118_tile(Work);
|
|
p += inc;
|
|
b = 1;
|
|
} else {
|
|
b = 0;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// DMA mode 1 general case
|
|
switch(b){
|
|
default:
|
|
while (count > 1)
|
|
{
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
count--;
|
|
|
|
case 1:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
count --;
|
|
}
|
|
}
|
|
if (count == 1)
|
|
{
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
b = 1;
|
|
} else {
|
|
b = 0;
|
|
}
|
|
}
|
|
}
|
|
else if (d->TransferMode == 3 || d->TransferMode == 7)
|
|
{
|
|
switch(b){
|
|
default:
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 1;
|
|
break;
|
|
}
|
|
|
|
case 1:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 2;
|
|
break;
|
|
}
|
|
|
|
case 2:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 3;
|
|
break;
|
|
}
|
|
|
|
case 3:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
if(--count<=0){
|
|
b = 0;
|
|
break;
|
|
}
|
|
} while (1);
|
|
}
|
|
}
|
|
else if (d->TransferMode == 4)
|
|
{
|
|
switch(b){
|
|
default:
|
|
do
|
|
{
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2100 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 1;
|
|
break;
|
|
}
|
|
|
|
case 1:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2101 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 2;
|
|
break;
|
|
}
|
|
|
|
case 2:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2102 + d->BAddress);
|
|
p += inc;
|
|
if (--count <= 0){
|
|
b = 3;
|
|
break;
|
|
}
|
|
|
|
case 3:
|
|
Work = *(base + p);
|
|
S9xSetPPU (Work, 0x2103 + d->BAddress);
|
|
p += inc;
|
|
CHECK_SOUND();
|
|
if (--count <= 0){
|
|
b = 0;
|
|
break;
|
|
}
|
|
} while (1);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
#ifdef DEBUGGER
|
|
// if (Settings.TraceDMA)
|
|
{
|
|
sprintf (String, "Unknown DMA transfer mode: %d on channel %d\n",
|
|
d->TransferMode, Channel);
|
|
S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
|
|
}
|
|
#endif
|
|
}
|
|
}
|
|
if(rem<=0) break;
|
|
base = GetBasePointer((d->ABank << 16) + d->AAddress);
|
|
count=MEMMAP_BLOCK_SIZE;
|
|
inWRAM_DMA = ((!in_sa1_dma && !in_sdd1_dma && !spc7110_dma) &&
|
|
(d->ABank == 0x7e || d->ABank == 0x7f || (!(d->ABank & 0x40) && d->AAddress < 0x2000)));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if(d->BAddress>0x80-4 && d->BAddress<=0x83 && !(d->ABank&0x40)){
|
|
// REVERSE-DMA REALLY-SLOW PATH
|
|
do
|
|
{
|
|
switch (d->TransferMode)
|
|
{
|
|
case 0:
|
|
case 2:
|
|
case 6:
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
--count;
|
|
break;
|
|
|
|
case 1:
|
|
case 5:
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
case 3:
|
|
case 7:
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
case 4:
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2102 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
CPU.InWRAM_DMA = (d->AAddress<0x2000);
|
|
Work = S9xGetPPU (0x2103 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
default:
|
|
#ifdef DEBUGGER
|
|
if (1) //Settings.TraceDMA)
|
|
{
|
|
sprintf (String, "Unknown DMA transfer mode: %d on channel %d\n",
|
|
d->TransferMode, Channel);
|
|
S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
|
|
}
|
|
#endif
|
|
count = 0;
|
|
break;
|
|
}
|
|
CHECK_SOUND();
|
|
} while (count);
|
|
} else {
|
|
// REVERSE-DMA FASTER PATH
|
|
CPU.InWRAM_DMA = (d->ABank==0x7e || d->ABank==0x7f);
|
|
do
|
|
{
|
|
switch (d->TransferMode)
|
|
{
|
|
case 0:
|
|
case 2:
|
|
case 6:
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
--count;
|
|
break;
|
|
|
|
case 1:
|
|
case 5:
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
case 3:
|
|
case 7:
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
case 4:
|
|
Work = S9xGetPPU (0x2100 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2101 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2102 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
if (!--count)
|
|
break;
|
|
|
|
Work = S9xGetPPU (0x2103 + d->BAddress);
|
|
S9xSetByte (Work, (d->ABank << 16) + d->AAddress);
|
|
d->AAddress += inc;
|
|
count--;
|
|
break;
|
|
|
|
default:
|
|
#ifdef DEBUGGER
|
|
if (1) //Settings.TraceDMA)
|
|
{
|
|
sprintf (String, "Unknown DMA transfer mode: %d on channel %d\n",
|
|
d->TransferMode, Channel);
|
|
S9xMessage (S9X_TRACE, S9X_DMA_TRACE, String);
|
|
}
|
|
#endif
|
|
count = 0;
|
|
break;
|
|
}
|
|
CHECK_SOUND();
|
|
} while(count);
|
|
}
|
|
}
|
|
|
|
while (CPU.Cycles >= CPU.NextEvent)
|
|
S9xDoHEventProcessing ();
|
|
if ((CPU.Cycles >= Timings.WRAMRefreshPos) && (CPU.Cycles < (Timings.WRAMRefreshPos + SNES_WRAM_REFRESH_CYCLES)))
|
|
{
|
|
int32 mc = Timings.WRAMRefreshPos + SNES_WRAM_REFRESH_CYCLES - CPU.Cycles;
|
|
S9xCheckMissingHTimerPositionRange(CPU.Cycles, mc);
|
|
CPU.Cycles += mc;
|
|
}
|
|
|
|
S9xTrySyncAPUInDMA();
|
|
|
|
if(Settings.SPC7110&&spc7110_dma)
|
|
{
|
|
if(spc7110_dma&&s7_wrap)
|
|
delete [] spc7110_dma;
|
|
}
|
|
|
|
update_address:
|
|
d->TransferBytes = 0;
|
|
|
|
CPU.InDMA = CPU.InWRAM_DMA = FALSE;
|
|
}
|
|
|
|
static inline bool8 HDMAReadLineCount(int d){
|
|
//remember, InDMA is set.
|
|
//Get/Set incur no charges!
|
|
uint8 line = S9xGetByte ((DMA[d].ABank << 16) + DMA[d].Address);
|
|
CPU.Cycles+=SLOW_ONE_CYCLE;
|
|
if(!line){
|
|
DMA[d].Repeat = FALSE;
|
|
DMA[d].LineCount = 128;
|
|
if(DMA[d].HDMAIndirectAddressing){
|
|
CPU.Cycles+=SLOW_ONE_CYCLE;
|
|
DMA[d].IndirectAddress = S9xGetWord((DMA[d].ABank << 16) + DMA[d].Address);
|
|
DMA[d].Address++;
|
|
}
|
|
DMA[d].Address++;
|
|
HDMAMemPointers[d] = NULL;
|
|
return FALSE;
|
|
} else if (line == 0x80) {
|
|
DMA[d].Repeat = TRUE;
|
|
DMA[d].LineCount = 128;
|
|
} else {
|
|
DMA[d].Repeat = !(line & 0x80);
|
|
DMA[d].LineCount = line & 0x7f;
|
|
}
|
|
|
|
DMA[d].Address++;
|
|
DMA[d].DoTransfer = TRUE;
|
|
if (DMA[d].HDMAIndirectAddressing) {
|
|
//again, no cycle charges while InDMA is set!
|
|
CPU.Cycles+=SLOW_ONE_CYCLE<<1;
|
|
DMA[d].IndirectAddress = S9xGetWord ((DMA[d].ABank << 16) + DMA[d].Address);
|
|
DMA[d].Address += 2;
|
|
HDMAMemPointers [d] = S9xGetMemPointer ((DMA[d].IndirectBank << 16) + DMA[d].IndirectAddress);
|
|
} else {
|
|
HDMAMemPointers [d] = S9xGetMemPointer ((DMA[d].ABank << 16) + DMA[d].Address);
|
|
}
|
|
return TRUE;
|
|
}
|
|
|
|
void S9xStartHDMA () {
|
|
if (Settings.DisableHDMA)
|
|
IPPU.HDMA = 0;
|
|
else
|
|
missing.hdma_this_frame = IPPU.HDMA = Memory.FillRAM [0x420c];
|
|
|
|
IPPU.HDMAEnded = 0;
|
|
CPU.InDMA = TRUE;
|
|
CPU.InWRAM_DMA = FALSE;
|
|
|
|
// XXX: Not quite right...
|
|
if(IPPU.HDMA!=0) CPU.Cycles+=18;
|
|
|
|
for (uint8 i = 0; i < 8; i++)
|
|
{
|
|
if (IPPU.HDMA & (1 << i))
|
|
{
|
|
DMA [i].Address = DMA[i].AAddress;
|
|
// Disable H-DMA'ing into V-RAM (register 2118) for Hook
|
|
/* XXX: instead of DMA[i].BAddress == 0x18, make S9xSetPPU fail
|
|
* XXX: writes to $2118/9 when appropriate (leave the
|
|
* !HDMAReadLineCount(i) test though)
|
|
*/
|
|
if (!HDMAReadLineCount(i) || DMA[i].BAddress == 0x18) {
|
|
IPPU.HDMA &= ~(1<<i);
|
|
}
|
|
|
|
S9xTrySyncAPUInDMA();
|
|
} else {
|
|
DMA[i].DoTransfer = FALSE;
|
|
}
|
|
}
|
|
|
|
CPU.InDMA = FALSE;
|
|
}
|
|
|
|
#ifdef DEBUGGER
|
|
void S9xTraceSoundDSP (const char *s, int i1 = 0, int i2 = 0, int i3 = 0,
|
|
int i4 = 0, int i5 = 0, int i6 = 0, int i7 = 0);
|
|
#endif
|
|
|
|
uint8 S9xDoHDMA (uint8 byte)
|
|
{
|
|
struct SDMA *p = &DMA [0];
|
|
uint32 ShiftedIBank;
|
|
uint16 IAddr;
|
|
|
|
int d = 0;
|
|
|
|
CPU.InDMA = TRUE;
|
|
|
|
// XXX: Not quite right...
|
|
CPU.Cycles+=18;
|
|
|
|
for (uint8 mask = 1; mask; mask <<= 1, p++, d++)
|
|
{
|
|
if (byte & mask)
|
|
{
|
|
CPU.InWRAM_DMA = FALSE;
|
|
if (p->HDMAIndirectAddressing) {
|
|
ShiftedIBank = (p->IndirectBank << 16);
|
|
IAddr = p->IndirectAddress;
|
|
} else {
|
|
ShiftedIBank = (p->ABank << 16);
|
|
IAddr = p->Address;
|
|
}
|
|
if (!HDMAMemPointers [d]) {
|
|
HDMAMemPointers [d] = S9xGetMemPointer (ShiftedIBank + IAddr);
|
|
}
|
|
|
|
if (p->DoTransfer) {
|
|
// XXX: Hack for Uniracers, because we don't understand
|
|
// OAM Address Invalidation
|
|
if (p->BAddress == 0x04){
|
|
if(SNESGameFixes.Uniracers){
|
|
PPU.OAMAddr = 0x10c;
|
|
PPU.OAMFlip=0;
|
|
}
|
|
}
|
|
|
|
#ifdef DEBUGGER
|
|
if (Settings.TraceSoundDSP && p->DoTransfer &&
|
|
p->BAddress >= 0x40 && p->BAddress <= 0x43)
|
|
S9xTraceSoundDSP ("Spooling data!!!\n");
|
|
if (Settings.TraceHDMA && p->DoTransfer)
|
|
{
|
|
sprintf (String, "H-DMA[%d] %s (%d) 0x%06X->0x21%02X %s, Count: %3d, Rep: %s, V-LINE: %3ld %02X%04X",
|
|
p-DMA, p->TransferDirection? "read" : "write",
|
|
p->TransferMode, ShiftedIBank+IAddr, p->BAddress,
|
|
p->HDMAIndirectAddressing ? "ind" : "abs",
|
|
p->LineCount,
|
|
p->Repeat ? "yes" : "no ", CPU.V_Counter,
|
|
p->ABank, p->Address);
|
|
S9xMessage (S9X_TRACE, S9X_HDMA_TRACE, String);
|
|
}
|
|
#endif
|
|
|
|
if (!p->TransferDirection) {
|
|
if((IAddr&MEMMAP_MASK)+HDMA_ModeByteCounts[p->TransferMode]>=MEMMAP_BLOCK_SIZE){
|
|
// HDMA REALLY-SLOW PATH
|
|
HDMAMemPointers[d]=NULL;
|
|
#define DOBYTE(Addr, RegOff) \
|
|
CPU.InWRAM_DMA = (ShiftedIBank==0x7e0000 || ShiftedIBank==0x7f0000 || (!(ShiftedIBank&0x400000) && ((uint16)(Addr))<0x2000)); \
|
|
S9xSetPPU (S9xGetByte(ShiftedIBank + ((uint16)(Addr))), 0x2100 + p->BAddress + RegOff);
|
|
switch (p->TransferMode) {
|
|
case 0:
|
|
CPU.Cycles += SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr, 0);
|
|
break;
|
|
case 5:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
DOBYTE(IAddr+2, 0);
|
|
DOBYTE(IAddr+3, 1);
|
|
break;
|
|
case 1:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
break;
|
|
case 2:
|
|
case 6:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 0);
|
|
break;
|
|
case 3:
|
|
case 7:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 0);
|
|
DOBYTE(IAddr+2, 1);
|
|
DOBYTE(IAddr+3, 1);
|
|
break;
|
|
case 4:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
DOBYTE(IAddr+2, 2);
|
|
DOBYTE(IAddr+3, 3);
|
|
break;
|
|
}
|
|
#undef DOBYTE
|
|
} else {
|
|
CPU.InWRAM_DMA = (ShiftedIBank==0x7e0000 || ShiftedIBank==0x7f0000 || (!(ShiftedIBank&0x400000) && IAddr<0x2000));
|
|
if(!HDMAMemPointers[d]){
|
|
// HDMA SLOW PATH
|
|
uint32 Addr = ShiftedIBank + IAddr;
|
|
switch (p->TransferMode) {
|
|
case 0:
|
|
CPU.Cycles += SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr), 0x2100 + p->BAddress);
|
|
break;
|
|
case 5:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr+0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+1), 0x2101 + p->BAddress);
|
|
Addr+=2;
|
|
/* fall through */
|
|
case 1:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr+0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+1), 0x2101 + p->BAddress);
|
|
break;
|
|
case 2:
|
|
case 6:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr+0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+1), 0x2100 + p->BAddress);
|
|
break;
|
|
case 3:
|
|
case 7:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr+0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+1), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+2), 0x2101 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+3), 0x2101 + p->BAddress);
|
|
break;
|
|
case 4:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (S9xGetByte(Addr+0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+1), 0x2101 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+2), 0x2102 + p->BAddress);
|
|
S9xSetPPU (S9xGetByte(Addr+3), 0x2103 + p->BAddress);
|
|
break;
|
|
}
|
|
} else {
|
|
// HDMA FAST PATH
|
|
switch (p->TransferMode) {
|
|
case 0:
|
|
CPU.Cycles += SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*HDMAMemPointers [d]++, 0x2100 + p->BAddress);
|
|
break;
|
|
case 5:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress);
|
|
HDMAMemPointers [d] += 2;
|
|
/* fall through */
|
|
case 1:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress);
|
|
HDMAMemPointers [d] += 2;
|
|
break;
|
|
case 2:
|
|
case 6:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 1), 0x2100 + p->BAddress);
|
|
HDMAMemPointers [d] += 2;
|
|
break;
|
|
case 3:
|
|
case 7:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 1), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 2), 0x2101 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 3), 0x2101 + p->BAddress);
|
|
HDMAMemPointers [d] += 4;
|
|
break;
|
|
case 4:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 2), 0x2102 + p->BAddress);
|
|
S9xSetPPU (*(HDMAMemPointers [d] + 3), 0x2103 + p->BAddress);
|
|
HDMAMemPointers [d] += 4;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
} else {
|
|
// REVERSE HDMA REALLY-SLOW PATH
|
|
// anomie says: Since this is apparently never used
|
|
// (otherwise we would have noticed before now), let's not
|
|
// bother with faster paths.
|
|
HDMAMemPointers[d]=NULL;
|
|
#define DOBYTE(Addr, RegOff) \
|
|
CPU.InWRAM_DMA = (ShiftedIBank==0x7e0000 || ShiftedIBank==0x7f0000 || (!(ShiftedIBank&0x400000) && ((uint16)(Addr))<0x2000)); \
|
|
S9xSetByte (S9xGetPPU(0x2100 + p->BAddress + RegOff), ShiftedIBank + ((uint16)(Addr)));
|
|
switch (p->TransferMode) {
|
|
case 0:
|
|
CPU.Cycles += SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr, 0);
|
|
break;
|
|
case 5:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
DOBYTE(IAddr+2, 0);
|
|
DOBYTE(IAddr+3, 1);
|
|
break;
|
|
case 1:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
break;
|
|
case 2:
|
|
case 6:
|
|
CPU.Cycles += 2*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 0);
|
|
break;
|
|
case 3:
|
|
case 7:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 0);
|
|
DOBYTE(IAddr+2, 1);
|
|
DOBYTE(IAddr+3, 1);
|
|
break;
|
|
case 4:
|
|
CPU.Cycles += 4*SLOW_ONE_CYCLE;
|
|
DOBYTE(IAddr+0, 0);
|
|
DOBYTE(IAddr+1, 1);
|
|
DOBYTE(IAddr+2, 2);
|
|
DOBYTE(IAddr+3, 3);
|
|
break;
|
|
}
|
|
#undef DOBYTE
|
|
}
|
|
if (p->HDMAIndirectAddressing){
|
|
p->IndirectAddress += HDMA_ModeByteCounts [p->TransferMode];
|
|
} else {
|
|
p->Address += HDMA_ModeByteCounts [p->TransferMode];
|
|
}
|
|
}
|
|
|
|
p->DoTransfer = !p->Repeat;
|
|
if (!--p->LineCount) {
|
|
if (!HDMAReadLineCount(d)) {
|
|
byte &= ~mask;
|
|
IPPU.HDMAEnded |= mask;
|
|
p->DoTransfer = FALSE;
|
|
continue;
|
|
}
|
|
} else {
|
|
CPU.Cycles += SLOW_ONE_CYCLE;
|
|
}
|
|
|
|
S9xTrySyncAPUInDMA();
|
|
}
|
|
}
|
|
CPU.InDMA=CPU.InWRAM_DMA=FALSE;
|
|
|
|
return (byte);
|
|
}
|
|
|
|
void S9xResetDMA () {
|
|
int d;
|
|
for (d = 0; d < 8; d++) {
|
|
DMA[d].TransferDirection = FALSE;
|
|
DMA[d].HDMAIndirectAddressing = FALSE;
|
|
DMA[d].AAddressFixed = TRUE;
|
|
DMA[d].AAddressDecrement = FALSE;
|
|
DMA[d].TransferMode = 7;
|
|
DMA[d].BAddress = 0xff;
|
|
DMA[d].AAddress = 0xffff;
|
|
DMA[d].ABank = 0xff;
|
|
DMA[d].DMACount_Or_HDMAIndirectAddress = 0xffff;
|
|
DMA[d].IndirectBank = 0xff;
|
|
DMA[d].Address = 0xffff;
|
|
DMA[d].Repeat = FALSE;
|
|
DMA[d].LineCount = 0x7f;
|
|
DMA[d].UnknownByte = 0xff;
|
|
DMA[d].DoTransfer = FALSE;
|
|
}
|
|
}
|