mirror of
https://github.com/dborth/snes9xgx.git
synced 2024-11-30 22:44:22 +01:00
368 lines
8.0 KiB
C
368 lines
8.0 KiB
C
/* Copyright 2013 tueidj All Rights Reserved
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* This code may not be used in any project
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* without explicit permission from the author.
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*/
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#include <gccore.h>
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#include <stdlib.h>
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#include <malloc.h>
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#include <errno.h>
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#include <ogc/machine/processor.h>
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#include <ogc/aram.h>
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#include "vm.h"
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#include <stdio.h>
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typedef u8 vm_page[PAGE_SIZE];
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static p_map phys_map[2048+(PTE_SIZE/PAGE_SIZE)];
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static vm_map virt_map[65536];
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static u16 pmap_max, pmap_head;
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static PTE* HTABORG;
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static vm_page* VM_Base;
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static vm_page* MEM_Base = NULL;
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static int pagefile_fd = -1;
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static mutex_t vm_mutex = LWP_MUTEX_NULL;
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static bool vm_initialized = 0;
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static __inline__ void tlbie(void* p)
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{
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asm volatile("tlbie %0" :: "r"(p));
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}
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static u16 locate_oldest(void)
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{
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u16 head = pmap_head;
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for(;;++head)
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{
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PTE *p;
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if (head >= pmap_max)
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head = 0;
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if (!phys_map[head].valid || phys_map[head].locked)
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continue;
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p = HTABORG+phys_map[head].pte_index;
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tlbie(VM_Base+phys_map[head].page_index);
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if (p->C)
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{
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p->C = 0;
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phys_map[head].dirty = 1;
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continue;
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}
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if (p->R)
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{
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p->R = 0;
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continue;
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}
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p->data[0] = 0;
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pmap_head = head+1;
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return head;
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}
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}
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static PTE* StorePTE(PTEG pteg, u32 virtual, u32 physical, u8 WIMG, u8 PP, int secondary)
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{
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int i;
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PTE p = {{0}};
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p.valid = 1;
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p.VSID = VM_VSID;
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p.hash = secondary ? 1:0;
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p.API = virtual >> 22;
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p.RPN = physical >> 12;
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p.WIMG = WIMG;
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p.PP = PP;
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for (i=0; i < 8; i++)
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{
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if (pteg[i].data[0] == p.data[0])
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{
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// printf("Error: address %08x already had a PTE entry\r\n", virtual);
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// abort();
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}
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else if (pteg[i].valid)
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continue;
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asm volatile("tlbie %0" : : "r"(virtual));
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pteg[i].data[1] = p.data[1];
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pteg[i].data[0] = p.data[0];
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// if (i || secondary)
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// printf("PTE for address %08x/%08x in PTEG %p index %d (%s)\r\n", virtual, physical, pteg, i, secondary ? "secondary" : "primary");
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return pteg+i;
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}
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return NULL;
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}
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static PTEG CalcPTEG(u32 virtual, int secondary)
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{
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uint32_t segment_index = (virtual >> 12) & 0xFFFF;
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u32 ptr = MEM_VIRTUAL_TO_PHYSICAL(HTABORG);
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u32 hash = segment_index ^ VM_VSID;
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if (secondary) hash = ~hash;
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hash &= (HTABMASK << 10) | 0x3FF;
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ptr |= hash << 6;
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return (PTEG)MEM_PHYSICAL_TO_K0(ptr);
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}
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static PTE* insert_pte(u16 index, u32 physical, u8 WIMG, u8 PP)
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{
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PTE *pte;
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int i;
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u32 virtual = (u32)(VM_Base+index);
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for (i=0; i < 2; i++)
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{
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PTEG pteg = CalcPTEG(virtual, i);
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pte = StorePTE(pteg, virtual, physical, WIMG, PP, i);
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if (pte)
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return pte;
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}
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// printf("Failed to insert PTE for %p\r\n", VM_Base+index);
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// abort();
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return NULL;
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}
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static void tlbia(void)
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{
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int i;
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for (i=0; i < 64; i++)
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asm volatile("tlbie %0" :: "r" (i*PAGE_SIZE));
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}
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/* This definition is wrong, pHndl does not take frame_context* as a parameter,
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* it has to adjust the stack pointer and finish filling frame_context itself
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*/
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void __exception_sethandler(u32 nExcept, void (*pHndl)(frame_context*));
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extern void default_exceptionhandler();
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// use our own exception stub because libogc stupidly requires it
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extern void dsi_handler();
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void* VM_Init(u32 VMSize, u32 MEMSize)
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{
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u32 i;
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u16 index, v_index;
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if (vm_initialized)
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return VM_Base;
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// parameter checking
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if (VMSize>MAX_VM_SIZE || MEMSize<MIN_MEM_SIZE || MEMSize>MAX_MEM_SIZE)
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{
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errno = EINVAL;
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return NULL;
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}
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VMSize = (VMSize+PAGE_SIZE-1)&PAGE_MASK;
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MEMSize = (MEMSize+PAGE_SIZE-1)&PAGE_MASK;
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//VM_Base = (vm_page*)(0x80000000 - VMSize);
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VM_Base = (vm_page*)(ARAM_VM_BASE);
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pmap_max = MEMSize / PAGE_SIZE + 16;
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// printf("VMSize %08x MEMSize %08x VM_Base %p pmap_max %u\r\n", VMSize, MEMSize, VM_Base, pmap_max);
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if (VMSize <= MEMSize)
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{
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errno = EINVAL;
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return NULL;
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}
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if (LWP_MutexInit(&vm_mutex, 0) != 0)
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{
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errno = ENOLCK;
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return NULL;
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}
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pagefile_fd = AR_Init(NULL, 0);
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// ISFS_Initialize();
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// doesn't matter if this fails, will be caught when file is opened
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// ISFS_CreateFile(VM_FILENAME, 0, ISFS_OPEN_RW, ISFS_OPEN_RW, ISFS_OPEN_RW);
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// pagefile_fd = ISFS_Open(VM_FILENAME, ISFS_OPEN_RW);
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if (pagefile_fd < 0)
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{
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errno = ENOENT;
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return NULL;
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}
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MEMSize += PTE_SIZE;
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MEM_Base = (vm_page*)memalign(PAGE_SIZE, MEMSize);
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// printf("MEM_Base: %p\r\n", MEM_Base);
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if (MEM_Base==NULL)
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{
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AR_Reset();
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// ISFS_Close(pagefile_fd);
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errno = ENOMEM;
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return NULL;
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}
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tlbia();
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DCZeroRange(MEM_Base, MEMSize);
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HTABORG = (PTE*)(((u32)MEM_Base+0xFFFF)&~0xFFFF);
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// printf("HTABORG: %p\r\n", HTABORG);
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// attempt to make the pagefile the correct size
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/* ISFS_Seek(pagefile_fd, 0, SEEK_SET);
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for (i=0; i<VMSize;)
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{
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u32 to_write = VMSize - i;
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if (to_write > MEMSize)
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to_write = MEMSize;
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if (ISFS_Write(pagefile_fd, MEM_Base, to_write) != to_write)
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{
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free(MEM_Base);
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ISFS_Close(pagefile_fd);
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errno = ENOSPC;
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return NULL;
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}
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// printf("Wrote %u bytes to offset %u\r\n", to_write, page);
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i += to_write;
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}*/
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// initial commit: map pmap_max pages to fill PTEs with valid RPNs
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for (index=0,v_index=0; index<pmap_max; ++index,++v_index)
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{
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if ((PTE*)(MEM_Base+index) == HTABORG)
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{
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// printf("p_map hole: %u -> %u\r\n", index, index+(PTE_SIZE/PAGE_SIZE));
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for (i=0; i<(PTE_SIZE/PAGE_SIZE); ++i,++index)
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phys_map[index].valid = 0;
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--index;
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--v_index;
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continue;
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}
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phys_map[index].valid = 1;
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phys_map[index].locked = 0;
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phys_map[index].dirty = 0;
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phys_map[index].page_index = v_index;
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phys_map[index].pte_index = insert_pte(v_index, MEM_VIRTUAL_TO_PHYSICAL(MEM_Base+index), 0, 0b10) - HTABORG;
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virt_map[v_index].committed = 0;
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virt_map[v_index].p_map_index = index;
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}
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// all indexes up to 65536
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for (; v_index; ++v_index)
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{
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virt_map[v_index].committed = 0;
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virt_map[v_index].p_map_index = pmap_max;
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}
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pmap_head = 0;
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// set SDR1
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mtspr(25, MEM_VIRTUAL_TO_PHYSICAL(HTABORG)|HTABMASK);
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//printf("SDR1: %08x\r\n", MEM_VIRTUAL_TO_PHYSICAL(HTABORG));
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// enable SR
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asm volatile("mtsrin %0,%1" :: "r"(VM_VSID), "r"(VM_Base));
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// hook DSI
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__exception_sethandler(EX_DSI, dsi_handler);
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atexit(VM_Deinit);
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vm_initialized = 1;
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return VM_Base;
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}
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void VM_Deinit(void)
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{
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if (!vm_initialized)
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return;
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// disable SR
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asm volatile("mtsrin %0,%1" :: "r"(0x80000000), "r"(VM_Base));
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// restore default DSI handler
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__exception_sethandler(EX_DSI, default_exceptionhandler);
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free(MEM_Base);
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MEM_Base = NULL;
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if (vm_mutex != LWP_MUTEX_NULL)
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{
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LWP_MutexDestroy(vm_mutex);
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vm_mutex = LWP_MUTEX_NULL;
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}
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if (pagefile_fd)
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{
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AR_Reset();
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// ISFS_Close(pagefile_fd);
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pagefile_fd = -1;
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// ISFS_Delete(VM_FILENAME);
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}
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vm_initialized = 0;
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}
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int vm_dsi_handler(frame_context* state, u32 DSISR)
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{
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u16 v_index;
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u16 p_index;
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if (state->DAR<(u32)VM_Base || state->DAR>=0x80000000)
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return 0;
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if ((DSISR&~0x02000000)!=0x40000000)
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return 0;
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if (!vm_initialized)
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return 0;
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LWP_MutexLock(vm_mutex);
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state->DAR &= ~0xFFF;
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v_index = (vm_page*)state->DAR - VM_Base;
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p_index = locate_oldest();
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// purge p_index if it's dirty
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if (phys_map[p_index].dirty)
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{
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DCFlushRange(MEM_Base+p_index, PAGE_SIZE);
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AR_StartDMA(AR_MRAMTOARAM,(u32)(MEM_Base+p_index),phys_map[p_index].page_index*PAGE_SIZE,PAGE_SIZE);
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while (AR_GetDMAStatus());
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virt_map[phys_map[p_index].page_index].committed = 1;
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virt_map[phys_map[p_index].page_index].p_map_index = pmap_max;
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phys_map[p_index].dirty = 0;
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// printf("VM page %d was purged\r\n", phys_map[p_index].page_index);
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}
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// fetch v_index if it has been previously committed
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if (virt_map[v_index].committed)
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{
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DCInvalidateRange(MEM_Base+p_index, PAGE_SIZE);
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AR_StartDMA(AR_ARAMTOMRAM,(u32)(MEM_Base+p_index),v_index*PAGE_SIZE,PAGE_SIZE);
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while (AR_GetDMAStatus());
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// printf("VM page %d was fetched\r\n", v_index);
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}
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else
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DCZeroRange(MEM_Base+p_index, PAGE_SIZE);
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// printf("VM page %u (0x%08x) replaced page %u (%p)\r\n", v_index, state->DAR, phys_map[p_index].page_index, VM_Base+phys_map[p_index].page_index);
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virt_map[v_index].p_map_index = p_index;
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phys_map[p_index].page_index = v_index;
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phys_map[p_index].pte_index = insert_pte(v_index, MEM_VIRTUAL_TO_PHYSICAL(MEM_Base+p_index), 0, 0b10) - HTABORG;
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LWP_MutexUnlock(vm_mutex);
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return 1;
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}
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