mirror of
https://github.com/dborth/snes9xgx.git
synced 2024-12-04 16:34:21 +01:00
fb27030208
- added: classic and nunchuk support
- added: all controllers can now be configured
- added: GC version (untested)
- changed: mappings are no longer stored in SRAM, but in config file.
This means no per-game configurations, but one global
config per controller.
- one makefile to make all versions. (thanks to snes9x143 SVN)
782 lines
20 KiB
C
782 lines
20 KiB
C
/**********************************************************************************
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Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
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Jerremy Koot (jkoot@snes9x.com)
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(c) Copyright 2002 - 2004 Matthew Kendora
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(c) Copyright 2002 - 2005 Peter Bortas (peter@bortas.org)
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(c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/)
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(c) Copyright 2001 - 2006 John Weidman (jweidman@slip.net)
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(c) Copyright 2002 - 2006 Brad Jorsch (anomie@users.sourceforge.net),
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funkyass (funkyass@spam.shaw.ca),
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Kris Bleakley (codeviolation@hotmail.com),
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Nach (n-a-c-h@users.sourceforge.net), and
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zones (kasumitokoduck@yahoo.com)
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BS-X C emulator code
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(c) Copyright 2005 - 2006 Dreamer Nom,
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zones
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C4 x86 assembler and some C emulation code
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(c) Copyright 2000 - 2003 _Demo_ (_demo_@zsnes.com),
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Nach,
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zsKnight (zsknight@zsnes.com)
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C4 C++ code
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(c) Copyright 2003 - 2006 Brad Jorsch,
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Nach
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DSP-1 emulator code
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(c) Copyright 1998 - 2006 _Demo_,
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Andreas Naive (andreasnaive@gmail.com)
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Gary Henderson,
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Ivar (ivar@snes9x.com),
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John Weidman,
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Kris Bleakley,
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Matthew Kendora,
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Nach,
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neviksti (neviksti@hotmail.com)
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DSP-2 emulator code
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(c) Copyright 2003 John Weidman,
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Kris Bleakley,
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Lord Nightmare (lord_nightmare@users.sourceforge.net),
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Matthew Kendora,
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neviksti
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DSP-3 emulator code
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(c) Copyright 2003 - 2006 John Weidman,
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Kris Bleakley,
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Lancer,
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z80 gaiden
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DSP-4 emulator code
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(c) Copyright 2004 - 2006 Dreamer Nom,
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John Weidman,
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Kris Bleakley,
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Nach,
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z80 gaiden
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OBC1 emulator code
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(c) Copyright 2001 - 2004 zsKnight,
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pagefault (pagefault@zsnes.com),
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Kris Bleakley,
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Ported from x86 assembler to C by sanmaiwashi
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SPC7110 and RTC C++ emulator code
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(c) Copyright 2002 Matthew Kendora with research by
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zsKnight,
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John Weidman,
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Dark Force
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S-DD1 C emulator code
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(c) Copyright 2003 Brad Jorsch with research by
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Andreas Naive,
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John Weidman
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S-RTC C emulator code
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(c) Copyright 2001-2006 byuu,
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John Weidman
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ST010 C++ emulator code
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(c) Copyright 2003 Feather,
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John Weidman,
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Kris Bleakley,
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Matthew Kendora
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Super FX x86 assembler emulator code
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(c) Copyright 1998 - 2003 _Demo_,
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pagefault,
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zsKnight,
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Super FX C emulator code
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(c) Copyright 1997 - 1999 Ivar,
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Gary Henderson,
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John Weidman
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Sound DSP emulator code is derived from SNEeSe and OpenSPC:
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(c) Copyright 1998 - 2003 Brad Martin
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(c) Copyright 1998 - 2006 Charles Bilyue'
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SH assembler code partly based on x86 assembler code
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(c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
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2xSaI filter
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(c) Copyright 1999 - 2001 Derek Liauw Kie Fa
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HQ2x filter
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(c) Copyright 2003 Maxim Stepin (maxim@hiend3d.com)
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Specific ports contains the works of other authors. See headers in
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individual files.
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Snes9x homepage: http://www.snes9x.com
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Permission to use, copy, modify and/or distribute Snes9x in both binary
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and source form, for non-commercial purposes, is hereby granted without
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fee, providing that this license information and copyright notice appear
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with all copies and any derived work.
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This software is provided 'as-is', without any express or implied
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warranty. In no event shall the authors be held liable for any damages
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arising from the use of this software or it's derivatives.
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Snes9x is freeware for PERSONAL USE only. Commercial users should
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seek permission of the copyright holders first. Commercial use includes,
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but is not limited to, charging money for Snes9x or software derived from
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Snes9x, including Snes9x or derivatives in commercial game bundles, and/or
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using Snes9x as a promotion for your commercial product.
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The copyright holders request that bug fixes and improvements to the code
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should be forwarded to them so everyone can benefit from the modifications
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in future versions.
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Super NES and Super Nintendo Entertainment System are trademarks of
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Nintendo Co., Limited and its subsidiary companies.
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**********************************************************************************/
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#ifndef _CPUMACRO_H_
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#define _CPUMACRO_H_
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#define rOP8(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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uint8 val = OpenBus = S9xGetByte(ADDR(READ)); \
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FUNC(val); \
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}
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#define rOP16(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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uint16 val = S9xGetWord(ADDR(READ), WRAP); \
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OpenBus = (uint8)(val>>8); \
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FUNC(val); \
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}
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#define rOPC(OP, COND, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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if(Check##COND()){ \
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uint8 val = OpenBus = S9xGetByte(ADDR(READ)); \
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FUNC(val); \
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} else { \
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uint16 val = S9xGetWord(ADDR(READ), WRAP); \
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OpenBus = (uint8)(val>>8); \
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FUNC(val); \
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} \
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}
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#define rOPM(OP, ADDR, WRAP, FUNC) \
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rOPC(OP, Memory, ADDR, WRAP, FUNC)
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#define rOPX(OP, ADDR, WRAP, FUNC) \
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rOPC(OP, Index, ADDR, WRAP, FUNC)
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#define wOP8(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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FUNC##8 (ADDR(WRITE)); \
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}
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#define wOP16(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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FUNC##16 (ADDR(WRITE), WRAP); \
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}
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#define wOPC(OP, COND, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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if(Check##COND()){ \
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FUNC##8 (ADDR(WRITE)); \
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} else { \
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FUNC##16 (ADDR(WRITE), WRAP); \
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} \
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}
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#define wOPM(OP, ADDR, WRAP, FUNC) \
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wOPC(OP, Memory, ADDR, WRAP, FUNC)
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#define wOPX(OP, ADDR, WRAP, FUNC) \
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wOPC(OP, Index, ADDR, WRAP, FUNC)
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#define mOP8(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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FUNC##8 (ADDR(MODIFY)); \
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}
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#define mOP16(OP, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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FUNC##16 (ADDR(MODIFY), WRAP); \
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}
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#define mOPC(OP, COND, ADDR, WRAP, FUNC) \
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static void Op##OP (void) { \
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if(Check##COND()){ \
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FUNC##8 (ADDR(MODIFY)); \
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} else { \
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FUNC##16 (ADDR(MODIFY), WRAP); \
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} \
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}
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#define mOPM(OP, ADDR, WRAP, FUNC) \
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mOPC(OP, Memory, ADDR, WRAP, FUNC)
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#define bOP(OP, COND, CHK, E) \
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static void Op##OP (void) { \
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pair newPC; \
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newPC.W = Relative(JUMP); \
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BranchCheck##CHK (); \
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if(COND){ \
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AddCycles(ONE_CYCLE); \
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if(E && Registers.PCh!=newPC.B.h){AddCycles(ONE_CYCLE);} \
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if((Registers.PCw&~MEMMAP_MASK)!=(newPC.W&~MEMMAP_MASK)){ \
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S9xSetPCBase(ICPU.ShiftedPB + newPC.W); \
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} else { \
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Registers.PCw = newPC.W; \
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} \
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CPUShutdown (); \
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} \
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}
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STATIC inline void SetZN (uint16 Work) {
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ICPU._Zero = Work != 0;
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ICPU._Negative = (uint8) (Work >> 8);
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}
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STATIC inline void SetZN (uint8 Work) {
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ICPU._Zero = Work;
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ICPU._Negative = Work;
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}
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STATIC inline void ADC (uint8 Work8) {
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if(CheckDecimal()) {
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uint8 A1 = Registers.A.W & 0x0F;
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uint16 A2 = Registers.A.W & 0xF0;
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uint8 W1 = Work8 & 0x0F;
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uint8 W2 = Work8 & 0xF0;
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A1 += W1+CheckCarry();
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if(A1>0x09){
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A1-=0x0A;
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A1&=0x0F;
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A2+=0x10;
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}
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A2 += W2;
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if(A2>0x90){
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A2-=0xA0;
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A2&=0xF0;
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SetCarry();
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} else {
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ClearCarry();
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}
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uint8 Ans8 = A2|A1;
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if (~(Registers.AL ^ Work8) &
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(Work8 ^ Ans8) & 0x80)
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SetOverflow();
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else
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ClearOverflow();
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Registers.AL = Ans8;
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SetZN (Registers.AL);
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} else {
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uint16 Ans16 = Registers.AL + Work8 + CheckCarry();
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ICPU._Carry = Ans16 >= 0x100;
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if (~(Registers.AL ^ Work8) &
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(Work8 ^ (uint8) Ans16) & 0x80)
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SetOverflow();
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else
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ClearOverflow();
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Registers.AL = (uint8) Ans16;
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SetZN (Registers.AL);
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}
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}
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STATIC inline void ADC (uint16 Work16) {
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if (CheckDecimal ()) {
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uint16 A1 = Registers.A.W & 0x000F;
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uint16 A2 = Registers.A.W & 0x00F0;
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uint16 A3 = Registers.A.W & 0x0F00;
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uint32 A4 = Registers.A.W & 0xF000;
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uint16 W1 = Work16 & 0x000F;
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uint16 W2 = Work16 & 0x00F0;
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uint16 W3 = Work16 & 0x0F00;
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uint16 W4 = Work16 & 0xF000;
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A1 += W1 + CheckCarry ();
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if(A1>0x0009) {
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A1 -= 0x000A;
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A1 &= 0x000F;
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A2 += 0x0010;
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}
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A2 += W2;
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if(A2>0x0090){
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A2 -= 0x00A0;
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A2 &= 0x00F0;
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A3 += 0x0100;
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}
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A3 += W3;
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if(A3>0x0900){
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A3 -= 0x0A00;
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A3 &= 0x0F00;
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A4 += 0x1000;
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}
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A4 += W4;
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if(A4>0x9000){
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A4 -= 0xA000;
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A4 &= 0xF000;
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SetCarry ();
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} else {
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ClearCarry ();
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}
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uint16 Ans16 = A4|A3|A2|A1;
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if (~(Registers.A.W ^ Work16) &
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(Work16 ^ Ans16) & 0x8000)
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SetOverflow();
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else
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ClearOverflow();
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Registers.A.W = Ans16;
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SetZN (Registers.A.W);
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} else {
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uint32 Ans32 = Registers.A.W + Work16 + CheckCarry();
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ICPU._Carry = Ans32 >= 0x10000;
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if (~(Registers.A.W ^ Work16) &
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(Work16 ^ (uint16) Ans32) & 0x8000)
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SetOverflow();
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else
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ClearOverflow();
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Registers.A.W = (uint16) Ans32;
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SetZN (Registers.A.W);
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}
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}
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STATIC inline void AND (uint16 Work16) {
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Registers.A.W &= Work16;
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SetZN (Registers.A.W);
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}
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STATIC inline void AND (uint8 Work8) {
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Registers.AL &= Work8;
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SetZN (Registers.AL);
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}
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STATIC inline void ASL16 (uint32 OpAddress, s9xwrap_t w) {
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uint16 Work16 = S9xGetWord (OpAddress, w);
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ICPU._Carry = (Work16 & 0x8000) != 0;
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Work16 <<= 1;
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AddCycles(ONE_CYCLE);
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S9xSetWord (Work16, OpAddress, w, WRITE_10);
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OpenBus = (Work16&0xff);
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SetZN (Work16);
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}
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STATIC inline void ASL8 (uint32 OpAddress) {
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uint8 Work8 = S9xGetByte (OpAddress);
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ICPU._Carry = (Work8 & 0x80) != 0;
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Work8 <<= 1;
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AddCycles(ONE_CYCLE);
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S9xSetByte (Work8, OpAddress);
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OpenBus = Work8;
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SetZN (Work8);
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}
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STATIC inline void BIT (uint16 Work16) {
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ICPU._Overflow = (Work16 & 0x4000) != 0;
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ICPU._Negative = (uint8) (Work16 >> 8);
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ICPU._Zero = (Work16 & Registers.A.W) != 0;
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}
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STATIC inline void BIT (uint8 Work8) {
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ICPU._Overflow = (Work8 & 0x40) != 0;
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ICPU._Negative = Work8;
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ICPU._Zero = Work8 & Registers.AL;
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}
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STATIC inline void CMP (uint16 val) {
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int32 Int32 = (int32) Registers.A.W - (int32) val;
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ICPU._Carry = Int32 >= 0;
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SetZN ((uint16) Int32);
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}
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STATIC inline void CMP (uint8 val) {
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int16 Int16 = (int16) Registers.AL - (int16) val;
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ICPU._Carry = Int16 >= 0;
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SetZN ((uint8) Int16);
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}
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STATIC inline void CPX (uint16 val) {
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int32 Int32 = (int32) Registers.X.W - (int32) val;
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ICPU._Carry = Int32 >= 0;
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SetZN ((uint16) Int32);
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}
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STATIC inline void CPX (uint8 val) {
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int16 Int16 = (int16) Registers.XL - (int16) val;
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ICPU._Carry = Int16 >= 0;
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SetZN ((uint8) Int16);
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}
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STATIC inline void CPY (uint16 val) {
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int32 Int32 = (int32) Registers.Y.W - (int32) val;
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ICPU._Carry = Int32 >= 0;
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SetZN ((uint16) Int32);
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}
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STATIC inline void CPY (uint8 val) {
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int16 Int16 = (int16) Registers.YL - (int16) val;
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ICPU._Carry = Int16 >= 0;
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SetZN ((uint8) Int16);
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}
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STATIC inline void DEC16 (uint32 OpAddress, s9xwrap_t w) {
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = 0xffffffff;
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#endif
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uint16 Work16 = S9xGetWord(OpAddress, w) - 1;
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AddCycles(ONE_CYCLE);
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S9xSetWord (Work16, OpAddress, w, WRITE_10);
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OpenBus = Work16&0xff;
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SetZN (Work16);
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}
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STATIC inline void DEC8 (uint32 OpAddress) {
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = 0xffffffff;
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#endif
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uint8 Work8 = S9xGetByte (OpAddress) - 1;
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AddCycles(ONE_CYCLE);
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S9xSetByte (Work8, OpAddress);
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OpenBus = Work8;
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SetZN (Work8);
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}
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STATIC inline void EOR (uint16 val) {
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Registers.A.W ^= val;
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SetZN (Registers.A.W);
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}
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STATIC inline void EOR (uint8 val) {
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Registers.AL ^= val;
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SetZN (Registers.AL);
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}
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STATIC inline void INC16 (uint32 OpAddress, s9xwrap_t w) {
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = 0xffffffff;
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#endif
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uint16 Work16 = S9xGetWord(OpAddress, w) + 1;
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AddCycles(ONE_CYCLE);
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S9xSetWord (Work16, OpAddress, w, WRITE_10);
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OpenBus = Work16&0xff;
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SetZN (Work16);
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}
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STATIC inline void INC8 (uint32 OpAddress) {
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = 0xffffffff;
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#endif
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uint8 Work8 = S9xGetByte (OpAddress) + 1;
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AddCycles(ONE_CYCLE);
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S9xSetByte (Work8, OpAddress);
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OpenBus = Work8;
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SetZN (Work8);
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}
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STATIC inline void LDA (uint16 val) {
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Registers.A.W = val;
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SetZN (Registers.A.W);
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}
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STATIC inline void LDA (uint8 val) {
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Registers.AL = val;
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SetZN (Registers.AL);
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}
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STATIC inline void LDX (uint16 val) {
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Registers.X.W = val;
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SetZN (Registers.X.W);
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}
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STATIC inline void LDX (uint8 val) {
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Registers.XL = val;
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SetZN (Registers.XL);
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}
|
|
|
|
STATIC inline void LDY (uint16 val) {
|
|
Registers.Y.W = val;
|
|
SetZN (Registers.Y.W);
|
|
}
|
|
|
|
STATIC inline void LDY (uint8 val) {
|
|
Registers.YL = val;
|
|
SetZN (Registers.YL);
|
|
}
|
|
|
|
STATIC inline void LSR16 (uint32 OpAddress, s9xwrap_t w) {
|
|
uint16 Work16 = S9xGetWord (OpAddress, w);
|
|
ICPU._Carry = Work16 & 1;
|
|
Work16 >>= 1;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetWord (Work16, OpAddress, w, WRITE_10);
|
|
OpenBus = (Work16&0xff);
|
|
SetZN (Work16);
|
|
}
|
|
|
|
STATIC inline void LSR8 (uint32 OpAddress) {
|
|
uint8 Work8 = S9xGetByte (OpAddress);
|
|
ICPU._Carry = Work8 & 1;
|
|
Work8 >>= 1;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetByte (Work8, OpAddress);
|
|
OpenBus = Work8;
|
|
SetZN (Work8);
|
|
}
|
|
|
|
STATIC inline void ORA (uint16 val) {
|
|
Registers.A.W |= val;
|
|
SetZN (Registers.A.W);
|
|
}
|
|
|
|
STATIC inline void ORA (uint8 val) {
|
|
Registers.AL |= val;
|
|
SetZN (Registers.AL);
|
|
}
|
|
|
|
STATIC inline void ROL16 (uint32 OpAddress, s9xwrap_t w) {
|
|
uint32 Work32 = (((uint32)S9xGetWord(OpAddress, w))<<1) | CheckCarry();
|
|
ICPU._Carry = Work32>=0x10000;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetWord ((uint16)Work32, OpAddress, w, WRITE_10);
|
|
OpenBus = (Work32&0xff);
|
|
SetZN ((uint16)Work32);
|
|
}
|
|
|
|
STATIC inline void ROL8 (uint32 OpAddress) {
|
|
uint16 Work16 = (((uint16)S9xGetByte(OpAddress))<<1) | CheckCarry();
|
|
ICPU._Carry = Work16>=0x100;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetByte ((uint8)Work16, OpAddress);
|
|
OpenBus = Work16&0xff;
|
|
SetZN ((uint8)Work16);
|
|
}
|
|
|
|
STATIC inline void ROR16 (uint32 OpAddress, s9xwrap_t w) {
|
|
uint32 Work32 = ((uint32)S9xGetWord(OpAddress, w)) | (((uint32)CheckCarry())<<16);
|
|
ICPU._Carry = Work32&1;
|
|
Work32 >>= 1;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetWord ((uint16)Work32, OpAddress, w, WRITE_10);
|
|
OpenBus = (Work32&0xff);
|
|
SetZN ((uint16)Work32);
|
|
}
|
|
|
|
STATIC inline void ROR8 (uint32 OpAddress) {
|
|
uint16 Work16 = ((uint16)S9xGetByte(OpAddress)) | (((uint16)CheckCarry())<<8);
|
|
ICPU._Carry = Work16&1;
|
|
Work16 >>= 1;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetByte ((uint8)Work16, OpAddress);
|
|
OpenBus = Work16&0xff;
|
|
SetZN ((uint8)Work16);
|
|
}
|
|
|
|
STATIC inline void SBC (uint16 Work16) {
|
|
if (CheckDecimal ()) {
|
|
uint16 A1 = Registers.A.W & 0x000F;
|
|
uint16 A2 = Registers.A.W & 0x00F0;
|
|
uint16 A3 = Registers.A.W & 0x0F00;
|
|
uint32 A4 = Registers.A.W & 0xF000;
|
|
uint16 W1 = Work16 & 0x000F;
|
|
uint16 W2 = Work16 & 0x00F0;
|
|
uint16 W3 = Work16 & 0x0F00;
|
|
uint16 W4 = Work16 & 0xF000;
|
|
|
|
A1 -= W1 + !CheckCarry ();
|
|
A2 -= W2;
|
|
A3 -= W3;
|
|
A4 -= W4;
|
|
if (A1 > 0x000F) {
|
|
A1 += 0x000A;
|
|
A1 &= 0x000F;
|
|
A2 -= 0x0010;
|
|
}
|
|
if (A2 > 0x00F0) {
|
|
A2 += 0x00A0;
|
|
A2 &= 0x00F0;
|
|
A3 -= 0x0100;
|
|
}
|
|
if (A3 > 0x0F00) {
|
|
A3 += 0x0A00;
|
|
A3 &= 0x0F00;
|
|
A4 -= 0x1000;
|
|
}
|
|
if (A4 > 0xF000) {
|
|
A4 += 0xA000;
|
|
A4 &= 0xF000;
|
|
ClearCarry ();
|
|
} else {
|
|
SetCarry ();
|
|
}
|
|
|
|
uint16 Ans16 = A4|A3|A2|A1;
|
|
if ((Registers.A.W ^ Work16) &
|
|
(Registers.A.W ^ Ans16) & 0x8000)
|
|
SetOverflow();
|
|
else
|
|
ClearOverflow();
|
|
Registers.A.W = Ans16;
|
|
SetZN (Registers.A.W);
|
|
} else {
|
|
int32 Int32 = (int32) Registers.A.W - (int32) Work16 + (int32) CheckCarry() - 1;
|
|
|
|
ICPU._Carry = Int32 >= 0;
|
|
|
|
if ((Registers.A.W ^ Work16) &
|
|
(Registers.A.W ^ (uint16) Int32) & 0x8000)
|
|
SetOverflow();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.A.W = (uint16) Int32;
|
|
SetZN (Registers.A.W);
|
|
}
|
|
}
|
|
|
|
STATIC inline void SBC (uint8 Work8) {
|
|
if (CheckDecimal ()) {
|
|
uint8 A1 = Registers.A.W & 0x0F;
|
|
uint16 A2 = Registers.A.W & 0xF0;
|
|
uint8 W1 = Work8 & 0x0F;
|
|
uint8 W2 = Work8 & 0xF0;
|
|
|
|
A1 -= W1 + !CheckCarry ();
|
|
A2 -= W2;
|
|
if (A1 > 0x0F) {
|
|
A1 += 0x0A;
|
|
A1 &= 0x0F;
|
|
A2 -= 0x10;
|
|
}
|
|
if (A2 > 0xF0) {
|
|
A2 += 0xA0;
|
|
A2 &= 0xF0;
|
|
ClearCarry ();
|
|
} else {
|
|
SetCarry ();
|
|
}
|
|
|
|
uint8 Ans8 = A2|A1;
|
|
if ((Registers.AL ^ Work8) &
|
|
(Registers.AL ^ Ans8) & 0x80)
|
|
SetOverflow ();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.AL = Ans8;
|
|
SetZN (Registers.AL);
|
|
} else {
|
|
int16 Int16 = (int16) Registers.AL - (int16) Work8 + (int16) CheckCarry() - 1;
|
|
|
|
ICPU._Carry = Int16 >= 0;
|
|
if ((Registers.AL ^ Work8) &
|
|
(Registers.AL ^ (uint8) Int16) & 0x80)
|
|
SetOverflow ();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.AL = (uint8) Int16;
|
|
SetZN (Registers.AL);
|
|
}
|
|
}
|
|
|
|
STATIC inline void STA16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
S9xSetWord (Registers.A.W, OpAddress, w);
|
|
OpenBus = Registers.AH;
|
|
}
|
|
|
|
STATIC inline void STA8 (uint32 OpAddress) {
|
|
S9xSetByte (Registers.AL, OpAddress);
|
|
OpenBus = Registers.AL;
|
|
}
|
|
|
|
STATIC inline void STX16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
S9xSetWord (Registers.X.W, OpAddress, w);
|
|
OpenBus = Registers.XH;
|
|
}
|
|
|
|
STATIC inline void STX8 (uint32 OpAddress) {
|
|
S9xSetByte (Registers.XL, OpAddress);
|
|
OpenBus = Registers.XL;
|
|
}
|
|
|
|
STATIC inline void STY16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
S9xSetWord (Registers.Y.W, OpAddress, w);
|
|
OpenBus = Registers.YH;
|
|
}
|
|
|
|
STATIC inline void STY8 (uint32 OpAddress) {
|
|
S9xSetByte (Registers.YL, OpAddress);
|
|
OpenBus = Registers.YL;
|
|
}
|
|
|
|
STATIC inline void STZ16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
S9xSetWord (0, OpAddress, w);
|
|
OpenBus = 0;
|
|
}
|
|
|
|
STATIC inline void STZ8 (uint32 OpAddress) {
|
|
S9xSetByte (0, OpAddress);
|
|
OpenBus = 0;
|
|
}
|
|
|
|
STATIC inline void TSB16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
uint16 Work16 = S9xGetWord (OpAddress, w);
|
|
ICPU._Zero = (Work16 & Registers.A.W) != 0;
|
|
Work16 |= Registers.A.W;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetWord (Work16, OpAddress, w, WRITE_10);
|
|
OpenBus = Work16&0xff;
|
|
}
|
|
|
|
STATIC inline void TSB8 (uint32 OpAddress) {
|
|
uint8 Work8 = S9xGetByte (OpAddress);
|
|
ICPU._Zero = Work8 & Registers.AL;
|
|
Work8 |= Registers.AL;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetByte (Work8, OpAddress);
|
|
OpenBus = Work8;
|
|
}
|
|
|
|
STATIC inline void TRB16 (uint32 OpAddress, enum s9xwrap_t w) {
|
|
uint16 Work16 = S9xGetWord (OpAddress, w);
|
|
ICPU._Zero = (Work16 & Registers.A.W) != 0;
|
|
Work16 &= ~Registers.A.W;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetWord (Work16, OpAddress, w, WRITE_10);
|
|
OpenBus = Work16&0xff;
|
|
}
|
|
|
|
STATIC inline void TRB8 (uint32 OpAddress) {
|
|
uint8 Work8 = S9xGetByte (OpAddress);
|
|
ICPU._Zero = Work8 & Registers.AL;
|
|
Work8 &= ~Registers.AL;
|
|
AddCycles(ONE_CYCLE);
|
|
S9xSetByte (Work8, OpAddress);
|
|
OpenBus = Work8;
|
|
}
|
|
#endif
|