diff --git a/Makefile.wii b/Makefile.wii index 2bb0d39..1acc8c0 100644 --- a/Makefile.wii +++ b/Makefile.wii @@ -20,13 +20,14 @@ INCLUDE_DIR := include PIPE_TO_SED := 2>&1 | sed "s/:\([0-9]*\):/\(\1\) :/" # Source files. -SRCS := $(wildcard $(SRC_DIR)/*.c $(SRC_DIR)/gfx-sdl/*.c $(SRC_DIR)/jd-sdl/*.c $(SRC_DIR)/sd-sdl/*.c \ - $(SRC_DIR)/td-none/*.c $(SRC_DIR)/gui-none/*.c $(SRC_DIR)/caps/*.c $(SRC_DIR)/dms/*.c ) +SRCS := $(wildcard $(SRC_DIR)/*.c $(SRC_DIR)/gfxdep/*.c $(SRC_DIR)/joydep/*.c $(SRC_DIR)/sounddep/*.c \ + $(SRC_DIR)/threaddep/*.c $(SRC_DIR)/guidep/*.c $(SRC_DIR)/caps/*.c $(SRC_DIR)/dms/*.c $(SRC_DIR)/machdep/*.c \ + $(SRC_DIR)/osdep/*.c $(SRC_DIR)/keymap/*.c) -SRCS := $(filter-out src/compemu_raw_x86.c src/svgancui.c src/build68k.c src/catweasel.c \ - src/cdrom.c src/blkdev-libscg.c src/blkdev.c src/blitops.c src/akiko.c \ - src/genblitter.c src/gencomp.c src/gencpu.c src/genlinetoscr.c src/missing.c \ - src/readcpu.c src/writelog.c src/tui.c src/scsiemul.c src/linetoscr.c, $(SRCS)) +SRCS := $(filter-out src/compemu_raw_x86.c src/compemu_fpp.c src/compemu_support.c src/svgancui.c src/build68k.c src/catweasel.c \ + src/cdrom.c src/blkdev-libscg.c src/blkdev.c src/blitops.c src/akiko.c src/filesys_bootrom.c \ + src/genblitter.c src/gencomp.c src/gencpu.c src/genlinetoscr.c src/fsusage.c src/compemu.c src/compstbl.c \ + src/readdisk.c src/gengenblitter.c src/tui.c src/scsiemul.c src/linetoscr.c, $(SRCS)) # Library object files. OBJS := $(subst $(SRC_DIR),$(OBJ_DIR),$(SRCS:.c=.o)) @@ -49,26 +50,11 @@ $(OBJ_DIR): src/sysconfig.h: src/sysconfig.h.wii cp $< $@ -src/machdep: - cd src && ln -s md-generic machdep +%.h: %.h.wii + cp $< $@ -src/gfxdep: - cd src && ln -s gfx-sdl gfxdep - -src/osdep: - cd src && ln -s od-generic osdep - -src/guidep: - cd src && ln -s gui-none guidep - -src/joydep: - cd src && ln -s jd-sdl joydep - -src/threaddep: - cd src && ln -s td-sdl threaddep - -src/target.h: - cd src && ln -s targets/t-unix.h target.h +%.c: %.c.wii + cp $< $@ # How to build a library. $(LIB_DIR)/libSDL_ttf.a: $(OBJS) @@ -88,17 +74,17 @@ $(BIN_DIR)/%.dol: %.elf # Compilation flags. COMMON_FLAGS := -g -O2 -mrvl -Wall $(MACHDEP) INCLUDES := -Isrc/md-generic/ -Isrc/include -Isrc -I$(DEVKITPRO)/libogc/include -I$(DEVKITPRO)/libogc/include/SDL -DEFINES := -DGEKKO -DDEBUG_ERROR -DDEBUG_TIMERS -DDEBUG_THREADS -DDEBUG_BUILD -DDEBUG_CONVERT +DEFINES := -DGEKKO -DDEBUG_ERROR -DDEBUG_TIMERS -DDEBUG_THREADS -DDEBUG_BUILD -DDEBUG_CONVERT -DFPUEMU CFLAGS := $(COMMON_FLAGS) $(INCLUDES) $(DEFINES) # Test link flags. -LDFLAGS := $(COMMON_FLAGS) -L$(LIB_DIR) -L$(DEVKITPRO)/libogc/lib/wii -lSDL_ttf -lSDL -lfreetype -lfat -lwiiuse -lbte -logc -lm +LDFLAGS := $(COMMON_FLAGS) -L$(LIB_DIR) -L$(DEVKITPRO)/libogc/lib/wii -lz -lSDL_ttf -lSDL -lfreetype -lfat -lwiiuse -lbte -logc -lm # How to link an ELF. -uae.elf: src/target.h src/machdep src/osdep src/guidep src/threaddep src/joydep src/gfxdep src/osdep src/sysconfig.h $(OBJS) +uae.elf: src/sysconfig.h $(OBJS) @echo Linking $@ @-mkdir -p $(dir $@) - powerpc-gekko-g++ -o $@ $< $(OBJS) $(LDFLAGS) + powerpc-gekko-g++ -o $@ $(OBJS) $(LDFLAGS) #keep elf for debugging #cp $@ /tmp/elf diff --git a/src/blit.h b/src/blit.h new file mode 100644 index 0000000..eb62073 --- /dev/null +++ b/src/blit.h @@ -0,0 +1,518 @@ +STATIC_INLINE uae_u32 blit_func(uae_u32 srca, uae_u32 srcb, uae_u32 srcc, uae_u8 mt) +{ +switch(mt){ +case 0x0: + return 0; +case 0x1: + return ~(srca | srcb | srcc); +case 0x2: + return (srcc & ~(srca | srcb)); +case 0x3: + return ~(srca | srcb); +case 0x4: + return (srcb & ~(srca | srcc)); +case 0x5: + return ~(srca | srcc); +case 0x6: + return (~srca & (srcb ^ srcc)); +case 0x7: + return ~(srca | (srcb & srcc)); +case 0x8: + return (~srca & srcb & srcc); +case 0x9: + return ~(srca | (srcb ^ srcc)); +case 0xa: + return (~srca & srcc); +case 0xb: + return ~(srca | (srcb & ~srcc)); +case 0xc: + return (~srca & srcb); +case 0xd: + return ~(srca | (~srcb & srcc)); +case 0xe: + return (~srca & (srcb | srcc)); +case 0xf: + return ~srca; +case 0x10: + return (srca & ~(srcb | srcc)); +case 0x11: + return ~(srcb | srcc); +case 0x12: + return (~srcb & (srca ^ srcc)); +case 0x13: + return ~(srcb | (srca & srcc)); +case 0x14: + return (~srcc & (srca ^ srcb)); +case 0x15: + return ~(srcc | (srca & srcb)); +case 0x16: + return (srca ^ ((srca & srcb) | (srcb ^ srcc))); +case 0x17: + return ~(srca ^ ((srca ^ srcb) & (srca ^ srcc))); +case 0x18: + return ((srca ^ srcb) & (srca ^ srcc)); +case 0x19: + return (srcb ^ (~srcc | (srca & srcb))); +case 0x1a: + return (srca ^ (srcc | (srca & srcb))); +case 0x1b: + return (srca ^ (srcc | ~(srca ^ srcb))); +case 0x1c: + return (srca ^ (srcb | (srca & srcc))); +case 0x1d: + return (srca ^ (srcb | ~(srca ^ srcc))); +case 0x1e: + return (srca ^ (srcb | srcc)); +case 0x1f: + return ~(srca & (srcb | srcc)); +case 0x20: + return (srca & ~srcb & srcc); +case 0x21: + return ~(srcb | (srca ^ srcc)); +case 0x22: + return (~srcb & srcc); +case 0x23: + return ~(srcb | (srca & ~srcc)); +case 0x24: + return ((srca ^ srcb) & (srcb ^ srcc)); +case 0x25: + return (srca ^ (~srcc | (srca & srcb))); +case 0x26: + return (srcb ^ (srcc | (srca & srcb))); +case 0x27: + return ~(srca ^ (srcc & (srca ^ srcb))); +case 0x28: + return (srcc & (srca ^ srcb)); +case 0x29: + return ~(srca ^ srcb ^ (srcc | (srca & srcb))); +case 0x2a: + return (srcc & ~(srca & srcb)); +case 0x2b: + return ~(srca ^ ((srca ^ srcb) & (srcb ^ srcc))); +case 0x2c: + return (srcb ^ (srca & (srcb | srcc))); +case 0x2d: + return (srca ^ (srcb | ~srcc)); +case 0x2e: + return (srca ^ (srcb | (srca ^ srcc))); +case 0x2f: + return ~(srca & (srcb | ~srcc)); +case 0x30: + return (srca & ~srcb); +case 0x31: + return ~(srcb | (~srca & srcc)); +case 0x32: + return (~srcb & (srca | srcc)); +case 0x33: + return ~srcb; +case 0x34: + return (srcb ^ (srca | (srcb & srcc))); +case 0x35: + return (srcb ^ (srca | ~(srcb ^ srcc))); +case 0x36: + return (srcb ^ (srca | srcc)); +case 0x37: + return ~(srcb & (srca | srcc)); +case 0x38: + return (srca ^ (srcb & (srca | srcc))); +case 0x39: + return (srcb ^ (srca | ~srcc)); +case 0x3a: + return (srcb ^ (srca | (srcb ^ srcc))); +case 0x3b: + return ~(srcb & (srca | ~srcc)); +case 0x3c: + return (srca ^ srcb); +case 0x3d: + return (srca ^ (srcb | ~(srca | srcc))); +case 0x3e: + return (srca ^ (srcb | (srca ^ (srca | srcc)))); +case 0x3f: + return ~(srca & srcb); +case 0x40: + return (srca & srcb & ~srcc); +case 0x41: + return ~(srcc | (srca ^ srcb)); +case 0x42: + return ((srca ^ srcc) & (srcb ^ srcc)); +case 0x43: + return (srca ^ (~srcb | (srca & srcc))); +case 0x44: + return (srcb & ~srcc); +case 0x45: + return ~(srcc | (srca & ~srcb)); +case 0x46: + return (srcc ^ (srcb | (srca & srcc))); +case 0x47: + return ~(srca ^ (srcb & (srca ^ srcc))); +case 0x48: + return (srcb & (srca ^ srcc)); +case 0x49: + return ~(srca ^ srcc ^ (srcb | (srca & srcc))); +case 0x4a: + return (srcc ^ (srca & (srcb | srcc))); +case 0x4b: + return (srca ^ (~srcb | srcc)); +case 0x4c: + return (srcb & ~(srca & srcc)); +case 0x4d: + return (srca ^ ((srca ^ srcb) | ~(srca ^ srcc))); +case 0x4e: + return (srca ^ (srcc | (srca ^ srcb))); +case 0x4f: + return ~(srca & (~srcb | srcc)); +case 0x50: + return (srca & ~srcc); +case 0x51: + return ~(srcc | (~srca & srcb)); +case 0x52: + return (srcc ^ (srca | (srcb & srcc))); +case 0x53: + return ~(srcb ^ (srca & (srcb ^ srcc))); +case 0x54: + return (~srcc & (srca | srcb)); +case 0x55: + return ~srcc; +case 0x56: + return (srcc ^ (srca | srcb)); +case 0x57: + return ~(srcc & (srca | srcb)); +case 0x58: + return (srca ^ (srcc & (srca | srcb))); +case 0x59: + return (srcc ^ (srca | ~srcb)); +case 0x5a: + return (srca ^ srcc); +case 0x5b: + return (srca ^ (srcc | ~(srca | srcb))); +case 0x5c: + return (srcc ^ (srca | (srcb ^ srcc))); +case 0x5d: + return ~(srcc & (srca | ~srcb)); +case 0x5e: + return (srca ^ (srcc | (srca ^ (srca | srcb)))); +case 0x5f: + return ~(srca & srcc); +case 0x60: + return (srca & (srcb ^ srcc)); +case 0x61: + return ~(srcb ^ srcc ^ (srca | (srcb & srcc))); +case 0x62: + return (srcc ^ (srcb & (srca | srcc))); +case 0x63: + return (srcb ^ (~srca | srcc)); +case 0x64: + return (srcb ^ (srcc & (srca | srcb))); +case 0x65: + return (srcc ^ (~srca | srcb)); +case 0x66: + return (srcb ^ srcc); +case 0x67: + return (srcb ^ (srcc | ~(srca | srcb))); +case 0x68: + return ((srca & srcb) ^ (srcc & (srca | srcb))); +case 0x69: + return ~(srca ^ srcb ^ srcc); +case 0x6a: + return (srcc ^ (srca & srcb)); +case 0x6b: + return ~(srca ^ srcb ^ (srcc & (srca | srcb))); +case 0x6c: + return (srcb ^ (srca & srcc)); +case 0x6d: + return ~(srca ^ srcc ^ (srcb & (srca | srcc))); +case 0x6e: + return ((~srca & srcb) | (srcb ^ srcc)); +case 0x6f: + return (~srca | (srcb ^ srcc)); +case 0x70: + return (srca & ~(srcb & srcc)); +case 0x71: + return ~(srca ^ ((srca ^ srcb) | (srca ^ srcc))); +case 0x72: + return (srcb ^ (srcc | (srca ^ srcb))); +case 0x73: + return ~(srcb & (~srca | srcc)); +case 0x74: + return (srcc ^ (srcb | (srca ^ srcc))); +case 0x75: + return ~(srcc & (~srca | srcb)); +case 0x76: + return (srcb ^ (srcc | (srca ^ (srca & srcb)))); +case 0x77: + return ~(srcb & srcc); +case 0x78: + return (srca ^ (srcb & srcc)); +case 0x79: + return ~(srcb ^ srcc ^ (srca & (srcb | srcc))); +case 0x7a: + return ((srca & ~srcb) | (srca ^ srcc)); +case 0x7b: + return (~srcb | (srca ^ srcc)); +case 0x7c: + return ((srca ^ srcb) | (srca & ~srcc)); +case 0x7d: + return (~srcc | (srca ^ srcb)); +case 0x7e: + return ((srca ^ srcb) | (srca ^ srcc)); +case 0x7f: + return ~(srca & srcb & srcc); +case 0x80: + return (srca & srcb & srcc); +case 0x81: + return ~((srca ^ srcb) | (srca ^ srcc)); +case 0x82: + return (srcc & ~(srca ^ srcb)); +case 0x83: + return (srca ^ (~srcb | (srca & ~srcc))); +case 0x84: + return (srcb & ~(srca ^ srcc)); +case 0x85: + return (srca ^ (~srcc | (srca & ~srcb))); +case 0x86: + return (srcb ^ srcc ^ (srca & (srcb | srcc))); +case 0x87: + return ~(srca ^ (srcb & srcc)); +case 0x88: + return (srcb & srcc); +case 0x89: + return (srcb ^ (~srcc & (~srca | srcb))); +case 0x8a: + return (srcc & (~srca | srcb)); +case 0x8b: + return (srca ^ (~srcb | (srca ^ srcc))); +case 0x8c: + return (srcb & (~srca | srcc)); +case 0x8d: + return (srca ^ (~srcc | (srca ^ srcb))); +case 0x8e: + return (srca ^ ((srca ^ srcb) | (srca ^ srcc))); +case 0x8f: + return (~srca | (srcb & srcc)); +case 0x90: + return (srca & ~(srcb ^ srcc)); +case 0x91: + return (srcb ^ (~srcc | (~srca & srcb))); +case 0x92: + return (srca ^ srcc ^ (srcb & (srca | srcc))); +case 0x93: + return ~(srcb ^ (srca & srcc)); +case 0x94: + return (srca ^ srcb ^ (srcc & (srca | srcb))); +case 0x95: + return ~(srcc ^ (srca & srcb)); +case 0x96: + return (srca ^ srcb ^ srcc); +case 0x97: + return (srca ^ srcb ^ (srcc | ~(srca | srcb))); +case 0x98: + return (srcb ^ (~srcc & (srca | srcb))); +case 0x99: + return ~(srcb ^ srcc); +case 0x9a: + return (srcc ^ (srca & ~srcb)); +case 0x9b: + return ~(srcb ^ (srcc & (srca | srcb))); +case 0x9c: + return (srcb ^ (srca & ~srcc)); +case 0x9d: + return ~(srcc ^ (srcb & (srca | srcc))); +case 0x9e: + return (srcb ^ srcc ^ (srca | (srcb & srcc))); +case 0x9f: + return ~(srca & (srcb ^ srcc)); +case 0xa0: + return (srca & srcc); +case 0xa1: + return (srca ^ (~srcc & (srca | ~srcb))); +case 0xa2: + return (srcc & (srca | ~srcb)); +case 0xa3: + return (srcb ^ (~srca | (srcb ^ srcc))); +case 0xa4: + return (srca ^ (~srcc & (srca | srcb))); +case 0xa5: + return ~(srca ^ srcc); +case 0xa6: + return (srcc ^ (~srca & srcb)); +case 0xa7: + return ~(srca ^ (srcc & (srca | srcb))); +case 0xa8: + return (srcc & (srca | srcb)); +case 0xa9: + return ~(srcc ^ (srca | srcb)); +case 0xaa: + return srcc; +case 0xab: + return (srcc | ~(srca | srcb)); +case 0xac: + return (srcb ^ (srca & (srcb ^ srcc))); +case 0xad: + return ~(srcc ^ (srca | (srcb & srcc))); +case 0xae: + return (srcc | (~srca & srcb)); +case 0xaf: + return (~srca | srcc); +case 0xb0: + return (srca & (~srcb | srcc)); +case 0xb1: + return ~(srca ^ (srcc | (srca ^ srcb))); +case 0xb2: + return (srca ^ ((srca ^ srcc) & (srcb ^ srcc))); +case 0xb3: + return (~srcb | (srca & srcc)); +case 0xb4: + return (srca ^ (srcb & ~srcc)); +case 0xb5: + return ~(srcc ^ (srca & (srcb | srcc))); +case 0xb6: + return (srca ^ srcc ^ (srcb | (srca & srcc))); +case 0xb7: + return ~(srcb & (srca ^ srcc)); +case 0xb8: + return (srca ^ (srcb & (srca ^ srcc))); +case 0xb9: + return ~(srcc ^ (srcb | (srca & srcc))); +case 0xba: + return (srcc | (srca & ~srcb)); +case 0xbb: + return (~srcb | srcc); +case 0xbc: + return ((srca ^ srcb) | (srca & srcc)); +case 0xbd: + return ((srca ^ srcb) | ~(srca ^ srcc)); +case 0xbe: + return (srcc | (srca ^ srcb)); +case 0xbf: + return (srcc | ~(srca & srcb)); +case 0xc0: + return (srca & srcb); +case 0xc1: + return (srca ^ (~srcb & (srca | ~srcc))); +case 0xc2: + return (srca ^ (~srcb & (srca | srcc))); +case 0xc3: + return ~(srca ^ srcb); +case 0xc4: + return (srcb & (srca | ~srcc)); +case 0xc5: + return ~(srcb ^ (srca | (srcb ^ srcc))); +case 0xc6: + return (srcb ^ (~srca & srcc)); +case 0xc7: + return ~(srca ^ (srcb & (srca | srcc))); +case 0xc8: + return (srcb & (srca | srcc)); +case 0xc9: + return ~(srcb ^ (srca | srcc)); +case 0xca: + return (srcc ^ (srca & (srcb ^ srcc))); +case 0xcb: + return ~(srcb ^ (srca | (srcb & srcc))); +case 0xcc: + return srcb; +case 0xcd: + return (srcb | ~(srca | srcc)); +case 0xce: + return (srcb | (~srca & srcc)); +case 0xcf: + return (~srca | srcb); +case 0xd0: + return (srca & (srcb | ~srcc)); +case 0xd1: + return ~(srca ^ (srcb | (srca ^ srcc))); +case 0xd2: + return (srca ^ (~srcb & srcc)); +case 0xd3: + return ~(srcb ^ (srca & (srcb | srcc))); +case 0xd4: + return (srca ^ ((srca ^ srcb) & (srcb ^ srcc))); +case 0xd5: + return (~srcc | (srca & srcb)); +case 0xd6: + return (srca ^ srcb ^ (srcc | (srca & srcb))); +case 0xd7: + return ~(srcc & (srca ^ srcb)); +case 0xd8: + return (srca ^ (srcc & (srca ^ srcb))); +case 0xd9: + return ~(srcb ^ (srcc | (srca & srcb))); +case 0xda: + return ((srca & srcb) | (srca ^ srcc)); +case 0xdb: + return ~((srca ^ srcb) & (srcb ^ srcc)); +case 0xdc: + return (srcb | (srca & ~srcc)); +case 0xdd: + return (srcb | ~srcc); +case 0xde: + return (srcb | (srca ^ srcc)); +case 0xdf: + return (srcb | ~(srca & srcc)); +case 0xe0: + return (srca & (srcb | srcc)); +case 0xe1: + return ~(srca ^ (srcb | srcc)); +case 0xe2: + return (srcc ^ (srcb & (srca ^ srcc))); +case 0xe3: + return ~(srca ^ (srcb | (srca & srcc))); +case 0xe4: + return (srcb ^ (srcc & (srca ^ srcb))); +case 0xe5: + return ~(srca ^ (srcc | (srca & srcb))); +case 0xe6: + return ((srca & srcb) | (srcb ^ srcc)); +case 0xe7: + return ~((srca ^ srcb) & (srca ^ srcc)); +case 0xe8: + return (srca ^ ((srca ^ srcb) & (srca ^ srcc))); +case 0xe9: + return (srca ^ srcb ^ (~srcc | (srca & srcb))); +case 0xea: + return (srcc | (srca & srcb)); +case 0xeb: + return (srcc | ~(srca ^ srcb)); +case 0xec: + return (srcb | (srca & srcc)); +case 0xed: + return (srcb | ~(srca ^ srcc)); +case 0xee: + return (srcb | srcc); +case 0xef: + return (~srca | srcb | srcc); +case 0xf0: + return srca; +case 0xf1: + return (srca | ~(srcb | srcc)); +case 0xf2: + return (srca | (~srcb & srcc)); +case 0xf3: + return (srca | ~srcb); +case 0xf4: + return (srca | (srcb & ~srcc)); +case 0xf5: + return (srca | ~srcc); +case 0xf6: + return (srca | (srcb ^ srcc)); +case 0xf7: + return (srca | ~(srcb & srcc)); +case 0xf8: + return (srca | (srcb & srcc)); +case 0xf9: + return (srca | ~(srcb ^ srcc)); +case 0xfa: + return (srca | srcc); +case 0xfb: + return (srca | ~srcb | srcc); +case 0xfc: + return (srca | srcb); +case 0xfd: + return (srca | srcb | ~srcc); +case 0xfe: + return (srca | srcb | srcc); +case 0xff: + return 0xFFFFFFFF; +} +return 0; +} diff --git a/src/blitfunc.c b/src/blitfunc.c new file mode 100644 index 0000000..dc0bf62 --- /dev/null +++ b/src/blitfunc.c @@ -0,0 +1,1519 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "custom_private.h" +#include "blitter.h" +#include "blitfunc.h" + +void blitdofast_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (dstp) chipmem_wput (dstp, dstd); + dstd = (0) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (dstp) chipmem_wput (dstp, dstd); + dstd = (0) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((~srca & srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((~srca & srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & ~(srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & ~(srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca & ~srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca & ~srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcb ^ (srca | (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcb ^ (srca | (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca ^ srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca ^ srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & (srcb | srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & (srcb | srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & (~srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & (~srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcb & (~srca | srcc))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcb & (~srca | srcc))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & ~srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & ~srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & (srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc & (srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srcc) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srcc) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = (~(srca ^ (srcc | (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = (~(srca ^ (srcc | (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srca & (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srcb) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srcb) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca ^ (srcc & (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca ^ (srcc & (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srcb & (srca ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc ^ (srcb & (srca ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc | (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srcc | (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srca) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = (srca) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptc) { srcc = chipmem_wget (ptc); ptc += 2; } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca | srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget (ptc); ptc -= 2; } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca | srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb += 2; + srcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca | srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 preva = 0; +uae_u32 prevb = 0, srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = b->vblitsize; j--; ) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = blt_info.bltbdat = chipmem_wget (ptb); ptb -= 2; + srcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift; + prevb = bltbdat; + } + if (pta) { bltadat = blt_info.bltadat = chipmem_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; + preva = bltadat; + if (dstp) chipmem_wput (dstp, dstd); + dstd = ((srca | srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput (dstp, dstd); +if (totald != 0) b->blitzero = 0; +} diff --git a/src/blitfunc.h b/src/blitfunc.h new file mode 100644 index 0000000..31df8e3 --- /dev/null +++ b/src/blitfunc.h @@ -0,0 +1,44 @@ +extern blitter_func blitdofast_0; +extern blitter_func blitdofast_desc_0; +extern blitter_func blitdofast_a; +extern blitter_func blitdofast_desc_a; +extern blitter_func blitdofast_2a; +extern blitter_func blitdofast_desc_2a; +extern blitter_func blitdofast_30; +extern blitter_func blitdofast_desc_30; +extern blitter_func blitdofast_3a; +extern blitter_func blitdofast_desc_3a; +extern blitter_func blitdofast_3c; +extern blitter_func blitdofast_desc_3c; +extern blitter_func blitdofast_4a; +extern blitter_func blitdofast_desc_4a; +extern blitter_func blitdofast_6a; +extern blitter_func blitdofast_desc_6a; +extern blitter_func blitdofast_8a; +extern blitter_func blitdofast_desc_8a; +extern blitter_func blitdofast_8c; +extern blitter_func blitdofast_desc_8c; +extern blitter_func blitdofast_9a; +extern blitter_func blitdofast_desc_9a; +extern blitter_func blitdofast_a8; +extern blitter_func blitdofast_desc_a8; +extern blitter_func blitdofast_aa; +extern blitter_func blitdofast_desc_aa; +extern blitter_func blitdofast_b1; +extern blitter_func blitdofast_desc_b1; +extern blitter_func blitdofast_ca; +extern blitter_func blitdofast_desc_ca; +extern blitter_func blitdofast_cc; +extern blitter_func blitdofast_desc_cc; +extern blitter_func blitdofast_d8; +extern blitter_func blitdofast_desc_d8; +extern blitter_func blitdofast_e2; +extern blitter_func blitdofast_desc_e2; +extern blitter_func blitdofast_ea; +extern blitter_func blitdofast_desc_ea; +extern blitter_func blitdofast_f0; +extern blitter_func blitdofast_desc_f0; +extern blitter_func blitdofast_fa; +extern blitter_func blitdofast_desc_fa; +extern blitter_func blitdofast_fc; +extern blitter_func blitdofast_desc_fc; diff --git a/src/blittable.c b/src/blittable.c new file mode 100644 index 0000000..5ffb09d --- /dev/null +++ b/src/blittable.c @@ -0,0 +1,77 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "custom.h" +#include "memory.h" +#include "blitter.h" +#include "blitfunc.h" + +blitter_func * const blitfunc_dofast[256] = { +blitdofast_0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_2a, 0, 0, 0, 0, 0, +blitdofast_30, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_3a, 0, blitdofast_3c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_4a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_6a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_8a, 0, blitdofast_8c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_9a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_a8, 0, blitdofast_aa, 0, 0, 0, 0, 0, +0, blitdofast_b1, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_ca, 0, blitdofast_cc, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_d8, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_e2, 0, 0, 0, 0, 0, +0, 0, blitdofast_ea, 0, 0, 0, 0, 0, +blitdofast_f0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_fa, 0, blitdofast_fc, 0, 0, 0 +}; + +blitter_func * const blitfunc_dofast_desc[256] = { +blitdofast_desc_0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_2a, 0, 0, 0, 0, 0, +blitdofast_desc_30, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_3a, 0, blitdofast_desc_3c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_4a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_6a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_8a, 0, blitdofast_desc_8c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_9a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_desc_a8, 0, blitdofast_desc_aa, 0, 0, 0, 0, 0, +0, blitdofast_desc_b1, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_ca, 0, blitdofast_desc_cc, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_desc_d8, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_e2, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_ea, 0, 0, 0, 0, 0, +blitdofast_desc_f0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_fa, 0, blitdofast_desc_fc, 0, 0, 0 +}; diff --git a/src/compemu.c b/src/compemu.c new file mode 100644 index 0000000..f8a8c6e --- /dev/null +++ b/src/compemu.c @@ -0,0 +1,63302 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "comptbl.h" +#include "compemu.h" + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +unsigned long REGPARAM2 op_0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_18_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_28_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_38_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_39_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_58_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_60_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_68_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_70_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_78_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_79_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_98_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_100_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_110_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_118_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_120_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_128_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_130_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_138_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_139_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13a_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13b_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13c_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst = scratchie++; + mov_l_ri(dst,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_140_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_150_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_158_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_160_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_168_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_170_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_178_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_179_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_17a_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_17b_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_180_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_190_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_198_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1ba_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1bb_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1c0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1d0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1d8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1e0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1e8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f9_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1fa_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1fb_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_200_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_210_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_218_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_220_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_228_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_230_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_238_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_239_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_240_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_250_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_258_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_260_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_268_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_270_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_278_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_279_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_280_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_290_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_298_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_400_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_410_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_418_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_420_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_428_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_430_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_438_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_439_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_440_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_450_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_458_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_460_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_468_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_470_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_478_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_479_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_480_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_490_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_498_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_600_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_610_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_618_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_620_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_628_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_630_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_638_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_639_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_640_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_650_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_658_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_660_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_668_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_670_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_678_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_679_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_680_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_690_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_698_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_800_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_810_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_818_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_820_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_828_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_830_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_838_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_839_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83a_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83b_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83c_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst = scratchie++; + mov_l_ri(dst,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_840_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_850_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_858_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_860_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_868_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_870_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_878_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_879_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_87a_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_87b_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_880_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_890_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_898_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8ba_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8bb_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8c0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8d0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8d8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8e0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8e8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f9_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8fa_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8fb_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + setzflg_l(s); + live_flags(); + end_needflags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a00_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a10_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a18_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a20_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a28_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a30_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a38_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a39_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a40_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a50_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a58_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a60_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a68_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a70_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a78_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_2 +unsigned long REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_aa0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_aa8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab9_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c00_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c10_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c18_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c20_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c28_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c30_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c38_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c39_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c3a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c3b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c40_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c50_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c58_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c60_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c68_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c70_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c78_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c79_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c7a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c7b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c80_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c90_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c98_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ca0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ca8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb9_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cba_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cbb_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +} writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2008_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2088_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2108_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_3 +unsigned long REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2188_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3008_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3088_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3108_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3148_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3188_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +} writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4000_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4010_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4018_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4020_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4028_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4030_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4038_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4039_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4040_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4050_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4058_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4060_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4068_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4070_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4078_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4079_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4080_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4090_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4098_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40a0_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40a8_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b0_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b8_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b9_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41d0_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41e8_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f0_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f8_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f9_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41fa_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41fb_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4200_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4210_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4218_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4220_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4228_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4230_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4238_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4239_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4240_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4250_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4258_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4260_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4268_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4270_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4278_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4279_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4280_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_4 +unsigned long REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42a0_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42a8_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b0_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b8_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4418_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4420_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4428_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4430_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4438_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4439_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4440_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4450_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4458_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4460_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4468_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4470_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4478_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4479_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4480_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4490_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4498_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44a0_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44a8_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b0_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b8_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b9_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4600_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4610_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4618_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4620_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4628_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4630_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4638_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4639_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4640_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4650_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4658_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4660_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4668_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4670_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4678_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4679_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4680_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4690_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4698_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46a0_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46a8_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b0_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b8_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b9_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4808_0_comp_ff(uae_u32 opcode) /* LINK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int offs = scratchie++; + mov_l_ri(offs,comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(15,4); + writelong_clobber(15,src,scratchie); + mov_l_rr(src,15); + add_l(15,offs); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4840_0_comp_ff(uae_u32 opcode) /* SWAP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); + rol_l_ri(src,16); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)src) + mov_l_rr(srcreg,src); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4850_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4868_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4870_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4878_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4879_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_487a_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_487b_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4880_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = scratchie++; + sign_extend_8_rr(dst,src); + dont_care_flags(); +{ start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4890_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48a0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,8+dstreg); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + offset-=2; + mov_l_rr(tmp,15-i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + } + } lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,2); + writeword(srca,15-i,scratchie); + } + } mov_l_rr(8+dstreg,srca); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48a8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48c0_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = src; + sign_extend_16_rr(src,src); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48d0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48e0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,8+dstreg); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + offset-=4; + mov_l_rr(tmp,15-i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + } + } lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,4); + writelong(srca,15-i,scratchie); + } + } mov_l_rr(8+dstreg,srca); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48e8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_49c0_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = src; + sign_extend_8_rr(src,src); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a00_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a10_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a18_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a20_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a28_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a30_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a38_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a39_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3a_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3b_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3c_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a40_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a48_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a50_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a58_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a60_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a68_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a70_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a78_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a79_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7a_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7b_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7c_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); +{ start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a80_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a88_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a90_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a98_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aa0_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aa8_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab0_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab8_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab9_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aba_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4abb_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4abc_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + dont_care_flags(); +{ start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c90_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c98_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } mov_l_rr(8+dstreg,tmp); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ca8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cba_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cbb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cd0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cd8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } mov_l_rr(8+dstreg,tmp); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ce8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cfa_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cfb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e50_0_comp_ff(uae_u32 opcode) /* LINK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(15,4); + writelong_clobber(15,src,scratchie); + mov_l_rr(src,15); + sign_extend_16_rr(offs,offs); + add_l(15,offs); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e58_0_comp_ff(uae_u32 opcode) /* UNLK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); + mov_l_rr(15,src); + readlong(15,src,scratchie); + add_l_ri(15,4); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e71_0_comp_ff(uae_u32 opcode) /* NOP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e74_0_comp_ff(uae_u32 opcode) /* RTD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + add_l_ri(offs,4); +{ int newad=scratchie++; + readlong(15,newad,scratchie); + and_l_ri(newad,~1); + mov_l_mr((uae_u32)®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; + add_l(15,offs); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e75_0_comp_ff(uae_u32 opcode) /* RTS */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int newad=scratchie++; + readlong(15,newad,scratchie); + and_l_ri(newad,~1); + mov_l_mr((uae_u32)®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; + lea_l_brr(15,15,4); +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e90_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ea8_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb0_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb8_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb9_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eba_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ebb_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ed0_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ee8_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef0_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef8_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef9_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4efa_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4efb_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5000_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5010_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5018_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5020_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5028_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5030_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5038_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_5 +unsigned long REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5040_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5048_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5050_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5058_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5060_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5068_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5070_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5078_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5079_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5080_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5100_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5110_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5118_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5120_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5128_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5130_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5138_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5139_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5140_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5148_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5150_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5158_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5160_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5168_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5170_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5178_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5179_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5180_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5188_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5190_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5198_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + start_needflags(); + sub_w_ri(src,1); + end_needflags(); +{ uae_u32 v2,v; + uae_u32 v1=get_const(PC_P); + v2=get_const(offs); + register_branch(v1,v2,3); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,7); + cmov_l_rr(src,nsrc,7); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,6); + cmov_l_rr(src,nsrc,6); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,3); + cmov_l_rr(src,nsrc,3); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,2); + cmov_l_rr(src,nsrc,2); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,5); + cmov_l_rr(src,nsrc,5); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,4); + cmov_l_rr(src,nsrc,4); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ac0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ac8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,9); + cmov_l_rr(src,nsrc,9); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ad0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ad8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ae0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ae8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,8); + cmov_l_rr(src,nsrc,8); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5be0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5be8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,13); + cmov_l_rr(src,nsrc,13); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ce0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ce8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,12); + cmov_l_rr(src,nsrc,12); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5de0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5de8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ec0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ec8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,15); + cmov_l_rr(src,nsrc,15); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ed0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ed8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ee0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ee8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,14); + cmov_l_rr(src,nsrc,14); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fe0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fe8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ff0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_6 +unsigned long REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6000_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6001_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_60ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6100_0_comp_ff(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(src,~1); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6101_0_comp_ff(uae_u32 opcode) /* BSR */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + and_l_ri(src,~1); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6200_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6201_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_62ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6400_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6401_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_64ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6500_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6501_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_65ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6600_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6601_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_66ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6700_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6701_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_67ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6aff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6bff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6c00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6c01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6cff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6d00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6d01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6dff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6e00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6e01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6eff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6f00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6f01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6fff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_7000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); +{ if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8000_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8010_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8018_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8020_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8028_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8030_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8038_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8039_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803a_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803b_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803c_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8040_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8050_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8058_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8060_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8068_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8070_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8078_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8079_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807a_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807b_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807c_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8080_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8090_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8098_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80ba_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80bb_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80bc_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8110_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8118_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8120_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8128_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8130_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8138_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8139_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8150_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8158_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8160_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8168_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8170_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8178_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8179_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8190_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8198_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9000_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9010_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9018_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9020_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9028_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9030_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9038_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9039_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903a_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903b_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903c_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9040_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9048_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9050_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9058_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9060_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9068_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9070_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9078_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9079_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907a_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907b_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907c_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9080_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9088_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9090_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9098_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90ba_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90bb_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90bc_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9100_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9108_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9110_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9118_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9120_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9128_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9130_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9138_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9139_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9140_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9148_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9150_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9158_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9160_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9168_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9170_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9178_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9179_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9180_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9188_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9190_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9198_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b000_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b010_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b018_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b020_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b028_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b030_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b038_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b039_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03c_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b040_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_7 +unsigned long REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b050_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b058_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b060_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b068_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b070_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b078_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b079_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07c_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b080_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b088_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b090_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b098_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0a0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b9_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0ba_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0bb_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0bc_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b100_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b108_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b110_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b118_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b120_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b128_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b130_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b138_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b139_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b140_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b148_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); +{ dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b150_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b158_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b160_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b168_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b170_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b178_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b179_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b180_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b188_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); +{ dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b190_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b198_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1a0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1a8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b9_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c000_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c010_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c018_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c020_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c028_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c030_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c038_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c039_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03a_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03b_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03c_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c040_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c050_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c058_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c060_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c068_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c070_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c078_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c079_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07a_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07b_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07c_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c080_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c090_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c098_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0ba_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0bb_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0bc_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0c0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src=srcreg; +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0d0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0d8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0e0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0e8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f9_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fa_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fb_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fc_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c110_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c118_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c120_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c128_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c130_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c138_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c139_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c140_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); + if((uae_u32)dstreg!=(uae_u32)tmp) + mov_l_rr(dstreg,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c148_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg+8!=(uae_u32)dst) + mov_l_rr(srcreg+8,dst); + if((uae_u32)dstreg+8!=(uae_u32)tmp) + mov_l_rr(dstreg+8,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c150_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c158_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c160_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c168_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c170_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c178_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c179_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c188_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); + if((uae_u32)dstreg+8!=(uae_u32)tmp) + mov_l_rr(dstreg+8,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c190_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c198_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1c0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src=srcreg; +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1d0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1d8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1e0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1e8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f9_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fa_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fb_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fc_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); +{ start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d000_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d010_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d018_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d020_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d028_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d030_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d038_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d039_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03a_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03b_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03c_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d040_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d048_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d050_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d058_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d060_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d068_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d070_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d078_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d079_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07a_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07b_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07c_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d080_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d088_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d090_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d098_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0ba_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0bb_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0bc_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d100_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d108_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d110_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d118_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d120_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d128_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d130_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d138_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d139_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d140_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d148_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d150_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d158_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d160_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d168_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d170_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d178_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d179_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d180_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d188_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +{ int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + setzflg_l(zero); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d190_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d198_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_8 +unsigned long REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e000_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_b_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e008_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_b_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e018_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_b_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(data,0x07); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e020_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int cdata=scratchie++; + int tmpcnt=scratchie++; + int highshift=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shra_b_rr(data,cnt); + highmask=0x38; + width=8; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_b_rr(data,highshift); + shra_b_rr(data,highshift); + sub_l_ri(tmpcnt,1); + shra_b_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +cmov_l_rr(cdata,data,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e028_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shrl_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shrl_b_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e038_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_b_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(data,0x07); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_w_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_w_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_w_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(data,0x0f); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e060_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int cdata=scratchie++; + int tmpcnt=scratchie++; + int highshift=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shra_w_rr(data,cnt); + highmask=0x30; + width=16; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_w_rr(data,highshift); + shra_w_rr(data,highshift); + sub_l_ri(tmpcnt,1); + shra_w_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +cmov_l_rr(cdata,data,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e068_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shrl_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shrl_w_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e078_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_w_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(data,0x0f); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e080_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_l_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e088_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_l_ri(data,srcreg); + bp=srcreg-1; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e098_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_l_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(data,0x1f); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0a0_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int cdata=scratchie++; + int tmpcnt=scratchie++; + int highshift=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shra_l_rr(data,cnt); + highmask=0x20; + width=32; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_l_rr(data,highshift); + shra_l_rr(data,highshift); + sub_l_ri(tmpcnt,1); + shra_l_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +cmov_l_rr(cdata,data,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0a8_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shrl_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shrl_l_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(cdata,0); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0b8_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_l_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(data,0x1f); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e100_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_b_ri(data,srcreg); + bp=8-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e108_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_b_ri(data,srcreg); + bp=8-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e118_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_b_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e120_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_b_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(cdata,7); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e128_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_b_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(cdata,7); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e138_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_b_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_b_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e140_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_w_ri(data,srcreg); + bp=16-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e148_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_w_ri(data,srcreg); + bp=16-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e158_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_w_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e160_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_w_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(cdata,15); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e168_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_w_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(cdata,15); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e178_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_w_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_w_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e180_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_l_ri(data,srcreg); + bp=32-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e188_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_l_ri(data,srcreg); + bp=32-srcreg; + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(tmp,bp); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e198_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_l_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e1a0_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_l_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(cdata,31); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e1a8_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int cdata=scratchie++; + int tmpcnt=scratchie++; + mov_l_rr(tmpcnt,cnt); + and_l_ri(tmpcnt,63); + mov_l_ri(cdata,0); + cmov_l_rr(cdata,data,5); + shll_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + sub_l_ri(tmpcnt,1); + shll_l_rr(cdata,tmpcnt); +test_l_ri(tmpcnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(cdata,scratchie,5); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(cdata,31); + live_flags(); + end_needflags(); + duplicate_carry(); +if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e1b8_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_l_rr(data,cnt); + start_needflags(); + if (needed_flags & FLAG_ZNV) + test_l_rr(data,data); + bt_l_ri(data,0x00); + live_flags(); + end_needflags(); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f200_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f208_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f210_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f218_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f220_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f228_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f230_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f238_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f239_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23a_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23b_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23c_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f240_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f250_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f258_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f260_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f268_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f270_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f278_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f279_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f280_0_comp_ff(uae_u32 opcode) /* FBcc */ +{ + uae_s32 srcreg = (opcode & 63); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + comp_fbcc_opp(opcode); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f2c0_0_comp_ff(uae_u32 opcode) /* FBcc */ +{ + uae_s32 srcreg = (opcode & 63); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + comp_fbcc_opp(opcode); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f600_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(srcreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f608_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(dstreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f610_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f618_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f620_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_s32 dstreg = 0; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + uae_u16 dstreg=((comp_get_iword((m68k_pc_offset+=2)-2))>>12)&0x07; + mov_l_rr(src,8+srcreg); + mov_l_rr(dst,8+dstreg); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (srcreg != dstreg) + add_l_ri(srcreg+8,16); + add_l_ri(dstreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +unsigned long REGPARAM2 op_0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_18_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_28_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_38_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_39_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_58_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_60_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_68_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_70_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_78_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_79_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_98_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_100_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_110_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_118_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_120_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_128_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_130_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_138_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_139_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13a_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13b_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13c_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst = scratchie++; + mov_l_ri(dst,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_140_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_150_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_158_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_160_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_168_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_170_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_178_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_179_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_17a_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_17b_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_180_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_190_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_198_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1ba_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1bb_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1c0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1d0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1d8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1e0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1e8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1f9_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1fa_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1fb_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_200_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_210_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_218_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_220_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_228_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_230_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_238_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_239_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_240_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_250_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_258_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_260_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_268_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_270_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_278_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_279_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_280_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_290_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_298_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_400_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_410_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_418_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_420_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_428_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_430_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_438_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_439_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_440_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_450_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_458_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_460_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_468_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_470_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_478_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_479_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_480_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_490_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_498_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_600_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_610_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_618_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_620_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_628_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_630_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_638_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_639_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_640_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_650_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_658_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_660_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_668_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_670_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_678_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_679_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_680_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_690_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_698_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_800_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_810_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_818_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_820_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_828_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_830_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_838_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_839_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83a_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83b_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_83c_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst = scratchie++; + mov_l_ri(dst,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_840_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_850_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_858_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_860_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_868_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_870_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_878_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_879_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_87a_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_87b_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_880_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_890_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_898_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8ba_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8bb_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8c0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8d0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8d8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8e0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8e8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8f9_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8fa_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8fb_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ int s=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta,dst,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a00_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a10_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a18_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a20_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a28_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a30_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a38_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a39_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a40_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a50_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a58_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a60_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a68_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a70_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a78_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_2 +unsigned long REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ xor_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_aa0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_aa8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ab9_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c00_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c10_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c18_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c20_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c28_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c30_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c38_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c39_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c3a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c3b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c40_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c50_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c58_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c60_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c68_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c70_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c78_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c79_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c7a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c7b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c80_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c90_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c98_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ca0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_ca8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cb9_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cba_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_cbb_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_103c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_10fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_113c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_117c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_1198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_11fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_13fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2008_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_203c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_207c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + mov_l_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2088_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_20fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,4); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2108_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_213c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_3 +unsigned long REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_217c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2188_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_21fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_23fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3008_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_303c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_307c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; +{ int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3088_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_30fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + lea_l_brr(dstreg+8,dstreg+8,2); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3108_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_313c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3148_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_317c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3188_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_3198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_31fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_33fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4000_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4010_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4018_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4020_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4028_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4030_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4038_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4039_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4040_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4050_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4058_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4060_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4068_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4070_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4078_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4079_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4080_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4090_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4098_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40a0_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40a8_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b0_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b8_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_40b9_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41d0_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41e8_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f0_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f8_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41f9_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41fa_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_41fb_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if((uae_u32)dstreg+8!=(uae_u32)srca) + mov_l_rr(dstreg+8,srca); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4200_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4210_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4218_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4220_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4228_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4230_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4238_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4239_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4240_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4250_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4258_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4260_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4268_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4270_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4278_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4279_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4280_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_4 +unsigned long REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42a0_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42a8_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b0_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b8_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca,dst,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4418_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4420_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4428_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4430_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4438_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4439_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4440_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4450_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4458_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4460_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4468_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4470_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4478_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4479_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4480_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4490_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4498_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44a0_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44a8_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b0_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b8_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_44b9_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4600_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_b_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4610_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4618_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4620_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4628_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4630_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4638_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4639_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4640_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4650_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4658_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4660_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4668_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4670_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4678_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4679_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4680_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4690_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4698_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46a0_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46a8_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b0_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b8_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_46b9_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(srca,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4808_0_comp_nf(uae_u32 opcode) /* LINK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int offs = scratchie++; + mov_l_ri(offs,comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(15,4); + writelong_clobber(15,src,scratchie); + mov_l_rr(src,15); + add_l(15,offs); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4840_0_comp_nf(uae_u32 opcode) /* SWAP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); + rol_l_ri(src,16); + if((uae_u32)srcreg!=(uae_u32)src) + mov_l_rr(srcreg,src); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4850_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4868_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4870_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if (srcreg==7) dodgy=1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4878_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4879_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_487a_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_487b_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{{ int dsta=dodgy?scratchie++:7+8; + lea_l_brr(7+8,7+8,-4); + if (dodgy) + mov_l_rr(dsta,8+7); + writelong(dsta,srca,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4880_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = scratchie++; + sign_extend_8_rr(dst,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_w_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4890_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48a0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,8+dstreg); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + offset-=2; + mov_l_rr(tmp,15-i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + } + } lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,2); + writeword(srca,15-i,scratchie); + } + } mov_l_rr(8+dstreg,srca); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48a8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48b9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48c0_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = src; + sign_extend_16_rr(src,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48d0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48e0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,8+dstreg); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + offset-=4; + mov_l_rr(tmp,15-i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + } + } lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,4); + writelong(srca,15-i,scratchie); + } + } mov_l_rr(8+dstreg,srca); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48e8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_48f9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + gen_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } } else { + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_49c0_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; + dont_care_flags(); +{ int dst = src; + sign_extend_8_rr(src,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a00_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a10_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a18_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a20_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a28_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a30_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a38_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a39_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3a_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3b_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a3c_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a40_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a48_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a50_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a58_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a60_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a68_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a70_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a78_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a79_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7a_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7b_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a7c_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a80_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a88_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a90_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4a98_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aa0_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aa8_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab0_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab8_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ab9_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4aba_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4abb_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4abc_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c00_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dst=dstreg; + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c10_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c18_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c20_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c28_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c30_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c38_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c39_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c3a_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta,address+PC16off); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c3b_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int pctmp=scratchie++; + int dsta=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c3c_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; +{ int dst = scratchie++; + mov_l_ri(dst,comp_get_ilong((m68k_pc_offset+=4)-4)); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c90_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4c98_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } mov_l_rr(8+dstreg,tmp); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ca8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cb9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cba_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cbb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + gen_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cd0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cd8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,dstreg+8); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } mov_l_rr(8+dstreg,tmp); + } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ce8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + mov_l_rr(srca,8+dstreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cf9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cfa_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4cfb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int offset=0; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + if (1 && !special_mem) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + gen_bswap_32(i); + offset+=4; + } + } } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e50_0_comp_nf(uae_u32 opcode) /* LINK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(15,4); + writelong_clobber(15,src,scratchie); + mov_l_rr(src,15); + sign_extend_16_rr(offs,offs); + add_l(15,offs); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e58_0_comp_nf(uae_u32 opcode) /* UNLK */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); + mov_l_rr(15,src); + readlong(15,src,scratchie); + add_l_ri(15,4); + if((uae_u32)srcreg+8!=(uae_u32)src) + mov_l_rr(srcreg+8,src); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e71_0_comp_nf(uae_u32 opcode) /* NOP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e74_0_comp_nf(uae_u32 opcode) /* RTD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + add_l_ri(offs,4); +{ int newad=scratchie++; + readlong(15,newad,scratchie); + and_l_ri(newad,~1); + mov_l_mr((uae_u32)®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; + add_l(15,offs); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e75_0_comp_nf(uae_u32 opcode) /* RTS */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int newad=scratchie++; + readlong(15,newad,scratchie); + and_l_ri(newad,~1); + mov_l_mr((uae_u32)®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; + lea_l_brr(15,15,4); +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4e90_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ea8_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb0_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb8_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eb9_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4eba_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ebb_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ed0_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ee8_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef0_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef8_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4ef9_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4efa_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_4efb_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); + and_l_ri(srca,~1); + mov_l_mr((uae_u32)®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr((uae_u32)®s.pc_oldp,PC_P); + m68k_pc_offset=0; +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5000_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5010_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5018_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5020_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5028_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5030_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_5 +unsigned long REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5040_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5048_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5050_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5058_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5060_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5068_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5070_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5078_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5079_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_50f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5100_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5110_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5118_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5120_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5128_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5130_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5138_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5139_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5140_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5148_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5150_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5158_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5160_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5168_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5170_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5178_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5179_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5180_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5188_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5190_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5198_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + start_needflags(); + sub_w_ri(src,1); + end_needflags(); +{ uae_u32 v2,v; + uae_u32 v1=get_const(PC_P); + v2=get_const(offs); + register_branch(v1,v2,3); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_51f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,7); + cmov_l_rr(src,nsrc,7); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_52f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,6); + cmov_l_rr(src,nsrc,6); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_53f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,3); + cmov_l_rr(src,nsrc,3); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_54f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,2); + cmov_l_rr(src,nsrc,2); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_55f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,5); + cmov_l_rr(src,nsrc,5); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_56f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,4); + cmov_l_rr(src,nsrc,4); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_57f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ac0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ac8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,9); + cmov_l_rr(src,nsrc,9); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ad0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ad8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ae0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ae8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5af9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,8); + cmov_l_rr(src,nsrc,8); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5be0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5be8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5bf9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,13); + cmov_l_rr(src,nsrc,13); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ce0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ce8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5cf9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,12); + cmov_l_rr(src,nsrc,12); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5dd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5de0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5de8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5df9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ec0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ec8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,15); + cmov_l_rr(src,nsrc,15); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ed0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ed8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ee0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ee8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ef9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + if((uae_u32)srcreg!=(uae_u32)val) + mov_b_rr(srcreg,val); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int offs = scratchie++; + mov_l_ri(offs,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,(uae_u32)comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; +{ int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,14); + cmov_l_rr(src,nsrc,14); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if((uae_u32)srcreg!=(uae_u32)src) + mov_w_rr(srcreg,src); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fe0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5fe8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ff0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_6 +unsigned long REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca,val,scratchie); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6000_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6001_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_60ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6100_0_comp_nf(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + and_l_ri(src,~1); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6101_0_comp_nf(uae_u32 opcode) /* BSR */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + and_l_ri(src,~1); +{ uae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(15,4); + writelong_clobber(15,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(void*)get_const(PC_P); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6200_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6201_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_62ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6400_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6401_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_64ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6500_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6501_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_65ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6600_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6601_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_66ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6700_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6701_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_67ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6a01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6aff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6b01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6bff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6c00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6c01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6cff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6d00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6d01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6dff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6e00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6e01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6eff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6f00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6f01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sign_extend_8_rr(src,src); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_6fff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v,v1,v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + and_l_ri(src,~1); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,(uae_u32)comp_pc_p); + mov_l_ri(PC_P,(uae_u32)comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + v1=get_const(PC_P); + v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); +}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_7000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,srcreg); +{ int dst=dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8000_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8010_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8018_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8020_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8028_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8030_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8038_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8039_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803a_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803b_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_803c_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8040_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8050_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8058_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8060_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8068_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8070_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8078_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8079_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807a_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807b_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_807c_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8080_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8090_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8098_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80ba_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80bb_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_80bc_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); +{ or_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8110_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8118_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8120_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8128_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8130_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8138_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8139_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8150_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8158_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8160_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8168_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8170_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8178_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8179_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8190_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_8198_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_81b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ or_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9000_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9010_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9018_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9020_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9028_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9030_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9038_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9039_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903a_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903b_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_903c_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + sub_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9040_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9048_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9050_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9058_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9060_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9068_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9070_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9078_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9079_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907a_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907b_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_907c_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + sub_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9080_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9088_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9090_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9098_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90ba_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90bb_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90bc_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + sub_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_90fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9100_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9108_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9110_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9118_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9120_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9128_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9130_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9138_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9139_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9140_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9148_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9150_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9158_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9160_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9168_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9170_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9178_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9179_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9180_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9188_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9190_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_9198_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_91fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b000_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b010_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b018_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b020_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b028_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b030_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b038_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b039_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b03c_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_7 +unsigned long REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b050_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b058_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b060_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b068_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b070_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b078_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b079_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b07c_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b080_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b088_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b090_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b098_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0a0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0b9_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0ba_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0bb_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0bc_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b0fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b100_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b108_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b110_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b118_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b120_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b128_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b130_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b138_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b139_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); +} writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b140_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b148_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b150_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b158_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b160_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b168_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b170_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b178_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b179_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +{if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); +} writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b180_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +{ xor_l(dst,src); +} if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b188_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b190_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b198_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1a0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1a8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1b9_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); +{ xor_l(dst,src); +} writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_b1fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmps=scratchie++; +tmps=src; + dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c000_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c010_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c018_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c020_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c028_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c030_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c038_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c039_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03a_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03b_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c03c_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c040_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c050_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c058_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c060_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c068_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c070_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c078_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c079_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07a_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07b_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c07c_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c080_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c090_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c098_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0ba_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0bb_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0bc_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + and_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0c0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src=srcreg; +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0d0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0d8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0e0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0e8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0f9_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fa_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fb_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c0fc_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c110_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c118_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c120_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c128_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c130_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c138_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c139_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c140_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); + if((uae_u32)dstreg!=(uae_u32)tmp) + mov_l_rr(dstreg,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c148_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg+8!=(uae_u32)dst) + mov_l_rr(srcreg+8,dst); + if((uae_u32)dstreg+8!=(uae_u32)tmp) + mov_l_rr(dstreg+8,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c150_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c158_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c160_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c168_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c170_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c178_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c179_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); +if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c188_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + mov_l_rr(tmp,src); + if((uae_u32)srcreg!=(uae_u32)dst) + mov_l_rr(srcreg,dst); + if((uae_u32)dstreg+8!=(uae_u32)tmp) + mov_l_rr(dstreg+8,tmp); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c190_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c198_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1c0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src=srcreg; +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1d0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1d8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1e0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1e8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1f9_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fa_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fb_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_c1fc_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d000_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d010_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d018_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readbyte(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,areg_byteinc[srcreg]); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d020_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d028_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d030_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d038_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d039_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03a_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03b_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d03c_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + add_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d040_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d048_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d050_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d058_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d060_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d068_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d070_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d078_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d079_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07a_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07b_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d07c_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dstreg; + dont_care_flags(); + add_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d080_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d088_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d090_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d098_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0ba_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0bb_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0bc_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dstreg; + dont_care_flags(); + add_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,2); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readword(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d0fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d100_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + restore_carry(); + adc_b(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_b_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d108_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,(uae_s32)-areg_byteinc[srcreg]); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readbyte(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); +{ dont_care_flags(); + restore_carry(); + adc_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d110_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d118_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d120_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,(uae_s32)-areg_byteinc[dstreg]); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d128_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d130_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d138_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d139_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readbyte(dsta,dst,scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d140_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + restore_carry(); + adc_w(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_w_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d148_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-2); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readword(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); +{ dont_care_flags(); + restore_carry(); + adc_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d150_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d158_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d160_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-2); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d168_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d170_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d178_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d179_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d180_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dstreg; +{ dont_care_flags(); + restore_carry(); + adc_l(dst,src); + if((uae_u32)dstreg!=(uae_u32)dst) + mov_l_rr(dstreg,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d188_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); +{ dont_care_flags(); + restore_carry(); + adc_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d190_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d198_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + lea_l_brr(dstreg+8,dstreg+8,4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{{ int dsta=dodgy?scratchie++:dstreg+8; + lea_l_brr(dstreg+8,dstreg+8,-4); + if (dodgy) + mov_l_rr(dsta,8+dstreg); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + mov_l_rr(dsta,8+dstreg); + lea_l_brr(dsta,dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dst=scratchie++; + readlong(dsta,dst,scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta,dst,scratchie); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=srcreg; +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(src,srcreg+8); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + lea_l_brr(srcreg+8,srcreg+8,4); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + +#ifdef PART_8 +unsigned long REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + lea_l_brr(srcreg+8,srcreg+8,-4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,8+srcreg); + lea_l_brr(srca,srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + calc_disp_ea_020(srcreg+8,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca,address+PC16off); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int pctmp=scratchie++; + int srca=scratchie++; + uae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset; +{ mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp,comp_get_iword((m68k_pc_offset+=2)-2),srca,scratchie); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_d1fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); +{ int dst=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dst,dstreg+8); +{ int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if((uae_u32)dstreg+8!=(uae_u32)dst) + mov_l_rr(dstreg+8,dst); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e000_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_b_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e008_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_b_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e018_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_b_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e020_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int highshift=scratchie++; + shra_b_rr(data,cnt); + highmask=0x38; + width=8; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_b_rr(data,highshift); + shra_b_rr(data,highshift); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e028_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shrl_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e038_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_b_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_w_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_w_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_w_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e060_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int highshift=scratchie++; + shra_w_rr(data,cnt); + highmask=0x30; + width=16; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_w_rr(data,highshift); + shra_w_rr(data,highshift); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e068_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shrl_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e078_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_w_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e080_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shra_l_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e088_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shrl_l_ri(data,srcreg); + bp=srcreg-1; + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e098_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ ror_l_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0a0_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + int width; + int highshift=scratchie++; + shra_l_rr(data,cnt); + highmask=0x20; + width=32; +test_l_ri(cnt,highmask); +mov_l_ri(highshift,0); +mov_l_ri(scratchie,width/2); +cmov_l_rr(highshift,scratchie,5); + shra_l_rr(data,highshift); + shra_l_rr(data,highshift); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0a8_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shrl_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e0b8_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ ror_l_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e100_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_b_ri(data,srcreg); + bp=8-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e108_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_b_ri(data,srcreg); + bp=8-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e118_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_b_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e120_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e128_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_b_rr(data,cnt); + highmask=0x38; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_b_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e138_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_b_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_b_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e140_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_w_ri(data,srcreg); + bp=16-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e148_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_w_ri(data,srcreg); + bp=16-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e158_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_w_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e160_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e168_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_w_rr(data,cnt); + highmask=0x30; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_w_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e178_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_w_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_w_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e180_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_l_ri(data,srcreg); + bp=32-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e188_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ int tmp=scratchie++; + int bp; + mov_l_rr(tmp,data); + shll_l_ri(data,srcreg); + bp=32-srcreg; + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e198_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt = scratchie++; + mov_l_ri(cnt,srcreg); +{ int data=dstreg; +{ rol_l_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e1a0_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +if (needed_flags & FLAG_V) { + FAIL(1); + return 0; +} +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_e1a8_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ int highmask; + shll_l_rr(data,cnt); + highmask=0x20; +test_l_ri(cnt,highmask); +mov_l_ri(scratchie,0); +cmov_l_rr(scratchie,data,4); + mov_l_rr(data,scratchie); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_e1b8_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + uae_s32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; +} +{ dont_care_flags(); +{ int cnt=srcreg; +{ int data=dstreg; +{ rol_l_rr(data,cnt); + if((uae_u32)dstreg!=(uae_u32)data) + mov_l_rr(dstreg,data); +}}}}} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f200_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f208_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f210_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f218_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f220_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f228_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f230_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f238_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f239_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23a_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23b_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f23c_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f240_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f250_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f258_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f260_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f268_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f270_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f278_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f279_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f280_0_comp_nf(uae_u32 opcode) /* FBcc */ +{ + uae_s32 srcreg = (opcode & 63); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + comp_fbcc_opp(opcode); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f2c0_0_comp_nf(uae_u32 opcode) /* FBcc */ +{ + uae_s32 srcreg = (opcode & 63); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + comp_fbcc_opp(opcode); +} if (m68k_pc_offset>100) sync_m68k_pc(); + if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; +return 0; +} +unsigned long REGPARAM2 op_f600_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(srcreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f608_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dsta=scratchie++; + mov_l_rr(dsta,dstreg+8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(dstreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f610_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int dsta = scratchie++; + mov_l_ri(dsta,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f618_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; +{ int srca = scratchie++; + mov_l_ri(srca,comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ +{ int dsta=dodgy?scratchie++:dstreg+8; + if (dodgy) + mov_l_rr(dsta,dstreg+8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +}}} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +unsigned long REGPARAM2 op_f620_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_s32 srcreg = (opcode & 7); + uae_s32 dstreg = 0; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + uae_u16 dstreg=((comp_get_iword((m68k_pc_offset+=2)-2))>>12)&0x07; + mov_l_rr(src,8+srcreg); + mov_l_rr(dst,8+dstreg); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (srcreg != dstreg) + add_l_ri(srcreg+8,16); + add_l_ri(dstreg+8,16); + if (special_mem) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); } +} if (m68k_pc_offset>100) sync_m68k_pc(); +return 0; +} +#endif + diff --git a/src/compstbl.c b/src/compstbl.c new file mode 100644 index 0000000..00e9080 --- /dev/null +++ b/src/compstbl.c @@ -0,0 +1,3744 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "comptbl.h" +const struct comptbl op_smalltbl_0_comp_ff[] = { +{ op_0_0_comp_ff, 0, 0x00000002 }, /* OR */ +{ op_10_0_comp_ff, 16, 0x00000002 }, /* OR */ +{ op_18_0_comp_ff, 24, 0x00000002 }, /* OR */ +{ op_20_0_comp_ff, 32, 0x00000002 }, /* OR */ +{ op_28_0_comp_ff, 40, 0x00000002 }, /* OR */ +{ op_30_0_comp_ff, 48, 0x00000002 }, /* OR */ +{ op_38_0_comp_ff, 56, 0x00000002 }, /* OR */ +{ op_39_0_comp_ff, 57, 0x00000002 }, /* OR */ +{ NULL, 60, 0x00000001 }, /* ORSR */ +{ op_40_0_comp_ff, 64, 0x00000002 }, /* OR */ +{ op_50_0_comp_ff, 80, 0x00000002 }, /* OR */ +{ op_58_0_comp_ff, 88, 0x00000002 }, /* OR */ +{ op_60_0_comp_ff, 96, 0x00000002 }, /* OR */ +{ op_68_0_comp_ff, 104, 0x00000002 }, /* OR */ +{ op_70_0_comp_ff, 112, 0x00000002 }, /* OR */ +{ op_78_0_comp_ff, 120, 0x00000002 }, /* OR */ +{ op_79_0_comp_ff, 121, 0x00000002 }, /* OR */ +{ NULL, 124, 0x00000001 }, /* ORSR */ +{ op_80_0_comp_ff, 128, 0x00000002 }, /* OR */ +{ op_90_0_comp_ff, 144, 0x00000002 }, /* OR */ +{ op_98_0_comp_ff, 152, 0x00000002 }, /* OR */ +{ op_a0_0_comp_ff, 160, 0x00000002 }, /* OR */ +{ op_a8_0_comp_ff, 168, 0x00000002 }, /* OR */ +{ op_b0_0_comp_ff, 176, 0x00000002 }, /* OR */ +{ op_b8_0_comp_ff, 184, 0x00000002 }, /* OR */ +{ op_b9_0_comp_ff, 185, 0x00000002 }, /* OR */ +{ NULL, 208, 0x00000001 }, /* CHK2 */ +{ NULL, 232, 0x00000001 }, /* CHK2 */ +{ NULL, 240, 0x00000001 }, /* CHK2 */ +{ NULL, 248, 0x00000001 }, /* CHK2 */ +{ NULL, 249, 0x00000001 }, /* CHK2 */ +{ NULL, 250, 0x00000001 }, /* CHK2 */ +{ NULL, 251, 0x00000001 }, /* CHK2 */ +{ op_100_0_comp_ff, 256, 0x00000000 }, /* BTST */ +{ NULL, 264, 0x00000001 }, /* MVPMR */ +{ op_110_0_comp_ff, 272, 0x00000000 }, /* BTST */ +{ op_118_0_comp_ff, 280, 0x00000000 }, /* BTST */ +{ op_120_0_comp_ff, 288, 0x00000000 }, /* BTST */ +{ op_128_0_comp_ff, 296, 0x00000002 }, /* BTST */ +{ op_130_0_comp_ff, 304, 0x00000002 }, /* BTST */ +{ op_138_0_comp_ff, 312, 0x00000002 }, /* BTST */ +{ op_139_0_comp_ff, 313, 0x00000002 }, /* BTST */ +{ op_13a_0_comp_ff, 314, 0x00000002 }, /* BTST */ +{ op_13b_0_comp_ff, 315, 0x00000002 }, /* BTST */ +{ op_13c_0_comp_ff, 316, 0x00000002 }, /* BTST */ +{ op_140_0_comp_ff, 320, 0x00000000 }, /* BCHG */ +{ NULL, 328, 0x00000001 }, /* MVPMR */ +{ op_150_0_comp_ff, 336, 0x00000000 }, /* BCHG */ +{ op_158_0_comp_ff, 344, 0x00000000 }, /* BCHG */ +{ op_160_0_comp_ff, 352, 0x00000000 }, /* BCHG */ +{ op_168_0_comp_ff, 360, 0x00000002 }, /* BCHG */ +{ op_170_0_comp_ff, 368, 0x00000002 }, /* BCHG */ +{ op_178_0_comp_ff, 376, 0x00000002 }, /* BCHG */ +{ op_179_0_comp_ff, 377, 0x00000002 }, /* BCHG */ +{ op_17a_0_comp_ff, 378, 0x00000002 }, /* BCHG */ +{ op_17b_0_comp_ff, 379, 0x00000002 }, /* BCHG */ +{ op_180_0_comp_ff, 384, 0x00000000 }, /* BCLR */ +{ NULL, 392, 0x00000001 }, /* MVPRM */ +{ op_190_0_comp_ff, 400, 0x00000000 }, /* BCLR */ +{ op_198_0_comp_ff, 408, 0x00000000 }, /* BCLR */ +{ op_1a0_0_comp_ff, 416, 0x00000000 }, /* BCLR */ +{ op_1a8_0_comp_ff, 424, 0x00000002 }, /* BCLR */ +{ op_1b0_0_comp_ff, 432, 0x00000002 }, /* BCLR */ +{ op_1b8_0_comp_ff, 440, 0x00000002 }, /* BCLR */ +{ op_1b9_0_comp_ff, 441, 0x00000002 }, /* BCLR */ +{ op_1ba_0_comp_ff, 442, 0x00000002 }, /* BCLR */ +{ op_1bb_0_comp_ff, 443, 0x00000002 }, /* BCLR */ +{ op_1c0_0_comp_ff, 448, 0x00000000 }, /* BSET */ +{ NULL, 456, 0x00000001 }, /* MVPRM */ +{ op_1d0_0_comp_ff, 464, 0x00000000 }, /* BSET */ +{ op_1d8_0_comp_ff, 472, 0x00000000 }, /* BSET */ +{ op_1e0_0_comp_ff, 480, 0x00000000 }, /* BSET */ +{ op_1e8_0_comp_ff, 488, 0x00000002 }, /* BSET */ +{ op_1f0_0_comp_ff, 496, 0x00000002 }, /* BSET */ +{ op_1f8_0_comp_ff, 504, 0x00000002 }, /* BSET */ +{ op_1f9_0_comp_ff, 505, 0x00000002 }, /* BSET */ +{ op_1fa_0_comp_ff, 506, 0x00000002 }, /* BSET */ +{ op_1fb_0_comp_ff, 507, 0x00000002 }, /* BSET */ +{ op_200_0_comp_ff, 512, 0x00000002 }, /* AND */ +{ op_210_0_comp_ff, 528, 0x00000002 }, /* AND */ +{ op_218_0_comp_ff, 536, 0x00000002 }, /* AND */ +{ op_220_0_comp_ff, 544, 0x00000002 }, /* AND */ +{ op_228_0_comp_ff, 552, 0x00000002 }, /* AND */ +{ op_230_0_comp_ff, 560, 0x00000002 }, /* AND */ +{ op_238_0_comp_ff, 568, 0x00000002 }, /* AND */ +{ op_239_0_comp_ff, 569, 0x00000002 }, /* AND */ +{ NULL, 572, 0x00000001 }, /* ANDSR */ +{ op_240_0_comp_ff, 576, 0x00000002 }, /* AND */ +{ op_250_0_comp_ff, 592, 0x00000002 }, /* AND */ +{ op_258_0_comp_ff, 600, 0x00000002 }, /* AND */ +{ op_260_0_comp_ff, 608, 0x00000002 }, /* AND */ +{ op_268_0_comp_ff, 616, 0x00000002 }, /* AND */ +{ op_270_0_comp_ff, 624, 0x00000002 }, /* AND */ +{ op_278_0_comp_ff, 632, 0x00000002 }, /* AND */ +{ op_279_0_comp_ff, 633, 0x00000002 }, /* AND */ +{ NULL, 636, 0x00000001 }, /* ANDSR */ +{ op_280_0_comp_ff, 640, 0x00000002 }, /* AND */ +{ op_290_0_comp_ff, 656, 0x00000002 }, /* AND */ +{ op_298_0_comp_ff, 664, 0x00000002 }, /* AND */ +{ op_2a0_0_comp_ff, 672, 0x00000002 }, /* AND */ +{ op_2a8_0_comp_ff, 680, 0x00000002 }, /* AND */ +{ op_2b0_0_comp_ff, 688, 0x00000002 }, /* AND */ +{ op_2b8_0_comp_ff, 696, 0x00000002 }, /* AND */ +{ op_2b9_0_comp_ff, 697, 0x00000002 }, /* AND */ +{ NULL, 720, 0x00000001 }, /* CHK2 */ +{ NULL, 744, 0x00000001 }, /* CHK2 */ +{ NULL, 752, 0x00000001 }, /* CHK2 */ +{ NULL, 760, 0x00000001 }, /* CHK2 */ +{ NULL, 761, 0x00000001 }, /* CHK2 */ +{ NULL, 762, 0x00000001 }, /* CHK2 */ +{ NULL, 763, 0x00000001 }, /* CHK2 */ +{ op_400_0_comp_ff, 1024, 0x00000002 }, /* SUB */ +{ op_410_0_comp_ff, 1040, 0x00000002 }, /* SUB */ +{ op_418_0_comp_ff, 1048, 0x00000002 }, /* SUB */ +{ op_420_0_comp_ff, 1056, 0x00000002 }, /* SUB */ +{ op_428_0_comp_ff, 1064, 0x00000002 }, /* SUB */ +{ op_430_0_comp_ff, 1072, 0x00000002 }, /* SUB */ +{ op_438_0_comp_ff, 1080, 0x00000002 }, /* SUB */ +{ op_439_0_comp_ff, 1081, 0x00000002 }, /* SUB */ +{ op_440_0_comp_ff, 1088, 0x00000002 }, /* SUB */ +{ op_450_0_comp_ff, 1104, 0x00000002 }, /* SUB */ +{ op_458_0_comp_ff, 1112, 0x00000002 }, /* SUB */ +{ op_460_0_comp_ff, 1120, 0x00000002 }, /* SUB */ +{ op_468_0_comp_ff, 1128, 0x00000002 }, /* SUB */ +{ op_470_0_comp_ff, 1136, 0x00000002 }, /* SUB */ +{ op_478_0_comp_ff, 1144, 0x00000002 }, /* SUB */ +{ op_479_0_comp_ff, 1145, 0x00000002 }, /* SUB */ +{ op_480_0_comp_ff, 1152, 0x00000002 }, /* SUB */ +{ op_490_0_comp_ff, 1168, 0x00000002 }, /* SUB */ +{ op_498_0_comp_ff, 1176, 0x00000002 }, /* SUB */ +{ op_4a0_0_comp_ff, 1184, 0x00000002 }, /* SUB */ +{ op_4a8_0_comp_ff, 1192, 0x00000002 }, /* SUB */ +{ op_4b0_0_comp_ff, 1200, 0x00000002 }, /* SUB */ +{ op_4b8_0_comp_ff, 1208, 0x00000002 }, /* SUB */ +{ op_4b9_0_comp_ff, 1209, 0x00000002 }, /* SUB */ +{ NULL, 1232, 0x00000001 }, /* CHK2 */ +{ NULL, 1256, 0x00000001 }, /* CHK2 */ +{ NULL, 1264, 0x00000001 }, /* CHK2 */ +{ NULL, 1272, 0x00000001 }, /* CHK2 */ +{ NULL, 1273, 0x00000001 }, /* CHK2 */ +{ NULL, 1274, 0x00000001 }, /* CHK2 */ +{ NULL, 1275, 0x00000001 }, /* CHK2 */ +{ op_600_0_comp_ff, 1536, 0x00000002 }, /* ADD */ +{ op_610_0_comp_ff, 1552, 0x00000002 }, /* ADD */ +{ op_618_0_comp_ff, 1560, 0x00000002 }, /* ADD */ +{ op_620_0_comp_ff, 1568, 0x00000002 }, /* ADD */ +{ op_628_0_comp_ff, 1576, 0x00000002 }, /* ADD */ +{ op_630_0_comp_ff, 1584, 0x00000002 }, /* ADD */ +{ op_638_0_comp_ff, 1592, 0x00000002 }, /* ADD */ +{ op_639_0_comp_ff, 1593, 0x00000002 }, /* ADD */ +{ op_640_0_comp_ff, 1600, 0x00000002 }, /* ADD */ +{ op_650_0_comp_ff, 1616, 0x00000002 }, /* ADD */ +{ op_658_0_comp_ff, 1624, 0x00000002 }, /* ADD */ +{ op_660_0_comp_ff, 1632, 0x00000002 }, /* ADD */ +{ op_668_0_comp_ff, 1640, 0x00000002 }, /* ADD */ +{ op_670_0_comp_ff, 1648, 0x00000002 }, /* ADD */ +{ op_678_0_comp_ff, 1656, 0x00000002 }, /* ADD */ +{ op_679_0_comp_ff, 1657, 0x00000002 }, /* ADD */ +{ op_680_0_comp_ff, 1664, 0x00000002 }, /* ADD */ +{ op_690_0_comp_ff, 1680, 0x00000002 }, /* ADD */ +{ op_698_0_comp_ff, 1688, 0x00000002 }, /* ADD */ +{ op_6a0_0_comp_ff, 1696, 0x00000002 }, /* ADD */ +{ op_6a8_0_comp_ff, 1704, 0x00000002 }, /* ADD */ +{ op_6b0_0_comp_ff, 1712, 0x00000002 }, /* ADD */ +{ op_6b8_0_comp_ff, 1720, 0x00000002 }, /* ADD */ +{ op_6b9_0_comp_ff, 1721, 0x00000002 }, /* ADD */ +{ NULL, 1728, 0x00000001 }, /* RTM */ +{ NULL, 1736, 0x00000001 }, /* RTM */ +{ NULL, 1744, 0x00000001 }, /* CALLM */ +{ NULL, 1768, 0x00000001 }, /* CALLM */ +{ NULL, 1776, 0x00000001 }, /* CALLM */ +{ NULL, 1784, 0x00000001 }, /* CALLM */ +{ NULL, 1785, 0x00000001 }, /* CALLM */ +{ NULL, 1786, 0x00000001 }, /* CALLM */ +{ NULL, 1787, 0x00000001 }, /* CALLM */ +{ op_800_0_comp_ff, 2048, 0x00000002 }, /* BTST */ +{ op_810_0_comp_ff, 2064, 0x00000002 }, /* BTST */ +{ op_818_0_comp_ff, 2072, 0x00000002 }, /* BTST */ +{ op_820_0_comp_ff, 2080, 0x00000002 }, /* BTST */ +{ op_828_0_comp_ff, 2088, 0x00000002 }, /* BTST */ +{ op_830_0_comp_ff, 2096, 0x00000002 }, /* BTST */ +{ op_838_0_comp_ff, 2104, 0x00000002 }, /* BTST */ +{ op_839_0_comp_ff, 2105, 0x00000002 }, /* BTST */ +{ op_83a_0_comp_ff, 2106, 0x00000002 }, /* BTST */ +{ op_83b_0_comp_ff, 2107, 0x00000002 }, /* BTST */ +{ op_83c_0_comp_ff, 2108, 0x00000002 }, /* BTST */ +{ op_840_0_comp_ff, 2112, 0x00000002 }, /* BCHG */ +{ op_850_0_comp_ff, 2128, 0x00000002 }, /* BCHG */ +{ op_858_0_comp_ff, 2136, 0x00000002 }, /* BCHG */ +{ op_860_0_comp_ff, 2144, 0x00000002 }, /* BCHG */ +{ op_868_0_comp_ff, 2152, 0x00000002 }, /* BCHG */ +{ op_870_0_comp_ff, 2160, 0x00000002 }, /* BCHG */ +{ op_878_0_comp_ff, 2168, 0x00000002 }, /* BCHG */ +{ op_879_0_comp_ff, 2169, 0x00000002 }, /* BCHG */ +{ op_87a_0_comp_ff, 2170, 0x00000002 }, /* BCHG */ +{ op_87b_0_comp_ff, 2171, 0x00000002 }, /* BCHG */ +{ op_880_0_comp_ff, 2176, 0x00000002 }, /* BCLR */ +{ op_890_0_comp_ff, 2192, 0x00000002 }, /* BCLR */ +{ op_898_0_comp_ff, 2200, 0x00000002 }, /* BCLR */ +{ op_8a0_0_comp_ff, 2208, 0x00000002 }, /* BCLR */ +{ op_8a8_0_comp_ff, 2216, 0x00000002 }, /* BCLR */ +{ op_8b0_0_comp_ff, 2224, 0x00000002 }, /* BCLR */ +{ op_8b8_0_comp_ff, 2232, 0x00000002 }, /* BCLR */ +{ op_8b9_0_comp_ff, 2233, 0x00000002 }, /* BCLR */ +{ op_8ba_0_comp_ff, 2234, 0x00000002 }, /* BCLR */ +{ op_8bb_0_comp_ff, 2235, 0x00000002 }, /* BCLR */ +{ op_8c0_0_comp_ff, 2240, 0x00000002 }, /* BSET */ +{ op_8d0_0_comp_ff, 2256, 0x00000002 }, /* BSET */ +{ op_8d8_0_comp_ff, 2264, 0x00000002 }, /* BSET */ +{ op_8e0_0_comp_ff, 2272, 0x00000002 }, /* BSET */ +{ op_8e8_0_comp_ff, 2280, 0x00000002 }, /* BSET */ +{ op_8f0_0_comp_ff, 2288, 0x00000002 }, /* BSET */ +{ op_8f8_0_comp_ff, 2296, 0x00000002 }, /* BSET */ +{ op_8f9_0_comp_ff, 2297, 0x00000002 }, /* BSET */ +{ op_8fa_0_comp_ff, 2298, 0x00000002 }, /* BSET */ +{ op_8fb_0_comp_ff, 2299, 0x00000002 }, /* BSET */ +{ op_a00_0_comp_ff, 2560, 0x00000002 }, /* EOR */ +{ op_a10_0_comp_ff, 2576, 0x00000002 }, /* EOR */ +{ op_a18_0_comp_ff, 2584, 0x00000002 }, /* EOR */ +{ op_a20_0_comp_ff, 2592, 0x00000002 }, /* EOR */ +{ op_a28_0_comp_ff, 2600, 0x00000002 }, /* EOR */ +{ op_a30_0_comp_ff, 2608, 0x00000002 }, /* EOR */ +{ op_a38_0_comp_ff, 2616, 0x00000002 }, /* EOR */ +{ op_a39_0_comp_ff, 2617, 0x00000002 }, /* EOR */ +{ NULL, 2620, 0x00000001 }, /* EORSR */ +{ op_a40_0_comp_ff, 2624, 0x00000002 }, /* EOR */ +{ op_a50_0_comp_ff, 2640, 0x00000002 }, /* EOR */ +{ op_a58_0_comp_ff, 2648, 0x00000002 }, /* EOR */ +{ op_a60_0_comp_ff, 2656, 0x00000002 }, /* EOR */ +{ op_a68_0_comp_ff, 2664, 0x00000002 }, /* EOR */ +{ op_a70_0_comp_ff, 2672, 0x00000002 }, /* EOR */ +{ op_a78_0_comp_ff, 2680, 0x00000002 }, /* EOR */ +{ op_a79_0_comp_ff, 2681, 0x00000002 }, /* EOR */ +{ NULL, 2684, 0x00000001 }, /* EORSR */ +{ op_a80_0_comp_ff, 2688, 0x00000002 }, /* EOR */ +{ op_a90_0_comp_ff, 2704, 0x00000002 }, /* EOR */ +{ op_a98_0_comp_ff, 2712, 0x00000002 }, /* EOR */ +{ op_aa0_0_comp_ff, 2720, 0x00000002 }, /* EOR */ +{ op_aa8_0_comp_ff, 2728, 0x00000002 }, /* EOR */ +{ op_ab0_0_comp_ff, 2736, 0x00000002 }, /* EOR */ +{ op_ab8_0_comp_ff, 2744, 0x00000002 }, /* EOR */ +{ op_ab9_0_comp_ff, 2745, 0x00000002 }, /* EOR */ +{ NULL, 2768, 0x00000000 }, /* CAS */ +{ NULL, 2776, 0x00000000 }, /* CAS */ +{ NULL, 2784, 0x00000000 }, /* CAS */ +{ NULL, 2792, 0x00000000 }, /* CAS */ +{ NULL, 2800, 0x00000000 }, /* CAS */ +{ NULL, 2808, 0x00000000 }, /* CAS */ +{ NULL, 2809, 0x00000000 }, /* CAS */ +{ op_c00_0_comp_ff, 3072, 0x00000002 }, /* CMP */ +{ op_c10_0_comp_ff, 3088, 0x00000002 }, /* CMP */ +{ op_c18_0_comp_ff, 3096, 0x00000002 }, /* CMP */ +{ op_c20_0_comp_ff, 3104, 0x00000002 }, /* CMP */ +{ op_c28_0_comp_ff, 3112, 0x00000002 }, /* CMP */ +{ op_c30_0_comp_ff, 3120, 0x00000002 }, /* CMP */ +{ op_c38_0_comp_ff, 3128, 0x00000002 }, /* CMP */ +{ op_c39_0_comp_ff, 3129, 0x00000002 }, /* CMP */ +{ op_c3a_0_comp_ff, 3130, 0x00000002 }, /* CMP */ +{ op_c3b_0_comp_ff, 3131, 0x00000002 }, /* CMP */ +{ op_c40_0_comp_ff, 3136, 0x00000002 }, /* CMP */ +{ op_c50_0_comp_ff, 3152, 0x00000002 }, /* CMP */ +{ op_c58_0_comp_ff, 3160, 0x00000002 }, /* CMP */ +{ op_c60_0_comp_ff, 3168, 0x00000002 }, /* CMP */ +{ op_c68_0_comp_ff, 3176, 0x00000002 }, /* CMP */ +{ op_c70_0_comp_ff, 3184, 0x00000002 }, /* CMP */ +{ op_c78_0_comp_ff, 3192, 0x00000002 }, /* CMP */ +{ op_c79_0_comp_ff, 3193, 0x00000002 }, /* CMP */ +{ op_c7a_0_comp_ff, 3194, 0x00000002 }, /* CMP */ +{ op_c7b_0_comp_ff, 3195, 0x00000002 }, /* CMP */ +{ op_c80_0_comp_ff, 3200, 0x00000002 }, /* CMP */ +{ op_c90_0_comp_ff, 3216, 0x00000002 }, /* CMP */ +{ op_c98_0_comp_ff, 3224, 0x00000002 }, /* CMP */ +{ op_ca0_0_comp_ff, 3232, 0x00000002 }, /* CMP */ +{ op_ca8_0_comp_ff, 3240, 0x00000002 }, /* CMP */ +{ op_cb0_0_comp_ff, 3248, 0x00000002 }, /* CMP */ +{ op_cb8_0_comp_ff, 3256, 0x00000002 }, /* CMP */ +{ op_cb9_0_comp_ff, 3257, 0x00000002 }, /* CMP */ +{ op_cba_0_comp_ff, 3258, 0x00000002 }, /* CMP */ +{ op_cbb_0_comp_ff, 3259, 0x00000002 }, /* CMP */ +{ NULL, 3280, 0x00000000 }, /* CAS */ +{ NULL, 3288, 0x00000000 }, /* CAS */ +{ NULL, 3296, 0x00000000 }, /* CAS */ +{ NULL, 3304, 0x00000000 }, /* CAS */ +{ NULL, 3312, 0x00000000 }, /* CAS */ +{ NULL, 3320, 0x00000000 }, /* CAS */ +{ NULL, 3321, 0x00000000 }, /* CAS */ +{ NULL, 3324, 0x00000000 }, /* CAS2 */ +{ NULL, 3600, 0x00000001 }, /* MOVES */ +{ NULL, 3608, 0x00000001 }, /* MOVES */ +{ NULL, 3616, 0x00000001 }, /* MOVES */ +{ NULL, 3624, 0x00000001 }, /* MOVES */ +{ NULL, 3632, 0x00000001 }, /* MOVES */ +{ NULL, 3640, 0x00000001 }, /* MOVES */ +{ NULL, 3641, 0x00000001 }, /* MOVES */ +{ NULL, 3664, 0x00000001 }, /* MOVES */ +{ NULL, 3672, 0x00000001 }, /* MOVES */ +{ NULL, 3680, 0x00000001 }, /* MOVES */ +{ NULL, 3688, 0x00000001 }, /* MOVES */ +{ NULL, 3696, 0x00000001 }, /* MOVES */ +{ NULL, 3704, 0x00000001 }, /* MOVES */ +{ NULL, 3705, 0x00000001 }, /* MOVES */ +{ NULL, 3728, 0x00000001 }, /* MOVES */ +{ NULL, 3736, 0x00000001 }, /* MOVES */ +{ NULL, 3744, 0x00000001 }, /* MOVES */ +{ NULL, 3752, 0x00000001 }, /* MOVES */ +{ NULL, 3760, 0x00000001 }, /* MOVES */ +{ NULL, 3768, 0x00000001 }, /* MOVES */ +{ NULL, 3769, 0x00000001 }, /* MOVES */ +{ NULL, 3792, 0x00000000 }, /* CAS */ +{ NULL, 3800, 0x00000000 }, /* CAS */ +{ NULL, 3808, 0x00000000 }, /* CAS */ +{ NULL, 3816, 0x00000000 }, /* CAS */ +{ NULL, 3824, 0x00000000 }, /* CAS */ +{ NULL, 3832, 0x00000000 }, /* CAS */ +{ NULL, 3833, 0x00000000 }, /* CAS */ +{ NULL, 3836, 0x00000000 }, /* CAS2 */ +{ op_1000_0_comp_ff, 4096, 0x00000000 }, /* MOVE */ +{ op_1010_0_comp_ff, 4112, 0x00000000 }, /* MOVE */ +{ op_1018_0_comp_ff, 4120, 0x00000000 }, /* MOVE */ +{ op_1020_0_comp_ff, 4128, 0x00000000 }, /* MOVE */ +{ op_1028_0_comp_ff, 4136, 0x00000002 }, /* MOVE */ +{ op_1030_0_comp_ff, 4144, 0x00000002 }, /* MOVE */ +{ op_1038_0_comp_ff, 4152, 0x00000002 }, /* MOVE */ +{ op_1039_0_comp_ff, 4153, 0x00000002 }, /* MOVE */ +{ op_103a_0_comp_ff, 4154, 0x00000002 }, /* MOVE */ +{ op_103b_0_comp_ff, 4155, 0x00000002 }, /* MOVE */ +{ op_103c_0_comp_ff, 4156, 0x00000002 }, /* MOVE */ +{ op_1080_0_comp_ff, 4224, 0x00000000 }, /* MOVE */ +{ op_1090_0_comp_ff, 4240, 0x00000000 }, /* MOVE */ +{ op_1098_0_comp_ff, 4248, 0x00000000 }, /* MOVE */ +{ op_10a0_0_comp_ff, 4256, 0x00000000 }, /* MOVE */ +{ op_10a8_0_comp_ff, 4264, 0x00000002 }, /* MOVE */ +{ op_10b0_0_comp_ff, 4272, 0x00000002 }, /* MOVE */ +{ op_10b8_0_comp_ff, 4280, 0x00000002 }, /* MOVE */ +{ op_10b9_0_comp_ff, 4281, 0x00000002 }, /* MOVE */ +{ op_10ba_0_comp_ff, 4282, 0x00000002 }, /* MOVE */ +{ op_10bb_0_comp_ff, 4283, 0x00000002 }, /* MOVE */ +{ op_10bc_0_comp_ff, 4284, 0x00000002 }, /* MOVE */ +{ op_10c0_0_comp_ff, 4288, 0x00000000 }, /* MOVE */ +{ op_10d0_0_comp_ff, 4304, 0x00000000 }, /* MOVE */ +{ op_10d8_0_comp_ff, 4312, 0x00000000 }, /* MOVE */ +{ op_10e0_0_comp_ff, 4320, 0x00000000 }, /* MOVE */ +{ op_10e8_0_comp_ff, 4328, 0x00000002 }, /* MOVE */ +{ op_10f0_0_comp_ff, 4336, 0x00000002 }, /* MOVE */ +{ op_10f8_0_comp_ff, 4344, 0x00000002 }, /* MOVE */ +{ op_10f9_0_comp_ff, 4345, 0x00000002 }, /* MOVE */ +{ op_10fa_0_comp_ff, 4346, 0x00000002 }, /* MOVE */ +{ op_10fb_0_comp_ff, 4347, 0x00000002 }, /* MOVE */ +{ op_10fc_0_comp_ff, 4348, 0x00000002 }, /* MOVE */ +{ op_1100_0_comp_ff, 4352, 0x00000000 }, /* MOVE */ +{ op_1110_0_comp_ff, 4368, 0x00000000 }, /* MOVE */ +{ op_1118_0_comp_ff, 4376, 0x00000000 }, /* MOVE */ +{ op_1120_0_comp_ff, 4384, 0x00000000 }, /* MOVE */ +{ op_1128_0_comp_ff, 4392, 0x00000002 }, /* MOVE */ +{ op_1130_0_comp_ff, 4400, 0x00000002 }, /* MOVE */ +{ op_1138_0_comp_ff, 4408, 0x00000002 }, /* MOVE */ +{ op_1139_0_comp_ff, 4409, 0x00000002 }, /* MOVE */ +{ op_113a_0_comp_ff, 4410, 0x00000002 }, /* MOVE */ +{ op_113b_0_comp_ff, 4411, 0x00000002 }, /* MOVE */ +{ op_113c_0_comp_ff, 4412, 0x00000002 }, /* MOVE */ +{ op_1140_0_comp_ff, 4416, 0x00000002 }, /* MOVE */ +{ op_1150_0_comp_ff, 4432, 0x00000002 }, /* MOVE */ +{ op_1158_0_comp_ff, 4440, 0x00000002 }, /* MOVE */ +{ op_1160_0_comp_ff, 4448, 0x00000002 }, /* MOVE */ +{ op_1168_0_comp_ff, 4456, 0x00000002 }, /* MOVE */ +{ op_1170_0_comp_ff, 4464, 0x00000002 }, /* MOVE */ +{ op_1178_0_comp_ff, 4472, 0x00000002 }, /* MOVE */ +{ op_1179_0_comp_ff, 4473, 0x00000002 }, /* MOVE */ +{ op_117a_0_comp_ff, 4474, 0x00000002 }, /* MOVE */ +{ op_117b_0_comp_ff, 4475, 0x00000002 }, /* MOVE */ +{ op_117c_0_comp_ff, 4476, 0x00000002 }, /* MOVE */ +{ op_1180_0_comp_ff, 4480, 0x00000002 }, /* MOVE */ +{ op_1190_0_comp_ff, 4496, 0x00000002 }, /* MOVE */ +{ op_1198_0_comp_ff, 4504, 0x00000002 }, /* MOVE */ +{ op_11a0_0_comp_ff, 4512, 0x00000002 }, /* MOVE */ +{ op_11a8_0_comp_ff, 4520, 0x00000002 }, /* MOVE */ +{ op_11b0_0_comp_ff, 4528, 0x00000002 }, /* MOVE */ +{ op_11b8_0_comp_ff, 4536, 0x00000002 }, /* MOVE */ +{ op_11b9_0_comp_ff, 4537, 0x00000002 }, /* MOVE */ +{ op_11ba_0_comp_ff, 4538, 0x00000002 }, /* MOVE */ +{ op_11bb_0_comp_ff, 4539, 0x00000002 }, /* MOVE */ +{ op_11bc_0_comp_ff, 4540, 0x00000002 }, /* MOVE */ +{ op_11c0_0_comp_ff, 4544, 0x00000002 }, /* MOVE */ +{ op_11d0_0_comp_ff, 4560, 0x00000002 }, /* MOVE */ +{ op_11d8_0_comp_ff, 4568, 0x00000002 }, /* MOVE */ +{ op_11e0_0_comp_ff, 4576, 0x00000002 }, /* MOVE */ +{ op_11e8_0_comp_ff, 4584, 0x00000002 }, /* MOVE */ +{ op_11f0_0_comp_ff, 4592, 0x00000002 }, /* MOVE */ +{ op_11f8_0_comp_ff, 4600, 0x00000002 }, /* MOVE */ +{ op_11f9_0_comp_ff, 4601, 0x00000002 }, /* MOVE */ +{ op_11fa_0_comp_ff, 4602, 0x00000002 }, /* MOVE */ +{ op_11fb_0_comp_ff, 4603, 0x00000002 }, /* MOVE */ +{ op_11fc_0_comp_ff, 4604, 0x00000002 }, /* MOVE */ +{ op_13c0_0_comp_ff, 5056, 0x00000002 }, /* MOVE */ +{ op_13d0_0_comp_ff, 5072, 0x00000002 }, /* MOVE */ +{ op_13d8_0_comp_ff, 5080, 0x00000002 }, /* MOVE */ +{ op_13e0_0_comp_ff, 5088, 0x00000002 }, /* MOVE */ +{ op_13e8_0_comp_ff, 5096, 0x00000002 }, /* MOVE */ +{ op_13f0_0_comp_ff, 5104, 0x00000002 }, /* MOVE */ +{ op_13f8_0_comp_ff, 5112, 0x00000002 }, /* MOVE */ +{ op_13f9_0_comp_ff, 5113, 0x00000002 }, /* MOVE */ +{ op_13fa_0_comp_ff, 5114, 0x00000002 }, /* MOVE */ +{ op_13fb_0_comp_ff, 5115, 0x00000002 }, /* MOVE */ +{ op_13fc_0_comp_ff, 5116, 0x00000002 }, /* MOVE */ +{ op_2000_0_comp_ff, 8192, 0x00000000 }, /* MOVE */ +{ op_2008_0_comp_ff, 8200, 0x00000000 }, /* MOVE */ +{ op_2010_0_comp_ff, 8208, 0x00000000 }, /* MOVE */ +{ op_2018_0_comp_ff, 8216, 0x00000000 }, /* MOVE */ +{ op_2020_0_comp_ff, 8224, 0x00000000 }, /* MOVE */ +{ op_2028_0_comp_ff, 8232, 0x00000002 }, /* MOVE */ +{ op_2030_0_comp_ff, 8240, 0x00000002 }, /* MOVE */ +{ op_2038_0_comp_ff, 8248, 0x00000002 }, /* MOVE */ +{ op_2039_0_comp_ff, 8249, 0x00000002 }, /* MOVE */ +{ op_203a_0_comp_ff, 8250, 0x00000002 }, /* MOVE */ +{ op_203b_0_comp_ff, 8251, 0x00000002 }, /* MOVE */ +{ op_203c_0_comp_ff, 8252, 0x00000002 }, /* MOVE */ +{ op_2040_0_comp_ff, 8256, 0x00000000 }, /* MOVEA */ +{ op_2048_0_comp_ff, 8264, 0x00000000 }, /* MOVEA */ +{ op_2050_0_comp_ff, 8272, 0x00000000 }, /* MOVEA */ +{ op_2058_0_comp_ff, 8280, 0x00000000 }, /* MOVEA */ +{ op_2060_0_comp_ff, 8288, 0x00000000 }, /* MOVEA */ +{ op_2068_0_comp_ff, 8296, 0x00000002 }, /* MOVEA */ +{ op_2070_0_comp_ff, 8304, 0x00000002 }, /* MOVEA */ +{ op_2078_0_comp_ff, 8312, 0x00000002 }, /* MOVEA */ +{ op_2079_0_comp_ff, 8313, 0x00000002 }, /* MOVEA */ +{ op_207a_0_comp_ff, 8314, 0x00000002 }, /* MOVEA */ +{ op_207b_0_comp_ff, 8315, 0x00000002 }, /* MOVEA */ +{ op_207c_0_comp_ff, 8316, 0x00000002 }, /* MOVEA */ +{ op_2080_0_comp_ff, 8320, 0x00000000 }, /* MOVE */ +{ op_2088_0_comp_ff, 8328, 0x00000000 }, /* MOVE */ +{ op_2090_0_comp_ff, 8336, 0x00000000 }, /* MOVE */ +{ op_2098_0_comp_ff, 8344, 0x00000000 }, /* MOVE */ +{ op_20a0_0_comp_ff, 8352, 0x00000000 }, /* MOVE */ +{ op_20a8_0_comp_ff, 8360, 0x00000002 }, /* MOVE */ +{ op_20b0_0_comp_ff, 8368, 0x00000002 }, /* MOVE */ +{ op_20b8_0_comp_ff, 8376, 0x00000002 }, /* MOVE */ +{ op_20b9_0_comp_ff, 8377, 0x00000002 }, /* MOVE */ +{ op_20ba_0_comp_ff, 8378, 0x00000002 }, /* MOVE */ +{ op_20bb_0_comp_ff, 8379, 0x00000002 }, /* MOVE */ +{ op_20bc_0_comp_ff, 8380, 0x00000002 }, /* MOVE */ +{ op_20c0_0_comp_ff, 8384, 0x00000000 }, /* MOVE */ +{ op_20c8_0_comp_ff, 8392, 0x00000000 }, /* MOVE */ +{ op_20d0_0_comp_ff, 8400, 0x00000000 }, /* MOVE */ +{ op_20d8_0_comp_ff, 8408, 0x00000000 }, /* MOVE */ +{ op_20e0_0_comp_ff, 8416, 0x00000000 }, /* MOVE */ +{ op_20e8_0_comp_ff, 8424, 0x00000002 }, /* MOVE */ +{ op_20f0_0_comp_ff, 8432, 0x00000002 }, /* MOVE */ +{ op_20f8_0_comp_ff, 8440, 0x00000002 }, /* MOVE */ +{ op_20f9_0_comp_ff, 8441, 0x00000002 }, /* MOVE */ +{ op_20fa_0_comp_ff, 8442, 0x00000002 }, /* MOVE */ +{ op_20fb_0_comp_ff, 8443, 0x00000002 }, /* MOVE */ +{ op_20fc_0_comp_ff, 8444, 0x00000002 }, /* MOVE */ +{ op_2100_0_comp_ff, 8448, 0x00000000 }, /* MOVE */ +{ op_2108_0_comp_ff, 8456, 0x00000000 }, /* MOVE */ +{ op_2110_0_comp_ff, 8464, 0x00000000 }, /* MOVE */ +{ op_2118_0_comp_ff, 8472, 0x00000000 }, /* MOVE */ +{ op_2120_0_comp_ff, 8480, 0x00000000 }, /* MOVE */ +{ op_2128_0_comp_ff, 8488, 0x00000002 }, /* MOVE */ +{ op_2130_0_comp_ff, 8496, 0x00000002 }, /* MOVE */ +{ op_2138_0_comp_ff, 8504, 0x00000002 }, /* MOVE */ +{ op_2139_0_comp_ff, 8505, 0x00000002 }, /* MOVE */ +{ op_213a_0_comp_ff, 8506, 0x00000002 }, /* MOVE */ +{ op_213b_0_comp_ff, 8507, 0x00000002 }, /* MOVE */ +{ op_213c_0_comp_ff, 8508, 0x00000002 }, /* MOVE */ +{ op_2140_0_comp_ff, 8512, 0x00000002 }, /* MOVE */ +{ op_2148_0_comp_ff, 8520, 0x00000002 }, /* MOVE */ +{ op_2150_0_comp_ff, 8528, 0x00000002 }, /* MOVE */ +{ op_2158_0_comp_ff, 8536, 0x00000002 }, /* MOVE */ +{ op_2160_0_comp_ff, 8544, 0x00000002 }, /* MOVE */ +{ op_2168_0_comp_ff, 8552, 0x00000002 }, /* MOVE */ +{ op_2170_0_comp_ff, 8560, 0x00000002 }, /* MOVE */ +{ op_2178_0_comp_ff, 8568, 0x00000002 }, /* MOVE */ +{ op_2179_0_comp_ff, 8569, 0x00000002 }, /* MOVE */ +{ op_217a_0_comp_ff, 8570, 0x00000002 }, /* MOVE */ +{ op_217b_0_comp_ff, 8571, 0x00000002 }, /* MOVE */ +{ op_217c_0_comp_ff, 8572, 0x00000002 }, /* MOVE */ +{ op_2180_0_comp_ff, 8576, 0x00000002 }, /* MOVE */ +{ op_2188_0_comp_ff, 8584, 0x00000002 }, /* MOVE */ +{ op_2190_0_comp_ff, 8592, 0x00000002 }, /* MOVE */ +{ op_2198_0_comp_ff, 8600, 0x00000002 }, /* MOVE */ +{ op_21a0_0_comp_ff, 8608, 0x00000002 }, /* MOVE */ +{ op_21a8_0_comp_ff, 8616, 0x00000002 }, /* MOVE */ +{ op_21b0_0_comp_ff, 8624, 0x00000002 }, /* MOVE */ +{ op_21b8_0_comp_ff, 8632, 0x00000002 }, /* MOVE */ +{ op_21b9_0_comp_ff, 8633, 0x00000002 }, /* MOVE */ +{ op_21ba_0_comp_ff, 8634, 0x00000002 }, /* MOVE */ +{ op_21bb_0_comp_ff, 8635, 0x00000002 }, /* MOVE */ +{ op_21bc_0_comp_ff, 8636, 0x00000002 }, /* MOVE */ +{ op_21c0_0_comp_ff, 8640, 0x00000002 }, /* MOVE */ +{ op_21c8_0_comp_ff, 8648, 0x00000002 }, /* MOVE */ +{ op_21d0_0_comp_ff, 8656, 0x00000002 }, /* MOVE */ +{ op_21d8_0_comp_ff, 8664, 0x00000002 }, /* MOVE */ +{ op_21e0_0_comp_ff, 8672, 0x00000002 }, /* MOVE */ +{ op_21e8_0_comp_ff, 8680, 0x00000002 }, /* MOVE */ +{ op_21f0_0_comp_ff, 8688, 0x00000002 }, /* MOVE */ +{ op_21f8_0_comp_ff, 8696, 0x00000002 }, /* MOVE */ +{ op_21f9_0_comp_ff, 8697, 0x00000002 }, /* MOVE */ +{ op_21fa_0_comp_ff, 8698, 0x00000002 }, /* MOVE */ +{ op_21fb_0_comp_ff, 8699, 0x00000002 }, /* MOVE */ +{ op_21fc_0_comp_ff, 8700, 0x00000002 }, /* MOVE */ +{ op_23c0_0_comp_ff, 9152, 0x00000002 }, /* MOVE */ +{ op_23c8_0_comp_ff, 9160, 0x00000002 }, /* MOVE */ +{ op_23d0_0_comp_ff, 9168, 0x00000002 }, /* MOVE */ +{ op_23d8_0_comp_ff, 9176, 0x00000002 }, /* MOVE */ +{ op_23e0_0_comp_ff, 9184, 0x00000002 }, /* MOVE */ +{ op_23e8_0_comp_ff, 9192, 0x00000002 }, /* MOVE */ +{ op_23f0_0_comp_ff, 9200, 0x00000002 }, /* MOVE */ +{ op_23f8_0_comp_ff, 9208, 0x00000002 }, /* MOVE */ +{ op_23f9_0_comp_ff, 9209, 0x00000002 }, /* MOVE */ +{ op_23fa_0_comp_ff, 9210, 0x00000002 }, /* MOVE */ +{ op_23fb_0_comp_ff, 9211, 0x00000002 }, /* MOVE */ +{ op_23fc_0_comp_ff, 9212, 0x00000002 }, /* MOVE */ +{ op_3000_0_comp_ff, 12288, 0x00000000 }, /* MOVE */ +{ op_3008_0_comp_ff, 12296, 0x00000000 }, /* MOVE */ +{ op_3010_0_comp_ff, 12304, 0x00000000 }, /* MOVE */ +{ op_3018_0_comp_ff, 12312, 0x00000000 }, /* MOVE */ +{ op_3020_0_comp_ff, 12320, 0x00000000 }, /* MOVE */ +{ op_3028_0_comp_ff, 12328, 0x00000002 }, /* MOVE */ +{ op_3030_0_comp_ff, 12336, 0x00000002 }, /* MOVE */ +{ op_3038_0_comp_ff, 12344, 0x00000002 }, /* MOVE */ +{ op_3039_0_comp_ff, 12345, 0x00000002 }, /* MOVE */ +{ op_303a_0_comp_ff, 12346, 0x00000002 }, /* MOVE */ +{ op_303b_0_comp_ff, 12347, 0x00000002 }, /* MOVE */ +{ op_303c_0_comp_ff, 12348, 0x00000002 }, /* MOVE */ +{ op_3040_0_comp_ff, 12352, 0x00000000 }, /* MOVEA */ +{ op_3048_0_comp_ff, 12360, 0x00000000 }, /* MOVEA */ +{ op_3050_0_comp_ff, 12368, 0x00000000 }, /* MOVEA */ +{ op_3058_0_comp_ff, 12376, 0x00000000 }, /* MOVEA */ +{ op_3060_0_comp_ff, 12384, 0x00000000 }, /* MOVEA */ +{ op_3068_0_comp_ff, 12392, 0x00000002 }, /* MOVEA */ +{ op_3070_0_comp_ff, 12400, 0x00000002 }, /* MOVEA */ +{ op_3078_0_comp_ff, 12408, 0x00000002 }, /* MOVEA */ +{ op_3079_0_comp_ff, 12409, 0x00000002 }, /* MOVEA */ +{ op_307a_0_comp_ff, 12410, 0x00000002 }, /* MOVEA */ +{ op_307b_0_comp_ff, 12411, 0x00000002 }, /* MOVEA */ +{ op_307c_0_comp_ff, 12412, 0x00000002 }, /* MOVEA */ +{ op_3080_0_comp_ff, 12416, 0x00000000 }, /* MOVE */ +{ op_3088_0_comp_ff, 12424, 0x00000000 }, /* MOVE */ +{ op_3090_0_comp_ff, 12432, 0x00000000 }, /* MOVE */ +{ op_3098_0_comp_ff, 12440, 0x00000000 }, /* MOVE */ +{ op_30a0_0_comp_ff, 12448, 0x00000000 }, /* MOVE */ +{ op_30a8_0_comp_ff, 12456, 0x00000002 }, /* MOVE */ +{ op_30b0_0_comp_ff, 12464, 0x00000002 }, /* MOVE */ +{ op_30b8_0_comp_ff, 12472, 0x00000002 }, /* MOVE */ +{ op_30b9_0_comp_ff, 12473, 0x00000002 }, /* MOVE */ +{ op_30ba_0_comp_ff, 12474, 0x00000002 }, /* MOVE */ +{ op_30bb_0_comp_ff, 12475, 0x00000002 }, /* MOVE */ +{ op_30bc_0_comp_ff, 12476, 0x00000002 }, /* MOVE */ +{ op_30c0_0_comp_ff, 12480, 0x00000000 }, /* MOVE */ +{ op_30c8_0_comp_ff, 12488, 0x00000000 }, /* MOVE */ +{ op_30d0_0_comp_ff, 12496, 0x00000000 }, /* MOVE */ +{ op_30d8_0_comp_ff, 12504, 0x00000000 }, /* MOVE */ +{ op_30e0_0_comp_ff, 12512, 0x00000000 }, /* MOVE */ +{ op_30e8_0_comp_ff, 12520, 0x00000002 }, /* MOVE */ +{ op_30f0_0_comp_ff, 12528, 0x00000002 }, /* MOVE */ +{ op_30f8_0_comp_ff, 12536, 0x00000002 }, /* MOVE */ +{ op_30f9_0_comp_ff, 12537, 0x00000002 }, /* MOVE */ +{ op_30fa_0_comp_ff, 12538, 0x00000002 }, /* MOVE */ +{ op_30fb_0_comp_ff, 12539, 0x00000002 }, /* MOVE */ +{ op_30fc_0_comp_ff, 12540, 0x00000002 }, /* MOVE */ +{ op_3100_0_comp_ff, 12544, 0x00000000 }, /* MOVE */ +{ op_3108_0_comp_ff, 12552, 0x00000000 }, /* MOVE */ +{ op_3110_0_comp_ff, 12560, 0x00000000 }, /* MOVE */ +{ op_3118_0_comp_ff, 12568, 0x00000000 }, /* MOVE */ +{ op_3120_0_comp_ff, 12576, 0x00000000 }, /* MOVE */ +{ op_3128_0_comp_ff, 12584, 0x00000002 }, /* MOVE */ +{ op_3130_0_comp_ff, 12592, 0x00000002 }, /* MOVE */ +{ op_3138_0_comp_ff, 12600, 0x00000002 }, /* MOVE */ +{ op_3139_0_comp_ff, 12601, 0x00000002 }, /* MOVE */ +{ op_313a_0_comp_ff, 12602, 0x00000002 }, /* MOVE */ +{ op_313b_0_comp_ff, 12603, 0x00000002 }, /* MOVE */ +{ op_313c_0_comp_ff, 12604, 0x00000002 }, /* MOVE */ +{ op_3140_0_comp_ff, 12608, 0x00000002 }, /* MOVE */ +{ op_3148_0_comp_ff, 12616, 0x00000002 }, /* MOVE */ +{ op_3150_0_comp_ff, 12624, 0x00000002 }, /* MOVE */ +{ op_3158_0_comp_ff, 12632, 0x00000002 }, /* MOVE */ +{ op_3160_0_comp_ff, 12640, 0x00000002 }, /* MOVE */ +{ op_3168_0_comp_ff, 12648, 0x00000002 }, /* MOVE */ +{ op_3170_0_comp_ff, 12656, 0x00000002 }, /* MOVE */ +{ op_3178_0_comp_ff, 12664, 0x00000002 }, /* MOVE */ +{ op_3179_0_comp_ff, 12665, 0x00000002 }, /* MOVE */ +{ op_317a_0_comp_ff, 12666, 0x00000002 }, /* MOVE */ +{ op_317b_0_comp_ff, 12667, 0x00000002 }, /* MOVE */ +{ op_317c_0_comp_ff, 12668, 0x00000002 }, /* MOVE */ +{ op_3180_0_comp_ff, 12672, 0x00000002 }, /* MOVE */ +{ op_3188_0_comp_ff, 12680, 0x00000002 }, /* MOVE */ +{ op_3190_0_comp_ff, 12688, 0x00000002 }, /* MOVE */ +{ op_3198_0_comp_ff, 12696, 0x00000002 }, /* MOVE */ +{ op_31a0_0_comp_ff, 12704, 0x00000002 }, /* MOVE */ +{ op_31a8_0_comp_ff, 12712, 0x00000002 }, /* MOVE */ +{ op_31b0_0_comp_ff, 12720, 0x00000002 }, /* MOVE */ +{ op_31b8_0_comp_ff, 12728, 0x00000002 }, /* MOVE */ +{ op_31b9_0_comp_ff, 12729, 0x00000002 }, /* MOVE */ +{ op_31ba_0_comp_ff, 12730, 0x00000002 }, /* MOVE */ +{ op_31bb_0_comp_ff, 12731, 0x00000002 }, /* MOVE */ +{ op_31bc_0_comp_ff, 12732, 0x00000002 }, /* MOVE */ +{ op_31c0_0_comp_ff, 12736, 0x00000002 }, /* MOVE */ +{ op_31c8_0_comp_ff, 12744, 0x00000002 }, /* MOVE */ +{ op_31d0_0_comp_ff, 12752, 0x00000002 }, /* MOVE */ +{ op_31d8_0_comp_ff, 12760, 0x00000002 }, /* MOVE */ +{ op_31e0_0_comp_ff, 12768, 0x00000002 }, /* MOVE */ +{ op_31e8_0_comp_ff, 12776, 0x00000002 }, /* MOVE */ +{ op_31f0_0_comp_ff, 12784, 0x00000002 }, /* MOVE */ +{ op_31f8_0_comp_ff, 12792, 0x00000002 }, /* MOVE */ +{ op_31f9_0_comp_ff, 12793, 0x00000002 }, /* MOVE */ +{ op_31fa_0_comp_ff, 12794, 0x00000002 }, /* MOVE */ +{ op_31fb_0_comp_ff, 12795, 0x00000002 }, /* MOVE */ +{ op_31fc_0_comp_ff, 12796, 0x00000002 }, /* MOVE */ +{ op_33c0_0_comp_ff, 13248, 0x00000002 }, /* MOVE */ +{ op_33c8_0_comp_ff, 13256, 0x00000002 }, /* MOVE */ +{ op_33d0_0_comp_ff, 13264, 0x00000002 }, /* MOVE */ +{ op_33d8_0_comp_ff, 13272, 0x00000002 }, /* MOVE */ +{ op_33e0_0_comp_ff, 13280, 0x00000002 }, /* MOVE */ +{ op_33e8_0_comp_ff, 13288, 0x00000002 }, /* MOVE */ +{ op_33f0_0_comp_ff, 13296, 0x00000002 }, /* MOVE */ +{ op_33f8_0_comp_ff, 13304, 0x00000002 }, /* MOVE */ +{ op_33f9_0_comp_ff, 13305, 0x00000002 }, /* MOVE */ +{ op_33fa_0_comp_ff, 13306, 0x00000002 }, /* MOVE */ +{ op_33fb_0_comp_ff, 13307, 0x00000002 }, /* MOVE */ +{ op_33fc_0_comp_ff, 13308, 0x00000002 }, /* MOVE */ +{ op_4000_0_comp_ff, 16384, 0x00000004 }, /* NEGX */ +{ op_4010_0_comp_ff, 16400, 0x00000004 }, /* NEGX */ +{ op_4018_0_comp_ff, 16408, 0x00000004 }, /* NEGX */ +{ op_4020_0_comp_ff, 16416, 0x00000004 }, /* NEGX */ +{ op_4028_0_comp_ff, 16424, 0x00000006 }, /* NEGX */ +{ op_4030_0_comp_ff, 16432, 0x00000006 }, /* NEGX */ +{ op_4038_0_comp_ff, 16440, 0x00000006 }, /* NEGX */ +{ op_4039_0_comp_ff, 16441, 0x00000006 }, /* NEGX */ +{ op_4040_0_comp_ff, 16448, 0x00000004 }, /* NEGX */ +{ op_4050_0_comp_ff, 16464, 0x00000004 }, /* NEGX */ +{ op_4058_0_comp_ff, 16472, 0x00000004 }, /* NEGX */ +{ op_4060_0_comp_ff, 16480, 0x00000004 }, /* NEGX */ +{ op_4068_0_comp_ff, 16488, 0x00000006 }, /* NEGX */ +{ op_4070_0_comp_ff, 16496, 0x00000006 }, /* NEGX */ +{ op_4078_0_comp_ff, 16504, 0x00000006 }, /* NEGX */ +{ op_4079_0_comp_ff, 16505, 0x00000006 }, /* NEGX */ +{ op_4080_0_comp_ff, 16512, 0x00000004 }, /* NEGX */ +{ op_4090_0_comp_ff, 16528, 0x00000004 }, /* NEGX */ +{ op_4098_0_comp_ff, 16536, 0x00000004 }, /* NEGX */ +{ op_40a0_0_comp_ff, 16544, 0x00000004 }, /* NEGX */ +{ op_40a8_0_comp_ff, 16552, 0x00000006 }, /* NEGX */ +{ op_40b0_0_comp_ff, 16560, 0x00000006 }, /* NEGX */ +{ op_40b8_0_comp_ff, 16568, 0x00000006 }, /* NEGX */ +{ op_40b9_0_comp_ff, 16569, 0x00000006 }, /* NEGX */ +{ NULL, 16576, 0x00000001 }, /* MVSR2 */ +{ NULL, 16592, 0x00000001 }, /* MVSR2 */ +{ NULL, 16600, 0x00000001 }, /* MVSR2 */ +{ NULL, 16608, 0x00000001 }, /* MVSR2 */ +{ NULL, 16616, 0x00000001 }, /* MVSR2 */ +{ NULL, 16624, 0x00000001 }, /* MVSR2 */ +{ NULL, 16632, 0x00000001 }, /* MVSR2 */ +{ NULL, 16633, 0x00000001 }, /* MVSR2 */ +{ NULL, 16640, 0x00000001 }, /* CHK */ +{ NULL, 16656, 0x00000001 }, /* CHK */ +{ NULL, 16664, 0x00000001 }, /* CHK */ +{ NULL, 16672, 0x00000001 }, /* CHK */ +{ NULL, 16680, 0x00000001 }, /* CHK */ +{ NULL, 16688, 0x00000001 }, /* CHK */ +{ NULL, 16696, 0x00000001 }, /* CHK */ +{ NULL, 16697, 0x00000001 }, /* CHK */ +{ NULL, 16698, 0x00000001 }, /* CHK */ +{ NULL, 16699, 0x00000001 }, /* CHK */ +{ NULL, 16700, 0x00000001 }, /* CHK */ +{ NULL, 16768, 0x00000001 }, /* CHK */ +{ NULL, 16784, 0x00000001 }, /* CHK */ +{ NULL, 16792, 0x00000001 }, /* CHK */ +{ NULL, 16800, 0x00000001 }, /* CHK */ +{ NULL, 16808, 0x00000001 }, /* CHK */ +{ NULL, 16816, 0x00000001 }, /* CHK */ +{ NULL, 16824, 0x00000001 }, /* CHK */ +{ NULL, 16825, 0x00000001 }, /* CHK */ +{ NULL, 16826, 0x00000001 }, /* CHK */ +{ NULL, 16827, 0x00000001 }, /* CHK */ +{ NULL, 16828, 0x00000001 }, /* CHK */ +{ op_41d0_0_comp_ff, 16848, 0x00000000 }, /* LEA */ +{ op_41e8_0_comp_ff, 16872, 0x00000002 }, /* LEA */ +{ op_41f0_0_comp_ff, 16880, 0x00000002 }, /* LEA */ +{ op_41f8_0_comp_ff, 16888, 0x00000002 }, /* LEA */ +{ op_41f9_0_comp_ff, 16889, 0x00000002 }, /* LEA */ +{ op_41fa_0_comp_ff, 16890, 0x00000002 }, /* LEA */ +{ op_41fb_0_comp_ff, 16891, 0x00000002 }, /* LEA */ +{ op_4200_0_comp_ff, 16896, 0x00000000 }, /* CLR */ +{ op_4210_0_comp_ff, 16912, 0x00000000 }, /* CLR */ +{ op_4218_0_comp_ff, 16920, 0x00000000 }, /* CLR */ +{ op_4220_0_comp_ff, 16928, 0x00000000 }, /* CLR */ +{ op_4228_0_comp_ff, 16936, 0x00000002 }, /* CLR */ +{ op_4230_0_comp_ff, 16944, 0x00000002 }, /* CLR */ +{ op_4238_0_comp_ff, 16952, 0x00000002 }, /* CLR */ +{ op_4239_0_comp_ff, 16953, 0x00000002 }, /* CLR */ +{ op_4240_0_comp_ff, 16960, 0x00000000 }, /* CLR */ +{ op_4250_0_comp_ff, 16976, 0x00000000 }, /* CLR */ +{ op_4258_0_comp_ff, 16984, 0x00000000 }, /* CLR */ +{ op_4260_0_comp_ff, 16992, 0x00000000 }, /* CLR */ +{ op_4268_0_comp_ff, 17000, 0x00000002 }, /* CLR */ +{ op_4270_0_comp_ff, 17008, 0x00000002 }, /* CLR */ +{ op_4278_0_comp_ff, 17016, 0x00000002 }, /* CLR */ +{ op_4279_0_comp_ff, 17017, 0x00000002 }, /* CLR */ +{ op_4280_0_comp_ff, 17024, 0x00000000 }, /* CLR */ +{ op_4290_0_comp_ff, 17040, 0x00000000 }, /* CLR */ +{ op_4298_0_comp_ff, 17048, 0x00000000 }, /* CLR */ +{ op_42a0_0_comp_ff, 17056, 0x00000000 }, /* CLR */ +{ op_42a8_0_comp_ff, 17064, 0x00000002 }, /* CLR */ +{ op_42b0_0_comp_ff, 17072, 0x00000002 }, /* CLR */ +{ op_42b8_0_comp_ff, 17080, 0x00000002 }, /* CLR */ +{ op_42b9_0_comp_ff, 17081, 0x00000002 }, /* CLR */ +{ NULL, 17088, 0x00000001 }, /* MVSR2 */ +{ NULL, 17104, 0x00000001 }, /* MVSR2 */ +{ NULL, 17112, 0x00000001 }, /* MVSR2 */ +{ NULL, 17120, 0x00000001 }, /* MVSR2 */ +{ NULL, 17128, 0x00000001 }, /* MVSR2 */ +{ NULL, 17136, 0x00000001 }, /* MVSR2 */ +{ NULL, 17144, 0x00000001 }, /* MVSR2 */ +{ NULL, 17145, 0x00000001 }, /* MVSR2 */ +{ op_4400_0_comp_ff, 17408, 0x00000000 }, /* NEG */ +{ op_4410_0_comp_ff, 17424, 0x00000000 }, /* NEG */ +{ op_4418_0_comp_ff, 17432, 0x00000000 }, /* NEG */ +{ op_4420_0_comp_ff, 17440, 0x00000000 }, /* NEG */ +{ op_4428_0_comp_ff, 17448, 0x00000002 }, /* NEG */ +{ op_4430_0_comp_ff, 17456, 0x00000002 }, /* NEG */ +{ op_4438_0_comp_ff, 17464, 0x00000002 }, /* NEG */ +{ op_4439_0_comp_ff, 17465, 0x00000002 }, /* NEG */ +{ op_4440_0_comp_ff, 17472, 0x00000000 }, /* NEG */ +{ op_4450_0_comp_ff, 17488, 0x00000000 }, /* NEG */ +{ op_4458_0_comp_ff, 17496, 0x00000000 }, /* NEG */ +{ op_4460_0_comp_ff, 17504, 0x00000000 }, /* NEG */ +{ op_4468_0_comp_ff, 17512, 0x00000002 }, /* NEG */ +{ op_4470_0_comp_ff, 17520, 0x00000002 }, /* NEG */ +{ op_4478_0_comp_ff, 17528, 0x00000002 }, /* NEG */ +{ op_4479_0_comp_ff, 17529, 0x00000002 }, /* NEG */ +{ op_4480_0_comp_ff, 17536, 0x00000000 }, /* NEG */ +{ op_4490_0_comp_ff, 17552, 0x00000000 }, /* NEG */ +{ op_4498_0_comp_ff, 17560, 0x00000000 }, /* NEG */ +{ op_44a0_0_comp_ff, 17568, 0x00000000 }, /* NEG */ +{ op_44a8_0_comp_ff, 17576, 0x00000002 }, /* NEG */ +{ op_44b0_0_comp_ff, 17584, 0x00000002 }, /* NEG */ +{ op_44b8_0_comp_ff, 17592, 0x00000002 }, /* NEG */ +{ op_44b9_0_comp_ff, 17593, 0x00000002 }, /* NEG */ +{ NULL, 17600, 0x00000001 }, /* MV2SR */ +{ NULL, 17616, 0x00000001 }, /* MV2SR */ +{ NULL, 17624, 0x00000001 }, /* MV2SR */ +{ NULL, 17632, 0x00000001 }, /* MV2SR */ +{ NULL, 17640, 0x00000001 }, /* MV2SR */ +{ NULL, 17648, 0x00000001 }, /* MV2SR */ +{ NULL, 17656, 0x00000001 }, /* MV2SR */ +{ NULL, 17657, 0x00000001 }, /* MV2SR */ +{ NULL, 17658, 0x00000001 }, /* MV2SR */ +{ NULL, 17659, 0x00000001 }, /* MV2SR */ +{ NULL, 17660, 0x00000001 }, /* MV2SR */ +{ op_4600_0_comp_ff, 17920, 0x00000000 }, /* NOT */ +{ op_4610_0_comp_ff, 17936, 0x00000000 }, /* NOT */ +{ op_4618_0_comp_ff, 17944, 0x00000000 }, /* NOT */ +{ op_4620_0_comp_ff, 17952, 0x00000000 }, /* NOT */ +{ op_4628_0_comp_ff, 17960, 0x00000002 }, /* NOT */ +{ op_4630_0_comp_ff, 17968, 0x00000002 }, /* NOT */ +{ op_4638_0_comp_ff, 17976, 0x00000002 }, /* NOT */ +{ op_4639_0_comp_ff, 17977, 0x00000002 }, /* NOT */ +{ op_4640_0_comp_ff, 17984, 0x00000000 }, /* NOT */ +{ op_4650_0_comp_ff, 18000, 0x00000000 }, /* NOT */ +{ op_4658_0_comp_ff, 18008, 0x00000000 }, /* NOT */ +{ op_4660_0_comp_ff, 18016, 0x00000000 }, /* NOT */ +{ op_4668_0_comp_ff, 18024, 0x00000002 }, /* NOT */ +{ op_4670_0_comp_ff, 18032, 0x00000002 }, /* NOT */ +{ op_4678_0_comp_ff, 18040, 0x00000002 }, /* NOT */ +{ op_4679_0_comp_ff, 18041, 0x00000002 }, /* NOT */ +{ op_4680_0_comp_ff, 18048, 0x00000000 }, /* NOT */ +{ op_4690_0_comp_ff, 18064, 0x00000000 }, /* NOT */ +{ op_4698_0_comp_ff, 18072, 0x00000000 }, /* NOT */ +{ op_46a0_0_comp_ff, 18080, 0x00000000 }, /* NOT */ +{ op_46a8_0_comp_ff, 18088, 0x00000002 }, /* NOT */ +{ op_46b0_0_comp_ff, 18096, 0x00000002 }, /* NOT */ +{ op_46b8_0_comp_ff, 18104, 0x00000002 }, /* NOT */ +{ op_46b9_0_comp_ff, 18105, 0x00000002 }, /* NOT */ +{ NULL, 18112, 0x00000001 }, /* MV2SR */ +{ NULL, 18128, 0x00000001 }, /* MV2SR */ +{ NULL, 18136, 0x00000001 }, /* MV2SR */ +{ NULL, 18144, 0x00000001 }, /* MV2SR */ +{ NULL, 18152, 0x00000001 }, /* MV2SR */ +{ NULL, 18160, 0x00000001 }, /* MV2SR */ +{ NULL, 18168, 0x00000001 }, /* MV2SR */ +{ NULL, 18169, 0x00000001 }, /* MV2SR */ +{ NULL, 18170, 0x00000001 }, /* MV2SR */ +{ NULL, 18171, 0x00000001 }, /* MV2SR */ +{ NULL, 18172, 0x00000001 }, /* MV2SR */ +{ NULL, 18432, 0x00000000 }, /* NBCD */ +{ op_4808_0_comp_ff, 18440, 0x00000002 }, /* LINK */ +{ NULL, 18448, 0x00000000 }, /* NBCD */ +{ NULL, 18456, 0x00000000 }, /* NBCD */ +{ NULL, 18464, 0x00000000 }, /* NBCD */ +{ NULL, 18472, 0x00000000 }, /* NBCD */ +{ NULL, 18480, 0x00000000 }, /* NBCD */ +{ NULL, 18488, 0x00000000 }, /* NBCD */ +{ NULL, 18489, 0x00000000 }, /* NBCD */ +{ op_4840_0_comp_ff, 18496, 0x00000000 }, /* SWAP */ +{ NULL, 18504, 0x00000001 }, /* BKPT */ +{ op_4850_0_comp_ff, 18512, 0x00000000 }, /* PEA */ +{ op_4868_0_comp_ff, 18536, 0x00000002 }, /* PEA */ +{ op_4870_0_comp_ff, 18544, 0x00000002 }, /* PEA */ +{ op_4878_0_comp_ff, 18552, 0x00000002 }, /* PEA */ +{ op_4879_0_comp_ff, 18553, 0x00000002 }, /* PEA */ +{ op_487a_0_comp_ff, 18554, 0x00000002 }, /* PEA */ +{ op_487b_0_comp_ff, 18555, 0x00000002 }, /* PEA */ +{ op_4880_0_comp_ff, 18560, 0x00000000 }, /* EXT */ +{ op_4890_0_comp_ff, 18576, 0x00000002 }, /* MVMLE */ +{ op_48a0_0_comp_ff, 18592, 0x00000002 }, /* MVMLE */ +{ op_48a8_0_comp_ff, 18600, 0x00000002 }, /* MVMLE */ +{ op_48b0_0_comp_ff, 18608, 0x00000002 }, /* MVMLE */ +{ op_48b8_0_comp_ff, 18616, 0x00000002 }, /* MVMLE */ +{ op_48b9_0_comp_ff, 18617, 0x00000002 }, /* MVMLE */ +{ op_48c0_0_comp_ff, 18624, 0x00000000 }, /* EXT */ +{ op_48d0_0_comp_ff, 18640, 0x00000002 }, /* MVMLE */ +{ op_48e0_0_comp_ff, 18656, 0x00000002 }, /* MVMLE */ +{ op_48e8_0_comp_ff, 18664, 0x00000002 }, /* MVMLE */ +{ op_48f0_0_comp_ff, 18672, 0x00000002 }, /* MVMLE */ +{ op_48f8_0_comp_ff, 18680, 0x00000002 }, /* MVMLE */ +{ op_48f9_0_comp_ff, 18681, 0x00000002 }, /* MVMLE */ +{ op_49c0_0_comp_ff, 18880, 0x00000000 }, /* EXT */ +{ op_4a00_0_comp_ff, 18944, 0x00000000 }, /* TST */ +{ op_4a10_0_comp_ff, 18960, 0x00000000 }, /* TST */ +{ op_4a18_0_comp_ff, 18968, 0x00000000 }, /* TST */ +{ op_4a20_0_comp_ff, 18976, 0x00000000 }, /* TST */ +{ op_4a28_0_comp_ff, 18984, 0x00000002 }, /* TST */ +{ op_4a30_0_comp_ff, 18992, 0x00000002 }, /* TST */ +{ op_4a38_0_comp_ff, 19000, 0x00000002 }, /* TST */ +{ op_4a39_0_comp_ff, 19001, 0x00000002 }, /* TST */ +{ op_4a3a_0_comp_ff, 19002, 0x00000002 }, /* TST */ +{ op_4a3b_0_comp_ff, 19003, 0x00000002 }, /* TST */ +{ op_4a3c_0_comp_ff, 19004, 0x00000002 }, /* TST */ +{ op_4a40_0_comp_ff, 19008, 0x00000000 }, /* TST */ +{ op_4a48_0_comp_ff, 19016, 0x00000000 }, /* TST */ +{ op_4a50_0_comp_ff, 19024, 0x00000000 }, /* TST */ +{ op_4a58_0_comp_ff, 19032, 0x00000000 }, /* TST */ +{ op_4a60_0_comp_ff, 19040, 0x00000000 }, /* TST */ +{ op_4a68_0_comp_ff, 19048, 0x00000002 }, /* TST */ +{ op_4a70_0_comp_ff, 19056, 0x00000002 }, /* TST */ +{ op_4a78_0_comp_ff, 19064, 0x00000002 }, /* TST */ +{ op_4a79_0_comp_ff, 19065, 0x00000002 }, /* TST */ +{ op_4a7a_0_comp_ff, 19066, 0x00000002 }, /* TST */ +{ op_4a7b_0_comp_ff, 19067, 0x00000002 }, /* TST */ +{ op_4a7c_0_comp_ff, 19068, 0x00000002 }, /* TST */ +{ op_4a80_0_comp_ff, 19072, 0x00000000 }, /* TST */ +{ op_4a88_0_comp_ff, 19080, 0x00000000 }, /* TST */ +{ op_4a90_0_comp_ff, 19088, 0x00000000 }, /* TST */ +{ op_4a98_0_comp_ff, 19096, 0x00000000 }, /* TST */ +{ op_4aa0_0_comp_ff, 19104, 0x00000000 }, /* TST */ +{ op_4aa8_0_comp_ff, 19112, 0x00000002 }, /* TST */ +{ op_4ab0_0_comp_ff, 19120, 0x00000002 }, /* TST */ +{ op_4ab8_0_comp_ff, 19128, 0x00000002 }, /* TST */ +{ op_4ab9_0_comp_ff, 19129, 0x00000002 }, /* TST */ +{ op_4aba_0_comp_ff, 19130, 0x00000002 }, /* TST */ +{ op_4abb_0_comp_ff, 19131, 0x00000002 }, /* TST */ +{ op_4abc_0_comp_ff, 19132, 0x00000002 }, /* TST */ +{ NULL, 19136, 0x00000000 }, /* TAS */ +{ NULL, 19152, 0x00000000 }, /* TAS */ +{ NULL, 19160, 0x00000000 }, /* TAS */ +{ NULL, 19168, 0x00000000 }, /* TAS */ +{ NULL, 19176, 0x00000000 }, /* TAS */ +{ NULL, 19184, 0x00000000 }, /* TAS */ +{ NULL, 19192, 0x00000000 }, /* TAS */ +{ NULL, 19193, 0x00000000 }, /* TAS */ +{ NULL, 19456, 0x00000000 }, /* MULL */ +{ NULL, 19472, 0x00000000 }, /* MULL */ +{ NULL, 19480, 0x00000000 }, /* MULL */ +{ NULL, 19488, 0x00000000 }, /* MULL */ +{ NULL, 19496, 0x00000000 }, /* MULL */ +{ NULL, 19504, 0x00000000 }, /* MULL */ +{ NULL, 19512, 0x00000000 }, /* MULL */ +{ NULL, 19513, 0x00000000 }, /* MULL */ +{ NULL, 19514, 0x00000000 }, /* MULL */ +{ NULL, 19515, 0x00000000 }, /* MULL */ +{ NULL, 19516, 0x00000000 }, /* MULL */ +{ NULL, 19520, 0x00000001 }, /* DIVL */ +{ NULL, 19536, 0x00000001 }, /* DIVL */ +{ NULL, 19544, 0x00000001 }, /* DIVL */ +{ NULL, 19552, 0x00000001 }, /* DIVL */ +{ NULL, 19560, 0x00000001 }, /* DIVL */ +{ NULL, 19568, 0x00000001 }, /* DIVL */ +{ NULL, 19576, 0x00000001 }, /* DIVL */ +{ NULL, 19577, 0x00000001 }, /* DIVL */ +{ NULL, 19578, 0x00000001 }, /* DIVL */ +{ NULL, 19579, 0x00000001 }, /* DIVL */ +{ NULL, 19580, 0x00000001 }, /* DIVL */ +{ op_4c90_0_comp_ff, 19600, 0x00000002 }, /* MVMEL */ +{ op_4c98_0_comp_ff, 19608, 0x00000002 }, /* MVMEL */ +{ op_4ca8_0_comp_ff, 19624, 0x00000002 }, /* MVMEL */ +{ op_4cb0_0_comp_ff, 19632, 0x00000002 }, /* MVMEL */ +{ op_4cb8_0_comp_ff, 19640, 0x00000002 }, /* MVMEL */ +{ op_4cb9_0_comp_ff, 19641, 0x00000002 }, /* MVMEL */ +{ op_4cba_0_comp_ff, 19642, 0x00000002 }, /* MVMEL */ +{ op_4cbb_0_comp_ff, 19643, 0x00000002 }, /* MVMEL */ +{ op_4cd0_0_comp_ff, 19664, 0x00000002 }, /* MVMEL */ +{ op_4cd8_0_comp_ff, 19672, 0x00000002 }, /* MVMEL */ +{ op_4ce8_0_comp_ff, 19688, 0x00000002 }, /* MVMEL */ +{ op_4cf0_0_comp_ff, 19696, 0x00000002 }, /* MVMEL */ +{ op_4cf8_0_comp_ff, 19704, 0x00000002 }, /* MVMEL */ +{ op_4cf9_0_comp_ff, 19705, 0x00000002 }, /* MVMEL */ +{ op_4cfa_0_comp_ff, 19706, 0x00000002 }, /* MVMEL */ +{ op_4cfb_0_comp_ff, 19707, 0x00000002 }, /* MVMEL */ +{ NULL, 20032, 0x00000001 }, /* TRAP */ +{ op_4e50_0_comp_ff, 20048, 0x00000002 }, /* LINK */ +{ op_4e58_0_comp_ff, 20056, 0x00000000 }, /* UNLK */ +{ NULL, 20064, 0x00000001 }, /* MVR2USP */ +{ NULL, 20072, 0x00000001 }, /* MVUSP2R */ +{ NULL, 20080, 0x00000001 }, /* RESET */ +{ op_4e71_0_comp_ff, 20081, 0x00000000 }, /* NOP */ +{ NULL, 20082, 0x00000001 }, /* STOP */ +{ NULL, 20083, 0x00000001 }, /* RTE */ +{ op_4e74_0_comp_ff, 20084, 0x00000003 }, /* RTD */ +{ op_4e75_0_comp_ff, 20085, 0x00000001 }, /* RTS */ +{ NULL, 20086, 0x00000001 }, /* TRAPV */ +{ NULL, 20087, 0x00000001 }, /* RTR */ +{ NULL, 20090, 0x00000001 }, /* MOVEC2 */ +{ NULL, 20091, 0x00000001 }, /* MOVE2C */ +{ op_4e90_0_comp_ff, 20112, 0x00000001 }, /* JSR */ +{ op_4ea8_0_comp_ff, 20136, 0x00000003 }, /* JSR */ +{ op_4eb0_0_comp_ff, 20144, 0x00000003 }, /* JSR */ +{ op_4eb8_0_comp_ff, 20152, 0x00000003 }, /* JSR */ +{ op_4eb9_0_comp_ff, 20153, 0x00000003 }, /* JSR */ +{ op_4eba_0_comp_ff, 20154, 0x00000003 }, /* JSR */ +{ op_4ebb_0_comp_ff, 20155, 0x00000003 }, /* JSR */ +{ op_4ed0_0_comp_ff, 20176, 0x00000001 }, /* JMP */ +{ op_4ee8_0_comp_ff, 20200, 0x00000003 }, /* JMP */ +{ op_4ef0_0_comp_ff, 20208, 0x00000003 }, /* JMP */ +{ op_4ef8_0_comp_ff, 20216, 0x00000003 }, /* JMP */ +{ op_4ef9_0_comp_ff, 20217, 0x00000003 }, /* JMP */ +{ op_4efa_0_comp_ff, 20218, 0x00000003 }, /* JMP */ +{ op_4efb_0_comp_ff, 20219, 0x00000003 }, /* JMP */ +{ op_5000_0_comp_ff, 20480, 0x00000000 }, /* ADD */ +{ op_5010_0_comp_ff, 20496, 0x00000000 }, /* ADD */ +{ op_5018_0_comp_ff, 20504, 0x00000000 }, /* ADD */ +{ op_5020_0_comp_ff, 20512, 0x00000000 }, /* ADD */ +{ op_5028_0_comp_ff, 20520, 0x00000002 }, /* ADD */ +{ op_5030_0_comp_ff, 20528, 0x00000002 }, /* ADD */ +{ op_5038_0_comp_ff, 20536, 0x00000002 }, /* ADD */ +{ op_5039_0_comp_ff, 20537, 0x00000002 }, /* ADD */ +{ op_5040_0_comp_ff, 20544, 0x00000000 }, /* ADD */ +{ op_5048_0_comp_ff, 20552, 0x00000000 }, /* ADDA */ +{ op_5050_0_comp_ff, 20560, 0x00000000 }, /* ADD */ +{ op_5058_0_comp_ff, 20568, 0x00000000 }, /* ADD */ +{ op_5060_0_comp_ff, 20576, 0x00000000 }, /* ADD */ +{ op_5068_0_comp_ff, 20584, 0x00000002 }, /* ADD */ +{ op_5070_0_comp_ff, 20592, 0x00000002 }, /* ADD */ +{ op_5078_0_comp_ff, 20600, 0x00000002 }, /* ADD */ +{ op_5079_0_comp_ff, 20601, 0x00000002 }, /* ADD */ +{ op_5080_0_comp_ff, 20608, 0x00000000 }, /* ADD */ +{ op_5088_0_comp_ff, 20616, 0x00000000 }, /* ADDA */ +{ op_5090_0_comp_ff, 20624, 0x00000000 }, /* ADD */ +{ op_5098_0_comp_ff, 20632, 0x00000000 }, /* ADD */ +{ op_50a0_0_comp_ff, 20640, 0x00000000 }, /* ADD */ +{ op_50a8_0_comp_ff, 20648, 0x00000002 }, /* ADD */ +{ op_50b0_0_comp_ff, 20656, 0x00000002 }, /* ADD */ +{ op_50b8_0_comp_ff, 20664, 0x00000002 }, /* ADD */ +{ op_50b9_0_comp_ff, 20665, 0x00000002 }, /* ADD */ +{ op_50c0_0_comp_ff, 20672, 0x00000000 }, /* Scc */ +{ op_50c8_0_comp_ff, 20680, 0x00000007 }, /* DBcc */ +{ op_50d0_0_comp_ff, 20688, 0x00000000 }, /* Scc */ +{ op_50d8_0_comp_ff, 20696, 0x00000000 }, /* Scc */ +{ op_50e0_0_comp_ff, 20704, 0x00000000 }, /* Scc */ +{ op_50e8_0_comp_ff, 20712, 0x00000002 }, /* Scc */ +{ op_50f0_0_comp_ff, 20720, 0x00000002 }, /* Scc */ +{ op_50f8_0_comp_ff, 20728, 0x00000002 }, /* Scc */ +{ op_50f9_0_comp_ff, 20729, 0x00000002 }, /* Scc */ +{ NULL, 20730, 0x00000001 }, /* TRAPcc */ +{ NULL, 20731, 0x00000001 }, /* TRAPcc */ +{ NULL, 20732, 0x00000001 }, /* TRAPcc */ +{ op_5100_0_comp_ff, 20736, 0x00000000 }, /* SUB */ +{ op_5110_0_comp_ff, 20752, 0x00000000 }, /* SUB */ +{ op_5118_0_comp_ff, 20760, 0x00000000 }, /* SUB */ +{ op_5120_0_comp_ff, 20768, 0x00000000 }, /* SUB */ +{ op_5128_0_comp_ff, 20776, 0x00000002 }, /* SUB */ +{ op_5130_0_comp_ff, 20784, 0x00000002 }, /* SUB */ +{ op_5138_0_comp_ff, 20792, 0x00000002 }, /* SUB */ +{ op_5139_0_comp_ff, 20793, 0x00000002 }, /* SUB */ +{ op_5140_0_comp_ff, 20800, 0x00000000 }, /* SUB */ +{ op_5148_0_comp_ff, 20808, 0x00000000 }, /* SUBA */ +{ op_5150_0_comp_ff, 20816, 0x00000000 }, /* SUB */ +{ op_5158_0_comp_ff, 20824, 0x00000000 }, /* SUB */ +{ op_5160_0_comp_ff, 20832, 0x00000000 }, /* SUB */ +{ op_5168_0_comp_ff, 20840, 0x00000002 }, /* SUB */ +{ op_5170_0_comp_ff, 20848, 0x00000002 }, /* SUB */ +{ op_5178_0_comp_ff, 20856, 0x00000002 }, /* SUB */ +{ op_5179_0_comp_ff, 20857, 0x00000002 }, /* SUB */ +{ op_5180_0_comp_ff, 20864, 0x00000000 }, /* SUB */ +{ op_5188_0_comp_ff, 20872, 0x00000000 }, /* SUBA */ +{ op_5190_0_comp_ff, 20880, 0x00000000 }, /* SUB */ +{ op_5198_0_comp_ff, 20888, 0x00000000 }, /* SUB */ +{ op_51a0_0_comp_ff, 20896, 0x00000000 }, /* SUB */ +{ op_51a8_0_comp_ff, 20904, 0x00000002 }, /* SUB */ +{ op_51b0_0_comp_ff, 20912, 0x00000002 }, /* SUB */ +{ op_51b8_0_comp_ff, 20920, 0x00000002 }, /* SUB */ +{ op_51b9_0_comp_ff, 20921, 0x00000002 }, /* SUB */ +{ op_51c0_0_comp_ff, 20928, 0x00000000 }, /* Scc */ +{ op_51c8_0_comp_ff, 20936, 0x00000007 }, /* DBcc */ +{ op_51d0_0_comp_ff, 20944, 0x00000000 }, /* Scc */ +{ op_51d8_0_comp_ff, 20952, 0x00000000 }, /* Scc */ +{ op_51e0_0_comp_ff, 20960, 0x00000000 }, /* Scc */ +{ op_51e8_0_comp_ff, 20968, 0x00000002 }, /* Scc */ +{ op_51f0_0_comp_ff, 20976, 0x00000002 }, /* Scc */ +{ op_51f8_0_comp_ff, 20984, 0x00000002 }, /* Scc */ +{ op_51f9_0_comp_ff, 20985, 0x00000002 }, /* Scc */ +{ NULL, 20986, 0x00000001 }, /* TRAPcc */ +{ NULL, 20987, 0x00000001 }, /* TRAPcc */ +{ NULL, 20988, 0x00000001 }, /* TRAPcc */ +{ op_52c0_0_comp_ff, 21184, 0x00000000 }, /* Scc */ +{ op_52c8_0_comp_ff, 21192, 0x00000007 }, /* DBcc */ +{ op_52d0_0_comp_ff, 21200, 0x00000000 }, /* Scc */ +{ op_52d8_0_comp_ff, 21208, 0x00000000 }, /* Scc */ +{ op_52e0_0_comp_ff, 21216, 0x00000000 }, /* Scc */ +{ op_52e8_0_comp_ff, 21224, 0x00000002 }, /* Scc */ +{ op_52f0_0_comp_ff, 21232, 0x00000002 }, /* Scc */ +{ op_52f8_0_comp_ff, 21240, 0x00000002 }, /* Scc */ +{ op_52f9_0_comp_ff, 21241, 0x00000002 }, /* Scc */ +{ NULL, 21242, 0x00000001 }, /* TRAPcc */ +{ NULL, 21243, 0x00000001 }, /* TRAPcc */ +{ NULL, 21244, 0x00000001 }, /* TRAPcc */ +{ op_53c0_0_comp_ff, 21440, 0x00000000 }, /* Scc */ +{ op_53c8_0_comp_ff, 21448, 0x00000007 }, /* DBcc */ +{ op_53d0_0_comp_ff, 21456, 0x00000000 }, /* Scc */ +{ op_53d8_0_comp_ff, 21464, 0x00000000 }, /* Scc */ +{ op_53e0_0_comp_ff, 21472, 0x00000000 }, /* Scc */ +{ op_53e8_0_comp_ff, 21480, 0x00000002 }, /* Scc */ +{ op_53f0_0_comp_ff, 21488, 0x00000002 }, /* Scc */ +{ op_53f8_0_comp_ff, 21496, 0x00000002 }, /* Scc */ +{ op_53f9_0_comp_ff, 21497, 0x00000002 }, /* Scc */ +{ NULL, 21498, 0x00000001 }, /* TRAPcc */ +{ NULL, 21499, 0x00000001 }, /* TRAPcc */ +{ NULL, 21500, 0x00000001 }, /* TRAPcc */ +{ op_54c0_0_comp_ff, 21696, 0x00000000 }, /* Scc */ +{ op_54c8_0_comp_ff, 21704, 0x00000007 }, /* DBcc */ +{ op_54d0_0_comp_ff, 21712, 0x00000000 }, /* Scc */ +{ op_54d8_0_comp_ff, 21720, 0x00000000 }, /* Scc */ +{ op_54e0_0_comp_ff, 21728, 0x00000000 }, /* Scc */ +{ op_54e8_0_comp_ff, 21736, 0x00000002 }, /* Scc */ +{ op_54f0_0_comp_ff, 21744, 0x00000002 }, /* Scc */ +{ op_54f8_0_comp_ff, 21752, 0x00000002 }, /* Scc */ +{ op_54f9_0_comp_ff, 21753, 0x00000002 }, /* Scc */ +{ NULL, 21754, 0x00000001 }, /* TRAPcc */ +{ NULL, 21755, 0x00000001 }, /* TRAPcc */ +{ NULL, 21756, 0x00000001 }, /* TRAPcc */ +{ op_55c0_0_comp_ff, 21952, 0x00000000 }, /* Scc */ +{ op_55c8_0_comp_ff, 21960, 0x00000007 }, /* DBcc */ +{ op_55d0_0_comp_ff, 21968, 0x00000000 }, /* Scc */ +{ op_55d8_0_comp_ff, 21976, 0x00000000 }, /* Scc */ +{ op_55e0_0_comp_ff, 21984, 0x00000000 }, /* Scc */ +{ op_55e8_0_comp_ff, 21992, 0x00000002 }, /* Scc */ +{ op_55f0_0_comp_ff, 22000, 0x00000002 }, /* Scc */ +{ op_55f8_0_comp_ff, 22008, 0x00000002 }, /* Scc */ +{ op_55f9_0_comp_ff, 22009, 0x00000002 }, /* Scc */ +{ NULL, 22010, 0x00000001 }, /* TRAPcc */ +{ NULL, 22011, 0x00000001 }, /* TRAPcc */ +{ NULL, 22012, 0x00000001 }, /* TRAPcc */ +{ op_56c0_0_comp_ff, 22208, 0x00000000 }, /* Scc */ +{ op_56c8_0_comp_ff, 22216, 0x00000007 }, /* DBcc */ +{ op_56d0_0_comp_ff, 22224, 0x00000000 }, /* Scc */ +{ op_56d8_0_comp_ff, 22232, 0x00000000 }, /* Scc */ +{ op_56e0_0_comp_ff, 22240, 0x00000000 }, /* Scc */ +{ op_56e8_0_comp_ff, 22248, 0x00000002 }, /* Scc */ +{ op_56f0_0_comp_ff, 22256, 0x00000002 }, /* Scc */ +{ op_56f8_0_comp_ff, 22264, 0x00000002 }, /* Scc */ +{ op_56f9_0_comp_ff, 22265, 0x00000002 }, /* Scc */ +{ NULL, 22266, 0x00000001 }, /* TRAPcc */ +{ NULL, 22267, 0x00000001 }, /* TRAPcc */ +{ NULL, 22268, 0x00000001 }, /* TRAPcc */ +{ op_57c0_0_comp_ff, 22464, 0x00000000 }, /* Scc */ +{ op_57c8_0_comp_ff, 22472, 0x00000007 }, /* DBcc */ +{ op_57d0_0_comp_ff, 22480, 0x00000000 }, /* Scc */ +{ op_57d8_0_comp_ff, 22488, 0x00000000 }, /* Scc */ +{ op_57e0_0_comp_ff, 22496, 0x00000000 }, /* Scc */ +{ op_57e8_0_comp_ff, 22504, 0x00000002 }, /* Scc */ +{ op_57f0_0_comp_ff, 22512, 0x00000002 }, /* Scc */ +{ op_57f8_0_comp_ff, 22520, 0x00000002 }, /* Scc */ +{ op_57f9_0_comp_ff, 22521, 0x00000002 }, /* Scc */ +{ NULL, 22522, 0x00000001 }, /* TRAPcc */ +{ NULL, 22523, 0x00000001 }, /* TRAPcc */ +{ NULL, 22524, 0x00000001 }, /* TRAPcc */ +{ NULL, 22720, 0x00000000 }, /* Scc */ +{ NULL, 22728, 0x00000007 }, /* DBcc */ +{ NULL, 22736, 0x00000000 }, /* Scc */ +{ NULL, 22744, 0x00000000 }, /* Scc */ +{ NULL, 22752, 0x00000000 }, /* Scc */ +{ NULL, 22760, 0x00000002 }, /* Scc */ +{ NULL, 22768, 0x00000002 }, /* Scc */ +{ NULL, 22776, 0x00000002 }, /* Scc */ +{ NULL, 22777, 0x00000002 }, /* Scc */ +{ NULL, 22778, 0x00000001 }, /* TRAPcc */ +{ NULL, 22779, 0x00000001 }, /* TRAPcc */ +{ NULL, 22780, 0x00000001 }, /* TRAPcc */ +{ NULL, 22976, 0x00000000 }, /* Scc */ +{ NULL, 22984, 0x00000007 }, /* DBcc */ +{ NULL, 22992, 0x00000000 }, /* Scc */ +{ NULL, 23000, 0x00000000 }, /* Scc */ +{ NULL, 23008, 0x00000000 }, /* Scc */ +{ NULL, 23016, 0x00000002 }, /* Scc */ +{ NULL, 23024, 0x00000002 }, /* Scc */ +{ NULL, 23032, 0x00000002 }, /* Scc */ +{ NULL, 23033, 0x00000002 }, /* Scc */ +{ NULL, 23034, 0x00000001 }, /* TRAPcc */ +{ NULL, 23035, 0x00000001 }, /* TRAPcc */ +{ NULL, 23036, 0x00000001 }, /* TRAPcc */ +{ op_5ac0_0_comp_ff, 23232, 0x00000000 }, /* Scc */ +{ op_5ac8_0_comp_ff, 23240, 0x00000007 }, /* DBcc */ +{ op_5ad0_0_comp_ff, 23248, 0x00000000 }, /* Scc */ +{ op_5ad8_0_comp_ff, 23256, 0x00000000 }, /* Scc */ +{ op_5ae0_0_comp_ff, 23264, 0x00000000 }, /* Scc */ +{ op_5ae8_0_comp_ff, 23272, 0x00000002 }, /* Scc */ +{ op_5af0_0_comp_ff, 23280, 0x00000002 }, /* Scc */ +{ op_5af8_0_comp_ff, 23288, 0x00000002 }, /* Scc */ +{ op_5af9_0_comp_ff, 23289, 0x00000002 }, /* Scc */ +{ NULL, 23290, 0x00000001 }, /* TRAPcc */ +{ NULL, 23291, 0x00000001 }, /* TRAPcc */ +{ NULL, 23292, 0x00000001 }, /* TRAPcc */ +{ op_5bc0_0_comp_ff, 23488, 0x00000000 }, /* Scc */ +{ op_5bc8_0_comp_ff, 23496, 0x00000007 }, /* DBcc */ +{ op_5bd0_0_comp_ff, 23504, 0x00000000 }, /* Scc */ +{ op_5bd8_0_comp_ff, 23512, 0x00000000 }, /* Scc */ +{ op_5be0_0_comp_ff, 23520, 0x00000000 }, /* Scc */ +{ op_5be8_0_comp_ff, 23528, 0x00000002 }, /* Scc */ +{ op_5bf0_0_comp_ff, 23536, 0x00000002 }, /* Scc */ +{ op_5bf8_0_comp_ff, 23544, 0x00000002 }, /* Scc */ +{ op_5bf9_0_comp_ff, 23545, 0x00000002 }, /* Scc */ +{ NULL, 23546, 0x00000001 }, /* TRAPcc */ +{ NULL, 23547, 0x00000001 }, /* TRAPcc */ +{ NULL, 23548, 0x00000001 }, /* TRAPcc */ +{ op_5cc0_0_comp_ff, 23744, 0x00000000 }, /* Scc */ +{ op_5cc8_0_comp_ff, 23752, 0x00000007 }, /* DBcc */ +{ op_5cd0_0_comp_ff, 23760, 0x00000000 }, /* Scc */ +{ op_5cd8_0_comp_ff, 23768, 0x00000000 }, /* Scc */ +{ op_5ce0_0_comp_ff, 23776, 0x00000000 }, /* Scc */ +{ op_5ce8_0_comp_ff, 23784, 0x00000002 }, /* Scc */ +{ op_5cf0_0_comp_ff, 23792, 0x00000002 }, /* Scc */ +{ op_5cf8_0_comp_ff, 23800, 0x00000002 }, /* Scc */ +{ op_5cf9_0_comp_ff, 23801, 0x00000002 }, /* Scc */ +{ NULL, 23802, 0x00000001 }, /* TRAPcc */ +{ NULL, 23803, 0x00000001 }, /* TRAPcc */ +{ NULL, 23804, 0x00000001 }, /* TRAPcc */ +{ op_5dc0_0_comp_ff, 24000, 0x00000000 }, /* Scc */ +{ op_5dc8_0_comp_ff, 24008, 0x00000007 }, /* DBcc */ +{ op_5dd0_0_comp_ff, 24016, 0x00000000 }, /* Scc */ +{ op_5dd8_0_comp_ff, 24024, 0x00000000 }, /* Scc */ +{ op_5de0_0_comp_ff, 24032, 0x00000000 }, /* Scc */ +{ op_5de8_0_comp_ff, 24040, 0x00000002 }, /* Scc */ +{ op_5df0_0_comp_ff, 24048, 0x00000002 }, /* Scc */ +{ op_5df8_0_comp_ff, 24056, 0x00000002 }, /* Scc */ +{ op_5df9_0_comp_ff, 24057, 0x00000002 }, /* Scc */ +{ NULL, 24058, 0x00000001 }, /* TRAPcc */ +{ NULL, 24059, 0x00000001 }, /* TRAPcc */ +{ NULL, 24060, 0x00000001 }, /* TRAPcc */ +{ op_5ec0_0_comp_ff, 24256, 0x00000000 }, /* Scc */ +{ op_5ec8_0_comp_ff, 24264, 0x00000007 }, /* DBcc */ +{ op_5ed0_0_comp_ff, 24272, 0x00000000 }, /* Scc */ +{ op_5ed8_0_comp_ff, 24280, 0x00000000 }, /* Scc */ +{ op_5ee0_0_comp_ff, 24288, 0x00000000 }, /* Scc */ +{ op_5ee8_0_comp_ff, 24296, 0x00000002 }, /* Scc */ +{ op_5ef0_0_comp_ff, 24304, 0x00000002 }, /* Scc */ +{ op_5ef8_0_comp_ff, 24312, 0x00000002 }, /* Scc */ +{ op_5ef9_0_comp_ff, 24313, 0x00000002 }, /* Scc */ +{ NULL, 24314, 0x00000001 }, /* TRAPcc */ +{ NULL, 24315, 0x00000001 }, /* TRAPcc */ +{ NULL, 24316, 0x00000001 }, /* TRAPcc */ +{ op_5fc0_0_comp_ff, 24512, 0x00000000 }, /* Scc */ +{ op_5fc8_0_comp_ff, 24520, 0x00000007 }, /* DBcc */ +{ op_5fd0_0_comp_ff, 24528, 0x00000000 }, /* Scc */ +{ op_5fd8_0_comp_ff, 24536, 0x00000000 }, /* Scc */ +{ op_5fe0_0_comp_ff, 24544, 0x00000000 }, /* Scc */ +{ op_5fe8_0_comp_ff, 24552, 0x00000002 }, /* Scc */ +{ op_5ff0_0_comp_ff, 24560, 0x00000002 }, /* Scc */ +{ op_5ff8_0_comp_ff, 24568, 0x00000002 }, /* Scc */ +{ op_5ff9_0_comp_ff, 24569, 0x00000002 }, /* Scc */ +{ NULL, 24570, 0x00000001 }, /* TRAPcc */ +{ NULL, 24571, 0x00000001 }, /* TRAPcc */ +{ NULL, 24572, 0x00000001 }, /* TRAPcc */ +{ op_6000_0_comp_ff, 24576, 0x00000012 }, /* Bcc */ +{ op_6001_0_comp_ff, 24577, 0x00000010 }, /* Bcc */ +{ op_60ff_0_comp_ff, 24831, 0x00000012 }, /* Bcc */ +{ op_6100_0_comp_ff, 24832, 0x00000012 }, /* BSR */ +{ op_6101_0_comp_ff, 24833, 0x00000010 }, /* BSR */ +{ NULL, 25087, 0x00000012 }, /* BSR */ +{ op_6200_0_comp_ff, 25088, 0x00000003 }, /* Bcc */ +{ op_6201_0_comp_ff, 25089, 0x00000001 }, /* Bcc */ +{ op_62ff_0_comp_ff, 25343, 0x00000003 }, /* Bcc */ +{ op_6300_0_comp_ff, 25344, 0x00000003 }, /* Bcc */ +{ op_6301_0_comp_ff, 25345, 0x00000001 }, /* Bcc */ +{ op_63ff_0_comp_ff, 25599, 0x00000003 }, /* Bcc */ +{ op_6400_0_comp_ff, 25600, 0x00000003 }, /* Bcc */ +{ op_6401_0_comp_ff, 25601, 0x00000001 }, /* Bcc */ +{ op_64ff_0_comp_ff, 25855, 0x00000003 }, /* Bcc */ +{ op_6500_0_comp_ff, 25856, 0x00000003 }, /* Bcc */ +{ op_6501_0_comp_ff, 25857, 0x00000001 }, /* Bcc */ +{ op_65ff_0_comp_ff, 26111, 0x00000003 }, /* Bcc */ +{ op_6600_0_comp_ff, 26112, 0x00000003 }, /* Bcc */ +{ op_6601_0_comp_ff, 26113, 0x00000001 }, /* Bcc */ +{ op_66ff_0_comp_ff, 26367, 0x00000003 }, /* Bcc */ +{ op_6700_0_comp_ff, 26368, 0x00000003 }, /* Bcc */ +{ op_6701_0_comp_ff, 26369, 0x00000001 }, /* Bcc */ +{ op_67ff_0_comp_ff, 26623, 0x00000003 }, /* Bcc */ +{ NULL, 26624, 0x00000003 }, /* Bcc */ +{ NULL, 26625, 0x00000001 }, /* Bcc */ +{ NULL, 26879, 0x00000003 }, /* Bcc */ +{ NULL, 26880, 0x00000003 }, /* Bcc */ +{ NULL, 26881, 0x00000001 }, /* Bcc */ +{ NULL, 27135, 0x00000003 }, /* Bcc */ +{ op_6a00_0_comp_ff, 27136, 0x00000003 }, /* Bcc */ +{ op_6a01_0_comp_ff, 27137, 0x00000001 }, /* Bcc */ +{ op_6aff_0_comp_ff, 27391, 0x00000003 }, /* Bcc */ +{ op_6b00_0_comp_ff, 27392, 0x00000003 }, /* Bcc */ +{ op_6b01_0_comp_ff, 27393, 0x00000001 }, /* Bcc */ +{ op_6bff_0_comp_ff, 27647, 0x00000003 }, /* Bcc */ +{ op_6c00_0_comp_ff, 27648, 0x00000003 }, /* Bcc */ +{ op_6c01_0_comp_ff, 27649, 0x00000001 }, /* Bcc */ +{ op_6cff_0_comp_ff, 27903, 0x00000003 }, /* Bcc */ +{ op_6d00_0_comp_ff, 27904, 0x00000003 }, /* Bcc */ +{ op_6d01_0_comp_ff, 27905, 0x00000001 }, /* Bcc */ +{ op_6dff_0_comp_ff, 28159, 0x00000003 }, /* Bcc */ +{ op_6e00_0_comp_ff, 28160, 0x00000003 }, /* Bcc */ +{ op_6e01_0_comp_ff, 28161, 0x00000001 }, /* Bcc */ +{ op_6eff_0_comp_ff, 28415, 0x00000003 }, /* Bcc */ +{ op_6f00_0_comp_ff, 28416, 0x00000003 }, /* Bcc */ +{ op_6f01_0_comp_ff, 28417, 0x00000001 }, /* Bcc */ +{ op_6fff_0_comp_ff, 28671, 0x00000003 }, /* Bcc */ +{ op_7000_0_comp_ff, 28672, 0x00000000 }, /* MOVE */ +{ op_8000_0_comp_ff, 32768, 0x00000000 }, /* OR */ +{ op_8010_0_comp_ff, 32784, 0x00000000 }, /* OR */ +{ op_8018_0_comp_ff, 32792, 0x00000000 }, /* OR */ +{ op_8020_0_comp_ff, 32800, 0x00000000 }, /* OR */ +{ op_8028_0_comp_ff, 32808, 0x00000002 }, /* OR */ +{ op_8030_0_comp_ff, 32816, 0x00000002 }, /* OR */ +{ op_8038_0_comp_ff, 32824, 0x00000002 }, /* OR */ +{ op_8039_0_comp_ff, 32825, 0x00000002 }, /* OR */ +{ op_803a_0_comp_ff, 32826, 0x00000002 }, /* OR */ +{ op_803b_0_comp_ff, 32827, 0x00000002 }, /* OR */ +{ op_803c_0_comp_ff, 32828, 0x00000002 }, /* OR */ +{ op_8040_0_comp_ff, 32832, 0x00000000 }, /* OR */ +{ op_8050_0_comp_ff, 32848, 0x00000000 }, /* OR */ +{ op_8058_0_comp_ff, 32856, 0x00000000 }, /* OR */ +{ op_8060_0_comp_ff, 32864, 0x00000000 }, /* OR */ +{ op_8068_0_comp_ff, 32872, 0x00000002 }, /* OR */ +{ op_8070_0_comp_ff, 32880, 0x00000002 }, /* OR */ +{ op_8078_0_comp_ff, 32888, 0x00000002 }, /* OR */ +{ op_8079_0_comp_ff, 32889, 0x00000002 }, /* OR */ +{ op_807a_0_comp_ff, 32890, 0x00000002 }, /* OR */ +{ op_807b_0_comp_ff, 32891, 0x00000002 }, /* OR */ +{ op_807c_0_comp_ff, 32892, 0x00000002 }, /* OR */ +{ op_8080_0_comp_ff, 32896, 0x00000000 }, /* OR */ +{ op_8090_0_comp_ff, 32912, 0x00000000 }, /* OR */ +{ op_8098_0_comp_ff, 32920, 0x00000000 }, /* OR */ +{ op_80a0_0_comp_ff, 32928, 0x00000000 }, /* OR */ +{ op_80a8_0_comp_ff, 32936, 0x00000002 }, /* OR */ +{ op_80b0_0_comp_ff, 32944, 0x00000002 }, /* OR */ +{ op_80b8_0_comp_ff, 32952, 0x00000002 }, /* OR */ +{ op_80b9_0_comp_ff, 32953, 0x00000002 }, /* OR */ +{ op_80ba_0_comp_ff, 32954, 0x00000002 }, /* OR */ +{ op_80bb_0_comp_ff, 32955, 0x00000002 }, /* OR */ +{ op_80bc_0_comp_ff, 32956, 0x00000002 }, /* OR */ +{ NULL, 32960, 0x00000001 }, /* DIVU */ +{ NULL, 32976, 0x00000001 }, /* DIVU */ +{ NULL, 32984, 0x00000001 }, /* DIVU */ +{ NULL, 32992, 0x00000001 }, /* DIVU */ +{ NULL, 33000, 0x00000001 }, /* DIVU */ +{ NULL, 33008, 0x00000001 }, /* DIVU */ +{ NULL, 33016, 0x00000001 }, /* DIVU */ +{ NULL, 33017, 0x00000001 }, /* DIVU */ +{ NULL, 33018, 0x00000001 }, /* DIVU */ +{ NULL, 33019, 0x00000001 }, /* DIVU */ +{ NULL, 33020, 0x00000001 }, /* DIVU */ +{ NULL, 33024, 0x00000000 }, /* SBCD */ +{ NULL, 33032, 0x00000000 }, /* SBCD */ +{ op_8110_0_comp_ff, 33040, 0x00000000 }, /* OR */ +{ op_8118_0_comp_ff, 33048, 0x00000000 }, /* OR */ +{ op_8120_0_comp_ff, 33056, 0x00000000 }, /* OR */ +{ op_8128_0_comp_ff, 33064, 0x00000002 }, /* OR */ +{ op_8130_0_comp_ff, 33072, 0x00000002 }, /* OR */ +{ op_8138_0_comp_ff, 33080, 0x00000002 }, /* OR */ +{ op_8139_0_comp_ff, 33081, 0x00000002 }, /* OR */ +{ NULL, 33088, 0x00000000 }, /* PACK */ +{ NULL, 33096, 0x00000000 }, /* PACK */ +{ op_8150_0_comp_ff, 33104, 0x00000000 }, /* OR */ +{ op_8158_0_comp_ff, 33112, 0x00000000 }, /* OR */ +{ op_8160_0_comp_ff, 33120, 0x00000000 }, /* OR */ +{ op_8168_0_comp_ff, 33128, 0x00000002 }, /* OR */ +{ op_8170_0_comp_ff, 33136, 0x00000002 }, /* OR */ +{ op_8178_0_comp_ff, 33144, 0x00000002 }, /* OR */ +{ op_8179_0_comp_ff, 33145, 0x00000002 }, /* OR */ +{ NULL, 33152, 0x00000000 }, /* UNPK */ +{ NULL, 33160, 0x00000000 }, /* UNPK */ +{ op_8190_0_comp_ff, 33168, 0x00000000 }, /* OR */ +{ op_8198_0_comp_ff, 33176, 0x00000000 }, /* OR */ +{ op_81a0_0_comp_ff, 33184, 0x00000000 }, /* OR */ +{ op_81a8_0_comp_ff, 33192, 0x00000002 }, /* OR */ +{ op_81b0_0_comp_ff, 33200, 0x00000002 }, /* OR */ +{ op_81b8_0_comp_ff, 33208, 0x00000002 }, /* OR */ +{ op_81b9_0_comp_ff, 33209, 0x00000002 }, /* OR */ +{ NULL, 33216, 0x00000001 }, /* DIVS */ +{ NULL, 33232, 0x00000001 }, /* DIVS */ +{ NULL, 33240, 0x00000001 }, /* DIVS */ +{ NULL, 33248, 0x00000001 }, /* DIVS */ +{ NULL, 33256, 0x00000001 }, /* DIVS */ +{ NULL, 33264, 0x00000001 }, /* DIVS */ +{ NULL, 33272, 0x00000001 }, /* DIVS */ +{ NULL, 33273, 0x00000001 }, /* DIVS */ +{ NULL, 33274, 0x00000001 }, /* DIVS */ +{ NULL, 33275, 0x00000001 }, /* DIVS */ +{ NULL, 33276, 0x00000001 }, /* DIVS */ +{ op_9000_0_comp_ff, 36864, 0x00000000 }, /* SUB */ +{ op_9010_0_comp_ff, 36880, 0x00000000 }, /* SUB */ +{ op_9018_0_comp_ff, 36888, 0x00000000 }, /* SUB */ +{ op_9020_0_comp_ff, 36896, 0x00000000 }, /* SUB */ +{ op_9028_0_comp_ff, 36904, 0x00000002 }, /* SUB */ +{ op_9030_0_comp_ff, 36912, 0x00000002 }, /* SUB */ +{ op_9038_0_comp_ff, 36920, 0x00000002 }, /* SUB */ +{ op_9039_0_comp_ff, 36921, 0x00000002 }, /* SUB */ +{ op_903a_0_comp_ff, 36922, 0x00000002 }, /* SUB */ +{ op_903b_0_comp_ff, 36923, 0x00000002 }, /* SUB */ +{ op_903c_0_comp_ff, 36924, 0x00000002 }, /* SUB */ +{ op_9040_0_comp_ff, 36928, 0x00000000 }, /* SUB */ +{ op_9048_0_comp_ff, 36936, 0x00000000 }, /* SUB */ +{ op_9050_0_comp_ff, 36944, 0x00000000 }, /* SUB */ +{ op_9058_0_comp_ff, 36952, 0x00000000 }, /* SUB */ +{ op_9060_0_comp_ff, 36960, 0x00000000 }, /* SUB */ +{ op_9068_0_comp_ff, 36968, 0x00000002 }, /* SUB */ +{ op_9070_0_comp_ff, 36976, 0x00000002 }, /* SUB */ +{ op_9078_0_comp_ff, 36984, 0x00000002 }, /* SUB */ +{ op_9079_0_comp_ff, 36985, 0x00000002 }, /* SUB */ +{ op_907a_0_comp_ff, 36986, 0x00000002 }, /* SUB */ +{ op_907b_0_comp_ff, 36987, 0x00000002 }, /* SUB */ +{ op_907c_0_comp_ff, 36988, 0x00000002 }, /* SUB */ +{ op_9080_0_comp_ff, 36992, 0x00000000 }, /* SUB */ +{ op_9088_0_comp_ff, 37000, 0x00000000 }, /* SUB */ +{ op_9090_0_comp_ff, 37008, 0x00000000 }, /* SUB */ +{ op_9098_0_comp_ff, 37016, 0x00000000 }, /* SUB */ +{ op_90a0_0_comp_ff, 37024, 0x00000000 }, /* SUB */ +{ op_90a8_0_comp_ff, 37032, 0x00000002 }, /* SUB */ +{ op_90b0_0_comp_ff, 37040, 0x00000002 }, /* SUB */ +{ op_90b8_0_comp_ff, 37048, 0x00000002 }, /* SUB */ +{ op_90b9_0_comp_ff, 37049, 0x00000002 }, /* SUB */ +{ op_90ba_0_comp_ff, 37050, 0x00000002 }, /* SUB */ +{ op_90bb_0_comp_ff, 37051, 0x00000002 }, /* SUB */ +{ op_90bc_0_comp_ff, 37052, 0x00000002 }, /* SUB */ +{ op_90c0_0_comp_ff, 37056, 0x00000000 }, /* SUBA */ +{ op_90c8_0_comp_ff, 37064, 0x00000000 }, /* SUBA */ +{ op_90d0_0_comp_ff, 37072, 0x00000000 }, /* SUBA */ +{ op_90d8_0_comp_ff, 37080, 0x00000000 }, /* SUBA */ +{ op_90e0_0_comp_ff, 37088, 0x00000000 }, /* SUBA */ +{ op_90e8_0_comp_ff, 37096, 0x00000002 }, /* SUBA */ +{ op_90f0_0_comp_ff, 37104, 0x00000002 }, /* SUBA */ +{ op_90f8_0_comp_ff, 37112, 0x00000002 }, /* SUBA */ +{ op_90f9_0_comp_ff, 37113, 0x00000002 }, /* SUBA */ +{ op_90fa_0_comp_ff, 37114, 0x00000002 }, /* SUBA */ +{ op_90fb_0_comp_ff, 37115, 0x00000002 }, /* SUBA */ +{ op_90fc_0_comp_ff, 37116, 0x00000002 }, /* SUBA */ +{ op_9100_0_comp_ff, 37120, 0x0000000c }, /* SUBX */ +{ op_9108_0_comp_ff, 37128, 0x0000000c }, /* SUBX */ +{ op_9110_0_comp_ff, 37136, 0x00000000 }, /* SUB */ +{ op_9118_0_comp_ff, 37144, 0x00000000 }, /* SUB */ +{ op_9120_0_comp_ff, 37152, 0x00000000 }, /* SUB */ +{ op_9128_0_comp_ff, 37160, 0x00000002 }, /* SUB */ +{ op_9130_0_comp_ff, 37168, 0x00000002 }, /* SUB */ +{ op_9138_0_comp_ff, 37176, 0x00000002 }, /* SUB */ +{ op_9139_0_comp_ff, 37177, 0x00000002 }, /* SUB */ +{ op_9140_0_comp_ff, 37184, 0x0000000c }, /* SUBX */ +{ op_9148_0_comp_ff, 37192, 0x0000000c }, /* SUBX */ +{ op_9150_0_comp_ff, 37200, 0x00000000 }, /* SUB */ +{ op_9158_0_comp_ff, 37208, 0x00000000 }, /* SUB */ +{ op_9160_0_comp_ff, 37216, 0x00000000 }, /* SUB */ +{ op_9168_0_comp_ff, 37224, 0x00000002 }, /* SUB */ +{ op_9170_0_comp_ff, 37232, 0x00000002 }, /* SUB */ +{ op_9178_0_comp_ff, 37240, 0x00000002 }, /* SUB */ +{ op_9179_0_comp_ff, 37241, 0x00000002 }, /* SUB */ +{ op_9180_0_comp_ff, 37248, 0x0000000c }, /* SUBX */ +{ op_9188_0_comp_ff, 37256, 0x0000000c }, /* SUBX */ +{ op_9190_0_comp_ff, 37264, 0x00000000 }, /* SUB */ +{ op_9198_0_comp_ff, 37272, 0x00000000 }, /* SUB */ +{ op_91a0_0_comp_ff, 37280, 0x00000000 }, /* SUB */ +{ op_91a8_0_comp_ff, 37288, 0x00000002 }, /* SUB */ +{ op_91b0_0_comp_ff, 37296, 0x00000002 }, /* SUB */ +{ op_91b8_0_comp_ff, 37304, 0x00000002 }, /* SUB */ +{ op_91b9_0_comp_ff, 37305, 0x00000002 }, /* SUB */ +{ op_91c0_0_comp_ff, 37312, 0x00000000 }, /* SUBA */ +{ op_91c8_0_comp_ff, 37320, 0x00000000 }, /* SUBA */ +{ op_91d0_0_comp_ff, 37328, 0x00000000 }, /* SUBA */ +{ op_91d8_0_comp_ff, 37336, 0x00000000 }, /* SUBA */ +{ op_91e0_0_comp_ff, 37344, 0x00000000 }, /* SUBA */ +{ op_91e8_0_comp_ff, 37352, 0x00000002 }, /* SUBA */ +{ op_91f0_0_comp_ff, 37360, 0x00000002 }, /* SUBA */ +{ op_91f8_0_comp_ff, 37368, 0x00000002 }, /* SUBA */ +{ op_91f9_0_comp_ff, 37369, 0x00000002 }, /* SUBA */ +{ op_91fa_0_comp_ff, 37370, 0x00000002 }, /* SUBA */ +{ op_91fb_0_comp_ff, 37371, 0x00000002 }, /* SUBA */ +{ op_91fc_0_comp_ff, 37372, 0x00000002 }, /* SUBA */ +{ op_b000_0_comp_ff, 45056, 0x00000000 }, /* CMP */ +{ op_b010_0_comp_ff, 45072, 0x00000000 }, /* CMP */ +{ op_b018_0_comp_ff, 45080, 0x00000000 }, /* CMP */ +{ op_b020_0_comp_ff, 45088, 0x00000000 }, /* CMP */ +{ op_b028_0_comp_ff, 45096, 0x00000002 }, /* CMP */ +{ op_b030_0_comp_ff, 45104, 0x00000002 }, /* CMP */ +{ op_b038_0_comp_ff, 45112, 0x00000002 }, /* CMP */ +{ op_b039_0_comp_ff, 45113, 0x00000002 }, /* CMP */ +{ op_b03a_0_comp_ff, 45114, 0x00000002 }, /* CMP */ +{ op_b03b_0_comp_ff, 45115, 0x00000002 }, /* CMP */ +{ op_b03c_0_comp_ff, 45116, 0x00000002 }, /* CMP */ +{ op_b040_0_comp_ff, 45120, 0x00000000 }, /* CMP */ +{ op_b048_0_comp_ff, 45128, 0x00000000 }, /* CMP */ +{ op_b050_0_comp_ff, 45136, 0x00000000 }, /* CMP */ +{ op_b058_0_comp_ff, 45144, 0x00000000 }, /* CMP */ +{ op_b060_0_comp_ff, 45152, 0x00000000 }, /* CMP */ +{ op_b068_0_comp_ff, 45160, 0x00000002 }, /* CMP */ +{ op_b070_0_comp_ff, 45168, 0x00000002 }, /* CMP */ +{ op_b078_0_comp_ff, 45176, 0x00000002 }, /* CMP */ +{ op_b079_0_comp_ff, 45177, 0x00000002 }, /* CMP */ +{ op_b07a_0_comp_ff, 45178, 0x00000002 }, /* CMP */ +{ op_b07b_0_comp_ff, 45179, 0x00000002 }, /* CMP */ +{ op_b07c_0_comp_ff, 45180, 0x00000002 }, /* CMP */ +{ op_b080_0_comp_ff, 45184, 0x00000000 }, /* CMP */ +{ op_b088_0_comp_ff, 45192, 0x00000000 }, /* CMP */ +{ op_b090_0_comp_ff, 45200, 0x00000000 }, /* CMP */ +{ op_b098_0_comp_ff, 45208, 0x00000000 }, /* CMP */ +{ op_b0a0_0_comp_ff, 45216, 0x00000000 }, /* CMP */ +{ op_b0a8_0_comp_ff, 45224, 0x00000002 }, /* CMP */ +{ op_b0b0_0_comp_ff, 45232, 0x00000002 }, /* CMP */ +{ op_b0b8_0_comp_ff, 45240, 0x00000002 }, /* CMP */ +{ op_b0b9_0_comp_ff, 45241, 0x00000002 }, /* CMP */ +{ op_b0ba_0_comp_ff, 45242, 0x00000002 }, /* CMP */ +{ op_b0bb_0_comp_ff, 45243, 0x00000002 }, /* CMP */ +{ op_b0bc_0_comp_ff, 45244, 0x00000002 }, /* CMP */ +{ op_b0c0_0_comp_ff, 45248, 0x00000000 }, /* CMPA */ +{ op_b0c8_0_comp_ff, 45256, 0x00000000 }, /* CMPA */ +{ op_b0d0_0_comp_ff, 45264, 0x00000000 }, /* CMPA */ +{ op_b0d8_0_comp_ff, 45272, 0x00000000 }, /* CMPA */ +{ op_b0e0_0_comp_ff, 45280, 0x00000000 }, /* CMPA */ +{ op_b0e8_0_comp_ff, 45288, 0x00000002 }, /* CMPA */ +{ op_b0f0_0_comp_ff, 45296, 0x00000002 }, /* CMPA */ +{ op_b0f8_0_comp_ff, 45304, 0x00000002 }, /* CMPA */ +{ op_b0f9_0_comp_ff, 45305, 0x00000002 }, /* CMPA */ +{ op_b0fa_0_comp_ff, 45306, 0x00000002 }, /* CMPA */ +{ op_b0fb_0_comp_ff, 45307, 0x00000002 }, /* CMPA */ +{ op_b0fc_0_comp_ff, 45308, 0x00000002 }, /* CMPA */ +{ op_b100_0_comp_ff, 45312, 0x00000000 }, /* EOR */ +{ op_b108_0_comp_ff, 45320, 0x00000000 }, /* CMPM */ +{ op_b110_0_comp_ff, 45328, 0x00000000 }, /* EOR */ +{ op_b118_0_comp_ff, 45336, 0x00000000 }, /* EOR */ +{ op_b120_0_comp_ff, 45344, 0x00000000 }, /* EOR */ +{ op_b128_0_comp_ff, 45352, 0x00000002 }, /* EOR */ +{ op_b130_0_comp_ff, 45360, 0x00000002 }, /* EOR */ +{ op_b138_0_comp_ff, 45368, 0x00000002 }, /* EOR */ +{ op_b139_0_comp_ff, 45369, 0x00000002 }, /* EOR */ +{ op_b140_0_comp_ff, 45376, 0x00000000 }, /* EOR */ +{ op_b148_0_comp_ff, 45384, 0x00000000 }, /* CMPM */ +{ op_b150_0_comp_ff, 45392, 0x00000000 }, /* EOR */ +{ op_b158_0_comp_ff, 45400, 0x00000000 }, /* EOR */ +{ op_b160_0_comp_ff, 45408, 0x00000000 }, /* EOR */ +{ op_b168_0_comp_ff, 45416, 0x00000002 }, /* EOR */ +{ op_b170_0_comp_ff, 45424, 0x00000002 }, /* EOR */ +{ op_b178_0_comp_ff, 45432, 0x00000002 }, /* EOR */ +{ op_b179_0_comp_ff, 45433, 0x00000002 }, /* EOR */ +{ op_b180_0_comp_ff, 45440, 0x00000000 }, /* EOR */ +{ op_b188_0_comp_ff, 45448, 0x00000000 }, /* CMPM */ +{ op_b190_0_comp_ff, 45456, 0x00000000 }, /* EOR */ +{ op_b198_0_comp_ff, 45464, 0x00000000 }, /* EOR */ +{ op_b1a0_0_comp_ff, 45472, 0x00000000 }, /* EOR */ +{ op_b1a8_0_comp_ff, 45480, 0x00000002 }, /* EOR */ +{ op_b1b0_0_comp_ff, 45488, 0x00000002 }, /* EOR */ +{ op_b1b8_0_comp_ff, 45496, 0x00000002 }, /* EOR */ +{ op_b1b9_0_comp_ff, 45497, 0x00000002 }, /* EOR */ +{ op_b1c0_0_comp_ff, 45504, 0x00000000 }, /* CMPA */ +{ op_b1c8_0_comp_ff, 45512, 0x00000000 }, /* CMPA */ +{ op_b1d0_0_comp_ff, 45520, 0x00000000 }, /* CMPA */ +{ op_b1d8_0_comp_ff, 45528, 0x00000000 }, /* CMPA */ +{ op_b1e0_0_comp_ff, 45536, 0x00000000 }, /* CMPA */ +{ op_b1e8_0_comp_ff, 45544, 0x00000002 }, /* CMPA */ +{ op_b1f0_0_comp_ff, 45552, 0x00000002 }, /* CMPA */ +{ op_b1f8_0_comp_ff, 45560, 0x00000002 }, /* CMPA */ +{ op_b1f9_0_comp_ff, 45561, 0x00000002 }, /* CMPA */ +{ op_b1fa_0_comp_ff, 45562, 0x00000002 }, /* CMPA */ +{ op_b1fb_0_comp_ff, 45563, 0x00000002 }, /* CMPA */ +{ op_b1fc_0_comp_ff, 45564, 0x00000002 }, /* CMPA */ +{ op_c000_0_comp_ff, 49152, 0x00000000 }, /* AND */ +{ op_c010_0_comp_ff, 49168, 0x00000000 }, /* AND */ +{ op_c018_0_comp_ff, 49176, 0x00000000 }, /* AND */ +{ op_c020_0_comp_ff, 49184, 0x00000000 }, /* AND */ +{ op_c028_0_comp_ff, 49192, 0x00000002 }, /* AND */ +{ op_c030_0_comp_ff, 49200, 0x00000002 }, /* AND */ +{ op_c038_0_comp_ff, 49208, 0x00000002 }, /* AND */ +{ op_c039_0_comp_ff, 49209, 0x00000002 }, /* AND */ +{ op_c03a_0_comp_ff, 49210, 0x00000002 }, /* AND */ +{ op_c03b_0_comp_ff, 49211, 0x00000002 }, /* AND */ +{ op_c03c_0_comp_ff, 49212, 0x00000002 }, /* AND */ +{ op_c040_0_comp_ff, 49216, 0x00000000 }, /* AND */ +{ op_c050_0_comp_ff, 49232, 0x00000000 }, /* AND */ +{ op_c058_0_comp_ff, 49240, 0x00000000 }, /* AND */ +{ op_c060_0_comp_ff, 49248, 0x00000000 }, /* AND */ +{ op_c068_0_comp_ff, 49256, 0x00000002 }, /* AND */ +{ op_c070_0_comp_ff, 49264, 0x00000002 }, /* AND */ +{ op_c078_0_comp_ff, 49272, 0x00000002 }, /* AND */ +{ op_c079_0_comp_ff, 49273, 0x00000002 }, /* AND */ +{ op_c07a_0_comp_ff, 49274, 0x00000002 }, /* AND */ +{ op_c07b_0_comp_ff, 49275, 0x00000002 }, /* AND */ +{ op_c07c_0_comp_ff, 49276, 0x00000002 }, /* AND */ +{ op_c080_0_comp_ff, 49280, 0x00000000 }, /* AND */ +{ op_c090_0_comp_ff, 49296, 0x00000000 }, /* AND */ +{ op_c098_0_comp_ff, 49304, 0x00000000 }, /* AND */ +{ op_c0a0_0_comp_ff, 49312, 0x00000000 }, /* AND */ +{ op_c0a8_0_comp_ff, 49320, 0x00000002 }, /* AND */ +{ op_c0b0_0_comp_ff, 49328, 0x00000002 }, /* AND */ +{ op_c0b8_0_comp_ff, 49336, 0x00000002 }, /* AND */ +{ op_c0b9_0_comp_ff, 49337, 0x00000002 }, /* AND */ +{ op_c0ba_0_comp_ff, 49338, 0x00000002 }, /* AND */ +{ op_c0bb_0_comp_ff, 49339, 0x00000002 }, /* AND */ +{ op_c0bc_0_comp_ff, 49340, 0x00000002 }, /* AND */ +{ op_c0c0_0_comp_ff, 49344, 0x00000000 }, /* MULU */ +{ op_c0d0_0_comp_ff, 49360, 0x00000000 }, /* MULU */ +{ op_c0d8_0_comp_ff, 49368, 0x00000000 }, /* MULU */ +{ op_c0e0_0_comp_ff, 49376, 0x00000000 }, /* MULU */ +{ op_c0e8_0_comp_ff, 49384, 0x00000002 }, /* MULU */ +{ op_c0f0_0_comp_ff, 49392, 0x00000002 }, /* MULU */ +{ op_c0f8_0_comp_ff, 49400, 0x00000002 }, /* MULU */ +{ op_c0f9_0_comp_ff, 49401, 0x00000002 }, /* MULU */ +{ op_c0fa_0_comp_ff, 49402, 0x00000002 }, /* MULU */ +{ op_c0fb_0_comp_ff, 49403, 0x00000002 }, /* MULU */ +{ op_c0fc_0_comp_ff, 49404, 0x00000002 }, /* MULU */ +{ NULL, 49408, 0x00000000 }, /* ABCD */ +{ NULL, 49416, 0x00000000 }, /* ABCD */ +{ op_c110_0_comp_ff, 49424, 0x00000000 }, /* AND */ +{ op_c118_0_comp_ff, 49432, 0x00000000 }, /* AND */ +{ op_c120_0_comp_ff, 49440, 0x00000000 }, /* AND */ +{ op_c128_0_comp_ff, 49448, 0x00000002 }, /* AND */ +{ op_c130_0_comp_ff, 49456, 0x00000002 }, /* AND */ +{ op_c138_0_comp_ff, 49464, 0x00000002 }, /* AND */ +{ op_c139_0_comp_ff, 49465, 0x00000002 }, /* AND */ +{ op_c140_0_comp_ff, 49472, 0x00000000 }, /* EXG */ +{ op_c148_0_comp_ff, 49480, 0x00000000 }, /* EXG */ +{ op_c150_0_comp_ff, 49488, 0x00000000 }, /* AND */ +{ op_c158_0_comp_ff, 49496, 0x00000000 }, /* AND */ +{ op_c160_0_comp_ff, 49504, 0x00000000 }, /* AND */ +{ op_c168_0_comp_ff, 49512, 0x00000002 }, /* AND */ +{ op_c170_0_comp_ff, 49520, 0x00000002 }, /* AND */ +{ op_c178_0_comp_ff, 49528, 0x00000002 }, /* AND */ +{ op_c179_0_comp_ff, 49529, 0x00000002 }, /* AND */ +{ op_c188_0_comp_ff, 49544, 0x00000000 }, /* EXG */ +{ op_c190_0_comp_ff, 49552, 0x00000000 }, /* AND */ +{ op_c198_0_comp_ff, 49560, 0x00000000 }, /* AND */ +{ op_c1a0_0_comp_ff, 49568, 0x00000000 }, /* AND */ +{ op_c1a8_0_comp_ff, 49576, 0x00000002 }, /* AND */ +{ op_c1b0_0_comp_ff, 49584, 0x00000002 }, /* AND */ +{ op_c1b8_0_comp_ff, 49592, 0x00000002 }, /* AND */ +{ op_c1b9_0_comp_ff, 49593, 0x00000002 }, /* AND */ +{ op_c1c0_0_comp_ff, 49600, 0x00000000 }, /* MULS */ +{ op_c1d0_0_comp_ff, 49616, 0x00000000 }, /* MULS */ +{ op_c1d8_0_comp_ff, 49624, 0x00000000 }, /* MULS */ +{ op_c1e0_0_comp_ff, 49632, 0x00000000 }, /* MULS */ +{ op_c1e8_0_comp_ff, 49640, 0x00000002 }, /* MULS */ +{ op_c1f0_0_comp_ff, 49648, 0x00000002 }, /* MULS */ +{ op_c1f8_0_comp_ff, 49656, 0x00000002 }, /* MULS */ +{ op_c1f9_0_comp_ff, 49657, 0x00000002 }, /* MULS */ +{ op_c1fa_0_comp_ff, 49658, 0x00000002 }, /* MULS */ +{ op_c1fb_0_comp_ff, 49659, 0x00000002 }, /* MULS */ +{ op_c1fc_0_comp_ff, 49660, 0x00000002 }, /* MULS */ +{ op_d000_0_comp_ff, 53248, 0x00000000 }, /* ADD */ +{ op_d010_0_comp_ff, 53264, 0x00000000 }, /* ADD */ +{ op_d018_0_comp_ff, 53272, 0x00000000 }, /* ADD */ +{ op_d020_0_comp_ff, 53280, 0x00000000 }, /* ADD */ +{ op_d028_0_comp_ff, 53288, 0x00000002 }, /* ADD */ +{ op_d030_0_comp_ff, 53296, 0x00000002 }, /* ADD */ +{ op_d038_0_comp_ff, 53304, 0x00000002 }, /* ADD */ +{ op_d039_0_comp_ff, 53305, 0x00000002 }, /* ADD */ +{ op_d03a_0_comp_ff, 53306, 0x00000002 }, /* ADD */ +{ op_d03b_0_comp_ff, 53307, 0x00000002 }, /* ADD */ +{ op_d03c_0_comp_ff, 53308, 0x00000002 }, /* ADD */ +{ op_d040_0_comp_ff, 53312, 0x00000000 }, /* ADD */ +{ op_d048_0_comp_ff, 53320, 0x00000000 }, /* ADD */ +{ op_d050_0_comp_ff, 53328, 0x00000000 }, /* ADD */ +{ op_d058_0_comp_ff, 53336, 0x00000000 }, /* ADD */ +{ op_d060_0_comp_ff, 53344, 0x00000000 }, /* ADD */ +{ op_d068_0_comp_ff, 53352, 0x00000002 }, /* ADD */ +{ op_d070_0_comp_ff, 53360, 0x00000002 }, /* ADD */ +{ op_d078_0_comp_ff, 53368, 0x00000002 }, /* ADD */ +{ op_d079_0_comp_ff, 53369, 0x00000002 }, /* ADD */ +{ op_d07a_0_comp_ff, 53370, 0x00000002 }, /* ADD */ +{ op_d07b_0_comp_ff, 53371, 0x00000002 }, /* ADD */ +{ op_d07c_0_comp_ff, 53372, 0x00000002 }, /* ADD */ +{ op_d080_0_comp_ff, 53376, 0x00000000 }, /* ADD */ +{ op_d088_0_comp_ff, 53384, 0x00000000 }, /* ADD */ +{ op_d090_0_comp_ff, 53392, 0x00000000 }, /* ADD */ +{ op_d098_0_comp_ff, 53400, 0x00000000 }, /* ADD */ +{ op_d0a0_0_comp_ff, 53408, 0x00000000 }, /* ADD */ +{ op_d0a8_0_comp_ff, 53416, 0x00000002 }, /* ADD */ +{ op_d0b0_0_comp_ff, 53424, 0x00000002 }, /* ADD */ +{ op_d0b8_0_comp_ff, 53432, 0x00000002 }, /* ADD */ +{ op_d0b9_0_comp_ff, 53433, 0x00000002 }, /* ADD */ +{ op_d0ba_0_comp_ff, 53434, 0x00000002 }, /* ADD */ +{ op_d0bb_0_comp_ff, 53435, 0x00000002 }, /* ADD */ +{ op_d0bc_0_comp_ff, 53436, 0x00000002 }, /* ADD */ +{ op_d0c0_0_comp_ff, 53440, 0x00000000 }, /* ADDA */ +{ op_d0c8_0_comp_ff, 53448, 0x00000000 }, /* ADDA */ +{ op_d0d0_0_comp_ff, 53456, 0x00000000 }, /* ADDA */ +{ op_d0d8_0_comp_ff, 53464, 0x00000000 }, /* ADDA */ +{ op_d0e0_0_comp_ff, 53472, 0x00000000 }, /* ADDA */ +{ op_d0e8_0_comp_ff, 53480, 0x00000002 }, /* ADDA */ +{ op_d0f0_0_comp_ff, 53488, 0x00000002 }, /* ADDA */ +{ op_d0f8_0_comp_ff, 53496, 0x00000002 }, /* ADDA */ +{ op_d0f9_0_comp_ff, 53497, 0x00000002 }, /* ADDA */ +{ op_d0fa_0_comp_ff, 53498, 0x00000002 }, /* ADDA */ +{ op_d0fb_0_comp_ff, 53499, 0x00000002 }, /* ADDA */ +{ op_d0fc_0_comp_ff, 53500, 0x00000002 }, /* ADDA */ +{ op_d100_0_comp_ff, 53504, 0x0000000c }, /* ADDX */ +{ op_d108_0_comp_ff, 53512, 0x0000000c }, /* ADDX */ +{ op_d110_0_comp_ff, 53520, 0x00000000 }, /* ADD */ +{ op_d118_0_comp_ff, 53528, 0x00000000 }, /* ADD */ +{ op_d120_0_comp_ff, 53536, 0x00000000 }, /* ADD */ +{ op_d128_0_comp_ff, 53544, 0x00000002 }, /* ADD */ +{ op_d130_0_comp_ff, 53552, 0x00000002 }, /* ADD */ +{ op_d138_0_comp_ff, 53560, 0x00000002 }, /* ADD */ +{ op_d139_0_comp_ff, 53561, 0x00000002 }, /* ADD */ +{ op_d140_0_comp_ff, 53568, 0x0000000c }, /* ADDX */ +{ op_d148_0_comp_ff, 53576, 0x0000000c }, /* ADDX */ +{ op_d150_0_comp_ff, 53584, 0x00000000 }, /* ADD */ +{ op_d158_0_comp_ff, 53592, 0x00000000 }, /* ADD */ +{ op_d160_0_comp_ff, 53600, 0x00000000 }, /* ADD */ +{ op_d168_0_comp_ff, 53608, 0x00000002 }, /* ADD */ +{ op_d170_0_comp_ff, 53616, 0x00000002 }, /* ADD */ +{ op_d178_0_comp_ff, 53624, 0x00000002 }, /* ADD */ +{ op_d179_0_comp_ff, 53625, 0x00000002 }, /* ADD */ +{ op_d180_0_comp_ff, 53632, 0x0000000c }, /* ADDX */ +{ op_d188_0_comp_ff, 53640, 0x0000000c }, /* ADDX */ +{ op_d190_0_comp_ff, 53648, 0x00000000 }, /* ADD */ +{ op_d198_0_comp_ff, 53656, 0x00000000 }, /* ADD */ +{ op_d1a0_0_comp_ff, 53664, 0x00000000 }, /* ADD */ +{ op_d1a8_0_comp_ff, 53672, 0x00000002 }, /* ADD */ +{ op_d1b0_0_comp_ff, 53680, 0x00000002 }, /* ADD */ +{ op_d1b8_0_comp_ff, 53688, 0x00000002 }, /* ADD */ +{ op_d1b9_0_comp_ff, 53689, 0x00000002 }, /* ADD */ +{ op_d1c0_0_comp_ff, 53696, 0x00000000 }, /* ADDA */ +{ op_d1c8_0_comp_ff, 53704, 0x00000000 }, /* ADDA */ +{ op_d1d0_0_comp_ff, 53712, 0x00000000 }, /* ADDA */ +{ op_d1d8_0_comp_ff, 53720, 0x00000000 }, /* ADDA */ +{ op_d1e0_0_comp_ff, 53728, 0x00000000 }, /* ADDA */ +{ op_d1e8_0_comp_ff, 53736, 0x00000002 }, /* ADDA */ +{ op_d1f0_0_comp_ff, 53744, 0x00000002 }, /* ADDA */ +{ op_d1f8_0_comp_ff, 53752, 0x00000002 }, /* ADDA */ +{ op_d1f9_0_comp_ff, 53753, 0x00000002 }, /* ADDA */ +{ op_d1fa_0_comp_ff, 53754, 0x00000002 }, /* ADDA */ +{ op_d1fb_0_comp_ff, 53755, 0x00000002 }, /* ADDA */ +{ op_d1fc_0_comp_ff, 53756, 0x00000002 }, /* ADDA */ +{ op_e000_0_comp_ff, 57344, 0x00000000 }, /* ASR */ +{ op_e008_0_comp_ff, 57352, 0x00000000 }, /* LSR */ +{ NULL, 57360, 0x00000000 }, /* ROXR */ +{ op_e018_0_comp_ff, 57368, 0x00000000 }, /* ROR */ +{ op_e020_0_comp_ff, 57376, 0x00000004 }, /* ASR */ +{ op_e028_0_comp_ff, 57384, 0x00000004 }, /* LSR */ +{ NULL, 57392, 0x00000000 }, /* ROXR */ +{ op_e038_0_comp_ff, 57400, 0x00000000 }, /* ROR */ +{ op_e040_0_comp_ff, 57408, 0x00000000 }, /* ASR */ +{ op_e048_0_comp_ff, 57416, 0x00000000 }, /* LSR */ +{ NULL, 57424, 0x00000000 }, /* ROXR */ +{ op_e058_0_comp_ff, 57432, 0x00000000 }, /* ROR */ +{ op_e060_0_comp_ff, 57440, 0x00000004 }, /* ASR */ +{ op_e068_0_comp_ff, 57448, 0x00000004 }, /* LSR */ +{ NULL, 57456, 0x00000000 }, /* ROXR */ +{ op_e078_0_comp_ff, 57464, 0x00000000 }, /* ROR */ +{ op_e080_0_comp_ff, 57472, 0x00000000 }, /* ASR */ +{ op_e088_0_comp_ff, 57480, 0x00000000 }, /* LSR */ +{ NULL, 57488, 0x00000000 }, /* ROXR */ +{ op_e098_0_comp_ff, 57496, 0x00000000 }, /* ROR */ +{ op_e0a0_0_comp_ff, 57504, 0x00000004 }, /* ASR */ +{ op_e0a8_0_comp_ff, 57512, 0x00000004 }, /* LSR */ +{ NULL, 57520, 0x00000000 }, /* ROXR */ +{ op_e0b8_0_comp_ff, 57528, 0x00000000 }, /* ROR */ +{ NULL, 57552, 0x00000000 }, /* ASRW */ +{ NULL, 57560, 0x00000000 }, /* ASRW */ +{ NULL, 57568, 0x00000000 }, /* ASRW */ +{ NULL, 57576, 0x00000000 }, /* ASRW */ +{ NULL, 57584, 0x00000000 }, /* ASRW */ +{ NULL, 57592, 0x00000000 }, /* ASRW */ +{ NULL, 57593, 0x00000000 }, /* ASRW */ +{ op_e100_0_comp_ff, 57600, 0x00000000 }, /* ASL */ +{ op_e108_0_comp_ff, 57608, 0x00000000 }, /* LSL */ +{ NULL, 57616, 0x00000000 }, /* ROXL */ +{ op_e118_0_comp_ff, 57624, 0x00000000 }, /* ROL */ +{ op_e120_0_comp_ff, 57632, 0x00000004 }, /* ASL */ +{ op_e128_0_comp_ff, 57640, 0x00000004 }, /* LSL */ +{ NULL, 57648, 0x00000000 }, /* ROXL */ +{ op_e138_0_comp_ff, 57656, 0x00000000 }, /* ROL */ +{ op_e140_0_comp_ff, 57664, 0x00000000 }, /* ASL */ +{ op_e148_0_comp_ff, 57672, 0x00000000 }, /* LSL */ +{ NULL, 57680, 0x00000000 }, /* ROXL */ +{ op_e158_0_comp_ff, 57688, 0x00000000 }, /* ROL */ +{ op_e160_0_comp_ff, 57696, 0x00000004 }, /* ASL */ +{ op_e168_0_comp_ff, 57704, 0x00000004 }, /* LSL */ +{ NULL, 57712, 0x00000000 }, /* ROXL */ +{ op_e178_0_comp_ff, 57720, 0x00000000 }, /* ROL */ +{ op_e180_0_comp_ff, 57728, 0x00000000 }, /* ASL */ +{ op_e188_0_comp_ff, 57736, 0x00000000 }, /* LSL */ +{ NULL, 57744, 0x00000000 }, /* ROXL */ +{ op_e198_0_comp_ff, 57752, 0x00000000 }, /* ROL */ +{ op_e1a0_0_comp_ff, 57760, 0x00000004 }, /* ASL */ +{ op_e1a8_0_comp_ff, 57768, 0x00000004 }, /* LSL */ +{ NULL, 57776, 0x00000000 }, /* ROXL */ +{ op_e1b8_0_comp_ff, 57784, 0x00000000 }, /* ROL */ +{ NULL, 57808, 0x00000000 }, /* ASLW */ +{ NULL, 57816, 0x00000000 }, /* ASLW */ +{ NULL, 57824, 0x00000000 }, /* ASLW */ +{ NULL, 57832, 0x00000000 }, /* ASLW */ +{ NULL, 57840, 0x00000000 }, /* ASLW */ +{ NULL, 57848, 0x00000000 }, /* ASLW */ +{ NULL, 57849, 0x00000000 }, /* ASLW */ +{ NULL, 58064, 0x00000000 }, /* LSRW */ +{ NULL, 58072, 0x00000000 }, /* LSRW */ +{ NULL, 58080, 0x00000000 }, /* LSRW */ +{ NULL, 58088, 0x00000000 }, /* LSRW */ +{ NULL, 58096, 0x00000000 }, /* LSRW */ +{ NULL, 58104, 0x00000000 }, /* LSRW */ +{ NULL, 58105, 0x00000000 }, /* LSRW */ +{ NULL, 58320, 0x00000000 }, /* LSLW */ +{ NULL, 58328, 0x00000000 }, /* LSLW */ +{ NULL, 58336, 0x00000000 }, /* LSLW */ +{ NULL, 58344, 0x00000000 }, /* LSLW */ +{ NULL, 58352, 0x00000000 }, /* LSLW */ +{ NULL, 58360, 0x00000000 }, /* LSLW */ +{ NULL, 58361, 0x00000000 }, /* LSLW */ +{ NULL, 58576, 0x00000000 }, /* ROXRW */ +{ NULL, 58584, 0x00000000 }, /* ROXRW */ +{ NULL, 58592, 0x00000000 }, /* ROXRW */ +{ NULL, 58600, 0x00000000 }, /* ROXRW */ +{ NULL, 58608, 0x00000000 }, /* ROXRW */ +{ NULL, 58616, 0x00000000 }, /* ROXRW */ +{ NULL, 58617, 0x00000000 }, /* ROXRW */ +{ NULL, 58832, 0x00000000 }, /* ROXLW */ +{ NULL, 58840, 0x00000000 }, /* ROXLW */ +{ NULL, 58848, 0x00000000 }, /* ROXLW */ +{ NULL, 58856, 0x00000000 }, /* ROXLW */ +{ NULL, 58864, 0x00000000 }, /* ROXLW */ +{ NULL, 58872, 0x00000000 }, /* ROXLW */ +{ NULL, 58873, 0x00000000 }, /* ROXLW */ +{ NULL, 59088, 0x00000000 }, /* RORW */ +{ NULL, 59096, 0x00000000 }, /* RORW */ +{ NULL, 59104, 0x00000000 }, /* RORW */ +{ NULL, 59112, 0x00000000 }, /* RORW */ +{ NULL, 59120, 0x00000000 }, /* RORW */ +{ NULL, 59128, 0x00000000 }, /* RORW */ +{ NULL, 59129, 0x00000000 }, /* RORW */ +{ NULL, 59344, 0x00000000 }, /* ROLW */ +{ NULL, 59352, 0x00000000 }, /* ROLW */ +{ NULL, 59360, 0x00000000 }, /* ROLW */ +{ NULL, 59368, 0x00000000 }, /* ROLW */ +{ NULL, 59376, 0x00000000 }, /* ROLW */ +{ NULL, 59384, 0x00000000 }, /* ROLW */ +{ NULL, 59385, 0x00000000 }, /* ROLW */ +{ NULL, 59584, 0x00000000 }, /* BFTST */ +{ NULL, 59600, 0x00000000 }, /* BFTST */ +{ NULL, 59624, 0x00000000 }, /* BFTST */ +{ NULL, 59632, 0x00000000 }, /* BFTST */ +{ NULL, 59640, 0x00000000 }, /* BFTST */ +{ NULL, 59641, 0x00000000 }, /* BFTST */ +{ NULL, 59642, 0x00000000 }, /* BFTST */ +{ NULL, 59643, 0x00000000 }, /* BFTST */ +{ NULL, 59840, 0x00000000 }, /* BFEXTU */ +{ NULL, 59856, 0x00000000 }, /* BFEXTU */ +{ NULL, 59880, 0x00000000 }, /* BFEXTU */ +{ NULL, 59888, 0x00000000 }, /* BFEXTU */ +{ NULL, 59896, 0x00000000 }, /* BFEXTU */ +{ NULL, 59897, 0x00000000 }, /* BFEXTU */ +{ NULL, 59898, 0x00000000 }, /* BFEXTU */ +{ NULL, 59899, 0x00000000 }, /* BFEXTU */ +{ NULL, 60096, 0x00000000 }, /* BFCHG */ +{ NULL, 60112, 0x00000000 }, /* BFCHG */ +{ NULL, 60136, 0x00000000 }, /* BFCHG */ +{ NULL, 60144, 0x00000000 }, /* BFCHG */ +{ NULL, 60152, 0x00000000 }, /* BFCHG */ +{ NULL, 60153, 0x00000000 }, /* BFCHG */ +{ NULL, 60352, 0x00000000 }, /* BFEXTS */ +{ NULL, 60368, 0x00000000 }, /* BFEXTS */ +{ NULL, 60392, 0x00000000 }, /* BFEXTS */ +{ NULL, 60400, 0x00000000 }, /* BFEXTS */ +{ NULL, 60408, 0x00000000 }, /* BFEXTS */ +{ NULL, 60409, 0x00000000 }, /* BFEXTS */ +{ NULL, 60410, 0x00000000 }, /* BFEXTS */ +{ NULL, 60411, 0x00000000 }, /* BFEXTS */ +{ NULL, 60608, 0x00000000 }, /* BFCLR */ +{ NULL, 60624, 0x00000000 }, /* BFCLR */ +{ NULL, 60648, 0x00000000 }, /* BFCLR */ +{ NULL, 60656, 0x00000000 }, /* BFCLR */ +{ NULL, 60664, 0x00000000 }, /* BFCLR */ +{ NULL, 60665, 0x00000000 }, /* BFCLR */ +{ NULL, 60864, 0x00000000 }, /* BFFFO */ +{ NULL, 60880, 0x00000000 }, /* BFFFO */ +{ NULL, 60904, 0x00000000 }, /* BFFFO */ +{ NULL, 60912, 0x00000000 }, /* BFFFO */ +{ NULL, 60920, 0x00000000 }, /* BFFFO */ +{ NULL, 60921, 0x00000000 }, /* BFFFO */ +{ NULL, 60922, 0x00000000 }, /* BFFFO */ +{ NULL, 60923, 0x00000000 }, /* BFFFO */ +{ NULL, 61120, 0x00000000 }, /* BFSET */ +{ NULL, 61136, 0x00000000 }, /* BFSET */ +{ NULL, 61160, 0x00000000 }, /* BFSET */ +{ NULL, 61168, 0x00000000 }, /* BFSET */ +{ NULL, 61176, 0x00000000 }, /* BFSET */ +{ NULL, 61177, 0x00000000 }, /* BFSET */ +{ NULL, 61376, 0x00000000 }, /* BFINS */ +{ NULL, 61392, 0x00000000 }, /* BFINS */ +{ NULL, 61416, 0x00000000 }, /* BFINS */ +{ NULL, 61424, 0x00000000 }, /* BFINS */ +{ NULL, 61432, 0x00000000 }, /* BFINS */ +{ NULL, 61433, 0x00000000 }, /* BFINS */ +{ op_f200_0_comp_ff, 61952, 0x00000002 }, /* FPP */ +{ op_f208_0_comp_ff, 61960, 0x00000002 }, /* FPP */ +{ op_f210_0_comp_ff, 61968, 0x00000002 }, /* FPP */ +{ op_f218_0_comp_ff, 61976, 0x00000002 }, /* FPP */ +{ op_f220_0_comp_ff, 61984, 0x00000002 }, /* FPP */ +{ op_f228_0_comp_ff, 61992, 0x00000002 }, /* FPP */ +{ op_f230_0_comp_ff, 62000, 0x00000002 }, /* FPP */ +{ op_f238_0_comp_ff, 62008, 0x00000002 }, /* FPP */ +{ op_f239_0_comp_ff, 62009, 0x00000002 }, /* FPP */ +{ op_f23a_0_comp_ff, 62010, 0x00000002 }, /* FPP */ +{ op_f23b_0_comp_ff, 62011, 0x00000002 }, /* FPP */ +{ op_f23c_0_comp_ff, 62012, 0x00000002 }, /* FPP */ +{ op_f240_0_comp_ff, 62016, 0x00000006 }, /* FScc */ +{ NULL, 62024, 0x00000001 }, /* FDBcc */ +{ op_f250_0_comp_ff, 62032, 0x00000006 }, /* FScc */ +{ op_f258_0_comp_ff, 62040, 0x00000006 }, /* FScc */ +{ op_f260_0_comp_ff, 62048, 0x00000006 }, /* FScc */ +{ op_f268_0_comp_ff, 62056, 0x00000006 }, /* FScc */ +{ op_f270_0_comp_ff, 62064, 0x00000006 }, /* FScc */ +{ op_f278_0_comp_ff, 62072, 0x00000006 }, /* FScc */ +{ op_f279_0_comp_ff, 62073, 0x00000006 }, /* FScc */ +{ NULL, 62074, 0x00000001 }, /* FTRAPcc */ +{ NULL, 62075, 0x00000001 }, /* FTRAPcc */ +{ NULL, 62076, 0x00000001 }, /* FTRAPcc */ +{ op_f280_0_comp_ff, 62080, 0x00000005 }, /* FBcc */ +{ op_f2c0_0_comp_ff, 62144, 0x00000005 }, /* FBcc */ +{ NULL, 62224, 0x00000000 }, /* FSAVE */ +{ NULL, 62240, 0x00000000 }, /* FSAVE */ +{ NULL, 62248, 0x00000000 }, /* FSAVE */ +{ NULL, 62256, 0x00000000 }, /* FSAVE */ +{ NULL, 62264, 0x00000000 }, /* FSAVE */ +{ NULL, 62265, 0x00000000 }, /* FSAVE */ +{ NULL, 62288, 0x00000000 }, /* FRESTORE */ +{ NULL, 62296, 0x00000000 }, /* FRESTORE */ +{ NULL, 62312, 0x00000000 }, /* FRESTORE */ +{ NULL, 62320, 0x00000000 }, /* FRESTORE */ +{ NULL, 62328, 0x00000000 }, /* FRESTORE */ +{ NULL, 62329, 0x00000000 }, /* FRESTORE */ +{ NULL, 62330, 0x00000000 }, /* FRESTORE */ +{ NULL, 62331, 0x00000000 }, /* FRESTORE */ +{ NULL, 62472, 0x00000001 }, /* CINVL */ +{ NULL, 62480, 0x00000001 }, /* CINVP */ +{ NULL, 62488, 0x00000001 }, /* CINVA */ +{ NULL, 62489, 0x00000001 }, /* CINVA */ +{ NULL, 62490, 0x00000001 }, /* CINVA */ +{ NULL, 62491, 0x00000001 }, /* CINVA */ +{ NULL, 62492, 0x00000001 }, /* CINVA */ +{ NULL, 62493, 0x00000001 }, /* CINVA */ +{ NULL, 62494, 0x00000001 }, /* CINVA */ +{ NULL, 62495, 0x00000001 }, /* CINVA */ +{ NULL, 62504, 0x00000001 }, /* CPUSHL */ +{ NULL, 62512, 0x00000001 }, /* CPUSHP */ +{ NULL, 62520, 0x00000001 }, /* CPUSHA */ +{ NULL, 62521, 0x00000001 }, /* CPUSHA */ +{ NULL, 62522, 0x00000001 }, /* CPUSHA */ +{ NULL, 62523, 0x00000001 }, /* CPUSHA */ +{ NULL, 62524, 0x00000001 }, /* CPUSHA */ +{ NULL, 62525, 0x00000001 }, /* CPUSHA */ +{ NULL, 62526, 0x00000001 }, /* CPUSHA */ +{ NULL, 62527, 0x00000001 }, /* CPUSHA */ +{ NULL, 62720, 0x00000001 }, /* MMUOP */ +{ op_f600_0_comp_ff, 62976, 0x00000002 }, /* MOVE16 */ +{ op_f608_0_comp_ff, 62984, 0x00000002 }, /* MOVE16 */ +{ op_f610_0_comp_ff, 62992, 0x00000002 }, /* MOVE16 */ +{ op_f618_0_comp_ff, 63000, 0x00000002 }, /* MOVE16 */ +{ op_f620_0_comp_ff, 63008, 0x00000002 }, /* MOVE16 */ +{ 0, 65536, 0 }}; +const struct comptbl op_smalltbl_0_comp_nf[] = { +{ op_0_0_comp_nf, 0, 0x00000002 }, /* OR */ +{ op_10_0_comp_nf, 16, 0x00000002 }, /* OR */ +{ op_18_0_comp_nf, 24, 0x00000002 }, /* OR */ +{ op_20_0_comp_nf, 32, 0x00000002 }, /* OR */ +{ op_28_0_comp_nf, 40, 0x00000002 }, /* OR */ +{ op_30_0_comp_nf, 48, 0x00000002 }, /* OR */ +{ op_38_0_comp_nf, 56, 0x00000002 }, /* OR */ +{ op_39_0_comp_nf, 57, 0x00000002 }, /* OR */ +{ NULL, 60, 0x00000001 }, /* ORSR */ +{ op_40_0_comp_nf, 64, 0x00000002 }, /* OR */ +{ op_50_0_comp_nf, 80, 0x00000002 }, /* OR */ +{ op_58_0_comp_nf, 88, 0x00000002 }, /* OR */ +{ op_60_0_comp_nf, 96, 0x00000002 }, /* OR */ +{ op_68_0_comp_nf, 104, 0x00000002 }, /* OR */ +{ op_70_0_comp_nf, 112, 0x00000002 }, /* OR */ +{ op_78_0_comp_nf, 120, 0x00000002 }, /* OR */ +{ op_79_0_comp_nf, 121, 0x00000002 }, /* OR */ +{ NULL, 124, 0x00000001 }, /* ORSR */ +{ op_80_0_comp_nf, 128, 0x00000002 }, /* OR */ +{ op_90_0_comp_nf, 144, 0x00000002 }, /* OR */ +{ op_98_0_comp_nf, 152, 0x00000002 }, /* OR */ +{ op_a0_0_comp_nf, 160, 0x00000002 }, /* OR */ +{ op_a8_0_comp_nf, 168, 0x00000002 }, /* OR */ +{ op_b0_0_comp_nf, 176, 0x00000002 }, /* OR */ +{ op_b8_0_comp_nf, 184, 0x00000002 }, /* OR */ +{ op_b9_0_comp_nf, 185, 0x00000002 }, /* OR */ +{ NULL, 208, 0x00000001 }, /* CHK2 */ +{ NULL, 232, 0x00000001 }, /* CHK2 */ +{ NULL, 240, 0x00000001 }, /* CHK2 */ +{ NULL, 248, 0x00000001 }, /* CHK2 */ +{ NULL, 249, 0x00000001 }, /* CHK2 */ +{ NULL, 250, 0x00000001 }, /* CHK2 */ +{ NULL, 251, 0x00000001 }, /* CHK2 */ +{ op_100_0_comp_nf, 256, 0x00000000 }, /* BTST */ +{ NULL, 264, 0x00000001 }, /* MVPMR */ +{ op_110_0_comp_nf, 272, 0x00000000 }, /* BTST */ +{ op_118_0_comp_nf, 280, 0x00000000 }, /* BTST */ +{ op_120_0_comp_nf, 288, 0x00000000 }, /* BTST */ +{ op_128_0_comp_nf, 296, 0x00000002 }, /* BTST */ +{ op_130_0_comp_nf, 304, 0x00000002 }, /* BTST */ +{ op_138_0_comp_nf, 312, 0x00000002 }, /* BTST */ +{ op_139_0_comp_nf, 313, 0x00000002 }, /* BTST */ +{ op_13a_0_comp_nf, 314, 0x00000002 }, /* BTST */ +{ op_13b_0_comp_nf, 315, 0x00000002 }, /* BTST */ +{ op_13c_0_comp_nf, 316, 0x00000002 }, /* BTST */ +{ op_140_0_comp_nf, 320, 0x00000000 }, /* BCHG */ +{ NULL, 328, 0x00000001 }, /* MVPMR */ +{ op_150_0_comp_nf, 336, 0x00000000 }, /* BCHG */ +{ op_158_0_comp_nf, 344, 0x00000000 }, /* BCHG */ +{ op_160_0_comp_nf, 352, 0x00000000 }, /* BCHG */ +{ op_168_0_comp_nf, 360, 0x00000002 }, /* BCHG */ +{ op_170_0_comp_nf, 368, 0x00000002 }, /* BCHG */ +{ op_178_0_comp_nf, 376, 0x00000002 }, /* BCHG */ +{ op_179_0_comp_nf, 377, 0x00000002 }, /* BCHG */ +{ op_17a_0_comp_nf, 378, 0x00000002 }, /* BCHG */ +{ op_17b_0_comp_nf, 379, 0x00000002 }, /* BCHG */ +{ op_180_0_comp_nf, 384, 0x00000000 }, /* BCLR */ +{ NULL, 392, 0x00000001 }, /* MVPRM */ +{ op_190_0_comp_nf, 400, 0x00000000 }, /* BCLR */ +{ op_198_0_comp_nf, 408, 0x00000000 }, /* BCLR */ +{ op_1a0_0_comp_nf, 416, 0x00000000 }, /* BCLR */ +{ op_1a8_0_comp_nf, 424, 0x00000002 }, /* BCLR */ +{ op_1b0_0_comp_nf, 432, 0x00000002 }, /* BCLR */ +{ op_1b8_0_comp_nf, 440, 0x00000002 }, /* BCLR */ +{ op_1b9_0_comp_nf, 441, 0x00000002 }, /* BCLR */ +{ op_1ba_0_comp_nf, 442, 0x00000002 }, /* BCLR */ +{ op_1bb_0_comp_nf, 443, 0x00000002 }, /* BCLR */ +{ op_1c0_0_comp_nf, 448, 0x00000000 }, /* BSET */ +{ NULL, 456, 0x00000001 }, /* MVPRM */ +{ op_1d0_0_comp_nf, 464, 0x00000000 }, /* BSET */ +{ op_1d8_0_comp_nf, 472, 0x00000000 }, /* BSET */ +{ op_1e0_0_comp_nf, 480, 0x00000000 }, /* BSET */ +{ op_1e8_0_comp_nf, 488, 0x00000002 }, /* BSET */ +{ op_1f0_0_comp_nf, 496, 0x00000002 }, /* BSET */ +{ op_1f8_0_comp_nf, 504, 0x00000002 }, /* BSET */ +{ op_1f9_0_comp_nf, 505, 0x00000002 }, /* BSET */ +{ op_1fa_0_comp_nf, 506, 0x00000002 }, /* BSET */ +{ op_1fb_0_comp_nf, 507, 0x00000002 }, /* BSET */ +{ op_200_0_comp_nf, 512, 0x00000002 }, /* AND */ +{ op_210_0_comp_nf, 528, 0x00000002 }, /* AND */ +{ op_218_0_comp_nf, 536, 0x00000002 }, /* AND */ +{ op_220_0_comp_nf, 544, 0x00000002 }, /* AND */ +{ op_228_0_comp_nf, 552, 0x00000002 }, /* AND */ +{ op_230_0_comp_nf, 560, 0x00000002 }, /* AND */ +{ op_238_0_comp_nf, 568, 0x00000002 }, /* AND */ +{ op_239_0_comp_nf, 569, 0x00000002 }, /* AND */ +{ NULL, 572, 0x00000001 }, /* ANDSR */ +{ op_240_0_comp_nf, 576, 0x00000002 }, /* AND */ +{ op_250_0_comp_nf, 592, 0x00000002 }, /* AND */ +{ op_258_0_comp_nf, 600, 0x00000002 }, /* AND */ +{ op_260_0_comp_nf, 608, 0x00000002 }, /* AND */ +{ op_268_0_comp_nf, 616, 0x00000002 }, /* AND */ +{ op_270_0_comp_nf, 624, 0x00000002 }, /* AND */ +{ op_278_0_comp_nf, 632, 0x00000002 }, /* AND */ +{ op_279_0_comp_nf, 633, 0x00000002 }, /* AND */ +{ NULL, 636, 0x00000001 }, /* ANDSR */ +{ op_280_0_comp_nf, 640, 0x00000002 }, /* AND */ +{ op_290_0_comp_nf, 656, 0x00000002 }, /* AND */ +{ op_298_0_comp_nf, 664, 0x00000002 }, /* AND */ +{ op_2a0_0_comp_nf, 672, 0x00000002 }, /* AND */ +{ op_2a8_0_comp_nf, 680, 0x00000002 }, /* AND */ +{ op_2b0_0_comp_nf, 688, 0x00000002 }, /* AND */ +{ op_2b8_0_comp_nf, 696, 0x00000002 }, /* AND */ +{ op_2b9_0_comp_nf, 697, 0x00000002 }, /* AND */ +{ NULL, 720, 0x00000001 }, /* CHK2 */ +{ NULL, 744, 0x00000001 }, /* CHK2 */ +{ NULL, 752, 0x00000001 }, /* CHK2 */ +{ NULL, 760, 0x00000001 }, /* CHK2 */ +{ NULL, 761, 0x00000001 }, /* CHK2 */ +{ NULL, 762, 0x00000001 }, /* CHK2 */ +{ NULL, 763, 0x00000001 }, /* CHK2 */ +{ op_400_0_comp_nf, 1024, 0x00000002 }, /* SUB */ +{ op_410_0_comp_nf, 1040, 0x00000002 }, /* SUB */ +{ op_418_0_comp_nf, 1048, 0x00000002 }, /* SUB */ +{ op_420_0_comp_nf, 1056, 0x00000002 }, /* SUB */ +{ op_428_0_comp_nf, 1064, 0x00000002 }, /* SUB */ +{ op_430_0_comp_nf, 1072, 0x00000002 }, /* SUB */ +{ op_438_0_comp_nf, 1080, 0x00000002 }, /* SUB */ +{ op_439_0_comp_nf, 1081, 0x00000002 }, /* SUB */ +{ op_440_0_comp_nf, 1088, 0x00000002 }, /* SUB */ +{ op_450_0_comp_nf, 1104, 0x00000002 }, /* SUB */ +{ op_458_0_comp_nf, 1112, 0x00000002 }, /* SUB */ +{ op_460_0_comp_nf, 1120, 0x00000002 }, /* SUB */ +{ op_468_0_comp_nf, 1128, 0x00000002 }, /* SUB */ +{ op_470_0_comp_nf, 1136, 0x00000002 }, /* SUB */ +{ op_478_0_comp_nf, 1144, 0x00000002 }, /* SUB */ +{ op_479_0_comp_nf, 1145, 0x00000002 }, /* SUB */ +{ op_480_0_comp_nf, 1152, 0x00000002 }, /* SUB */ +{ op_490_0_comp_nf, 1168, 0x00000002 }, /* SUB */ +{ op_498_0_comp_nf, 1176, 0x00000002 }, /* SUB */ +{ op_4a0_0_comp_nf, 1184, 0x00000002 }, /* SUB */ +{ op_4a8_0_comp_nf, 1192, 0x00000002 }, /* SUB */ +{ op_4b0_0_comp_nf, 1200, 0x00000002 }, /* SUB */ +{ op_4b8_0_comp_nf, 1208, 0x00000002 }, /* SUB */ +{ op_4b9_0_comp_nf, 1209, 0x00000002 }, /* SUB */ +{ NULL, 1232, 0x00000001 }, /* CHK2 */ +{ NULL, 1256, 0x00000001 }, /* CHK2 */ +{ NULL, 1264, 0x00000001 }, /* CHK2 */ +{ NULL, 1272, 0x00000001 }, /* CHK2 */ +{ NULL, 1273, 0x00000001 }, /* CHK2 */ +{ NULL, 1274, 0x00000001 }, /* CHK2 */ +{ NULL, 1275, 0x00000001 }, /* CHK2 */ +{ op_600_0_comp_nf, 1536, 0x00000002 }, /* ADD */ +{ op_610_0_comp_nf, 1552, 0x00000002 }, /* ADD */ +{ op_618_0_comp_nf, 1560, 0x00000002 }, /* ADD */ +{ op_620_0_comp_nf, 1568, 0x00000002 }, /* ADD */ +{ op_628_0_comp_nf, 1576, 0x00000002 }, /* ADD */ +{ op_630_0_comp_nf, 1584, 0x00000002 }, /* ADD */ +{ op_638_0_comp_nf, 1592, 0x00000002 }, /* ADD */ +{ op_639_0_comp_nf, 1593, 0x00000002 }, /* ADD */ +{ op_640_0_comp_nf, 1600, 0x00000002 }, /* ADD */ +{ op_650_0_comp_nf, 1616, 0x00000002 }, /* ADD */ +{ op_658_0_comp_nf, 1624, 0x00000002 }, /* ADD */ +{ op_660_0_comp_nf, 1632, 0x00000002 }, /* ADD */ +{ op_668_0_comp_nf, 1640, 0x00000002 }, /* ADD */ +{ op_670_0_comp_nf, 1648, 0x00000002 }, /* ADD */ +{ op_678_0_comp_nf, 1656, 0x00000002 }, /* ADD */ +{ op_679_0_comp_nf, 1657, 0x00000002 }, /* ADD */ +{ op_680_0_comp_nf, 1664, 0x00000002 }, /* ADD */ +{ op_690_0_comp_nf, 1680, 0x00000002 }, /* ADD */ +{ op_698_0_comp_nf, 1688, 0x00000002 }, /* ADD */ +{ op_6a0_0_comp_nf, 1696, 0x00000002 }, /* ADD */ +{ op_6a8_0_comp_nf, 1704, 0x00000002 }, /* ADD */ +{ op_6b0_0_comp_nf, 1712, 0x00000002 }, /* ADD */ +{ op_6b8_0_comp_nf, 1720, 0x00000002 }, /* ADD */ +{ op_6b9_0_comp_nf, 1721, 0x00000002 }, /* ADD */ +{ NULL, 1728, 0x00000001 }, /* RTM */ +{ NULL, 1736, 0x00000001 }, /* RTM */ +{ NULL, 1744, 0x00000001 }, /* CALLM */ +{ NULL, 1768, 0x00000001 }, /* CALLM */ +{ NULL, 1776, 0x00000001 }, /* CALLM */ +{ NULL, 1784, 0x00000001 }, /* CALLM */ +{ NULL, 1785, 0x00000001 }, /* CALLM */ +{ NULL, 1786, 0x00000001 }, /* CALLM */ +{ NULL, 1787, 0x00000001 }, /* CALLM */ +{ op_800_0_comp_nf, 2048, 0x00000002 }, /* BTST */ +{ op_810_0_comp_nf, 2064, 0x00000002 }, /* BTST */ +{ op_818_0_comp_nf, 2072, 0x00000002 }, /* BTST */ +{ op_820_0_comp_nf, 2080, 0x00000002 }, /* BTST */ +{ op_828_0_comp_nf, 2088, 0x00000002 }, /* BTST */ +{ op_830_0_comp_nf, 2096, 0x00000002 }, /* BTST */ +{ op_838_0_comp_nf, 2104, 0x00000002 }, /* BTST */ +{ op_839_0_comp_nf, 2105, 0x00000002 }, /* BTST */ +{ op_83a_0_comp_nf, 2106, 0x00000002 }, /* BTST */ +{ op_83b_0_comp_nf, 2107, 0x00000002 }, /* BTST */ +{ op_83c_0_comp_nf, 2108, 0x00000002 }, /* BTST */ +{ op_840_0_comp_nf, 2112, 0x00000002 }, /* BCHG */ +{ op_850_0_comp_nf, 2128, 0x00000002 }, /* BCHG */ +{ op_858_0_comp_nf, 2136, 0x00000002 }, /* BCHG */ +{ op_860_0_comp_nf, 2144, 0x00000002 }, /* BCHG */ +{ op_868_0_comp_nf, 2152, 0x00000002 }, /* BCHG */ +{ op_870_0_comp_nf, 2160, 0x00000002 }, /* BCHG */ +{ op_878_0_comp_nf, 2168, 0x00000002 }, /* BCHG */ +{ op_879_0_comp_nf, 2169, 0x00000002 }, /* BCHG */ +{ op_87a_0_comp_nf, 2170, 0x00000002 }, /* BCHG */ +{ op_87b_0_comp_nf, 2171, 0x00000002 }, /* BCHG */ +{ op_880_0_comp_nf, 2176, 0x00000002 }, /* BCLR */ +{ op_890_0_comp_nf, 2192, 0x00000002 }, /* BCLR */ +{ op_898_0_comp_nf, 2200, 0x00000002 }, /* BCLR */ +{ op_8a0_0_comp_nf, 2208, 0x00000002 }, /* BCLR */ +{ op_8a8_0_comp_nf, 2216, 0x00000002 }, /* BCLR */ +{ op_8b0_0_comp_nf, 2224, 0x00000002 }, /* BCLR */ +{ op_8b8_0_comp_nf, 2232, 0x00000002 }, /* BCLR */ +{ op_8b9_0_comp_nf, 2233, 0x00000002 }, /* BCLR */ +{ op_8ba_0_comp_nf, 2234, 0x00000002 }, /* BCLR */ +{ op_8bb_0_comp_nf, 2235, 0x00000002 }, /* BCLR */ +{ op_8c0_0_comp_nf, 2240, 0x00000002 }, /* BSET */ +{ op_8d0_0_comp_nf, 2256, 0x00000002 }, /* BSET */ +{ op_8d8_0_comp_nf, 2264, 0x00000002 }, /* BSET */ +{ op_8e0_0_comp_nf, 2272, 0x00000002 }, /* BSET */ +{ op_8e8_0_comp_nf, 2280, 0x00000002 }, /* BSET */ +{ op_8f0_0_comp_nf, 2288, 0x00000002 }, /* BSET */ +{ op_8f8_0_comp_nf, 2296, 0x00000002 }, /* BSET */ +{ op_8f9_0_comp_nf, 2297, 0x00000002 }, /* BSET */ +{ op_8fa_0_comp_nf, 2298, 0x00000002 }, /* BSET */ +{ op_8fb_0_comp_nf, 2299, 0x00000002 }, /* BSET */ +{ op_a00_0_comp_nf, 2560, 0x00000002 }, /* EOR */ +{ op_a10_0_comp_nf, 2576, 0x00000002 }, /* EOR */ +{ op_a18_0_comp_nf, 2584, 0x00000002 }, /* EOR */ +{ op_a20_0_comp_nf, 2592, 0x00000002 }, /* EOR */ +{ op_a28_0_comp_nf, 2600, 0x00000002 }, /* EOR */ +{ op_a30_0_comp_nf, 2608, 0x00000002 }, /* EOR */ +{ op_a38_0_comp_nf, 2616, 0x00000002 }, /* EOR */ +{ op_a39_0_comp_nf, 2617, 0x00000002 }, /* EOR */ +{ NULL, 2620, 0x00000001 }, /* EORSR */ +{ op_a40_0_comp_nf, 2624, 0x00000002 }, /* EOR */ +{ op_a50_0_comp_nf, 2640, 0x00000002 }, /* EOR */ +{ op_a58_0_comp_nf, 2648, 0x00000002 }, /* EOR */ +{ op_a60_0_comp_nf, 2656, 0x00000002 }, /* EOR */ +{ op_a68_0_comp_nf, 2664, 0x00000002 }, /* EOR */ +{ op_a70_0_comp_nf, 2672, 0x00000002 }, /* EOR */ +{ op_a78_0_comp_nf, 2680, 0x00000002 }, /* EOR */ +{ op_a79_0_comp_nf, 2681, 0x00000002 }, /* EOR */ +{ NULL, 2684, 0x00000001 }, /* EORSR */ +{ op_a80_0_comp_nf, 2688, 0x00000002 }, /* EOR */ +{ op_a90_0_comp_nf, 2704, 0x00000002 }, /* EOR */ +{ op_a98_0_comp_nf, 2712, 0x00000002 }, /* EOR */ +{ op_aa0_0_comp_nf, 2720, 0x00000002 }, /* EOR */ +{ op_aa8_0_comp_nf, 2728, 0x00000002 }, /* EOR */ +{ op_ab0_0_comp_nf, 2736, 0x00000002 }, /* EOR */ +{ op_ab8_0_comp_nf, 2744, 0x00000002 }, /* EOR */ +{ op_ab9_0_comp_nf, 2745, 0x00000002 }, /* EOR */ +{ NULL, 2768, 0x00000000 }, /* CAS */ +{ NULL, 2776, 0x00000000 }, /* CAS */ +{ NULL, 2784, 0x00000000 }, /* CAS */ +{ NULL, 2792, 0x00000000 }, /* CAS */ +{ NULL, 2800, 0x00000000 }, /* CAS */ +{ NULL, 2808, 0x00000000 }, /* CAS */ +{ NULL, 2809, 0x00000000 }, /* CAS */ +{ op_c00_0_comp_nf, 3072, 0x00000002 }, /* CMP */ +{ op_c10_0_comp_nf, 3088, 0x00000002 }, /* CMP */ +{ op_c18_0_comp_nf, 3096, 0x00000002 }, /* CMP */ +{ op_c20_0_comp_nf, 3104, 0x00000002 }, /* CMP */ +{ op_c28_0_comp_nf, 3112, 0x00000002 }, /* CMP */ +{ op_c30_0_comp_nf, 3120, 0x00000002 }, /* CMP */ +{ op_c38_0_comp_nf, 3128, 0x00000002 }, /* CMP */ +{ op_c39_0_comp_nf, 3129, 0x00000002 }, /* CMP */ +{ op_c3a_0_comp_nf, 3130, 0x00000002 }, /* CMP */ +{ op_c3b_0_comp_nf, 3131, 0x00000002 }, /* CMP */ +{ op_c40_0_comp_nf, 3136, 0x00000002 }, /* CMP */ +{ op_c50_0_comp_nf, 3152, 0x00000002 }, /* CMP */ +{ op_c58_0_comp_nf, 3160, 0x00000002 }, /* CMP */ +{ op_c60_0_comp_nf, 3168, 0x00000002 }, /* CMP */ +{ op_c68_0_comp_nf, 3176, 0x00000002 }, /* CMP */ +{ op_c70_0_comp_nf, 3184, 0x00000002 }, /* CMP */ +{ op_c78_0_comp_nf, 3192, 0x00000002 }, /* CMP */ +{ op_c79_0_comp_nf, 3193, 0x00000002 }, /* CMP */ +{ op_c7a_0_comp_nf, 3194, 0x00000002 }, /* CMP */ +{ op_c7b_0_comp_nf, 3195, 0x00000002 }, /* CMP */ +{ op_c80_0_comp_nf, 3200, 0x00000002 }, /* CMP */ +{ op_c90_0_comp_nf, 3216, 0x00000002 }, /* CMP */ +{ op_c98_0_comp_nf, 3224, 0x00000002 }, /* CMP */ +{ op_ca0_0_comp_nf, 3232, 0x00000002 }, /* CMP */ +{ op_ca8_0_comp_nf, 3240, 0x00000002 }, /* CMP */ +{ op_cb0_0_comp_nf, 3248, 0x00000002 }, /* CMP */ +{ op_cb8_0_comp_nf, 3256, 0x00000002 }, /* CMP */ +{ op_cb9_0_comp_nf, 3257, 0x00000002 }, /* CMP */ +{ op_cba_0_comp_nf, 3258, 0x00000002 }, /* CMP */ +{ op_cbb_0_comp_nf, 3259, 0x00000002 }, /* CMP */ +{ NULL, 3280, 0x00000000 }, /* CAS */ +{ NULL, 3288, 0x00000000 }, /* CAS */ +{ NULL, 3296, 0x00000000 }, /* CAS */ +{ NULL, 3304, 0x00000000 }, /* CAS */ +{ NULL, 3312, 0x00000000 }, /* CAS */ +{ NULL, 3320, 0x00000000 }, /* CAS */ +{ NULL, 3321, 0x00000000 }, /* CAS */ +{ NULL, 3324, 0x00000000 }, /* CAS2 */ +{ NULL, 3600, 0x00000001 }, /* MOVES */ +{ NULL, 3608, 0x00000001 }, /* MOVES */ +{ NULL, 3616, 0x00000001 }, /* MOVES */ +{ NULL, 3624, 0x00000001 }, /* MOVES */ +{ NULL, 3632, 0x00000001 }, /* MOVES */ +{ NULL, 3640, 0x00000001 }, /* MOVES */ +{ NULL, 3641, 0x00000001 }, /* MOVES */ +{ NULL, 3664, 0x00000001 }, /* MOVES */ +{ NULL, 3672, 0x00000001 }, /* MOVES */ +{ NULL, 3680, 0x00000001 }, /* MOVES */ +{ NULL, 3688, 0x00000001 }, /* MOVES */ +{ NULL, 3696, 0x00000001 }, /* MOVES */ +{ NULL, 3704, 0x00000001 }, /* MOVES */ +{ NULL, 3705, 0x00000001 }, /* MOVES */ +{ NULL, 3728, 0x00000001 }, /* MOVES */ +{ NULL, 3736, 0x00000001 }, /* MOVES */ +{ NULL, 3744, 0x00000001 }, /* MOVES */ +{ NULL, 3752, 0x00000001 }, /* MOVES */ +{ NULL, 3760, 0x00000001 }, /* MOVES */ +{ NULL, 3768, 0x00000001 }, /* MOVES */ +{ NULL, 3769, 0x00000001 }, /* MOVES */ +{ NULL, 3792, 0x00000000 }, /* CAS */ +{ NULL, 3800, 0x00000000 }, /* CAS */ +{ NULL, 3808, 0x00000000 }, /* CAS */ +{ NULL, 3816, 0x00000000 }, /* CAS */ +{ NULL, 3824, 0x00000000 }, /* CAS */ +{ NULL, 3832, 0x00000000 }, /* CAS */ +{ NULL, 3833, 0x00000000 }, /* CAS */ +{ NULL, 3836, 0x00000000 }, /* CAS2 */ +{ op_1000_0_comp_nf, 4096, 0x00000000 }, /* MOVE */ +{ op_1010_0_comp_nf, 4112, 0x00000000 }, /* MOVE */ +{ op_1018_0_comp_nf, 4120, 0x00000000 }, /* MOVE */ +{ op_1020_0_comp_nf, 4128, 0x00000000 }, /* MOVE */ +{ op_1028_0_comp_nf, 4136, 0x00000002 }, /* MOVE */ +{ op_1030_0_comp_nf, 4144, 0x00000002 }, /* MOVE */ +{ op_1038_0_comp_nf, 4152, 0x00000002 }, /* MOVE */ +{ op_1039_0_comp_nf, 4153, 0x00000002 }, /* MOVE */ +{ op_103a_0_comp_nf, 4154, 0x00000002 }, /* MOVE */ +{ op_103b_0_comp_nf, 4155, 0x00000002 }, /* MOVE */ +{ op_103c_0_comp_nf, 4156, 0x00000002 }, /* MOVE */ +{ op_1080_0_comp_nf, 4224, 0x00000000 }, /* MOVE */ +{ op_1090_0_comp_nf, 4240, 0x00000000 }, /* MOVE */ +{ op_1098_0_comp_nf, 4248, 0x00000000 }, /* MOVE */ +{ op_10a0_0_comp_nf, 4256, 0x00000000 }, /* MOVE */ +{ op_10a8_0_comp_nf, 4264, 0x00000002 }, /* MOVE */ +{ op_10b0_0_comp_nf, 4272, 0x00000002 }, /* MOVE */ +{ op_10b8_0_comp_nf, 4280, 0x00000002 }, /* MOVE */ +{ op_10b9_0_comp_nf, 4281, 0x00000002 }, /* MOVE */ +{ op_10ba_0_comp_nf, 4282, 0x00000002 }, /* MOVE */ +{ op_10bb_0_comp_nf, 4283, 0x00000002 }, /* MOVE */ +{ op_10bc_0_comp_nf, 4284, 0x00000002 }, /* MOVE */ +{ op_10c0_0_comp_nf, 4288, 0x00000000 }, /* MOVE */ +{ op_10d0_0_comp_nf, 4304, 0x00000000 }, /* MOVE */ +{ op_10d8_0_comp_nf, 4312, 0x00000000 }, /* MOVE */ +{ op_10e0_0_comp_nf, 4320, 0x00000000 }, /* MOVE */ +{ op_10e8_0_comp_nf, 4328, 0x00000002 }, /* MOVE */ +{ op_10f0_0_comp_nf, 4336, 0x00000002 }, /* MOVE */ +{ op_10f8_0_comp_nf, 4344, 0x00000002 }, /* MOVE */ +{ op_10f9_0_comp_nf, 4345, 0x00000002 }, /* MOVE */ +{ op_10fa_0_comp_nf, 4346, 0x00000002 }, /* MOVE */ +{ op_10fb_0_comp_nf, 4347, 0x00000002 }, /* MOVE */ +{ op_10fc_0_comp_nf, 4348, 0x00000002 }, /* MOVE */ +{ op_1100_0_comp_nf, 4352, 0x00000000 }, /* MOVE */ +{ op_1110_0_comp_nf, 4368, 0x00000000 }, /* MOVE */ +{ op_1118_0_comp_nf, 4376, 0x00000000 }, /* MOVE */ +{ op_1120_0_comp_nf, 4384, 0x00000000 }, /* MOVE */ +{ op_1128_0_comp_nf, 4392, 0x00000002 }, /* MOVE */ +{ op_1130_0_comp_nf, 4400, 0x00000002 }, /* MOVE */ +{ op_1138_0_comp_nf, 4408, 0x00000002 }, /* MOVE */ +{ op_1139_0_comp_nf, 4409, 0x00000002 }, /* MOVE */ +{ op_113a_0_comp_nf, 4410, 0x00000002 }, /* MOVE */ +{ op_113b_0_comp_nf, 4411, 0x00000002 }, /* MOVE */ +{ op_113c_0_comp_nf, 4412, 0x00000002 }, /* MOVE */ +{ op_1140_0_comp_nf, 4416, 0x00000002 }, /* MOVE */ +{ op_1150_0_comp_nf, 4432, 0x00000002 }, /* MOVE */ +{ op_1158_0_comp_nf, 4440, 0x00000002 }, /* MOVE */ +{ op_1160_0_comp_nf, 4448, 0x00000002 }, /* MOVE */ +{ op_1168_0_comp_nf, 4456, 0x00000002 }, /* MOVE */ +{ op_1170_0_comp_nf, 4464, 0x00000002 }, /* MOVE */ +{ op_1178_0_comp_nf, 4472, 0x00000002 }, /* MOVE */ +{ op_1179_0_comp_nf, 4473, 0x00000002 }, /* MOVE */ +{ op_117a_0_comp_nf, 4474, 0x00000002 }, /* MOVE */ +{ op_117b_0_comp_nf, 4475, 0x00000002 }, /* MOVE */ +{ op_117c_0_comp_nf, 4476, 0x00000002 }, /* MOVE */ +{ op_1180_0_comp_nf, 4480, 0x00000002 }, /* MOVE */ +{ op_1190_0_comp_nf, 4496, 0x00000002 }, /* MOVE */ +{ op_1198_0_comp_nf, 4504, 0x00000002 }, /* MOVE */ +{ op_11a0_0_comp_nf, 4512, 0x00000002 }, /* MOVE */ +{ op_11a8_0_comp_nf, 4520, 0x00000002 }, /* MOVE */ +{ op_11b0_0_comp_nf, 4528, 0x00000002 }, /* MOVE */ +{ op_11b8_0_comp_nf, 4536, 0x00000002 }, /* MOVE */ +{ op_11b9_0_comp_nf, 4537, 0x00000002 }, /* MOVE */ +{ op_11ba_0_comp_nf, 4538, 0x00000002 }, /* MOVE */ +{ op_11bb_0_comp_nf, 4539, 0x00000002 }, /* MOVE */ +{ op_11bc_0_comp_nf, 4540, 0x00000002 }, /* MOVE */ +{ op_11c0_0_comp_nf, 4544, 0x00000002 }, /* MOVE */ +{ op_11d0_0_comp_nf, 4560, 0x00000002 }, /* MOVE */ +{ op_11d8_0_comp_nf, 4568, 0x00000002 }, /* MOVE */ +{ op_11e0_0_comp_nf, 4576, 0x00000002 }, /* MOVE */ +{ op_11e8_0_comp_nf, 4584, 0x00000002 }, /* MOVE */ +{ op_11f0_0_comp_nf, 4592, 0x00000002 }, /* MOVE */ +{ op_11f8_0_comp_nf, 4600, 0x00000002 }, /* MOVE */ +{ op_11f9_0_comp_nf, 4601, 0x00000002 }, /* MOVE */ +{ op_11fa_0_comp_nf, 4602, 0x00000002 }, /* MOVE */ +{ op_11fb_0_comp_nf, 4603, 0x00000002 }, /* MOVE */ +{ op_11fc_0_comp_nf, 4604, 0x00000002 }, /* MOVE */ +{ op_13c0_0_comp_nf, 5056, 0x00000002 }, /* MOVE */ +{ op_13d0_0_comp_nf, 5072, 0x00000002 }, /* MOVE */ +{ op_13d8_0_comp_nf, 5080, 0x00000002 }, /* MOVE */ +{ op_13e0_0_comp_nf, 5088, 0x00000002 }, /* MOVE */ +{ op_13e8_0_comp_nf, 5096, 0x00000002 }, /* MOVE */ +{ op_13f0_0_comp_nf, 5104, 0x00000002 }, /* MOVE */ +{ op_13f8_0_comp_nf, 5112, 0x00000002 }, /* MOVE */ +{ op_13f9_0_comp_nf, 5113, 0x00000002 }, /* MOVE */ +{ op_13fa_0_comp_nf, 5114, 0x00000002 }, /* MOVE */ +{ op_13fb_0_comp_nf, 5115, 0x00000002 }, /* MOVE */ +{ op_13fc_0_comp_nf, 5116, 0x00000002 }, /* MOVE */ +{ op_2000_0_comp_nf, 8192, 0x00000000 }, /* MOVE */ +{ op_2008_0_comp_nf, 8200, 0x00000000 }, /* MOVE */ +{ op_2010_0_comp_nf, 8208, 0x00000000 }, /* MOVE */ +{ op_2018_0_comp_nf, 8216, 0x00000000 }, /* MOVE */ +{ op_2020_0_comp_nf, 8224, 0x00000000 }, /* MOVE */ +{ op_2028_0_comp_nf, 8232, 0x00000002 }, /* MOVE */ +{ op_2030_0_comp_nf, 8240, 0x00000002 }, /* MOVE */ +{ op_2038_0_comp_nf, 8248, 0x00000002 }, /* MOVE */ +{ op_2039_0_comp_nf, 8249, 0x00000002 }, /* MOVE */ +{ op_203a_0_comp_nf, 8250, 0x00000002 }, /* MOVE */ +{ op_203b_0_comp_nf, 8251, 0x00000002 }, /* MOVE */ +{ op_203c_0_comp_nf, 8252, 0x00000002 }, /* MOVE */ +{ op_2040_0_comp_nf, 8256, 0x00000000 }, /* MOVEA */ +{ op_2048_0_comp_nf, 8264, 0x00000000 }, /* MOVEA */ +{ op_2050_0_comp_nf, 8272, 0x00000000 }, /* MOVEA */ +{ op_2058_0_comp_nf, 8280, 0x00000000 }, /* MOVEA */ +{ op_2060_0_comp_nf, 8288, 0x00000000 }, /* MOVEA */ +{ op_2068_0_comp_nf, 8296, 0x00000002 }, /* MOVEA */ +{ op_2070_0_comp_nf, 8304, 0x00000002 }, /* MOVEA */ +{ op_2078_0_comp_nf, 8312, 0x00000002 }, /* MOVEA */ +{ op_2079_0_comp_nf, 8313, 0x00000002 }, /* MOVEA */ +{ op_207a_0_comp_nf, 8314, 0x00000002 }, /* MOVEA */ +{ op_207b_0_comp_nf, 8315, 0x00000002 }, /* MOVEA */ +{ op_207c_0_comp_nf, 8316, 0x00000002 }, /* MOVEA */ +{ op_2080_0_comp_nf, 8320, 0x00000000 }, /* MOVE */ +{ op_2088_0_comp_nf, 8328, 0x00000000 }, /* MOVE */ +{ op_2090_0_comp_nf, 8336, 0x00000000 }, /* MOVE */ +{ op_2098_0_comp_nf, 8344, 0x00000000 }, /* MOVE */ +{ op_20a0_0_comp_nf, 8352, 0x00000000 }, /* MOVE */ +{ op_20a8_0_comp_nf, 8360, 0x00000002 }, /* MOVE */ +{ op_20b0_0_comp_nf, 8368, 0x00000002 }, /* MOVE */ +{ op_20b8_0_comp_nf, 8376, 0x00000002 }, /* MOVE */ +{ op_20b9_0_comp_nf, 8377, 0x00000002 }, /* MOVE */ +{ op_20ba_0_comp_nf, 8378, 0x00000002 }, /* MOVE */ +{ op_20bb_0_comp_nf, 8379, 0x00000002 }, /* MOVE */ +{ op_20bc_0_comp_nf, 8380, 0x00000002 }, /* MOVE */ +{ op_20c0_0_comp_nf, 8384, 0x00000000 }, /* MOVE */ +{ op_20c8_0_comp_nf, 8392, 0x00000000 }, /* MOVE */ +{ op_20d0_0_comp_nf, 8400, 0x00000000 }, /* MOVE */ +{ op_20d8_0_comp_nf, 8408, 0x00000000 }, /* MOVE */ +{ op_20e0_0_comp_nf, 8416, 0x00000000 }, /* MOVE */ +{ op_20e8_0_comp_nf, 8424, 0x00000002 }, /* MOVE */ +{ op_20f0_0_comp_nf, 8432, 0x00000002 }, /* MOVE */ +{ op_20f8_0_comp_nf, 8440, 0x00000002 }, /* MOVE */ +{ op_20f9_0_comp_nf, 8441, 0x00000002 }, /* MOVE */ +{ op_20fa_0_comp_nf, 8442, 0x00000002 }, /* MOVE */ +{ op_20fb_0_comp_nf, 8443, 0x00000002 }, /* MOVE */ +{ op_20fc_0_comp_nf, 8444, 0x00000002 }, /* MOVE */ +{ op_2100_0_comp_nf, 8448, 0x00000000 }, /* MOVE */ +{ op_2108_0_comp_nf, 8456, 0x00000000 }, /* MOVE */ +{ op_2110_0_comp_nf, 8464, 0x00000000 }, /* MOVE */ +{ op_2118_0_comp_nf, 8472, 0x00000000 }, /* MOVE */ +{ op_2120_0_comp_nf, 8480, 0x00000000 }, /* MOVE */ +{ op_2128_0_comp_nf, 8488, 0x00000002 }, /* MOVE */ +{ op_2130_0_comp_nf, 8496, 0x00000002 }, /* MOVE */ +{ op_2138_0_comp_nf, 8504, 0x00000002 }, /* MOVE */ +{ op_2139_0_comp_nf, 8505, 0x00000002 }, /* MOVE */ +{ op_213a_0_comp_nf, 8506, 0x00000002 }, /* MOVE */ +{ op_213b_0_comp_nf, 8507, 0x00000002 }, /* MOVE */ +{ op_213c_0_comp_nf, 8508, 0x00000002 }, /* MOVE */ +{ op_2140_0_comp_nf, 8512, 0x00000002 }, /* MOVE */ +{ op_2148_0_comp_nf, 8520, 0x00000002 }, /* MOVE */ +{ op_2150_0_comp_nf, 8528, 0x00000002 }, /* MOVE */ +{ op_2158_0_comp_nf, 8536, 0x00000002 }, /* MOVE */ +{ op_2160_0_comp_nf, 8544, 0x00000002 }, /* MOVE */ +{ op_2168_0_comp_nf, 8552, 0x00000002 }, /* MOVE */ +{ op_2170_0_comp_nf, 8560, 0x00000002 }, /* MOVE */ +{ op_2178_0_comp_nf, 8568, 0x00000002 }, /* MOVE */ +{ op_2179_0_comp_nf, 8569, 0x00000002 }, /* MOVE */ +{ op_217a_0_comp_nf, 8570, 0x00000002 }, /* MOVE */ +{ op_217b_0_comp_nf, 8571, 0x00000002 }, /* MOVE */ +{ op_217c_0_comp_nf, 8572, 0x00000002 }, /* MOVE */ +{ op_2180_0_comp_nf, 8576, 0x00000002 }, /* MOVE */ +{ op_2188_0_comp_nf, 8584, 0x00000002 }, /* MOVE */ +{ op_2190_0_comp_nf, 8592, 0x00000002 }, /* MOVE */ +{ op_2198_0_comp_nf, 8600, 0x00000002 }, /* MOVE */ +{ op_21a0_0_comp_nf, 8608, 0x00000002 }, /* MOVE */ +{ op_21a8_0_comp_nf, 8616, 0x00000002 }, /* MOVE */ +{ op_21b0_0_comp_nf, 8624, 0x00000002 }, /* MOVE */ +{ op_21b8_0_comp_nf, 8632, 0x00000002 }, /* MOVE */ +{ op_21b9_0_comp_nf, 8633, 0x00000002 }, /* MOVE */ +{ op_21ba_0_comp_nf, 8634, 0x00000002 }, /* MOVE */ +{ op_21bb_0_comp_nf, 8635, 0x00000002 }, /* MOVE */ +{ op_21bc_0_comp_nf, 8636, 0x00000002 }, /* MOVE */ +{ op_21c0_0_comp_nf, 8640, 0x00000002 }, /* MOVE */ +{ op_21c8_0_comp_nf, 8648, 0x00000002 }, /* MOVE */ +{ op_21d0_0_comp_nf, 8656, 0x00000002 }, /* MOVE */ +{ op_21d8_0_comp_nf, 8664, 0x00000002 }, /* MOVE */ +{ op_21e0_0_comp_nf, 8672, 0x00000002 }, /* MOVE */ +{ op_21e8_0_comp_nf, 8680, 0x00000002 }, /* MOVE */ +{ op_21f0_0_comp_nf, 8688, 0x00000002 }, /* MOVE */ +{ op_21f8_0_comp_nf, 8696, 0x00000002 }, /* MOVE */ +{ op_21f9_0_comp_nf, 8697, 0x00000002 }, /* MOVE */ +{ op_21fa_0_comp_nf, 8698, 0x00000002 }, /* MOVE */ +{ op_21fb_0_comp_nf, 8699, 0x00000002 }, /* MOVE */ +{ op_21fc_0_comp_nf, 8700, 0x00000002 }, /* MOVE */ +{ op_23c0_0_comp_nf, 9152, 0x00000002 }, /* MOVE */ +{ op_23c8_0_comp_nf, 9160, 0x00000002 }, /* MOVE */ +{ op_23d0_0_comp_nf, 9168, 0x00000002 }, /* MOVE */ +{ op_23d8_0_comp_nf, 9176, 0x00000002 }, /* MOVE */ +{ op_23e0_0_comp_nf, 9184, 0x00000002 }, /* MOVE */ +{ op_23e8_0_comp_nf, 9192, 0x00000002 }, /* MOVE */ +{ op_23f0_0_comp_nf, 9200, 0x00000002 }, /* MOVE */ +{ op_23f8_0_comp_nf, 9208, 0x00000002 }, /* MOVE */ +{ op_23f9_0_comp_nf, 9209, 0x00000002 }, /* MOVE */ +{ op_23fa_0_comp_nf, 9210, 0x00000002 }, /* MOVE */ +{ op_23fb_0_comp_nf, 9211, 0x00000002 }, /* MOVE */ +{ op_23fc_0_comp_nf, 9212, 0x00000002 }, /* MOVE */ +{ op_3000_0_comp_nf, 12288, 0x00000000 }, /* MOVE */ +{ op_3008_0_comp_nf, 12296, 0x00000000 }, /* MOVE */ +{ op_3010_0_comp_nf, 12304, 0x00000000 }, /* MOVE */ +{ op_3018_0_comp_nf, 12312, 0x00000000 }, /* MOVE */ +{ op_3020_0_comp_nf, 12320, 0x00000000 }, /* MOVE */ +{ op_3028_0_comp_nf, 12328, 0x00000002 }, /* MOVE */ +{ op_3030_0_comp_nf, 12336, 0x00000002 }, /* MOVE */ +{ op_3038_0_comp_nf, 12344, 0x00000002 }, /* MOVE */ +{ op_3039_0_comp_nf, 12345, 0x00000002 }, /* MOVE */ +{ op_303a_0_comp_nf, 12346, 0x00000002 }, /* MOVE */ +{ op_303b_0_comp_nf, 12347, 0x00000002 }, /* MOVE */ +{ op_303c_0_comp_nf, 12348, 0x00000002 }, /* MOVE */ +{ op_3040_0_comp_nf, 12352, 0x00000000 }, /* MOVEA */ +{ op_3048_0_comp_nf, 12360, 0x00000000 }, /* MOVEA */ +{ op_3050_0_comp_nf, 12368, 0x00000000 }, /* MOVEA */ +{ op_3058_0_comp_nf, 12376, 0x00000000 }, /* MOVEA */ +{ op_3060_0_comp_nf, 12384, 0x00000000 }, /* MOVEA */ +{ op_3068_0_comp_nf, 12392, 0x00000002 }, /* MOVEA */ +{ op_3070_0_comp_nf, 12400, 0x00000002 }, /* MOVEA */ +{ op_3078_0_comp_nf, 12408, 0x00000002 }, /* MOVEA */ +{ op_3079_0_comp_nf, 12409, 0x00000002 }, /* MOVEA */ +{ op_307a_0_comp_nf, 12410, 0x00000002 }, /* MOVEA */ +{ op_307b_0_comp_nf, 12411, 0x00000002 }, /* MOVEA */ +{ op_307c_0_comp_nf, 12412, 0x00000002 }, /* MOVEA */ +{ op_3080_0_comp_nf, 12416, 0x00000000 }, /* MOVE */ +{ op_3088_0_comp_nf, 12424, 0x00000000 }, /* MOVE */ +{ op_3090_0_comp_nf, 12432, 0x00000000 }, /* MOVE */ +{ op_3098_0_comp_nf, 12440, 0x00000000 }, /* MOVE */ +{ op_30a0_0_comp_nf, 12448, 0x00000000 }, /* MOVE */ +{ op_30a8_0_comp_nf, 12456, 0x00000002 }, /* MOVE */ +{ op_30b0_0_comp_nf, 12464, 0x00000002 }, /* MOVE */ +{ op_30b8_0_comp_nf, 12472, 0x00000002 }, /* MOVE */ +{ op_30b9_0_comp_nf, 12473, 0x00000002 }, /* MOVE */ +{ op_30ba_0_comp_nf, 12474, 0x00000002 }, /* MOVE */ +{ op_30bb_0_comp_nf, 12475, 0x00000002 }, /* MOVE */ +{ op_30bc_0_comp_nf, 12476, 0x00000002 }, /* MOVE */ +{ op_30c0_0_comp_nf, 12480, 0x00000000 }, /* MOVE */ +{ op_30c8_0_comp_nf, 12488, 0x00000000 }, /* MOVE */ +{ op_30d0_0_comp_nf, 12496, 0x00000000 }, /* MOVE */ +{ op_30d8_0_comp_nf, 12504, 0x00000000 }, /* MOVE */ +{ op_30e0_0_comp_nf, 12512, 0x00000000 }, /* MOVE */ +{ op_30e8_0_comp_nf, 12520, 0x00000002 }, /* MOVE */ +{ op_30f0_0_comp_nf, 12528, 0x00000002 }, /* MOVE */ +{ op_30f8_0_comp_nf, 12536, 0x00000002 }, /* MOVE */ +{ op_30f9_0_comp_nf, 12537, 0x00000002 }, /* MOVE */ +{ op_30fa_0_comp_nf, 12538, 0x00000002 }, /* MOVE */ +{ op_30fb_0_comp_nf, 12539, 0x00000002 }, /* MOVE */ +{ op_30fc_0_comp_nf, 12540, 0x00000002 }, /* MOVE */ +{ op_3100_0_comp_nf, 12544, 0x00000000 }, /* MOVE */ +{ op_3108_0_comp_nf, 12552, 0x00000000 }, /* MOVE */ +{ op_3110_0_comp_nf, 12560, 0x00000000 }, /* MOVE */ +{ op_3118_0_comp_nf, 12568, 0x00000000 }, /* MOVE */ +{ op_3120_0_comp_nf, 12576, 0x00000000 }, /* MOVE */ +{ op_3128_0_comp_nf, 12584, 0x00000002 }, /* MOVE */ +{ op_3130_0_comp_nf, 12592, 0x00000002 }, /* MOVE */ +{ op_3138_0_comp_nf, 12600, 0x00000002 }, /* MOVE */ +{ op_3139_0_comp_nf, 12601, 0x00000002 }, /* MOVE */ +{ op_313a_0_comp_nf, 12602, 0x00000002 }, /* MOVE */ +{ op_313b_0_comp_nf, 12603, 0x00000002 }, /* MOVE */ +{ op_313c_0_comp_nf, 12604, 0x00000002 }, /* MOVE */ +{ op_3140_0_comp_nf, 12608, 0x00000002 }, /* MOVE */ +{ op_3148_0_comp_nf, 12616, 0x00000002 }, /* MOVE */ +{ op_3150_0_comp_nf, 12624, 0x00000002 }, /* MOVE */ +{ op_3158_0_comp_nf, 12632, 0x00000002 }, /* MOVE */ +{ op_3160_0_comp_nf, 12640, 0x00000002 }, /* MOVE */ +{ op_3168_0_comp_nf, 12648, 0x00000002 }, /* MOVE */ +{ op_3170_0_comp_nf, 12656, 0x00000002 }, /* MOVE */ +{ op_3178_0_comp_nf, 12664, 0x00000002 }, /* MOVE */ +{ op_3179_0_comp_nf, 12665, 0x00000002 }, /* MOVE */ +{ op_317a_0_comp_nf, 12666, 0x00000002 }, /* MOVE */ +{ op_317b_0_comp_nf, 12667, 0x00000002 }, /* MOVE */ +{ op_317c_0_comp_nf, 12668, 0x00000002 }, /* MOVE */ +{ op_3180_0_comp_nf, 12672, 0x00000002 }, /* MOVE */ +{ op_3188_0_comp_nf, 12680, 0x00000002 }, /* MOVE */ +{ op_3190_0_comp_nf, 12688, 0x00000002 }, /* MOVE */ +{ op_3198_0_comp_nf, 12696, 0x00000002 }, /* MOVE */ +{ op_31a0_0_comp_nf, 12704, 0x00000002 }, /* MOVE */ +{ op_31a8_0_comp_nf, 12712, 0x00000002 }, /* MOVE */ +{ op_31b0_0_comp_nf, 12720, 0x00000002 }, /* MOVE */ +{ op_31b8_0_comp_nf, 12728, 0x00000002 }, /* MOVE */ +{ op_31b9_0_comp_nf, 12729, 0x00000002 }, /* MOVE */ +{ op_31ba_0_comp_nf, 12730, 0x00000002 }, /* MOVE */ +{ op_31bb_0_comp_nf, 12731, 0x00000002 }, /* MOVE */ +{ op_31bc_0_comp_nf, 12732, 0x00000002 }, /* MOVE */ +{ op_31c0_0_comp_nf, 12736, 0x00000002 }, /* MOVE */ +{ op_31c8_0_comp_nf, 12744, 0x00000002 }, /* MOVE */ +{ op_31d0_0_comp_nf, 12752, 0x00000002 }, /* MOVE */ +{ op_31d8_0_comp_nf, 12760, 0x00000002 }, /* MOVE */ +{ op_31e0_0_comp_nf, 12768, 0x00000002 }, /* MOVE */ +{ op_31e8_0_comp_nf, 12776, 0x00000002 }, /* MOVE */ +{ op_31f0_0_comp_nf, 12784, 0x00000002 }, /* MOVE */ +{ op_31f8_0_comp_nf, 12792, 0x00000002 }, /* MOVE */ +{ op_31f9_0_comp_nf, 12793, 0x00000002 }, /* MOVE */ +{ op_31fa_0_comp_nf, 12794, 0x00000002 }, /* MOVE */ +{ op_31fb_0_comp_nf, 12795, 0x00000002 }, /* MOVE */ +{ op_31fc_0_comp_nf, 12796, 0x00000002 }, /* MOVE */ +{ op_33c0_0_comp_nf, 13248, 0x00000002 }, /* MOVE */ +{ op_33c8_0_comp_nf, 13256, 0x00000002 }, /* MOVE */ +{ op_33d0_0_comp_nf, 13264, 0x00000002 }, /* MOVE */ +{ op_33d8_0_comp_nf, 13272, 0x00000002 }, /* MOVE */ +{ op_33e0_0_comp_nf, 13280, 0x00000002 }, /* MOVE */ +{ op_33e8_0_comp_nf, 13288, 0x00000002 }, /* MOVE */ +{ op_33f0_0_comp_nf, 13296, 0x00000002 }, /* MOVE */ +{ op_33f8_0_comp_nf, 13304, 0x00000002 }, /* MOVE */ +{ op_33f9_0_comp_nf, 13305, 0x00000002 }, /* MOVE */ +{ op_33fa_0_comp_nf, 13306, 0x00000002 }, /* MOVE */ +{ op_33fb_0_comp_nf, 13307, 0x00000002 }, /* MOVE */ +{ op_33fc_0_comp_nf, 13308, 0x00000002 }, /* MOVE */ +{ op_4000_0_comp_nf, 16384, 0x00000000 }, /* NEGX */ +{ op_4010_0_comp_nf, 16400, 0x00000000 }, /* NEGX */ +{ op_4018_0_comp_nf, 16408, 0x00000000 }, /* NEGX */ +{ op_4020_0_comp_nf, 16416, 0x00000000 }, /* NEGX */ +{ op_4028_0_comp_nf, 16424, 0x00000002 }, /* NEGX */ +{ op_4030_0_comp_nf, 16432, 0x00000002 }, /* NEGX */ +{ op_4038_0_comp_nf, 16440, 0x00000002 }, /* NEGX */ +{ op_4039_0_comp_nf, 16441, 0x00000002 }, /* NEGX */ +{ op_4040_0_comp_nf, 16448, 0x00000000 }, /* NEGX */ +{ op_4050_0_comp_nf, 16464, 0x00000000 }, /* NEGX */ +{ op_4058_0_comp_nf, 16472, 0x00000000 }, /* NEGX */ +{ op_4060_0_comp_nf, 16480, 0x00000000 }, /* NEGX */ +{ op_4068_0_comp_nf, 16488, 0x00000002 }, /* NEGX */ +{ op_4070_0_comp_nf, 16496, 0x00000002 }, /* NEGX */ +{ op_4078_0_comp_nf, 16504, 0x00000002 }, /* NEGX */ +{ op_4079_0_comp_nf, 16505, 0x00000002 }, /* NEGX */ +{ op_4080_0_comp_nf, 16512, 0x00000000 }, /* NEGX */ +{ op_4090_0_comp_nf, 16528, 0x00000000 }, /* NEGX */ +{ op_4098_0_comp_nf, 16536, 0x00000000 }, /* NEGX */ +{ op_40a0_0_comp_nf, 16544, 0x00000000 }, /* NEGX */ +{ op_40a8_0_comp_nf, 16552, 0x00000002 }, /* NEGX */ +{ op_40b0_0_comp_nf, 16560, 0x00000002 }, /* NEGX */ +{ op_40b8_0_comp_nf, 16568, 0x00000002 }, /* NEGX */ +{ op_40b9_0_comp_nf, 16569, 0x00000002 }, /* NEGX */ +{ NULL, 16576, 0x00000001 }, /* MVSR2 */ +{ NULL, 16592, 0x00000001 }, /* MVSR2 */ +{ NULL, 16600, 0x00000001 }, /* MVSR2 */ +{ NULL, 16608, 0x00000001 }, /* MVSR2 */ +{ NULL, 16616, 0x00000001 }, /* MVSR2 */ +{ NULL, 16624, 0x00000001 }, /* MVSR2 */ +{ NULL, 16632, 0x00000001 }, /* MVSR2 */ +{ NULL, 16633, 0x00000001 }, /* MVSR2 */ +{ NULL, 16640, 0x00000001 }, /* CHK */ +{ NULL, 16656, 0x00000001 }, /* CHK */ +{ NULL, 16664, 0x00000001 }, /* CHK */ +{ NULL, 16672, 0x00000001 }, /* CHK */ +{ NULL, 16680, 0x00000001 }, /* CHK */ +{ NULL, 16688, 0x00000001 }, /* CHK */ +{ NULL, 16696, 0x00000001 }, /* CHK */ +{ NULL, 16697, 0x00000001 }, /* CHK */ +{ NULL, 16698, 0x00000001 }, /* CHK */ +{ NULL, 16699, 0x00000001 }, /* CHK */ +{ NULL, 16700, 0x00000001 }, /* CHK */ +{ NULL, 16768, 0x00000001 }, /* CHK */ +{ NULL, 16784, 0x00000001 }, /* CHK */ +{ NULL, 16792, 0x00000001 }, /* CHK */ +{ NULL, 16800, 0x00000001 }, /* CHK */ +{ NULL, 16808, 0x00000001 }, /* CHK */ +{ NULL, 16816, 0x00000001 }, /* CHK */ +{ NULL, 16824, 0x00000001 }, /* CHK */ +{ NULL, 16825, 0x00000001 }, /* CHK */ +{ NULL, 16826, 0x00000001 }, /* CHK */ +{ NULL, 16827, 0x00000001 }, /* CHK */ +{ NULL, 16828, 0x00000001 }, /* CHK */ +{ op_41d0_0_comp_nf, 16848, 0x00000000 }, /* LEA */ +{ op_41e8_0_comp_nf, 16872, 0x00000002 }, /* LEA */ +{ op_41f0_0_comp_nf, 16880, 0x00000002 }, /* LEA */ +{ op_41f8_0_comp_nf, 16888, 0x00000002 }, /* LEA */ +{ op_41f9_0_comp_nf, 16889, 0x00000002 }, /* LEA */ +{ op_41fa_0_comp_nf, 16890, 0x00000002 }, /* LEA */ +{ op_41fb_0_comp_nf, 16891, 0x00000002 }, /* LEA */ +{ op_4200_0_comp_nf, 16896, 0x00000000 }, /* CLR */ +{ op_4210_0_comp_nf, 16912, 0x00000000 }, /* CLR */ +{ op_4218_0_comp_nf, 16920, 0x00000000 }, /* CLR */ +{ op_4220_0_comp_nf, 16928, 0x00000000 }, /* CLR */ +{ op_4228_0_comp_nf, 16936, 0x00000002 }, /* CLR */ +{ op_4230_0_comp_nf, 16944, 0x00000002 }, /* CLR */ +{ op_4238_0_comp_nf, 16952, 0x00000002 }, /* CLR */ +{ op_4239_0_comp_nf, 16953, 0x00000002 }, /* CLR */ +{ op_4240_0_comp_nf, 16960, 0x00000000 }, /* CLR */ +{ op_4250_0_comp_nf, 16976, 0x00000000 }, /* CLR */ +{ op_4258_0_comp_nf, 16984, 0x00000000 }, /* CLR */ +{ op_4260_0_comp_nf, 16992, 0x00000000 }, /* CLR */ +{ op_4268_0_comp_nf, 17000, 0x00000002 }, /* CLR */ +{ op_4270_0_comp_nf, 17008, 0x00000002 }, /* CLR */ +{ op_4278_0_comp_nf, 17016, 0x00000002 }, /* CLR */ +{ op_4279_0_comp_nf, 17017, 0x00000002 }, /* CLR */ +{ op_4280_0_comp_nf, 17024, 0x00000000 }, /* CLR */ +{ op_4290_0_comp_nf, 17040, 0x00000000 }, /* CLR */ +{ op_4298_0_comp_nf, 17048, 0x00000000 }, /* CLR */ +{ op_42a0_0_comp_nf, 17056, 0x00000000 }, /* CLR */ +{ op_42a8_0_comp_nf, 17064, 0x00000002 }, /* CLR */ +{ op_42b0_0_comp_nf, 17072, 0x00000002 }, /* CLR */ +{ op_42b8_0_comp_nf, 17080, 0x00000002 }, /* CLR */ +{ op_42b9_0_comp_nf, 17081, 0x00000002 }, /* CLR */ +{ NULL, 17088, 0x00000001 }, /* MVSR2 */ +{ NULL, 17104, 0x00000001 }, /* MVSR2 */ +{ NULL, 17112, 0x00000001 }, /* MVSR2 */ +{ NULL, 17120, 0x00000001 }, /* MVSR2 */ +{ NULL, 17128, 0x00000001 }, /* MVSR2 */ +{ NULL, 17136, 0x00000001 }, /* MVSR2 */ +{ NULL, 17144, 0x00000001 }, /* MVSR2 */ +{ NULL, 17145, 0x00000001 }, /* MVSR2 */ +{ op_4400_0_comp_nf, 17408, 0x00000000 }, /* NEG */ +{ op_4410_0_comp_nf, 17424, 0x00000000 }, /* NEG */ +{ op_4418_0_comp_nf, 17432, 0x00000000 }, /* NEG */ +{ op_4420_0_comp_nf, 17440, 0x00000000 }, /* NEG */ +{ op_4428_0_comp_nf, 17448, 0x00000002 }, /* NEG */ +{ op_4430_0_comp_nf, 17456, 0x00000002 }, /* NEG */ +{ op_4438_0_comp_nf, 17464, 0x00000002 }, /* NEG */ +{ op_4439_0_comp_nf, 17465, 0x00000002 }, /* NEG */ +{ op_4440_0_comp_nf, 17472, 0x00000000 }, /* NEG */ +{ op_4450_0_comp_nf, 17488, 0x00000000 }, /* NEG */ +{ op_4458_0_comp_nf, 17496, 0x00000000 }, /* NEG */ +{ op_4460_0_comp_nf, 17504, 0x00000000 }, /* NEG */ +{ op_4468_0_comp_nf, 17512, 0x00000002 }, /* NEG */ +{ op_4470_0_comp_nf, 17520, 0x00000002 }, /* NEG */ +{ op_4478_0_comp_nf, 17528, 0x00000002 }, /* NEG */ +{ op_4479_0_comp_nf, 17529, 0x00000002 }, /* NEG */ +{ op_4480_0_comp_nf, 17536, 0x00000000 }, /* NEG */ +{ op_4490_0_comp_nf, 17552, 0x00000000 }, /* NEG */ +{ op_4498_0_comp_nf, 17560, 0x00000000 }, /* NEG */ +{ op_44a0_0_comp_nf, 17568, 0x00000000 }, /* NEG */ +{ op_44a8_0_comp_nf, 17576, 0x00000002 }, /* NEG */ +{ op_44b0_0_comp_nf, 17584, 0x00000002 }, /* NEG */ +{ op_44b8_0_comp_nf, 17592, 0x00000002 }, /* NEG */ +{ op_44b9_0_comp_nf, 17593, 0x00000002 }, /* NEG */ +{ NULL, 17600, 0x00000001 }, /* MV2SR */ +{ NULL, 17616, 0x00000001 }, /* MV2SR */ +{ NULL, 17624, 0x00000001 }, /* MV2SR */ +{ NULL, 17632, 0x00000001 }, /* MV2SR */ +{ NULL, 17640, 0x00000001 }, /* MV2SR */ +{ NULL, 17648, 0x00000001 }, /* MV2SR */ +{ NULL, 17656, 0x00000001 }, /* MV2SR */ +{ NULL, 17657, 0x00000001 }, /* MV2SR */ +{ NULL, 17658, 0x00000001 }, /* MV2SR */ +{ NULL, 17659, 0x00000001 }, /* MV2SR */ +{ NULL, 17660, 0x00000001 }, /* MV2SR */ +{ op_4600_0_comp_nf, 17920, 0x00000000 }, /* NOT */ +{ op_4610_0_comp_nf, 17936, 0x00000000 }, /* NOT */ +{ op_4618_0_comp_nf, 17944, 0x00000000 }, /* NOT */ +{ op_4620_0_comp_nf, 17952, 0x00000000 }, /* NOT */ +{ op_4628_0_comp_nf, 17960, 0x00000002 }, /* NOT */ +{ op_4630_0_comp_nf, 17968, 0x00000002 }, /* NOT */ +{ op_4638_0_comp_nf, 17976, 0x00000002 }, /* NOT */ +{ op_4639_0_comp_nf, 17977, 0x00000002 }, /* NOT */ +{ op_4640_0_comp_nf, 17984, 0x00000000 }, /* NOT */ +{ op_4650_0_comp_nf, 18000, 0x00000000 }, /* NOT */ +{ op_4658_0_comp_nf, 18008, 0x00000000 }, /* NOT */ +{ op_4660_0_comp_nf, 18016, 0x00000000 }, /* NOT */ +{ op_4668_0_comp_nf, 18024, 0x00000002 }, /* NOT */ +{ op_4670_0_comp_nf, 18032, 0x00000002 }, /* NOT */ +{ op_4678_0_comp_nf, 18040, 0x00000002 }, /* NOT */ +{ op_4679_0_comp_nf, 18041, 0x00000002 }, /* NOT */ +{ op_4680_0_comp_nf, 18048, 0x00000000 }, /* NOT */ +{ op_4690_0_comp_nf, 18064, 0x00000000 }, /* NOT */ +{ op_4698_0_comp_nf, 18072, 0x00000000 }, /* NOT */ +{ op_46a0_0_comp_nf, 18080, 0x00000000 }, /* NOT */ +{ op_46a8_0_comp_nf, 18088, 0x00000002 }, /* NOT */ +{ op_46b0_0_comp_nf, 18096, 0x00000002 }, /* NOT */ +{ op_46b8_0_comp_nf, 18104, 0x00000002 }, /* NOT */ +{ op_46b9_0_comp_nf, 18105, 0x00000002 }, /* NOT */ +{ NULL, 18112, 0x00000001 }, /* MV2SR */ +{ NULL, 18128, 0x00000001 }, /* MV2SR */ +{ NULL, 18136, 0x00000001 }, /* MV2SR */ +{ NULL, 18144, 0x00000001 }, /* MV2SR */ +{ NULL, 18152, 0x00000001 }, /* MV2SR */ +{ NULL, 18160, 0x00000001 }, /* MV2SR */ +{ NULL, 18168, 0x00000001 }, /* MV2SR */ +{ NULL, 18169, 0x00000001 }, /* MV2SR */ +{ NULL, 18170, 0x00000001 }, /* MV2SR */ +{ NULL, 18171, 0x00000001 }, /* MV2SR */ +{ NULL, 18172, 0x00000001 }, /* MV2SR */ +{ NULL, 18432, 0x00000000 }, /* NBCD */ +{ op_4808_0_comp_nf, 18440, 0x00000002 }, /* LINK */ +{ NULL, 18448, 0x00000000 }, /* NBCD */ +{ NULL, 18456, 0x00000000 }, /* NBCD */ +{ NULL, 18464, 0x00000000 }, /* NBCD */ +{ NULL, 18472, 0x00000000 }, /* NBCD */ +{ NULL, 18480, 0x00000000 }, /* NBCD */ +{ NULL, 18488, 0x00000000 }, /* NBCD */ +{ NULL, 18489, 0x00000000 }, /* NBCD */ +{ op_4840_0_comp_nf, 18496, 0x00000000 }, /* SWAP */ +{ NULL, 18504, 0x00000001 }, /* BKPT */ +{ op_4850_0_comp_nf, 18512, 0x00000000 }, /* PEA */ +{ op_4868_0_comp_nf, 18536, 0x00000002 }, /* PEA */ +{ op_4870_0_comp_nf, 18544, 0x00000002 }, /* PEA */ +{ op_4878_0_comp_nf, 18552, 0x00000002 }, /* PEA */ +{ op_4879_0_comp_nf, 18553, 0x00000002 }, /* PEA */ +{ op_487a_0_comp_nf, 18554, 0x00000002 }, /* PEA */ +{ op_487b_0_comp_nf, 18555, 0x00000002 }, /* PEA */ +{ op_4880_0_comp_nf, 18560, 0x00000000 }, /* EXT */ +{ op_4890_0_comp_nf, 18576, 0x00000002 }, /* MVMLE */ +{ op_48a0_0_comp_nf, 18592, 0x00000002 }, /* MVMLE */ +{ op_48a8_0_comp_nf, 18600, 0x00000002 }, /* MVMLE */ +{ op_48b0_0_comp_nf, 18608, 0x00000002 }, /* MVMLE */ +{ op_48b8_0_comp_nf, 18616, 0x00000002 }, /* MVMLE */ +{ op_48b9_0_comp_nf, 18617, 0x00000002 }, /* MVMLE */ +{ op_48c0_0_comp_nf, 18624, 0x00000000 }, /* EXT */ +{ op_48d0_0_comp_nf, 18640, 0x00000002 }, /* MVMLE */ +{ op_48e0_0_comp_nf, 18656, 0x00000002 }, /* MVMLE */ +{ op_48e8_0_comp_nf, 18664, 0x00000002 }, /* MVMLE */ +{ op_48f0_0_comp_nf, 18672, 0x00000002 }, /* MVMLE */ +{ op_48f8_0_comp_nf, 18680, 0x00000002 }, /* MVMLE */ +{ op_48f9_0_comp_nf, 18681, 0x00000002 }, /* MVMLE */ +{ op_49c0_0_comp_nf, 18880, 0x00000000 }, /* EXT */ +{ op_4a00_0_comp_nf, 18944, 0x00000000 }, /* TST */ +{ op_4a10_0_comp_nf, 18960, 0x00000000 }, /* TST */ +{ op_4a18_0_comp_nf, 18968, 0x00000000 }, /* TST */ +{ op_4a20_0_comp_nf, 18976, 0x00000000 }, /* TST */ +{ op_4a28_0_comp_nf, 18984, 0x00000002 }, /* TST */ +{ op_4a30_0_comp_nf, 18992, 0x00000002 }, /* TST */ +{ op_4a38_0_comp_nf, 19000, 0x00000002 }, /* TST */ +{ op_4a39_0_comp_nf, 19001, 0x00000002 }, /* TST */ +{ op_4a3a_0_comp_nf, 19002, 0x00000002 }, /* TST */ +{ op_4a3b_0_comp_nf, 19003, 0x00000002 }, /* TST */ +{ op_4a3c_0_comp_nf, 19004, 0x00000002 }, /* TST */ +{ op_4a40_0_comp_nf, 19008, 0x00000000 }, /* TST */ +{ op_4a48_0_comp_nf, 19016, 0x00000000 }, /* TST */ +{ op_4a50_0_comp_nf, 19024, 0x00000000 }, /* TST */ +{ op_4a58_0_comp_nf, 19032, 0x00000000 }, /* TST */ +{ op_4a60_0_comp_nf, 19040, 0x00000000 }, /* TST */ +{ op_4a68_0_comp_nf, 19048, 0x00000002 }, /* TST */ +{ op_4a70_0_comp_nf, 19056, 0x00000002 }, /* TST */ +{ op_4a78_0_comp_nf, 19064, 0x00000002 }, /* TST */ +{ op_4a79_0_comp_nf, 19065, 0x00000002 }, /* TST */ +{ op_4a7a_0_comp_nf, 19066, 0x00000002 }, /* TST */ +{ op_4a7b_0_comp_nf, 19067, 0x00000002 }, /* TST */ +{ op_4a7c_0_comp_nf, 19068, 0x00000002 }, /* TST */ +{ op_4a80_0_comp_nf, 19072, 0x00000000 }, /* TST */ +{ op_4a88_0_comp_nf, 19080, 0x00000000 }, /* TST */ +{ op_4a90_0_comp_nf, 19088, 0x00000000 }, /* TST */ +{ op_4a98_0_comp_nf, 19096, 0x00000000 }, /* TST */ +{ op_4aa0_0_comp_nf, 19104, 0x00000000 }, /* TST */ +{ op_4aa8_0_comp_nf, 19112, 0x00000002 }, /* TST */ +{ op_4ab0_0_comp_nf, 19120, 0x00000002 }, /* TST */ +{ op_4ab8_0_comp_nf, 19128, 0x00000002 }, /* TST */ +{ op_4ab9_0_comp_nf, 19129, 0x00000002 }, /* TST */ +{ op_4aba_0_comp_nf, 19130, 0x00000002 }, /* TST */ +{ op_4abb_0_comp_nf, 19131, 0x00000002 }, /* TST */ +{ op_4abc_0_comp_nf, 19132, 0x00000002 }, /* TST */ +{ NULL, 19136, 0x00000000 }, /* TAS */ +{ NULL, 19152, 0x00000000 }, /* TAS */ +{ NULL, 19160, 0x00000000 }, /* TAS */ +{ NULL, 19168, 0x00000000 }, /* TAS */ +{ NULL, 19176, 0x00000000 }, /* TAS */ +{ NULL, 19184, 0x00000000 }, /* TAS */ +{ NULL, 19192, 0x00000000 }, /* TAS */ +{ NULL, 19193, 0x00000000 }, /* TAS */ +{ op_4c00_0_comp_nf, 19456, 0x00000002 }, /* MULL */ +{ op_4c10_0_comp_nf, 19472, 0x00000002 }, /* MULL */ +{ op_4c18_0_comp_nf, 19480, 0x00000002 }, /* MULL */ +{ op_4c20_0_comp_nf, 19488, 0x00000002 }, /* MULL */ +{ op_4c28_0_comp_nf, 19496, 0x00000002 }, /* MULL */ +{ op_4c30_0_comp_nf, 19504, 0x00000002 }, /* MULL */ +{ op_4c38_0_comp_nf, 19512, 0x00000002 }, /* MULL */ +{ op_4c39_0_comp_nf, 19513, 0x00000002 }, /* MULL */ +{ op_4c3a_0_comp_nf, 19514, 0x00000002 }, /* MULL */ +{ op_4c3b_0_comp_nf, 19515, 0x00000002 }, /* MULL */ +{ op_4c3c_0_comp_nf, 19516, 0x00000002 }, /* MULL */ +{ NULL, 19520, 0x00000001 }, /* DIVL */ +{ NULL, 19536, 0x00000001 }, /* DIVL */ +{ NULL, 19544, 0x00000001 }, /* DIVL */ +{ NULL, 19552, 0x00000001 }, /* DIVL */ +{ NULL, 19560, 0x00000001 }, /* DIVL */ +{ NULL, 19568, 0x00000001 }, /* DIVL */ +{ NULL, 19576, 0x00000001 }, /* DIVL */ +{ NULL, 19577, 0x00000001 }, /* DIVL */ +{ NULL, 19578, 0x00000001 }, /* DIVL */ +{ NULL, 19579, 0x00000001 }, /* DIVL */ +{ NULL, 19580, 0x00000001 }, /* DIVL */ +{ op_4c90_0_comp_nf, 19600, 0x00000002 }, /* MVMEL */ +{ op_4c98_0_comp_nf, 19608, 0x00000002 }, /* MVMEL */ +{ op_4ca8_0_comp_nf, 19624, 0x00000002 }, /* MVMEL */ +{ op_4cb0_0_comp_nf, 19632, 0x00000002 }, /* MVMEL */ +{ op_4cb8_0_comp_nf, 19640, 0x00000002 }, /* MVMEL */ +{ op_4cb9_0_comp_nf, 19641, 0x00000002 }, /* MVMEL */ +{ op_4cba_0_comp_nf, 19642, 0x00000002 }, /* MVMEL */ +{ op_4cbb_0_comp_nf, 19643, 0x00000002 }, /* MVMEL */ +{ op_4cd0_0_comp_nf, 19664, 0x00000002 }, /* MVMEL */ +{ op_4cd8_0_comp_nf, 19672, 0x00000002 }, /* MVMEL */ +{ op_4ce8_0_comp_nf, 19688, 0x00000002 }, /* MVMEL */ +{ op_4cf0_0_comp_nf, 19696, 0x00000002 }, /* MVMEL */ +{ op_4cf8_0_comp_nf, 19704, 0x00000002 }, /* MVMEL */ +{ op_4cf9_0_comp_nf, 19705, 0x00000002 }, /* MVMEL */ +{ op_4cfa_0_comp_nf, 19706, 0x00000002 }, /* MVMEL */ +{ op_4cfb_0_comp_nf, 19707, 0x00000002 }, /* MVMEL */ +{ NULL, 20032, 0x00000001 }, /* TRAP */ +{ op_4e50_0_comp_nf, 20048, 0x00000002 }, /* LINK */ +{ op_4e58_0_comp_nf, 20056, 0x00000000 }, /* UNLK */ +{ NULL, 20064, 0x00000001 }, /* MVR2USP */ +{ NULL, 20072, 0x00000001 }, /* MVUSP2R */ +{ NULL, 20080, 0x00000001 }, /* RESET */ +{ op_4e71_0_comp_nf, 20081, 0x00000000 }, /* NOP */ +{ NULL, 20082, 0x00000001 }, /* STOP */ +{ NULL, 20083, 0x00000001 }, /* RTE */ +{ op_4e74_0_comp_nf, 20084, 0x00000003 }, /* RTD */ +{ op_4e75_0_comp_nf, 20085, 0x00000001 }, /* RTS */ +{ NULL, 20086, 0x00000001 }, /* TRAPV */ +{ NULL, 20087, 0x00000001 }, /* RTR */ +{ NULL, 20090, 0x00000001 }, /* MOVEC2 */ +{ NULL, 20091, 0x00000001 }, /* MOVE2C */ +{ op_4e90_0_comp_nf, 20112, 0x00000001 }, /* JSR */ +{ op_4ea8_0_comp_nf, 20136, 0x00000003 }, /* JSR */ +{ op_4eb0_0_comp_nf, 20144, 0x00000003 }, /* JSR */ +{ op_4eb8_0_comp_nf, 20152, 0x00000003 }, /* JSR */ +{ op_4eb9_0_comp_nf, 20153, 0x00000003 }, /* JSR */ +{ op_4eba_0_comp_nf, 20154, 0x00000003 }, /* JSR */ +{ op_4ebb_0_comp_nf, 20155, 0x00000003 }, /* JSR */ +{ op_4ed0_0_comp_nf, 20176, 0x00000001 }, /* JMP */ +{ op_4ee8_0_comp_nf, 20200, 0x00000003 }, /* JMP */ +{ op_4ef0_0_comp_nf, 20208, 0x00000003 }, /* JMP */ +{ op_4ef8_0_comp_nf, 20216, 0x00000003 }, /* JMP */ +{ op_4ef9_0_comp_nf, 20217, 0x00000003 }, /* JMP */ +{ op_4efa_0_comp_nf, 20218, 0x00000003 }, /* JMP */ +{ op_4efb_0_comp_nf, 20219, 0x00000003 }, /* JMP */ +{ op_5000_0_comp_nf, 20480, 0x00000000 }, /* ADD */ +{ op_5010_0_comp_nf, 20496, 0x00000000 }, /* ADD */ +{ op_5018_0_comp_nf, 20504, 0x00000000 }, /* ADD */ +{ op_5020_0_comp_nf, 20512, 0x00000000 }, /* ADD */ +{ op_5028_0_comp_nf, 20520, 0x00000002 }, /* ADD */ +{ op_5030_0_comp_nf, 20528, 0x00000002 }, /* ADD */ +{ op_5038_0_comp_nf, 20536, 0x00000002 }, /* ADD */ +{ op_5039_0_comp_nf, 20537, 0x00000002 }, /* ADD */ +{ op_5040_0_comp_nf, 20544, 0x00000000 }, /* ADD */ +{ op_5048_0_comp_nf, 20552, 0x00000000 }, /* ADDA */ +{ op_5050_0_comp_nf, 20560, 0x00000000 }, /* ADD */ +{ op_5058_0_comp_nf, 20568, 0x00000000 }, /* ADD */ +{ op_5060_0_comp_nf, 20576, 0x00000000 }, /* ADD */ +{ op_5068_0_comp_nf, 20584, 0x00000002 }, /* ADD */ +{ op_5070_0_comp_nf, 20592, 0x00000002 }, /* ADD */ +{ op_5078_0_comp_nf, 20600, 0x00000002 }, /* ADD */ +{ op_5079_0_comp_nf, 20601, 0x00000002 }, /* ADD */ +{ op_5080_0_comp_nf, 20608, 0x00000000 }, /* ADD */ +{ op_5088_0_comp_nf, 20616, 0x00000000 }, /* ADDA */ +{ op_5090_0_comp_nf, 20624, 0x00000000 }, /* ADD */ +{ op_5098_0_comp_nf, 20632, 0x00000000 }, /* ADD */ +{ op_50a0_0_comp_nf, 20640, 0x00000000 }, /* ADD */ +{ op_50a8_0_comp_nf, 20648, 0x00000002 }, /* ADD */ +{ op_50b0_0_comp_nf, 20656, 0x00000002 }, /* ADD */ +{ op_50b8_0_comp_nf, 20664, 0x00000002 }, /* ADD */ +{ op_50b9_0_comp_nf, 20665, 0x00000002 }, /* ADD */ +{ op_50c0_0_comp_nf, 20672, 0x00000000 }, /* Scc */ +{ op_50c8_0_comp_nf, 20680, 0x00000007 }, /* DBcc */ +{ op_50d0_0_comp_nf, 20688, 0x00000000 }, /* Scc */ +{ op_50d8_0_comp_nf, 20696, 0x00000000 }, /* Scc */ +{ op_50e0_0_comp_nf, 20704, 0x00000000 }, /* Scc */ +{ op_50e8_0_comp_nf, 20712, 0x00000002 }, /* Scc */ +{ op_50f0_0_comp_nf, 20720, 0x00000002 }, /* Scc */ +{ op_50f8_0_comp_nf, 20728, 0x00000002 }, /* Scc */ +{ op_50f9_0_comp_nf, 20729, 0x00000002 }, /* Scc */ +{ NULL, 20730, 0x00000001 }, /* TRAPcc */ +{ NULL, 20731, 0x00000001 }, /* TRAPcc */ +{ NULL, 20732, 0x00000001 }, /* TRAPcc */ +{ op_5100_0_comp_nf, 20736, 0x00000000 }, /* SUB */ +{ op_5110_0_comp_nf, 20752, 0x00000000 }, /* SUB */ +{ op_5118_0_comp_nf, 20760, 0x00000000 }, /* SUB */ +{ op_5120_0_comp_nf, 20768, 0x00000000 }, /* SUB */ +{ op_5128_0_comp_nf, 20776, 0x00000002 }, /* SUB */ +{ op_5130_0_comp_nf, 20784, 0x00000002 }, /* SUB */ +{ op_5138_0_comp_nf, 20792, 0x00000002 }, /* SUB */ +{ op_5139_0_comp_nf, 20793, 0x00000002 }, /* SUB */ +{ op_5140_0_comp_nf, 20800, 0x00000000 }, /* SUB */ +{ op_5148_0_comp_nf, 20808, 0x00000000 }, /* SUBA */ +{ op_5150_0_comp_nf, 20816, 0x00000000 }, /* SUB */ +{ op_5158_0_comp_nf, 20824, 0x00000000 }, /* SUB */ +{ op_5160_0_comp_nf, 20832, 0x00000000 }, /* SUB */ +{ op_5168_0_comp_nf, 20840, 0x00000002 }, /* SUB */ +{ op_5170_0_comp_nf, 20848, 0x00000002 }, /* SUB */ +{ op_5178_0_comp_nf, 20856, 0x00000002 }, /* SUB */ +{ op_5179_0_comp_nf, 20857, 0x00000002 }, /* SUB */ +{ op_5180_0_comp_nf, 20864, 0x00000000 }, /* SUB */ +{ op_5188_0_comp_nf, 20872, 0x00000000 }, /* SUBA */ +{ op_5190_0_comp_nf, 20880, 0x00000000 }, /* SUB */ +{ op_5198_0_comp_nf, 20888, 0x00000000 }, /* SUB */ +{ op_51a0_0_comp_nf, 20896, 0x00000000 }, /* SUB */ +{ op_51a8_0_comp_nf, 20904, 0x00000002 }, /* SUB */ +{ op_51b0_0_comp_nf, 20912, 0x00000002 }, /* SUB */ +{ op_51b8_0_comp_nf, 20920, 0x00000002 }, /* SUB */ +{ op_51b9_0_comp_nf, 20921, 0x00000002 }, /* SUB */ +{ op_51c0_0_comp_nf, 20928, 0x00000000 }, /* Scc */ +{ op_51c8_0_comp_nf, 20936, 0x00000007 }, /* DBcc */ +{ op_51d0_0_comp_nf, 20944, 0x00000000 }, /* Scc */ +{ op_51d8_0_comp_nf, 20952, 0x00000000 }, /* Scc */ +{ op_51e0_0_comp_nf, 20960, 0x00000000 }, /* Scc */ +{ op_51e8_0_comp_nf, 20968, 0x00000002 }, /* Scc */ +{ op_51f0_0_comp_nf, 20976, 0x00000002 }, /* Scc */ +{ op_51f8_0_comp_nf, 20984, 0x00000002 }, /* Scc */ +{ op_51f9_0_comp_nf, 20985, 0x00000002 }, /* Scc */ +{ NULL, 20986, 0x00000001 }, /* TRAPcc */ +{ NULL, 20987, 0x00000001 }, /* TRAPcc */ +{ NULL, 20988, 0x00000001 }, /* TRAPcc */ +{ op_52c0_0_comp_nf, 21184, 0x00000000 }, /* Scc */ +{ op_52c8_0_comp_nf, 21192, 0x00000007 }, /* DBcc */ +{ op_52d0_0_comp_nf, 21200, 0x00000000 }, /* Scc */ +{ op_52d8_0_comp_nf, 21208, 0x00000000 }, /* Scc */ +{ op_52e0_0_comp_nf, 21216, 0x00000000 }, /* Scc */ +{ op_52e8_0_comp_nf, 21224, 0x00000002 }, /* Scc */ +{ op_52f0_0_comp_nf, 21232, 0x00000002 }, /* Scc */ +{ op_52f8_0_comp_nf, 21240, 0x00000002 }, /* Scc */ +{ op_52f9_0_comp_nf, 21241, 0x00000002 }, /* Scc */ +{ NULL, 21242, 0x00000001 }, /* TRAPcc */ +{ NULL, 21243, 0x00000001 }, /* TRAPcc */ +{ NULL, 21244, 0x00000001 }, /* TRAPcc */ +{ op_53c0_0_comp_nf, 21440, 0x00000000 }, /* Scc */ +{ op_53c8_0_comp_nf, 21448, 0x00000007 }, /* DBcc */ +{ op_53d0_0_comp_nf, 21456, 0x00000000 }, /* Scc */ +{ op_53d8_0_comp_nf, 21464, 0x00000000 }, /* Scc */ +{ op_53e0_0_comp_nf, 21472, 0x00000000 }, /* Scc */ +{ op_53e8_0_comp_nf, 21480, 0x00000002 }, /* Scc */ +{ op_53f0_0_comp_nf, 21488, 0x00000002 }, /* Scc */ +{ op_53f8_0_comp_nf, 21496, 0x00000002 }, /* Scc */ +{ op_53f9_0_comp_nf, 21497, 0x00000002 }, /* Scc */ +{ NULL, 21498, 0x00000001 }, /* TRAPcc */ +{ NULL, 21499, 0x00000001 }, /* TRAPcc */ +{ NULL, 21500, 0x00000001 }, /* TRAPcc */ +{ op_54c0_0_comp_nf, 21696, 0x00000000 }, /* Scc */ +{ op_54c8_0_comp_nf, 21704, 0x00000007 }, /* DBcc */ +{ op_54d0_0_comp_nf, 21712, 0x00000000 }, /* Scc */ +{ op_54d8_0_comp_nf, 21720, 0x00000000 }, /* Scc */ +{ op_54e0_0_comp_nf, 21728, 0x00000000 }, /* Scc */ +{ op_54e8_0_comp_nf, 21736, 0x00000002 }, /* Scc */ +{ op_54f0_0_comp_nf, 21744, 0x00000002 }, /* Scc */ +{ op_54f8_0_comp_nf, 21752, 0x00000002 }, /* Scc */ +{ op_54f9_0_comp_nf, 21753, 0x00000002 }, /* Scc */ +{ NULL, 21754, 0x00000001 }, /* TRAPcc */ +{ NULL, 21755, 0x00000001 }, /* TRAPcc */ +{ NULL, 21756, 0x00000001 }, /* TRAPcc */ +{ op_55c0_0_comp_nf, 21952, 0x00000000 }, /* Scc */ +{ op_55c8_0_comp_nf, 21960, 0x00000007 }, /* DBcc */ +{ op_55d0_0_comp_nf, 21968, 0x00000000 }, /* Scc */ +{ op_55d8_0_comp_nf, 21976, 0x00000000 }, /* Scc */ +{ op_55e0_0_comp_nf, 21984, 0x00000000 }, /* Scc */ +{ op_55e8_0_comp_nf, 21992, 0x00000002 }, /* Scc */ +{ op_55f0_0_comp_nf, 22000, 0x00000002 }, /* Scc */ +{ op_55f8_0_comp_nf, 22008, 0x00000002 }, /* Scc */ +{ op_55f9_0_comp_nf, 22009, 0x00000002 }, /* Scc */ +{ NULL, 22010, 0x00000001 }, /* TRAPcc */ +{ NULL, 22011, 0x00000001 }, /* TRAPcc */ +{ NULL, 22012, 0x00000001 }, /* TRAPcc */ +{ op_56c0_0_comp_nf, 22208, 0x00000000 }, /* Scc */ +{ op_56c8_0_comp_nf, 22216, 0x00000007 }, /* DBcc */ +{ op_56d0_0_comp_nf, 22224, 0x00000000 }, /* Scc */ +{ op_56d8_0_comp_nf, 22232, 0x00000000 }, /* Scc */ +{ op_56e0_0_comp_nf, 22240, 0x00000000 }, /* Scc */ +{ op_56e8_0_comp_nf, 22248, 0x00000002 }, /* Scc */ +{ op_56f0_0_comp_nf, 22256, 0x00000002 }, /* Scc */ +{ op_56f8_0_comp_nf, 22264, 0x00000002 }, /* Scc */ +{ op_56f9_0_comp_nf, 22265, 0x00000002 }, /* Scc */ +{ NULL, 22266, 0x00000001 }, /* TRAPcc */ +{ NULL, 22267, 0x00000001 }, /* TRAPcc */ +{ NULL, 22268, 0x00000001 }, /* TRAPcc */ +{ op_57c0_0_comp_nf, 22464, 0x00000000 }, /* Scc */ +{ op_57c8_0_comp_nf, 22472, 0x00000007 }, /* DBcc */ +{ op_57d0_0_comp_nf, 22480, 0x00000000 }, /* Scc */ +{ op_57d8_0_comp_nf, 22488, 0x00000000 }, /* Scc */ +{ op_57e0_0_comp_nf, 22496, 0x00000000 }, /* Scc */ +{ op_57e8_0_comp_nf, 22504, 0x00000002 }, /* Scc */ +{ op_57f0_0_comp_nf, 22512, 0x00000002 }, /* Scc */ +{ op_57f8_0_comp_nf, 22520, 0x00000002 }, /* Scc */ +{ op_57f9_0_comp_nf, 22521, 0x00000002 }, /* Scc */ +{ NULL, 22522, 0x00000001 }, /* TRAPcc */ +{ NULL, 22523, 0x00000001 }, /* TRAPcc */ +{ NULL, 22524, 0x00000001 }, /* TRAPcc */ +{ NULL, 22720, 0x00000000 }, /* Scc */ +{ NULL, 22728, 0x00000007 }, /* DBcc */ +{ NULL, 22736, 0x00000000 }, /* Scc */ +{ NULL, 22744, 0x00000000 }, /* Scc */ +{ NULL, 22752, 0x00000000 }, /* Scc */ +{ NULL, 22760, 0x00000002 }, /* Scc */ +{ NULL, 22768, 0x00000002 }, /* Scc */ +{ NULL, 22776, 0x00000002 }, /* Scc */ +{ NULL, 22777, 0x00000002 }, /* Scc */ +{ NULL, 22778, 0x00000001 }, /* TRAPcc */ +{ NULL, 22779, 0x00000001 }, /* TRAPcc */ +{ NULL, 22780, 0x00000001 }, /* TRAPcc */ +{ NULL, 22976, 0x00000000 }, /* Scc */ +{ NULL, 22984, 0x00000007 }, /* DBcc */ +{ NULL, 22992, 0x00000000 }, /* Scc */ +{ NULL, 23000, 0x00000000 }, /* Scc */ +{ NULL, 23008, 0x00000000 }, /* Scc */ +{ NULL, 23016, 0x00000002 }, /* Scc */ +{ NULL, 23024, 0x00000002 }, /* Scc */ +{ NULL, 23032, 0x00000002 }, /* Scc */ +{ NULL, 23033, 0x00000002 }, /* Scc */ +{ NULL, 23034, 0x00000001 }, /* TRAPcc */ +{ NULL, 23035, 0x00000001 }, /* TRAPcc */ +{ NULL, 23036, 0x00000001 }, /* TRAPcc */ +{ op_5ac0_0_comp_nf, 23232, 0x00000000 }, /* Scc */ +{ op_5ac8_0_comp_nf, 23240, 0x00000007 }, /* DBcc */ +{ op_5ad0_0_comp_nf, 23248, 0x00000000 }, /* Scc */ +{ op_5ad8_0_comp_nf, 23256, 0x00000000 }, /* Scc */ +{ op_5ae0_0_comp_nf, 23264, 0x00000000 }, /* Scc */ +{ op_5ae8_0_comp_nf, 23272, 0x00000002 }, /* Scc */ +{ op_5af0_0_comp_nf, 23280, 0x00000002 }, /* Scc */ +{ op_5af8_0_comp_nf, 23288, 0x00000002 }, /* Scc */ +{ op_5af9_0_comp_nf, 23289, 0x00000002 }, /* Scc */ +{ NULL, 23290, 0x00000001 }, /* TRAPcc */ +{ NULL, 23291, 0x00000001 }, /* TRAPcc */ +{ NULL, 23292, 0x00000001 }, /* TRAPcc */ +{ op_5bc0_0_comp_nf, 23488, 0x00000000 }, /* Scc */ +{ op_5bc8_0_comp_nf, 23496, 0x00000007 }, /* DBcc */ +{ op_5bd0_0_comp_nf, 23504, 0x00000000 }, /* Scc */ +{ op_5bd8_0_comp_nf, 23512, 0x00000000 }, /* Scc */ +{ op_5be0_0_comp_nf, 23520, 0x00000000 }, /* Scc */ +{ op_5be8_0_comp_nf, 23528, 0x00000002 }, /* Scc */ +{ op_5bf0_0_comp_nf, 23536, 0x00000002 }, /* Scc */ +{ op_5bf8_0_comp_nf, 23544, 0x00000002 }, /* Scc */ +{ op_5bf9_0_comp_nf, 23545, 0x00000002 }, /* Scc */ +{ NULL, 23546, 0x00000001 }, /* TRAPcc */ +{ NULL, 23547, 0x00000001 }, /* TRAPcc */ +{ NULL, 23548, 0x00000001 }, /* TRAPcc */ +{ op_5cc0_0_comp_nf, 23744, 0x00000000 }, /* Scc */ +{ op_5cc8_0_comp_nf, 23752, 0x00000007 }, /* DBcc */ +{ op_5cd0_0_comp_nf, 23760, 0x00000000 }, /* Scc */ +{ op_5cd8_0_comp_nf, 23768, 0x00000000 }, /* Scc */ +{ op_5ce0_0_comp_nf, 23776, 0x00000000 }, /* Scc */ +{ op_5ce8_0_comp_nf, 23784, 0x00000002 }, /* Scc */ +{ op_5cf0_0_comp_nf, 23792, 0x00000002 }, /* Scc */ +{ op_5cf8_0_comp_nf, 23800, 0x00000002 }, /* Scc */ +{ op_5cf9_0_comp_nf, 23801, 0x00000002 }, /* Scc */ +{ NULL, 23802, 0x00000001 }, /* TRAPcc */ +{ NULL, 23803, 0x00000001 }, /* TRAPcc */ +{ NULL, 23804, 0x00000001 }, /* TRAPcc */ +{ op_5dc0_0_comp_nf, 24000, 0x00000000 }, /* Scc */ +{ op_5dc8_0_comp_nf, 24008, 0x00000007 }, /* DBcc */ +{ op_5dd0_0_comp_nf, 24016, 0x00000000 }, /* Scc */ +{ op_5dd8_0_comp_nf, 24024, 0x00000000 }, /* Scc */ +{ op_5de0_0_comp_nf, 24032, 0x00000000 }, /* Scc */ +{ op_5de8_0_comp_nf, 24040, 0x00000002 }, /* Scc */ +{ op_5df0_0_comp_nf, 24048, 0x00000002 }, /* Scc */ +{ op_5df8_0_comp_nf, 24056, 0x00000002 }, /* Scc */ +{ op_5df9_0_comp_nf, 24057, 0x00000002 }, /* Scc */ +{ NULL, 24058, 0x00000001 }, /* TRAPcc */ +{ NULL, 24059, 0x00000001 }, /* TRAPcc */ +{ NULL, 24060, 0x00000001 }, /* TRAPcc */ +{ op_5ec0_0_comp_nf, 24256, 0x00000000 }, /* Scc */ +{ op_5ec8_0_comp_nf, 24264, 0x00000007 }, /* DBcc */ +{ op_5ed0_0_comp_nf, 24272, 0x00000000 }, /* Scc */ +{ op_5ed8_0_comp_nf, 24280, 0x00000000 }, /* Scc */ +{ op_5ee0_0_comp_nf, 24288, 0x00000000 }, /* Scc */ +{ op_5ee8_0_comp_nf, 24296, 0x00000002 }, /* Scc */ +{ op_5ef0_0_comp_nf, 24304, 0x00000002 }, /* Scc */ +{ op_5ef8_0_comp_nf, 24312, 0x00000002 }, /* Scc */ +{ op_5ef9_0_comp_nf, 24313, 0x00000002 }, /* Scc */ +{ NULL, 24314, 0x00000001 }, /* TRAPcc */ +{ NULL, 24315, 0x00000001 }, /* TRAPcc */ +{ NULL, 24316, 0x00000001 }, /* TRAPcc */ +{ op_5fc0_0_comp_nf, 24512, 0x00000000 }, /* Scc */ +{ op_5fc8_0_comp_nf, 24520, 0x00000007 }, /* DBcc */ +{ op_5fd0_0_comp_nf, 24528, 0x00000000 }, /* Scc */ +{ op_5fd8_0_comp_nf, 24536, 0x00000000 }, /* Scc */ +{ op_5fe0_0_comp_nf, 24544, 0x00000000 }, /* Scc */ +{ op_5fe8_0_comp_nf, 24552, 0x00000002 }, /* Scc */ +{ op_5ff0_0_comp_nf, 24560, 0x00000002 }, /* Scc */ +{ op_5ff8_0_comp_nf, 24568, 0x00000002 }, /* Scc */ +{ op_5ff9_0_comp_nf, 24569, 0x00000002 }, /* Scc */ +{ NULL, 24570, 0x00000001 }, /* TRAPcc */ +{ NULL, 24571, 0x00000001 }, /* TRAPcc */ +{ NULL, 24572, 0x00000001 }, /* TRAPcc */ +{ op_6000_0_comp_nf, 24576, 0x00000012 }, /* Bcc */ +{ op_6001_0_comp_nf, 24577, 0x00000010 }, /* Bcc */ +{ op_60ff_0_comp_nf, 24831, 0x00000012 }, /* Bcc */ +{ op_6100_0_comp_nf, 24832, 0x00000012 }, /* BSR */ +{ op_6101_0_comp_nf, 24833, 0x00000010 }, /* BSR */ +{ NULL, 25087, 0x00000012 }, /* BSR */ +{ op_6200_0_comp_nf, 25088, 0x00000003 }, /* Bcc */ +{ op_6201_0_comp_nf, 25089, 0x00000001 }, /* Bcc */ +{ op_62ff_0_comp_nf, 25343, 0x00000003 }, /* Bcc */ +{ op_6300_0_comp_nf, 25344, 0x00000003 }, /* Bcc */ +{ op_6301_0_comp_nf, 25345, 0x00000001 }, /* Bcc */ +{ op_63ff_0_comp_nf, 25599, 0x00000003 }, /* Bcc */ +{ op_6400_0_comp_nf, 25600, 0x00000003 }, /* Bcc */ +{ op_6401_0_comp_nf, 25601, 0x00000001 }, /* Bcc */ +{ op_64ff_0_comp_nf, 25855, 0x00000003 }, /* Bcc */ +{ op_6500_0_comp_nf, 25856, 0x00000003 }, /* Bcc */ +{ op_6501_0_comp_nf, 25857, 0x00000001 }, /* Bcc */ +{ op_65ff_0_comp_nf, 26111, 0x00000003 }, /* Bcc */ +{ op_6600_0_comp_nf, 26112, 0x00000003 }, /* Bcc */ +{ op_6601_0_comp_nf, 26113, 0x00000001 }, /* Bcc */ +{ op_66ff_0_comp_nf, 26367, 0x00000003 }, /* Bcc */ +{ op_6700_0_comp_nf, 26368, 0x00000003 }, /* Bcc */ +{ op_6701_0_comp_nf, 26369, 0x00000001 }, /* Bcc */ +{ op_67ff_0_comp_nf, 26623, 0x00000003 }, /* Bcc */ +{ NULL, 26624, 0x00000003 }, /* Bcc */ +{ NULL, 26625, 0x00000001 }, /* Bcc */ +{ NULL, 26879, 0x00000003 }, /* Bcc */ +{ NULL, 26880, 0x00000003 }, /* Bcc */ +{ NULL, 26881, 0x00000001 }, /* Bcc */ +{ NULL, 27135, 0x00000003 }, /* Bcc */ +{ op_6a00_0_comp_nf, 27136, 0x00000003 }, /* Bcc */ +{ op_6a01_0_comp_nf, 27137, 0x00000001 }, /* Bcc */ +{ op_6aff_0_comp_nf, 27391, 0x00000003 }, /* Bcc */ +{ op_6b00_0_comp_nf, 27392, 0x00000003 }, /* Bcc */ +{ op_6b01_0_comp_nf, 27393, 0x00000001 }, /* Bcc */ +{ op_6bff_0_comp_nf, 27647, 0x00000003 }, /* Bcc */ +{ op_6c00_0_comp_nf, 27648, 0x00000003 }, /* Bcc */ +{ op_6c01_0_comp_nf, 27649, 0x00000001 }, /* Bcc */ +{ op_6cff_0_comp_nf, 27903, 0x00000003 }, /* Bcc */ +{ op_6d00_0_comp_nf, 27904, 0x00000003 }, /* Bcc */ +{ op_6d01_0_comp_nf, 27905, 0x00000001 }, /* Bcc */ +{ op_6dff_0_comp_nf, 28159, 0x00000003 }, /* Bcc */ +{ op_6e00_0_comp_nf, 28160, 0x00000003 }, /* Bcc */ +{ op_6e01_0_comp_nf, 28161, 0x00000001 }, /* Bcc */ +{ op_6eff_0_comp_nf, 28415, 0x00000003 }, /* Bcc */ +{ op_6f00_0_comp_nf, 28416, 0x00000003 }, /* Bcc */ +{ op_6f01_0_comp_nf, 28417, 0x00000001 }, /* Bcc */ +{ op_6fff_0_comp_nf, 28671, 0x00000003 }, /* Bcc */ +{ op_7000_0_comp_nf, 28672, 0x00000000 }, /* MOVE */ +{ op_8000_0_comp_nf, 32768, 0x00000000 }, /* OR */ +{ op_8010_0_comp_nf, 32784, 0x00000000 }, /* OR */ +{ op_8018_0_comp_nf, 32792, 0x00000000 }, /* OR */ +{ op_8020_0_comp_nf, 32800, 0x00000000 }, /* OR */ +{ op_8028_0_comp_nf, 32808, 0x00000002 }, /* OR */ +{ op_8030_0_comp_nf, 32816, 0x00000002 }, /* OR */ +{ op_8038_0_comp_nf, 32824, 0x00000002 }, /* OR */ +{ op_8039_0_comp_nf, 32825, 0x00000002 }, /* OR */ +{ op_803a_0_comp_nf, 32826, 0x00000002 }, /* OR */ +{ op_803b_0_comp_nf, 32827, 0x00000002 }, /* OR */ +{ op_803c_0_comp_nf, 32828, 0x00000002 }, /* OR */ +{ op_8040_0_comp_nf, 32832, 0x00000000 }, /* OR */ +{ op_8050_0_comp_nf, 32848, 0x00000000 }, /* OR */ +{ op_8058_0_comp_nf, 32856, 0x00000000 }, /* OR */ +{ op_8060_0_comp_nf, 32864, 0x00000000 }, /* OR */ +{ op_8068_0_comp_nf, 32872, 0x00000002 }, /* OR */ +{ op_8070_0_comp_nf, 32880, 0x00000002 }, /* OR */ +{ op_8078_0_comp_nf, 32888, 0x00000002 }, /* OR */ +{ op_8079_0_comp_nf, 32889, 0x00000002 }, /* OR */ +{ op_807a_0_comp_nf, 32890, 0x00000002 }, /* OR */ +{ op_807b_0_comp_nf, 32891, 0x00000002 }, /* OR */ +{ op_807c_0_comp_nf, 32892, 0x00000002 }, /* OR */ +{ op_8080_0_comp_nf, 32896, 0x00000000 }, /* OR */ +{ op_8090_0_comp_nf, 32912, 0x00000000 }, /* OR */ +{ op_8098_0_comp_nf, 32920, 0x00000000 }, /* OR */ +{ op_80a0_0_comp_nf, 32928, 0x00000000 }, /* OR */ +{ op_80a8_0_comp_nf, 32936, 0x00000002 }, /* OR */ +{ op_80b0_0_comp_nf, 32944, 0x00000002 }, /* OR */ +{ op_80b8_0_comp_nf, 32952, 0x00000002 }, /* OR */ +{ op_80b9_0_comp_nf, 32953, 0x00000002 }, /* OR */ +{ op_80ba_0_comp_nf, 32954, 0x00000002 }, /* OR */ +{ op_80bb_0_comp_nf, 32955, 0x00000002 }, /* OR */ +{ op_80bc_0_comp_nf, 32956, 0x00000002 }, /* OR */ +{ NULL, 32960, 0x00000001 }, /* DIVU */ +{ NULL, 32976, 0x00000001 }, /* DIVU */ +{ NULL, 32984, 0x00000001 }, /* DIVU */ +{ NULL, 32992, 0x00000001 }, /* DIVU */ +{ NULL, 33000, 0x00000001 }, /* DIVU */ +{ NULL, 33008, 0x00000001 }, /* DIVU */ +{ NULL, 33016, 0x00000001 }, /* DIVU */ +{ NULL, 33017, 0x00000001 }, /* DIVU */ +{ NULL, 33018, 0x00000001 }, /* DIVU */ +{ NULL, 33019, 0x00000001 }, /* DIVU */ +{ NULL, 33020, 0x00000001 }, /* DIVU */ +{ NULL, 33024, 0x00000000 }, /* SBCD */ +{ NULL, 33032, 0x00000000 }, /* SBCD */ +{ op_8110_0_comp_nf, 33040, 0x00000000 }, /* OR */ +{ op_8118_0_comp_nf, 33048, 0x00000000 }, /* OR */ +{ op_8120_0_comp_nf, 33056, 0x00000000 }, /* OR */ +{ op_8128_0_comp_nf, 33064, 0x00000002 }, /* OR */ +{ op_8130_0_comp_nf, 33072, 0x00000002 }, /* OR */ +{ op_8138_0_comp_nf, 33080, 0x00000002 }, /* OR */ +{ op_8139_0_comp_nf, 33081, 0x00000002 }, /* OR */ +{ NULL, 33088, 0x00000000 }, /* PACK */ +{ NULL, 33096, 0x00000000 }, /* PACK */ +{ op_8150_0_comp_nf, 33104, 0x00000000 }, /* OR */ +{ op_8158_0_comp_nf, 33112, 0x00000000 }, /* OR */ +{ op_8160_0_comp_nf, 33120, 0x00000000 }, /* OR */ +{ op_8168_0_comp_nf, 33128, 0x00000002 }, /* OR */ +{ op_8170_0_comp_nf, 33136, 0x00000002 }, /* OR */ +{ op_8178_0_comp_nf, 33144, 0x00000002 }, /* OR */ +{ op_8179_0_comp_nf, 33145, 0x00000002 }, /* OR */ +{ NULL, 33152, 0x00000000 }, /* UNPK */ +{ NULL, 33160, 0x00000000 }, /* UNPK */ +{ op_8190_0_comp_nf, 33168, 0x00000000 }, /* OR */ +{ op_8198_0_comp_nf, 33176, 0x00000000 }, /* OR */ +{ op_81a0_0_comp_nf, 33184, 0x00000000 }, /* OR */ +{ op_81a8_0_comp_nf, 33192, 0x00000002 }, /* OR */ +{ op_81b0_0_comp_nf, 33200, 0x00000002 }, /* OR */ +{ op_81b8_0_comp_nf, 33208, 0x00000002 }, /* OR */ +{ op_81b9_0_comp_nf, 33209, 0x00000002 }, /* OR */ +{ NULL, 33216, 0x00000001 }, /* DIVS */ +{ NULL, 33232, 0x00000001 }, /* DIVS */ +{ NULL, 33240, 0x00000001 }, /* DIVS */ +{ NULL, 33248, 0x00000001 }, /* DIVS */ +{ NULL, 33256, 0x00000001 }, /* DIVS */ +{ NULL, 33264, 0x00000001 }, /* DIVS */ +{ NULL, 33272, 0x00000001 }, /* DIVS */ +{ NULL, 33273, 0x00000001 }, /* DIVS */ +{ NULL, 33274, 0x00000001 }, /* DIVS */ +{ NULL, 33275, 0x00000001 }, /* DIVS */ +{ NULL, 33276, 0x00000001 }, /* DIVS */ +{ op_9000_0_comp_nf, 36864, 0x00000000 }, /* SUB */ +{ op_9010_0_comp_nf, 36880, 0x00000000 }, /* SUB */ +{ op_9018_0_comp_nf, 36888, 0x00000000 }, /* SUB */ +{ op_9020_0_comp_nf, 36896, 0x00000000 }, /* SUB */ +{ op_9028_0_comp_nf, 36904, 0x00000002 }, /* SUB */ +{ op_9030_0_comp_nf, 36912, 0x00000002 }, /* SUB */ +{ op_9038_0_comp_nf, 36920, 0x00000002 }, /* SUB */ +{ op_9039_0_comp_nf, 36921, 0x00000002 }, /* SUB */ +{ op_903a_0_comp_nf, 36922, 0x00000002 }, /* SUB */ +{ op_903b_0_comp_nf, 36923, 0x00000002 }, /* SUB */ +{ op_903c_0_comp_nf, 36924, 0x00000002 }, /* SUB */ +{ op_9040_0_comp_nf, 36928, 0x00000000 }, /* SUB */ +{ op_9048_0_comp_nf, 36936, 0x00000000 }, /* SUB */ +{ op_9050_0_comp_nf, 36944, 0x00000000 }, /* SUB */ +{ op_9058_0_comp_nf, 36952, 0x00000000 }, /* SUB */ +{ op_9060_0_comp_nf, 36960, 0x00000000 }, /* SUB */ +{ op_9068_0_comp_nf, 36968, 0x00000002 }, /* SUB */ +{ op_9070_0_comp_nf, 36976, 0x00000002 }, /* SUB */ +{ op_9078_0_comp_nf, 36984, 0x00000002 }, /* SUB */ +{ op_9079_0_comp_nf, 36985, 0x00000002 }, /* SUB */ +{ op_907a_0_comp_nf, 36986, 0x00000002 }, /* SUB */ +{ op_907b_0_comp_nf, 36987, 0x00000002 }, /* SUB */ +{ op_907c_0_comp_nf, 36988, 0x00000002 }, /* SUB */ +{ op_9080_0_comp_nf, 36992, 0x00000000 }, /* SUB */ +{ op_9088_0_comp_nf, 37000, 0x00000000 }, /* SUB */ +{ op_9090_0_comp_nf, 37008, 0x00000000 }, /* SUB */ +{ op_9098_0_comp_nf, 37016, 0x00000000 }, /* SUB */ +{ op_90a0_0_comp_nf, 37024, 0x00000000 }, /* SUB */ +{ op_90a8_0_comp_nf, 37032, 0x00000002 }, /* SUB */ +{ op_90b0_0_comp_nf, 37040, 0x00000002 }, /* SUB */ +{ op_90b8_0_comp_nf, 37048, 0x00000002 }, /* SUB */ +{ op_90b9_0_comp_nf, 37049, 0x00000002 }, /* SUB */ +{ op_90ba_0_comp_nf, 37050, 0x00000002 }, /* SUB */ +{ op_90bb_0_comp_nf, 37051, 0x00000002 }, /* SUB */ +{ op_90bc_0_comp_nf, 37052, 0x00000002 }, /* SUB */ +{ op_90c0_0_comp_nf, 37056, 0x00000000 }, /* SUBA */ +{ op_90c8_0_comp_nf, 37064, 0x00000000 }, /* SUBA */ +{ op_90d0_0_comp_nf, 37072, 0x00000000 }, /* SUBA */ +{ op_90d8_0_comp_nf, 37080, 0x00000000 }, /* SUBA */ +{ op_90e0_0_comp_nf, 37088, 0x00000000 }, /* SUBA */ +{ op_90e8_0_comp_nf, 37096, 0x00000002 }, /* SUBA */ +{ op_90f0_0_comp_nf, 37104, 0x00000002 }, /* SUBA */ +{ op_90f8_0_comp_nf, 37112, 0x00000002 }, /* SUBA */ +{ op_90f9_0_comp_nf, 37113, 0x00000002 }, /* SUBA */ +{ op_90fa_0_comp_nf, 37114, 0x00000002 }, /* SUBA */ +{ op_90fb_0_comp_nf, 37115, 0x00000002 }, /* SUBA */ +{ op_90fc_0_comp_nf, 37116, 0x00000002 }, /* SUBA */ +{ op_9100_0_comp_nf, 37120, 0x00000008 }, /* SUBX */ +{ op_9108_0_comp_nf, 37128, 0x00000008 }, /* SUBX */ +{ op_9110_0_comp_nf, 37136, 0x00000000 }, /* SUB */ +{ op_9118_0_comp_nf, 37144, 0x00000000 }, /* SUB */ +{ op_9120_0_comp_nf, 37152, 0x00000000 }, /* SUB */ +{ op_9128_0_comp_nf, 37160, 0x00000002 }, /* SUB */ +{ op_9130_0_comp_nf, 37168, 0x00000002 }, /* SUB */ +{ op_9138_0_comp_nf, 37176, 0x00000002 }, /* SUB */ +{ op_9139_0_comp_nf, 37177, 0x00000002 }, /* SUB */ +{ op_9140_0_comp_nf, 37184, 0x00000008 }, /* SUBX */ +{ op_9148_0_comp_nf, 37192, 0x00000008 }, /* SUBX */ +{ op_9150_0_comp_nf, 37200, 0x00000000 }, /* SUB */ +{ op_9158_0_comp_nf, 37208, 0x00000000 }, /* SUB */ +{ op_9160_0_comp_nf, 37216, 0x00000000 }, /* SUB */ +{ op_9168_0_comp_nf, 37224, 0x00000002 }, /* SUB */ +{ op_9170_0_comp_nf, 37232, 0x00000002 }, /* SUB */ +{ op_9178_0_comp_nf, 37240, 0x00000002 }, /* SUB */ +{ op_9179_0_comp_nf, 37241, 0x00000002 }, /* SUB */ +{ op_9180_0_comp_nf, 37248, 0x00000008 }, /* SUBX */ +{ op_9188_0_comp_nf, 37256, 0x00000008 }, /* SUBX */ +{ op_9190_0_comp_nf, 37264, 0x00000000 }, /* SUB */ +{ op_9198_0_comp_nf, 37272, 0x00000000 }, /* SUB */ +{ op_91a0_0_comp_nf, 37280, 0x00000000 }, /* SUB */ +{ op_91a8_0_comp_nf, 37288, 0x00000002 }, /* SUB */ +{ op_91b0_0_comp_nf, 37296, 0x00000002 }, /* SUB */ +{ op_91b8_0_comp_nf, 37304, 0x00000002 }, /* SUB */ +{ op_91b9_0_comp_nf, 37305, 0x00000002 }, /* SUB */ +{ op_91c0_0_comp_nf, 37312, 0x00000000 }, /* SUBA */ +{ op_91c8_0_comp_nf, 37320, 0x00000000 }, /* SUBA */ +{ op_91d0_0_comp_nf, 37328, 0x00000000 }, /* SUBA */ +{ op_91d8_0_comp_nf, 37336, 0x00000000 }, /* SUBA */ +{ op_91e0_0_comp_nf, 37344, 0x00000000 }, /* SUBA */ +{ op_91e8_0_comp_nf, 37352, 0x00000002 }, /* SUBA */ +{ op_91f0_0_comp_nf, 37360, 0x00000002 }, /* SUBA */ +{ op_91f8_0_comp_nf, 37368, 0x00000002 }, /* SUBA */ +{ op_91f9_0_comp_nf, 37369, 0x00000002 }, /* SUBA */ +{ op_91fa_0_comp_nf, 37370, 0x00000002 }, /* SUBA */ +{ op_91fb_0_comp_nf, 37371, 0x00000002 }, /* SUBA */ +{ op_91fc_0_comp_nf, 37372, 0x00000002 }, /* SUBA */ +{ op_b000_0_comp_nf, 45056, 0x00000000 }, /* CMP */ +{ op_b010_0_comp_nf, 45072, 0x00000000 }, /* CMP */ +{ op_b018_0_comp_nf, 45080, 0x00000000 }, /* CMP */ +{ op_b020_0_comp_nf, 45088, 0x00000000 }, /* CMP */ +{ op_b028_0_comp_nf, 45096, 0x00000002 }, /* CMP */ +{ op_b030_0_comp_nf, 45104, 0x00000002 }, /* CMP */ +{ op_b038_0_comp_nf, 45112, 0x00000002 }, /* CMP */ +{ op_b039_0_comp_nf, 45113, 0x00000002 }, /* CMP */ +{ op_b03a_0_comp_nf, 45114, 0x00000002 }, /* CMP */ +{ op_b03b_0_comp_nf, 45115, 0x00000002 }, /* CMP */ +{ op_b03c_0_comp_nf, 45116, 0x00000002 }, /* CMP */ +{ op_b040_0_comp_nf, 45120, 0x00000000 }, /* CMP */ +{ op_b048_0_comp_nf, 45128, 0x00000000 }, /* CMP */ +{ op_b050_0_comp_nf, 45136, 0x00000000 }, /* CMP */ +{ op_b058_0_comp_nf, 45144, 0x00000000 }, /* CMP */ +{ op_b060_0_comp_nf, 45152, 0x00000000 }, /* CMP */ +{ op_b068_0_comp_nf, 45160, 0x00000002 }, /* CMP */ +{ op_b070_0_comp_nf, 45168, 0x00000002 }, /* CMP */ +{ op_b078_0_comp_nf, 45176, 0x00000002 }, /* CMP */ +{ op_b079_0_comp_nf, 45177, 0x00000002 }, /* CMP */ +{ op_b07a_0_comp_nf, 45178, 0x00000002 }, /* CMP */ +{ op_b07b_0_comp_nf, 45179, 0x00000002 }, /* CMP */ +{ op_b07c_0_comp_nf, 45180, 0x00000002 }, /* CMP */ +{ op_b080_0_comp_nf, 45184, 0x00000000 }, /* CMP */ +{ op_b088_0_comp_nf, 45192, 0x00000000 }, /* CMP */ +{ op_b090_0_comp_nf, 45200, 0x00000000 }, /* CMP */ +{ op_b098_0_comp_nf, 45208, 0x00000000 }, /* CMP */ +{ op_b0a0_0_comp_nf, 45216, 0x00000000 }, /* CMP */ +{ op_b0a8_0_comp_nf, 45224, 0x00000002 }, /* CMP */ +{ op_b0b0_0_comp_nf, 45232, 0x00000002 }, /* CMP */ +{ op_b0b8_0_comp_nf, 45240, 0x00000002 }, /* CMP */ +{ op_b0b9_0_comp_nf, 45241, 0x00000002 }, /* CMP */ +{ op_b0ba_0_comp_nf, 45242, 0x00000002 }, /* CMP */ +{ op_b0bb_0_comp_nf, 45243, 0x00000002 }, /* CMP */ +{ op_b0bc_0_comp_nf, 45244, 0x00000002 }, /* CMP */ +{ op_b0c0_0_comp_nf, 45248, 0x00000000 }, /* CMPA */ +{ op_b0c8_0_comp_nf, 45256, 0x00000000 }, /* CMPA */ +{ op_b0d0_0_comp_nf, 45264, 0x00000000 }, /* CMPA */ +{ op_b0d8_0_comp_nf, 45272, 0x00000000 }, /* CMPA */ +{ op_b0e0_0_comp_nf, 45280, 0x00000000 }, /* CMPA */ +{ op_b0e8_0_comp_nf, 45288, 0x00000002 }, /* CMPA */ +{ op_b0f0_0_comp_nf, 45296, 0x00000002 }, /* CMPA */ +{ op_b0f8_0_comp_nf, 45304, 0x00000002 }, /* CMPA */ +{ op_b0f9_0_comp_nf, 45305, 0x00000002 }, /* CMPA */ +{ op_b0fa_0_comp_nf, 45306, 0x00000002 }, /* CMPA */ +{ op_b0fb_0_comp_nf, 45307, 0x00000002 }, /* CMPA */ +{ op_b0fc_0_comp_nf, 45308, 0x00000002 }, /* CMPA */ +{ op_b100_0_comp_nf, 45312, 0x00000000 }, /* EOR */ +{ op_b108_0_comp_nf, 45320, 0x00000000 }, /* CMPM */ +{ op_b110_0_comp_nf, 45328, 0x00000000 }, /* EOR */ +{ op_b118_0_comp_nf, 45336, 0x00000000 }, /* EOR */ +{ op_b120_0_comp_nf, 45344, 0x00000000 }, /* EOR */ +{ op_b128_0_comp_nf, 45352, 0x00000002 }, /* EOR */ +{ op_b130_0_comp_nf, 45360, 0x00000002 }, /* EOR */ +{ op_b138_0_comp_nf, 45368, 0x00000002 }, /* EOR */ +{ op_b139_0_comp_nf, 45369, 0x00000002 }, /* EOR */ +{ op_b140_0_comp_nf, 45376, 0x00000000 }, /* EOR */ +{ op_b148_0_comp_nf, 45384, 0x00000000 }, /* CMPM */ +{ op_b150_0_comp_nf, 45392, 0x00000000 }, /* EOR */ +{ op_b158_0_comp_nf, 45400, 0x00000000 }, /* EOR */ +{ op_b160_0_comp_nf, 45408, 0x00000000 }, /* EOR */ +{ op_b168_0_comp_nf, 45416, 0x00000002 }, /* EOR */ +{ op_b170_0_comp_nf, 45424, 0x00000002 }, /* EOR */ +{ op_b178_0_comp_nf, 45432, 0x00000002 }, /* EOR */ +{ op_b179_0_comp_nf, 45433, 0x00000002 }, /* EOR */ +{ op_b180_0_comp_nf, 45440, 0x00000000 }, /* EOR */ +{ op_b188_0_comp_nf, 45448, 0x00000000 }, /* CMPM */ +{ op_b190_0_comp_nf, 45456, 0x00000000 }, /* EOR */ +{ op_b198_0_comp_nf, 45464, 0x00000000 }, /* EOR */ +{ op_b1a0_0_comp_nf, 45472, 0x00000000 }, /* EOR */ +{ op_b1a8_0_comp_nf, 45480, 0x00000002 }, /* EOR */ +{ op_b1b0_0_comp_nf, 45488, 0x00000002 }, /* EOR */ +{ op_b1b8_0_comp_nf, 45496, 0x00000002 }, /* EOR */ +{ op_b1b9_0_comp_nf, 45497, 0x00000002 }, /* EOR */ +{ op_b1c0_0_comp_nf, 45504, 0x00000000 }, /* CMPA */ +{ op_b1c8_0_comp_nf, 45512, 0x00000000 }, /* CMPA */ +{ op_b1d0_0_comp_nf, 45520, 0x00000000 }, /* CMPA */ +{ op_b1d8_0_comp_nf, 45528, 0x00000000 }, /* CMPA */ +{ op_b1e0_0_comp_nf, 45536, 0x00000000 }, /* CMPA */ +{ op_b1e8_0_comp_nf, 45544, 0x00000002 }, /* CMPA */ +{ op_b1f0_0_comp_nf, 45552, 0x00000002 }, /* CMPA */ +{ op_b1f8_0_comp_nf, 45560, 0x00000002 }, /* CMPA */ +{ op_b1f9_0_comp_nf, 45561, 0x00000002 }, /* CMPA */ +{ op_b1fa_0_comp_nf, 45562, 0x00000002 }, /* CMPA */ +{ op_b1fb_0_comp_nf, 45563, 0x00000002 }, /* CMPA */ +{ op_b1fc_0_comp_nf, 45564, 0x00000002 }, /* CMPA */ +{ op_c000_0_comp_nf, 49152, 0x00000000 }, /* AND */ +{ op_c010_0_comp_nf, 49168, 0x00000000 }, /* AND */ +{ op_c018_0_comp_nf, 49176, 0x00000000 }, /* AND */ +{ op_c020_0_comp_nf, 49184, 0x00000000 }, /* AND */ +{ op_c028_0_comp_nf, 49192, 0x00000002 }, /* AND */ +{ op_c030_0_comp_nf, 49200, 0x00000002 }, /* AND */ +{ op_c038_0_comp_nf, 49208, 0x00000002 }, /* AND */ +{ op_c039_0_comp_nf, 49209, 0x00000002 }, /* AND */ +{ op_c03a_0_comp_nf, 49210, 0x00000002 }, /* AND */ +{ op_c03b_0_comp_nf, 49211, 0x00000002 }, /* AND */ +{ op_c03c_0_comp_nf, 49212, 0x00000002 }, /* AND */ +{ op_c040_0_comp_nf, 49216, 0x00000000 }, /* AND */ +{ op_c050_0_comp_nf, 49232, 0x00000000 }, /* AND */ +{ op_c058_0_comp_nf, 49240, 0x00000000 }, /* AND */ +{ op_c060_0_comp_nf, 49248, 0x00000000 }, /* AND */ +{ op_c068_0_comp_nf, 49256, 0x00000002 }, /* AND */ +{ op_c070_0_comp_nf, 49264, 0x00000002 }, /* AND */ +{ op_c078_0_comp_nf, 49272, 0x00000002 }, /* AND */ +{ op_c079_0_comp_nf, 49273, 0x00000002 }, /* AND */ +{ op_c07a_0_comp_nf, 49274, 0x00000002 }, /* AND */ +{ op_c07b_0_comp_nf, 49275, 0x00000002 }, /* AND */ +{ op_c07c_0_comp_nf, 49276, 0x00000002 }, /* AND */ +{ op_c080_0_comp_nf, 49280, 0x00000000 }, /* AND */ +{ op_c090_0_comp_nf, 49296, 0x00000000 }, /* AND */ +{ op_c098_0_comp_nf, 49304, 0x00000000 }, /* AND */ +{ op_c0a0_0_comp_nf, 49312, 0x00000000 }, /* AND */ +{ op_c0a8_0_comp_nf, 49320, 0x00000002 }, /* AND */ +{ op_c0b0_0_comp_nf, 49328, 0x00000002 }, /* AND */ +{ op_c0b8_0_comp_nf, 49336, 0x00000002 }, /* AND */ +{ op_c0b9_0_comp_nf, 49337, 0x00000002 }, /* AND */ +{ op_c0ba_0_comp_nf, 49338, 0x00000002 }, /* AND */ +{ op_c0bb_0_comp_nf, 49339, 0x00000002 }, /* AND */ +{ op_c0bc_0_comp_nf, 49340, 0x00000002 }, /* AND */ +{ op_c0c0_0_comp_nf, 49344, 0x00000000 }, /* MULU */ +{ op_c0d0_0_comp_nf, 49360, 0x00000000 }, /* MULU */ +{ op_c0d8_0_comp_nf, 49368, 0x00000000 }, /* MULU */ +{ op_c0e0_0_comp_nf, 49376, 0x00000000 }, /* MULU */ +{ op_c0e8_0_comp_nf, 49384, 0x00000002 }, /* MULU */ +{ op_c0f0_0_comp_nf, 49392, 0x00000002 }, /* MULU */ +{ op_c0f8_0_comp_nf, 49400, 0x00000002 }, /* MULU */ +{ op_c0f9_0_comp_nf, 49401, 0x00000002 }, /* MULU */ +{ op_c0fa_0_comp_nf, 49402, 0x00000002 }, /* MULU */ +{ op_c0fb_0_comp_nf, 49403, 0x00000002 }, /* MULU */ +{ op_c0fc_0_comp_nf, 49404, 0x00000002 }, /* MULU */ +{ NULL, 49408, 0x00000000 }, /* ABCD */ +{ NULL, 49416, 0x00000000 }, /* ABCD */ +{ op_c110_0_comp_nf, 49424, 0x00000000 }, /* AND */ +{ op_c118_0_comp_nf, 49432, 0x00000000 }, /* AND */ +{ op_c120_0_comp_nf, 49440, 0x00000000 }, /* AND */ +{ op_c128_0_comp_nf, 49448, 0x00000002 }, /* AND */ +{ op_c130_0_comp_nf, 49456, 0x00000002 }, /* AND */ +{ op_c138_0_comp_nf, 49464, 0x00000002 }, /* AND */ +{ op_c139_0_comp_nf, 49465, 0x00000002 }, /* AND */ +{ op_c140_0_comp_nf, 49472, 0x00000000 }, /* EXG */ +{ op_c148_0_comp_nf, 49480, 0x00000000 }, /* EXG */ +{ op_c150_0_comp_nf, 49488, 0x00000000 }, /* AND */ +{ op_c158_0_comp_nf, 49496, 0x00000000 }, /* AND */ +{ op_c160_0_comp_nf, 49504, 0x00000000 }, /* AND */ +{ op_c168_0_comp_nf, 49512, 0x00000002 }, /* AND */ +{ op_c170_0_comp_nf, 49520, 0x00000002 }, /* AND */ +{ op_c178_0_comp_nf, 49528, 0x00000002 }, /* AND */ +{ op_c179_0_comp_nf, 49529, 0x00000002 }, /* AND */ +{ op_c188_0_comp_nf, 49544, 0x00000000 }, /* EXG */ +{ op_c190_0_comp_nf, 49552, 0x00000000 }, /* AND */ +{ op_c198_0_comp_nf, 49560, 0x00000000 }, /* AND */ +{ op_c1a0_0_comp_nf, 49568, 0x00000000 }, /* AND */ +{ op_c1a8_0_comp_nf, 49576, 0x00000002 }, /* AND */ +{ op_c1b0_0_comp_nf, 49584, 0x00000002 }, /* AND */ +{ op_c1b8_0_comp_nf, 49592, 0x00000002 }, /* AND */ +{ op_c1b9_0_comp_nf, 49593, 0x00000002 }, /* AND */ +{ op_c1c0_0_comp_nf, 49600, 0x00000000 }, /* MULS */ +{ op_c1d0_0_comp_nf, 49616, 0x00000000 }, /* MULS */ +{ op_c1d8_0_comp_nf, 49624, 0x00000000 }, /* MULS */ +{ op_c1e0_0_comp_nf, 49632, 0x00000000 }, /* MULS */ +{ op_c1e8_0_comp_nf, 49640, 0x00000002 }, /* MULS */ +{ op_c1f0_0_comp_nf, 49648, 0x00000002 }, /* MULS */ +{ op_c1f8_0_comp_nf, 49656, 0x00000002 }, /* MULS */ +{ op_c1f9_0_comp_nf, 49657, 0x00000002 }, /* MULS */ +{ op_c1fa_0_comp_nf, 49658, 0x00000002 }, /* MULS */ +{ op_c1fb_0_comp_nf, 49659, 0x00000002 }, /* MULS */ +{ op_c1fc_0_comp_nf, 49660, 0x00000002 }, /* MULS */ +{ op_d000_0_comp_nf, 53248, 0x00000000 }, /* ADD */ +{ op_d010_0_comp_nf, 53264, 0x00000000 }, /* ADD */ +{ op_d018_0_comp_nf, 53272, 0x00000000 }, /* ADD */ +{ op_d020_0_comp_nf, 53280, 0x00000000 }, /* ADD */ +{ op_d028_0_comp_nf, 53288, 0x00000002 }, /* ADD */ +{ op_d030_0_comp_nf, 53296, 0x00000002 }, /* ADD */ +{ op_d038_0_comp_nf, 53304, 0x00000002 }, /* ADD */ +{ op_d039_0_comp_nf, 53305, 0x00000002 }, /* ADD */ +{ op_d03a_0_comp_nf, 53306, 0x00000002 }, /* ADD */ +{ op_d03b_0_comp_nf, 53307, 0x00000002 }, /* ADD */ +{ op_d03c_0_comp_nf, 53308, 0x00000002 }, /* ADD */ +{ op_d040_0_comp_nf, 53312, 0x00000000 }, /* ADD */ +{ op_d048_0_comp_nf, 53320, 0x00000000 }, /* ADD */ +{ op_d050_0_comp_nf, 53328, 0x00000000 }, /* ADD */ +{ op_d058_0_comp_nf, 53336, 0x00000000 }, /* ADD */ +{ op_d060_0_comp_nf, 53344, 0x00000000 }, /* ADD */ +{ op_d068_0_comp_nf, 53352, 0x00000002 }, /* ADD */ +{ op_d070_0_comp_nf, 53360, 0x00000002 }, /* ADD */ +{ op_d078_0_comp_nf, 53368, 0x00000002 }, /* ADD */ +{ op_d079_0_comp_nf, 53369, 0x00000002 }, /* ADD */ +{ op_d07a_0_comp_nf, 53370, 0x00000002 }, /* ADD */ +{ op_d07b_0_comp_nf, 53371, 0x00000002 }, /* ADD */ +{ op_d07c_0_comp_nf, 53372, 0x00000002 }, /* ADD */ +{ op_d080_0_comp_nf, 53376, 0x00000000 }, /* ADD */ +{ op_d088_0_comp_nf, 53384, 0x00000000 }, /* ADD */ +{ op_d090_0_comp_nf, 53392, 0x00000000 }, /* ADD */ +{ op_d098_0_comp_nf, 53400, 0x00000000 }, /* ADD */ +{ op_d0a0_0_comp_nf, 53408, 0x00000000 }, /* ADD */ +{ op_d0a8_0_comp_nf, 53416, 0x00000002 }, /* ADD */ +{ op_d0b0_0_comp_nf, 53424, 0x00000002 }, /* ADD */ +{ op_d0b8_0_comp_nf, 53432, 0x00000002 }, /* ADD */ +{ op_d0b9_0_comp_nf, 53433, 0x00000002 }, /* ADD */ +{ op_d0ba_0_comp_nf, 53434, 0x00000002 }, /* ADD */ +{ op_d0bb_0_comp_nf, 53435, 0x00000002 }, /* ADD */ +{ op_d0bc_0_comp_nf, 53436, 0x00000002 }, /* ADD */ +{ op_d0c0_0_comp_nf, 53440, 0x00000000 }, /* ADDA */ +{ op_d0c8_0_comp_nf, 53448, 0x00000000 }, /* ADDA */ +{ op_d0d0_0_comp_nf, 53456, 0x00000000 }, /* ADDA */ +{ op_d0d8_0_comp_nf, 53464, 0x00000000 }, /* ADDA */ +{ op_d0e0_0_comp_nf, 53472, 0x00000000 }, /* ADDA */ +{ op_d0e8_0_comp_nf, 53480, 0x00000002 }, /* ADDA */ +{ op_d0f0_0_comp_nf, 53488, 0x00000002 }, /* ADDA */ +{ op_d0f8_0_comp_nf, 53496, 0x00000002 }, /* ADDA */ +{ op_d0f9_0_comp_nf, 53497, 0x00000002 }, /* ADDA */ +{ op_d0fa_0_comp_nf, 53498, 0x00000002 }, /* ADDA */ +{ op_d0fb_0_comp_nf, 53499, 0x00000002 }, /* ADDA */ +{ op_d0fc_0_comp_nf, 53500, 0x00000002 }, /* ADDA */ +{ op_d100_0_comp_nf, 53504, 0x00000008 }, /* ADDX */ +{ op_d108_0_comp_nf, 53512, 0x00000008 }, /* ADDX */ +{ op_d110_0_comp_nf, 53520, 0x00000000 }, /* ADD */ +{ op_d118_0_comp_nf, 53528, 0x00000000 }, /* ADD */ +{ op_d120_0_comp_nf, 53536, 0x00000000 }, /* ADD */ +{ op_d128_0_comp_nf, 53544, 0x00000002 }, /* ADD */ +{ op_d130_0_comp_nf, 53552, 0x00000002 }, /* ADD */ +{ op_d138_0_comp_nf, 53560, 0x00000002 }, /* ADD */ +{ op_d139_0_comp_nf, 53561, 0x00000002 }, /* ADD */ +{ op_d140_0_comp_nf, 53568, 0x00000008 }, /* ADDX */ +{ op_d148_0_comp_nf, 53576, 0x00000008 }, /* ADDX */ +{ op_d150_0_comp_nf, 53584, 0x00000000 }, /* ADD */ +{ op_d158_0_comp_nf, 53592, 0x00000000 }, /* ADD */ +{ op_d160_0_comp_nf, 53600, 0x00000000 }, /* ADD */ +{ op_d168_0_comp_nf, 53608, 0x00000002 }, /* ADD */ +{ op_d170_0_comp_nf, 53616, 0x00000002 }, /* ADD */ +{ op_d178_0_comp_nf, 53624, 0x00000002 }, /* ADD */ +{ op_d179_0_comp_nf, 53625, 0x00000002 }, /* ADD */ +{ op_d180_0_comp_nf, 53632, 0x00000008 }, /* ADDX */ +{ op_d188_0_comp_nf, 53640, 0x00000008 }, /* ADDX */ +{ op_d190_0_comp_nf, 53648, 0x00000000 }, /* ADD */ +{ op_d198_0_comp_nf, 53656, 0x00000000 }, /* ADD */ +{ op_d1a0_0_comp_nf, 53664, 0x00000000 }, /* ADD */ +{ op_d1a8_0_comp_nf, 53672, 0x00000002 }, /* ADD */ +{ op_d1b0_0_comp_nf, 53680, 0x00000002 }, /* ADD */ +{ op_d1b8_0_comp_nf, 53688, 0x00000002 }, /* ADD */ +{ op_d1b9_0_comp_nf, 53689, 0x00000002 }, /* ADD */ +{ op_d1c0_0_comp_nf, 53696, 0x00000000 }, /* ADDA */ +{ op_d1c8_0_comp_nf, 53704, 0x00000000 }, /* ADDA */ +{ op_d1d0_0_comp_nf, 53712, 0x00000000 }, /* ADDA */ +{ op_d1d8_0_comp_nf, 53720, 0x00000000 }, /* ADDA */ +{ op_d1e0_0_comp_nf, 53728, 0x00000000 }, /* ADDA */ +{ op_d1e8_0_comp_nf, 53736, 0x00000002 }, /* ADDA */ +{ op_d1f0_0_comp_nf, 53744, 0x00000002 }, /* ADDA */ +{ op_d1f8_0_comp_nf, 53752, 0x00000002 }, /* ADDA */ +{ op_d1f9_0_comp_nf, 53753, 0x00000002 }, /* ADDA */ +{ op_d1fa_0_comp_nf, 53754, 0x00000002 }, /* ADDA */ +{ op_d1fb_0_comp_nf, 53755, 0x00000002 }, /* ADDA */ +{ op_d1fc_0_comp_nf, 53756, 0x00000002 }, /* ADDA */ +{ op_e000_0_comp_nf, 57344, 0x00000000 }, /* ASR */ +{ op_e008_0_comp_nf, 57352, 0x00000000 }, /* LSR */ +{ NULL, 57360, 0x00000000 }, /* ROXR */ +{ op_e018_0_comp_nf, 57368, 0x00000000 }, /* ROR */ +{ op_e020_0_comp_nf, 57376, 0x00000004 }, /* ASR */ +{ op_e028_0_comp_nf, 57384, 0x00000004 }, /* LSR */ +{ NULL, 57392, 0x00000000 }, /* ROXR */ +{ op_e038_0_comp_nf, 57400, 0x00000000 }, /* ROR */ +{ op_e040_0_comp_nf, 57408, 0x00000000 }, /* ASR */ +{ op_e048_0_comp_nf, 57416, 0x00000000 }, /* LSR */ +{ NULL, 57424, 0x00000000 }, /* ROXR */ +{ op_e058_0_comp_nf, 57432, 0x00000000 }, /* ROR */ +{ op_e060_0_comp_nf, 57440, 0x00000004 }, /* ASR */ +{ op_e068_0_comp_nf, 57448, 0x00000004 }, /* LSR */ +{ NULL, 57456, 0x00000000 }, /* ROXR */ +{ op_e078_0_comp_nf, 57464, 0x00000000 }, /* ROR */ +{ op_e080_0_comp_nf, 57472, 0x00000000 }, /* ASR */ +{ op_e088_0_comp_nf, 57480, 0x00000000 }, /* LSR */ +{ NULL, 57488, 0x00000000 }, /* ROXR */ +{ op_e098_0_comp_nf, 57496, 0x00000000 }, /* ROR */ +{ op_e0a0_0_comp_nf, 57504, 0x00000004 }, /* ASR */ +{ op_e0a8_0_comp_nf, 57512, 0x00000004 }, /* LSR */ +{ NULL, 57520, 0x00000000 }, /* ROXR */ +{ op_e0b8_0_comp_nf, 57528, 0x00000000 }, /* ROR */ +{ NULL, 57552, 0x00000000 }, /* ASRW */ +{ NULL, 57560, 0x00000000 }, /* ASRW */ +{ NULL, 57568, 0x00000000 }, /* ASRW */ +{ NULL, 57576, 0x00000000 }, /* ASRW */ +{ NULL, 57584, 0x00000000 }, /* ASRW */ +{ NULL, 57592, 0x00000000 }, /* ASRW */ +{ NULL, 57593, 0x00000000 }, /* ASRW */ +{ op_e100_0_comp_nf, 57600, 0x00000000 }, /* ASL */ +{ op_e108_0_comp_nf, 57608, 0x00000000 }, /* LSL */ +{ NULL, 57616, 0x00000000 }, /* ROXL */ +{ op_e118_0_comp_nf, 57624, 0x00000000 }, /* ROL */ +{ op_e120_0_comp_nf, 57632, 0x00000004 }, /* ASL */ +{ op_e128_0_comp_nf, 57640, 0x00000004 }, /* LSL */ +{ NULL, 57648, 0x00000000 }, /* ROXL */ +{ op_e138_0_comp_nf, 57656, 0x00000000 }, /* ROL */ +{ op_e140_0_comp_nf, 57664, 0x00000000 }, /* ASL */ +{ op_e148_0_comp_nf, 57672, 0x00000000 }, /* LSL */ +{ NULL, 57680, 0x00000000 }, /* ROXL */ +{ op_e158_0_comp_nf, 57688, 0x00000000 }, /* ROL */ +{ op_e160_0_comp_nf, 57696, 0x00000004 }, /* ASL */ +{ op_e168_0_comp_nf, 57704, 0x00000004 }, /* LSL */ +{ NULL, 57712, 0x00000000 }, /* ROXL */ +{ op_e178_0_comp_nf, 57720, 0x00000000 }, /* ROL */ +{ op_e180_0_comp_nf, 57728, 0x00000000 }, /* ASL */ +{ op_e188_0_comp_nf, 57736, 0x00000000 }, /* LSL */ +{ NULL, 57744, 0x00000000 }, /* ROXL */ +{ op_e198_0_comp_nf, 57752, 0x00000000 }, /* ROL */ +{ op_e1a0_0_comp_nf, 57760, 0x00000004 }, /* ASL */ +{ op_e1a8_0_comp_nf, 57768, 0x00000004 }, /* LSL */ +{ NULL, 57776, 0x00000000 }, /* ROXL */ +{ op_e1b8_0_comp_nf, 57784, 0x00000000 }, /* ROL */ +{ NULL, 57808, 0x00000000 }, /* ASLW */ +{ NULL, 57816, 0x00000000 }, /* ASLW */ +{ NULL, 57824, 0x00000000 }, /* ASLW */ +{ NULL, 57832, 0x00000000 }, /* ASLW */ +{ NULL, 57840, 0x00000000 }, /* ASLW */ +{ NULL, 57848, 0x00000000 }, /* ASLW */ +{ NULL, 57849, 0x00000000 }, /* ASLW */ +{ NULL, 58064, 0x00000000 }, /* LSRW */ +{ NULL, 58072, 0x00000000 }, /* LSRW */ +{ NULL, 58080, 0x00000000 }, /* LSRW */ +{ NULL, 58088, 0x00000000 }, /* LSRW */ +{ NULL, 58096, 0x00000000 }, /* LSRW */ +{ NULL, 58104, 0x00000000 }, /* LSRW */ +{ NULL, 58105, 0x00000000 }, /* LSRW */ +{ NULL, 58320, 0x00000000 }, /* LSLW */ +{ NULL, 58328, 0x00000000 }, /* LSLW */ +{ NULL, 58336, 0x00000000 }, /* LSLW */ +{ NULL, 58344, 0x00000000 }, /* LSLW */ +{ NULL, 58352, 0x00000000 }, /* LSLW */ +{ NULL, 58360, 0x00000000 }, /* LSLW */ +{ NULL, 58361, 0x00000000 }, /* LSLW */ +{ NULL, 58576, 0x00000000 }, /* ROXRW */ +{ NULL, 58584, 0x00000000 }, /* ROXRW */ +{ NULL, 58592, 0x00000000 }, /* ROXRW */ +{ NULL, 58600, 0x00000000 }, /* ROXRW */ +{ NULL, 58608, 0x00000000 }, /* ROXRW */ +{ NULL, 58616, 0x00000000 }, /* ROXRW */ +{ NULL, 58617, 0x00000000 }, /* ROXRW */ +{ NULL, 58832, 0x00000000 }, /* ROXLW */ +{ NULL, 58840, 0x00000000 }, /* ROXLW */ +{ NULL, 58848, 0x00000000 }, /* ROXLW */ +{ NULL, 58856, 0x00000000 }, /* ROXLW */ +{ NULL, 58864, 0x00000000 }, /* ROXLW */ +{ NULL, 58872, 0x00000000 }, /* ROXLW */ +{ NULL, 58873, 0x00000000 }, /* ROXLW */ +{ NULL, 59088, 0x00000000 }, /* RORW */ +{ NULL, 59096, 0x00000000 }, /* RORW */ +{ NULL, 59104, 0x00000000 }, /* RORW */ +{ NULL, 59112, 0x00000000 }, /* RORW */ +{ NULL, 59120, 0x00000000 }, /* RORW */ +{ NULL, 59128, 0x00000000 }, /* RORW */ +{ NULL, 59129, 0x00000000 }, /* RORW */ +{ NULL, 59344, 0x00000000 }, /* ROLW */ +{ NULL, 59352, 0x00000000 }, /* ROLW */ +{ NULL, 59360, 0x00000000 }, /* ROLW */ +{ NULL, 59368, 0x00000000 }, /* ROLW */ +{ NULL, 59376, 0x00000000 }, /* ROLW */ +{ NULL, 59384, 0x00000000 }, /* ROLW */ +{ NULL, 59385, 0x00000000 }, /* ROLW */ +{ NULL, 59584, 0x00000000 }, /* BFTST */ +{ NULL, 59600, 0x00000000 }, /* BFTST */ +{ NULL, 59624, 0x00000000 }, /* BFTST */ +{ NULL, 59632, 0x00000000 }, /* BFTST */ +{ NULL, 59640, 0x00000000 }, /* BFTST */ +{ NULL, 59641, 0x00000000 }, /* BFTST */ +{ NULL, 59642, 0x00000000 }, /* BFTST */ +{ NULL, 59643, 0x00000000 }, /* BFTST */ +{ NULL, 59840, 0x00000000 }, /* BFEXTU */ +{ NULL, 59856, 0x00000000 }, /* BFEXTU */ +{ NULL, 59880, 0x00000000 }, /* BFEXTU */ +{ NULL, 59888, 0x00000000 }, /* BFEXTU */ +{ NULL, 59896, 0x00000000 }, /* BFEXTU */ +{ NULL, 59897, 0x00000000 }, /* BFEXTU */ +{ NULL, 59898, 0x00000000 }, /* BFEXTU */ +{ NULL, 59899, 0x00000000 }, /* BFEXTU */ +{ NULL, 60096, 0x00000000 }, /* BFCHG */ +{ NULL, 60112, 0x00000000 }, /* BFCHG */ +{ NULL, 60136, 0x00000000 }, /* BFCHG */ +{ NULL, 60144, 0x00000000 }, /* BFCHG */ +{ NULL, 60152, 0x00000000 }, /* BFCHG */ +{ NULL, 60153, 0x00000000 }, /* BFCHG */ +{ NULL, 60352, 0x00000000 }, /* BFEXTS */ +{ NULL, 60368, 0x00000000 }, /* BFEXTS */ +{ NULL, 60392, 0x00000000 }, /* BFEXTS */ +{ NULL, 60400, 0x00000000 }, /* BFEXTS */ +{ NULL, 60408, 0x00000000 }, /* BFEXTS */ +{ NULL, 60409, 0x00000000 }, /* BFEXTS */ +{ NULL, 60410, 0x00000000 }, /* BFEXTS */ +{ NULL, 60411, 0x00000000 }, /* BFEXTS */ +{ NULL, 60608, 0x00000000 }, /* BFCLR */ +{ NULL, 60624, 0x00000000 }, /* BFCLR */ +{ NULL, 60648, 0x00000000 }, /* BFCLR */ +{ NULL, 60656, 0x00000000 }, /* BFCLR */ +{ NULL, 60664, 0x00000000 }, /* BFCLR */ +{ NULL, 60665, 0x00000000 }, /* BFCLR */ +{ NULL, 60864, 0x00000000 }, /* BFFFO */ +{ NULL, 60880, 0x00000000 }, /* BFFFO */ +{ NULL, 60904, 0x00000000 }, /* BFFFO */ +{ NULL, 60912, 0x00000000 }, /* BFFFO */ +{ NULL, 60920, 0x00000000 }, /* BFFFO */ +{ NULL, 60921, 0x00000000 }, /* BFFFO */ +{ NULL, 60922, 0x00000000 }, /* BFFFO */ +{ NULL, 60923, 0x00000000 }, /* BFFFO */ +{ NULL, 61120, 0x00000000 }, /* BFSET */ +{ NULL, 61136, 0x00000000 }, /* BFSET */ +{ NULL, 61160, 0x00000000 }, /* BFSET */ +{ NULL, 61168, 0x00000000 }, /* BFSET */ +{ NULL, 61176, 0x00000000 }, /* BFSET */ +{ NULL, 61177, 0x00000000 }, /* BFSET */ +{ NULL, 61376, 0x00000000 }, /* BFINS */ +{ NULL, 61392, 0x00000000 }, /* BFINS */ +{ NULL, 61416, 0x00000000 }, /* BFINS */ +{ NULL, 61424, 0x00000000 }, /* BFINS */ +{ NULL, 61432, 0x00000000 }, /* BFINS */ +{ NULL, 61433, 0x00000000 }, /* BFINS */ +{ op_f200_0_comp_nf, 61952, 0x00000002 }, /* FPP */ +{ op_f208_0_comp_nf, 61960, 0x00000002 }, /* FPP */ +{ op_f210_0_comp_nf, 61968, 0x00000002 }, /* FPP */ +{ op_f218_0_comp_nf, 61976, 0x00000002 }, /* FPP */ +{ op_f220_0_comp_nf, 61984, 0x00000002 }, /* FPP */ +{ op_f228_0_comp_nf, 61992, 0x00000002 }, /* FPP */ +{ op_f230_0_comp_nf, 62000, 0x00000002 }, /* FPP */ +{ op_f238_0_comp_nf, 62008, 0x00000002 }, /* FPP */ +{ op_f239_0_comp_nf, 62009, 0x00000002 }, /* FPP */ +{ op_f23a_0_comp_nf, 62010, 0x00000002 }, /* FPP */ +{ op_f23b_0_comp_nf, 62011, 0x00000002 }, /* FPP */ +{ op_f23c_0_comp_nf, 62012, 0x00000002 }, /* FPP */ +{ op_f240_0_comp_nf, 62016, 0x00000006 }, /* FScc */ +{ NULL, 62024, 0x00000001 }, /* FDBcc */ +{ op_f250_0_comp_nf, 62032, 0x00000006 }, /* FScc */ +{ op_f258_0_comp_nf, 62040, 0x00000006 }, /* FScc */ +{ op_f260_0_comp_nf, 62048, 0x00000006 }, /* FScc */ +{ op_f268_0_comp_nf, 62056, 0x00000006 }, /* FScc */ +{ op_f270_0_comp_nf, 62064, 0x00000006 }, /* FScc */ +{ op_f278_0_comp_nf, 62072, 0x00000006 }, /* FScc */ +{ op_f279_0_comp_nf, 62073, 0x00000006 }, /* FScc */ +{ NULL, 62074, 0x00000001 }, /* FTRAPcc */ +{ NULL, 62075, 0x00000001 }, /* FTRAPcc */ +{ NULL, 62076, 0x00000001 }, /* FTRAPcc */ +{ op_f280_0_comp_nf, 62080, 0x00000005 }, /* FBcc */ +{ op_f2c0_0_comp_nf, 62144, 0x00000005 }, /* FBcc */ +{ NULL, 62224, 0x00000000 }, /* FSAVE */ +{ NULL, 62240, 0x00000000 }, /* FSAVE */ +{ NULL, 62248, 0x00000000 }, /* FSAVE */ +{ NULL, 62256, 0x00000000 }, /* FSAVE */ +{ NULL, 62264, 0x00000000 }, /* FSAVE */ +{ NULL, 62265, 0x00000000 }, /* FSAVE */ +{ NULL, 62288, 0x00000000 }, /* FRESTORE */ +{ NULL, 62296, 0x00000000 }, /* FRESTORE */ +{ NULL, 62312, 0x00000000 }, /* FRESTORE */ +{ NULL, 62320, 0x00000000 }, /* FRESTORE */ +{ NULL, 62328, 0x00000000 }, /* FRESTORE */ +{ NULL, 62329, 0x00000000 }, /* FRESTORE */ +{ NULL, 62330, 0x00000000 }, /* FRESTORE */ +{ NULL, 62331, 0x00000000 }, /* FRESTORE */ +{ NULL, 62472, 0x00000001 }, /* CINVL */ +{ NULL, 62480, 0x00000001 }, /* CINVP */ +{ NULL, 62488, 0x00000001 }, /* CINVA */ +{ NULL, 62489, 0x00000001 }, /* CINVA */ +{ NULL, 62490, 0x00000001 }, /* CINVA */ +{ NULL, 62491, 0x00000001 }, /* CINVA */ +{ NULL, 62492, 0x00000001 }, /* CINVA */ +{ NULL, 62493, 0x00000001 }, /* CINVA */ +{ NULL, 62494, 0x00000001 }, /* CINVA */ +{ NULL, 62495, 0x00000001 }, /* CINVA */ +{ NULL, 62504, 0x00000001 }, /* CPUSHL */ +{ NULL, 62512, 0x00000001 }, /* CPUSHP */ +{ NULL, 62520, 0x00000001 }, /* CPUSHA */ +{ NULL, 62521, 0x00000001 }, /* CPUSHA */ +{ NULL, 62522, 0x00000001 }, /* CPUSHA */ +{ NULL, 62523, 0x00000001 }, /* CPUSHA */ +{ NULL, 62524, 0x00000001 }, /* CPUSHA */ +{ NULL, 62525, 0x00000001 }, /* CPUSHA */ +{ NULL, 62526, 0x00000001 }, /* CPUSHA */ +{ NULL, 62527, 0x00000001 }, /* CPUSHA */ +{ NULL, 62720, 0x00000001 }, /* MMUOP */ +{ op_f600_0_comp_nf, 62976, 0x00000002 }, /* MOVE16 */ +{ op_f608_0_comp_nf, 62984, 0x00000002 }, /* MOVE16 */ +{ op_f610_0_comp_nf, 62992, 0x00000002 }, /* MOVE16 */ +{ op_f618_0_comp_nf, 63000, 0x00000002 }, /* MOVE16 */ +{ op_f620_0_comp_nf, 63008, 0x00000002 }, /* MOVE16 */ +{ 0, 65536, 0 }}; diff --git a/src/comptbl.h b/src/comptbl.h new file mode 100644 index 0000000..2ac6187 --- /dev/null +++ b/src/comptbl.h @@ -0,0 +1,2825 @@ +extern compop_func op_0_0_comp_ff; +extern compop_func op_10_0_comp_ff; +extern compop_func op_18_0_comp_ff; +extern compop_func op_20_0_comp_ff; +extern compop_func op_28_0_comp_ff; +extern compop_func op_30_0_comp_ff; +extern compop_func op_38_0_comp_ff; +extern compop_func op_39_0_comp_ff; +extern compop_func op_40_0_comp_ff; +extern compop_func op_50_0_comp_ff; +extern compop_func op_58_0_comp_ff; +extern compop_func op_60_0_comp_ff; +extern compop_func op_68_0_comp_ff; +extern compop_func op_70_0_comp_ff; +extern compop_func op_78_0_comp_ff; +extern compop_func op_79_0_comp_ff; +extern compop_func op_80_0_comp_ff; +extern compop_func op_90_0_comp_ff; +extern compop_func op_98_0_comp_ff; +extern compop_func op_a0_0_comp_ff; +extern compop_func op_a8_0_comp_ff; +extern compop_func op_b0_0_comp_ff; +extern compop_func op_b8_0_comp_ff; +extern compop_func op_b9_0_comp_ff; +extern compop_func op_100_0_comp_ff; +extern compop_func op_110_0_comp_ff; +extern compop_func op_118_0_comp_ff; +extern compop_func op_120_0_comp_ff; +extern compop_func op_128_0_comp_ff; +extern compop_func op_130_0_comp_ff; +extern compop_func op_138_0_comp_ff; +extern compop_func op_139_0_comp_ff; +extern compop_func op_13a_0_comp_ff; +extern compop_func op_13b_0_comp_ff; +extern compop_func op_13c_0_comp_ff; +extern compop_func op_140_0_comp_ff; +extern compop_func op_150_0_comp_ff; +extern compop_func op_158_0_comp_ff; +extern compop_func op_160_0_comp_ff; +extern compop_func op_168_0_comp_ff; +extern compop_func op_170_0_comp_ff; +extern compop_func op_178_0_comp_ff; +extern compop_func op_179_0_comp_ff; +extern compop_func op_17a_0_comp_ff; +extern compop_func op_17b_0_comp_ff; +extern compop_func op_180_0_comp_ff; +extern compop_func op_190_0_comp_ff; +extern compop_func op_198_0_comp_ff; +extern compop_func op_1a0_0_comp_ff; +extern compop_func op_1a8_0_comp_ff; +extern compop_func op_1b0_0_comp_ff; +extern compop_func op_1b8_0_comp_ff; +extern compop_func op_1b9_0_comp_ff; +extern compop_func op_1ba_0_comp_ff; +extern compop_func op_1bb_0_comp_ff; +extern compop_func op_1c0_0_comp_ff; +extern compop_func op_1d0_0_comp_ff; +extern compop_func op_1d8_0_comp_ff; +extern compop_func op_1e0_0_comp_ff; +extern compop_func op_1e8_0_comp_ff; +extern compop_func op_1f0_0_comp_ff; +extern compop_func op_1f8_0_comp_ff; +extern compop_func op_1f9_0_comp_ff; +extern compop_func op_1fa_0_comp_ff; +extern compop_func op_1fb_0_comp_ff; +extern compop_func op_200_0_comp_ff; +extern compop_func op_210_0_comp_ff; +extern compop_func op_218_0_comp_ff; +extern compop_func op_220_0_comp_ff; +extern compop_func op_228_0_comp_ff; +extern compop_func op_230_0_comp_ff; +extern compop_func op_238_0_comp_ff; +extern compop_func op_239_0_comp_ff; +extern compop_func op_240_0_comp_ff; +extern compop_func op_250_0_comp_ff; +extern compop_func op_258_0_comp_ff; +extern compop_func op_260_0_comp_ff; +extern compop_func op_268_0_comp_ff; +extern compop_func op_270_0_comp_ff; +extern compop_func op_278_0_comp_ff; +extern compop_func op_279_0_comp_ff; +extern compop_func op_280_0_comp_ff; +extern compop_func op_290_0_comp_ff; +extern compop_func op_298_0_comp_ff; +extern compop_func op_2a0_0_comp_ff; +extern compop_func op_2a8_0_comp_ff; +extern compop_func op_2b0_0_comp_ff; +extern compop_func op_2b8_0_comp_ff; +extern compop_func op_2b9_0_comp_ff; +extern compop_func op_400_0_comp_ff; +extern compop_func op_410_0_comp_ff; +extern compop_func op_418_0_comp_ff; +extern compop_func op_420_0_comp_ff; +extern compop_func op_428_0_comp_ff; +extern compop_func op_430_0_comp_ff; +extern compop_func op_438_0_comp_ff; +extern compop_func op_439_0_comp_ff; +extern compop_func op_440_0_comp_ff; +extern compop_func op_450_0_comp_ff; +extern compop_func op_458_0_comp_ff; +extern compop_func op_460_0_comp_ff; +extern compop_func op_468_0_comp_ff; +extern compop_func op_470_0_comp_ff; +extern compop_func op_478_0_comp_ff; +extern compop_func op_479_0_comp_ff; +extern compop_func op_480_0_comp_ff; +extern compop_func op_490_0_comp_ff; +extern compop_func op_498_0_comp_ff; +extern compop_func op_4a0_0_comp_ff; +extern compop_func op_4a8_0_comp_ff; +extern compop_func op_4b0_0_comp_ff; +extern compop_func op_4b8_0_comp_ff; +extern compop_func op_4b9_0_comp_ff; +extern compop_func op_600_0_comp_ff; +extern compop_func op_610_0_comp_ff; +extern compop_func op_618_0_comp_ff; +extern compop_func op_620_0_comp_ff; +extern compop_func op_628_0_comp_ff; +extern compop_func op_630_0_comp_ff; +extern compop_func op_638_0_comp_ff; +extern compop_func op_639_0_comp_ff; +extern compop_func op_640_0_comp_ff; +extern compop_func op_650_0_comp_ff; +extern compop_func op_658_0_comp_ff; +extern compop_func op_660_0_comp_ff; +extern compop_func op_668_0_comp_ff; +extern compop_func op_670_0_comp_ff; +extern compop_func op_678_0_comp_ff; +extern compop_func op_679_0_comp_ff; +extern compop_func op_680_0_comp_ff; +extern compop_func op_690_0_comp_ff; +extern compop_func op_698_0_comp_ff; +extern compop_func op_6a0_0_comp_ff; +extern compop_func op_6a8_0_comp_ff; +extern compop_func op_6b0_0_comp_ff; +extern compop_func op_6b8_0_comp_ff; +extern compop_func op_6b9_0_comp_ff; +extern compop_func op_800_0_comp_ff; +extern compop_func op_810_0_comp_ff; +extern compop_func op_818_0_comp_ff; +extern compop_func op_820_0_comp_ff; +extern compop_func op_828_0_comp_ff; +extern compop_func op_830_0_comp_ff; +extern compop_func op_838_0_comp_ff; +extern compop_func op_839_0_comp_ff; +extern compop_func op_83a_0_comp_ff; +extern compop_func op_83b_0_comp_ff; +extern compop_func op_83c_0_comp_ff; +extern compop_func op_840_0_comp_ff; +extern compop_func op_850_0_comp_ff; +extern compop_func op_858_0_comp_ff; +extern compop_func op_860_0_comp_ff; +extern compop_func op_868_0_comp_ff; +extern compop_func op_870_0_comp_ff; +extern compop_func op_878_0_comp_ff; +extern compop_func op_879_0_comp_ff; +extern compop_func op_87a_0_comp_ff; +extern compop_func op_87b_0_comp_ff; +extern compop_func op_880_0_comp_ff; +extern compop_func op_890_0_comp_ff; +extern compop_func op_898_0_comp_ff; +extern compop_func op_8a0_0_comp_ff; +extern compop_func op_8a8_0_comp_ff; +extern compop_func op_8b0_0_comp_ff; +extern compop_func op_8b8_0_comp_ff; +extern compop_func op_8b9_0_comp_ff; +extern compop_func op_8ba_0_comp_ff; +extern compop_func op_8bb_0_comp_ff; +extern compop_func op_8c0_0_comp_ff; +extern compop_func op_8d0_0_comp_ff; +extern compop_func op_8d8_0_comp_ff; +extern compop_func op_8e0_0_comp_ff; +extern compop_func op_8e8_0_comp_ff; +extern compop_func op_8f0_0_comp_ff; +extern compop_func op_8f8_0_comp_ff; +extern compop_func op_8f9_0_comp_ff; +extern compop_func op_8fa_0_comp_ff; +extern compop_func op_8fb_0_comp_ff; +extern compop_func op_a00_0_comp_ff; +extern compop_func op_a10_0_comp_ff; +extern compop_func op_a18_0_comp_ff; +extern compop_func op_a20_0_comp_ff; +extern compop_func op_a28_0_comp_ff; +extern compop_func op_a30_0_comp_ff; +extern compop_func op_a38_0_comp_ff; +extern compop_func op_a39_0_comp_ff; +extern compop_func op_a40_0_comp_ff; +extern compop_func op_a50_0_comp_ff; +extern compop_func op_a58_0_comp_ff; +extern compop_func op_a60_0_comp_ff; +extern compop_func op_a68_0_comp_ff; +extern compop_func op_a70_0_comp_ff; +extern compop_func op_a78_0_comp_ff; +extern compop_func op_a79_0_comp_ff; +extern compop_func op_a80_0_comp_ff; +extern compop_func op_a90_0_comp_ff; +extern compop_func op_a98_0_comp_ff; +extern compop_func op_aa0_0_comp_ff; +extern compop_func op_aa8_0_comp_ff; +extern compop_func op_ab0_0_comp_ff; +extern compop_func op_ab8_0_comp_ff; +extern compop_func op_ab9_0_comp_ff; +extern compop_func op_c00_0_comp_ff; +extern compop_func op_c10_0_comp_ff; +extern compop_func op_c18_0_comp_ff; +extern compop_func op_c20_0_comp_ff; +extern compop_func op_c28_0_comp_ff; +extern compop_func op_c30_0_comp_ff; +extern compop_func op_c38_0_comp_ff; +extern compop_func op_c39_0_comp_ff; +extern compop_func op_c3a_0_comp_ff; +extern compop_func op_c3b_0_comp_ff; +extern compop_func op_c40_0_comp_ff; +extern compop_func op_c50_0_comp_ff; +extern compop_func op_c58_0_comp_ff; +extern compop_func op_c60_0_comp_ff; +extern compop_func op_c68_0_comp_ff; +extern compop_func op_c70_0_comp_ff; +extern compop_func op_c78_0_comp_ff; +extern compop_func op_c79_0_comp_ff; +extern compop_func op_c7a_0_comp_ff; +extern compop_func op_c7b_0_comp_ff; +extern compop_func op_c80_0_comp_ff; +extern compop_func op_c90_0_comp_ff; +extern compop_func op_c98_0_comp_ff; +extern compop_func op_ca0_0_comp_ff; +extern compop_func op_ca8_0_comp_ff; +extern compop_func op_cb0_0_comp_ff; +extern compop_func op_cb8_0_comp_ff; +extern compop_func op_cb9_0_comp_ff; +extern compop_func op_cba_0_comp_ff; +extern compop_func op_cbb_0_comp_ff; +extern compop_func op_1000_0_comp_ff; +extern compop_func op_1010_0_comp_ff; +extern compop_func op_1018_0_comp_ff; +extern compop_func op_1020_0_comp_ff; +extern compop_func op_1028_0_comp_ff; +extern compop_func op_1030_0_comp_ff; +extern compop_func op_1038_0_comp_ff; +extern compop_func op_1039_0_comp_ff; +extern compop_func op_103a_0_comp_ff; +extern compop_func op_103b_0_comp_ff; +extern compop_func op_103c_0_comp_ff; +extern compop_func op_1080_0_comp_ff; +extern compop_func op_1090_0_comp_ff; +extern compop_func op_1098_0_comp_ff; +extern compop_func op_10a0_0_comp_ff; +extern compop_func op_10a8_0_comp_ff; +extern compop_func op_10b0_0_comp_ff; +extern compop_func op_10b8_0_comp_ff; +extern compop_func op_10b9_0_comp_ff; +extern compop_func op_10ba_0_comp_ff; +extern compop_func op_10bb_0_comp_ff; +extern compop_func op_10bc_0_comp_ff; +extern compop_func op_10c0_0_comp_ff; +extern compop_func op_10d0_0_comp_ff; +extern compop_func op_10d8_0_comp_ff; +extern compop_func op_10e0_0_comp_ff; +extern compop_func op_10e8_0_comp_ff; +extern compop_func op_10f0_0_comp_ff; +extern compop_func op_10f8_0_comp_ff; +extern compop_func op_10f9_0_comp_ff; +extern compop_func op_10fa_0_comp_ff; +extern compop_func op_10fb_0_comp_ff; +extern compop_func op_10fc_0_comp_ff; +extern compop_func op_1100_0_comp_ff; +extern compop_func op_1110_0_comp_ff; +extern compop_func op_1118_0_comp_ff; +extern compop_func op_1120_0_comp_ff; +extern compop_func op_1128_0_comp_ff; +extern compop_func op_1130_0_comp_ff; +extern compop_func op_1138_0_comp_ff; +extern compop_func op_1139_0_comp_ff; +extern compop_func op_113a_0_comp_ff; +extern compop_func op_113b_0_comp_ff; +extern compop_func op_113c_0_comp_ff; +extern compop_func op_1140_0_comp_ff; +extern compop_func op_1150_0_comp_ff; +extern compop_func op_1158_0_comp_ff; +extern compop_func op_1160_0_comp_ff; +extern compop_func op_1168_0_comp_ff; +extern compop_func op_1170_0_comp_ff; +extern compop_func op_1178_0_comp_ff; +extern compop_func op_1179_0_comp_ff; +extern compop_func op_117a_0_comp_ff; +extern compop_func op_117b_0_comp_ff; +extern compop_func op_117c_0_comp_ff; +extern compop_func op_1180_0_comp_ff; +extern compop_func op_1190_0_comp_ff; +extern compop_func op_1198_0_comp_ff; +extern compop_func op_11a0_0_comp_ff; +extern compop_func op_11a8_0_comp_ff; +extern compop_func op_11b0_0_comp_ff; +extern compop_func op_11b8_0_comp_ff; +extern compop_func op_11b9_0_comp_ff; +extern compop_func op_11ba_0_comp_ff; +extern compop_func op_11bb_0_comp_ff; +extern compop_func op_11bc_0_comp_ff; +extern compop_func op_11c0_0_comp_ff; +extern compop_func op_11d0_0_comp_ff; +extern compop_func op_11d8_0_comp_ff; +extern compop_func op_11e0_0_comp_ff; +extern compop_func op_11e8_0_comp_ff; +extern compop_func op_11f0_0_comp_ff; +extern compop_func op_11f8_0_comp_ff; +extern compop_func op_11f9_0_comp_ff; +extern compop_func op_11fa_0_comp_ff; +extern compop_func op_11fb_0_comp_ff; +extern compop_func op_11fc_0_comp_ff; +extern compop_func op_13c0_0_comp_ff; +extern compop_func op_13d0_0_comp_ff; +extern compop_func op_13d8_0_comp_ff; +extern compop_func op_13e0_0_comp_ff; +extern compop_func op_13e8_0_comp_ff; +extern compop_func op_13f0_0_comp_ff; +extern compop_func op_13f8_0_comp_ff; +extern compop_func op_13f9_0_comp_ff; +extern compop_func op_13fa_0_comp_ff; +extern compop_func op_13fb_0_comp_ff; +extern compop_func op_13fc_0_comp_ff; +extern compop_func op_2000_0_comp_ff; +extern compop_func op_2008_0_comp_ff; +extern compop_func op_2010_0_comp_ff; +extern compop_func op_2018_0_comp_ff; +extern compop_func op_2020_0_comp_ff; +extern compop_func op_2028_0_comp_ff; +extern compop_func op_2030_0_comp_ff; +extern compop_func op_2038_0_comp_ff; +extern compop_func op_2039_0_comp_ff; +extern compop_func op_203a_0_comp_ff; +extern compop_func op_203b_0_comp_ff; +extern compop_func op_203c_0_comp_ff; +extern compop_func op_2040_0_comp_ff; +extern compop_func op_2048_0_comp_ff; +extern compop_func op_2050_0_comp_ff; +extern compop_func op_2058_0_comp_ff; +extern compop_func op_2060_0_comp_ff; +extern compop_func op_2068_0_comp_ff; +extern compop_func op_2070_0_comp_ff; +extern compop_func op_2078_0_comp_ff; +extern compop_func op_2079_0_comp_ff; +extern compop_func op_207a_0_comp_ff; +extern compop_func op_207b_0_comp_ff; +extern compop_func op_207c_0_comp_ff; +extern compop_func op_2080_0_comp_ff; +extern compop_func op_2088_0_comp_ff; +extern compop_func op_2090_0_comp_ff; +extern compop_func op_2098_0_comp_ff; +extern compop_func op_20a0_0_comp_ff; +extern compop_func op_20a8_0_comp_ff; +extern compop_func op_20b0_0_comp_ff; +extern compop_func op_20b8_0_comp_ff; +extern compop_func op_20b9_0_comp_ff; +extern compop_func op_20ba_0_comp_ff; +extern compop_func op_20bb_0_comp_ff; +extern compop_func op_20bc_0_comp_ff; +extern compop_func op_20c0_0_comp_ff; +extern compop_func op_20c8_0_comp_ff; +extern compop_func op_20d0_0_comp_ff; +extern compop_func op_20d8_0_comp_ff; +extern compop_func op_20e0_0_comp_ff; +extern compop_func op_20e8_0_comp_ff; +extern compop_func op_20f0_0_comp_ff; +extern compop_func op_20f8_0_comp_ff; +extern compop_func op_20f9_0_comp_ff; +extern compop_func op_20fa_0_comp_ff; +extern compop_func op_20fb_0_comp_ff; +extern compop_func op_20fc_0_comp_ff; +extern compop_func op_2100_0_comp_ff; +extern compop_func op_2108_0_comp_ff; +extern compop_func op_2110_0_comp_ff; +extern compop_func op_2118_0_comp_ff; +extern compop_func op_2120_0_comp_ff; +extern compop_func op_2128_0_comp_ff; +extern compop_func op_2130_0_comp_ff; +extern compop_func op_2138_0_comp_ff; +extern compop_func op_2139_0_comp_ff; +extern compop_func op_213a_0_comp_ff; +extern compop_func op_213b_0_comp_ff; +extern compop_func op_213c_0_comp_ff; +extern compop_func op_2140_0_comp_ff; +extern compop_func op_2148_0_comp_ff; +extern compop_func op_2150_0_comp_ff; +extern compop_func op_2158_0_comp_ff; +extern compop_func op_2160_0_comp_ff; +extern compop_func op_2168_0_comp_ff; +extern compop_func op_2170_0_comp_ff; +extern compop_func op_2178_0_comp_ff; +extern compop_func op_2179_0_comp_ff; +extern compop_func op_217a_0_comp_ff; +extern compop_func op_217b_0_comp_ff; +extern compop_func op_217c_0_comp_ff; +extern compop_func op_2180_0_comp_ff; +extern compop_func op_2188_0_comp_ff; +extern compop_func op_2190_0_comp_ff; +extern compop_func op_2198_0_comp_ff; +extern compop_func op_21a0_0_comp_ff; +extern compop_func op_21a8_0_comp_ff; +extern compop_func op_21b0_0_comp_ff; +extern compop_func op_21b8_0_comp_ff; +extern compop_func op_21b9_0_comp_ff; +extern compop_func op_21ba_0_comp_ff; +extern compop_func op_21bb_0_comp_ff; +extern compop_func op_21bc_0_comp_ff; +extern compop_func op_21c0_0_comp_ff; +extern compop_func op_21c8_0_comp_ff; +extern compop_func op_21d0_0_comp_ff; +extern compop_func op_21d8_0_comp_ff; +extern compop_func op_21e0_0_comp_ff; +extern compop_func op_21e8_0_comp_ff; +extern compop_func op_21f0_0_comp_ff; +extern compop_func op_21f8_0_comp_ff; +extern compop_func op_21f9_0_comp_ff; +extern compop_func op_21fa_0_comp_ff; +extern compop_func op_21fb_0_comp_ff; +extern compop_func op_21fc_0_comp_ff; +extern compop_func op_23c0_0_comp_ff; +extern compop_func op_23c8_0_comp_ff; +extern compop_func op_23d0_0_comp_ff; +extern compop_func op_23d8_0_comp_ff; +extern compop_func op_23e0_0_comp_ff; +extern compop_func op_23e8_0_comp_ff; +extern compop_func op_23f0_0_comp_ff; +extern compop_func op_23f8_0_comp_ff; +extern compop_func op_23f9_0_comp_ff; +extern compop_func op_23fa_0_comp_ff; +extern compop_func op_23fb_0_comp_ff; +extern compop_func op_23fc_0_comp_ff; +extern compop_func op_3000_0_comp_ff; +extern compop_func op_3008_0_comp_ff; +extern compop_func op_3010_0_comp_ff; +extern compop_func op_3018_0_comp_ff; +extern compop_func op_3020_0_comp_ff; +extern compop_func op_3028_0_comp_ff; +extern compop_func op_3030_0_comp_ff; +extern compop_func op_3038_0_comp_ff; +extern compop_func op_3039_0_comp_ff; +extern compop_func op_303a_0_comp_ff; +extern compop_func op_303b_0_comp_ff; +extern compop_func op_303c_0_comp_ff; +extern compop_func op_3040_0_comp_ff; +extern compop_func op_3048_0_comp_ff; +extern compop_func op_3050_0_comp_ff; +extern compop_func op_3058_0_comp_ff; +extern compop_func op_3060_0_comp_ff; +extern compop_func op_3068_0_comp_ff; +extern compop_func op_3070_0_comp_ff; +extern compop_func op_3078_0_comp_ff; +extern compop_func op_3079_0_comp_ff; +extern compop_func op_307a_0_comp_ff; +extern compop_func op_307b_0_comp_ff; +extern compop_func op_307c_0_comp_ff; +extern compop_func op_3080_0_comp_ff; +extern compop_func op_3088_0_comp_ff; +extern compop_func op_3090_0_comp_ff; +extern compop_func op_3098_0_comp_ff; +extern compop_func op_30a0_0_comp_ff; +extern compop_func op_30a8_0_comp_ff; +extern compop_func op_30b0_0_comp_ff; +extern compop_func op_30b8_0_comp_ff; +extern compop_func op_30b9_0_comp_ff; +extern compop_func op_30ba_0_comp_ff; +extern compop_func op_30bb_0_comp_ff; +extern compop_func op_30bc_0_comp_ff; +extern compop_func op_30c0_0_comp_ff; +extern compop_func op_30c8_0_comp_ff; +extern compop_func op_30d0_0_comp_ff; +extern compop_func op_30d8_0_comp_ff; +extern compop_func op_30e0_0_comp_ff; +extern compop_func op_30e8_0_comp_ff; +extern compop_func op_30f0_0_comp_ff; +extern compop_func op_30f8_0_comp_ff; +extern compop_func op_30f9_0_comp_ff; +extern compop_func op_30fa_0_comp_ff; +extern compop_func op_30fb_0_comp_ff; +extern compop_func op_30fc_0_comp_ff; +extern compop_func op_3100_0_comp_ff; +extern compop_func op_3108_0_comp_ff; +extern compop_func op_3110_0_comp_ff; +extern compop_func op_3118_0_comp_ff; +extern compop_func op_3120_0_comp_ff; +extern compop_func op_3128_0_comp_ff; +extern compop_func op_3130_0_comp_ff; +extern compop_func op_3138_0_comp_ff; +extern compop_func op_3139_0_comp_ff; +extern compop_func op_313a_0_comp_ff; +extern compop_func op_313b_0_comp_ff; +extern compop_func op_313c_0_comp_ff; +extern compop_func op_3140_0_comp_ff; +extern compop_func op_3148_0_comp_ff; +extern compop_func op_3150_0_comp_ff; +extern compop_func op_3158_0_comp_ff; +extern compop_func op_3160_0_comp_ff; +extern compop_func op_3168_0_comp_ff; +extern compop_func op_3170_0_comp_ff; +extern compop_func op_3178_0_comp_ff; +extern compop_func op_3179_0_comp_ff; +extern compop_func op_317a_0_comp_ff; +extern compop_func op_317b_0_comp_ff; +extern compop_func op_317c_0_comp_ff; +extern compop_func op_3180_0_comp_ff; +extern compop_func op_3188_0_comp_ff; +extern compop_func op_3190_0_comp_ff; +extern compop_func op_3198_0_comp_ff; +extern compop_func op_31a0_0_comp_ff; +extern compop_func op_31a8_0_comp_ff; +extern compop_func op_31b0_0_comp_ff; +extern compop_func op_31b8_0_comp_ff; +extern compop_func op_31b9_0_comp_ff; +extern compop_func op_31ba_0_comp_ff; +extern compop_func op_31bb_0_comp_ff; +extern compop_func op_31bc_0_comp_ff; +extern compop_func op_31c0_0_comp_ff; +extern compop_func op_31c8_0_comp_ff; +extern compop_func op_31d0_0_comp_ff; +extern compop_func op_31d8_0_comp_ff; +extern compop_func op_31e0_0_comp_ff; +extern compop_func op_31e8_0_comp_ff; +extern compop_func op_31f0_0_comp_ff; +extern compop_func op_31f8_0_comp_ff; +extern compop_func op_31f9_0_comp_ff; +extern compop_func op_31fa_0_comp_ff; +extern compop_func op_31fb_0_comp_ff; +extern compop_func op_31fc_0_comp_ff; +extern compop_func op_33c0_0_comp_ff; +extern compop_func op_33c8_0_comp_ff; +extern compop_func op_33d0_0_comp_ff; +extern compop_func op_33d8_0_comp_ff; +extern compop_func op_33e0_0_comp_ff; +extern compop_func op_33e8_0_comp_ff; +extern compop_func op_33f0_0_comp_ff; +extern compop_func op_33f8_0_comp_ff; +extern compop_func op_33f9_0_comp_ff; +extern compop_func op_33fa_0_comp_ff; +extern compop_func op_33fb_0_comp_ff; +extern compop_func op_33fc_0_comp_ff; +extern compop_func op_4000_0_comp_ff; +extern compop_func op_4010_0_comp_ff; +extern compop_func op_4018_0_comp_ff; +extern compop_func op_4020_0_comp_ff; +extern compop_func op_4028_0_comp_ff; +extern compop_func op_4030_0_comp_ff; +extern compop_func op_4038_0_comp_ff; +extern compop_func op_4039_0_comp_ff; +extern compop_func op_4040_0_comp_ff; +extern compop_func op_4050_0_comp_ff; +extern compop_func op_4058_0_comp_ff; +extern compop_func op_4060_0_comp_ff; +extern compop_func op_4068_0_comp_ff; +extern compop_func op_4070_0_comp_ff; +extern compop_func op_4078_0_comp_ff; +extern compop_func op_4079_0_comp_ff; +extern compop_func op_4080_0_comp_ff; +extern compop_func op_4090_0_comp_ff; +extern compop_func op_4098_0_comp_ff; +extern compop_func op_40a0_0_comp_ff; +extern compop_func op_40a8_0_comp_ff; +extern compop_func op_40b0_0_comp_ff; +extern compop_func op_40b8_0_comp_ff; +extern compop_func op_40b9_0_comp_ff; +extern compop_func op_41d0_0_comp_ff; +extern compop_func op_41e8_0_comp_ff; +extern compop_func op_41f0_0_comp_ff; +extern compop_func op_41f8_0_comp_ff; +extern compop_func op_41f9_0_comp_ff; +extern compop_func op_41fa_0_comp_ff; +extern compop_func op_41fb_0_comp_ff; +extern compop_func op_4200_0_comp_ff; +extern compop_func op_4210_0_comp_ff; +extern compop_func op_4218_0_comp_ff; +extern compop_func op_4220_0_comp_ff; +extern compop_func op_4228_0_comp_ff; +extern compop_func op_4230_0_comp_ff; +extern compop_func op_4238_0_comp_ff; +extern compop_func op_4239_0_comp_ff; +extern compop_func op_4240_0_comp_ff; +extern compop_func op_4250_0_comp_ff; +extern compop_func op_4258_0_comp_ff; +extern compop_func op_4260_0_comp_ff; +extern compop_func op_4268_0_comp_ff; +extern compop_func op_4270_0_comp_ff; +extern compop_func op_4278_0_comp_ff; +extern compop_func op_4279_0_comp_ff; +extern compop_func op_4280_0_comp_ff; +extern compop_func op_4290_0_comp_ff; +extern compop_func op_4298_0_comp_ff; +extern compop_func op_42a0_0_comp_ff; +extern compop_func op_42a8_0_comp_ff; +extern compop_func op_42b0_0_comp_ff; +extern compop_func op_42b8_0_comp_ff; +extern compop_func op_42b9_0_comp_ff; +extern compop_func op_4400_0_comp_ff; +extern compop_func op_4410_0_comp_ff; +extern compop_func op_4418_0_comp_ff; +extern compop_func op_4420_0_comp_ff; +extern compop_func op_4428_0_comp_ff; +extern compop_func op_4430_0_comp_ff; +extern compop_func op_4438_0_comp_ff; +extern compop_func op_4439_0_comp_ff; +extern compop_func op_4440_0_comp_ff; +extern compop_func op_4450_0_comp_ff; +extern compop_func op_4458_0_comp_ff; +extern compop_func op_4460_0_comp_ff; +extern compop_func op_4468_0_comp_ff; +extern compop_func op_4470_0_comp_ff; +extern compop_func op_4478_0_comp_ff; +extern compop_func op_4479_0_comp_ff; +extern compop_func op_4480_0_comp_ff; +extern compop_func op_4490_0_comp_ff; +extern compop_func op_4498_0_comp_ff; +extern compop_func op_44a0_0_comp_ff; +extern compop_func op_44a8_0_comp_ff; +extern compop_func op_44b0_0_comp_ff; +extern compop_func op_44b8_0_comp_ff; +extern compop_func op_44b9_0_comp_ff; +extern compop_func op_4600_0_comp_ff; +extern compop_func op_4610_0_comp_ff; +extern compop_func op_4618_0_comp_ff; +extern compop_func op_4620_0_comp_ff; +extern compop_func op_4628_0_comp_ff; +extern compop_func op_4630_0_comp_ff; +extern compop_func op_4638_0_comp_ff; +extern compop_func op_4639_0_comp_ff; +extern compop_func op_4640_0_comp_ff; +extern compop_func op_4650_0_comp_ff; +extern compop_func op_4658_0_comp_ff; +extern compop_func op_4660_0_comp_ff; +extern compop_func op_4668_0_comp_ff; +extern compop_func op_4670_0_comp_ff; +extern compop_func op_4678_0_comp_ff; +extern compop_func op_4679_0_comp_ff; +extern compop_func op_4680_0_comp_ff; +extern compop_func op_4690_0_comp_ff; +extern compop_func op_4698_0_comp_ff; +extern compop_func op_46a0_0_comp_ff; +extern compop_func op_46a8_0_comp_ff; +extern compop_func op_46b0_0_comp_ff; +extern compop_func op_46b8_0_comp_ff; +extern compop_func op_46b9_0_comp_ff; +extern compop_func op_4808_0_comp_ff; +extern compop_func op_4840_0_comp_ff; +extern compop_func op_4850_0_comp_ff; +extern compop_func op_4868_0_comp_ff; +extern compop_func op_4870_0_comp_ff; +extern compop_func op_4878_0_comp_ff; +extern compop_func op_4879_0_comp_ff; +extern compop_func op_487a_0_comp_ff; +extern compop_func op_487b_0_comp_ff; +extern compop_func op_4880_0_comp_ff; +extern compop_func op_4890_0_comp_ff; +extern compop_func op_48a0_0_comp_ff; +extern compop_func op_48a8_0_comp_ff; +extern compop_func op_48b0_0_comp_ff; +extern compop_func op_48b8_0_comp_ff; +extern compop_func op_48b9_0_comp_ff; +extern compop_func op_48c0_0_comp_ff; +extern compop_func op_48d0_0_comp_ff; +extern compop_func op_48e0_0_comp_ff; +extern compop_func op_48e8_0_comp_ff; +extern compop_func op_48f0_0_comp_ff; +extern compop_func op_48f8_0_comp_ff; +extern compop_func op_48f9_0_comp_ff; +extern compop_func op_49c0_0_comp_ff; +extern compop_func op_4a00_0_comp_ff; +extern compop_func op_4a10_0_comp_ff; +extern compop_func op_4a18_0_comp_ff; +extern compop_func op_4a20_0_comp_ff; +extern compop_func op_4a28_0_comp_ff; +extern compop_func op_4a30_0_comp_ff; +extern compop_func op_4a38_0_comp_ff; +extern compop_func op_4a39_0_comp_ff; +extern compop_func op_4a3a_0_comp_ff; +extern compop_func op_4a3b_0_comp_ff; +extern compop_func op_4a3c_0_comp_ff; +extern compop_func op_4a40_0_comp_ff; +extern compop_func op_4a48_0_comp_ff; +extern compop_func op_4a50_0_comp_ff; +extern compop_func op_4a58_0_comp_ff; +extern compop_func op_4a60_0_comp_ff; +extern compop_func op_4a68_0_comp_ff; +extern compop_func op_4a70_0_comp_ff; +extern compop_func op_4a78_0_comp_ff; +extern compop_func op_4a79_0_comp_ff; +extern compop_func op_4a7a_0_comp_ff; +extern compop_func op_4a7b_0_comp_ff; +extern compop_func op_4a7c_0_comp_ff; +extern compop_func op_4a80_0_comp_ff; +extern compop_func op_4a88_0_comp_ff; +extern compop_func op_4a90_0_comp_ff; +extern compop_func op_4a98_0_comp_ff; +extern compop_func op_4aa0_0_comp_ff; +extern compop_func op_4aa8_0_comp_ff; +extern compop_func op_4ab0_0_comp_ff; +extern compop_func op_4ab8_0_comp_ff; +extern compop_func op_4ab9_0_comp_ff; +extern compop_func op_4aba_0_comp_ff; +extern compop_func op_4abb_0_comp_ff; +extern compop_func op_4abc_0_comp_ff; +extern compop_func op_4c90_0_comp_ff; +extern compop_func op_4c98_0_comp_ff; +extern compop_func op_4ca8_0_comp_ff; +extern compop_func op_4cb0_0_comp_ff; +extern compop_func op_4cb8_0_comp_ff; +extern compop_func op_4cb9_0_comp_ff; +extern compop_func op_4cba_0_comp_ff; +extern compop_func op_4cbb_0_comp_ff; +extern compop_func op_4cd0_0_comp_ff; +extern compop_func op_4cd8_0_comp_ff; +extern compop_func op_4ce8_0_comp_ff; +extern compop_func op_4cf0_0_comp_ff; +extern compop_func op_4cf8_0_comp_ff; +extern compop_func op_4cf9_0_comp_ff; +extern compop_func op_4cfa_0_comp_ff; +extern compop_func op_4cfb_0_comp_ff; +extern compop_func op_4e50_0_comp_ff; +extern compop_func op_4e58_0_comp_ff; +extern compop_func op_4e71_0_comp_ff; +extern compop_func op_4e74_0_comp_ff; +extern compop_func op_4e75_0_comp_ff; +extern compop_func op_4e90_0_comp_ff; +extern compop_func op_4ea8_0_comp_ff; +extern compop_func op_4eb0_0_comp_ff; +extern compop_func op_4eb8_0_comp_ff; +extern compop_func op_4eb9_0_comp_ff; +extern compop_func op_4eba_0_comp_ff; +extern compop_func op_4ebb_0_comp_ff; +extern compop_func op_4ed0_0_comp_ff; +extern compop_func op_4ee8_0_comp_ff; +extern compop_func op_4ef0_0_comp_ff; +extern compop_func op_4ef8_0_comp_ff; +extern compop_func op_4ef9_0_comp_ff; +extern compop_func op_4efa_0_comp_ff; +extern compop_func op_4efb_0_comp_ff; +extern compop_func op_5000_0_comp_ff; +extern compop_func op_5010_0_comp_ff; +extern compop_func op_5018_0_comp_ff; +extern compop_func op_5020_0_comp_ff; +extern compop_func op_5028_0_comp_ff; +extern compop_func op_5030_0_comp_ff; +extern compop_func op_5038_0_comp_ff; +extern compop_func op_5039_0_comp_ff; +extern compop_func op_5040_0_comp_ff; +extern compop_func op_5048_0_comp_ff; +extern compop_func op_5050_0_comp_ff; +extern compop_func op_5058_0_comp_ff; +extern compop_func op_5060_0_comp_ff; +extern compop_func op_5068_0_comp_ff; +extern compop_func op_5070_0_comp_ff; +extern compop_func op_5078_0_comp_ff; +extern compop_func op_5079_0_comp_ff; +extern compop_func op_5080_0_comp_ff; +extern compop_func op_5088_0_comp_ff; +extern compop_func op_5090_0_comp_ff; +extern compop_func op_5098_0_comp_ff; +extern compop_func op_50a0_0_comp_ff; +extern compop_func op_50a8_0_comp_ff; +extern compop_func op_50b0_0_comp_ff; +extern compop_func op_50b8_0_comp_ff; +extern compop_func op_50b9_0_comp_ff; +extern compop_func op_50c0_0_comp_ff; +extern compop_func op_50c8_0_comp_ff; +extern compop_func op_50d0_0_comp_ff; +extern compop_func op_50d8_0_comp_ff; +extern compop_func op_50e0_0_comp_ff; +extern compop_func op_50e8_0_comp_ff; +extern compop_func op_50f0_0_comp_ff; +extern compop_func op_50f8_0_comp_ff; +extern compop_func op_50f9_0_comp_ff; +extern compop_func op_5100_0_comp_ff; +extern compop_func op_5110_0_comp_ff; +extern compop_func op_5118_0_comp_ff; +extern compop_func op_5120_0_comp_ff; +extern compop_func op_5128_0_comp_ff; +extern compop_func op_5130_0_comp_ff; +extern compop_func op_5138_0_comp_ff; +extern compop_func op_5139_0_comp_ff; +extern compop_func op_5140_0_comp_ff; +extern compop_func op_5148_0_comp_ff; +extern compop_func op_5150_0_comp_ff; +extern compop_func op_5158_0_comp_ff; +extern compop_func op_5160_0_comp_ff; +extern compop_func op_5168_0_comp_ff; +extern compop_func op_5170_0_comp_ff; +extern compop_func op_5178_0_comp_ff; +extern compop_func op_5179_0_comp_ff; +extern compop_func op_5180_0_comp_ff; +extern compop_func op_5188_0_comp_ff; +extern compop_func op_5190_0_comp_ff; +extern compop_func op_5198_0_comp_ff; +extern compop_func op_51a0_0_comp_ff; +extern compop_func op_51a8_0_comp_ff; +extern compop_func op_51b0_0_comp_ff; +extern compop_func op_51b8_0_comp_ff; +extern compop_func op_51b9_0_comp_ff; +extern compop_func op_51c0_0_comp_ff; +extern compop_func op_51c8_0_comp_ff; +extern compop_func op_51d0_0_comp_ff; +extern compop_func op_51d8_0_comp_ff; +extern compop_func op_51e0_0_comp_ff; +extern compop_func op_51e8_0_comp_ff; +extern compop_func op_51f0_0_comp_ff; +extern compop_func op_51f8_0_comp_ff; +extern compop_func op_51f9_0_comp_ff; +extern compop_func op_52c0_0_comp_ff; +extern compop_func op_52c8_0_comp_ff; +extern compop_func op_52d0_0_comp_ff; +extern compop_func op_52d8_0_comp_ff; +extern compop_func op_52e0_0_comp_ff; +extern compop_func op_52e8_0_comp_ff; +extern compop_func op_52f0_0_comp_ff; +extern compop_func op_52f8_0_comp_ff; +extern compop_func op_52f9_0_comp_ff; +extern compop_func op_53c0_0_comp_ff; +extern compop_func op_53c8_0_comp_ff; +extern compop_func op_53d0_0_comp_ff; +extern compop_func op_53d8_0_comp_ff; +extern compop_func op_53e0_0_comp_ff; +extern compop_func op_53e8_0_comp_ff; +extern compop_func op_53f0_0_comp_ff; +extern compop_func op_53f8_0_comp_ff; +extern compop_func op_53f9_0_comp_ff; +extern compop_func op_54c0_0_comp_ff; +extern compop_func op_54c8_0_comp_ff; +extern compop_func op_54d0_0_comp_ff; +extern compop_func op_54d8_0_comp_ff; +extern compop_func op_54e0_0_comp_ff; +extern compop_func op_54e8_0_comp_ff; +extern compop_func op_54f0_0_comp_ff; +extern compop_func op_54f8_0_comp_ff; +extern compop_func op_54f9_0_comp_ff; +extern compop_func op_55c0_0_comp_ff; +extern compop_func op_55c8_0_comp_ff; +extern compop_func op_55d0_0_comp_ff; +extern compop_func op_55d8_0_comp_ff; +extern compop_func op_55e0_0_comp_ff; +extern compop_func op_55e8_0_comp_ff; +extern compop_func op_55f0_0_comp_ff; +extern compop_func op_55f8_0_comp_ff; +extern compop_func op_55f9_0_comp_ff; +extern compop_func op_56c0_0_comp_ff; +extern compop_func op_56c8_0_comp_ff; +extern compop_func op_56d0_0_comp_ff; +extern compop_func op_56d8_0_comp_ff; +extern compop_func op_56e0_0_comp_ff; +extern compop_func op_56e8_0_comp_ff; +extern compop_func op_56f0_0_comp_ff; +extern compop_func op_56f8_0_comp_ff; +extern compop_func op_56f9_0_comp_ff; +extern compop_func op_57c0_0_comp_ff; +extern compop_func op_57c8_0_comp_ff; +extern compop_func op_57d0_0_comp_ff; +extern compop_func op_57d8_0_comp_ff; +extern compop_func op_57e0_0_comp_ff; +extern compop_func op_57e8_0_comp_ff; +extern compop_func op_57f0_0_comp_ff; +extern compop_func op_57f8_0_comp_ff; +extern compop_func op_57f9_0_comp_ff; +extern compop_func op_5ac0_0_comp_ff; +extern compop_func op_5ac8_0_comp_ff; +extern compop_func op_5ad0_0_comp_ff; +extern compop_func op_5ad8_0_comp_ff; +extern compop_func op_5ae0_0_comp_ff; +extern compop_func op_5ae8_0_comp_ff; +extern compop_func op_5af0_0_comp_ff; +extern compop_func op_5af8_0_comp_ff; +extern compop_func op_5af9_0_comp_ff; +extern compop_func op_5bc0_0_comp_ff; +extern compop_func op_5bc8_0_comp_ff; +extern compop_func op_5bd0_0_comp_ff; +extern compop_func op_5bd8_0_comp_ff; +extern compop_func op_5be0_0_comp_ff; +extern compop_func op_5be8_0_comp_ff; +extern compop_func op_5bf0_0_comp_ff; +extern compop_func op_5bf8_0_comp_ff; +extern compop_func op_5bf9_0_comp_ff; +extern compop_func op_5cc0_0_comp_ff; +extern compop_func op_5cc8_0_comp_ff; +extern compop_func op_5cd0_0_comp_ff; +extern compop_func op_5cd8_0_comp_ff; +extern compop_func op_5ce0_0_comp_ff; +extern compop_func op_5ce8_0_comp_ff; +extern compop_func op_5cf0_0_comp_ff; +extern compop_func op_5cf8_0_comp_ff; +extern compop_func op_5cf9_0_comp_ff; +extern compop_func op_5dc0_0_comp_ff; +extern compop_func op_5dc8_0_comp_ff; +extern compop_func op_5dd0_0_comp_ff; +extern compop_func op_5dd8_0_comp_ff; +extern compop_func op_5de0_0_comp_ff; +extern compop_func op_5de8_0_comp_ff; +extern compop_func op_5df0_0_comp_ff; +extern compop_func op_5df8_0_comp_ff; +extern compop_func op_5df9_0_comp_ff; +extern compop_func op_5ec0_0_comp_ff; +extern compop_func op_5ec8_0_comp_ff; +extern compop_func op_5ed0_0_comp_ff; +extern compop_func op_5ed8_0_comp_ff; +extern compop_func op_5ee0_0_comp_ff; +extern compop_func op_5ee8_0_comp_ff; +extern compop_func op_5ef0_0_comp_ff; +extern compop_func op_5ef8_0_comp_ff; +extern compop_func op_5ef9_0_comp_ff; +extern compop_func op_5fc0_0_comp_ff; +extern compop_func op_5fc8_0_comp_ff; +extern compop_func op_5fd0_0_comp_ff; +extern compop_func op_5fd8_0_comp_ff; +extern compop_func op_5fe0_0_comp_ff; +extern compop_func op_5fe8_0_comp_ff; +extern compop_func op_5ff0_0_comp_ff; +extern compop_func op_5ff8_0_comp_ff; +extern compop_func op_5ff9_0_comp_ff; +extern compop_func op_6000_0_comp_ff; +extern compop_func op_6001_0_comp_ff; +extern compop_func op_60ff_0_comp_ff; +extern compop_func op_6100_0_comp_ff; +extern compop_func op_6101_0_comp_ff; +extern compop_func op_6200_0_comp_ff; +extern compop_func op_6201_0_comp_ff; +extern compop_func op_62ff_0_comp_ff; +extern compop_func op_6300_0_comp_ff; +extern compop_func op_6301_0_comp_ff; +extern compop_func op_63ff_0_comp_ff; +extern compop_func op_6400_0_comp_ff; +extern compop_func op_6401_0_comp_ff; +extern compop_func op_64ff_0_comp_ff; +extern compop_func op_6500_0_comp_ff; +extern compop_func op_6501_0_comp_ff; +extern compop_func op_65ff_0_comp_ff; +extern compop_func op_6600_0_comp_ff; +extern compop_func op_6601_0_comp_ff; +extern compop_func op_66ff_0_comp_ff; +extern compop_func op_6700_0_comp_ff; +extern compop_func op_6701_0_comp_ff; +extern compop_func op_67ff_0_comp_ff; +extern compop_func op_6a00_0_comp_ff; +extern compop_func op_6a01_0_comp_ff; +extern compop_func op_6aff_0_comp_ff; +extern compop_func op_6b00_0_comp_ff; +extern compop_func op_6b01_0_comp_ff; +extern compop_func op_6bff_0_comp_ff; +extern compop_func op_6c00_0_comp_ff; +extern compop_func op_6c01_0_comp_ff; +extern compop_func op_6cff_0_comp_ff; +extern compop_func op_6d00_0_comp_ff; +extern compop_func op_6d01_0_comp_ff; +extern compop_func op_6dff_0_comp_ff; +extern compop_func op_6e00_0_comp_ff; +extern compop_func op_6e01_0_comp_ff; +extern compop_func op_6eff_0_comp_ff; +extern compop_func op_6f00_0_comp_ff; +extern compop_func op_6f01_0_comp_ff; +extern compop_func op_6fff_0_comp_ff; +extern compop_func op_7000_0_comp_ff; +extern compop_func op_8000_0_comp_ff; +extern compop_func op_8010_0_comp_ff; +extern compop_func op_8018_0_comp_ff; +extern compop_func op_8020_0_comp_ff; +extern compop_func op_8028_0_comp_ff; +extern compop_func op_8030_0_comp_ff; +extern compop_func op_8038_0_comp_ff; +extern compop_func op_8039_0_comp_ff; +extern compop_func op_803a_0_comp_ff; +extern compop_func op_803b_0_comp_ff; +extern compop_func op_803c_0_comp_ff; +extern compop_func op_8040_0_comp_ff; +extern compop_func op_8050_0_comp_ff; +extern compop_func op_8058_0_comp_ff; +extern compop_func op_8060_0_comp_ff; +extern compop_func op_8068_0_comp_ff; +extern compop_func op_8070_0_comp_ff; +extern compop_func op_8078_0_comp_ff; +extern compop_func op_8079_0_comp_ff; +extern compop_func op_807a_0_comp_ff; +extern compop_func op_807b_0_comp_ff; +extern compop_func op_807c_0_comp_ff; +extern compop_func op_8080_0_comp_ff; +extern compop_func op_8090_0_comp_ff; +extern compop_func op_8098_0_comp_ff; +extern compop_func op_80a0_0_comp_ff; +extern compop_func op_80a8_0_comp_ff; +extern compop_func op_80b0_0_comp_ff; +extern compop_func op_80b8_0_comp_ff; +extern compop_func op_80b9_0_comp_ff; +extern compop_func op_80ba_0_comp_ff; +extern compop_func op_80bb_0_comp_ff; +extern compop_func op_80bc_0_comp_ff; +extern compop_func op_8110_0_comp_ff; +extern compop_func op_8118_0_comp_ff; +extern compop_func op_8120_0_comp_ff; +extern compop_func op_8128_0_comp_ff; +extern compop_func op_8130_0_comp_ff; +extern compop_func op_8138_0_comp_ff; +extern compop_func op_8139_0_comp_ff; +extern compop_func op_8150_0_comp_ff; +extern compop_func op_8158_0_comp_ff; +extern compop_func op_8160_0_comp_ff; +extern compop_func op_8168_0_comp_ff; +extern compop_func op_8170_0_comp_ff; +extern compop_func op_8178_0_comp_ff; +extern compop_func op_8179_0_comp_ff; +extern compop_func op_8190_0_comp_ff; +extern compop_func op_8198_0_comp_ff; +extern compop_func op_81a0_0_comp_ff; +extern compop_func op_81a8_0_comp_ff; +extern compop_func op_81b0_0_comp_ff; +extern compop_func op_81b8_0_comp_ff; +extern compop_func op_81b9_0_comp_ff; +extern compop_func op_9000_0_comp_ff; +extern compop_func op_9010_0_comp_ff; +extern compop_func op_9018_0_comp_ff; +extern compop_func op_9020_0_comp_ff; +extern compop_func op_9028_0_comp_ff; +extern compop_func op_9030_0_comp_ff; +extern compop_func op_9038_0_comp_ff; +extern compop_func op_9039_0_comp_ff; +extern compop_func op_903a_0_comp_ff; +extern compop_func op_903b_0_comp_ff; +extern compop_func op_903c_0_comp_ff; +extern compop_func op_9040_0_comp_ff; +extern compop_func op_9048_0_comp_ff; +extern compop_func op_9050_0_comp_ff; +extern compop_func op_9058_0_comp_ff; +extern compop_func op_9060_0_comp_ff; +extern compop_func op_9068_0_comp_ff; +extern compop_func op_9070_0_comp_ff; +extern compop_func op_9078_0_comp_ff; +extern compop_func op_9079_0_comp_ff; +extern compop_func op_907a_0_comp_ff; +extern compop_func op_907b_0_comp_ff; +extern compop_func op_907c_0_comp_ff; +extern compop_func op_9080_0_comp_ff; +extern compop_func op_9088_0_comp_ff; +extern compop_func op_9090_0_comp_ff; +extern compop_func op_9098_0_comp_ff; +extern compop_func op_90a0_0_comp_ff; +extern compop_func op_90a8_0_comp_ff; +extern compop_func op_90b0_0_comp_ff; +extern compop_func op_90b8_0_comp_ff; +extern compop_func op_90b9_0_comp_ff; +extern compop_func op_90ba_0_comp_ff; +extern compop_func op_90bb_0_comp_ff; +extern compop_func op_90bc_0_comp_ff; +extern compop_func op_90c0_0_comp_ff; +extern compop_func op_90c8_0_comp_ff; +extern compop_func op_90d0_0_comp_ff; +extern compop_func op_90d8_0_comp_ff; +extern compop_func op_90e0_0_comp_ff; +extern compop_func op_90e8_0_comp_ff; +extern compop_func op_90f0_0_comp_ff; +extern compop_func op_90f8_0_comp_ff; +extern compop_func op_90f9_0_comp_ff; +extern compop_func op_90fa_0_comp_ff; +extern compop_func op_90fb_0_comp_ff; +extern compop_func op_90fc_0_comp_ff; +extern compop_func op_9100_0_comp_ff; +extern compop_func op_9108_0_comp_ff; +extern compop_func op_9110_0_comp_ff; +extern compop_func op_9118_0_comp_ff; +extern compop_func op_9120_0_comp_ff; +extern compop_func op_9128_0_comp_ff; +extern compop_func op_9130_0_comp_ff; +extern compop_func op_9138_0_comp_ff; +extern compop_func op_9139_0_comp_ff; +extern compop_func op_9140_0_comp_ff; +extern compop_func op_9148_0_comp_ff; +extern compop_func op_9150_0_comp_ff; +extern compop_func op_9158_0_comp_ff; +extern compop_func op_9160_0_comp_ff; +extern compop_func op_9168_0_comp_ff; +extern compop_func op_9170_0_comp_ff; +extern compop_func op_9178_0_comp_ff; +extern compop_func op_9179_0_comp_ff; +extern compop_func op_9180_0_comp_ff; +extern compop_func op_9188_0_comp_ff; +extern compop_func op_9190_0_comp_ff; +extern compop_func op_9198_0_comp_ff; +extern compop_func op_91a0_0_comp_ff; +extern compop_func op_91a8_0_comp_ff; +extern compop_func op_91b0_0_comp_ff; +extern compop_func op_91b8_0_comp_ff; +extern compop_func op_91b9_0_comp_ff; +extern compop_func op_91c0_0_comp_ff; +extern compop_func op_91c8_0_comp_ff; +extern compop_func op_91d0_0_comp_ff; +extern compop_func op_91d8_0_comp_ff; +extern compop_func op_91e0_0_comp_ff; +extern compop_func op_91e8_0_comp_ff; +extern compop_func op_91f0_0_comp_ff; +extern compop_func op_91f8_0_comp_ff; +extern compop_func op_91f9_0_comp_ff; +extern compop_func op_91fa_0_comp_ff; +extern compop_func op_91fb_0_comp_ff; +extern compop_func op_91fc_0_comp_ff; +extern compop_func op_b000_0_comp_ff; +extern compop_func op_b010_0_comp_ff; +extern compop_func op_b018_0_comp_ff; +extern compop_func op_b020_0_comp_ff; +extern compop_func op_b028_0_comp_ff; +extern compop_func op_b030_0_comp_ff; +extern compop_func op_b038_0_comp_ff; +extern compop_func op_b039_0_comp_ff; +extern compop_func op_b03a_0_comp_ff; +extern compop_func op_b03b_0_comp_ff; +extern compop_func op_b03c_0_comp_ff; +extern compop_func op_b040_0_comp_ff; +extern compop_func op_b048_0_comp_ff; +extern compop_func op_b050_0_comp_ff; +extern compop_func op_b058_0_comp_ff; +extern compop_func op_b060_0_comp_ff; +extern compop_func op_b068_0_comp_ff; +extern compop_func op_b070_0_comp_ff; +extern compop_func op_b078_0_comp_ff; +extern compop_func op_b079_0_comp_ff; +extern compop_func op_b07a_0_comp_ff; +extern compop_func op_b07b_0_comp_ff; +extern compop_func op_b07c_0_comp_ff; +extern compop_func op_b080_0_comp_ff; +extern compop_func op_b088_0_comp_ff; +extern compop_func op_b090_0_comp_ff; +extern compop_func op_b098_0_comp_ff; +extern compop_func op_b0a0_0_comp_ff; +extern compop_func op_b0a8_0_comp_ff; +extern compop_func op_b0b0_0_comp_ff; +extern compop_func op_b0b8_0_comp_ff; +extern compop_func op_b0b9_0_comp_ff; +extern compop_func op_b0ba_0_comp_ff; +extern compop_func op_b0bb_0_comp_ff; +extern compop_func op_b0bc_0_comp_ff; +extern compop_func op_b0c0_0_comp_ff; +extern compop_func op_b0c8_0_comp_ff; +extern compop_func op_b0d0_0_comp_ff; +extern compop_func op_b0d8_0_comp_ff; +extern compop_func op_b0e0_0_comp_ff; +extern compop_func op_b0e8_0_comp_ff; +extern compop_func op_b0f0_0_comp_ff; +extern compop_func op_b0f8_0_comp_ff; +extern compop_func op_b0f9_0_comp_ff; +extern compop_func op_b0fa_0_comp_ff; +extern compop_func op_b0fb_0_comp_ff; +extern compop_func op_b0fc_0_comp_ff; +extern compop_func op_b100_0_comp_ff; +extern compop_func op_b108_0_comp_ff; +extern compop_func op_b110_0_comp_ff; +extern compop_func op_b118_0_comp_ff; +extern compop_func op_b120_0_comp_ff; +extern compop_func op_b128_0_comp_ff; +extern compop_func op_b130_0_comp_ff; +extern compop_func op_b138_0_comp_ff; +extern compop_func op_b139_0_comp_ff; +extern compop_func op_b140_0_comp_ff; +extern compop_func op_b148_0_comp_ff; +extern compop_func op_b150_0_comp_ff; +extern compop_func op_b158_0_comp_ff; +extern compop_func op_b160_0_comp_ff; +extern compop_func op_b168_0_comp_ff; +extern compop_func op_b170_0_comp_ff; +extern compop_func op_b178_0_comp_ff; +extern compop_func op_b179_0_comp_ff; +extern compop_func op_b180_0_comp_ff; +extern compop_func op_b188_0_comp_ff; +extern compop_func op_b190_0_comp_ff; +extern compop_func op_b198_0_comp_ff; +extern compop_func op_b1a0_0_comp_ff; +extern compop_func op_b1a8_0_comp_ff; +extern compop_func op_b1b0_0_comp_ff; +extern compop_func op_b1b8_0_comp_ff; +extern compop_func op_b1b9_0_comp_ff; +extern compop_func op_b1c0_0_comp_ff; +extern compop_func op_b1c8_0_comp_ff; +extern compop_func op_b1d0_0_comp_ff; +extern compop_func op_b1d8_0_comp_ff; +extern compop_func op_b1e0_0_comp_ff; +extern compop_func op_b1e8_0_comp_ff; +extern compop_func op_b1f0_0_comp_ff; +extern compop_func op_b1f8_0_comp_ff; +extern compop_func op_b1f9_0_comp_ff; +extern compop_func op_b1fa_0_comp_ff; +extern compop_func op_b1fb_0_comp_ff; +extern compop_func op_b1fc_0_comp_ff; +extern compop_func op_c000_0_comp_ff; +extern compop_func op_c010_0_comp_ff; +extern compop_func op_c018_0_comp_ff; +extern compop_func op_c020_0_comp_ff; +extern compop_func op_c028_0_comp_ff; +extern compop_func op_c030_0_comp_ff; +extern compop_func op_c038_0_comp_ff; +extern compop_func op_c039_0_comp_ff; +extern compop_func op_c03a_0_comp_ff; +extern compop_func op_c03b_0_comp_ff; +extern compop_func op_c03c_0_comp_ff; +extern compop_func op_c040_0_comp_ff; +extern compop_func op_c050_0_comp_ff; +extern compop_func op_c058_0_comp_ff; +extern compop_func op_c060_0_comp_ff; +extern compop_func op_c068_0_comp_ff; +extern compop_func op_c070_0_comp_ff; +extern compop_func op_c078_0_comp_ff; +extern compop_func op_c079_0_comp_ff; +extern compop_func op_c07a_0_comp_ff; +extern compop_func op_c07b_0_comp_ff; +extern compop_func op_c07c_0_comp_ff; +extern compop_func op_c080_0_comp_ff; +extern compop_func op_c090_0_comp_ff; +extern compop_func op_c098_0_comp_ff; +extern compop_func op_c0a0_0_comp_ff; +extern compop_func op_c0a8_0_comp_ff; +extern compop_func op_c0b0_0_comp_ff; +extern compop_func op_c0b8_0_comp_ff; +extern compop_func op_c0b9_0_comp_ff; +extern compop_func op_c0ba_0_comp_ff; +extern compop_func op_c0bb_0_comp_ff; +extern compop_func op_c0bc_0_comp_ff; +extern compop_func op_c0c0_0_comp_ff; +extern compop_func op_c0d0_0_comp_ff; +extern compop_func op_c0d8_0_comp_ff; +extern compop_func op_c0e0_0_comp_ff; +extern compop_func op_c0e8_0_comp_ff; +extern compop_func op_c0f0_0_comp_ff; +extern compop_func op_c0f8_0_comp_ff; +extern compop_func op_c0f9_0_comp_ff; +extern compop_func op_c0fa_0_comp_ff; +extern compop_func op_c0fb_0_comp_ff; +extern compop_func op_c0fc_0_comp_ff; +extern compop_func op_c110_0_comp_ff; +extern compop_func op_c118_0_comp_ff; +extern compop_func op_c120_0_comp_ff; +extern compop_func op_c128_0_comp_ff; +extern compop_func op_c130_0_comp_ff; +extern compop_func op_c138_0_comp_ff; +extern compop_func op_c139_0_comp_ff; +extern compop_func op_c140_0_comp_ff; +extern compop_func op_c148_0_comp_ff; +extern compop_func op_c150_0_comp_ff; +extern compop_func op_c158_0_comp_ff; +extern compop_func op_c160_0_comp_ff; +extern compop_func op_c168_0_comp_ff; +extern compop_func op_c170_0_comp_ff; +extern compop_func op_c178_0_comp_ff; +extern compop_func op_c179_0_comp_ff; +extern compop_func op_c188_0_comp_ff; +extern compop_func op_c190_0_comp_ff; +extern compop_func op_c198_0_comp_ff; +extern compop_func op_c1a0_0_comp_ff; +extern compop_func op_c1a8_0_comp_ff; +extern compop_func op_c1b0_0_comp_ff; +extern compop_func op_c1b8_0_comp_ff; +extern compop_func op_c1b9_0_comp_ff; +extern compop_func op_c1c0_0_comp_ff; +extern compop_func op_c1d0_0_comp_ff; +extern compop_func op_c1d8_0_comp_ff; +extern compop_func op_c1e0_0_comp_ff; +extern compop_func op_c1e8_0_comp_ff; +extern compop_func op_c1f0_0_comp_ff; +extern compop_func op_c1f8_0_comp_ff; +extern compop_func op_c1f9_0_comp_ff; +extern compop_func op_c1fa_0_comp_ff; +extern compop_func op_c1fb_0_comp_ff; +extern compop_func op_c1fc_0_comp_ff; +extern compop_func op_d000_0_comp_ff; +extern compop_func op_d010_0_comp_ff; +extern compop_func op_d018_0_comp_ff; +extern compop_func op_d020_0_comp_ff; +extern compop_func op_d028_0_comp_ff; +extern compop_func op_d030_0_comp_ff; +extern compop_func op_d038_0_comp_ff; +extern compop_func op_d039_0_comp_ff; +extern compop_func op_d03a_0_comp_ff; +extern compop_func op_d03b_0_comp_ff; +extern compop_func op_d03c_0_comp_ff; +extern compop_func op_d040_0_comp_ff; +extern compop_func op_d048_0_comp_ff; +extern compop_func op_d050_0_comp_ff; +extern compop_func op_d058_0_comp_ff; +extern compop_func op_d060_0_comp_ff; +extern compop_func op_d068_0_comp_ff; +extern compop_func op_d070_0_comp_ff; +extern compop_func op_d078_0_comp_ff; +extern compop_func op_d079_0_comp_ff; +extern compop_func op_d07a_0_comp_ff; +extern compop_func op_d07b_0_comp_ff; +extern compop_func op_d07c_0_comp_ff; +extern compop_func op_d080_0_comp_ff; +extern compop_func op_d088_0_comp_ff; +extern compop_func op_d090_0_comp_ff; +extern compop_func op_d098_0_comp_ff; +extern compop_func op_d0a0_0_comp_ff; +extern compop_func op_d0a8_0_comp_ff; +extern compop_func op_d0b0_0_comp_ff; +extern compop_func op_d0b8_0_comp_ff; +extern compop_func op_d0b9_0_comp_ff; +extern compop_func op_d0ba_0_comp_ff; +extern compop_func op_d0bb_0_comp_ff; +extern compop_func op_d0bc_0_comp_ff; +extern compop_func op_d0c0_0_comp_ff; +extern compop_func op_d0c8_0_comp_ff; +extern compop_func op_d0d0_0_comp_ff; +extern compop_func op_d0d8_0_comp_ff; +extern compop_func op_d0e0_0_comp_ff; +extern compop_func op_d0e8_0_comp_ff; +extern compop_func op_d0f0_0_comp_ff; +extern compop_func op_d0f8_0_comp_ff; +extern compop_func op_d0f9_0_comp_ff; +extern compop_func op_d0fa_0_comp_ff; +extern compop_func op_d0fb_0_comp_ff; +extern compop_func op_d0fc_0_comp_ff; +extern compop_func op_d100_0_comp_ff; +extern compop_func op_d108_0_comp_ff; +extern compop_func op_d110_0_comp_ff; +extern compop_func op_d118_0_comp_ff; +extern compop_func op_d120_0_comp_ff; +extern compop_func op_d128_0_comp_ff; +extern compop_func op_d130_0_comp_ff; +extern compop_func op_d138_0_comp_ff; +extern compop_func op_d139_0_comp_ff; +extern compop_func op_d140_0_comp_ff; +extern compop_func op_d148_0_comp_ff; +extern compop_func op_d150_0_comp_ff; +extern compop_func op_d158_0_comp_ff; +extern compop_func op_d160_0_comp_ff; +extern compop_func op_d168_0_comp_ff; +extern compop_func op_d170_0_comp_ff; +extern compop_func op_d178_0_comp_ff; +extern compop_func op_d179_0_comp_ff; +extern compop_func op_d180_0_comp_ff; +extern compop_func op_d188_0_comp_ff; +extern compop_func op_d190_0_comp_ff; +extern compop_func op_d198_0_comp_ff; +extern compop_func op_d1a0_0_comp_ff; +extern compop_func op_d1a8_0_comp_ff; +extern compop_func op_d1b0_0_comp_ff; +extern compop_func op_d1b8_0_comp_ff; +extern compop_func op_d1b9_0_comp_ff; +extern compop_func op_d1c0_0_comp_ff; +extern compop_func op_d1c8_0_comp_ff; +extern compop_func op_d1d0_0_comp_ff; +extern compop_func op_d1d8_0_comp_ff; +extern compop_func op_d1e0_0_comp_ff; +extern compop_func op_d1e8_0_comp_ff; +extern compop_func op_d1f0_0_comp_ff; +extern compop_func op_d1f8_0_comp_ff; +extern compop_func op_d1f9_0_comp_ff; +extern compop_func op_d1fa_0_comp_ff; +extern compop_func op_d1fb_0_comp_ff; +extern compop_func op_d1fc_0_comp_ff; +extern compop_func op_e000_0_comp_ff; +extern compop_func op_e008_0_comp_ff; +extern compop_func op_e018_0_comp_ff; +extern compop_func op_e020_0_comp_ff; +extern compop_func op_e028_0_comp_ff; +extern compop_func op_e038_0_comp_ff; +extern compop_func op_e040_0_comp_ff; +extern compop_func op_e048_0_comp_ff; +extern compop_func op_e058_0_comp_ff; +extern compop_func op_e060_0_comp_ff; +extern compop_func op_e068_0_comp_ff; +extern compop_func op_e078_0_comp_ff; +extern compop_func op_e080_0_comp_ff; +extern compop_func op_e088_0_comp_ff; +extern compop_func op_e098_0_comp_ff; +extern compop_func op_e0a0_0_comp_ff; +extern compop_func op_e0a8_0_comp_ff; +extern compop_func op_e0b8_0_comp_ff; +extern compop_func op_e100_0_comp_ff; +extern compop_func op_e108_0_comp_ff; +extern compop_func op_e118_0_comp_ff; +extern compop_func op_e120_0_comp_ff; +extern compop_func op_e128_0_comp_ff; +extern compop_func op_e138_0_comp_ff; +extern compop_func op_e140_0_comp_ff; +extern compop_func op_e148_0_comp_ff; +extern compop_func op_e158_0_comp_ff; +extern compop_func op_e160_0_comp_ff; +extern compop_func op_e168_0_comp_ff; +extern compop_func op_e178_0_comp_ff; +extern compop_func op_e180_0_comp_ff; +extern compop_func op_e188_0_comp_ff; +extern compop_func op_e198_0_comp_ff; +extern compop_func op_e1a0_0_comp_ff; +extern compop_func op_e1a8_0_comp_ff; +extern compop_func op_e1b8_0_comp_ff; +extern compop_func op_f200_0_comp_ff; +extern compop_func op_f208_0_comp_ff; +extern compop_func op_f210_0_comp_ff; +extern compop_func op_f218_0_comp_ff; +extern compop_func op_f220_0_comp_ff; +extern compop_func op_f228_0_comp_ff; +extern compop_func op_f230_0_comp_ff; +extern compop_func op_f238_0_comp_ff; +extern compop_func op_f239_0_comp_ff; +extern compop_func op_f23a_0_comp_ff; +extern compop_func op_f23b_0_comp_ff; +extern compop_func op_f23c_0_comp_ff; +extern compop_func op_f240_0_comp_ff; +extern compop_func op_f250_0_comp_ff; +extern compop_func op_f258_0_comp_ff; +extern compop_func op_f260_0_comp_ff; +extern compop_func op_f268_0_comp_ff; +extern compop_func op_f270_0_comp_ff; +extern compop_func op_f278_0_comp_ff; +extern compop_func op_f279_0_comp_ff; +extern compop_func op_f280_0_comp_ff; +extern compop_func op_f2c0_0_comp_ff; +extern compop_func op_f600_0_comp_ff; +extern compop_func op_f608_0_comp_ff; +extern compop_func op_f610_0_comp_ff; +extern compop_func op_f618_0_comp_ff; +extern compop_func op_f620_0_comp_ff; +extern compop_func op_0_0_comp_nf; +extern compop_func op_10_0_comp_nf; +extern compop_func op_18_0_comp_nf; +extern compop_func op_20_0_comp_nf; +extern compop_func op_28_0_comp_nf; +extern compop_func op_30_0_comp_nf; +extern compop_func op_38_0_comp_nf; +extern compop_func op_39_0_comp_nf; +extern compop_func op_40_0_comp_nf; +extern compop_func op_50_0_comp_nf; +extern compop_func op_58_0_comp_nf; +extern compop_func op_60_0_comp_nf; +extern compop_func op_68_0_comp_nf; +extern compop_func op_70_0_comp_nf; +extern compop_func op_78_0_comp_nf; +extern compop_func op_79_0_comp_nf; +extern compop_func op_80_0_comp_nf; +extern compop_func op_90_0_comp_nf; +extern compop_func op_98_0_comp_nf; +extern compop_func op_a0_0_comp_nf; +extern compop_func op_a8_0_comp_nf; +extern compop_func op_b0_0_comp_nf; +extern compop_func op_b8_0_comp_nf; +extern compop_func op_b9_0_comp_nf; +extern compop_func op_100_0_comp_nf; +extern compop_func op_110_0_comp_nf; +extern compop_func op_118_0_comp_nf; +extern compop_func op_120_0_comp_nf; +extern compop_func op_128_0_comp_nf; +extern compop_func op_130_0_comp_nf; +extern compop_func op_138_0_comp_nf; +extern compop_func op_139_0_comp_nf; +extern compop_func op_13a_0_comp_nf; +extern compop_func op_13b_0_comp_nf; +extern compop_func op_13c_0_comp_nf; +extern compop_func op_140_0_comp_nf; +extern compop_func op_150_0_comp_nf; +extern compop_func op_158_0_comp_nf; +extern compop_func op_160_0_comp_nf; +extern compop_func op_168_0_comp_nf; +extern compop_func op_170_0_comp_nf; +extern compop_func op_178_0_comp_nf; +extern compop_func op_179_0_comp_nf; +extern compop_func op_17a_0_comp_nf; +extern compop_func op_17b_0_comp_nf; +extern compop_func op_180_0_comp_nf; +extern compop_func op_190_0_comp_nf; +extern compop_func op_198_0_comp_nf; +extern compop_func op_1a0_0_comp_nf; +extern compop_func op_1a8_0_comp_nf; +extern compop_func op_1b0_0_comp_nf; +extern compop_func op_1b8_0_comp_nf; +extern compop_func op_1b9_0_comp_nf; +extern compop_func op_1ba_0_comp_nf; +extern compop_func op_1bb_0_comp_nf; +extern compop_func op_1c0_0_comp_nf; +extern compop_func op_1d0_0_comp_nf; +extern compop_func op_1d8_0_comp_nf; +extern compop_func op_1e0_0_comp_nf; +extern compop_func op_1e8_0_comp_nf; +extern compop_func op_1f0_0_comp_nf; +extern compop_func op_1f8_0_comp_nf; +extern compop_func op_1f9_0_comp_nf; +extern compop_func op_1fa_0_comp_nf; +extern compop_func op_1fb_0_comp_nf; +extern compop_func op_200_0_comp_nf; +extern compop_func op_210_0_comp_nf; +extern compop_func op_218_0_comp_nf; +extern compop_func op_220_0_comp_nf; +extern compop_func op_228_0_comp_nf; +extern compop_func op_230_0_comp_nf; +extern compop_func op_238_0_comp_nf; +extern compop_func op_239_0_comp_nf; +extern compop_func op_240_0_comp_nf; +extern compop_func op_250_0_comp_nf; +extern compop_func op_258_0_comp_nf; +extern compop_func op_260_0_comp_nf; +extern compop_func op_268_0_comp_nf; +extern compop_func op_270_0_comp_nf; +extern compop_func op_278_0_comp_nf; +extern compop_func op_279_0_comp_nf; +extern compop_func op_280_0_comp_nf; +extern compop_func op_290_0_comp_nf; +extern compop_func op_298_0_comp_nf; +extern compop_func op_2a0_0_comp_nf; +extern compop_func op_2a8_0_comp_nf; +extern compop_func op_2b0_0_comp_nf; +extern compop_func op_2b8_0_comp_nf; +extern compop_func op_2b9_0_comp_nf; +extern compop_func op_400_0_comp_nf; +extern compop_func op_410_0_comp_nf; +extern compop_func op_418_0_comp_nf; +extern compop_func op_420_0_comp_nf; +extern compop_func op_428_0_comp_nf; +extern compop_func op_430_0_comp_nf; +extern compop_func op_438_0_comp_nf; +extern compop_func op_439_0_comp_nf; +extern compop_func op_440_0_comp_nf; +extern compop_func op_450_0_comp_nf; +extern compop_func op_458_0_comp_nf; +extern compop_func op_460_0_comp_nf; +extern compop_func op_468_0_comp_nf; +extern compop_func op_470_0_comp_nf; +extern compop_func op_478_0_comp_nf; +extern compop_func op_479_0_comp_nf; +extern compop_func op_480_0_comp_nf; +extern compop_func op_490_0_comp_nf; +extern compop_func op_498_0_comp_nf; +extern compop_func op_4a0_0_comp_nf; +extern compop_func op_4a8_0_comp_nf; +extern compop_func op_4b0_0_comp_nf; +extern compop_func op_4b8_0_comp_nf; +extern compop_func op_4b9_0_comp_nf; +extern compop_func op_600_0_comp_nf; +extern compop_func op_610_0_comp_nf; +extern compop_func op_618_0_comp_nf; +extern compop_func op_620_0_comp_nf; +extern compop_func op_628_0_comp_nf; +extern compop_func op_630_0_comp_nf; +extern compop_func op_638_0_comp_nf; +extern compop_func op_639_0_comp_nf; +extern compop_func op_640_0_comp_nf; +extern compop_func op_650_0_comp_nf; +extern compop_func op_658_0_comp_nf; +extern compop_func op_660_0_comp_nf; +extern compop_func op_668_0_comp_nf; +extern compop_func op_670_0_comp_nf; +extern compop_func op_678_0_comp_nf; +extern compop_func op_679_0_comp_nf; +extern compop_func op_680_0_comp_nf; +extern compop_func op_690_0_comp_nf; +extern compop_func op_698_0_comp_nf; +extern compop_func op_6a0_0_comp_nf; +extern compop_func op_6a8_0_comp_nf; +extern compop_func op_6b0_0_comp_nf; +extern compop_func op_6b8_0_comp_nf; +extern compop_func op_6b9_0_comp_nf; +extern compop_func op_800_0_comp_nf; +extern compop_func op_810_0_comp_nf; +extern compop_func op_818_0_comp_nf; +extern compop_func op_820_0_comp_nf; +extern compop_func op_828_0_comp_nf; +extern compop_func op_830_0_comp_nf; +extern compop_func op_838_0_comp_nf; +extern compop_func op_839_0_comp_nf; +extern compop_func op_83a_0_comp_nf; +extern compop_func op_83b_0_comp_nf; +extern compop_func op_83c_0_comp_nf; +extern compop_func op_840_0_comp_nf; +extern compop_func op_850_0_comp_nf; +extern compop_func op_858_0_comp_nf; +extern compop_func op_860_0_comp_nf; +extern compop_func op_868_0_comp_nf; +extern compop_func op_870_0_comp_nf; +extern compop_func op_878_0_comp_nf; +extern compop_func op_879_0_comp_nf; +extern compop_func op_87a_0_comp_nf; +extern compop_func op_87b_0_comp_nf; +extern compop_func op_880_0_comp_nf; +extern compop_func op_890_0_comp_nf; +extern compop_func op_898_0_comp_nf; +extern compop_func op_8a0_0_comp_nf; +extern compop_func op_8a8_0_comp_nf; +extern compop_func op_8b0_0_comp_nf; +extern compop_func op_8b8_0_comp_nf; +extern compop_func op_8b9_0_comp_nf; +extern compop_func op_8ba_0_comp_nf; +extern compop_func op_8bb_0_comp_nf; +extern compop_func op_8c0_0_comp_nf; +extern compop_func op_8d0_0_comp_nf; +extern compop_func op_8d8_0_comp_nf; +extern compop_func op_8e0_0_comp_nf; +extern compop_func op_8e8_0_comp_nf; +extern compop_func op_8f0_0_comp_nf; +extern compop_func op_8f8_0_comp_nf; +extern compop_func op_8f9_0_comp_nf; +extern compop_func op_8fa_0_comp_nf; +extern compop_func op_8fb_0_comp_nf; +extern compop_func op_a00_0_comp_nf; +extern compop_func op_a10_0_comp_nf; +extern compop_func op_a18_0_comp_nf; +extern compop_func op_a20_0_comp_nf; +extern compop_func op_a28_0_comp_nf; +extern compop_func op_a30_0_comp_nf; +extern compop_func op_a38_0_comp_nf; +extern compop_func op_a39_0_comp_nf; +extern compop_func op_a40_0_comp_nf; +extern compop_func op_a50_0_comp_nf; +extern compop_func op_a58_0_comp_nf; +extern compop_func op_a60_0_comp_nf; +extern compop_func op_a68_0_comp_nf; +extern compop_func op_a70_0_comp_nf; +extern compop_func op_a78_0_comp_nf; +extern compop_func op_a79_0_comp_nf; +extern compop_func op_a80_0_comp_nf; +extern compop_func op_a90_0_comp_nf; +extern compop_func op_a98_0_comp_nf; +extern compop_func op_aa0_0_comp_nf; +extern compop_func op_aa8_0_comp_nf; +extern compop_func op_ab0_0_comp_nf; +extern compop_func op_ab8_0_comp_nf; +extern compop_func op_ab9_0_comp_nf; +extern compop_func op_c00_0_comp_nf; +extern compop_func op_c10_0_comp_nf; +extern compop_func op_c18_0_comp_nf; +extern compop_func op_c20_0_comp_nf; +extern compop_func op_c28_0_comp_nf; +extern compop_func op_c30_0_comp_nf; +extern compop_func op_c38_0_comp_nf; +extern compop_func op_c39_0_comp_nf; +extern compop_func op_c3a_0_comp_nf; +extern compop_func op_c3b_0_comp_nf; +extern compop_func op_c40_0_comp_nf; +extern compop_func op_c50_0_comp_nf; +extern compop_func op_c58_0_comp_nf; +extern compop_func op_c60_0_comp_nf; +extern compop_func op_c68_0_comp_nf; +extern compop_func op_c70_0_comp_nf; +extern compop_func op_c78_0_comp_nf; +extern compop_func op_c79_0_comp_nf; +extern compop_func op_c7a_0_comp_nf; +extern compop_func op_c7b_0_comp_nf; +extern compop_func op_c80_0_comp_nf; +extern compop_func op_c90_0_comp_nf; +extern compop_func op_c98_0_comp_nf; +extern compop_func op_ca0_0_comp_nf; +extern compop_func op_ca8_0_comp_nf; +extern compop_func op_cb0_0_comp_nf; +extern compop_func op_cb8_0_comp_nf; +extern compop_func op_cb9_0_comp_nf; +extern compop_func op_cba_0_comp_nf; +extern compop_func op_cbb_0_comp_nf; +extern compop_func op_1000_0_comp_nf; +extern compop_func op_1010_0_comp_nf; +extern compop_func op_1018_0_comp_nf; +extern compop_func op_1020_0_comp_nf; +extern compop_func op_1028_0_comp_nf; +extern compop_func op_1030_0_comp_nf; +extern compop_func op_1038_0_comp_nf; +extern compop_func op_1039_0_comp_nf; +extern compop_func op_103a_0_comp_nf; +extern compop_func op_103b_0_comp_nf; +extern compop_func op_103c_0_comp_nf; +extern compop_func op_1080_0_comp_nf; +extern compop_func op_1090_0_comp_nf; +extern compop_func op_1098_0_comp_nf; +extern compop_func op_10a0_0_comp_nf; +extern compop_func op_10a8_0_comp_nf; +extern compop_func op_10b0_0_comp_nf; +extern compop_func op_10b8_0_comp_nf; +extern compop_func op_10b9_0_comp_nf; +extern compop_func op_10ba_0_comp_nf; +extern compop_func op_10bb_0_comp_nf; +extern compop_func op_10bc_0_comp_nf; +extern compop_func op_10c0_0_comp_nf; +extern compop_func op_10d0_0_comp_nf; +extern compop_func op_10d8_0_comp_nf; +extern compop_func op_10e0_0_comp_nf; +extern compop_func op_10e8_0_comp_nf; +extern compop_func op_10f0_0_comp_nf; +extern compop_func op_10f8_0_comp_nf; +extern compop_func op_10f9_0_comp_nf; +extern compop_func op_10fa_0_comp_nf; +extern compop_func op_10fb_0_comp_nf; +extern compop_func op_10fc_0_comp_nf; +extern compop_func op_1100_0_comp_nf; +extern compop_func op_1110_0_comp_nf; +extern compop_func op_1118_0_comp_nf; +extern compop_func op_1120_0_comp_nf; +extern compop_func op_1128_0_comp_nf; +extern compop_func op_1130_0_comp_nf; +extern compop_func op_1138_0_comp_nf; +extern compop_func op_1139_0_comp_nf; +extern compop_func op_113a_0_comp_nf; +extern compop_func op_113b_0_comp_nf; +extern compop_func op_113c_0_comp_nf; +extern compop_func op_1140_0_comp_nf; +extern compop_func op_1150_0_comp_nf; +extern compop_func op_1158_0_comp_nf; +extern compop_func op_1160_0_comp_nf; +extern compop_func op_1168_0_comp_nf; +extern compop_func op_1170_0_comp_nf; +extern compop_func op_1178_0_comp_nf; +extern compop_func op_1179_0_comp_nf; +extern compop_func op_117a_0_comp_nf; +extern compop_func op_117b_0_comp_nf; +extern compop_func op_117c_0_comp_nf; +extern compop_func op_1180_0_comp_nf; +extern compop_func op_1190_0_comp_nf; +extern compop_func op_1198_0_comp_nf; +extern compop_func op_11a0_0_comp_nf; +extern compop_func op_11a8_0_comp_nf; +extern compop_func op_11b0_0_comp_nf; +extern compop_func op_11b8_0_comp_nf; +extern compop_func op_11b9_0_comp_nf; +extern compop_func op_11ba_0_comp_nf; +extern compop_func op_11bb_0_comp_nf; +extern compop_func op_11bc_0_comp_nf; +extern compop_func op_11c0_0_comp_nf; +extern compop_func op_11d0_0_comp_nf; +extern compop_func op_11d8_0_comp_nf; +extern compop_func op_11e0_0_comp_nf; +extern compop_func op_11e8_0_comp_nf; +extern compop_func op_11f0_0_comp_nf; +extern compop_func op_11f8_0_comp_nf; +extern compop_func op_11f9_0_comp_nf; +extern compop_func op_11fa_0_comp_nf; +extern compop_func op_11fb_0_comp_nf; +extern compop_func op_11fc_0_comp_nf; +extern compop_func op_13c0_0_comp_nf; +extern compop_func op_13d0_0_comp_nf; +extern compop_func op_13d8_0_comp_nf; +extern compop_func op_13e0_0_comp_nf; +extern compop_func op_13e8_0_comp_nf; +extern compop_func op_13f0_0_comp_nf; +extern compop_func op_13f8_0_comp_nf; +extern compop_func op_13f9_0_comp_nf; +extern compop_func op_13fa_0_comp_nf; +extern compop_func op_13fb_0_comp_nf; +extern compop_func op_13fc_0_comp_nf; +extern compop_func op_2000_0_comp_nf; +extern compop_func op_2008_0_comp_nf; +extern compop_func op_2010_0_comp_nf; +extern compop_func op_2018_0_comp_nf; +extern compop_func op_2020_0_comp_nf; +extern compop_func op_2028_0_comp_nf; +extern compop_func op_2030_0_comp_nf; +extern compop_func op_2038_0_comp_nf; +extern compop_func op_2039_0_comp_nf; +extern compop_func op_203a_0_comp_nf; +extern compop_func op_203b_0_comp_nf; +extern compop_func op_203c_0_comp_nf; +extern compop_func op_2040_0_comp_nf; +extern compop_func op_2048_0_comp_nf; +extern compop_func op_2050_0_comp_nf; +extern compop_func op_2058_0_comp_nf; +extern compop_func op_2060_0_comp_nf; +extern compop_func op_2068_0_comp_nf; +extern compop_func op_2070_0_comp_nf; +extern compop_func op_2078_0_comp_nf; +extern compop_func op_2079_0_comp_nf; +extern compop_func op_207a_0_comp_nf; +extern compop_func op_207b_0_comp_nf; +extern compop_func op_207c_0_comp_nf; +extern compop_func op_2080_0_comp_nf; +extern compop_func op_2088_0_comp_nf; +extern compop_func op_2090_0_comp_nf; +extern compop_func op_2098_0_comp_nf; +extern compop_func op_20a0_0_comp_nf; +extern compop_func op_20a8_0_comp_nf; +extern compop_func op_20b0_0_comp_nf; +extern compop_func op_20b8_0_comp_nf; +extern compop_func op_20b9_0_comp_nf; +extern compop_func op_20ba_0_comp_nf; +extern compop_func op_20bb_0_comp_nf; +extern compop_func op_20bc_0_comp_nf; +extern compop_func op_20c0_0_comp_nf; +extern compop_func op_20c8_0_comp_nf; +extern compop_func op_20d0_0_comp_nf; +extern compop_func op_20d8_0_comp_nf; +extern compop_func op_20e0_0_comp_nf; +extern compop_func op_20e8_0_comp_nf; +extern compop_func op_20f0_0_comp_nf; +extern compop_func op_20f8_0_comp_nf; +extern compop_func op_20f9_0_comp_nf; +extern compop_func op_20fa_0_comp_nf; +extern compop_func op_20fb_0_comp_nf; +extern compop_func op_20fc_0_comp_nf; +extern compop_func op_2100_0_comp_nf; +extern compop_func op_2108_0_comp_nf; +extern compop_func op_2110_0_comp_nf; +extern compop_func op_2118_0_comp_nf; +extern compop_func op_2120_0_comp_nf; +extern compop_func op_2128_0_comp_nf; +extern compop_func op_2130_0_comp_nf; +extern compop_func op_2138_0_comp_nf; +extern compop_func op_2139_0_comp_nf; +extern compop_func op_213a_0_comp_nf; +extern compop_func op_213b_0_comp_nf; +extern compop_func op_213c_0_comp_nf; +extern compop_func op_2140_0_comp_nf; +extern compop_func op_2148_0_comp_nf; +extern compop_func op_2150_0_comp_nf; +extern compop_func op_2158_0_comp_nf; +extern compop_func op_2160_0_comp_nf; +extern compop_func op_2168_0_comp_nf; +extern compop_func op_2170_0_comp_nf; +extern compop_func op_2178_0_comp_nf; +extern compop_func op_2179_0_comp_nf; +extern compop_func op_217a_0_comp_nf; +extern compop_func op_217b_0_comp_nf; +extern compop_func op_217c_0_comp_nf; +extern compop_func op_2180_0_comp_nf; +extern compop_func op_2188_0_comp_nf; +extern compop_func op_2190_0_comp_nf; +extern compop_func op_2198_0_comp_nf; +extern compop_func op_21a0_0_comp_nf; +extern compop_func op_21a8_0_comp_nf; +extern compop_func op_21b0_0_comp_nf; +extern compop_func op_21b8_0_comp_nf; +extern compop_func op_21b9_0_comp_nf; +extern compop_func op_21ba_0_comp_nf; +extern compop_func op_21bb_0_comp_nf; +extern compop_func op_21bc_0_comp_nf; +extern compop_func op_21c0_0_comp_nf; +extern compop_func op_21c8_0_comp_nf; +extern compop_func op_21d0_0_comp_nf; +extern compop_func op_21d8_0_comp_nf; +extern compop_func op_21e0_0_comp_nf; +extern compop_func op_21e8_0_comp_nf; +extern compop_func op_21f0_0_comp_nf; +extern compop_func op_21f8_0_comp_nf; +extern compop_func op_21f9_0_comp_nf; +extern compop_func op_21fa_0_comp_nf; +extern compop_func op_21fb_0_comp_nf; +extern compop_func op_21fc_0_comp_nf; +extern compop_func op_23c0_0_comp_nf; +extern compop_func op_23c8_0_comp_nf; +extern compop_func op_23d0_0_comp_nf; +extern compop_func op_23d8_0_comp_nf; +extern compop_func op_23e0_0_comp_nf; +extern compop_func op_23e8_0_comp_nf; +extern compop_func op_23f0_0_comp_nf; +extern compop_func op_23f8_0_comp_nf; +extern compop_func op_23f9_0_comp_nf; +extern compop_func op_23fa_0_comp_nf; +extern compop_func op_23fb_0_comp_nf; +extern compop_func op_23fc_0_comp_nf; +extern compop_func op_3000_0_comp_nf; +extern compop_func op_3008_0_comp_nf; +extern compop_func op_3010_0_comp_nf; +extern compop_func op_3018_0_comp_nf; +extern compop_func op_3020_0_comp_nf; +extern compop_func op_3028_0_comp_nf; +extern compop_func op_3030_0_comp_nf; +extern compop_func op_3038_0_comp_nf; +extern compop_func op_3039_0_comp_nf; +extern compop_func op_303a_0_comp_nf; +extern compop_func op_303b_0_comp_nf; +extern compop_func op_303c_0_comp_nf; +extern compop_func op_3040_0_comp_nf; +extern compop_func op_3048_0_comp_nf; +extern compop_func op_3050_0_comp_nf; +extern compop_func op_3058_0_comp_nf; +extern compop_func op_3060_0_comp_nf; +extern compop_func op_3068_0_comp_nf; +extern compop_func op_3070_0_comp_nf; +extern compop_func op_3078_0_comp_nf; +extern compop_func op_3079_0_comp_nf; +extern compop_func op_307a_0_comp_nf; +extern compop_func op_307b_0_comp_nf; +extern compop_func op_307c_0_comp_nf; +extern compop_func op_3080_0_comp_nf; +extern compop_func op_3088_0_comp_nf; +extern compop_func op_3090_0_comp_nf; +extern compop_func op_3098_0_comp_nf; +extern compop_func op_30a0_0_comp_nf; +extern compop_func op_30a8_0_comp_nf; +extern compop_func op_30b0_0_comp_nf; +extern compop_func op_30b8_0_comp_nf; +extern compop_func op_30b9_0_comp_nf; +extern compop_func op_30ba_0_comp_nf; +extern compop_func op_30bb_0_comp_nf; +extern compop_func op_30bc_0_comp_nf; +extern compop_func op_30c0_0_comp_nf; +extern compop_func op_30c8_0_comp_nf; +extern compop_func op_30d0_0_comp_nf; +extern compop_func op_30d8_0_comp_nf; +extern compop_func op_30e0_0_comp_nf; +extern compop_func op_30e8_0_comp_nf; +extern compop_func op_30f0_0_comp_nf; +extern compop_func op_30f8_0_comp_nf; +extern compop_func op_30f9_0_comp_nf; +extern compop_func op_30fa_0_comp_nf; +extern compop_func op_30fb_0_comp_nf; +extern compop_func op_30fc_0_comp_nf; +extern compop_func op_3100_0_comp_nf; +extern compop_func op_3108_0_comp_nf; +extern compop_func op_3110_0_comp_nf; +extern compop_func op_3118_0_comp_nf; +extern compop_func op_3120_0_comp_nf; +extern compop_func op_3128_0_comp_nf; +extern compop_func op_3130_0_comp_nf; +extern compop_func op_3138_0_comp_nf; +extern compop_func op_3139_0_comp_nf; +extern compop_func op_313a_0_comp_nf; +extern compop_func op_313b_0_comp_nf; +extern compop_func op_313c_0_comp_nf; +extern compop_func op_3140_0_comp_nf; +extern compop_func op_3148_0_comp_nf; +extern compop_func op_3150_0_comp_nf; +extern compop_func op_3158_0_comp_nf; +extern compop_func op_3160_0_comp_nf; +extern compop_func op_3168_0_comp_nf; +extern compop_func op_3170_0_comp_nf; +extern compop_func op_3178_0_comp_nf; +extern compop_func op_3179_0_comp_nf; +extern compop_func op_317a_0_comp_nf; +extern compop_func op_317b_0_comp_nf; +extern compop_func op_317c_0_comp_nf; +extern compop_func op_3180_0_comp_nf; +extern compop_func op_3188_0_comp_nf; +extern compop_func op_3190_0_comp_nf; +extern compop_func op_3198_0_comp_nf; +extern compop_func op_31a0_0_comp_nf; +extern compop_func op_31a8_0_comp_nf; +extern compop_func op_31b0_0_comp_nf; +extern compop_func op_31b8_0_comp_nf; +extern compop_func op_31b9_0_comp_nf; +extern compop_func op_31ba_0_comp_nf; +extern compop_func op_31bb_0_comp_nf; +extern compop_func op_31bc_0_comp_nf; +extern compop_func op_31c0_0_comp_nf; +extern compop_func op_31c8_0_comp_nf; +extern compop_func op_31d0_0_comp_nf; +extern compop_func op_31d8_0_comp_nf; +extern compop_func op_31e0_0_comp_nf; +extern compop_func op_31e8_0_comp_nf; +extern compop_func op_31f0_0_comp_nf; +extern compop_func op_31f8_0_comp_nf; +extern compop_func op_31f9_0_comp_nf; +extern compop_func op_31fa_0_comp_nf; +extern compop_func op_31fb_0_comp_nf; +extern compop_func op_31fc_0_comp_nf; +extern compop_func op_33c0_0_comp_nf; +extern compop_func op_33c8_0_comp_nf; +extern compop_func op_33d0_0_comp_nf; +extern compop_func op_33d8_0_comp_nf; +extern compop_func op_33e0_0_comp_nf; +extern compop_func op_33e8_0_comp_nf; +extern compop_func op_33f0_0_comp_nf; +extern compop_func op_33f8_0_comp_nf; +extern compop_func op_33f9_0_comp_nf; +extern compop_func op_33fa_0_comp_nf; +extern compop_func op_33fb_0_comp_nf; +extern compop_func op_33fc_0_comp_nf; +extern compop_func op_4000_0_comp_nf; +extern compop_func op_4010_0_comp_nf; +extern compop_func op_4018_0_comp_nf; +extern compop_func op_4020_0_comp_nf; +extern compop_func op_4028_0_comp_nf; +extern compop_func op_4030_0_comp_nf; +extern compop_func op_4038_0_comp_nf; +extern compop_func op_4039_0_comp_nf; +extern compop_func op_4040_0_comp_nf; +extern compop_func op_4050_0_comp_nf; +extern compop_func op_4058_0_comp_nf; +extern compop_func op_4060_0_comp_nf; +extern compop_func op_4068_0_comp_nf; +extern compop_func op_4070_0_comp_nf; +extern compop_func op_4078_0_comp_nf; +extern compop_func op_4079_0_comp_nf; +extern compop_func op_4080_0_comp_nf; +extern compop_func op_4090_0_comp_nf; +extern compop_func op_4098_0_comp_nf; +extern compop_func op_40a0_0_comp_nf; +extern compop_func op_40a8_0_comp_nf; +extern compop_func op_40b0_0_comp_nf; +extern compop_func op_40b8_0_comp_nf; +extern compop_func op_40b9_0_comp_nf; +extern compop_func op_41d0_0_comp_nf; +extern compop_func op_41e8_0_comp_nf; +extern compop_func op_41f0_0_comp_nf; +extern compop_func op_41f8_0_comp_nf; +extern compop_func op_41f9_0_comp_nf; +extern compop_func op_41fa_0_comp_nf; +extern compop_func op_41fb_0_comp_nf; +extern compop_func op_4200_0_comp_nf; +extern compop_func op_4210_0_comp_nf; +extern compop_func op_4218_0_comp_nf; +extern compop_func op_4220_0_comp_nf; +extern compop_func op_4228_0_comp_nf; +extern compop_func op_4230_0_comp_nf; +extern compop_func op_4238_0_comp_nf; +extern compop_func op_4239_0_comp_nf; +extern compop_func op_4240_0_comp_nf; +extern compop_func op_4250_0_comp_nf; +extern compop_func op_4258_0_comp_nf; +extern compop_func op_4260_0_comp_nf; +extern compop_func op_4268_0_comp_nf; +extern compop_func op_4270_0_comp_nf; +extern compop_func op_4278_0_comp_nf; +extern compop_func op_4279_0_comp_nf; +extern compop_func op_4280_0_comp_nf; +extern compop_func op_4290_0_comp_nf; +extern compop_func op_4298_0_comp_nf; +extern compop_func op_42a0_0_comp_nf; +extern compop_func op_42a8_0_comp_nf; +extern compop_func op_42b0_0_comp_nf; +extern compop_func op_42b8_0_comp_nf; +extern compop_func op_42b9_0_comp_nf; +extern compop_func op_4400_0_comp_nf; +extern compop_func op_4410_0_comp_nf; +extern compop_func op_4418_0_comp_nf; +extern compop_func op_4420_0_comp_nf; +extern compop_func op_4428_0_comp_nf; +extern compop_func op_4430_0_comp_nf; +extern compop_func op_4438_0_comp_nf; +extern compop_func op_4439_0_comp_nf; +extern compop_func op_4440_0_comp_nf; +extern compop_func op_4450_0_comp_nf; +extern compop_func op_4458_0_comp_nf; +extern compop_func op_4460_0_comp_nf; +extern compop_func op_4468_0_comp_nf; +extern compop_func op_4470_0_comp_nf; +extern compop_func op_4478_0_comp_nf; +extern compop_func op_4479_0_comp_nf; +extern compop_func op_4480_0_comp_nf; +extern compop_func op_4490_0_comp_nf; +extern compop_func op_4498_0_comp_nf; +extern compop_func op_44a0_0_comp_nf; +extern compop_func op_44a8_0_comp_nf; +extern compop_func op_44b0_0_comp_nf; +extern compop_func op_44b8_0_comp_nf; +extern compop_func op_44b9_0_comp_nf; +extern compop_func op_4600_0_comp_nf; +extern compop_func op_4610_0_comp_nf; +extern compop_func op_4618_0_comp_nf; +extern compop_func op_4620_0_comp_nf; +extern compop_func op_4628_0_comp_nf; +extern compop_func op_4630_0_comp_nf; +extern compop_func op_4638_0_comp_nf; +extern compop_func op_4639_0_comp_nf; +extern compop_func op_4640_0_comp_nf; +extern compop_func op_4650_0_comp_nf; +extern compop_func op_4658_0_comp_nf; +extern compop_func op_4660_0_comp_nf; +extern compop_func op_4668_0_comp_nf; +extern compop_func op_4670_0_comp_nf; +extern compop_func op_4678_0_comp_nf; +extern compop_func op_4679_0_comp_nf; +extern compop_func op_4680_0_comp_nf; +extern compop_func op_4690_0_comp_nf; +extern compop_func op_4698_0_comp_nf; +extern compop_func op_46a0_0_comp_nf; +extern compop_func op_46a8_0_comp_nf; +extern compop_func op_46b0_0_comp_nf; +extern compop_func op_46b8_0_comp_nf; +extern compop_func op_46b9_0_comp_nf; +extern compop_func op_4808_0_comp_nf; +extern compop_func op_4840_0_comp_nf; +extern compop_func op_4850_0_comp_nf; +extern compop_func op_4868_0_comp_nf; +extern compop_func op_4870_0_comp_nf; +extern compop_func op_4878_0_comp_nf; +extern compop_func op_4879_0_comp_nf; +extern compop_func op_487a_0_comp_nf; +extern compop_func op_487b_0_comp_nf; +extern compop_func op_4880_0_comp_nf; +extern compop_func op_4890_0_comp_nf; +extern compop_func op_48a0_0_comp_nf; +extern compop_func op_48a8_0_comp_nf; +extern compop_func op_48b0_0_comp_nf; +extern compop_func op_48b8_0_comp_nf; +extern compop_func op_48b9_0_comp_nf; +extern compop_func op_48c0_0_comp_nf; +extern compop_func op_48d0_0_comp_nf; +extern compop_func op_48e0_0_comp_nf; +extern compop_func op_48e8_0_comp_nf; +extern compop_func op_48f0_0_comp_nf; +extern compop_func op_48f8_0_comp_nf; +extern compop_func op_48f9_0_comp_nf; +extern compop_func op_49c0_0_comp_nf; +extern compop_func op_4a00_0_comp_nf; +extern compop_func op_4a10_0_comp_nf; +extern compop_func op_4a18_0_comp_nf; +extern compop_func op_4a20_0_comp_nf; +extern compop_func op_4a28_0_comp_nf; +extern compop_func op_4a30_0_comp_nf; +extern compop_func op_4a38_0_comp_nf; +extern compop_func op_4a39_0_comp_nf; +extern compop_func op_4a3a_0_comp_nf; +extern compop_func op_4a3b_0_comp_nf; +extern compop_func op_4a3c_0_comp_nf; +extern compop_func op_4a40_0_comp_nf; +extern compop_func op_4a48_0_comp_nf; +extern compop_func op_4a50_0_comp_nf; +extern compop_func op_4a58_0_comp_nf; +extern compop_func op_4a60_0_comp_nf; +extern compop_func op_4a68_0_comp_nf; +extern compop_func op_4a70_0_comp_nf; +extern compop_func op_4a78_0_comp_nf; +extern compop_func op_4a79_0_comp_nf; +extern compop_func op_4a7a_0_comp_nf; +extern compop_func op_4a7b_0_comp_nf; +extern compop_func op_4a7c_0_comp_nf; +extern compop_func op_4a80_0_comp_nf; +extern compop_func op_4a88_0_comp_nf; +extern compop_func op_4a90_0_comp_nf; +extern compop_func op_4a98_0_comp_nf; +extern compop_func op_4aa0_0_comp_nf; +extern compop_func op_4aa8_0_comp_nf; +extern compop_func op_4ab0_0_comp_nf; +extern compop_func op_4ab8_0_comp_nf; +extern compop_func op_4ab9_0_comp_nf; +extern compop_func op_4aba_0_comp_nf; +extern compop_func op_4abb_0_comp_nf; +extern compop_func op_4abc_0_comp_nf; +extern compop_func op_4c00_0_comp_nf; +extern compop_func op_4c10_0_comp_nf; +extern compop_func op_4c18_0_comp_nf; +extern compop_func op_4c20_0_comp_nf; +extern compop_func op_4c28_0_comp_nf; +extern compop_func op_4c30_0_comp_nf; +extern compop_func op_4c38_0_comp_nf; +extern compop_func op_4c39_0_comp_nf; +extern compop_func op_4c3a_0_comp_nf; +extern compop_func op_4c3b_0_comp_nf; +extern compop_func op_4c3c_0_comp_nf; +extern compop_func op_4c90_0_comp_nf; +extern compop_func op_4c98_0_comp_nf; +extern compop_func op_4ca8_0_comp_nf; +extern compop_func op_4cb0_0_comp_nf; +extern compop_func op_4cb8_0_comp_nf; +extern compop_func op_4cb9_0_comp_nf; +extern compop_func op_4cba_0_comp_nf; +extern compop_func op_4cbb_0_comp_nf; +extern compop_func op_4cd0_0_comp_nf; +extern compop_func op_4cd8_0_comp_nf; +extern compop_func op_4ce8_0_comp_nf; +extern compop_func op_4cf0_0_comp_nf; +extern compop_func op_4cf8_0_comp_nf; +extern compop_func op_4cf9_0_comp_nf; +extern compop_func op_4cfa_0_comp_nf; +extern compop_func op_4cfb_0_comp_nf; +extern compop_func op_4e50_0_comp_nf; +extern compop_func op_4e58_0_comp_nf; +extern compop_func op_4e71_0_comp_nf; +extern compop_func op_4e74_0_comp_nf; +extern compop_func op_4e75_0_comp_nf; +extern compop_func op_4e90_0_comp_nf; +extern compop_func op_4ea8_0_comp_nf; +extern compop_func op_4eb0_0_comp_nf; +extern compop_func op_4eb8_0_comp_nf; +extern compop_func op_4eb9_0_comp_nf; +extern compop_func op_4eba_0_comp_nf; +extern compop_func op_4ebb_0_comp_nf; +extern compop_func op_4ed0_0_comp_nf; +extern compop_func op_4ee8_0_comp_nf; +extern compop_func op_4ef0_0_comp_nf; +extern compop_func op_4ef8_0_comp_nf; +extern compop_func op_4ef9_0_comp_nf; +extern compop_func op_4efa_0_comp_nf; +extern compop_func op_4efb_0_comp_nf; +extern compop_func op_5000_0_comp_nf; +extern compop_func op_5010_0_comp_nf; +extern compop_func op_5018_0_comp_nf; +extern compop_func op_5020_0_comp_nf; +extern compop_func op_5028_0_comp_nf; +extern compop_func op_5030_0_comp_nf; +extern compop_func op_5038_0_comp_nf; +extern compop_func op_5039_0_comp_nf; +extern compop_func op_5040_0_comp_nf; +extern compop_func op_5048_0_comp_nf; +extern compop_func op_5050_0_comp_nf; +extern compop_func op_5058_0_comp_nf; +extern compop_func op_5060_0_comp_nf; +extern compop_func op_5068_0_comp_nf; +extern compop_func op_5070_0_comp_nf; +extern compop_func op_5078_0_comp_nf; +extern compop_func op_5079_0_comp_nf; +extern compop_func op_5080_0_comp_nf; +extern compop_func op_5088_0_comp_nf; +extern compop_func op_5090_0_comp_nf; +extern compop_func op_5098_0_comp_nf; +extern compop_func op_50a0_0_comp_nf; +extern compop_func op_50a8_0_comp_nf; +extern compop_func op_50b0_0_comp_nf; +extern compop_func op_50b8_0_comp_nf; +extern compop_func op_50b9_0_comp_nf; +extern compop_func op_50c0_0_comp_nf; +extern compop_func op_50c8_0_comp_nf; +extern compop_func op_50d0_0_comp_nf; +extern compop_func op_50d8_0_comp_nf; +extern compop_func op_50e0_0_comp_nf; +extern compop_func op_50e8_0_comp_nf; +extern compop_func op_50f0_0_comp_nf; +extern compop_func op_50f8_0_comp_nf; +extern compop_func op_50f9_0_comp_nf; +extern compop_func op_5100_0_comp_nf; +extern compop_func op_5110_0_comp_nf; +extern compop_func op_5118_0_comp_nf; +extern compop_func op_5120_0_comp_nf; +extern compop_func op_5128_0_comp_nf; +extern compop_func op_5130_0_comp_nf; +extern compop_func op_5138_0_comp_nf; +extern compop_func op_5139_0_comp_nf; +extern compop_func op_5140_0_comp_nf; +extern compop_func op_5148_0_comp_nf; +extern compop_func op_5150_0_comp_nf; +extern compop_func op_5158_0_comp_nf; +extern compop_func op_5160_0_comp_nf; +extern compop_func op_5168_0_comp_nf; +extern compop_func op_5170_0_comp_nf; +extern compop_func op_5178_0_comp_nf; +extern compop_func op_5179_0_comp_nf; +extern compop_func op_5180_0_comp_nf; +extern compop_func op_5188_0_comp_nf; +extern compop_func op_5190_0_comp_nf; +extern compop_func op_5198_0_comp_nf; +extern compop_func op_51a0_0_comp_nf; +extern compop_func op_51a8_0_comp_nf; +extern compop_func op_51b0_0_comp_nf; +extern compop_func op_51b8_0_comp_nf; +extern compop_func op_51b9_0_comp_nf; +extern compop_func op_51c0_0_comp_nf; +extern compop_func op_51c8_0_comp_nf; +extern compop_func op_51d0_0_comp_nf; +extern compop_func op_51d8_0_comp_nf; +extern compop_func op_51e0_0_comp_nf; +extern compop_func op_51e8_0_comp_nf; +extern compop_func op_51f0_0_comp_nf; +extern compop_func op_51f8_0_comp_nf; +extern compop_func op_51f9_0_comp_nf; +extern compop_func op_52c0_0_comp_nf; +extern compop_func op_52c8_0_comp_nf; +extern compop_func op_52d0_0_comp_nf; +extern compop_func op_52d8_0_comp_nf; +extern compop_func op_52e0_0_comp_nf; +extern compop_func op_52e8_0_comp_nf; +extern compop_func op_52f0_0_comp_nf; +extern compop_func op_52f8_0_comp_nf; +extern compop_func op_52f9_0_comp_nf; +extern compop_func op_53c0_0_comp_nf; +extern compop_func op_53c8_0_comp_nf; +extern compop_func op_53d0_0_comp_nf; +extern compop_func op_53d8_0_comp_nf; +extern compop_func op_53e0_0_comp_nf; +extern compop_func op_53e8_0_comp_nf; +extern compop_func op_53f0_0_comp_nf; +extern compop_func op_53f8_0_comp_nf; +extern compop_func op_53f9_0_comp_nf; +extern compop_func op_54c0_0_comp_nf; +extern compop_func op_54c8_0_comp_nf; +extern compop_func op_54d0_0_comp_nf; +extern compop_func op_54d8_0_comp_nf; +extern compop_func op_54e0_0_comp_nf; +extern compop_func op_54e8_0_comp_nf; +extern compop_func op_54f0_0_comp_nf; +extern compop_func op_54f8_0_comp_nf; +extern compop_func op_54f9_0_comp_nf; +extern compop_func op_55c0_0_comp_nf; +extern compop_func op_55c8_0_comp_nf; +extern compop_func op_55d0_0_comp_nf; +extern compop_func op_55d8_0_comp_nf; +extern compop_func op_55e0_0_comp_nf; +extern compop_func op_55e8_0_comp_nf; +extern compop_func op_55f0_0_comp_nf; +extern compop_func op_55f8_0_comp_nf; +extern compop_func op_55f9_0_comp_nf; +extern compop_func op_56c0_0_comp_nf; +extern compop_func op_56c8_0_comp_nf; +extern compop_func op_56d0_0_comp_nf; +extern compop_func op_56d8_0_comp_nf; +extern compop_func op_56e0_0_comp_nf; +extern compop_func op_56e8_0_comp_nf; +extern compop_func op_56f0_0_comp_nf; +extern compop_func op_56f8_0_comp_nf; +extern compop_func op_56f9_0_comp_nf; +extern compop_func op_57c0_0_comp_nf; +extern compop_func op_57c8_0_comp_nf; +extern compop_func op_57d0_0_comp_nf; +extern compop_func op_57d8_0_comp_nf; +extern compop_func op_57e0_0_comp_nf; +extern compop_func op_57e8_0_comp_nf; +extern compop_func op_57f0_0_comp_nf; +extern compop_func op_57f8_0_comp_nf; +extern compop_func op_57f9_0_comp_nf; +extern compop_func op_5ac0_0_comp_nf; +extern compop_func op_5ac8_0_comp_nf; +extern compop_func op_5ad0_0_comp_nf; +extern compop_func op_5ad8_0_comp_nf; +extern compop_func op_5ae0_0_comp_nf; +extern compop_func op_5ae8_0_comp_nf; +extern compop_func op_5af0_0_comp_nf; +extern compop_func op_5af8_0_comp_nf; +extern compop_func op_5af9_0_comp_nf; +extern compop_func op_5bc0_0_comp_nf; +extern compop_func op_5bc8_0_comp_nf; +extern compop_func op_5bd0_0_comp_nf; +extern compop_func op_5bd8_0_comp_nf; +extern compop_func op_5be0_0_comp_nf; +extern compop_func op_5be8_0_comp_nf; +extern compop_func op_5bf0_0_comp_nf; +extern compop_func op_5bf8_0_comp_nf; +extern compop_func op_5bf9_0_comp_nf; +extern compop_func op_5cc0_0_comp_nf; +extern compop_func op_5cc8_0_comp_nf; +extern compop_func op_5cd0_0_comp_nf; +extern compop_func op_5cd8_0_comp_nf; +extern compop_func op_5ce0_0_comp_nf; +extern compop_func op_5ce8_0_comp_nf; +extern compop_func op_5cf0_0_comp_nf; +extern compop_func op_5cf8_0_comp_nf; +extern compop_func op_5cf9_0_comp_nf; +extern compop_func op_5dc0_0_comp_nf; +extern compop_func op_5dc8_0_comp_nf; +extern compop_func op_5dd0_0_comp_nf; +extern compop_func op_5dd8_0_comp_nf; +extern compop_func op_5de0_0_comp_nf; +extern compop_func op_5de8_0_comp_nf; +extern compop_func op_5df0_0_comp_nf; +extern compop_func op_5df8_0_comp_nf; +extern compop_func op_5df9_0_comp_nf; +extern compop_func op_5ec0_0_comp_nf; +extern compop_func op_5ec8_0_comp_nf; +extern compop_func op_5ed0_0_comp_nf; +extern compop_func op_5ed8_0_comp_nf; +extern compop_func op_5ee0_0_comp_nf; +extern compop_func op_5ee8_0_comp_nf; +extern compop_func op_5ef0_0_comp_nf; +extern compop_func op_5ef8_0_comp_nf; +extern compop_func op_5ef9_0_comp_nf; +extern compop_func op_5fc0_0_comp_nf; +extern compop_func op_5fc8_0_comp_nf; +extern compop_func op_5fd0_0_comp_nf; +extern compop_func op_5fd8_0_comp_nf; +extern compop_func op_5fe0_0_comp_nf; +extern compop_func op_5fe8_0_comp_nf; +extern compop_func op_5ff0_0_comp_nf; +extern compop_func op_5ff8_0_comp_nf; +extern compop_func op_5ff9_0_comp_nf; +extern compop_func op_6000_0_comp_nf; +extern compop_func op_6001_0_comp_nf; +extern compop_func op_60ff_0_comp_nf; +extern compop_func op_6100_0_comp_nf; +extern compop_func op_6101_0_comp_nf; +extern compop_func op_6200_0_comp_nf; +extern compop_func op_6201_0_comp_nf; +extern compop_func op_62ff_0_comp_nf; +extern compop_func op_6300_0_comp_nf; +extern compop_func op_6301_0_comp_nf; +extern compop_func op_63ff_0_comp_nf; +extern compop_func op_6400_0_comp_nf; +extern compop_func op_6401_0_comp_nf; +extern compop_func op_64ff_0_comp_nf; +extern compop_func op_6500_0_comp_nf; +extern compop_func op_6501_0_comp_nf; +extern compop_func op_65ff_0_comp_nf; +extern compop_func op_6600_0_comp_nf; +extern compop_func op_6601_0_comp_nf; +extern compop_func op_66ff_0_comp_nf; +extern compop_func op_6700_0_comp_nf; +extern compop_func op_6701_0_comp_nf; +extern compop_func op_67ff_0_comp_nf; +extern compop_func op_6a00_0_comp_nf; +extern compop_func op_6a01_0_comp_nf; +extern compop_func op_6aff_0_comp_nf; +extern compop_func op_6b00_0_comp_nf; +extern compop_func op_6b01_0_comp_nf; +extern compop_func op_6bff_0_comp_nf; +extern compop_func op_6c00_0_comp_nf; +extern compop_func op_6c01_0_comp_nf; +extern compop_func op_6cff_0_comp_nf; +extern compop_func op_6d00_0_comp_nf; +extern compop_func op_6d01_0_comp_nf; +extern compop_func op_6dff_0_comp_nf; +extern compop_func op_6e00_0_comp_nf; +extern compop_func op_6e01_0_comp_nf; +extern compop_func op_6eff_0_comp_nf; +extern compop_func op_6f00_0_comp_nf; +extern compop_func op_6f01_0_comp_nf; +extern compop_func op_6fff_0_comp_nf; +extern compop_func op_7000_0_comp_nf; +extern compop_func op_8000_0_comp_nf; +extern compop_func op_8010_0_comp_nf; +extern compop_func op_8018_0_comp_nf; +extern compop_func op_8020_0_comp_nf; +extern compop_func op_8028_0_comp_nf; +extern compop_func op_8030_0_comp_nf; +extern compop_func op_8038_0_comp_nf; +extern compop_func op_8039_0_comp_nf; +extern compop_func op_803a_0_comp_nf; +extern compop_func op_803b_0_comp_nf; +extern compop_func op_803c_0_comp_nf; +extern compop_func op_8040_0_comp_nf; +extern compop_func op_8050_0_comp_nf; +extern compop_func op_8058_0_comp_nf; +extern compop_func op_8060_0_comp_nf; +extern compop_func op_8068_0_comp_nf; +extern compop_func op_8070_0_comp_nf; +extern compop_func op_8078_0_comp_nf; +extern compop_func op_8079_0_comp_nf; +extern compop_func op_807a_0_comp_nf; +extern compop_func op_807b_0_comp_nf; +extern compop_func op_807c_0_comp_nf; +extern compop_func op_8080_0_comp_nf; +extern compop_func op_8090_0_comp_nf; +extern compop_func op_8098_0_comp_nf; +extern compop_func op_80a0_0_comp_nf; +extern compop_func op_80a8_0_comp_nf; +extern compop_func op_80b0_0_comp_nf; +extern compop_func op_80b8_0_comp_nf; +extern compop_func op_80b9_0_comp_nf; +extern compop_func op_80ba_0_comp_nf; +extern compop_func op_80bb_0_comp_nf; +extern compop_func op_80bc_0_comp_nf; +extern compop_func op_8110_0_comp_nf; +extern compop_func op_8118_0_comp_nf; +extern compop_func op_8120_0_comp_nf; +extern compop_func op_8128_0_comp_nf; +extern compop_func op_8130_0_comp_nf; +extern compop_func op_8138_0_comp_nf; +extern compop_func op_8139_0_comp_nf; +extern compop_func op_8150_0_comp_nf; +extern compop_func op_8158_0_comp_nf; +extern compop_func op_8160_0_comp_nf; +extern compop_func op_8168_0_comp_nf; +extern compop_func op_8170_0_comp_nf; +extern compop_func op_8178_0_comp_nf; +extern compop_func op_8179_0_comp_nf; +extern compop_func op_8190_0_comp_nf; +extern compop_func op_8198_0_comp_nf; +extern compop_func op_81a0_0_comp_nf; +extern compop_func op_81a8_0_comp_nf; +extern compop_func op_81b0_0_comp_nf; +extern compop_func op_81b8_0_comp_nf; +extern compop_func op_81b9_0_comp_nf; +extern compop_func op_9000_0_comp_nf; +extern compop_func op_9010_0_comp_nf; +extern compop_func op_9018_0_comp_nf; +extern compop_func op_9020_0_comp_nf; +extern compop_func op_9028_0_comp_nf; +extern compop_func op_9030_0_comp_nf; +extern compop_func op_9038_0_comp_nf; +extern compop_func op_9039_0_comp_nf; +extern compop_func op_903a_0_comp_nf; +extern compop_func op_903b_0_comp_nf; +extern compop_func op_903c_0_comp_nf; +extern compop_func op_9040_0_comp_nf; +extern compop_func op_9048_0_comp_nf; +extern compop_func op_9050_0_comp_nf; +extern compop_func op_9058_0_comp_nf; +extern compop_func op_9060_0_comp_nf; +extern compop_func op_9068_0_comp_nf; +extern compop_func op_9070_0_comp_nf; +extern compop_func op_9078_0_comp_nf; +extern compop_func op_9079_0_comp_nf; +extern compop_func op_907a_0_comp_nf; +extern compop_func op_907b_0_comp_nf; +extern compop_func op_907c_0_comp_nf; +extern compop_func op_9080_0_comp_nf; +extern compop_func op_9088_0_comp_nf; +extern compop_func op_9090_0_comp_nf; +extern compop_func op_9098_0_comp_nf; +extern compop_func op_90a0_0_comp_nf; +extern compop_func op_90a8_0_comp_nf; +extern compop_func op_90b0_0_comp_nf; +extern compop_func op_90b8_0_comp_nf; +extern compop_func op_90b9_0_comp_nf; +extern compop_func op_90ba_0_comp_nf; +extern compop_func op_90bb_0_comp_nf; +extern compop_func op_90bc_0_comp_nf; +extern compop_func op_90c0_0_comp_nf; +extern compop_func op_90c8_0_comp_nf; +extern compop_func op_90d0_0_comp_nf; +extern compop_func op_90d8_0_comp_nf; +extern compop_func op_90e0_0_comp_nf; +extern compop_func op_90e8_0_comp_nf; +extern compop_func op_90f0_0_comp_nf; +extern compop_func op_90f8_0_comp_nf; +extern compop_func op_90f9_0_comp_nf; +extern compop_func op_90fa_0_comp_nf; +extern compop_func op_90fb_0_comp_nf; +extern compop_func op_90fc_0_comp_nf; +extern compop_func op_9100_0_comp_nf; +extern compop_func op_9108_0_comp_nf; +extern compop_func op_9110_0_comp_nf; +extern compop_func op_9118_0_comp_nf; +extern compop_func op_9120_0_comp_nf; +extern compop_func op_9128_0_comp_nf; +extern compop_func op_9130_0_comp_nf; +extern compop_func op_9138_0_comp_nf; +extern compop_func op_9139_0_comp_nf; +extern compop_func op_9140_0_comp_nf; +extern compop_func op_9148_0_comp_nf; +extern compop_func op_9150_0_comp_nf; +extern compop_func op_9158_0_comp_nf; +extern compop_func op_9160_0_comp_nf; +extern compop_func op_9168_0_comp_nf; +extern compop_func op_9170_0_comp_nf; +extern compop_func op_9178_0_comp_nf; +extern compop_func op_9179_0_comp_nf; +extern compop_func op_9180_0_comp_nf; +extern compop_func op_9188_0_comp_nf; +extern compop_func op_9190_0_comp_nf; +extern compop_func op_9198_0_comp_nf; +extern compop_func op_91a0_0_comp_nf; +extern compop_func op_91a8_0_comp_nf; +extern compop_func op_91b0_0_comp_nf; +extern compop_func op_91b8_0_comp_nf; +extern compop_func op_91b9_0_comp_nf; +extern compop_func op_91c0_0_comp_nf; +extern compop_func op_91c8_0_comp_nf; +extern compop_func op_91d0_0_comp_nf; +extern compop_func op_91d8_0_comp_nf; +extern compop_func op_91e0_0_comp_nf; +extern compop_func op_91e8_0_comp_nf; +extern compop_func op_91f0_0_comp_nf; +extern compop_func op_91f8_0_comp_nf; +extern compop_func op_91f9_0_comp_nf; +extern compop_func op_91fa_0_comp_nf; +extern compop_func op_91fb_0_comp_nf; +extern compop_func op_91fc_0_comp_nf; +extern compop_func op_b000_0_comp_nf; +extern compop_func op_b010_0_comp_nf; +extern compop_func op_b018_0_comp_nf; +extern compop_func op_b020_0_comp_nf; +extern compop_func op_b028_0_comp_nf; +extern compop_func op_b030_0_comp_nf; +extern compop_func op_b038_0_comp_nf; +extern compop_func op_b039_0_comp_nf; +extern compop_func op_b03a_0_comp_nf; +extern compop_func op_b03b_0_comp_nf; +extern compop_func op_b03c_0_comp_nf; +extern compop_func op_b040_0_comp_nf; +extern compop_func op_b048_0_comp_nf; +extern compop_func op_b050_0_comp_nf; +extern compop_func op_b058_0_comp_nf; +extern compop_func op_b060_0_comp_nf; +extern compop_func op_b068_0_comp_nf; +extern compop_func op_b070_0_comp_nf; +extern compop_func op_b078_0_comp_nf; +extern compop_func op_b079_0_comp_nf; +extern compop_func op_b07a_0_comp_nf; +extern compop_func op_b07b_0_comp_nf; +extern compop_func op_b07c_0_comp_nf; +extern compop_func op_b080_0_comp_nf; +extern compop_func op_b088_0_comp_nf; +extern compop_func op_b090_0_comp_nf; +extern compop_func op_b098_0_comp_nf; +extern compop_func op_b0a0_0_comp_nf; +extern compop_func op_b0a8_0_comp_nf; +extern compop_func op_b0b0_0_comp_nf; +extern compop_func op_b0b8_0_comp_nf; +extern compop_func op_b0b9_0_comp_nf; +extern compop_func op_b0ba_0_comp_nf; +extern compop_func op_b0bb_0_comp_nf; +extern compop_func op_b0bc_0_comp_nf; +extern compop_func op_b0c0_0_comp_nf; +extern compop_func op_b0c8_0_comp_nf; +extern compop_func op_b0d0_0_comp_nf; +extern compop_func op_b0d8_0_comp_nf; +extern compop_func op_b0e0_0_comp_nf; +extern compop_func op_b0e8_0_comp_nf; +extern compop_func op_b0f0_0_comp_nf; +extern compop_func op_b0f8_0_comp_nf; +extern compop_func op_b0f9_0_comp_nf; +extern compop_func op_b0fa_0_comp_nf; +extern compop_func op_b0fb_0_comp_nf; +extern compop_func op_b0fc_0_comp_nf; +extern compop_func op_b100_0_comp_nf; +extern compop_func op_b108_0_comp_nf; +extern compop_func op_b110_0_comp_nf; +extern compop_func op_b118_0_comp_nf; +extern compop_func op_b120_0_comp_nf; +extern compop_func op_b128_0_comp_nf; +extern compop_func op_b130_0_comp_nf; +extern compop_func op_b138_0_comp_nf; +extern compop_func op_b139_0_comp_nf; +extern compop_func op_b140_0_comp_nf; +extern compop_func op_b148_0_comp_nf; +extern compop_func op_b150_0_comp_nf; +extern compop_func op_b158_0_comp_nf; +extern compop_func op_b160_0_comp_nf; +extern compop_func op_b168_0_comp_nf; +extern compop_func op_b170_0_comp_nf; +extern compop_func op_b178_0_comp_nf; +extern compop_func op_b179_0_comp_nf; +extern compop_func op_b180_0_comp_nf; +extern compop_func op_b188_0_comp_nf; +extern compop_func op_b190_0_comp_nf; +extern compop_func op_b198_0_comp_nf; +extern compop_func op_b1a0_0_comp_nf; +extern compop_func op_b1a8_0_comp_nf; +extern compop_func op_b1b0_0_comp_nf; +extern compop_func op_b1b8_0_comp_nf; +extern compop_func op_b1b9_0_comp_nf; +extern compop_func op_b1c0_0_comp_nf; +extern compop_func op_b1c8_0_comp_nf; +extern compop_func op_b1d0_0_comp_nf; +extern compop_func op_b1d8_0_comp_nf; +extern compop_func op_b1e0_0_comp_nf; +extern compop_func op_b1e8_0_comp_nf; +extern compop_func op_b1f0_0_comp_nf; +extern compop_func op_b1f8_0_comp_nf; +extern compop_func op_b1f9_0_comp_nf; +extern compop_func op_b1fa_0_comp_nf; +extern compop_func op_b1fb_0_comp_nf; +extern compop_func op_b1fc_0_comp_nf; +extern compop_func op_c000_0_comp_nf; +extern compop_func op_c010_0_comp_nf; +extern compop_func op_c018_0_comp_nf; +extern compop_func op_c020_0_comp_nf; +extern compop_func op_c028_0_comp_nf; +extern compop_func op_c030_0_comp_nf; +extern compop_func op_c038_0_comp_nf; +extern compop_func op_c039_0_comp_nf; +extern compop_func op_c03a_0_comp_nf; +extern compop_func op_c03b_0_comp_nf; +extern compop_func op_c03c_0_comp_nf; +extern compop_func op_c040_0_comp_nf; +extern compop_func op_c050_0_comp_nf; +extern compop_func op_c058_0_comp_nf; +extern compop_func op_c060_0_comp_nf; +extern compop_func op_c068_0_comp_nf; +extern compop_func op_c070_0_comp_nf; +extern compop_func op_c078_0_comp_nf; +extern compop_func op_c079_0_comp_nf; +extern compop_func op_c07a_0_comp_nf; +extern compop_func op_c07b_0_comp_nf; +extern compop_func op_c07c_0_comp_nf; +extern compop_func op_c080_0_comp_nf; +extern compop_func op_c090_0_comp_nf; +extern compop_func op_c098_0_comp_nf; +extern compop_func op_c0a0_0_comp_nf; +extern compop_func op_c0a8_0_comp_nf; +extern compop_func op_c0b0_0_comp_nf; +extern compop_func op_c0b8_0_comp_nf; +extern compop_func op_c0b9_0_comp_nf; +extern compop_func op_c0ba_0_comp_nf; +extern compop_func op_c0bb_0_comp_nf; +extern compop_func op_c0bc_0_comp_nf; +extern compop_func op_c0c0_0_comp_nf; +extern compop_func op_c0d0_0_comp_nf; +extern compop_func op_c0d8_0_comp_nf; +extern compop_func op_c0e0_0_comp_nf; +extern compop_func op_c0e8_0_comp_nf; +extern compop_func op_c0f0_0_comp_nf; +extern compop_func op_c0f8_0_comp_nf; +extern compop_func op_c0f9_0_comp_nf; +extern compop_func op_c0fa_0_comp_nf; +extern compop_func op_c0fb_0_comp_nf; +extern compop_func op_c0fc_0_comp_nf; +extern compop_func op_c110_0_comp_nf; +extern compop_func op_c118_0_comp_nf; +extern compop_func op_c120_0_comp_nf; +extern compop_func op_c128_0_comp_nf; +extern compop_func op_c130_0_comp_nf; +extern compop_func op_c138_0_comp_nf; +extern compop_func op_c139_0_comp_nf; +extern compop_func op_c140_0_comp_nf; +extern compop_func op_c148_0_comp_nf; +extern compop_func op_c150_0_comp_nf; +extern compop_func op_c158_0_comp_nf; +extern compop_func op_c160_0_comp_nf; +extern compop_func op_c168_0_comp_nf; +extern compop_func op_c170_0_comp_nf; +extern compop_func op_c178_0_comp_nf; +extern compop_func op_c179_0_comp_nf; +extern compop_func op_c188_0_comp_nf; +extern compop_func op_c190_0_comp_nf; +extern compop_func op_c198_0_comp_nf; +extern compop_func op_c1a0_0_comp_nf; +extern compop_func op_c1a8_0_comp_nf; +extern compop_func op_c1b0_0_comp_nf; +extern compop_func op_c1b8_0_comp_nf; +extern compop_func op_c1b9_0_comp_nf; +extern compop_func op_c1c0_0_comp_nf; +extern compop_func op_c1d0_0_comp_nf; +extern compop_func op_c1d8_0_comp_nf; +extern compop_func op_c1e0_0_comp_nf; +extern compop_func op_c1e8_0_comp_nf; +extern compop_func op_c1f0_0_comp_nf; +extern compop_func op_c1f8_0_comp_nf; +extern compop_func op_c1f9_0_comp_nf; +extern compop_func op_c1fa_0_comp_nf; +extern compop_func op_c1fb_0_comp_nf; +extern compop_func op_c1fc_0_comp_nf; +extern compop_func op_d000_0_comp_nf; +extern compop_func op_d010_0_comp_nf; +extern compop_func op_d018_0_comp_nf; +extern compop_func op_d020_0_comp_nf; +extern compop_func op_d028_0_comp_nf; +extern compop_func op_d030_0_comp_nf; +extern compop_func op_d038_0_comp_nf; +extern compop_func op_d039_0_comp_nf; +extern compop_func op_d03a_0_comp_nf; +extern compop_func op_d03b_0_comp_nf; +extern compop_func op_d03c_0_comp_nf; +extern compop_func op_d040_0_comp_nf; +extern compop_func op_d048_0_comp_nf; +extern compop_func op_d050_0_comp_nf; +extern compop_func op_d058_0_comp_nf; +extern compop_func op_d060_0_comp_nf; +extern compop_func op_d068_0_comp_nf; +extern compop_func op_d070_0_comp_nf; +extern compop_func op_d078_0_comp_nf; +extern compop_func op_d079_0_comp_nf; +extern compop_func op_d07a_0_comp_nf; +extern compop_func op_d07b_0_comp_nf; +extern compop_func op_d07c_0_comp_nf; +extern compop_func op_d080_0_comp_nf; +extern compop_func op_d088_0_comp_nf; +extern compop_func op_d090_0_comp_nf; +extern compop_func op_d098_0_comp_nf; +extern compop_func op_d0a0_0_comp_nf; +extern compop_func op_d0a8_0_comp_nf; +extern compop_func op_d0b0_0_comp_nf; +extern compop_func op_d0b8_0_comp_nf; +extern compop_func op_d0b9_0_comp_nf; +extern compop_func op_d0ba_0_comp_nf; +extern compop_func op_d0bb_0_comp_nf; +extern compop_func op_d0bc_0_comp_nf; +extern compop_func op_d0c0_0_comp_nf; +extern compop_func op_d0c8_0_comp_nf; +extern compop_func op_d0d0_0_comp_nf; +extern compop_func op_d0d8_0_comp_nf; +extern compop_func op_d0e0_0_comp_nf; +extern compop_func op_d0e8_0_comp_nf; +extern compop_func op_d0f0_0_comp_nf; +extern compop_func op_d0f8_0_comp_nf; +extern compop_func op_d0f9_0_comp_nf; +extern compop_func op_d0fa_0_comp_nf; +extern compop_func op_d0fb_0_comp_nf; +extern compop_func op_d0fc_0_comp_nf; +extern compop_func op_d100_0_comp_nf; +extern compop_func op_d108_0_comp_nf; +extern compop_func op_d110_0_comp_nf; +extern compop_func op_d118_0_comp_nf; +extern compop_func op_d120_0_comp_nf; +extern compop_func op_d128_0_comp_nf; +extern compop_func op_d130_0_comp_nf; +extern compop_func op_d138_0_comp_nf; +extern compop_func op_d139_0_comp_nf; +extern compop_func op_d140_0_comp_nf; +extern compop_func op_d148_0_comp_nf; +extern compop_func op_d150_0_comp_nf; +extern compop_func op_d158_0_comp_nf; +extern compop_func op_d160_0_comp_nf; +extern compop_func op_d168_0_comp_nf; +extern compop_func op_d170_0_comp_nf; +extern compop_func op_d178_0_comp_nf; +extern compop_func op_d179_0_comp_nf; +extern compop_func op_d180_0_comp_nf; +extern compop_func op_d188_0_comp_nf; +extern compop_func op_d190_0_comp_nf; +extern compop_func op_d198_0_comp_nf; +extern compop_func op_d1a0_0_comp_nf; +extern compop_func op_d1a8_0_comp_nf; +extern compop_func op_d1b0_0_comp_nf; +extern compop_func op_d1b8_0_comp_nf; +extern compop_func op_d1b9_0_comp_nf; +extern compop_func op_d1c0_0_comp_nf; +extern compop_func op_d1c8_0_comp_nf; +extern compop_func op_d1d0_0_comp_nf; +extern compop_func op_d1d8_0_comp_nf; +extern compop_func op_d1e0_0_comp_nf; +extern compop_func op_d1e8_0_comp_nf; +extern compop_func op_d1f0_0_comp_nf; +extern compop_func op_d1f8_0_comp_nf; +extern compop_func op_d1f9_0_comp_nf; +extern compop_func op_d1fa_0_comp_nf; +extern compop_func op_d1fb_0_comp_nf; +extern compop_func op_d1fc_0_comp_nf; +extern compop_func op_e000_0_comp_nf; +extern compop_func op_e008_0_comp_nf; +extern compop_func op_e018_0_comp_nf; +extern compop_func op_e020_0_comp_nf; +extern compop_func op_e028_0_comp_nf; +extern compop_func op_e038_0_comp_nf; +extern compop_func op_e040_0_comp_nf; +extern compop_func op_e048_0_comp_nf; +extern compop_func op_e058_0_comp_nf; +extern compop_func op_e060_0_comp_nf; +extern compop_func op_e068_0_comp_nf; +extern compop_func op_e078_0_comp_nf; +extern compop_func op_e080_0_comp_nf; +extern compop_func op_e088_0_comp_nf; +extern compop_func op_e098_0_comp_nf; +extern compop_func op_e0a0_0_comp_nf; +extern compop_func op_e0a8_0_comp_nf; +extern compop_func op_e0b8_0_comp_nf; +extern compop_func op_e100_0_comp_nf; +extern compop_func op_e108_0_comp_nf; +extern compop_func op_e118_0_comp_nf; +extern compop_func op_e120_0_comp_nf; +extern compop_func op_e128_0_comp_nf; +extern compop_func op_e138_0_comp_nf; +extern compop_func op_e140_0_comp_nf; +extern compop_func op_e148_0_comp_nf; +extern compop_func op_e158_0_comp_nf; +extern compop_func op_e160_0_comp_nf; +extern compop_func op_e168_0_comp_nf; +extern compop_func op_e178_0_comp_nf; +extern compop_func op_e180_0_comp_nf; +extern compop_func op_e188_0_comp_nf; +extern compop_func op_e198_0_comp_nf; +extern compop_func op_e1a0_0_comp_nf; +extern compop_func op_e1a8_0_comp_nf; +extern compop_func op_e1b8_0_comp_nf; +extern compop_func op_f200_0_comp_nf; +extern compop_func op_f208_0_comp_nf; +extern compop_func op_f210_0_comp_nf; +extern compop_func op_f218_0_comp_nf; +extern compop_func op_f220_0_comp_nf; +extern compop_func op_f228_0_comp_nf; +extern compop_func op_f230_0_comp_nf; +extern compop_func op_f238_0_comp_nf; +extern compop_func op_f239_0_comp_nf; +extern compop_func op_f23a_0_comp_nf; +extern compop_func op_f23b_0_comp_nf; +extern compop_func op_f23c_0_comp_nf; +extern compop_func op_f240_0_comp_nf; +extern compop_func op_f250_0_comp_nf; +extern compop_func op_f258_0_comp_nf; +extern compop_func op_f260_0_comp_nf; +extern compop_func op_f268_0_comp_nf; +extern compop_func op_f270_0_comp_nf; +extern compop_func op_f278_0_comp_nf; +extern compop_func op_f279_0_comp_nf; +extern compop_func op_f280_0_comp_nf; +extern compop_func op_f2c0_0_comp_nf; +extern compop_func op_f600_0_comp_nf; +extern compop_func op_f608_0_comp_nf; +extern compop_func op_f610_0_comp_nf; +extern compop_func op_f618_0_comp_nf; +extern compop_func op_f620_0_comp_nf; diff --git a/src/cpudefs.c b/src/cpudefs.c new file mode 100644 index 0000000..b1870cf --- /dev/null +++ b/src/cpudefs.c @@ -0,0 +1,184 @@ +#include "sysconfig.h" +#include "uae_types.h" +#include "readcpu.h" +struct instr_def defs68k[] = { +{ 60, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "ORSR.B #1"}, +{ 124, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "ORSR.W #1"}, +{ 192, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 63936, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 0, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "OR.z #z,d[!Areg]"}, +{ 572, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "ANDSR.B #1"}, +{ 636, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "ANDSR.W #1"}, +{ 512, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "AND.z #z,d[!Areg]"}, +{ 1024, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "SUB.z #z,d[!Areg]"}, +{ 1536, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADD.z #z,d[!Areg]"}, +{ 1728, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 1728, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "RTM s[Dreg,Areg]"}, +{ 2048, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 17, "BTST #1,s[!Areg]"}, +{ 2112, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCHG #1,s[!Areg,Immd]"}, +{ 2176, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCLR #1,s[!Areg,Immd]"}, +{ 2240, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BSET #1,s[!Areg,Immd]"}, +{ 2620, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "EORSR.B #1"}, +{ 2684, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "EORSR.W #1"}, +{ 2560, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "EOR.z #z,d[!Areg]"}, +{ 3072, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMP.z #z,s[!Areg,Immd]"}, +{ 2752, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3264, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3324, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CAS2.W #2"}, +{ 3584, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 65280, 2, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3776, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3836, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CAS2.L #2"}, +{ 256, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPMR.W d[Areg-Ad16],Dr"}, +{ 320, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPMR.L d[Areg-Ad16],Dr"}, +{ 384, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPRM.W Dr,d[Areg-Ad16]"}, +{ 448, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPRM.L Dr,d[Areg-Ad16]"}, +{ 256, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 17, "BTST Dr,s[!Areg]"}, +{ 320, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCHG Dr,s[!Areg,Immd]"}, +{ 384, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCLR Dr,s[!Areg,Immd]"}, +{ 448, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BSET Dr,s[!Areg,Immd]"}, +{ 4096, 12, {14,14,14,13,13,13,11,11,11,12,12,12,0,0,0,0}, 61440, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 18, "MOVE.B s,d[!Areg]"}, +{ 8192, 12, {14,14,14,13,13,13,11,11,11,12,12,12,0,0,0,0}, 61440, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVEA.L s,d[Areg]"}, +{ 8192, 12, {14,14,14,13,13,13,11,11,11,12,12,12,0,0,0,0}, 61440, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 18, "MOVE.L s,d[!Areg]"}, +{ 12288, 12, {14,14,14,13,13,13,11,11,11,12,12,12,0,0,0,0}, 61440, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVEA.W s,d[Areg]"}, +{ 12288, 12, {14,14,14,13,13,13,11,11,11,12,12,12,0,0,0,0}, 61440, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 18, "MOVE.W s,d[!Areg]"}, +{ 16384, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 0, 0 }, { 1, 4 }, { 0, 0 }, { 1, 4 }, { 1, 0 } }, 48, "NEGX.z d[!Areg]"}, +{ 16576, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 1, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "MVSR2.W d[!Areg]"}, +{ 16896, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 2 }, { 1, 3 }, { 1, 2 }, { 1, 2 } }, 32, "CLR.z d[!Areg]"}, +{ 17088, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 1, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "MVSR2.B d[!Areg]"}, +{ 17408, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 48, "NEG.z d[!Areg]"}, +{ 17600, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 16, "MV2SR.B s[!Areg]"}, +{ 17920, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 48, "NOT.z d[!Areg]"}, +{ 18112, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "MV2SR.W s[!Areg]"}, +{ 18440, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 2, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 49, "LINK.L Ar,#2"}, +{ 18432, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 0, 0 }, { 1, 5 }, { 0, 0 }, { 1, 5 }, { 1, 0 } }, 48, "NBCD.B d[!Areg]"}, +{ 18504, 3, {9,9,9,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "BKPT #k"}, +{ 18496, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 48, "SWAP.W s[Dreg]"}, +{ 18496, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 18560, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 48, "EXT.W d[Dreg]"}, +{ 18560, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "MVMLE.W #1,d[!Dreg,Areg,Aipi]"}, +{ 18624, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 48, "EXT.L d[Dreg]"}, +{ 18624, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "MVMLE.L #1,d[!Dreg,Areg,Aipi]"}, +{ 18880, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 48, "EXT.B d[Dreg]"}, +{ 18944, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 16, "TST.z s"}, +{ 19136, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 48, "TAS.B d[!Areg]"}, +{ 19196, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 0, "ILLEGAL"}, +{ 19456, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "MULL.L #1,s[!Areg]"}, +{ 19520, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "DIVL.L #1,s[!Areg]"}, +{ 19584, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 1, "MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]"}, +{ 19648, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 1, "MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]"}, +{ 20032, 4, {8,8,8,8,0,0,0,0,0,0,0,0,0,0,0,0}, 65520, 0, 0, { { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 } }, 16, "TRAP #J"}, +{ 20048, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 49, "LINK.W Ar,#1"}, +{ 20056, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 48, "UNLK.L Ar"}, +{ 20064, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 0, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 16, "MVR2USP.L Ar"}, +{ 20072, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 0, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 32, "MVUSP2R.L Ar"}, +{ 20080, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "RESET"}, +{ 20081, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "NOP"}, +{ 20082, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 16, "STOP #1"}, +{ 20083, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 0, "RTE"}, +{ 20084, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "RTD #1"}, +{ 20085, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "RTS"}, +{ 20086, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 }, { 0, 1 } }, 0, "TRAPV"}, +{ 20087, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 0, "RTR"}, +{ 20090, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 1, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "MOVEC2 #1"}, +{ 20091, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 1, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "MOVE2C #1"}, +{ 20096, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 4, 6 }, { 4, 6 }, { 4, 6 }, { 4, 6 }, { 4, 6 } }, 128, "JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 16640, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "CHK.L s[!Areg],Dr"}, +{ 16768, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "CHK.W s[!Areg],Dr"}, +{ 20160, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 4, 6 }, { 4, 6 }, { 4, 6 }, { 4, 6 }, { 4, 6 } }, 128, "JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 16832, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar"}, +{ 20544, 9, {7,7,7,13,13,13,14,14,14,0,0,0,0,0,0,0}, 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}, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROf.z Dr,DR"}, +{ 57536, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ASfW.W d[!Dreg,Areg]"}, +{ 58048, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "LSfW.W d[!Dreg,Areg]"}, +{ 58560, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROXfW.W d[!Dreg,Areg]"}, +{ 59072, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROfW.W d[!Dreg,Areg]"}, +{ 59584, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFTST #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 59840, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 60096, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 60352, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 60608, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 60864, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFFFO #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 61120, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 61376, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 61952, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FPP #1,s"}, +{ 62016, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FDBcc #1,s[Areg-Dreg]"}, +{ 62016, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FScc #1,s[!Areg,Immd,PC8r,PC16]"}, +{ 62074, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FTRAPcc #1"}, +{ 62075, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FTRAPcc #2"}, +{ 62076, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 0, "FTRAPcc"}, +{ 62080, 6, {10,10,10,10,10,10,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FBcc #K,#1"}, +{ 62144, 6, {10,10,10,10,10,10,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FBcc #K,#2"}, +{ 62208, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 32, "FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"}, +{ 62272, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FRESTORE s[!Dreg,Areg,Apdi,Immd]"}, +{ 62720, 8, {5,5,5,5,5,12,12,12,0,0,0,0,0,0,0,0}, 65280, 4, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "MMUOP #i,s"}, +{ 62472, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CINVL #p,Ar"}, +{ 62480, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CINVP #p,Ar"}, +{ 62488, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "CINVA #p"}, +{ 62504, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CPUSHL #p,Ar"}, +{ 62512, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CPUSHP #p,Ar"}, +{ 62520, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "CPUSHA #p"}, +{ 63008, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 ArP,AxP"}, +{ 62976, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 s[Dreg-Aipi],L"}, +{ 62976, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 L,d[Areg-Aipi]"}, +{ 62976, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 s[Aind],L"}, +{ 62976, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 L,d[Aipi-Aind]"}}; +int n_defs68k = 179; diff --git a/src/cpuemu_0.c b/src/cpuemu_0.c new file mode 100644 index 0000000..2af5980 --- /dev/null +++ b/src/cpuemu_0.c @@ -0,0 +1,31976 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "machdep/m68kops.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define CPUFUNC(x) x##_ff +#define SET_CFLG_ALWAYS(flags, x) SET_CFLG(flags, x) +#define SET_NFLG_ALWAYS(flags, x) SET_NFLG(flags, x) +#ifdef NOFLAGS +#include "noflags.h" +#endif + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +/* OR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* OR.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* OR.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* OR.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* OR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* OR.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0038_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* OR.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0039_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ORSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_003c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + src &= 0xFF; + regs->sr |= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* OR.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* OR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* OR.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0078_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* OR.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0079_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* ORSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_007c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel18; } +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + regs->sr |= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel18: ; +return CYCLE_UNIT / 2 * 8; +} +/* OR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* OR.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* OR.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* OR.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_00a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 30; +} +/* OR.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_00a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* OR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_00b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* OR.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_00b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* OR.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_00b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 36; +} +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel27; } +} +}}} m68k_incpc (regs, 4); +endlabel27: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel28; } +} +}}} m68k_incpc (regs, 6); +endlabel28: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel29; } +} +}}}}endlabel29: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel30; } +} +}}} m68k_incpc (regs, 6); +endlabel30: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel31; } +} +}}} m68k_incpc (regs, 8); +endlabel31: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel32; } +} +}}} m68k_incpc (regs, 6); +endlabel32: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_00fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel33; } +} +}}}}endlabel33: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* BTST.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPMR.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_u16 val = (get_byte (memp) << 8) + get_byte (memp + 2); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* BTST.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* BTST.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_013a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_013b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* BTST.B Dn,#.B */ +unsigned long REGPARAM2 CPUFUNC(op_013c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = get_ibyte (regs, 2); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPMR.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_u32 val = (get_byte (memp) << 24) + (get_byte (memp + 2) << 16) + + (get_byte (memp + 4) << 8) + get_byte (memp + 6); + m68k_dreg (regs, dstreg) = (val); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCHG.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BCHG.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_017a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_017b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BCLR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPRM.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (memp, src >> 8); put_byte (memp + 2, src); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCLR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCLR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCLR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BCLR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_01b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_01b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_01ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BSET.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_01c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPRM.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (memp, src >> 24); put_byte (memp + 2, src >> 16); + put_byte (memp + 4, src >> 8); put_byte (memp + 6, src); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BSET.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BSET.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_01d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BSET.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BSET.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BSET.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_01f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_01f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_01fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* AND.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0200_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0210_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* AND.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0218_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* AND.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0220_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* AND.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0228_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* AND.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0230_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* AND.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0238_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* AND.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0239_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ANDSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_023c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + src |= 0xFF00; + regs->sr &= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0240_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0250_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0258_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0260_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0268_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* AND.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0270_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* AND.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0278_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* AND.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0279_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* ANDSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_027c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel96; } +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + regs->sr &= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel96: ; +return CYCLE_UNIT / 2 * 8; +} +/* AND.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0280_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* AND.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0290_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* AND.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0298_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* AND.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_02a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 30; +} +/* AND.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_02a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* AND.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_02b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* AND.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_02b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* AND.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_02b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 36; +} +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel105; } +} +}}} m68k_incpc (regs, 4); +endlabel105: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel106; } +} +}}} m68k_incpc (regs, 6); +endlabel106: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel107; } +} +}}}}endlabel107: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel108; } +} +}}} m68k_incpc (regs, 6); +endlabel108: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel109; } +} +}}} m68k_incpc (regs, 8); +endlabel109: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel110; } +} +}}} m68k_incpc (regs, 6); +endlabel110: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_02fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel111; } +} +}}}}endlabel111: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* SUB.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0400_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0410_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0418_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0420_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* SUB.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0428_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0430_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* SUB.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0438_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0439_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* SUB.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0440_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0450_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0458_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0460_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0468_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0470_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 22; +} +/* SUB.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0478_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0479_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0480_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0490_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0498_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_04a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 30; +} +/* SUB.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_04a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* SUB.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_04b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 34; +} +/* SUB.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_04b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* SUB.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_04b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 36; +} +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel136; } +} +}}} m68k_incpc (regs, 4); +endlabel136: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel137; } +} +}}} m68k_incpc (regs, 6); +endlabel137: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel138; } +} +}}}}endlabel138: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel139; } +} +}}} m68k_incpc (regs, 6); +endlabel139: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel140; } +} +}}} m68k_incpc (regs, 8); +endlabel140: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel141; } +} +}}} m68k_incpc (regs, 6); +endlabel141: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_04fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); + {uae_s32 upper,lower,reg = regs->regs[(extra >> 12) & 15]; + lower=get_long(dsta); upper = get_long(dsta+4); + SET_ZFLG (®s->ccrflags, (upper == reg || lower == reg) ? 1 : 0); + SET_CFLG_ALWAYS (®s->ccrflags, lower <= upper ? ((reg < lower || reg > upper) ? 1 : 0) : ((reg > upper || reg < lower) ? 1 : 0)); + if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception (6, regs, oldpc); goto endlabel142; } +} +}}}}endlabel142: ; +return CYCLE_UNIT / 2 * 14; +} +#endif +/* ADD.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0600_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0610_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0618_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0620_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* ADD.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0628_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0630_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* ADD.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0638_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0639_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ADD.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0640_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0650_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0658_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0660_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0668_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0670_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 22; +} +/* ADD.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0678_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0679_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0680_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0690_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0698_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_06a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 30; +} +/* ADD.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_06a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* ADD.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_06b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 34; +} +/* ADD.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_06b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* ADD.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_06b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 36; +} +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_06fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* BTST.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0800_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0810_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0818_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0820_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BTST.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0828_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0830_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BTST.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0838_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0839_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 20; +} +/* BTST.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_083a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_083b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* BTST.B #.W,#.B */ +unsigned long REGPARAM2 CPUFUNC(op_083c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s8 dst = get_ibyte (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0840_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCHG.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0850_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0858_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0860_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0868_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0870_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* BCHG.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0878_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0879_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BCHG.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_087a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_087b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* BCLR.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0880_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCLR.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0890_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0898_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_08a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* BCLR.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_08b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_08b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BCLR.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_08ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* BSET.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_08c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BSET.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_08d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_08e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* BSET.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_08f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_08f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BSET.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_08fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* EOR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a00_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a10_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a18_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a20_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* EOR.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a28_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a30_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* EOR.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0a38_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0a39_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* EORSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_0a3c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + src &= 0xFF; + regs->sr ^= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a40_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* EOR.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a70_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* EOR.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0a78_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0a79_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +#endif + +#ifdef PART_2 +/* EORSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_0a7c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel234; } +{ MakeSR (regs); +{ uae_s16 src = get_iword (regs, 2); + regs->sr ^= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel234: ; +return CYCLE_UNIT / 2 * 8; +} +/* EOR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a80_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* EOR.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a98_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* EOR.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0aa0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 30; +} +/* EOR.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0aa8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* EOR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0ab0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* EOR.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0ab8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +/* EOR.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0ab9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 36; +} +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ad0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ad8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ae0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ae8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0af0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0af8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0af9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpb (regs, (uae_s8)(m68k_dreg (regs, rc)), (uae_s8)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +#endif +/* CMP.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c00_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c10_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c18_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c20_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMP.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c28_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c30_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 22; +} +/* CMP.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0c38_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0c39_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0c3a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0c3b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* CMP.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c40_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c70_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* CMP.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0c78_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0c79_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0c7a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0c7b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +#endif +/* CMP.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c80_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c98_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0ca0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* CMP.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0ca8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* CMP.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0cb0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* CMP.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0cb8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* CMP.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0cb9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 10); +return CYCLE_UNIT / 2 * 28; +} +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 6; + dsta += (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cbb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 6); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 26; +} +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ce0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ce8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s16 dst = get_word (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, rc)), (uae_s16)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0cfc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 extra = get_ilong (regs, 2); + uae_u32 rn1 = regs->regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs->regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2); + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, (extra >> 16) & 7)), (uae_s16)(dst1)); + if (GET_ZFLG (®s->ccrflags)) { + optflag_cmpw (regs, (uae_s16)(m68k_dreg (regs, extra & 7)), (uae_s16)(dst2)); + if (GET_ZFLG (®s->ccrflags)) { + put_word(rn1, m68k_dreg (regs, (extra >> 22) & 7)); + put_word(rn1, m68k_dreg (regs, (extra >> 6) & 7)); + }} + if (! GET_ZFLG (®s->ccrflags)) { + m68k_dreg (regs, (extra >> 22) & 7) = (m68k_dreg (regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg (regs, (extra >> 6) & 7) = (m68k_dreg (regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff); + } +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e10_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel288; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s8 src = get_byte (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel288: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e18_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel289; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel289: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e20_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel290; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); +}}else{{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel290: ; +return CYCLE_UNIT / 2 * 20; +} +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e28_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel291; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s8 src = get_byte (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 8); +endlabel291: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e30_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel292; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); +}}}else{{ uaecptr srca; +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}}}endlabel292: ; +return CYCLE_UNIT / 2 * 28; +} +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e38_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel293; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); +}}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s8 src = get_byte (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 8); +endlabel293: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e39_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel294; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); +}}else{{ uaecptr srca = get_ilong (regs, 8); +{ uae_s8 src = get_byte (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } +}}}}}} m68k_incpc (regs, 12); +endlabel294: ; +return CYCLE_UNIT / 2 * 32; +} +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel295; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s16 src = get_word (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel295: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel296; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel296: ; +return CYCLE_UNIT / 2 * 16; +} +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel297; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); +}}else{{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 4); +endlabel297: ; +return CYCLE_UNIT / 2 * 20; +} +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel298; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s16 src = get_word (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 8); +endlabel298: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e70_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel299; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); +}}}else{{ uaecptr srca; +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}}}endlabel299: ; +return CYCLE_UNIT / 2 * 28; +} +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e78_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel300; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); +}}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s16 src = get_word (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 8); +endlabel300: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e79_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel301; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); +}}else{{ uaecptr srca = get_ilong (regs, 8); +{ uae_s16 src = get_word (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (m68k_dreg (regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } +}}}}}} m68k_incpc (regs, 12); +endlabel301: ; +return CYCLE_UNIT / 2 * 32; +} +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel302; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s32 src = get_long (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 4); +endlabel302: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0e98_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel303; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 4); +endlabel303: ; +return CYCLE_UNIT / 2 * 24; +} +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ea0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel304; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); +}}else{{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 4); +endlabel304: ; +return CYCLE_UNIT / 2 * 28; +} +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ea8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel305; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); +}}else{{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 src = get_long (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 8); +endlabel305: ; +return CYCLE_UNIT / 2 * 32; +} +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0eb0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel306; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); +}}}else{{ uaecptr srca; +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}}}endlabel306: ; +return CYCLE_UNIT / 2 * 36; +} +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0eb8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel307; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); +}}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 6); +{ uae_s32 src = get_long (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 8); +endlabel307: ; +return CYCLE_UNIT / 2 * 32; +} +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0eb9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel308; } +{{ uae_s16 extra = get_iword (regs, 2); + if (extra & 0x800) +{ uae_u32 src = regs->regs[(extra >> 12) & 15]; +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); +}}else{{ uaecptr srca = get_ilong (regs, 8); +{ uae_s32 src = get_long (srca); + if (extra & 0x8000) { + m68k_areg (regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg (regs, (extra >> 12) & 7) = (src); + } +}}}}}} m68k_incpc (regs, 12); +endlabel308: ; +return CYCLE_UNIT / 2 * 40; +} +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ed0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ed8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ee0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ee8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 dst = get_long (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ef0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}}}return CYCLE_UNIT / 2 * 30; +} +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ef8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 dst = get_long (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0ef9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 dst = get_long (dsta); +{ int ru = (src >> 6) & 7; + int rc = src & 7; + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, rc)), (uae_s32)(dst)); + if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg (regs, ru))); +}else{m68k_dreg (regs, rc) = dst; +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 32; +} +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_0efc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 extra = get_ilong (regs, 2); + uae_u32 rn1 = regs->regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs->regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2); + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, (extra >> 16) & 7)), (uae_s32)(dst1)); + if (GET_ZFLG (®s->ccrflags)) { + optflag_cmpl (regs, (uae_s32)(m68k_dreg (regs, extra & 7)), (uae_s32)(dst2)); + if (GET_ZFLG (®s->ccrflags)) { + put_long(rn1, m68k_dreg (regs, (extra >> 22) & 7)); + put_long(rn1, m68k_dreg (regs, (extra >> 6) & 7)); + }} + if (! GET_ZFLG (®s->ccrflags)) { + m68k_dreg (regs, (extra >> 22) & 7) = dst1; + m68k_dreg (regs, (extra >> 6) & 7) = dst2; + } +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVE.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 10; +} +/* MOVE.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = get_ilong (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = get_ilong (regs, 2); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 10); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.B (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2008_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_2040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_2048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_2058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_2070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_2078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_2079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVEA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_207a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_207b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_207c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_3 +/* MOVE.L (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = get_ilong (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = get_ilong (regs, 2); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); +}}}}return CYCLE_UNIT / 2 * 36; +} +/* MOVE.L (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta = get_ilong (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); +}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3008_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 10; +} +/* MOVE.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_3040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_3048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_3058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 10; +} +/* MOVEA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_3070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_3078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_3079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_307a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_307b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_307c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + m68k_incpc (regs, 6); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = get_ilong (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = get_ilong (regs, 2); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 10); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.W (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 0); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}return CYCLE_UNIT / 2 * 20; +} +/* NEGX.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEGX.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NEGX.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4038_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4039_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((newv) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEGX.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NEGX.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4078_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4079_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_40a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* NEGX.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_40a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NEGX.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* NEGX.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_40b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NEGX.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_40b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* MVSR2.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_40c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel645; } +{{ MakeSR (regs); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); +}}} m68k_incpc (regs, 2); +endlabel645: ; +return CYCLE_UNIT / 2 * 4; +} +/* MVSR2.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_40d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel646; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel646: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_40d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel647; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 2; + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel647: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel648; } +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + m68k_areg (regs, srcreg) = srca; + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel648: ; +return CYCLE_UNIT / 2 * 10; +} +/* MVSR2.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel649; } +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel649: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel650; } +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + MakeSR (regs); + put_word (srca,regs->sr); +}}}}endlabel650: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVSR2.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_40f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel651; } +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel651: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_40f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel652; } +{{ uaecptr srca = get_ilong (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 6); +endlabel652: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel653; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel653; + } +}}}endlabel653: ; +return CYCLE_UNIT / 2 * 4; +} +/* CHK.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel654; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel654; + } +}}}}endlabel654: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel655; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel655; + } +}}}}endlabel655: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel656; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel656; + } +}}}}endlabel656: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel657; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel657; + } +}}}}endlabel657: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel658; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel658; + } +}}}}}endlabel658: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel659; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel659; + } +}}}}endlabel659: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel660; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel660; + } +}}}}endlabel660: ; +return CYCLE_UNIT / 2 * 20; +} +/* CHK.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel661; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel661; + } +}}}}endlabel661: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel662; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel662; + } +}}}}}endlabel662: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel663; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel663; + } +}}}endlabel663: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel664; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel664; + } +}}}endlabel664: ; +return CYCLE_UNIT / 2 * 4; +} +/* CHK.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel665; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel665; + } +}}}}endlabel665: ; +return CYCLE_UNIT / 2 * 8; +} +/* CHK.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel666; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel666; + } +}}}}endlabel666: ; +return CYCLE_UNIT / 2 * 8; +} +/* CHK.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel667; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel667; + } +}}}}endlabel667: ; +return CYCLE_UNIT / 2 * 10; +} +/* CHK.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel668; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel668; + } +}}}}endlabel668: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel669; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel669; + } +}}}}}endlabel669: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel670; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel670; + } +}}}}endlabel670: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel671; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel671; + } +}}}}endlabel671: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel672; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel672; + } +}}}}endlabel672: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel673; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel673; + } +}}}}}endlabel673: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel674; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel674; + } +}}}endlabel674: ; +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_41d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LEA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_41e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ m68k_areg (regs, dstreg) = (srca); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_41f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_41f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* LEA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_41fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ m68k_areg (regs, dstreg) = (srca); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* CLR.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4200_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((0) & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4210_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4218_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4220_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CLR.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4228_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4230_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}}return CYCLE_UNIT / 2 * 14; +} +/* CLR.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4238_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4239_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4240_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((0) & 0xffff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4250_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4258_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 2; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4260_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + m68k_areg (regs, srcreg) = srca; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CLR.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4268_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4270_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}return CYCLE_UNIT / 2 * 14; +} +/* CLR.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4278_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4279_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4280_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4290_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +#endif + +#ifdef PART_4 +/* CLR.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4298_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 4; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_42a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + m68k_areg (regs, srcreg) = srca; + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* CLR.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_42a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_42b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}return CYCLE_UNIT / 2 * 18; +} +/* CLR.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_42b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_42b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ MakeSR (regs); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs->sr & 0xff) & 0xffff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 2; + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + m68k_areg (regs, srcreg) = srca; + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* NEG.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4400_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4410_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4418_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4420_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEG.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4428_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4430_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NEG.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4438_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4439_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEG.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4440_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4450_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4458_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4460_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEG.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4468_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4470_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NEG.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4478_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4479_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4480_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + m68k_dreg (regs, srcreg) = (dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4490_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4498_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_44a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* NEG.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_44a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NEG.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* NEG.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_44b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NEG.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_44b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* MV2SR.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_44c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MV2SR.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_44d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_44d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_44e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* MV2SR.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_44e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_44f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_44f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* MV2SR.B (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_44fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.B #.B */ +unsigned long REGPARAM2 CPUFUNC(op_44fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* NOT.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4600_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4610_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4618_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4620_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NOT.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4628_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4630_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NOT.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4638_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4639_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NOT.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4640_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4650_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4658_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4660_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NOT.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4668_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4670_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NOT.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4678_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4679_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4680_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4690_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4698_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_46a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* NOT.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_46a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NOT.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* NOT.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_46b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* NOT.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_46b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* MV2SR.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_46c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel773; } +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->sr = src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +endlabel773: ; +return CYCLE_UNIT / 2 * 4; +} +/* MV2SR.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_46d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel774; } +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel774: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_46d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel775; } +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel775: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_46e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel776; } +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel776: ; +return CYCLE_UNIT / 2 * 10; +} +/* MV2SR.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_46e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel777; } +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel777: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel778; } +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}}}endlabel778: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_46f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel779; } +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel779: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_46f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel780; } +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 6); +endlabel780: ; +return CYCLE_UNIT / 2 * 16; +} +/* MV2SR.W (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_46fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel781; } +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel781: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel782; } +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}}}endlabel782: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_46fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel783; } +{{ uae_s16 src = get_iword (regs, 2); + regs->sr = src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel783: ; +return CYCLE_UNIT / 2 * 8; +} +/* NBCD.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4800_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4808_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr olda; + olda = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = olda; +{ uae_s32 src = m68k_areg (regs, srcreg); + put_long (olda,src); + m68k_areg (regs, srcreg) = (m68k_areg (regs, 7)); +{ uae_s32 offs = get_ilong (regs, 2); + m68k_areg (regs, 7) += offs; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +#endif +/* NBCD.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4810_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NBCD.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4818_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NBCD.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4820_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NBCD.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4828_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NBCD.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4830_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* NBCD.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4838_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NBCD.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4839_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SWAP.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4840_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* BKPT.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4848_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ m68k_incpc (regs, 2); + op_illg (opcode, regs); +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* PEA.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4850_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* PEA.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4868_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4870_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4878_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4879_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* PEA.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_487a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_487b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* EXT.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4880_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u16 dst = (uae_s16)(uae_s8)src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVMLE.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4890_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMLE.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; +{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 2; put_word(srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 2; put_word(srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 10; +} +/* MVMLE.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_48a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + m68k_incpc (regs, 4); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MVMLE.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_48b8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_48b9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = get_ilong (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +/* EXT.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_48c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVMLE.L #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = m68k_areg (regs, dstreg); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMLE.L #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; +{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 4; put_long(srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 4; put_long(srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 10; +} +/* MVMLE.L #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_48e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + m68k_incpc (regs, 4); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MVMLE.L #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_48f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.L #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_48f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca = get_ilong (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +/* EXT.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_49c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_u32 dst = (uae_s32)(uae_s8)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a00_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + optflag_testb (regs, (uae_s8)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a10_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a18_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a20_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* TST.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a28_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a30_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* TST.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4a38_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4a39_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a3a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a3b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a3c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = get_ibyte (regs, 2); + optflag_testb (regs, (uae_s8)(src)); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TST.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a40_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + optflag_testw (regs, (uae_s16)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a48_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); + optflag_testw (regs, (uae_s16)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +#endif +/* TST.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* TST.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a70_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* TST.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4a78_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4a79_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a7a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a7b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a7c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + optflag_testw (regs, (uae_s16)(src)); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TST.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a80_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + optflag_testl (regs, (uae_s32)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4a88_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); + optflag_testl (regs, (uae_s32)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +#endif +/* TST.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TST.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a98_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TST.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4aa0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* TST.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4aa8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TST.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ab0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* TST.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4ab8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TST.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4ab9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4aba_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4abb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}}}return CYCLE_UNIT / 2 * 18; +} +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4abc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + optflag_testl (regs, (uae_s32)(src)); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TAS.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4ac0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((src) & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TAS.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ad0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TAS.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4ad8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TAS.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ae0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* TAS.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ae8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TAS.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4af0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* TAS.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4af8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TAS.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4af9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c00_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + m68k_mull(opcode, dst, extra); +}}}return CYCLE_UNIT / 2 * 8; +} +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c10_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 4); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c18_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + m68k_incpc (regs, 4); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c20_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + m68k_incpc (regs, 4); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 18; +} +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c28_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 6); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c30_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + m68k_mull(opcode, dst, extra); +}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c38_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 6); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c39_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 8); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 24; +} +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c3a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 6); + m68k_mull(opcode, dst, extra); +}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c3b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + m68k_mull(opcode, dst, extra); +}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c3c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uae_s32 dst = get_ilong (regs, 4); + m68k_incpc (regs, 8); + m68k_mull(opcode, dst, extra); +}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c40_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + m68k_divl(opcode, dst, extra, oldpc); +}}}}return CYCLE_UNIT / 2 * 8; +} +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 2); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + m68k_incpc (regs, 2); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + m68k_incpc (regs, 2); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 18; +} +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 4); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c70_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c78_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 4); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c79_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 6); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 24; +} +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c7a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + m68k_incpc (regs, 4); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}return CYCLE_UNIT / 2 * 20; +} +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c7b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + m68k_divl(opcode, dst, extra, oldpc); +}}}}}}return CYCLE_UNIT / 2 * 22; +} +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4c7c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); +{ uae_s32 dst = get_ilong (regs, 2); + m68k_incpc (regs, 6); + m68k_divl(opcode, dst, extra, oldpc); +}}}}return CYCLE_UNIT / 2 * 16; +} +#endif +/* MVMEL.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4c90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4c98_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + m68k_areg (regs, dstreg) = srca; +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ca8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cb0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + m68k_incpc (regs, 4); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4cb8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4cb9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = get_ilong (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +/* MVMEL.W #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4cba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cbb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4cd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.L #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4cd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + m68k_areg (regs, dstreg) = srca; +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.L #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ce8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + m68k_incpc (regs, 4); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4cf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4cf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = get_ilong (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +/* MVMEL.L #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4cfa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_iword (regs, 4); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cfb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}}}return CYCLE_UNIT / 2 * 14; +} +/* TRAP.L # */ +unsigned long REGPARAM2 CPUFUNC(op_4e40_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 15); +{{ uae_u32 src = srcreg; + m68k_incpc (regs, 2); + Exception (src + 32, regs, 0); +}}return CYCLE_UNIT / 2 * 4; +} +/* LINK.W An,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e50_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr olda; + olda = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = olda; +{ uae_s32 src = m68k_areg (regs, srcreg); + put_long (olda,src); + m68k_areg (regs, srcreg) = (m68k_areg (regs, 7)); +{ uae_s16 offs = get_iword (regs, 2); + m68k_areg (regs, 7) += offs; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* UNLK.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e58_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); + m68k_areg (regs, 7) = src; +{ uaecptr olda = m68k_areg (regs, 7); +{ uae_s32 old = get_long (olda); + m68k_areg (regs, 7) += 4; + m68k_areg (regs, srcreg) = (old); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* MVR2USP.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e60_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel901; } +{{ uae_s32 src = m68k_areg (regs, srcreg); + regs->usp = src; +}}} m68k_incpc (regs, 2); +endlabel901: ; +return CYCLE_UNIT / 2 * 4; +} +/* MVUSP2R.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e68_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel902; } +{{ m68k_areg (regs, srcreg) = (regs->usp); +}}} m68k_incpc (regs, 2); +endlabel902: ; +return CYCLE_UNIT / 2 * 4; +} +/* RESET.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e70_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel903; } +{ cpureset(); +}} m68k_incpc (regs, 2); +endlabel903: ; +return CYCLE_UNIT / 2 * 4; +} +/* NOP.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e71_0)(uae_u32 opcode, struct regstruct *regs) +{ +{} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* STOP.L #.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel905; } +{{ uae_s16 src = get_iword (regs, 2); + regs->sr = src; + MakeFromSR (regs); + m68k_setstopped (regs, 1); + m68k_incpc (regs, 4); +}}}endlabel905: ; +return CYCLE_UNIT / 2 * 8; +} +/* RTE.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel906; } +{ uae_u16 newsr; uae_u32 newpc; for (;;) { +{ uaecptr sra = m68k_areg (regs, 7); +{ uae_s16 sr = get_word (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); +{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; +{ uaecptr formata = m68k_areg (regs, 7); +{ uae_s16 format = get_word (formata); + m68k_areg (regs, 7) += 2; + newsr = sr; newpc = pc; + if ((format & 0xF000) == 0x0000) { break; } + else if ((format & 0xF000) == 0x1000) { ; } + else if ((format & 0xF000) == 0x2000) { m68k_areg (regs, 7) += 4; break; } + else if ((format & 0xF000) == 0x8000) { m68k_areg (regs, 7) += 50; break; } + else if ((format & 0xF000) == 0x7000) { m68k_areg (regs, 7) += 52; break; } + else if ((format & 0xF000) == 0x9000) { m68k_areg (regs, 7) += 12; break; } + else if ((format & 0xF000) == 0xa000) { m68k_areg (regs, 7) += 24; break; } + else if ((format & 0xF000) == 0xb000) { m68k_areg (regs, 7) += 84; break; } + else { Exception (14, regs, 0); goto endlabel906; } + regs->sr = newsr; MakeFromSR (regs); +} +}}}}}} regs->sr = newsr; MakeFromSR (regs); + if (newpc & 1) + exception3 (0x4e73, m68k_getpc (regs), newpc); + else + m68k_setpc (regs, newpc); +}}endlabel906: ; +return CYCLE_UNIT / 2 * 20; +} +/* RTD.L #.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e74_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr pca = m68k_areg (regs, 7); +{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; +{ uae_s16 offs = get_iword (regs, 2); + m68k_areg (regs, 7) += offs; + if (pc & 1) + exception3 (0x4e74, m68k_getpc (regs), pc); + else + m68k_setpc (regs, pc); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* RTS.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e75_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_do_rts (regs); +}return CYCLE_UNIT / 2 * 4; +} +/* TRAPV.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + if (GET_VFLG (®s->ccrflags)) { + Exception (7, regs, m68k_getpc (regs)); + goto endlabel909; + } +}endlabel909: ; +return CYCLE_UNIT / 2 * 4; +} +/* RTR.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uaecptr sra = m68k_areg (regs, 7); +{ uae_s16 sr = get_word (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); +{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; + regs->sr &= 0xFF00; sr &= 0xFF; + regs->sr |= sr; m68k_setpc (regs, pc); + MakeFromSR (regs); +}}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4e7a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel911; } +{{ uae_s16 src = get_iword (regs, 2); +{ int regno = (src >> 12) & 15; + uae_u32 *regp = regs->regs + regno; + if (! m68k_movec2(src & 0xFFF, regp)) goto endlabel911; +}}}} m68k_incpc (regs, 4); +endlabel911: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_4e7b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel912; } +{{ uae_s16 src = get_iword (regs, 2); +{ int regno = (src >> 12) & 15; + uae_u32 *regp = regs->regs + regno; + if (! m68k_move2c(src & 0xFFF, regp)) goto endlabel912; +}}}} m68k_incpc (regs, 4); +endlabel912: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* JSR.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4e90_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr oldpc = m68k_getpc (regs) + 2; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel913; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel913: ; +return CYCLE_UNIT / 2 * 4; +} +/* JSR.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ea8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel914; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel914: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4eb0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uaecptr oldpc = m68k_getpc (regs) + 0; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel915; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}}endlabel915: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4eb8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel916; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel916: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs) + 6; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel917; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel917: ; +return CYCLE_UNIT / 2 * 12; +} +/* JSR.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4eba_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel918; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel918: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ebb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uaecptr oldpc = m68k_getpc (regs) + 0; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel919; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}}endlabel919: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ed0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel920; + } + m68k_setpc (regs, srca); +}}endlabel920: ; +return CYCLE_UNIT / 2 * 4; +} +/* JMP.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ee8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel921; + } + m68k_setpc (regs, srca); +}}endlabel921: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ef0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel922; + } + m68k_setpc (regs, srca); +}}}endlabel922: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4ef8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel923; + } + m68k_setpc (regs, srca); +}}endlabel923: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel924; + } + m68k_setpc (regs, srca); +}}endlabel924: ; +return CYCLE_UNIT / 2 * 12; +} +/* JMP.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4efa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel925; + } + m68k_setpc (regs, srca); +}}endlabel925: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4efb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel926; + } + m68k_setpc (regs, srca); +}}}endlabel926: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.B #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.B #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_5 +/* ADD.B #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.W #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_50a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* ADD.L #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_50a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* ADD.L #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_50b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_50b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_50c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_50c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 0)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel954; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel954: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_50d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_50d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_50e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_50e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_50f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_50f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_50fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 0)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel962; } +}} m68k_incpc (regs, 4); +endlabel962: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_50fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 0)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel963; } +}} m68k_incpc (regs, 6); +endlabel963: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_50fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 0)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel964; } +} m68k_incpc (regs, 2); +endlabel964: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* SUB.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.B #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.B #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.W #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_51a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* SUB.L #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_51a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* SUB.L #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_51b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_51b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_51c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_51c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 1)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel992; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel992: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_51d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_51d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_51e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_51e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_51f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_51f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_51fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 1)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1000; } +}} m68k_incpc (regs, 4); +endlabel1000: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_51fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 1)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1001; } +}} m68k_incpc (regs, 6); +endlabel1001: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_51fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 1)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1002; } +} m68k_incpc (regs, 2); +endlabel1002: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_52c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_52c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 2)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1004; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1004: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_52d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_52d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_52e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_52e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_52f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_52f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_52f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_52fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 2)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1012; } +}} m68k_incpc (regs, 4); +endlabel1012: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_52fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 2)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1013; } +}} m68k_incpc (regs, 6); +endlabel1013: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_52fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 2)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1014; } +} m68k_incpc (regs, 2); +endlabel1014: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_53c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_53c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 3)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1016; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1016: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_53d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_53d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_53e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_53e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_53f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_53f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_53f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_53fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 3)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1024; } +}} m68k_incpc (regs, 4); +endlabel1024: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_53fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 3)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1025; } +}} m68k_incpc (regs, 6); +endlabel1025: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_53fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 3)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1026; } +} m68k_incpc (regs, 2); +endlabel1026: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_54c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_54c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 4)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1028; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1028: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_54d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_54d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_54e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_54e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_54f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_54f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_54f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_54fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 4)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1036; } +}} m68k_incpc (regs, 4); +endlabel1036: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_54fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 4)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1037; } +}} m68k_incpc (regs, 6); +endlabel1037: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_54fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 4)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1038; } +} m68k_incpc (regs, 2); +endlabel1038: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_55c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_55c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 5)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1040; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1040: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_55d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_55d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_55e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_55e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_55f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_55f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_55f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_55fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 5)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1048; } +}} m68k_incpc (regs, 4); +endlabel1048: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_55fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 5)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1049; } +}} m68k_incpc (regs, 6); +endlabel1049: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_55fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 5)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1050; } +} m68k_incpc (regs, 2); +endlabel1050: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_56c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_56c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 6)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1052; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1052: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_56d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_56d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_56e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_56e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_56f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_56f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_56f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_56fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 6)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1060; } +}} m68k_incpc (regs, 4); +endlabel1060: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_56fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 6)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1061; } +}} m68k_incpc (regs, 6); +endlabel1061: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_56fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 6)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1062; } +} m68k_incpc (regs, 2); +endlabel1062: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_57c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_57c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 7)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1064; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1064: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_57d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_57d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_57e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_57e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_57f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_57f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_57f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_57fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 7)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1072; } +}} m68k_incpc (regs, 4); +endlabel1072: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_57fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 7)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1073; } +}} m68k_incpc (regs, 6); +endlabel1073: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_57fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 7)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1074; } +} m68k_incpc (regs, 2); +endlabel1074: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_58c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_58c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 8)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1076; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1076: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_58d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_58d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_58e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_58e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_58f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_58f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_58f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_58fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 8)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1084; } +}} m68k_incpc (regs, 4); +endlabel1084: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_58fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 8)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1085; } +}} m68k_incpc (regs, 6); +endlabel1085: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_58fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 8)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1086; } +} m68k_incpc (regs, 2); +endlabel1086: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_59c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_59c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 9)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1088; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1088: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_59d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_59d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_59e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_59e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_59f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_59f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_59f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_59fa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 9)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1096; } +}} m68k_incpc (regs, 4); +endlabel1096: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_59fb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 9)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1097; } +}} m68k_incpc (regs, 6); +endlabel1097: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_59fc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 9)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1098; } +} m68k_incpc (regs, 2); +endlabel1098: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5ac0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5ac8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 10)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1100; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1100: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ad0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5ad8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ae0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ae8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5af0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5af8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5af9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5afa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 10)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1108; } +}} m68k_incpc (regs, 4); +endlabel1108: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5afb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 10)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1109; } +}} m68k_incpc (regs, 6); +endlabel1109: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5afc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 10)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1110; } +} m68k_incpc (regs, 2); +endlabel1110: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5bc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5bc8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 11)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1112; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1112: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5bd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5bd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5be0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5be8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5bf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5bf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5bf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5bfa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 11)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1120; } +}} m68k_incpc (regs, 4); +endlabel1120: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5bfb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 11)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1121; } +}} m68k_incpc (regs, 6); +endlabel1121: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5bfc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 11)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1122; } +} m68k_incpc (regs, 2); +endlabel1122: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5cc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5cc8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 12)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1124; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1124: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5cd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5cd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ce0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ce8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5cf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5cf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5cf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5cfa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 12)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1132; } +}} m68k_incpc (regs, 4); +endlabel1132: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5cfb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 12)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1133; } +}} m68k_incpc (regs, 6); +endlabel1133: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5cfc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 12)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1134; } +} m68k_incpc (regs, 2); +endlabel1134: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5dc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5dc8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 13)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1136; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1136: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5dd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5dd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5de0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5de8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5df0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5df8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5df9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5dfa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 13)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1144; } +}} m68k_incpc (regs, 4); +endlabel1144: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5dfb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 13)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1145; } +}} m68k_incpc (regs, 6); +endlabel1145: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5dfc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 13)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1146; } +} m68k_incpc (regs, 2); +endlabel1146: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5ec0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5ec8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 14)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1148; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1148: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ed0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5ed8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ee0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ee8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ef0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5ef8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5ef9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5efa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 14)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1156; } +}} m68k_incpc (regs, 4); +endlabel1156: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5efb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 14)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1157; } +}} m68k_incpc (regs, 6); +endlabel1157: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5efc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 14)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1158; } +} m68k_incpc (regs, 2); +endlabel1158: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5fc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5fc8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = get_iword (regs, 2); + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 15)) { + m68k_incpc (regs, (uae_s32)offs + 2); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel1160; + } + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); +}}}endlabel1160: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5fd8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fe0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg (regs, srcreg) = srca; +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fe8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ff0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5ff8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +#endif + +#ifdef PART_6 +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5ff9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5ffa_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 dummy = get_iword (regs, 2); + if (cctrue (®s->ccrflags, 15)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1168; } +}} m68k_incpc (regs, 4); +endlabel1168: ; +return CYCLE_UNIT / 2 * 8; +} +#endif +/* TRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5ffb_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 dummy = get_ilong (regs, 2); + if (cctrue (®s->ccrflags, 15)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1169; } +}} m68k_incpc (regs, 6); +endlabel1169: ; +return CYCLE_UNIT / 2 * 12; +} +#endif +/* TRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_5ffc_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 15)) { Exception (7, regs, m68k_getpc (regs)); goto endlabel1170; } +} m68k_incpc (regs, 2); +endlabel1170: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6000_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1171; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1171: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6001_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1172; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1172: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_60ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1173; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1173: ; +return CYCLE_UNIT / 2 * 12; +} +/* BSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6100_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s16 src = get_iword (regs, 2); + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel1174; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 4, s); +}}endlabel1174: ; +return CYCLE_UNIT / 2 * 8; +} +/* BSR.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6101_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{ uae_s32 s; +{ uae_u32 src = srcreg; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel1175; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); +}}endlabel1175: ; +return CYCLE_UNIT / 2 * 4; +} +/* BSR.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_61ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s32 src = get_ilong (regs, 2); + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel1176; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 6, s); +}}endlabel1176: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6200_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1177; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1177: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6201_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1178; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1178: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1179; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1179: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6300_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1180; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1180: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6301_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1181; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1181: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1182; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1182: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6400_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1183; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1183: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6401_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1184; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1184: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_64ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1185; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1185: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6500_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1186; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1186: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6501_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1187; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1187: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_65ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1188; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1188: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6600_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1189; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1189: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6601_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1190; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1190: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_66ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1191; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1191: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6700_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1192; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1192: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6701_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1193; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1193: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_67ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1194; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1194: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6800_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1195; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1195: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6801_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1196; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1196: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_68ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1197; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1197: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6900_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1198; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1198: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6901_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1199; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1199: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_69ff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1200; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1200: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6a00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1201; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1201: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6a01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1202; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1202: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6aff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1203; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1203: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6b00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1204; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1204: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6b01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1205; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1205: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6bff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1206; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1206: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6c00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1207; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1207: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6c01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1208; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1208: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6cff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1209; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1209: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6d00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1210; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1210: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6d01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1211; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1211: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6dff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1212; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1212: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6e00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1213; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1213: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6e01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1214; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1214: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6eff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1215; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1215: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6f00_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_iword (regs, 2); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1216; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel1216: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6f01_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1217; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 2); +}}endlabel1217: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6fff_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_ilong (regs, 2); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel1218; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 6); +}}endlabel1218: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_7000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_u32 src = srcreg; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* OR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* OR.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* OR.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* OR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* OR.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* OR.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* OR.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* OR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* OR.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* OR.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* OR.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* OR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* DIVU.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1253; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}endlabel1253: ; +return CYCLE_UNIT / 2 * 110; +} +/* DIVU.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1254; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1254: ; +return CYCLE_UNIT / 2 * 114; +} +/* DIVU.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1255; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1255: ; +return CYCLE_UNIT / 2 * 114; +} +/* DIVU.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1256; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1256: ; +return CYCLE_UNIT / 2 * 116; +} +/* DIVU.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1257; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1257: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 0); + Exception (5, regs, oldpc); + goto endlabel1258; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + } +}}}}}endlabel1258: ; +return CYCLE_UNIT / 2 * 120; +} +/* DIVU.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1259; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1259: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel1260; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 6); + } +}}}}endlabel1260: ; +return CYCLE_UNIT / 2 * 122; +} +/* DIVU.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1261; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1261: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 0); + Exception (5, regs, oldpc); + goto endlabel1262; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + } +}}}}}endlabel1262: ; +return CYCLE_UNIT / 2 * 120; +} +/* DIVU.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1263; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}endlabel1263: ; +return CYCLE_UNIT / 2 * 114; +} +/* SBCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SBCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* OR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* OR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_8140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uae_u16 val = m68k_dreg (regs, srcreg) + get_iword (regs, 2); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); +} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_8148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uae_u16 val; + m68k_areg (regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)get_byte(m68k_areg (regs, srcreg)); + m68k_areg (regs, srcreg) -= areg_byteinc[srcreg]; + val = (val | ((uae_u16)get_byte(m68k_areg (regs, srcreg)) << 8)) + get_iword (regs, 2); + m68k_areg (regs, dstreg) -= areg_byteinc[dstreg]; + put_byte(m68k_areg (regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); +} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* OR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* OR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* OR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_8180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uae_u16 val = m68k_dreg (regs, srcreg); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword (regs, 2); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffff0000) | (val & 0xffff); +} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_8188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uae_u16 val; + m68k_areg (regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)get_byte(m68k_areg (regs, srcreg)); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword (regs, 2); + m68k_areg (regs, dstreg) -= areg_byteinc[dstreg]; + put_byte(m68k_areg (regs, dstreg),val); + m68k_areg (regs, dstreg) -= areg_byteinc[dstreg]; + put_byte(m68k_areg(regs, dstreg),val >> 8); +} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* OR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* OR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* OR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* OR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* OR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_81b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* OR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_81b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* OR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_81b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* DIVS.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1291; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}endlabel1291: ; +return CYCLE_UNIT / 2 * 142; +} +/* DIVS.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1292; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1292: ; +return CYCLE_UNIT / 2 * 146; +} +/* DIVS.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1293; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1293: ; +return CYCLE_UNIT / 2 * 146; +} +/* DIVS.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel1294; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 2); + } +}}}}endlabel1294: ; +return CYCLE_UNIT / 2 * 148; +} +/* DIVS.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1295; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1295: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 0); + Exception (5, regs, oldpc); + goto endlabel1296; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + } +}}}}}endlabel1296: ; +return CYCLE_UNIT / 2 * 152; +} +/* DIVS.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1297; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1297: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel1298; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 6); + } +}}}}endlabel1298: ; +return CYCLE_UNIT / 2 * 154; +} +/* DIVS.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1299; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel1299: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 0); + Exception (5, regs, oldpc); + goto endlabel1300; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + } +}}}}}endlabel1300: ; +return CYCLE_UNIT / 2 * 152; +} +/* DIVS.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel1301; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}endlabel1301: ; +return CYCLE_UNIT / 2 * 146; +} +/* SUB.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* SUB.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUB.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUB.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* SUB.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUB.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUB.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_90c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_90c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUBA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_90d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUBA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* SUBA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUBA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_90f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_90f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_90fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* SUBA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_90fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUBX.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_9128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_9138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_9139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUBX.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_9168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUB.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_9178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_9179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUBX.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_91a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* SUB.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_91a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_91b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* SUB.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_91b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_91b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* SUBA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_91c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_91c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_91d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUBA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUBA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUBA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* SUBA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CMP.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMP.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMP.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +#endif + +#ifdef PART_7 +/* CMP.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CMP.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMP.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMP.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* CMP.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* CMP.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMPA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMPA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CMPA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMPA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* CMPA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.B (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* EOR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* EOR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* EOR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* EOR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* EOR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b1b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* EOR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b1b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b1b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* CMPA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* CMPA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* CMPA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMPA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* CMPA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* AND.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* AND.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* AND.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* AND.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* AND.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* AND.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}}return CYCLE_UNIT / 2 * 14; +} +/* AND.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* AND.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* AND.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* AND.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* AND.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MULU.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 58; +} +/* MULU.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 62; +} +/* MULU.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 62; +} +/* MULU.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}return CYCLE_UNIT / 2 * 64; +} +/* MULU.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 68; +} +/* MULU.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 6); +}}}}}return CYCLE_UNIT / 2 * 70; +} +/* MULU.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 68; +} +/* MULU.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 62; +} +/* ABCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ABCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* AND.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* AND.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EXG.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_dreg (regs, srcreg) = (dst); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* EXG.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_c148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + m68k_areg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* AND.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* AND.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EXG.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_c188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + m68k_dreg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* AND.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* AND.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c1a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* AND.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c1a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* AND.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c1b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}}}return CYCLE_UNIT / 2 * 26; +} +/* AND.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c1b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* AND.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c1b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* MULS.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 58; +} +/* MULS.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 62; +} +/* MULS.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 62; +} +/* MULS.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 64; +} +/* MULS.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 68; +} +/* MULS.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 70; +} +/* MULS.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 68; +} +/* MULS.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 62; +} +/* ADD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* ADD.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADD.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d039_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADD.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* ADD.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADD.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d079_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADD.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0ba_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0bb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0bc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADDA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADDA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* ADDA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADDA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 14; +} +/* ADDA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADDX.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d139_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADDX.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; +{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADD.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d179_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADDX.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d1a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; +{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 22; +} +/* ADD.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d1a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d1b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + m68k_incpc (regs, 2); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}}return CYCLE_UNIT / 2 * 26; +} +/* ADD.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d1b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d1b9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_ilong (regs, 2); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 28; +} +/* ADDA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1c8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +#endif + +#ifdef PART_8 +/* ADDA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADDA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADDA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f9_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADDA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc (regs); + srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ADDA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fc_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ASR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e008_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e038_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e040_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e048_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e050_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e058_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e060_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e068_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e070_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e078_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e080_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e088_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e090_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e098_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ASRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e0d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ASRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ASRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ASRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e0f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ASRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e0f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ASRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e0f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ASL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e100_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e108_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e110_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e118_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e120_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e128_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e130_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e138_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e140_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e148_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e150_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e158_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e160_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e168_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e170_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e178_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e180_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e188_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e190_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e198_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ASLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e1d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ASLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ASLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ASLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e1f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ASLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e1f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ASLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e1f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* LSRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* LSRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e2d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* LSRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* LSRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* LSRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e2f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* LSRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e2f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* LSRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e2f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* LSLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* LSLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e3d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* LSLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* LSLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* LSLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e3f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* LSLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e3f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* LSLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e3f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ROXRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROXRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e4d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROXRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ROXRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROXRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e4f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ROXRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e4f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROXRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e4f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ROXLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROXLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e5d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROXLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ROXLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROXLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e5f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ROXLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e5f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROXLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e5f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* RORW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* RORW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e6d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* RORW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* RORW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* RORW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e6f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* RORW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e6f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* RORW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e6f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ROLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e7d8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ROLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7e0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; +{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ROLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e7f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + m68k_incpc (regs, 2); +{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}}return CYCLE_UNIT / 2 * 18; +} +/* ROLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e7f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ROLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e7f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_ilong (regs, 2); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e8fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9d0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9e8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9f0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9f8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9f9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9fa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_e9fb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eac0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : + (0xffffffff << (32 - (offset & 0x1f))))) | + (tmp >> (offset & 0x1f)) | + (((offset & 0x1f) + width) >= 32 ? 0 : + (m68k_dreg (regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ead0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eae8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eaf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eaf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eaf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = ~tmp; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebe8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebfa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ebfb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); + m68k_dreg (regs, (extra >> 12) & 7) = tmp; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ecc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : + (0xffffffff << (32 - (offset & 0x1f))))) | + (tmp >> (offset & 0x1f)) | + (((offset & 0x1f) + width) >= 32 ? 0 : + (m68k_dreg (regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ecd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ece8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ecf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ecf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ecf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_ede8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edf0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edf8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edf9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edfa_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_edfb_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + m68k_incpc (regs, 4); +{ tmppc = m68k_getpc (regs); + dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + { uae_u32 mask = 1 << (width-1); + while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} + m68k_dreg (regs, (extra >> 12) & 7) = offset; +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eec0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : + (0xffffffff << (32 - (offset & 0x1f))))) | + (tmp >> (offset & 0x1f)) | + (((offset & 0x1f) + width) >= 32 ? 0 : + (m68k_dreg (regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eed0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eee8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eef0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eef8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eef9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = 0xffffffff; + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_efc0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : + (0xffffffff << (32 - (offset & 0x1f))))) | + (tmp >> (offset & 0x1f)) | + (((offset & 0x1f) + width) >= 32 ? 0 : + (m68k_dreg (regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_efd0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_efe8_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eff0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta; + m68k_incpc (regs, 4); +{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}}}return CYCLE_UNIT / 2 * 14; +} +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eff8_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_eff9_0)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 extra = get_iword (regs, 2); +{ uaecptr dsta = get_ilong (regs, 4); +{ uae_s32 offset = extra & 0x800 ? (uae_s32)(m68k_dreg (regs, (extra >> 6) & 7)) : ((uae_s32)(extra >> 6) & 0x1f); + int width = (((extra & 0x20 ? ((int)m68k_dreg (regs, extra & 7)) : extra) -1) & 0x1f) +1; + uae_u32 tmp,bf0,bf1; + dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); + bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; + tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); + tmp >>= (32 - width); + SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); + tmp = m68k_dreg (regs, (extra >> 12) & 7); + SET_NFLG (®s->ccrflags, tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG (®s->ccrflags, (tmp == 0) ? 1 : 0); + tmp <<= (32 - width); + bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | + (tmp >> (offset & 7)) | + (((offset & 7) + width) >= 32 ? 0 : + (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); + put_long(dsta,bf0 ); + if (((offset & 7) + width) > 32) { + bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | + (tmp << (8 - (offset & 7))); + put_byte(dsta+4,bf1); + } +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 16; +} +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f200_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f208_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f210_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f218_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f220_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f228_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f230_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f238_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f239_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f23a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f23b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f23c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fpp_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f240_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f248_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fdbcc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f250_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f258_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f260_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f268_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f270_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f278_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f279_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU +{ uae_s16 extra = get_iword (regs, 2); + m68k_incpc (regs, 4); + fscc_opp (opcode, regs, extra); +} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f27a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 dummy = get_iword (regs, 0); + m68k_incpc (regs, 2); + ftrapcc_opp (opcode, regs, oldpc); +}} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f27b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 dummy = get_ilong (regs, 0); + m68k_incpc (regs, 4); + ftrapcc_opp (opcode, regs, oldpc); +}} +#endif +}return CYCLE_UNIT / 2 * 12; +} +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f27c_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); +{ uaecptr oldpc = m68k_getpc (regs); + ftrapcc_opp (opcode, regs, oldpc); +} +#endif +}return CYCLE_UNIT / 2 * 4; +} +#endif +/* FBcc.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f280_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 63); +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); +{ uaecptr pc = m68k_getpc (regs); +{ uae_s16 extra = get_iword (regs, 0); + m68k_incpc (regs, 2); + fbcc_opp (opcode, regs, pc,extra); +}} +#endif +}return CYCLE_UNIT / 2 * 8; +} +#endif +/* FBcc.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 63); +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); +{ uaecptr pc = m68k_getpc (regs); +{ uae_s32 extra = get_ilong (regs, 0); + m68k_incpc (regs, 4); + fbcc_opp (opcode, regs, pc,extra); +}} +#endif +}return CYCLE_UNIT / 2 * 12; +} +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f310_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1827; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1827: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f320_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1828; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1828: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f328_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1829; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1829: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f330_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1830; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1830: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f338_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1831; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1831: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f339_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1832; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + fsave_opp (opcode, regs); + +#endif +}}endlabel1832: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f350_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1833; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1833: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f358_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1834; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1834: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f368_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1835; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1835: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f370_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1836; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1836: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f378_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1837; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1837: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f379_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1838; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1838: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f37a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1839; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1839: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f37b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1840; } +{ +#ifdef FPUEMU + m68k_incpc (regs, 2); + frestore_opp (opcode, regs); + +#endif +}}endlabel1840: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVL.L #,An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f408_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1841; } +{ if (opcode&0x80) + flush_icache(31); +}} m68k_incpc (regs, 2); +endlabel1841: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVP.L #,An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f410_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1842; } +{ if (opcode&0x80) + flush_icache(32); +}} m68k_incpc (regs, 2); +endlabel1842: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f418_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1843; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1843: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f419_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1844; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1844: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1845; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1845: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1846; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1846: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1847; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1847: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41d_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1848; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1848: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41e_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1849; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1849: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CINVA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f41f_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1850; } +{ if (opcode&0x80) + flush_icache(33); +}} m68k_incpc (regs, 2); +endlabel1850: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHL.L #,An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f428_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1851; } +{ if (opcode&0x80) + flush_icache(41); +}} m68k_incpc (regs, 2); +endlabel1851: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHP.L #,An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f430_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); + uae_u32 dstreg = opcode & 7; +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1852; } +{ if (opcode&0x80) + flush_icache(42); +}} m68k_incpc (regs, 2); +endlabel1852: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f438_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1853; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1853: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f439_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1854; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1854: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43a_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1855; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1855: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43b_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1856; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1856: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43c_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1857; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1857: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43d_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1858; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1858: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43e_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1859; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1859: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* CPUSHA.L # */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f43f_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 6) & 3); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1860; } +{ if (opcode&0x80) + flush_icache(43); +}} m68k_incpc (regs, 2); +endlabel1860: ; +return CYCLE_UNIT / 2 * 4; +} +#endif +/* MMUOP.L #,Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f500_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 3) & 255); + uae_u32 dstreg = opcode & 7; +{{ uae_u32 extra = srcreg; + m68k_incpc (regs, 2); + mmu_op (opcode, regs, extra); +}}return CYCLE_UNIT / 2 * 4; +} +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f600_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr memsa = m68k_areg (regs, srcreg); +{ uaecptr memda = get_ilong (regs, 2); + memsa &= ~15; + memda &= ~15; + put_long(memda, get_long(memsa)); + put_long(memda+4, get_long(memsa+4)); + put_long(memda+8, get_long(memsa+8)); + put_long(memda+12, get_long(memsa+12)); + m68k_areg (regs, srcreg) += 16; +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f608_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uaecptr memsa = get_ilong (regs, 2); +{ uaecptr memda = m68k_areg (regs, dstreg); + memsa &= ~15; + memda &= ~15; + put_long(memda, get_long(memsa)); + put_long(memda+4, get_long(memsa+4)); + put_long(memda+8, get_long(memsa+8)); + put_long(memda+12, get_long(memsa+12)); + m68k_areg (regs, dstreg) += 16; +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f610_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr memsa = m68k_areg (regs, srcreg); +{ uaecptr memda = get_ilong (regs, 2); + memsa &= ~15; + memda &= ~15; + put_long(memda, get_long(memsa)); + put_long(memda+4, get_long(memsa+4)); + put_long(memda+8, get_long(memsa+8)); + put_long(memda+12, get_long(memsa+12)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f618_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uaecptr memsa = get_ilong (regs, 2); +{ uaecptr memda = m68k_areg (regs, dstreg); + memsa &= ~15; + memda &= ~15; + put_long(memda, get_long(memsa)); + put_long(memda+4, get_long(memsa+4)); + put_long(memda+8, get_long(memsa+8)); + put_long(memda+12, get_long(memsa+12)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f620_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = 0; +{ uaecptr mems = m68k_areg (regs, srcreg) & ~15, memd; + dstreg = (get_iword (regs, 2) >> 12) & 7; + memd = m68k_areg (regs, dstreg) & ~15; + put_long(memd, get_long(mems)); + put_long(memd+4, get_long(mems+4)); + put_long(memd+8, get_long(mems+8)); + put_long(memd+12, get_long(mems+12)); + if (srcreg != dstreg) + m68k_areg (regs, srcreg) += 16; + m68k_areg (regs, dstreg) += 16; +} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +#endif +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +#endif + +#ifdef PART_2 +#endif + +#ifdef PART_3 +#endif + +#ifdef PART_4 +#endif + +#ifdef PART_5 +#endif + +#ifdef PART_6 +#endif + +#ifdef PART_7 +#endif + +#ifdef PART_8 +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +#endif + +#ifdef PART_2 +#endif + +#ifdef PART_3 +#endif + +#ifdef PART_4 +#endif + +#ifdef PART_5 +#endif + +#ifdef PART_6 +#endif + +#ifdef PART_7 +#endif + +#ifdef PART_8 +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +/* OR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* OR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* OR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_00b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 34; +} +/* BTST.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BTST.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_013b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BCHG.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_017b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0230_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* AND.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0270_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* AND.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_02b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 34; +} +/* SUB.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0430_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* SUB.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0470_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* SUB.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_04b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 34; +} +/* ADD.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0630_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* ADD.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0670_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* ADD.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_06b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 34; +} +/* BTST.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0830_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 18; +} +/* BTST.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_083b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0870_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCHG.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_087b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCLR.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCLR.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BSET.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BSET.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* EOR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a30_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* EOR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a70_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +#endif + +#ifdef PART_2 +/* EOR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0ab0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 34; +} +/* CMP.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c30_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s8 dst = get_byte (dsta); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* CMP.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c70_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_s16 dst = get_word (dsta); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 18; +} +/* CMP.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0cb0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); +{ uae_s32 dst = get_long (dsta); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1180_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1190_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1198_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b9_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11ba_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bc_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = get_ibyte (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_2070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_207b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + m68k_areg (regs, dstreg) = dsta; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +#endif + +#ifdef PART_3 +/* MOVE.L (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2180_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2188_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2190_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2198_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; +{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b9_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21ba_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bc_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_ilong (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 34; +} +/* MOVE.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_3070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_307b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + m68k_areg (regs, dstreg) = dsta; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3180_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3188_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3190_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3198_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; +{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b8_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b9_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 6)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31ba_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bc_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_iword (regs, 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_iword (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uaecptr dsta = get_ilong (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* NEGX.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEGX.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEGX.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* MVSR2.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel1985; } +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel1985: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel1986; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel1986; + } +}}}}endlabel1986: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel1987; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel1987; + } +}}}}endlabel1987: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel1988; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel1988; + } +}}}}endlabel1988: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel1989; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel1989; + } +}}}}endlabel1989: ; +return CYCLE_UNIT / 2 * 14; +} +/* LEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4230_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CLR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4270_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +#endif + +#ifdef PART_4 +/* CLR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_42b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_42f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + MakeSR (regs); + put_word (srca,regs->sr & 0xff); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +#endif +/* NEG.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4430_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEG.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4470_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEG.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* MV2SR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.B (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* NOT.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4630_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NOT.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4670_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NOT.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* MV2SR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2004; } +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2004: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.W (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46fb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2005; } +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); + regs->sr = src; + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2005: ; +return CYCLE_UNIT / 2 * 14; +} +/* NBCD.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4830_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* PEA.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4870_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_487b_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* TST.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a30_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* TST.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a70_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); + optflag_testw (regs, (uae_s16)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* TST.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ab0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); + optflag_testl (regs, (uae_s32)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* TAS.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4af0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cb0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cbb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cf0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 4)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cfb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_iword (regs, 2); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 4)); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 14; +} +/* JSR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4eb0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2019; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel2019: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ebb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2020; + } + m68k_setpc (regs, srca); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); +}}}endlabel2020: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ef0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2021; + } + m68k_setpc (regs, srca); +}}endlabel2021: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4efb_3)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2022; + } + m68k_setpc (regs, srca); +}}endlabel2022: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +#endif + +#ifdef PART_5 +/* ADD.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_52f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_53f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_54f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_55f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_56f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_57f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_58f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_59f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5af0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5bf0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5cf0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5df0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ef0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ff0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +#endif + +#ifdef PART_6 +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_60ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 0)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2045; + } + m68k_incpc (regs, 2); + goto endlabel2045; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2045; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2045: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_62ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 2)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2046; + } + m68k_incpc (regs, 2); + goto endlabel2046; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2046; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2046: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_63ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 3)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2047; + } + m68k_incpc (regs, 2); + goto endlabel2047; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2047; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2047: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_64ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 4)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2048; + } + m68k_incpc (regs, 2); + goto endlabel2048; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2048; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2048: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_65ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 5)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2049; + } + m68k_incpc (regs, 2); + goto endlabel2049; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2049; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2049: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_66ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 6)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2050; + } + m68k_incpc (regs, 2); + goto endlabel2050; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2050; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2050: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_67ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 7)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2051; + } + m68k_incpc (regs, 2); + goto endlabel2051; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2051; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2051: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_68ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 8)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2052; + } + m68k_incpc (regs, 2); + goto endlabel2052; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2052; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2052: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_69ff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 9)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2053; + } + m68k_incpc (regs, 2); + goto endlabel2053; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2053; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2053: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6aff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 10)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2054; + } + m68k_incpc (regs, 2); + goto endlabel2054; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2054; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2054: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6bff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 11)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2055; + } + m68k_incpc (regs, 2); + goto endlabel2055; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2055; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2055: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6cff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 12)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2056; + } + m68k_incpc (regs, 2); + goto endlabel2056; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2056; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2056: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6dff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 13)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2057; + } + m68k_incpc (regs, 2); + goto endlabel2057; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2057; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2057: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6eff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 14)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2058; + } + m68k_incpc (regs, 2); + goto endlabel2058; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2058; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2058: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6fff_3)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 15)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel2059; + } + m68k_incpc (regs, 2); + goto endlabel2059; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel2059; + } + m68k_incpc (regs, (uae_s32)src + 2); + return CYCLE_UNIT / 2 * 10; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2059: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* OR.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* DIVU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel2066; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel2066: ; +return CYCLE_UNIT / 2 * 120; +} +/* DIVU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + if (dst < 0) SET_NFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel2067; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel2067: ; +return CYCLE_UNIT / 2 * 120; +} +/* OR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* OR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* OR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_81b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* DIVS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel2071; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel2071: ; +return CYCLE_UNIT / 2 * 152; +} +/* DIVS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + SET_VFLG (®s->ccrflags, 1); + SET_ZFLG (®s->ccrflags, 1); + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel2072; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + m68k_incpc (regs, 4); + } +}}}}endlabel2072: ; +return CYCLE_UNIT / 2 * 152; +} +/* SUB.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUBA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUBA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_91b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* SUBA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUBA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMP.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +#endif + +#ifdef PART_7 +/* CMP.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMP.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMPA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMPA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* EOR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* EOR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* EOR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b1b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* CMPA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMPA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + m68k_dreg (regs, dstreg) = (src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* MULU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 68; +} +/* MULU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}return CYCLE_UNIT / 2 * 68; +} +/* AND.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + put_word (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c1b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + put_long (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +/* MULS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 68; +} +/* MULS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 68; +} +/* ADD.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d030_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d070_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07b_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0bb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADDA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADDA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d130_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s8 dst = get_byte (dsta); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d170_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s16 dst = get_word (dsta); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d1b0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_iword (regs, 2)); +{ uae_s32 dst = get_long (dsta); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 26; +} +#endif + +#ifdef PART_8 +/* ADDA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADDA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fb_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ASRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e0f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ASLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e1f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* LSRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e2f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* LSLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e3f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ROXRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e4f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ROXLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e5f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* RORW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e6f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ROLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e7f0_3)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); +{ uae_s16 data = get_word (dataa); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +#endif + +#ifdef PART_2 +#endif + +#ifdef PART_3 +/* MVSR2.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_40c0_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ MakeSR (regs); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVSR2.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_40d0_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_40d8_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 2; + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e0_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + m68k_areg (regs, srcreg) = srca; + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* MVSR2.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e8_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (regs, 2)); + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* MVSR2.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_40f8_4)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_40f9_4)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); + MakeSR (regs); + put_word (srca,regs->sr); +}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_4 +/* RTE.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2141; } +{{ uaecptr sra = m68k_areg (regs, 7); +{ uae_s16 sr = get_word (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); +{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; + regs->sr = sr; m68k_setpc (regs, pc); + MakeFromSR (regs); +}}}}}}endlabel2141: ; +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_5 +#endif + +#ifdef PART_6 +#endif + +#ifdef PART_7 +#endif + +#ifdef PART_8 +#endif + diff --git a/src/cpuemu_5.c b/src/cpuemu_5.c new file mode 100644 index 0000000..caa0378 --- /dev/null +++ b/src/cpuemu_5.c @@ -0,0 +1,30678 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "machdep/m68kops.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define CPUFUNC(x) x##_ff +#define SET_CFLG_ALWAYS(flags, x) SET_CFLG(flags, x) +#define SET_NFLG_ALWAYS(flags, x) SET_NFLG(flags, x) +#ifdef NOFLAGS +#include "noflags.h" +#endif + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +/* OR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* OR.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* OR.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* OR.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* OR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* OR.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0038_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* OR.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0039_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ORSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_003c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + src &= 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr |= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2152; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2152: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2153; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2153: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2154; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2154: ; +return CYCLE_UNIT / 2 * 18; +} +/* OR.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2155; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2155: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2156; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2156: ; +return CYCLE_UNIT / 2 * 22; +} +/* OR.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0078_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2157; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2157: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0079_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2158; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2158: ; +return CYCLE_UNIT / 2 * 24; +} +/* ORSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_007c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2159; } +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr |= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel2159: ; +return CYCLE_UNIT / 2 * 8; +} +/* OR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* OR.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2161; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2161: ; +return CYCLE_UNIT / 2 * 28; +} +/* OR.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2162; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2162: ; +return CYCLE_UNIT / 2 * 28; +} +/* OR.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_00a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2163; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2163: ; +return CYCLE_UNIT / 2 * 30; +} +/* OR.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_00a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2164; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2164: ; +return CYCLE_UNIT / 2 * 32; +} +/* OR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_00b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2165; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2165: ; +return CYCLE_UNIT / 2 * 34; +} +/* OR.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_00b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2166; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2166: ; +return CYCLE_UNIT / 2 * 32; +} +/* OR.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_00b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2167; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 10); +endlabel2167: ; +return CYCLE_UNIT / 2 * 36; +} +/* BTST.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPMR.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_u16 val = (get_byte (memp) << 8) + get_byte (memp + 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* BTST.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BTST.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_013a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_013b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BTST.B Dn,#.B */ +unsigned long REGPARAM2 CPUFUNC(op_013c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = (uae_u8)get_word_prefetch (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPMR.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_u32 val = (get_byte (memp) << 24) + (get_byte (memp + 2) << 16) + + (get_byte (memp + 4) << 8) + get_byte (memp + 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (val); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCHG.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCHG.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BCHG.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_017a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_017b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPRM.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (memp, src >> 8); put_byte (memp + 2, src); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCLR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCLR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BCLR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BCLR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_01b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_01b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_01ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_01c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVPRM.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (memp, src >> 24); put_byte (memp + 2, src >> 16); + put_byte (memp + 4, src >> 8); put_byte (memp + 6, src); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BSET.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BSET.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_01d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* BSET.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_01e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* BSET.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_01e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_01f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_01f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B Dn,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_01fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B Dn,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_01fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0200_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0210_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* AND.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0218_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* AND.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0220_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* AND.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0228_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* AND.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0230_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* AND.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0238_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* AND.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0239_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ANDSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_023c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + src |= 0xFF00; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr &= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0240_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0250_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2223; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2223: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0258_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2224; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2224: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0260_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2225; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2225: ; +return CYCLE_UNIT / 2 * 18; +} +/* AND.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0268_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2226; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2226: ; +return CYCLE_UNIT / 2 * 20; +} +/* AND.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0270_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2227; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2227: ; +return CYCLE_UNIT / 2 * 22; +} +/* AND.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0278_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2228; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2228: ; +return CYCLE_UNIT / 2 * 20; +} +/* AND.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0279_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2229; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2229: ; +return CYCLE_UNIT / 2 * 24; +} +/* ANDSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_027c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2230; } +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr &= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel2230: ; +return CYCLE_UNIT / 2 * 8; +} +/* AND.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0280_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* AND.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0290_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2232; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2232: ; +return CYCLE_UNIT / 2 * 28; +} +/* AND.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0298_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2233; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2233: ; +return CYCLE_UNIT / 2 * 28; +} +/* AND.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_02a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2234; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2234: ; +return CYCLE_UNIT / 2 * 30; +} +/* AND.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_02a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2235; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2235: ; +return CYCLE_UNIT / 2 * 32; +} +/* AND.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_02b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2236; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2236: ; +return CYCLE_UNIT / 2 * 34; +} +/* AND.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_02b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2237; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2237: ; +return CYCLE_UNIT / 2 * 32; +} +/* AND.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_02b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2238; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 10); +endlabel2238: ; +return CYCLE_UNIT / 2 * 36; +} +/* SUB.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0400_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0410_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0418_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0420_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* SUB.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0428_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0430_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* SUB.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0438_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* SUB.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0439_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* SUB.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0440_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0450_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2248; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2248: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0458_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2249; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2249: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0460_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2250; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2250: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0468_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2251; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2251: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0470_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2252; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2252: ; +return CYCLE_UNIT / 2 * 22; +} +/* SUB.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0478_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2253; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2253: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0479_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2254; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2254: ; +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0480_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0490_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2256; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2256: ; +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0498_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2257; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2257: ; +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_04a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2258; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2258: ; +return CYCLE_UNIT / 2 * 30; +} +/* SUB.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_04a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2259; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2259: ; +return CYCLE_UNIT / 2 * 32; +} +/* SUB.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_04b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2260; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2260: ; +return CYCLE_UNIT / 2 * 34; +} +/* SUB.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_04b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2261; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2261: ; +return CYCLE_UNIT / 2 * 32; +} +/* SUB.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_04b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2262; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 10); +endlabel2262: ; +return CYCLE_UNIT / 2 * 36; +} +/* ADD.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0600_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0610_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0618_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0620_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* ADD.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0628_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0630_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* ADD.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0638_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* ADD.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0639_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* ADD.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0640_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0650_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2272; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2272: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0658_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2273; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2273: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0660_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2274; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2274: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADD.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0668_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2275; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2275: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0670_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2276; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2276: ; +return CYCLE_UNIT / 2 * 22; +} +/* ADD.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0678_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2277; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2277: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0679_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2278; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2278: ; +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0680_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0690_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2280; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2280: ; +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0698_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2281; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2281: ; +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_06a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2282; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2282: ; +return CYCLE_UNIT / 2 * 30; +} +/* ADD.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_06a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2283; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2283: ; +return CYCLE_UNIT / 2 * 32; +} +/* ADD.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_06b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2284; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2284: ; +return CYCLE_UNIT / 2 * 34; +} +/* ADD.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_06b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2285; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel2285: ; +return CYCLE_UNIT / 2 * 32; +} +/* ADD.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_06b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2286; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 10); +endlabel2286: ; +return CYCLE_UNIT / 2 * 36; +} +/* BTST.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0800_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BTST.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0810_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0818_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* BTST.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0820_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* BTST.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0828_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0830_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 18; +} +/* BTST.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0838_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0839_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 20; +} +/* BTST.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_083a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BTST.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_083b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 18; +} +/* BTST.B #.W,#.B */ +unsigned long REGPARAM2 CPUFUNC(op_083c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s8 dst = (uae_u8)get_word_prefetch (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0840_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCHG.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0850_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0858_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCHG.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0860_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCHG.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0868_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0870_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCHG.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0878_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0879_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BCHG.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_087a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCHG.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_087b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCLR.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0880_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BCLR.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0890_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0898_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BCLR.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BCLR.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_08a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BCLR.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_08b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_08b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BCLR.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_08ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BCLR.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BSET.L #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_08c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* BSET.B #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_08d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* BSET.B #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_08e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* BSET.B #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_08e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* BSET.B #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_08f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_08f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* BSET.B #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_08fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* BSET.B #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_08fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte (dsta,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* EOR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a00_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a10_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a18_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a20_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 22; +} +/* EOR.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a28_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a30_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 26; +} +/* EOR.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0a38_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 24; +} +/* EOR.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0a39_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 28; +} +/* EORSR.B #.W */ +unsigned long REGPARAM2 CPUFUNC(op_0a3c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + src &= 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr ^= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a40_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a50_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2338; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2338: ; +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a58_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2339; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2339: ; +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a60_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2340; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel2340: ; +return CYCLE_UNIT / 2 * 18; +} +/* EOR.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a68_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2341; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2341: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0a70_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2342; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2342: ; +return CYCLE_UNIT / 2 * 22; +} +/* EOR.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0a78_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2343; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2343: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0a79_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2344; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2344: ; +return CYCLE_UNIT / 2 * 24; +} +#endif + +#ifdef PART_2 +/* EORSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_0a7c_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2345; } +{ MakeSR (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + regs->sr ^= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel2345: ; +return CYCLE_UNIT / 2 * 8; +} +/* EOR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0a80_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0a90_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2347; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2347: ; +return CYCLE_UNIT / 2 * 28; +} +/* EOR.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0a98_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2348; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2348: ; +return CYCLE_UNIT / 2 * 28; +} +/* EOR.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0aa0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2349; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel2349: ; +return CYCLE_UNIT / 2 * 30; +} +/* EOR.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0aa8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2350; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2350: ; +return CYCLE_UNIT / 2 * 32; +} +/* EOR.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0ab0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2351; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2351: ; +return CYCLE_UNIT / 2 * 34; +} +/* EOR.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0ab8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2352; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel2352: ; +return CYCLE_UNIT / 2 * 32; +} +/* EOR.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0ab9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2353; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 10); +endlabel2353: ; +return CYCLE_UNIT / 2 * 36; +} +/* CMP.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c00_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c10_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c18_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c20_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CMP.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c28_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c30_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 22; +} +/* CMP.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0c38_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CMP.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0c39_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 8); +return CYCLE_UNIT / 2 * 24; +} +/* CMP.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c40_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c50_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2363; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel2363: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c58_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2364; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel2364: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c60_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2365; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel2365: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMP.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c68_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2366; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2366: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0c70_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2367; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2367: ; +return CYCLE_UNIT / 2 * 18; +} +/* CMP.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0c78_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2368; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2368: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0c79_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2369; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel2369: ; +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_0c80_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0c90_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2371; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2371: ; +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_0c98_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2372; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2372: ; +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_0ca0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2373; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel2373: ; +return CYCLE_UNIT / 2 * 22; +} +/* CMP.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_0ca8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2374; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel2374: ; +return CYCLE_UNIT / 2 * 24; +} +/* CMP.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_0cb0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2375; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel2375: ; +return CYCLE_UNIT / 2 * 26; +} +/* CMP.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_0cb8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2376; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel2376: ; +return CYCLE_UNIT / 2 * 24; +} +/* CMP.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_0cb9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2377; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 12); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 10); +endlabel2377: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 10; +} +/* MOVE.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_1039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_103c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_10bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_10fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.B (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_1139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B #.B,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_113c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_1179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B #.B,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_117c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 14; +} +/* MOVE.B (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_1198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B #.B,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_11bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.B (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 18; +} +/* MOVE.B (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B #.B,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_11fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 16; +} +/* MOVE.B (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 20; +} +/* MOVE.B -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 22; +} +/* MOVE.B (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 8) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 10); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 28; +} +/* MOVE.B (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}return CYCLE_UNIT / 2 * 26; +} +/* MOVE.B #.B,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_13fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + put_byte (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2008_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2468; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2468: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2469; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2469: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2470; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2470: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2471; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2471: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2472; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2472: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2473; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2473: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2474; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2474: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2475; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2475: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2476; + } +{{ uae_s32 src = get_long (srca); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2476: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_2040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_2048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2480; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2480: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_2058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2481; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2481: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2482; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2482: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2483; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2483: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_2070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2484; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2484: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_2078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2485; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2485: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_2079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2486; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2486: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVEA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_207a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2487; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2487: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_207b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2488; + } +{{ uae_s32 src = get_long (srca); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2488: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVEA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_207c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2490; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2490: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2491; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2491: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2492; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2492; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2492: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2493; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2493; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2493: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2494; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2494; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2494: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2495; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2495; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2495: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2496; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2496; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2496: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2497; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2497; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2497: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2498; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2498; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2498: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2499; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2499; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2499: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2500; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2500; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2500: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2501; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2501: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2502; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2502: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2503; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2503: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2504; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2504; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2504: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2505; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2505; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2505: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2506; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2506; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2506: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2507; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2507; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2507: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2508; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2508; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2508: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2509; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2509; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2509: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2510; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2510; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2510: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2511; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2511; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2511: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2512; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2512; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2512: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2513; + } +{ m68k_areg (regs, dstreg) += 4; + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2513: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2514; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}endlabel2514: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2515; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}endlabel2515: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2516; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2516; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2516: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2517; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2517; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2517: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2518; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2518; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2518: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.L (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2519; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2519; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2519: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2520; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2520; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2520: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2521; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2521; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2521: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2522; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2522; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}}}endlabel2522: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2523; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2523; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2523: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2524; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2524; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2524: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2525; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}endlabel2525: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2526; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2526: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2527; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2527: ; +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_3 +/* MOVE.L (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2528; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2528; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2528: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2529; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2529; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2529: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2530; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2530; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2530: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2531; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2531; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2531: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2532; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2532; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2532: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2533; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2533; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2533: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2534; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2534; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2534: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2535; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2535; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2535: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2536; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2536; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2536: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2537; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2537: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2538; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2538: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2539; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2539: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.L (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2540; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2540; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2540: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2541; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2541; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2541: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2542; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2542; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2542: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2543; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2543; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2543: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2544; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2544; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2544: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2545; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2545; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2545: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2546; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2546; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2546: ; +return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2547; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2547; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2547: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2548; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2548; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2548: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2549; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2549: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2550; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2550: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2551; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2551: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.L (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2552; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2552; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2552: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2553; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2553; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2553: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2554; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2554; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2554: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.L (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2555; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2555; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2555: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2556; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2556; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2556: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2557; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2557; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2557: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2558; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2558; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2558: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2559; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2559; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2559: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2560; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2560; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2560: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2561; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2561: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2562; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2562: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2563; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2563: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.L (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2564; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2564; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2564: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2565; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2565; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2565: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.L -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2566; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2566; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2566: ; +return CYCLE_UNIT / 2 * 30; +} +/* MOVE.L (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2567; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2567; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2567: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2568; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2568; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2568: ; +return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2569; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2569; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2569: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2570; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 8) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2570; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2570: ; +return CYCLE_UNIT / 2 * 36; +} +/* MOVE.L (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2571; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2571; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2571: ; +return CYCLE_UNIT / 2 * 32; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2572; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2572; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2572: ; +return CYCLE_UNIT / 2 * 34; +} +/* MOVE.L #.L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2573; + } +{ put_long (dsta,src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2573: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3008_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVE.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2576; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2576: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2577; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2577: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2578; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2578: ; +return CYCLE_UNIT / 2 * 10; +} +/* MOVE.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2579; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2579: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2580; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2580: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2581; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2581: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2582; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2582: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2583; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2583: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2584; + } +{{ uae_s16 src = get_word (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2584: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_3040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_3048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* MOVEA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2588; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2588: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_3058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2589; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2589: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVEA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2590; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2590: ; +return CYCLE_UNIT / 2 * 10; +} +/* MOVEA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2591; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2591: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_3070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2592; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2592: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_3078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2593; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2593: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_3079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2594; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2594: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVEA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_307a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2595; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2595: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVEA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_307b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2596; + } +{{ uae_s16 src = get_word (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2596: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVEA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_307c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2598; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2598: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2599; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2599: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2600; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2600; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2600: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2601; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2601; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2601: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2602; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2602; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2602: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2603; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2603; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2603: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2604; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2604; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2604: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2605; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2605; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2605: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2606; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2606; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2606: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2607; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2607; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2607: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2608; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2608; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2608: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2609; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2609: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2610; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2610: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2611; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2611: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2612; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2612; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2612: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2613; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2613; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2613: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2614; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2614; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2614: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2615; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2615; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2615: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2616; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2616; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2616: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2617; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2617; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2617: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2618; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2618; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2618: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2619; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2619; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2619: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2620; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2620; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2620: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2621; + } +{ m68k_areg (regs, dstreg) += 2; + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2621: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2622; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}endlabel2622: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2623; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}endlabel2623: ; +return CYCLE_UNIT / 2 * 8; +} +/* MOVE.W (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2624; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2624; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2624: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2625; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2625; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2625: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2626; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2626; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel2626: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2627; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2627; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2627: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2628; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2628; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2628: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2629; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2629; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2629: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2630; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2630; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}}}endlabel2630: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2631; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2631; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2631: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2632; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2632; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel2632: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2633; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}endlabel2633: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2634; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2634: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2635; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2635: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2636; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2636; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2636: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2637; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2637; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2637: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2638; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2638; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2638: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2639; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2639; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2639: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2640; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2640; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2640: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2641; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2641; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2641: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2642; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2642; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2642: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2643; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2643; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2643: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2644; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2644; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2644: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2645; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2645: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2646; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2646: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2647; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2647: ; +return CYCLE_UNIT / 2 * 14; +} +/* MOVE.W (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2648; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2648; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2648: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2649; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2649; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2649: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2650; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2650; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2650: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2651; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2651; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2651: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2652; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2652; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2652: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2653; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2653; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2653: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2654; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2654; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2654: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2655; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2655; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2655: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2656; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2656; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2656: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2657; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2657: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2658; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2658: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2659; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2659: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.W (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2660; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2660; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2660: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2661; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2661; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2661: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2662; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2662; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2662: ; +return CYCLE_UNIT / 2 * 18; +} +/* MOVE.W (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2663; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2663; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2663: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2664; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2664; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2664: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2665; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2665; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2665: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2666; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2666; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2666: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2667; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2667; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2667: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2668; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2668; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2668: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2669; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2669: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2670; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2670: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2671; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2671: ; +return CYCLE_UNIT / 2 * 16; +} +/* MOVE.W (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2672; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2672; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2672: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W (An)+,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2673; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2673; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2673: ; +return CYCLE_UNIT / 2 * 20; +} +/* MOVE.W -(An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2674; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2674; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2674: ; +return CYCLE_UNIT / 2 * 22; +} +/* MOVE.W (d16,An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2675; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2675; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2675: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2676; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2676; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2676: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W (xxx).W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2677; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2677; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2677: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (xxx).L,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2678; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 8) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2678; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 10); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2678: ; +return CYCLE_UNIT / 2 * 28; +} +/* MOVE.W (d16,PC),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2679; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2679; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2679: ; +return CYCLE_UNIT / 2 * 24; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2680; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_word_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2680; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2680: ; +return CYCLE_UNIT / 2 * 26; +} +/* MOVE.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = get_long_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2681; + } +{ put_word (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2681: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEGX.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEGX.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4038_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4039_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((newv) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2691; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2691: ; +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2692; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2692: ; +return CYCLE_UNIT / 2 * 12; +} +/* NEGX.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2693; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2693: ; +return CYCLE_UNIT / 2 * 14; +} +/* NEGX.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2694; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2694: ; +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2695; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2695: ; +return CYCLE_UNIT / 2 * 18; +} +/* NEGX.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4078_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2696; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2696: ; +return CYCLE_UNIT / 2 * 16; +} +/* NEGX.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4079_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2697; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (srca,newv); +}}}}}} m68k_incpc (regs, 6); +endlabel2697: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEGX.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2699; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2699: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2700; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2700: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEGX.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_40a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2701; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel2701: ; +return CYCLE_UNIT / 2 * 22; +} +/* NEGX.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_40a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2702; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2702: ; +return CYCLE_UNIT / 2 * 24; +} +/* NEGX.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2703; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2703: ; +return CYCLE_UNIT / 2 * 26; +} +/* NEGX.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_40b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2704; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel2704: ; +return CYCLE_UNIT / 2 * 24; +} +/* NEGX.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_40b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2705; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (srca,newv); +}}}}}} m68k_incpc (regs, 6); +endlabel2705: ; +return CYCLE_UNIT / 2 * 28; +} +/* MVSR2.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_40c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeSR (regs); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVSR2.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_40d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2707; + } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel2707: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_40d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2708; + } +{ m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel2708: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVSR2.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2709; + } +{ m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel2709: ; +return CYCLE_UNIT / 2 * 10; +} +/* MVSR2.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_40e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2710; + } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel2710: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_40f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2711; + } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel2711: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVSR2.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_40f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2712; + } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel2712: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVSR2.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_40f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2713; + } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); + MakeSR (regs); + put_word (srca,regs->sr); +}}} m68k_incpc (regs, 6); +endlabel2713: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2714; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2714; + } +}}}endlabel2714: ; +return CYCLE_UNIT / 2 * 4; +} +/* CHK.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2715; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2715; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2715; + } +}}}}}endlabel2715: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2716; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2716; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2716; + } +}}}}}endlabel2716: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2717; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2717; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2717; + } +}}}}}endlabel2717: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2718; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2718; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2718; + } +}}}}}endlabel2718: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2719; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2719; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2719; + } +}}}}}endlabel2719: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2720; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2720; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2720; + } +}}}}}endlabel2720: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2721; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2721; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2721; + } +}}}}}endlabel2721: ; +return CYCLE_UNIT / 2 * 20; +} +/* CHK.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2722; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2722; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2722; + } +}}}}}endlabel2722: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2723; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2723; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2723; + } +}}}}}endlabel2723: ; +return CYCLE_UNIT / 2 * 18; +} +/* CHK.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_413c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2724; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2724; + } +}}}endlabel2724: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2725; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2725; + } +}}}endlabel2725: ; +return CYCLE_UNIT / 2 * 4; +} +/* CHK.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2726; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2726; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2726; + } +}}}}}endlabel2726: ; +return CYCLE_UNIT / 2 * 8; +} +/* CHK.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2727; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2727; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2727; + } +}}}}}endlabel2727: ; +return CYCLE_UNIT / 2 * 8; +} +/* CHK.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2728; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2728; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2728; + } +}}}}}endlabel2728: ; +return CYCLE_UNIT / 2 * 10; +} +/* CHK.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2729; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2729; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2729; + } +}}}}}endlabel2729: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2730; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2730; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2730; + } +}}}}}endlabel2730: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2731; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2731; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2731; + } +}}}}}endlabel2731: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2732; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2732; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2732; + } +}}}}}endlabel2732: ; +return CYCLE_UNIT / 2 * 16; +} +/* CHK.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2733; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2733; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2733; + } +}}}}}endlabel2733: ; +return CYCLE_UNIT / 2 * 12; +} +/* CHK.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2734; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2734; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2734; + } +}}}}}endlabel2734: ; +return CYCLE_UNIT / 2 * 14; +} +/* CHK.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_41bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel2735; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel2735; + } +}}}endlabel2735: ; +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_41d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LEA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_41e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_41f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_41f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* LEA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_41fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* LEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_41fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CLR.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4200_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((0) & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4210_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4218_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* CLR.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4220_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* CLR.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4228_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4230_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* CLR.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4238_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* CLR.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4239_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte (srca,0); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* CLR.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4240_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((0) & 0xffff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4250_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2752; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2752: ; +return CYCLE_UNIT / 2 * 12; +} +/* CLR.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4258_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2753; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2753: ; +return CYCLE_UNIT / 2 * 12; +} +/* CLR.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4260_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2754; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2754: ; +return CYCLE_UNIT / 2 * 14; +} +/* CLR.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4268_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2755; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2755: ; +return CYCLE_UNIT / 2 * 16; +} +/* CLR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4270_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2756; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2756: ; +return CYCLE_UNIT / 2 * 18; +} +/* CLR.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4278_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2757; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2757: ; +return CYCLE_UNIT / 2 * 16; +} +/* CLR.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4279_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2758; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word (srca,0); +}}}} m68k_incpc (regs, 6); +endlabel2758: ; +return CYCLE_UNIT / 2 * 20; +} +/* CLR.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4280_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (0); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CLR.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4290_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2760; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2760: ; +return CYCLE_UNIT / 2 * 20; +} +#endif + +#ifdef PART_4 +/* CLR.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4298_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2761; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2761: ; +return CYCLE_UNIT / 2 * 20; +} +/* CLR.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_42a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2762; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel2762: ; +return CYCLE_UNIT / 2 * 22; +} +/* CLR.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_42a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2763; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2763: ; +return CYCLE_UNIT / 2 * 24; +} +/* CLR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_42b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2764; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2764: ; +return CYCLE_UNIT / 2 * 26; +} +/* CLR.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_42b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2765; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel2765: ; +return CYCLE_UNIT / 2 * 24; +} +/* CLR.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_42b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2766; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_long (srca,0); +}}}} m68k_incpc (regs, 6); +endlabel2766: ; +return CYCLE_UNIT / 2 * 28; +} +/* NEG.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4400_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4410_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4418_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NEG.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4420_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NEG.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4428_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4430_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NEG.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4438_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NEG.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4439_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte (srca,dst); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NEG.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4440_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4450_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2776; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2776: ; +return CYCLE_UNIT / 2 * 12; +} +/* NEG.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4458_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2777; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2777: ; +return CYCLE_UNIT / 2 * 12; +} +/* NEG.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4460_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2778; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2778: ; +return CYCLE_UNIT / 2 * 14; +} +/* NEG.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4468_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2779; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2779: ; +return CYCLE_UNIT / 2 * 16; +} +/* NEG.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4470_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2780; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2780: ; +return CYCLE_UNIT / 2 * 18; +} +/* NEG.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4478_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2781; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2781: ; +return CYCLE_UNIT / 2 * 16; +} +/* NEG.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4479_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2782; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word (srca,dst); +}}}}}} m68k_incpc (regs, 6); +endlabel2782: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4480_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + m68k_dreg (regs, srcreg) = (dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NEG.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4490_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2784; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2784: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4498_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2785; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2785: ; +return CYCLE_UNIT / 2 * 20; +} +/* NEG.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_44a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2786; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel2786: ; +return CYCLE_UNIT / 2 * 22; +} +/* NEG.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_44a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2787; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2787: ; +return CYCLE_UNIT / 2 * 24; +} +/* NEG.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2788; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2788: ; +return CYCLE_UNIT / 2 * 26; +} +/* NEG.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_44b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2789; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel2789: ; +return CYCLE_UNIT / 2 * 24; +} +/* NEG.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_44b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2790; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_long (srca,dst); +}}}}}} m68k_incpc (regs, 6); +endlabel2790: ; +return CYCLE_UNIT / 2 * 28; +} +/* MV2SR.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_44c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MV2SR.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_44d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2792; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel2792: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_44d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2793; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel2793: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_44e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2794; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel2794: ; +return CYCLE_UNIT / 2 * 10; +} +/* MV2SR.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_44e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2795; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2795: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2796; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2796: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_44f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2797; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2797: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_44f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2798; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 6); +endlabel2798: ; +return CYCLE_UNIT / 2 * 16; +} +/* MV2SR.B (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_44fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2799; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2799: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.B (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_44fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2800; + } +{{ uae_s16 src = get_word (srca); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel2800: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.B #.B */ +unsigned long REGPARAM2 CPUFUNC(op_44fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* NOT.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4600_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4610_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4618_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NOT.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4620_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NOT.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4628_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4630_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NOT.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4638_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NOT.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4639_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte (srca,dst); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* NOT.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4640_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4650_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2811; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2811: ; +return CYCLE_UNIT / 2 * 12; +} +/* NOT.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4658_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2812; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2812: ; +return CYCLE_UNIT / 2 * 12; +} +/* NOT.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4660_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2813; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2813: ; +return CYCLE_UNIT / 2 * 14; +} +/* NOT.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4668_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2814; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2814: ; +return CYCLE_UNIT / 2 * 16; +} +/* NOT.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4670_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2815; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2815: ; +return CYCLE_UNIT / 2 * 18; +} +/* NOT.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4678_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2816; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2816: ; +return CYCLE_UNIT / 2 * 16; +} +/* NOT.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4679_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2817; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word (srca,dst); +}}}}} m68k_incpc (regs, 6); +endlabel2817: ; +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4680_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NOT.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4690_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2819; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2819: ; +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4698_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2820; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2820: ; +return CYCLE_UNIT / 2 * 20; +} +/* NOT.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_46a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2821; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel2821: ; +return CYCLE_UNIT / 2 * 22; +} +/* NOT.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_46a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2822; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2822: ; +return CYCLE_UNIT / 2 * 24; +} +/* NOT.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2823; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2823: ; +return CYCLE_UNIT / 2 * 26; +} +/* NOT.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_46b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2824; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel2824: ; +return CYCLE_UNIT / 2 * 24; +} +/* NOT.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_46b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2825; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_long (srca,dst); +}}}}} m68k_incpc (regs, 6); +endlabel2825: ; +return CYCLE_UNIT / 2 * 28; +} +/* MV2SR.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_46c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2826; } +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +endlabel2826: ; +return CYCLE_UNIT / 2 * 4; +} +/* MV2SR.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_46d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2827; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2827; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel2827: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_46d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2828; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2828; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel2828: ; +return CYCLE_UNIT / 2 * 8; +} +/* MV2SR.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_46e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2829; } +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2829; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel2829: ; +return CYCLE_UNIT / 2 * 10; +} +/* MV2SR.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_46e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2830; } +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2830; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel2830: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2831; } +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2831; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel2831: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_46f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2832; } +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2832; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel2832: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_46f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2833; } +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2833; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 6); +endlabel2833: ; +return CYCLE_UNIT / 2 * 16; +} +/* MV2SR.W (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_46fa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2834; } +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2834; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel2834: ; +return CYCLE_UNIT / 2 * 12; +} +/* MV2SR.W (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_46fb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2835; } +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2835; + } +{{ uae_s16 src = get_word (srca); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel2835: ; +return CYCLE_UNIT / 2 * 14; +} +/* MV2SR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_46fc_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2836; } +{{ uae_s16 src = get_word_prefetch (regs, 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel2836: ; +return CYCLE_UNIT / 2 * 8; +} +/* NBCD.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4800_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* NBCD.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4810_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NBCD.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4818_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* NBCD.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4820_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* NBCD.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4828_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NBCD.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4830_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* NBCD.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4838_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* NBCD.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4839_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SWAP.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4840_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* PEA.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4850_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2846; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,srca); +}}}} m68k_incpc (regs, 2); +endlabel2846: ; +return CYCLE_UNIT / 2 * 12; +} +/* PEA.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4868_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2847; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,srca); +}}}} m68k_incpc (regs, 4); +endlabel2847: ; +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4870_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2848; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,srca); +}}}} m68k_incpc (regs, 4); +endlabel2848: ; +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4878_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2849; + } +{ m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel2849: ; +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4879_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2850; + } +{ m68k_areg (regs, 7) = dsta; + put_long (dsta,srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2850: ; +return CYCLE_UNIT / 2 * 20; +} +/* PEA.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_487a_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2851; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,srca); +}}}} m68k_incpc (regs, 4); +endlabel2851: ; +return CYCLE_UNIT / 2 * 16; +} +/* PEA.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_487b_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2852; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,srca); +}}}} m68k_incpc (regs, 4); +endlabel2852: ; +return CYCLE_UNIT / 2 * 16; +} +/* EXT.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4880_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 dst = (uae_s16)(uae_s8)src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVMLE.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4890_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2854; + } +{ m68k_incpc (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2854: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMLE.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2855; + } +{ m68k_incpc (regs, 4); +{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 2; put_word(srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 2; put_word(srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2855: ; +return CYCLE_UNIT / 2 * 10; +} +/* MVMLE.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_48a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2856; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2856: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2857; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2857: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVMLE.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_48b8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2858; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2858: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_48b9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = get_long_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2859; + } +{ m68k_incpc (regs, 8); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word(srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2859: ; +return CYCLE_UNIT / 2 * 16; +} +/* EXT.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_48c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* MVMLE.L #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2861; + } +{ m68k_incpc (regs, 4); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2861: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMLE.L #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_48e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2862; + } +{ m68k_incpc (regs, 4); +{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 4; put_long(srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 4; put_long(srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2862: ; +return CYCLE_UNIT / 2 * 10; +} +/* MVMLE.L #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_48e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2863; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2863: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_48f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2864; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2864: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVMLE.L #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_48f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2865; + } +{ m68k_incpc (regs, 6); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2865: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMLE.L #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_48f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); +{ uaecptr srca = get_long_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2866; + } +{ m68k_incpc (regs, 8); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_long(srca, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_long(srca, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2866: ; +return CYCLE_UNIT / 2 * 16; +} +/* EXT.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_49c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 dst = (uae_s32)(uae_s8)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a00_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a10_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a18_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* TST.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a20_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* TST.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a28_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a30_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* TST.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4a38_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* TST.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4a39_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* TST.W Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a40_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a50_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2877; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2877: ; +return CYCLE_UNIT / 2 * 8; +} +/* TST.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a58_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2878; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2878: ; +return CYCLE_UNIT / 2 * 8; +} +/* TST.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a60_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2879; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2879: ; +return CYCLE_UNIT / 2 * 10; +} +/* TST.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a68_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2880; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2880: ; +return CYCLE_UNIT / 2 * 12; +} +/* TST.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4a70_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2881; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2881: ; +return CYCLE_UNIT / 2 * 14; +} +/* TST.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4a78_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2882; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2882: ; +return CYCLE_UNIT / 2 * 12; +} +/* TST.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4a79_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2883; + } +{{ uae_s16 src = get_word (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 6); +endlabel2883: ; +return CYCLE_UNIT / 2 * 16; +} +/* TST.L Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4a80_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TST.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4a90_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2885; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2885: ; +return CYCLE_UNIT / 2 * 12; +} +/* TST.L (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4a98_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2886; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2886: ; +return CYCLE_UNIT / 2 * 12; +} +/* TST.L -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4aa0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2887; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel2887: ; +return CYCLE_UNIT / 2 * 14; +} +/* TST.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4aa8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2888; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2888: ; +return CYCLE_UNIT / 2 * 16; +} +/* TST.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ab0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2889; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2889: ; +return CYCLE_UNIT / 2 * 18; +} +/* TST.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4ab8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2890; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel2890: ; +return CYCLE_UNIT / 2 * 16; +} +/* TST.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4ab9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2891; + } +{{ uae_s32 src = get_long (srca); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 6); +endlabel2891: ; +return CYCLE_UNIT / 2 * 20; +} +/* TAS.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4ac0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src |= 0x80; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((src) & 0xff); +}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* TAS.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ad0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TAS.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4ad8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* TAS.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ae0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* TAS.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ae8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TAS.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4af0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* TAS.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4af8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* TAS.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4af9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + src |= 0x80; + put_byte (srca,src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* MVMEL.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4c90_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2900; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel2900: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4c98_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2901; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel2901: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ca8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2902; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2902: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cb0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2903; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2903: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4cb8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2904; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2904: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4cb9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = get_long_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2905; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel2905: ; +return CYCLE_UNIT / 2 * 16; +} +/* MVMEL.W #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4cba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2906; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2906: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cbb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2907; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2907: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4cd0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2908; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel2908: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.L #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4cd8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2909; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel2909: ; +return CYCLE_UNIT / 2 * 8; +} +/* MVMEL.L #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ce8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2910; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2910: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cf0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2911; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2911: ; +return CYCLE_UNIT / 2 * 14; +} +/* MVMEL.L #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4cf8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2912; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2912: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4cf9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = get_long_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2913; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel2913: ; +return CYCLE_UNIT / 2 * 16; +} +/* MVMEL.L #.W,(d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4cfa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2914; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2914: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4cfb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_word_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel2915; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel2915: ; +return CYCLE_UNIT / 2 * 14; +} +/* TRAP.L # */ +unsigned long REGPARAM2 CPUFUNC(op_4e40_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 15); +{{ uae_u32 src = srcreg; + m68k_incpc (regs, 2); + Exception (src + 32, regs, 0); +}}return CYCLE_UNIT / 2 * 0; +} +/* LINK.W An,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e50_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr olda; + olda = m68k_areg (regs, 7) - 4; + if (olda & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, olda); + goto endlabel2917; + } +{ m68k_areg (regs, 7) = olda; +{ uae_s32 src = m68k_areg (regs, srcreg); + put_long (olda,src); + m68k_areg (regs, srcreg) = (m68k_areg (regs, 7)); +{ uae_s16 offs = get_word_prefetch (regs, 4); + m68k_areg (regs, 7) += offs; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +}}}}} m68k_incpc (regs, 4); +endlabel2917: ; +return CYCLE_UNIT / 2 * 16; +} +/* UNLK.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e58_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); + m68k_areg (regs, 7) = src; +{ uaecptr olda = m68k_areg (regs, 7); + if (olda & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, olda); + goto endlabel2918; + } +{{ uae_s32 old = get_long (olda); + m68k_areg (regs, 7) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (old); +}}}}} m68k_incpc (regs, 2); +endlabel2918: ; +return CYCLE_UNIT / 2 * 12; +} +/* MVR2USP.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e60_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2919; } +{{ uae_s32 src = m68k_areg (regs, srcreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + regs->usp = src; +}}} m68k_incpc (regs, 2); +endlabel2919: ; +return CYCLE_UNIT / 2 * 4; +} +/* MVUSP2R.L An */ +unsigned long REGPARAM2 CPUFUNC(op_4e68_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2920; } +{{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (regs->usp); +}}} m68k_incpc (regs, 2); +endlabel2920: ; +return CYCLE_UNIT / 2 * 4; +} +/* RESET.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e70_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2921; } +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); + cpureset(); + regs->irc = get_iword (regs, 4); +}} m68k_incpc (regs, 2); +endlabel2921: ; +return CYCLE_UNIT / 2 * 4; +} +/* NOP.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e71_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* STOP.L #.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e72_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2923; } +{{ uae_s16 src = get_word_prefetch (regs, 4); + regs->sr = src; + MakeFromSR (regs); + m68k_setstopped (regs, 1); + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2923: ; +return CYCLE_UNIT / 2 * 12; +} +/* RTE.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel2924; } +{{ uaecptr sra = m68k_areg (regs, 7); + if (sra & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, sra); + goto endlabel2924; + } +{{ uae_s16 sr = get_word (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel2924; + } +{{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; + regs->sr = sr; m68k_setpc (regs, pc); + MakeFromSR (regs); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}}}endlabel2924: ; +return CYCLE_UNIT / 2 * 20; +} +/* RTD.L #.W */ +unsigned long REGPARAM2 CPUFUNC(op_4e74_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel2925; + } +{{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; +{ uae_s16 offs = get_word_prefetch (regs, 4); + m68k_areg (regs, 7) += offs; + if (pc & 1) + exception3 (0x4e74, m68k_getpc (regs), pc); + else + m68k_setpc (regs, pc); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2925: ; +return CYCLE_UNIT / 2 * 20; +} +/* RTS.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e75_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_do_rts (regs); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}return CYCLE_UNIT / 2 * 8; +} +/* TRAPV.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e76_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + if (GET_VFLG (®s->ccrflags)) { + Exception (7, regs, m68k_getpc (regs)); + goto endlabel2927; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}endlabel2927: ; +return CYCLE_UNIT / 2 * 4; +} +/* RTR.L */ +unsigned long REGPARAM2 CPUFUNC(op_4e77_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uaecptr sra = m68k_areg (regs, 7); + if (sra & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, sra); + goto endlabel2928; + } +{{ uae_s16 sr = get_word (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel2928; + } +{{ uae_s32 pc = get_long (pca); + m68k_areg (regs, 7) += 4; + regs->sr &= 0xFF00; sr &= 0xFF; + regs->sr |= sr; m68k_setpc (regs, pc); + MakeFromSR (regs); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}}endlabel2928: ; +return CYCLE_UNIT / 2 * 20; +} +/* JSR.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4e90_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr oldpc = m68k_getpc (regs) + 2; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2929; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2929: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ea8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2930; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2930: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4eb0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), regs->irc); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2931; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2931: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4eb8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2932; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2932: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4eb9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_prefetch (regs, 4) << 16; + srca |= regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 6; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2933; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2933: ; +return CYCLE_UNIT / 2 * 12; +} +/* JSR.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4eba_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2934; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2934: ; +return CYCLE_UNIT / 2 * 8; +} +/* JSR.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ebb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, regs->irc); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel2935; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2935: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ed0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2936; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2936: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4ee8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2937; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2937: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4ef0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), regs->irc); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2938; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2938: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4ef8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2939; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2939: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4ef9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_prefetch (regs, 4) << 16; + srca |= regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2940; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2940: ; +return CYCLE_UNIT / 2 * 12; +} +/* JMP.L (d16,PC) */ +unsigned long REGPARAM2 CPUFUNC(op_4efa_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2941; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2941: ; +return CYCLE_UNIT / 2 * 8; +} +/* JMP.L (d8,PC,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4efb_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, regs->irc); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel2942; + } + m68k_setpc (regs, srca); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel2942: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.B #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.B #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_5 +/* ADD.B #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADD.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2953; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2953: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2954; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2954: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2955; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2955: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2956; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2956: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2957; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2957: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADD.W #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2958; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2958: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2959; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2959: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2962; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2962: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2963; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2963: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_50a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2964; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2964: ; +return CYCLE_UNIT / 2 * 22; +} +/* ADD.L #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_50a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2965; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2965: ; +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2966; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2966: ; +return CYCLE_UNIT / 2 * 26; +} +/* ADD.L #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_50b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2967; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2967: ; +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_50b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2968; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2968: ; +return CYCLE_UNIT / 2 * 28; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_50c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_50c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 0)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel2970; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel2970: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_50d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_50d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_50e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_50e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_50f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_50f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_50f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.B #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.B #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUB.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2988; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2988: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2989; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2989: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2990; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2990: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2991; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2991: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2992; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2992: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2993; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel2993: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2994; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel2994: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L #,An */ +unsigned long REGPARAM2 CPUFUNC(op_5188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L #,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2997; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2997: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2998; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2998: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L #,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_51a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2999; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel2999: ; +return CYCLE_UNIT / 2 * 22; +} +/* SUB.L #,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_51a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3000; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3000: ; +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3001; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3001: ; +return CYCLE_UNIT / 2 * 26; +} +/* SUB.L #,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_51b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3002; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3002: ; +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L #,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_51b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3003; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3003: ; +return CYCLE_UNIT / 2 * 28; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_51c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_51c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 1)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3005; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3005: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_51d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_51d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_51e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_51e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_51f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_51f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_51f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_52c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_52c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 2)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3014; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3014: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_52d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_52d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_52e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_52e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_52f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_52f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_52f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_53c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_53c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 3)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3023; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3023: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_53d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_53d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_53e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_53e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_53f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_53f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_53f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_54c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_54c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 4)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3032; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3032: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_54d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_54d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_54e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_54e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_54f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_54f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_54f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_55c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_55c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 5)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3041; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3041: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_55d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_55d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_55e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_55e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_55f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_55f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_55f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_56c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_56c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 6)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3050; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3050: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_56d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_56d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_56e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_56e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_56f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_56f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_56f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_57c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_57c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 7)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3059; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3059: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_57d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_57d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_57e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_57e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_57f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_57f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_57f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_58c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_58c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 8)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3068; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3068: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_58d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_58d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_58e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_58e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_58f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_58f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_58f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_59c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_59c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 9)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3077; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3077: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_59d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_59d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_59e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_59e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_59f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_59f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_59f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5ac0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5ac8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 10)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3086; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3086: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ad0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5ad8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ae0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ae8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5af0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5af8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5af9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5bc0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5bc8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 11)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3095; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3095: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5bd0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5bd8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5be0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5be8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5bf0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5bf8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5bf9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5cc0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5cc8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 12)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3104; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3104: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5cd0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5cd8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ce0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ce8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5cf0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5cf8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5cf9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5dc0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5dc8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 13)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3113; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3113: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5dd0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5dd8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5de0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5de8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5df0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5df8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5df9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5ec0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5ec8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 14)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3122; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3122: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ed0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5ed8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ee0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5ee8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ef0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5ef8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5ef9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Scc.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_5fc0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* DBcc.W Dn,#.W */ +unsigned long REGPARAM2 CPUFUNC(op_5fc8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + if (!cctrue (®s->ccrflags, 15)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel3131; + } + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return CYCLE_UNIT / 2 * 12; + } + } else { + } + m68k_setpc (regs, oldpc + 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}endlabel3131: ; +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fd0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_5fd8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* Scc.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fe0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* Scc.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_5fe8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* Scc.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_5ff0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* Scc.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_5ff8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +#endif + +#ifdef PART_6 +/* Scc.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_5ff9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + put_byte (srca,val); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6000_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3139; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3139: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6001_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3140; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3140: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_60ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 0)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3141; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3141; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3141; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3141: ; +return CYCLE_UNIT / 2 * 12; +} +/* BSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6100_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s16 src = regs->irc; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel3142; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 4, s); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3142: ; +return CYCLE_UNIT / 2 * 8; +} +/* BSR.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6101_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{ uae_s32 s; +{ uae_u32 src = srcreg; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel3143; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3143: ; +return CYCLE_UNIT / 2 * 8; +} +/* BSR.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_61ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s32 src; + src = get_word_prefetch (regs, 4) << 16; + src |= regs->irc; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel3144; + } + m68k_do_bsr (regs, m68k_getpc (regs) + 6, s); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3144: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6200_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3145; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3145: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6201_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3146; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3146: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_62ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 2)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3147; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3147; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3147; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3147: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6300_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3148; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3148: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6301_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3149; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3149: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_63ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 3)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3150; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3150; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3150; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3150: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6400_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3151; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3151: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6401_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3152; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3152: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_64ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 4)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3153; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3153; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3153; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3153: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6500_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3154; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3154: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6501_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3155; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3155: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_65ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 5)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3156; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3156; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3156; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3156: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6600_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3157; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3157: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6601_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3158; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3158: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_66ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 6)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3159; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3159; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3159; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3159: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6700_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3160; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3160: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6701_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3161; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3161: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_67ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 7)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3162; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3162; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3162; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3162: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6800_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3163; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3163: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6801_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3164; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3164: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_68ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 8)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3165; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3165; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3165; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3165: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6900_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3166; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3166: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6901_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3167; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3167: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_69ff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 9)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3168; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3168; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3168; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3168: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6a00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3169; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3169: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6a01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3170; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3170: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6aff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 10)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3171; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3171; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3171; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3171: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6b00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3172; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3172: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6b01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3173; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3173: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6bff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 11)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3174; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3174; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3174; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3174: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6c00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3175; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3175: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6c01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3176; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3176: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6cff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 12)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3177; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3177; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3177; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3177: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6d00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3178; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3178: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6d01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3179; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3179: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6dff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 13)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3180; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3180; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3180; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3180: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6e00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3181; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3181: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6e01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3182; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3182: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6eff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 14)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3183; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3183; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3183; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3183: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6f00_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3184; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3184: ; +return CYCLE_UNIT / 2 * 12; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6f01_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3185; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3185: ; +return CYCLE_UNIT / 2 * 8; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6fff_5)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue (®s->ccrflags, 15)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel3186; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3186; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel3186; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3186: ; +return CYCLE_UNIT / 2 * 12; +} +/* MOVE.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_7000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_u32 src = srcreg; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return CYCLE_UNIT / 2 * 4; +} +/* OR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* OR.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* OR.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* OR.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_803c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3200; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3200: ; +return CYCLE_UNIT / 2 * 8; +} +/* OR.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3201; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3201: ; +return CYCLE_UNIT / 2 * 8; +} +/* OR.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3202; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3202: ; +return CYCLE_UNIT / 2 * 10; +} +/* OR.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3203; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3203: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3204; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3204: ; +return CYCLE_UNIT / 2 * 14; +} +/* OR.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3205; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3205: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3206; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 6); +endlabel3206: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3207; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3207: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3208; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3208: ; +return CYCLE_UNIT / 2 * 14; +} +/* OR.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_807c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* OR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* OR.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3211; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3211: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3212; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3212: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3213; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3213: ; +return CYCLE_UNIT / 2 * 14; +} +/* OR.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3214; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3214: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3215; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3215: ; +return CYCLE_UNIT / 2 * 18; +} +/* OR.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3216; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3216: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3217; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 6); +endlabel3217: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3218; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3218: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3219; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3219: ; +return CYCLE_UNIT / 2 * 18; +} +/* OR.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* DIVU.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3221; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}endlabel3221: ; +return CYCLE_UNIT / 2 * 110; +} +/* DIVU.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3222; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3222; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3222: ; +return CYCLE_UNIT / 2 * 114; +} +/* DIVU.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3223; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3223; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3223: ; +return CYCLE_UNIT / 2 * 114; +} +/* DIVU.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3224; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3224; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3224: ; +return CYCLE_UNIT / 2 * 116; +} +/* DIVU.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3225; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3225; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3225: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3226; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3226; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3226: ; +return CYCLE_UNIT / 2 * 120; +} +/* DIVU.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3227; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3227; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3227: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3228; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel3228; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_incpc (regs, 6); + } +}}}}}endlabel3228: ; +return CYCLE_UNIT / 2 * 122; +} +/* DIVU.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3229; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3229; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3229: ; +return CYCLE_UNIT / 2 * 118; +} +/* DIVU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3230; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3230; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3230: ; +return CYCLE_UNIT / 2 * 120; +} +/* DIVU.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3231; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel3231: ; +return CYCLE_UNIT / 2 * 114; +} +/* SBCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SBCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* OR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* OR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* OR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* OR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* OR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3241; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3241: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3242; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3242: ; +return CYCLE_UNIT / 2 * 12; +} +/* OR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3243; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3243: ; +return CYCLE_UNIT / 2 * 14; +} +/* OR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3244; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3244: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3245; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3245: ; +return CYCLE_UNIT / 2 * 18; +} +/* OR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3246; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3246: ; +return CYCLE_UNIT / 2 * 16; +} +/* OR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3247; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3247: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3248; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3248: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3249; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3249: ; +return CYCLE_UNIT / 2 * 20; +} +/* OR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3250; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3250: ; +return CYCLE_UNIT / 2 * 22; +} +/* OR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3251; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3251: ; +return CYCLE_UNIT / 2 * 24; +} +/* OR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_81b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3252; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3252: ; +return CYCLE_UNIT / 2 * 26; +} +/* OR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_81b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3253; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3253: ; +return CYCLE_UNIT / 2 * 24; +} +/* OR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_81b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3254; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3254: ; +return CYCLE_UNIT / 2 * 28; +} +/* DIVS.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3255; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}endlabel3255: ; +return CYCLE_UNIT / 2 * 142; +} +/* DIVS.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3256; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3256; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3256: ; +return CYCLE_UNIT / 2 * 146; +} +/* DIVS.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3257; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3257; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3257: ; +return CYCLE_UNIT / 2 * 146; +} +/* DIVS.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3258; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3258; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3258: ; +return CYCLE_UNIT / 2 * 148; +} +/* DIVS.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3259; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3259; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3259: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3260; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3260; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3260: ; +return CYCLE_UNIT / 2 * 152; +} +/* DIVS.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3261; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3261; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3261: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3262; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel3262; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_incpc (regs, 6); + } +}}}}}endlabel3262: ; +return CYCLE_UNIT / 2 * 154; +} +/* DIVS.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3263; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3263; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3263: ; +return CYCLE_UNIT / 2 * 150; +} +/* DIVS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3264; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3264; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3264: ; +return CYCLE_UNIT / 2 * 152; +} +/* DIVS.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3265; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel3265: ; +return CYCLE_UNIT / 2 * 146; +} +/* SUB.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* SUB.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_903c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3279; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3279: ; +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3280; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3280: ; +return CYCLE_UNIT / 2 * 8; +} +/* SUB.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3281; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3281: ; +return CYCLE_UNIT / 2 * 10; +} +/* SUB.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3282; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3282: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3283; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3283: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3284; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3284: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3285; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 6); +endlabel3285: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3286; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3286: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3287; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3287: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_907c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUB.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUB.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3291; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3291: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3292; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3292: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3293; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3293: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUB.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3294; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3294: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3295; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3295: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUB.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3296; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3296: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3297; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3297: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3298; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3298: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3299; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3299: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUB.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_90bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_90c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_90c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3303; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3303: ; +return CYCLE_UNIT / 2 * 8; +} +/* SUBA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_90d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3304; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3304: ; +return CYCLE_UNIT / 2 * 8; +} +/* SUBA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3305; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3305: ; +return CYCLE_UNIT / 2 * 10; +} +/* SUBA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_90e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3306; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3306: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3307; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3307: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUBA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_90f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3308; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3308: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_90f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3309; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3309: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_90fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3310; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3310: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_90fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3311; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3311: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUBA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_90fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* SUBX.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* SUB.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* SUB.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_9128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* SUB.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_9138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* SUB.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_9139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* SUBX.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3323; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3323; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel3323: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3324; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3324: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3325; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3325: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUB.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3326; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3326: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUB.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_9168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3327; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3327: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_9170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3328; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3328: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUB.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_9178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3329; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3329: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUB.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_9179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3330; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3330: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUBX.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_9180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBX.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3332; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3332; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel3332: ; +return CYCLE_UNIT / 2 * 28; +} +/* SUB.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_9190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3333; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3333: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_9198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3334; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3334: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUB.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_91a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3335; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3335: ; +return CYCLE_UNIT / 2 * 22; +} +/* SUB.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_91a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3336; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3336: ; +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_91b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3337; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3337: ; +return CYCLE_UNIT / 2 * 26; +} +/* SUB.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_91b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3338; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3338: ; +return CYCLE_UNIT / 2 * 24; +} +/* SUB.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_91b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3339; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3339: ; +return CYCLE_UNIT / 2 * 28; +} +/* SUBA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_91c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_91c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* SUBA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3342; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3342: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_91d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3343; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3343: ; +return CYCLE_UNIT / 2 * 12; +} +/* SUBA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3344; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3344: ; +return CYCLE_UNIT / 2 * 14; +} +/* SUBA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3345; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3345: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3346; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3346: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUBA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3347; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3347: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3348; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3348: ; +return CYCLE_UNIT / 2 * 20; +} +/* SUBA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3349; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3349: ; +return CYCLE_UNIT / 2 * 16; +} +/* SUBA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3350; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3350: ; +return CYCLE_UNIT / 2 * 18; +} +/* SUBA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* CMP.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* CMP.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* CMP.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +#endif + +#ifdef PART_7 +/* CMP.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3365; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3365: ; +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3366; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3366: ; +return CYCLE_UNIT / 2 * 8; +} +/* CMP.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3367; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3367: ; +return CYCLE_UNIT / 2 * 10; +} +/* CMP.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3368; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3368: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3369; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3369: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMP.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3370; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3370: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3371; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3371: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3372; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3372: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3373; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3373: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMP.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* CMP.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMP.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3377; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3377: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3378; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3378: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMP.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3379; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3379: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMP.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3380; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3380: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3381; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3381: ; +return CYCLE_UNIT / 2 * 18; +} +/* CMP.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3382; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3382: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3383; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3383: ; +return CYCLE_UNIT / 2 * 20; +} +/* CMP.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3384; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3384: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMP.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3385; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3385: ; +return CYCLE_UNIT / 2 * 18; +} +/* CMP.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b0bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3389; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3389: ; +return CYCLE_UNIT / 2 * 8; +} +/* CMPA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3390; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3390: ; +return CYCLE_UNIT / 2 * 8; +} +/* CMPA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3391; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3391: ; +return CYCLE_UNIT / 2 * 10; +} +/* CMPA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3392; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3392: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3393; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3393: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMPA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3394; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3394: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3395; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3395: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3396; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3396: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3397; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3397: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMPA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* EOR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.B (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* EOR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* EOR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* EOR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* EOR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EOR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3409; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3409; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3409: ; +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3410; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3410: ; +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3411; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3411: ; +return CYCLE_UNIT / 2 * 12; +} +/* EOR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3412; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3412: ; +return CYCLE_UNIT / 2 * 14; +} +/* EOR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3413; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3413: ; +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3414; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3414: ; +return CYCLE_UNIT / 2 * 18; +} +/* EOR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3415; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3415: ; +return CYCLE_UNIT / 2 * 16; +} +/* EOR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3416; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3416: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPM.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3418; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3418; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3418: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3419; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3419: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3420; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3420: ; +return CYCLE_UNIT / 2 * 20; +} +/* EOR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3421; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3421: ; +return CYCLE_UNIT / 2 * 22; +} +/* EOR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3422; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3422: ; +return CYCLE_UNIT / 2 * 24; +} +/* EOR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b1b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3423; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3423: ; +return CYCLE_UNIT / 2 * 26; +} +/* EOR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b1b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3424; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3424: ; +return CYCLE_UNIT / 2 * 24; +} +/* EOR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b1b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3425; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3425: ; +return CYCLE_UNIT / 2 * 28; +} +/* CMPA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* CMPA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3428; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3428: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3429; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3429: ; +return CYCLE_UNIT / 2 * 12; +} +/* CMPA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3430; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel3430: ; +return CYCLE_UNIT / 2 * 14; +} +/* CMPA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3431; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3431: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3432; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3432: ; +return CYCLE_UNIT / 2 * 18; +} +/* CMPA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3433; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3433: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3434; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3434: ; +return CYCLE_UNIT / 2 * 20; +} +/* CMPA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3435; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3435: ; +return CYCLE_UNIT / 2 * 16; +} +/* CMPA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3436; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3436: ; +return CYCLE_UNIT / 2 * 18; +} +/* CMPA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* AND.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* AND.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* AND.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c03c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3450; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3450: ; +return CYCLE_UNIT / 2 * 8; +} +/* AND.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3451; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3451: ; +return CYCLE_UNIT / 2 * 8; +} +/* AND.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3452; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel3452: ; +return CYCLE_UNIT / 2 * 10; +} +/* AND.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3453; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3453: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3454; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3454: ; +return CYCLE_UNIT / 2 * 14; +} +/* AND.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3455; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3455: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3456; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 6); +endlabel3456: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3457; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3457: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3458; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel3458: ; +return CYCLE_UNIT / 2 * 14; +} +/* AND.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c07c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* AND.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3461; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3461: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3462; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3462: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3463; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel3463: ; +return CYCLE_UNIT / 2 * 14; +} +/* AND.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3464; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3464: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3465; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3465: ; +return CYCLE_UNIT / 2 * 18; +} +/* AND.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3466; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3466: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3467; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 6); +endlabel3467: ; +return CYCLE_UNIT / 2 * 20; +} +/* AND.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3468; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3468: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3469; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel3469: ; +return CYCLE_UNIT / 2 * 18; +} +/* AND.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* MULU.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}return CYCLE_UNIT / 2 * 58; +} +/* MULU.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3472; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel3472: ; +return CYCLE_UNIT / 2 * 62; +} +/* MULU.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3473; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel3473: ; +return CYCLE_UNIT / 2 * 62; +} +/* MULU.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3474; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel3474: ; +return CYCLE_UNIT / 2 * 64; +} +/* MULU.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3475; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel3475: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3476; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel3476: ; +return CYCLE_UNIT / 2 * 68; +} +/* MULU.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3477; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel3477: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3478; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 6); +}}}}}}endlabel3478: ; +return CYCLE_UNIT / 2 * 70; +} +/* MULU.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3479; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel3479: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3480; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel3480: ; +return CYCLE_UNIT / 2 * 68; +} +/* MULU.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c0fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}return CYCLE_UNIT / 2 * 62; +} +/* ABCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ABCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* AND.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* AND.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* AND.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* AND.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* EXG.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, srcreg) = (dst); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* EXG.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_c148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3493; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3493: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3494; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3494: ; +return CYCLE_UNIT / 2 * 12; +} +/* AND.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3495; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3495: ; +return CYCLE_UNIT / 2 * 14; +} +/* AND.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3496; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3496: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3497; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3497: ; +return CYCLE_UNIT / 2 * 18; +} +/* AND.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3498; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3498: ; +return CYCLE_UNIT / 2 * 16; +} +/* AND.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3499; + } +{{ uae_s16 dst = get_word (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3499: ; +return CYCLE_UNIT / 2 * 20; +} +/* EXG.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_c188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* AND.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3501; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3501: ; +return CYCLE_UNIT / 2 * 20; +} +/* AND.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_c198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3502; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3502: ; +return CYCLE_UNIT / 2 * 20; +} +/* AND.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c1a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3503; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3503: ; +return CYCLE_UNIT / 2 * 22; +} +/* AND.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_c1a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3504; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3504: ; +return CYCLE_UNIT / 2 * 24; +} +/* AND.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_c1b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3505; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3505: ; +return CYCLE_UNIT / 2 * 26; +} +/* AND.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_c1b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3506; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3506: ; +return CYCLE_UNIT / 2 * 24; +} +/* AND.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_c1b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3507; + } +{{ uae_s32 dst = get_long (dsta); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3507: ; +return CYCLE_UNIT / 2 * 28; +} +/* MULS.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 58; +} +/* MULS.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3509; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3509: ; +return CYCLE_UNIT / 2 * 62; +} +/* MULS.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3510; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3510: ; +return CYCLE_UNIT / 2 * 62; +} +/* MULS.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3511; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3511: ; +return CYCLE_UNIT / 2 * 64; +} +/* MULS.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3512; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3512: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3513; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3513: ; +return CYCLE_UNIT / 2 * 68; +} +/* MULS.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3514; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3514: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3515; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3515: ; +return CYCLE_UNIT / 2 * 70; +} +/* MULS.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3516; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3516: ; +return CYCLE_UNIT / 2 * 66; +} +/* MULS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3517; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3517: ; +return CYCLE_UNIT / 2 * 68; +} +/* MULS.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c1fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(newv)); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 62; +} +/* ADD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 10; +} +/* ADD.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d039_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d03c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3532; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3532: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3533; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3533: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADD.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3534; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel3534: ; +return CYCLE_UNIT / 2 * 10; +} +/* ADD.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3535; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3535: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3536; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3536: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3537; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3537: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d079_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3538; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 6); +endlabel3538: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07a_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3539; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3539: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07b_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3540; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel3540: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d07c_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADD.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADD.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3544; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3544: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3545; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3545: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3546; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3546: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADD.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3547; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3547: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3548; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3548: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADD.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3549; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3549: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3550; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3550: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0ba_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3551; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3551: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0bb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3552; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3552: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADD.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d0bc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3556; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3556: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADDA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3557; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3557: ; +return CYCLE_UNIT / 2 * 8; +} +/* ADDA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3558; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3558: ; +return CYCLE_UNIT / 2 * 10; +} +/* ADDA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3559; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3559: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3560; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3560: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADDA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3561; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3561: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3562; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3562: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3563; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3563: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3564; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3564: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADDA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d0fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 8; +} +/* ADDX.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 12; +} +/* ADD.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 14; +} +/* ADD.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 18; +} +/* ADD.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +return CYCLE_UNIT / 2 * 16; +} +/* ADD.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d139_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 20; +} +/* ADDX.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3576; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3576; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel3576: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3577; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3577: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3578; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3578: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADD.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3579; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3579: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADD.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3580; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3580: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3581; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3581: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADD.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3582; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3582: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADD.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d179_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3583; + } +{{ uae_s16 dst = get_word (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3583: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADDX.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_d180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDX.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3585; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3585; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_long (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel3585: ; +return CYCLE_UNIT / 2 * 28; +} +/* ADD.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3586; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3586: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_d198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3587; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3587: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADD.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_d1a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3588; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel3588: ; +return CYCLE_UNIT / 2 * 22; +} +/* ADD.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_d1a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3589; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3589: ; +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_d1b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3590; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3590: ; +return CYCLE_UNIT / 2 * 26; +} +/* ADD.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_d1b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3591; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3591: ; +return CYCLE_UNIT / 2 * 24; +} +/* ADD.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_d1b9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3592; + } +{{ uae_s32 dst = get_long (dsta); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_long (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3592: ; +return CYCLE_UNIT / 2 * 28; +} +/* ADDA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1c0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1c8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ADDA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3595; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3595: ; +return CYCLE_UNIT / 2 * 12; +} +/* ADDA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3596; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3596: ; +return CYCLE_UNIT / 2 * 12; +} +#endif + +#ifdef PART_8 +/* ADDA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3597; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3597: ; +return CYCLE_UNIT / 2 * 14; +} +/* ADDA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3598; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3598: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3599; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3599: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADDA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3600; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3600: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1f9_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3601; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3601: ; +return CYCLE_UNIT / 2 * 20; +} +/* ADDA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fa_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3602; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3602: ; +return CYCLE_UNIT / 2 * 16; +} +/* ADDA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fb_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3603; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3603: ; +return CYCLE_UNIT / 2 * 18; +} +/* ADDA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_d1fc_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +return CYCLE_UNIT / 2 * 12; +} +/* ASR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e000_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e008_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e010_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e018_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e020_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e028_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e030_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e038_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e040_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e048_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e050_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e058_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e060_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e068_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e070_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e078_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e080_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e088_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e090_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e098_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e0b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3629; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3629: ; +return CYCLE_UNIT / 2 * 12; +} +/* ASRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e0d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3630; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3630: ; +return CYCLE_UNIT / 2 * 12; +} +/* ASRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3631; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3631: ; +return CYCLE_UNIT / 2 * 14; +} +/* ASRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3632; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3632: ; +return CYCLE_UNIT / 2 * 16; +} +/* ASRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e0f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3633; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3633: ; +return CYCLE_UNIT / 2 * 18; +} +/* ASRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e0f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3634; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3634: ; +return CYCLE_UNIT / 2 * 16; +} +/* ASRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e0f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3635; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3635: ; +return CYCLE_UNIT / 2 * 20; +} +/* ASL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e100_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e108_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e110_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e118_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e120_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e128_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e130_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e138_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e140_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e148_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e150_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e158_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e160_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e168_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e170_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e178_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e180_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e188_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e190_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e198_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* LSL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROXL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ROL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return CYCLE_UNIT / 2 * 4; +} +/* ASLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3660; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3660: ; +return CYCLE_UNIT / 2 * 12; +} +/* ASLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e1d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3661; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3661: ; +return CYCLE_UNIT / 2 * 12; +} +/* ASLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3662; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3662: ; +return CYCLE_UNIT / 2 * 14; +} +/* ASLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3663; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3663: ; +return CYCLE_UNIT / 2 * 16; +} +/* ASLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e1f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3664; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3664: ; +return CYCLE_UNIT / 2 * 18; +} +/* ASLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e1f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3665; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3665: ; +return CYCLE_UNIT / 2 * 16; +} +/* ASLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e1f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3666; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3666: ; +return CYCLE_UNIT / 2 * 20; +} +/* LSRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3667; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3667: ; +return CYCLE_UNIT / 2 * 12; +} +/* LSRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e2d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3668; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3668: ; +return CYCLE_UNIT / 2 * 12; +} +/* LSRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3669; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3669: ; +return CYCLE_UNIT / 2 * 14; +} +/* LSRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3670; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3670: ; +return CYCLE_UNIT / 2 * 16; +} +/* LSRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e2f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3671; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3671: ; +return CYCLE_UNIT / 2 * 18; +} +/* LSRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e2f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3672; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3672: ; +return CYCLE_UNIT / 2 * 16; +} +/* LSRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e2f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3673; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3673: ; +return CYCLE_UNIT / 2 * 20; +} +/* LSLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3674; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3674: ; +return CYCLE_UNIT / 2 * 12; +} +/* LSLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e3d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3675; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3675: ; +return CYCLE_UNIT / 2 * 12; +} +/* LSLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3676; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3676: ; +return CYCLE_UNIT / 2 * 14; +} +/* LSLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3677; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3677: ; +return CYCLE_UNIT / 2 * 16; +} +/* LSLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e3f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3678; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3678: ; +return CYCLE_UNIT / 2 * 18; +} +/* LSLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e3f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3679; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3679: ; +return CYCLE_UNIT / 2 * 16; +} +/* LSLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e3f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3680; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3680: ; +return CYCLE_UNIT / 2 * 20; +} +/* ROXRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3681; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3681: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROXRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e4d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3682; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3682: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROXRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3683; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3683: ; +return CYCLE_UNIT / 2 * 14; +} +/* ROXRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3684; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3684: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROXRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e4f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3685; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3685: ; +return CYCLE_UNIT / 2 * 18; +} +/* ROXRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e4f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3686; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3686: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROXRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e4f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3687; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3687: ; +return CYCLE_UNIT / 2 * 20; +} +/* ROXLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3688; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3688: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROXLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e5d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3689; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3689: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROXLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3690; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3690: ; +return CYCLE_UNIT / 2 * 14; +} +/* ROXLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3691; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3691: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROXLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e5f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3692; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3692: ; +return CYCLE_UNIT / 2 * 18; +} +/* ROXLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e5f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3693; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3693: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROXLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e5f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3694; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3694: ; +return CYCLE_UNIT / 2 * 20; +} +/* RORW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3695; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3695: ; +return CYCLE_UNIT / 2 * 12; +} +/* RORW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e6d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3696; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3696: ; +return CYCLE_UNIT / 2 * 12; +} +/* RORW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3697; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3697: ; +return CYCLE_UNIT / 2 * 14; +} +/* RORW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3698; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3698: ; +return CYCLE_UNIT / 2 * 16; +} +/* RORW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e6f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3699; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3699: ; +return CYCLE_UNIT / 2 * 18; +} +/* RORW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e6f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3700; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3700: ; +return CYCLE_UNIT / 2 * 16; +} +/* RORW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e6f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3701; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3701: ; +return CYCLE_UNIT / 2 * 20; +} +/* ROLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7d0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3702; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3702: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e7d8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3703; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3703: ; +return CYCLE_UNIT / 2 * 12; +} +/* ROLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7e0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3704; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3704: ; +return CYCLE_UNIT / 2 * 14; +} +/* ROLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7e8_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3705; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3705: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e7f0_5)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3706; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3706: ; +return CYCLE_UNIT / 2 * 18; +} +/* ROLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e7f8_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3707; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3707: ; +return CYCLE_UNIT / 2 * 16; +} +/* ROLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e7f9_5)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3708; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3708: ; +return CYCLE_UNIT / 2 * 20; +} +#endif + diff --git a/src/cpuemu_6.c b/src/cpuemu_6.c new file mode 100644 index 0000000..efbb629 --- /dev/null +++ b/src/cpuemu_6.c @@ -0,0 +1,31004 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "machdep/m68kops.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define CPUFUNC(x) x##_ff +#define SET_CFLG_ALWAYS(flags, x) SET_CFLG(flags, x) +#define SET_NFLG_ALWAYS(flags, x) SET_NFLG(flags, x) +#ifdef NOFLAGS +#include "noflags.h" +#endif + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +/* OR.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +} +/* OR.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* OR.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0038_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* OR.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0039_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 8); +} +/* ORSR.B #.W */ +void REGPARAM2 CPUFUNC(op_003c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + src &= 0xFF; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr |= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +} +/* OR.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +} +/* OR.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3719; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3719: ; +} +/* OR.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3720; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3720: ; +} +/* OR.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3721; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3721: ; +} +/* OR.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3722; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3722: ; +} +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3723; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3723: ; +} +/* OR.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0078_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3724; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3724: ; +} +/* OR.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0079_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3725; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel3725: ; +} +/* ORSR.W #.W */ +void REGPARAM2 CPUFUNC(op_007c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel3726; } +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr |= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel3726: ; +} +/* OR.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +} +/* OR.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3728; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3728: ; +} +/* OR.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3729; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3729: ; +} +/* OR.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_00a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3730; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3730: ; +} +/* OR.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_00a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3731; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3731: ; +} +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_00b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3732; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3732: ; +} +/* OR.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_00b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3733; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3733: ; +} +/* OR.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_00b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3734; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 10); +endlabel3734: ; +} +/* BTST.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_0100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 2); +} +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_0108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_u16 val = (get_byte_ce (memp) << 8) + get_byte_ce (memp + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_0110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +} +/* BTST.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_0118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +} +/* BTST.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_0120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 2); +} +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_013a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_013b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B Dn,#.B */ +void REGPARAM2 CPUFUNC(op_013c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = (uae_u8)get_word_ce_prefetch (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +} +/* BCHG.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_0140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_0148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (get_byte_ce (memp) << 24) + (get_byte_ce (memp + 2) << 16) + + (get_byte_ce (memp + 4) << 8) + get_byte_ce (memp + 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (val); +}} m68k_incpc (regs, 4); +} +/* BCHG.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_0150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_0158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCHG.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_0160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCHG.B Dn,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_017a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B Dn,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_017b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_0180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (memp, src >> 8); put_byte_ce (memp + 2, src); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}} m68k_incpc (regs, 4); +} +/* BCLR.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_0190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_0198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCLR.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_01a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_01a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_01b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_01b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_01b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.B Dn,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_01ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B Dn,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_01bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_01c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_01c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); + uaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (memp, src >> 24); put_byte_ce (memp + 2, src >> 16); + put_byte_ce (memp + 4, src >> 8); put_byte_ce (memp + 6, src); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}} m68k_incpc (regs, 4); +} +/* BSET.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_01d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BSET.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_01d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BSET.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_01e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 2); +} +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_01e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_01f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_01f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_01f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.B Dn,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_01fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 2; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_getpc (regs) + 2; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B Dn,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_01fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = 3; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 2; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0200_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0210_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0218_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0220_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0228_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0230_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* AND.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0238_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* AND.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0239_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 8); +} +/* ANDSR.B #.W */ +void REGPARAM2 CPUFUNC(op_023c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + src |= 0xFF00; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr &= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +} +/* AND.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0240_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +} +/* AND.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0250_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3790; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3790: ; +} +/* AND.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0258_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3791; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3791: ; +} +/* AND.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0260_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3792; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3792: ; +} +/* AND.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0268_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3793; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3793: ; +} +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0270_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3794; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3794: ; +} +/* AND.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0278_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3795; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3795: ; +} +/* AND.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0279_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3796; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel3796: ; +} +/* ANDSR.W #.W */ +void REGPARAM2 CPUFUNC(op_027c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel3797; } +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr &= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel3797: ; +} +/* AND.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0280_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +} +/* AND.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0290_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3799; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3799: ; +} +/* AND.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0298_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3800; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3800: ; +} +/* AND.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_02a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3801; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3801: ; +} +/* AND.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_02a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3802; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3802: ; +} +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_02b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3803; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3803: ; +} +/* AND.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_02b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3804; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3804: ; +} +/* AND.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_02b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3805; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 10); +endlabel3805: ; +} +/* SUB.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0400_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0410_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0418_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0420_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0428_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0430_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0438_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0439_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +} +/* SUB.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0440_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +} +/* SUB.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0450_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3815; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3815: ; +} +/* SUB.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0458_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3816; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3816: ; +} +/* SUB.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0460_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3817; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3817: ; +} +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0468_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3818; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3818: ; +} +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0470_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3819; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3819: ; +} +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0478_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3820; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3820: ; +} +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0479_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3821; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3821: ; +} +/* SUB.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0480_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +} +/* SUB.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0490_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3823; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3823: ; +} +/* SUB.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0498_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3824; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3824: ; +} +/* SUB.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_04a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3825; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3825: ; +} +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_04a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3826; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3826: ; +} +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_04b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3827; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3827: ; +} +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_04b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3828; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3828: ; +} +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_04b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3829; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 10); +endlabel3829: ; +} +/* ADD.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0600_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0610_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0618_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0620_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0628_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0630_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0638_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0639_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 8); +} +/* ADD.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0640_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +} +/* ADD.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0650_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3839; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3839: ; +} +/* ADD.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0658_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3840; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3840: ; +} +/* ADD.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0660_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3841; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel3841: ; +} +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0668_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3842; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3842: ; +} +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0670_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3843; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3843: ; +} +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0678_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3844; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3844: ; +} +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0679_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3845; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3845: ; +} +/* ADD.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0680_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +} +/* ADD.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0690_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3847; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3847: ; +} +/* ADD.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0698_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3848; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3848: ; +} +/* ADD.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_06a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3849; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel3849: ; +} +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_06a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3850; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3850: ; +} +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_06b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3851; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3851: ; +} +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_06b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3852; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 8); +endlabel3852: ; +} +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_06b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3853; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 10); +endlabel3853: ; +} +/* BTST.L #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0800_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 4); +} +/* BTST.B #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0810_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0818_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0820_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 4); +} +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0828_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0830_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0838_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0839_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 8); +} +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_083a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_083b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}}} m68k_incpc (regs, 6); +} +/* BTST.B #.W,#.B */ +void REGPARAM2 CPUFUNC(op_083c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = (uae_u8)get_word_ce_prefetch (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); +}}} m68k_incpc (regs, 6); +} +/* BCHG.L #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0840_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 31; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +} +/* BCHG.B #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0850_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0858_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0860_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0868_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0870_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0878_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0879_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 8); +} +/* BCHG.B #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_087a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCHG.B #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_087b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + dst ^= (1 << src); + SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.L #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0880_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +} +/* BCLR.B #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0890_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0898_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_08a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_08a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_08b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_08b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_08b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 8); +} +/* BCLR.B #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_08ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BCLR.B #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_08bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.L #.W,Dn */ +void REGPARAM2 CPUFUNC(op_08c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 31; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg (regs, dstreg) = (dst); +}}} m68k_incpc (regs, 4); +} +/* BSET.B #.W,(An) */ +void REGPARAM2 CPUFUNC(op_08d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_08d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_08e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 4); +} +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_08e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_08f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_08f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_08f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 8); +} +/* BSET.B #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_08fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_getpc (regs) + 4; + dsta += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* BSET.B #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_08fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr tmppc; + uaecptr dsta; + tmppc = m68k_getpc (regs) + 4; + dsta = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src &= 7; + SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_ce (dsta,dst); +}}}} m68k_incpc (regs, 6); +} +/* EOR.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0a00_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +} +/* EOR.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0a10_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0a18_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0a20_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0a28_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0a30_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0a38_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0a39_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 8); +} +/* EORSR.B #.W */ +void REGPARAM2 CPUFUNC(op_0a3c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + src &= 0xFF; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr ^= src; + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +} +/* EOR.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0a40_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +} +/* EOR.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0a50_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3905; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3905: ; +} +/* EOR.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0a58_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3906; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3906: ; +} +/* EOR.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0a60_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3907; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3907: ; +} +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0a68_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3908; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3908: ; +} +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0a70_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3909; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3909: ; +} +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0a78_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3910; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3910: ; +} +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0a79_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3911; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 8); +endlabel3911: ; +} +#endif + +#ifdef PART_2 +/* EORSR.W #.W */ +void REGPARAM2 CPUFUNC(op_0a7c_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel3912; } +{ MakeSR (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + regs->sr ^= src; + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel3912: ; +} +/* EOR.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0a80_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +} +/* EOR.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0a90_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3914; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3914: ; +} +/* EOR.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0a98_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3915; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3915: ; +} +/* EOR.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_0aa0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3916; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel3916: ; +} +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0aa8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3917; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3917: ; +} +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0ab0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3918; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3918: ; +} +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0ab8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3919; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 8); +endlabel3919: ; +} +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0ab9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3920; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 10); +endlabel3920: ; +} +/* CMP.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_0c00_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +} +/* CMP.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_0c10_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_0c18_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_0c20_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0c28_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +} +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0c30_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +} +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0c38_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +} +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0c39_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 8); +} +/* CMP.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_0c40_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +} +/* CMP.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_0c50_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3930; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3930: ; +} +/* CMP.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_0c58_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3931; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3931: ; +} +/* CMP.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_0c60_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3932; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel3932: ; +} +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0c68_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3933; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3933: ; +} +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0c70_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3934; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3934: ; +} +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0c78_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3935; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3935: ; +} +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0c79_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel3936; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel3936: ; +} +/* CMP.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_0c80_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +} +/* CMP.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_0c90_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3938; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3938: ; +} +/* CMP.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_0c98_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3939; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3939: ; +} +/* CMP.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_0ca0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3940; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel3940: ; +} +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_0ca8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3941; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel3941: ; +} +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_0cb0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3942; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel3942: ; +} +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_0cb8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3943; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 8); +endlabel3943: ; +} +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_0cb9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel3944; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 12); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 10); +endlabel3944: ; +} +/* MOVE.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_1000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_1010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_1018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_1020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_1028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_1030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_1038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_1039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_103a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_103b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_103c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_1080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(An) */ +void REGPARAM2 CPUFUNC(op_1090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(An) */ +void REGPARAM2 CPUFUNC(op_1098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(An) */ +void REGPARAM2 CPUFUNC(op_10a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 CPUFUNC(op_10a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_10b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 CPUFUNC(op_10b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 CPUFUNC(op_10b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 CPUFUNC(op_10ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_10bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(An) */ +void REGPARAM2 CPUFUNC(op_10bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_10c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(An)+ */ +void REGPARAM2 CPUFUNC(op_10d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_10d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 CPUFUNC(op_10e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 CPUFUNC(op_10e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_10f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 CPUFUNC(op_10f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 CPUFUNC(op_10f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 CPUFUNC(op_10fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_10fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 CPUFUNC(op_10fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_1100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}} +/* MOVE.B (An),-(An) */ +void REGPARAM2 CPUFUNC(op_1110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}} +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 CPUFUNC(op_1118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}} +/* MOVE.B -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_1120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 2); +}}}}} +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 CPUFUNC(op_1128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}} +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_1130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}} +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 CPUFUNC(op_1138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}} +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 CPUFUNC(op_1139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); +}}}}} +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 CPUFUNC(op_113a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}} +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_113b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}}} +/* MOVE.B #.B,-(An) */ +void REGPARAM2 CPUFUNC(op_113c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); +}}}} +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_1140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_1150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 CPUFUNC(op_1158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_1160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_1168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_1170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_1178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_1179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 CPUFUNC(op_117a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_117b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 CPUFUNC(op_117c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_1180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_1190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_1198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_11bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_11c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 CPUFUNC(op_11d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_11f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_11f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_11fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 CPUFUNC(op_11fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_13c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 CPUFUNC(op_13d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_13f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_13f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 10); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_13fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}} +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 CPUFUNC(op_13fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); + optflag_testb (regs, (uae_s8)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_2000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.L An,Dn */ +void REGPARAM2 CPUFUNC(op_2008_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_2010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4035; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4035: ; +} +/* MOVE.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_2018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4036; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4036: ; +} +/* MOVE.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_2020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4037; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4037: ; +} +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_2028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4038; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4038: ; +} +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_2030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4039; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4039: ; +} +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_2038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4040; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4040: ; +} +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_2039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4041; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4041: ; +} +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_203a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4042; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4042: ; +} +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_203b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4043; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4043: ; +} +/* MOVE.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_203c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.L Dn,An */ +void REGPARAM2 CPUFUNC(op_2040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.L An,An */ +void REGPARAM2 CPUFUNC(op_2048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.L (An),An */ +void REGPARAM2 CPUFUNC(op_2050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4047; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4047: ; +} +/* MOVEA.L (An)+,An */ +void REGPARAM2 CPUFUNC(op_2058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4048; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4048: ; +} +/* MOVEA.L -(An),An */ +void REGPARAM2 CPUFUNC(op_2060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4049; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4049: ; +} +/* MOVEA.L (d16,An),An */ +void REGPARAM2 CPUFUNC(op_2068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4050; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4050: ; +} +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_2070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4051; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4051: ; +} +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_2078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4052; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4052: ; +} +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_2079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4053; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4053: ; +} +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_207a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4054; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4054: ; +} +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_207b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4055; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4055: ; +} +/* MOVEA.L #.L,An */ +void REGPARAM2 CPUFUNC(op_207c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ m68k_areg (regs, dstreg) = (src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_2080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4057; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4057: ; +} +/* MOVE.L An,(An) */ +void REGPARAM2 CPUFUNC(op_2088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4058; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4058: ; +} +/* MOVE.L (An),(An) */ +void REGPARAM2 CPUFUNC(op_2090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4059; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4059; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4059: ; +} +/* MOVE.L (An)+,(An) */ +void REGPARAM2 CPUFUNC(op_2098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4060; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4060; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4060: ; +} +/* MOVE.L -(An),(An) */ +void REGPARAM2 CPUFUNC(op_20a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4061; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4061; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4061: ; +} +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 CPUFUNC(op_20a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4062; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4062; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4062: ; +} +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_20b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4063; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4063; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4063: ; +} +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 CPUFUNC(op_20b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4064; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4064; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4064: ; +} +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 CPUFUNC(op_20b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4065; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4065; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4065: ; +} +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 CPUFUNC(op_20ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4066; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4066; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4066: ; +} +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_20bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4067; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4067; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4067: ; +} +/* MOVE.L #.L,(An) */ +void REGPARAM2 CPUFUNC(op_20bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4068; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4068: ; +} +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_20c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4069; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4069: ; +} +/* MOVE.L An,(An)+ */ +void REGPARAM2 CPUFUNC(op_20c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4070; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4070: ; +} +/* MOVE.L (An),(An)+ */ +void REGPARAM2 CPUFUNC(op_20d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4071; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4071; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4071: ; +} +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_20d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4072; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4072; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4072: ; +} +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 CPUFUNC(op_20e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4073; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4073; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4073: ; +} +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 CPUFUNC(op_20e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4074; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4074; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4074: ; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_20f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4075; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4075; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4075: ; +} +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 CPUFUNC(op_20f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4076; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4076; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4076: ; +} +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 CPUFUNC(op_20f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4077; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4077; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4077: ; +} +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 CPUFUNC(op_20fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4078; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4078; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4078: ; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_20fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4079; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4079; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4079: ; +} +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 CPUFUNC(op_20fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4080; + } +{ m68k_areg (regs, dstreg) += 4; + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4080: ; +} +/* MOVE.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_2100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4081; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}endlabel4081: ; +} +/* MOVE.L An,-(An) */ +void REGPARAM2 CPUFUNC(op_2108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4082; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}endlabel4082: ; +} +/* MOVE.L (An),-(An) */ +void REGPARAM2 CPUFUNC(op_2110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4083; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4083; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4083: ; +} +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 CPUFUNC(op_2118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4084; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4084; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4084: ; +} +/* MOVE.L -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_2120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4085; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4085; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4085: ; +} +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 CPUFUNC(op_2128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4086; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4086; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4086: ; +} +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_2130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4087; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4087; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4087: ; +} +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 CPUFUNC(op_2138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4088; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4088; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4088: ; +} +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 CPUFUNC(op_2139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4089; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4089; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}}}endlabel4089: ; +} +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 CPUFUNC(op_213a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4090; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4090; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4090: ; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_213b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4091; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4091; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4091: ; +} +/* MOVE.L #.L,-(An) */ +void REGPARAM2 CPUFUNC(op_213c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4092; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); +}}}}endlabel4092: ; +} +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_2140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4093; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4093: ; +} +/* MOVE.L An,(d16,An) */ +void REGPARAM2 CPUFUNC(op_2148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4094; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4094: ; +} +#endif + +#ifdef PART_3 +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_2150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4095; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4095; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4095: ; +} +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 CPUFUNC(op_2158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4096; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4096; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4096: ; +} +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_2160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4097; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4097; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4097: ; +} +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_2168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4098; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4098; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4098: ; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_2170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4099; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4099; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4099: ; +} +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_2178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4100; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4100; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4100: ; +} +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_2179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4101; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4101; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4101: ; +} +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 CPUFUNC(op_217a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4102; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4102; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4102: ; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_217b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4103; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4103; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4103: ; +} +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_217c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4104; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4104: ; +} +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_2180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4105; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4105: ; +} +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_2188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4106; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4106: ; +} +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_2190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4107; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4107; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4107: ; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_2198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4108; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4108; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4108: ; +} +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4109; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4109; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4109: ; +} +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4110; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4110; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4110: ; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4111; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4111; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4111: ; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4112; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4112; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4112: ; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4113; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4113; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4113: ; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4114; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4114; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4114: ; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4115; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4115; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4115: ; +} +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_21bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4116; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4116: ; +} +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4117; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4117: ; +} +/* MOVE.L An,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4118; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4118: ; +} +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4119; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4119; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4119: ; +} +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4120; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4120; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4120: ; +} +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4121; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4121; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4121: ; +} +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4122; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4122; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4122: ; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4123; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4123; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4123: ; +} +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4124; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4124; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4124: ; +} +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4125; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4125; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4125: ; +} +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4126; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4126; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4126: ; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_21fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4127; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4127; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4127: ; +} +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_21fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4128; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4128: ; +} +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4129; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4129: ; +} +/* MOVE.L An,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4130; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4130: ; +} +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4131; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4131; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4131: ; +} +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4132; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4132; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4132: ; +} +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4133; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4133; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4133: ; +} +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4134; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4134; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4134: ; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4135; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4135; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4135: ; +} +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4136; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4136; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4136: ; +} +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4137; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4137; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4137: ; +} +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4138; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4138; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4138: ; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_23fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4139; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4139; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4139: ; +} +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_23fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= get_word_ce_prefetch (regs, 10); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4140; + } +{ put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 10); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4140: ; +} +/* MOVE.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_3000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.W An,Dn */ +void REGPARAM2 CPUFUNC(op_3008_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_3010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4143; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4143: ; +} +/* MOVE.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_3018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4144; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4144: ; +} +/* MOVE.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_3020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4145; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4145: ; +} +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_3028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4146; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4146: ; +} +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_3030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4147; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4147: ; +} +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_3038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4148; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4148: ; +} +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_3039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4149; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4149: ; +} +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_303a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4150; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4150: ; +} +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_303b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4151; + } +{{ uae_s16 src = get_word_ce (srca); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4151: ; +} +/* MOVE.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_303c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.W Dn,An */ +void REGPARAM2 CPUFUNC(op_3040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.W An,An */ +void REGPARAM2 CPUFUNC(op_3048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVEA.W (An),An */ +void REGPARAM2 CPUFUNC(op_3050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4155; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4155: ; +} +/* MOVEA.W (An)+,An */ +void REGPARAM2 CPUFUNC(op_3058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4156; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4156: ; +} +/* MOVEA.W -(An),An */ +void REGPARAM2 CPUFUNC(op_3060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4157; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4157: ; +} +/* MOVEA.W (d16,An),An */ +void REGPARAM2 CPUFUNC(op_3068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4158; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4158: ; +} +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_3070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4159; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4159: ; +} +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_3078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4160; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4160: ; +} +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_3079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4161; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4161: ; +} +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_307a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4162; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4162: ; +} +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_307b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4163; + } +{{ uae_s16 src = get_word_ce (srca); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4163: ; +} +/* MOVEA.W #.W,An */ +void REGPARAM2 CPUFUNC(op_307c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ src = (uae_s32)(uae_s16)src; + m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* MOVE.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_3080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4165; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4165: ; +} +/* MOVE.W An,(An) */ +void REGPARAM2 CPUFUNC(op_3088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4166; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4166: ; +} +/* MOVE.W (An),(An) */ +void REGPARAM2 CPUFUNC(op_3090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4167; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4167; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4167: ; +} +/* MOVE.W (An)+,(An) */ +void REGPARAM2 CPUFUNC(op_3098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4168; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4168; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4168: ; +} +/* MOVE.W -(An),(An) */ +void REGPARAM2 CPUFUNC(op_30a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4169; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4169; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4169: ; +} +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 CPUFUNC(op_30a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4170; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4170; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4170: ; +} +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_30b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4171; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4171; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4171: ; +} +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 CPUFUNC(op_30b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4172; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4172; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4172: ; +} +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 CPUFUNC(op_30b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4173; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4173; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4173: ; +} +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 CPUFUNC(op_30ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4174; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4174; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4174: ; +} +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 CPUFUNC(op_30bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4175; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4175; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4175: ; +} +/* MOVE.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_30bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4176; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4176: ; +} +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_30c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4177; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4177: ; +} +/* MOVE.W An,(An)+ */ +void REGPARAM2 CPUFUNC(op_30c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4178; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4178: ; +} +/* MOVE.W (An),(An)+ */ +void REGPARAM2 CPUFUNC(op_30d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4179; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4179; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4179: ; +} +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_30d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4180; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4180; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4180: ; +} +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 CPUFUNC(op_30e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4181; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4181; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4181: ; +} +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 CPUFUNC(op_30e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4182; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4182; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4182: ; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_30f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4183; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4183; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4183: ; +} +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 CPUFUNC(op_30f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4184; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4184; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4184: ; +} +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 CPUFUNC(op_30f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4185; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4185; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4185: ; +} +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 CPUFUNC(op_30fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4186; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4186; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4186: ; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 CPUFUNC(op_30fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4187; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4187; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4187: ; +} +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_30fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4188; + } +{ m68k_areg (regs, dstreg) += 2; + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4188: ; +} +/* MOVE.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_3100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4189; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}endlabel4189: ; +} +/* MOVE.W An,-(An) */ +void REGPARAM2 CPUFUNC(op_3108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4190; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}endlabel4190: ; +} +/* MOVE.W (An),-(An) */ +void REGPARAM2 CPUFUNC(op_3110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4191; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4191; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4191: ; +} +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 CPUFUNC(op_3118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4192; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4192; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4192: ; +} +/* MOVE.W -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_3120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4193; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4193; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 2); +}}}}}}endlabel4193: ; +} +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 CPUFUNC(op_3128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4194; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4194; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4194: ; +} +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_3130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4195; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4195; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4195: ; +} +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 CPUFUNC(op_3138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4196; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4196; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4196: ; +} +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 CPUFUNC(op_3139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4197; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4197; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); +}}}}}}endlabel4197: ; +} +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 CPUFUNC(op_313a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4198; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4198; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4198: ; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 CPUFUNC(op_313b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4199; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4199; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}}}endlabel4199: ; +} +/* MOVE.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_313c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4200; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); +}}}}endlabel4200: ; +} +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_3140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4201; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4201: ; +} +/* MOVE.W An,(d16,An) */ +void REGPARAM2 CPUFUNC(op_3148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4202; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4202: ; +} +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_3150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4203; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4203; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4203: ; +} +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 CPUFUNC(op_3158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4204; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4204; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4204: ; +} +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_3160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4205; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4205; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4205: ; +} +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 CPUFUNC(op_3168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4206; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4206; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4206: ; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_3170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4207; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4207; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4207: ; +} +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_3178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4208; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4208; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4208: ; +} +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 CPUFUNC(op_3179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4209; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4209; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4209: ; +} +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 CPUFUNC(op_317a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4210; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4210; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4210: ; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 CPUFUNC(op_317b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4211; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4211; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4211: ; +} +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_317c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4212; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4212: ; +} +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_3180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4213; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4213: ; +} +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_3188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4214; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4214: ; +} +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_3190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4215; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4215; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4215: ; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_3198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4216; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4216; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4216: ; +} +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4217; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4217; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4217: ; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4218; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4218; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4218: ; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4219; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4219; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4219: ; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4220; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4220; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4220: ; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4221; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 8)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4221; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4221: ; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4222; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4222; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4222: ; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4223; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4223; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4223: ; +} +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_31bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4224; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4224: ; +} +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4225; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4225: ; +} +/* MOVE.W An,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4226; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4226: ; +} +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4227; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4227; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4227: ; +} +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4228; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4228; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4228: ; +} +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4229; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4229; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4229: ; +} +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4230; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4230; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4230: ; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4231; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4231; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4231: ; +} +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4232; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4232; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4232: ; +} +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4233; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4233; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4233: ; +} +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4234; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4234; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4234: ; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 CPUFUNC(op_31fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4235; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4235; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4235: ; +} +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_31fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4236; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4236: ; +} +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4237; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4237: ; +} +/* MOVE.W An,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4238; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4238: ; +} +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4239; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4239; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4239: ; +} +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4240; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4240; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4240: ; +} +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4241; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4241; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 6); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4241: ; +} +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4242; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4242; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4242: ; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4243; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4243; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4243: ; +} +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4244; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4244; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4244: ; +} +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4245; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 8) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4245; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 10); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4245: ; +} +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4246; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4246; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4246: ; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 CPUFUNC(op_33fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4247; + } +{{ uae_s16 src = get_word_ce (srca); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= regs->irc; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4247; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}endlabel4247: ; +} +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_33fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 6) << 16; + dsta |= get_word_ce_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4248; + } +{ put_word_ce (dsta,src); + optflag_testw (regs, (uae_s16)(src)); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}endlabel4248: ; +} +/* NEGX.B Dn */ +void REGPARAM2 CPUFUNC(op_4000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* NEGX.B (An) */ +void REGPARAM2 CPUFUNC(op_4010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 2); +} +/* NEGX.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 2); +} +/* NEGX.B -(An) */ +void REGPARAM2 CPUFUNC(op_4020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 2); +} +/* NEGX.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 4); +} +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 4); +} +/* NEGX.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4038_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 4); +} +/* NEGX.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4039_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}}} m68k_incpc (regs, 6); +} +/* NEGX.W Dn */ +void REGPARAM2 CPUFUNC(op_4040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((newv) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* NEGX.W (An) */ +void REGPARAM2 CPUFUNC(op_4050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4258; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4258: ; +} +/* NEGX.W (An)+ */ +void REGPARAM2 CPUFUNC(op_4058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4259; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4259: ; +} +/* NEGX.W -(An) */ +void REGPARAM2 CPUFUNC(op_4060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4260; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4260: ; +} +/* NEGX.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_4068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4261; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4261: ; +} +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4262; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4262: ; +} +/* NEGX.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_4078_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4263; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4263: ; +} +/* NEGX.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_4079_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4264; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (srca,newv); +}}}}}} m68k_incpc (regs, 6); +endlabel4264: ; +} +/* NEGX.L Dn */ +void REGPARAM2 CPUFUNC(op_4080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* NEGX.L (An) */ +void REGPARAM2 CPUFUNC(op_4090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4266; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4266: ; +} +/* NEGX.L (An)+ */ +void REGPARAM2 CPUFUNC(op_4098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4267; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4267: ; +} +/* NEGX.L -(An) */ +void REGPARAM2 CPUFUNC(op_40a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4268; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4268: ; +} +/* NEGX.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_40a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4269; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4269: ; +} +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_40b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4270; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4270: ; +} +/* NEGX.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_40b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4271; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4271: ; +} +/* NEGX.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_40b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4272; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = 0 - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(0)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (srca + 2, newv); put_word_ce (srca, newv >> 16); +}}}}}} m68k_incpc (regs, 6); +endlabel4272: ; +} +/* MVSR2.W Dn */ +void REGPARAM2 CPUFUNC(op_40c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeSR (regs); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); +}} m68k_incpc (regs, 2); +} +/* MVSR2.W (An) */ +void REGPARAM2 CPUFUNC(op_40d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4274; + } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel4274: ; +} +/* MVSR2.W (An)+ */ +void REGPARAM2 CPUFUNC(op_40d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4275; + } +{ m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel4275: ; +} +/* MVSR2.W -(An) */ +void REGPARAM2 CPUFUNC(op_40e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4276; + } +{ m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 2); +endlabel4276: ; +} +/* MVSR2.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_40e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4277; + } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel4277: ; +} +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_40f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4278; + } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel4278: ; +} +/* MVSR2.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_40f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4279; + } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 4); +endlabel4279: ; +} +/* MVSR2.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_40f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4280; + } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + MakeSR (regs); + put_word_ce (srca,regs->sr); +}}} m68k_incpc (regs, 6); +endlabel4280: ; +} +/* CHK.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_4100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4281; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4281; + } +}}}endlabel4281: ; +} +/* CHK.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_4110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4282; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4282; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4282; + } +}}}}}endlabel4282: ; +} +/* CHK.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_4118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4283; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4283; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4283; + } +}}}}}endlabel4283: ; +} +/* CHK.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_4120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4284; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4284; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4284; + } +}}}}}endlabel4284: ; +} +/* CHK.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_4128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4285; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4285; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4285; + } +}}}}}endlabel4285: ; +} +/* CHK.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_4130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4286; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4286; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4286; + } +}}}}}endlabel4286: ; +} +/* CHK.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_4138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4287; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4287; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4287; + } +}}}}}endlabel4287: ; +} +/* CHK.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_4139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4288; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4288; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4288; + } +}}}}}endlabel4288: ; +} +/* CHK.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_413a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4289; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4289; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4289; + } +}}}}}endlabel4289: ; +} +/* CHK.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_413b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4290; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4290; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4290; + } +}}}}}endlabel4290: ; +} +/* CHK.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_413c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4291; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4291; + } +}}}endlabel4291: ; +} +/* CHK.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_4180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4292; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4292; + } +}}}endlabel4292: ; +} +/* CHK.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_4190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4293; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4293; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4293; + } +}}}}}endlabel4293: ; +} +/* CHK.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_4198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4294; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4294; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4294; + } +}}}}}endlabel4294: ; +} +/* CHK.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_41a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4295; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4295; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4295; + } +}}}}}endlabel4295: ; +} +/* CHK.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_41a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4296; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4296; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4296; + } +}}}}}endlabel4296: ; +} +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_41b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4297; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4297; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4297; + } +}}}}}endlabel4297: ; +} +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_41b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4298; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4298; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4298; + } +}}}}}endlabel4298: ; +} +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_41b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4299; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 6); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4299; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4299; + } +}}}}}endlabel4299: ; +} +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_41ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4300; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4300; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4300; + } +}}}}}endlabel4300: ; +} +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_41bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4301; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4301; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4301; + } +}}}}}endlabel4301: ; +} +/* CHK.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_41bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + m68k_incpc (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 6); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + if ((uae_s32)dst < 0) { + SET_NFLG (®s->ccrflags, 1); + Exception (6, regs, oldpc); + goto endlabel4302; + } else if (dst > src) { + SET_NFLG (®s->ccrflags, 0); + Exception (6, regs, oldpc); + goto endlabel4302; + } +}}}endlabel4302: ; +} +/* LEA.L (An),An */ +void REGPARAM2 CPUFUNC(op_41d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 2); +} +/* LEA.L (d16,An),An */ +void REGPARAM2 CPUFUNC(op_41e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +} +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_41f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); +{ do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +} +/* LEA.L (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_41f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +} +/* LEA.L (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_41f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 6); +} +/* LEA.L (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_41fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +} +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_41fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); +{ do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_areg (regs, dstreg) = (srca); +}}} m68k_incpc (regs, 4); +} +/* CLR.B Dn */ +void REGPARAM2 CPUFUNC(op_4200_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((0) & 0xff); +}} m68k_incpc (regs, 2); +} +/* CLR.B (An) */ +void REGPARAM2 CPUFUNC(op_4210_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 2); +} +/* CLR.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4218_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 2); +} +/* CLR.B -(An) */ +void REGPARAM2 CPUFUNC(op_4220_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 2); +} +/* CLR.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4228_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 4); +} +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4230_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 4); +} +/* CLR.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4238_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 4); +} +/* CLR.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4239_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_byte_ce (srca,0); +}}} m68k_incpc (regs, 6); +} +/* CLR.W Dn */ +void REGPARAM2 CPUFUNC(op_4240_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((0) & 0xffff); +}} m68k_incpc (regs, 2); +} +/* CLR.W (An) */ +void REGPARAM2 CPUFUNC(op_4250_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4319; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel4319: ; +} +/* CLR.W (An)+ */ +void REGPARAM2 CPUFUNC(op_4258_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4320; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel4320: ; +} +/* CLR.W -(An) */ +void REGPARAM2 CPUFUNC(op_4260_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4321; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 2); +endlabel4321: ; +} +/* CLR.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_4268_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4322; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel4322: ; +} +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4270_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4323; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel4323: ; +} +/* CLR.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_4278_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4324; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 4); +endlabel4324: ; +} +/* CLR.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_4279_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4325; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca,0); +}}}} m68k_incpc (regs, 6); +endlabel4325: ; +} +/* CLR.L Dn */ +void REGPARAM2 CPUFUNC(op_4280_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + m68k_dreg (regs, srcreg) = (0); +}} m68k_incpc (regs, 2); +} +/* CLR.L (An) */ +void REGPARAM2 CPUFUNC(op_4290_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4327; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 2); +endlabel4327: ; +} +#endif + +#ifdef PART_4 +/* CLR.L (An)+ */ +void REGPARAM2 CPUFUNC(op_4298_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4328; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 2); +endlabel4328: ; +} +/* CLR.L -(An) */ +void REGPARAM2 CPUFUNC(op_42a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4329; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 2); +endlabel4329: ; +} +/* CLR.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_42a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4330; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 4); +endlabel4330: ; +} +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_42b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4331; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 4); +endlabel4331: ; +} +/* CLR.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_42b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4332; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 4); +endlabel4332: ; +} +/* CLR.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_42b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4333; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + SET_CZNV (®s->ccrflags, FLAGVAL_Z); + put_word_ce (srca + 2, 0); put_word_ce (srca, 0 >> 16); +}}}} m68k_incpc (regs, 6); +endlabel4333: ; +} +/* NEG.B Dn */ +void REGPARAM2 CPUFUNC(op_4400_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* NEG.B (An) */ +void REGPARAM2 CPUFUNC(op_4410_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +} +/* NEG.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4418_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +} +/* NEG.B -(An) */ +void REGPARAM2 CPUFUNC(op_4420_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +} +/* NEG.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4428_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +} +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4430_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +} +/* NEG.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4438_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +} +/* NEG.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4439_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subb (regs, dst, (uae_s8)(src), (uae_s8)(0)); + put_byte_ce (srca,dst); +}}}}} m68k_incpc (regs, 6); +} +/* NEG.W Dn */ +void REGPARAM2 CPUFUNC(op_4440_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* NEG.W (An) */ +void REGPARAM2 CPUFUNC(op_4450_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4343; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel4343: ; +} +/* NEG.W (An)+ */ +void REGPARAM2 CPUFUNC(op_4458_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4344; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel4344: ; +} +/* NEG.W -(An) */ +void REGPARAM2 CPUFUNC(op_4460_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4345; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 2); +endlabel4345: ; +} +/* NEG.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_4468_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4346; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel4346: ; +} +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4470_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4347; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel4347: ; +} +/* NEG.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_4478_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4348; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 4); +endlabel4348: ; +} +/* NEG.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_4479_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4349; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subw (regs, dst, (uae_s16)(src), (uae_s16)(0)); + put_word_ce (srca,dst); +}}}}}} m68k_incpc (regs, 6); +endlabel4349: ; +} +/* NEG.L Dn */ +void REGPARAM2 CPUFUNC(op_4480_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + m68k_dreg (regs, srcreg) = (dst); +}}}} m68k_incpc (regs, 2); +} +/* NEG.L (An) */ +void REGPARAM2 CPUFUNC(op_4490_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4351; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4351: ; +} +/* NEG.L (An)+ */ +void REGPARAM2 CPUFUNC(op_4498_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4352; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4352: ; +} +/* NEG.L -(An) */ +void REGPARAM2 CPUFUNC(op_44a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4353; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 2); +endlabel4353: ; +} +/* NEG.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_44a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4354; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4354: ; +} +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_44b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4355; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4355: ; +} +/* NEG.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_44b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4356; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 4); +endlabel4356: ; +} +/* NEG.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_44b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4357; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 dst; + optflag_subl (regs, dst, (uae_s32)(src), (uae_s32)(0)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}}} m68k_incpc (regs, 6); +endlabel4357: ; +} +/* MV2SR.B Dn */ +void REGPARAM2 CPUFUNC(op_44c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}} m68k_incpc (regs, 2); +} +/* MV2SR.B (An) */ +void REGPARAM2 CPUFUNC(op_44d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4359; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel4359: ; +} +/* MV2SR.B (An)+ */ +void REGPARAM2 CPUFUNC(op_44d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4360; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel4360: ; +} +/* MV2SR.B -(An) */ +void REGPARAM2 CPUFUNC(op_44e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4361; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 2); +endlabel4361: ; +} +/* MV2SR.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_44e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4362; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel4362: ; +} +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_44f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4363; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel4363: ; +} +/* MV2SR.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_44f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4364; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel4364: ; +} +/* MV2SR.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_44f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4365; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 6); +endlabel4365: ; +} +/* MV2SR.B (d16,PC) */ +void REGPARAM2 CPUFUNC(op_44fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4366; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel4366: ; +} +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_44fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4367; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}} m68k_incpc (regs, 4); +endlabel4367: ; +} +/* MV2SR.B #.B */ +void REGPARAM2 CPUFUNC(op_44fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 8); + MakeSR (regs); + regs->sr &= 0xFF00; + regs->sr |= src & 0xFF; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}} m68k_incpc (regs, 4); +} +/* NOT.B Dn */ +void REGPARAM2 CPUFUNC(op_4600_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((dst) & 0xff); +}}} m68k_incpc (regs, 2); +} +/* NOT.B (An) */ +void REGPARAM2 CPUFUNC(op_4610_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 2); +} +/* NOT.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4618_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 2); +} +/* NOT.B -(An) */ +void REGPARAM2 CPUFUNC(op_4620_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 2); +} +/* NOT.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4628_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 4); +} +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4630_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 4); +} +/* NOT.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4638_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 4); +} +/* NOT.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4639_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testb (regs, (uae_s8)(dst)); + put_byte_ce (srca,dst); +}}}} m68k_incpc (regs, 6); +} +/* NOT.W Dn */ +void REGPARAM2 CPUFUNC(op_4640_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +} +/* NOT.W (An) */ +void REGPARAM2 CPUFUNC(op_4650_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4378; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel4378: ; +} +/* NOT.W (An)+ */ +void REGPARAM2 CPUFUNC(op_4658_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4379; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel4379: ; +} +/* NOT.W -(An) */ +void REGPARAM2 CPUFUNC(op_4660_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4380; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 2); +endlabel4380: ; +} +/* NOT.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_4668_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4381; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel4381: ; +} +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4670_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4382; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel4382: ; +} +/* NOT.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_4678_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4383; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 4); +endlabel4383: ; +} +/* NOT.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_4679_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4384; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testw (regs, (uae_s16)(dst)); + put_word_ce (srca,dst); +}}}}} m68k_incpc (regs, 6); +endlabel4384: ; +} +/* NOT.L Dn */ +void REGPARAM2 CPUFUNC(op_4680_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* NOT.L (An) */ +void REGPARAM2 CPUFUNC(op_4690_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4386; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 2); +endlabel4386: ; +} +/* NOT.L (An)+ */ +void REGPARAM2 CPUFUNC(op_4698_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4387; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 2); +endlabel4387: ; +} +/* NOT.L -(An) */ +void REGPARAM2 CPUFUNC(op_46a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4388; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 2); +endlabel4388: ; +} +/* NOT.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_46a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4389; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 4); +endlabel4389: ; +} +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_46b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4390; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 4); +endlabel4390: ; +} +/* NOT.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_46b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4391; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 4); +endlabel4391: ; +} +/* NOT.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_46b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4392; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 dst = ~src; + optflag_testl (regs, (uae_s32)(dst)); + put_word_ce (srca + 2, dst); put_word_ce (srca, dst >> 16); +}}}}} m68k_incpc (regs, 6); +endlabel4392: ; +} +/* MV2SR.W Dn */ +void REGPARAM2 CPUFUNC(op_46c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4393; } +{{ uae_s16 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}} m68k_incpc (regs, 2); +endlabel4393: ; +} +/* MV2SR.W (An) */ +void REGPARAM2 CPUFUNC(op_46d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4394; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4394; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel4394: ; +} +/* MV2SR.W (An)+ */ +void REGPARAM2 CPUFUNC(op_46d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4395; } +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4395; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel4395: ; +} +/* MV2SR.W -(An) */ +void REGPARAM2 CPUFUNC(op_46e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4396; } +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4396; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 2); +endlabel4396: ; +} +/* MV2SR.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_46e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4397; } +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4397; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel4397: ; +} +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_46f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4398; } +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4398; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel4398: ; +} +/* MV2SR.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_46f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4399; } +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4399; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel4399: ; +} +/* MV2SR.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_46f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4400; } +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4400; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 6); +endlabel4400: ; +} +/* MV2SR.W (d16,PC) */ +void REGPARAM2 CPUFUNC(op_46fa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4401; } +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4401; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel4401: ; +} +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_46fb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4402; } +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4402; + } +{{ uae_s16 src = get_word_ce (srca); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}}}} m68k_incpc (regs, 4); +endlabel4402: ; +} +/* MV2SR.W #.W */ +void REGPARAM2 CPUFUNC(op_46fc_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4403; } +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->sr = src; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + MakeFromSR (regs); +}}} m68k_incpc (regs, 4); +endlabel4403: ; +} +/* NBCD.B Dn */ +void REGPARAM2 CPUFUNC(op_4800_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}} m68k_incpc (regs, 2); +} +/* NBCD.B (An) */ +void REGPARAM2 CPUFUNC(op_4810_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 2); +} +/* NBCD.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4818_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 2); +} +/* NBCD.B -(An) */ +void REGPARAM2 CPUFUNC(op_4820_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 2); +} +/* NBCD.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4828_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 4); +} +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4830_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 4); +} +/* NBCD.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4838_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 4); +} +/* NBCD.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4839_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 newv_lo = - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (srca,newv); +}}}} m68k_incpc (regs, 6); +} +/* SWAP.W Dn */ +void REGPARAM2 CPUFUNC(op_4840_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* PEA.L (An) */ +void REGPARAM2 CPUFUNC(op_4850_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4413; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); +}}}} m68k_incpc (regs, 2); +endlabel4413: ; +} +/* PEA.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_4868_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4414; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); +}}}} m68k_incpc (regs, 4); +endlabel4414: ; +} +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4870_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4415; + } +{ m68k_areg (regs, 7) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); +}}}} m68k_incpc (regs, 4); +endlabel4415: ; +} +/* PEA.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_4878_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4416; + } +{ m68k_areg (regs, 7) = dsta; + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4416: ; +} +/* PEA.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_4879_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel4417; + } +{ m68k_areg (regs, 7) = dsta; + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4417: ; +} +/* PEA.L (d16,PC) */ +void REGPARAM2 CPUFUNC(op_487a_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4418; + } +{ m68k_areg (regs, 7) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); +}}}} m68k_incpc (regs, 4); +endlabel4418: ; +} +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_487b_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); +{ uaecptr dsta; + dsta = m68k_areg (regs, 7) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel4419; + } +{ m68k_areg (regs, 7) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, srca >> 16); put_word_ce (dsta + 2, srca); +}}}} m68k_incpc (regs, 4); +endlabel4419: ; +} +/* EXT.W Dn */ +void REGPARAM2 CPUFUNC(op_4880_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 dst = (uae_s16)(uae_s8)src; + optflag_testw (regs, (uae_s16)(dst)); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((dst) & 0xffff); +}}} m68k_incpc (regs, 2); +} +/* MVMLE.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_4890_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4421; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4421: ; +} +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_48a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4422; + } +{{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 2; put_word_ce (srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 2; put_word_ce (srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4422: ; +} +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_48a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4423; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4423: ; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_48b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4424; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4424: ; +} +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_48b8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4425; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4425: ; +} +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_48b9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 6) << 16; + srca |= get_word_ce_prefetch (regs, 8); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4426; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel4426: ; +} +/* EXT.L Dn */ +void REGPARAM2 CPUFUNC(op_48c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = (uae_s32)(uae_s16)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* MVMLE.L #.W,(An) */ +void REGPARAM2 CPUFUNC(op_48d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4428; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4428: ; +} +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 CPUFUNC(op_48e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = m68k_areg (regs, dstreg) - 0; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4429; + } +{{ uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { srca -= 4; put_word_ce (srca, m68k_areg (regs, movem_index2[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; } + while (dmask) { srca -= 4; put_word_ce (srca, m68k_dreg (regs, movem_index2[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; } + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4429: ; +} +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_48e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4430; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4430: ; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_48f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4431; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4431: ; +} +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_48f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4432; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4432: ; +} +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_48f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 6) << 16; + srca |= get_word_ce_prefetch (regs, 8); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4433; + } +{{ uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } + while (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel4433: ; +} +/* EXT.B Dn */ +void REGPARAM2 CPUFUNC(op_49c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 dst = (uae_s32)(uae_s8)src; + optflag_testl (regs, (uae_s32)(dst)); + m68k_dreg (regs, srcreg) = (dst); +}}} m68k_incpc (regs, 2); +} +/* TST.B Dn */ +void REGPARAM2 CPUFUNC(op_4a00_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}} m68k_incpc (regs, 2); +} +/* TST.B (An) */ +void REGPARAM2 CPUFUNC(op_4a10_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +} +/* TST.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4a18_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +} +/* TST.B -(An) */ +void REGPARAM2 CPUFUNC(op_4a20_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 2); +} +/* TST.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4a28_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +} +/* TST.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4a30_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +} +/* TST.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4a38_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 4); +} +/* TST.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4a39_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + optflag_testb (regs, (uae_s8)(src)); +}}} m68k_incpc (regs, 6); +} +/* TST.W Dn */ +void REGPARAM2 CPUFUNC(op_4a40_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}} m68k_incpc (regs, 2); +} +/* TST.W (An) */ +void REGPARAM2 CPUFUNC(op_4a50_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4444; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4444: ; +} +/* TST.W (An)+ */ +void REGPARAM2 CPUFUNC(op_4a58_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4445; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4445: ; +} +/* TST.W -(An) */ +void REGPARAM2 CPUFUNC(op_4a60_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4446; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4446: ; +} +/* TST.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_4a68_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4447; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4447: ; +} +/* TST.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4a70_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4448; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4448: ; +} +/* TST.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_4a78_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4449; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4449: ; +} +/* TST.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_4a79_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4450; + } +{{ uae_s16 src = get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + optflag_testw (regs, (uae_s16)(src)); +}}}} m68k_incpc (regs, 6); +endlabel4450: ; +} +/* TST.L Dn */ +void REGPARAM2 CPUFUNC(op_4a80_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}} m68k_incpc (regs, 2); +} +/* TST.L (An) */ +void REGPARAM2 CPUFUNC(op_4a90_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4452; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4452: ; +} +/* TST.L (An)+ */ +void REGPARAM2 CPUFUNC(op_4a98_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4453; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4453: ; +} +/* TST.L -(An) */ +void REGPARAM2 CPUFUNC(op_4aa0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4454; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 2); +endlabel4454: ; +} +/* TST.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_4aa8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4455; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4455: ; +} +/* TST.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4ab0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4456; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4456: ; +} +/* TST.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_4ab8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4457; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 4); +endlabel4457: ; +} +/* TST.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_4ab9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4458; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + optflag_testl (regs, (uae_s32)(src)); +}}}} m68k_incpc (regs, 6); +endlabel4458: ; +} +/* TAS.B Dn */ +void REGPARAM2 CPUFUNC(op_4ac0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src |= 0x80; + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((src) & 0xff); +}} m68k_incpc (regs, 2); +} +/* TAS.B (An) */ +void REGPARAM2 CPUFUNC(op_4ad0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 2); +} +/* TAS.B (An)+ */ +void REGPARAM2 CPUFUNC(op_4ad8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 2); +} +/* TAS.B -(An) */ +void REGPARAM2 CPUFUNC(op_4ae0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 2); +} +/* TAS.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_4ae8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 4); +} +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4af0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 4); +} +/* TAS.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_4af8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 4); +} +/* TAS.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_4af9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); + optflag_testb (regs, (uae_s8)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + src |= 0x80; + put_byte_ce (srca,src); +}}} m68k_incpc (regs, 6); +} +/* MVMEL.W #.W,(An) */ +void REGPARAM2 CPUFUNC(op_4c90_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4467; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4467: ; +} +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_4c98_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4468; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4468: ; +} +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_4ca8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4469; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4469: ; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4cb0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4470; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4470: ; +} +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_4cb8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4471; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4471: ; +} +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_4cb9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 6) << 16; + srca |= get_word_ce_prefetch (regs, 8); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4472; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel4472: ; +} +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_4cba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4473; + } +{{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4473: ; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_4cbb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4474; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; dmask = movem_next[dmask]; } + while (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += 2; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4474: ; +} +/* MVMEL.L #.W,(An) */ +void REGPARAM2 CPUFUNC(op_4cd0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4475; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4475: ; +} +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 CPUFUNC(op_4cd8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4476; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + m68k_areg (regs, dstreg) = srca; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}} m68k_incpc (regs, 4); +endlabel4476: ; +} +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 CPUFUNC(op_4ce8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4477; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4477: ; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4cf0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = opcode & 7; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4478; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4478: ; +} +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 CPUFUNC(op_4cf8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4479; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4479: ; +} +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 CPUFUNC(op_4cf9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 6) << 16; + srca |= get_word_ce_prefetch (regs, 8); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4480; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 10); +}}}} m68k_incpc (regs, 8); +endlabel4480: ; +} +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 CPUFUNC(op_4cfa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 2; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr srca = m68k_getpc (regs) + 4; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4481; + } +{{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4481: ; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_4cfb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = 3; +{ uae_u16 mask = get_word_ce_prefetch (regs, 4); + unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uae_u32 v; +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 4; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 6)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, srca); + goto endlabel4482; + } +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ while (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += 4; dmask = movem_next[dmask]; } + while (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += 4; amask = movem_next[amask]; } + get_word_ce (srca); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +}}}} m68k_incpc (regs, 6); +endlabel4482: ; +} +/* TRAP.L # */ +void REGPARAM2 CPUFUNC(op_4e40_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 15); +{{ uae_u32 src = srcreg; + m68k_incpc (regs, 2); + Exception (src + 32, regs, 0); +}}} +/* LINK.W An,#.W */ +void REGPARAM2 CPUFUNC(op_4e50_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr olda; + olda = m68k_areg (regs, 7) - 4; + if (olda & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, olda); + goto endlabel4484; + } +{ m68k_areg (regs, 7) = olda; +{ uae_s32 src = m68k_areg (regs, srcreg); + put_word_ce (olda, src >> 16); put_word_ce (olda + 2, src); + m68k_areg (regs, srcreg) = (m68k_areg (regs, 7)); +{ uae_s16 offs = get_word_ce_prefetch (regs, 4); + m68k_areg (regs, 7) += offs; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +}}}}} m68k_incpc (regs, 4); +endlabel4484: ; +} +/* UNLK.L An */ +void REGPARAM2 CPUFUNC(op_4e58_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg (regs, srcreg); + m68k_areg (regs, 7) = src; +{ uaecptr olda = m68k_areg (regs, 7); + if (olda & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, olda); + goto endlabel4485; + } +{{ uae_s32 old = get_word_ce (olda) << 16; old |= get_word_ce (olda + 2); + m68k_areg (regs, 7) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (old); +}}}}} m68k_incpc (regs, 2); +endlabel4485: ; +} +/* MVR2USP.L An */ +void REGPARAM2 CPUFUNC(op_4e60_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4486; } +{{ uae_s32 src = m68k_areg (regs, srcreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + regs->usp = src; +}}} m68k_incpc (regs, 2); +endlabel4486: ; +} +/* MVUSP2R.L An */ +void REGPARAM2 CPUFUNC(op_4e68_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4487; } +{{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (regs->usp); +}}} m68k_incpc (regs, 2); +endlabel4487: ; +} +/* RESET.L */ +void REGPARAM2 CPUFUNC(op_4e70_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4488; } +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + cpureset(); + regs->irc = get_iword (regs, 4); +}} m68k_incpc (regs, 2); +endlabel4488: ; +} +/* NOP.L */ +void REGPARAM2 CPUFUNC(op_4e71_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +} m68k_incpc (regs, 2); +} +/* STOP.L #.W */ +void REGPARAM2 CPUFUNC(op_4e72_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4490; } +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); + regs->sr = src; + MakeFromSR (regs); + m68k_setstopped (regs, 1); + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4490: ; +} +/* RTE.L */ +void REGPARAM2 CPUFUNC(op_4e73_6)(uae_u32 opcode, struct regstruct *regs) +{ +{if (!regs->s) { Exception (8, regs, 0); goto endlabel4491; } +{{ uaecptr sra = m68k_areg (regs, 7); + if (sra & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, sra); + goto endlabel4491; + } +{{ uae_s16 sr = get_word_ce (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel4491; + } +{{ uae_s32 pc = get_word_ce (pca) << 16; pc |= get_word_ce (pca + 2); + m68k_areg (regs, 7) += 4; + regs->sr = sr; m68k_setpc (regs, pc); + MakeFromSR (regs); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}}}endlabel4491: ; +} +/* RTD.L #.W */ +void REGPARAM2 CPUFUNC(op_4e74_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel4492; + } +{{ uae_s32 pc = get_word_ce (pca) << 16; pc |= get_word_ce (pca + 2); + m68k_areg (regs, 7) += 4; +{ uae_s16 offs = get_word_ce_prefetch (regs, 4); + m68k_areg (regs, 7) += offs; + if (pc & 1) + exception3 (0x4e74, m68k_getpc (regs), pc); + else + m68k_setpc (regs, pc); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}endlabel4492: ; +} +/* RTS.L */ +void REGPARAM2 CPUFUNC(op_4e75_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_do_rts_ce (regs); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}} +/* TRAPV.L */ +void REGPARAM2 CPUFUNC(op_4e76_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ m68k_incpc (regs, 2); + if (GET_VFLG (®s->ccrflags)) { + Exception (7, regs, m68k_getpc (regs)); + goto endlabel4494; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}endlabel4494: ; +} +/* RTR.L */ +void REGPARAM2 CPUFUNC(op_4e77_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ MakeSR (regs); +{ uaecptr sra = m68k_areg (regs, 7); + if (sra & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, sra); + goto endlabel4495; + } +{{ uae_s16 sr = get_word_ce (sra); + m68k_areg (regs, 7) += 2; +{ uaecptr pca = m68k_areg (regs, 7); + if (pca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, pca); + goto endlabel4495; + } +{{ uae_s32 pc = get_word_ce (pca) << 16; pc |= get_word_ce (pca + 2); + m68k_areg (regs, 7) += 4; + regs->sr &= 0xFF00; sr &= 0xFF; + regs->sr |= sr; m68k_setpc (regs, pc); + MakeFromSR (regs); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}}}}}endlabel4495: ; +} +/* JSR.L (An) */ +void REGPARAM2 CPUFUNC(op_4e90_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uaecptr oldpc = m68k_getpc (regs) + 2; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4496; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4496: ; +} +/* JSR.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_4ea8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4497; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4497: ; +} +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4eb0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), regs->irc); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4498; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4498: ; +} +/* JSR.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_4eb8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4499; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4499: ; +} +/* JSR.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_4eb9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 6; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4500; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4500: ; +} +/* JSR.L (d16,PC) */ +void REGPARAM2 CPUFUNC(op_4eba_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)regs->irc; +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4501; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4501: ; +} +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_4ebb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, regs->irc); +{ uaecptr oldpc = m68k_getpc (regs) + 4; + if (srca & 1) { + exception3i (opcode, oldpc, srca); + goto endlabel4502; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + m68k_areg (regs, 7) -= 4; + put_word_ce (m68k_areg (regs, 7), oldpc >> 16); + put_word_ce (m68k_areg (regs, 7) + 2, oldpc); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4502: ; +} +/* JMP.L (An) */ +void REGPARAM2 CPUFUNC(op_4ed0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4503; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4503: ; +} +/* JMP.L (d16,An) */ +void REGPARAM2 CPUFUNC(op_4ee8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4504; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4504: ; +} +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_4ef0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), regs->irc); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4505; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4505: ; +} +/* JMP.L (xxx).W */ +void REGPARAM2 CPUFUNC(op_4ef8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4506; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4506: ; +} +/* JMP.L (xxx).L */ +void REGPARAM2 CPUFUNC(op_4ef9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4507; + } + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4507: ; +} +/* JMP.L (d16,PC) */ +void REGPARAM2 CPUFUNC(op_4efa_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)regs->irc; + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4508; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4508: ; +} +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 CPUFUNC(op_4efb_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, regs->irc); + if (srca & 1) { + exception3i (opcode, m68k_getpc (regs) + 6, srca); + goto endlabel4509; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_setpc (regs, srca); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4509: ; +} +/* ADD.B #,Dn */ +void REGPARAM2 CPUFUNC(op_5000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.B #,(An) */ +void REGPARAM2 CPUFUNC(op_5010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B #,-(An) */ +void REGPARAM2 CPUFUNC(op_5020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_5028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_5038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +#endif + +#ifdef PART_5 +/* ADD.B #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_5039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* ADD.W #,Dn */ +void REGPARAM2 CPUFUNC(op_5040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* ADDA.W #,An */ +void REGPARAM2 CPUFUNC(op_5048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADD.W #,(An) */ +void REGPARAM2 CPUFUNC(op_5050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4520; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4520: ; +} +/* ADD.W #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4521; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4521: ; +} +/* ADD.W #,-(An) */ +void REGPARAM2 CPUFUNC(op_5060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4522; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4522: ; +} +/* ADD.W #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_5068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4523; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4523: ; +} +/* ADD.W #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4524; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4524: ; +} +/* ADD.W #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_5078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4525; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4525: ; +} +/* ADD.W #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_5079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4526; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4526: ; +} +/* ADD.L #,Dn */ +void REGPARAM2 CPUFUNC(op_5080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* ADDA.L #,An */ +void REGPARAM2 CPUFUNC(op_5088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADD.L #,(An) */ +void REGPARAM2 CPUFUNC(op_5090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4529; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4529: ; +} +/* ADD.L #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4530; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4530: ; +} +/* ADD.L #,-(An) */ +void REGPARAM2 CPUFUNC(op_50a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4531; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4531: ; +} +/* ADD.L #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_50a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4532; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4532: ; +} +/* ADD.L #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_50b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4533; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4533: ; +} +/* ADD.L #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_50b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4534; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4534: ; +} +/* ADD.L #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_50b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4535; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4535: ; +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_50c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_50c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 0)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4537; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4537: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_50d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_50d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_50e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_50e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_50f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_50f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_50f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 0) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* SUB.B #,Dn */ +void REGPARAM2 CPUFUNC(op_5100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.B #,(An) */ +void REGPARAM2 CPUFUNC(op_5110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B #,-(An) */ +void REGPARAM2 CPUFUNC(op_5120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_5128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_5138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_5139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* SUB.W #,Dn */ +void REGPARAM2 CPUFUNC(op_5140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* SUBA.W #,An */ +void REGPARAM2 CPUFUNC(op_5148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUB.W #,(An) */ +void REGPARAM2 CPUFUNC(op_5150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4555; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4555: ; +} +/* SUB.W #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4556; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4556: ; +} +/* SUB.W #,-(An) */ +void REGPARAM2 CPUFUNC(op_5160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4557; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4557: ; +} +/* SUB.W #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_5168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4558; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4558: ; +} +/* SUB.W #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4559; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4559: ; +} +/* SUB.W #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_5178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4560; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4560: ; +} +/* SUB.W #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_5179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4561; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4561: ; +} +/* SUB.L #,Dn */ +void REGPARAM2 CPUFUNC(op_5180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* SUBA.L #,An */ +void REGPARAM2 CPUFUNC(op_5188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUB.L #,(An) */ +void REGPARAM2 CPUFUNC(op_5190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4564; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4564: ; +} +/* SUB.L #,(An)+ */ +void REGPARAM2 CPUFUNC(op_5198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4565; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4565: ; +} +/* SUB.L #,-(An) */ +void REGPARAM2 CPUFUNC(op_51a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4566; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4566: ; +} +/* SUB.L #,(d16,An) */ +void REGPARAM2 CPUFUNC(op_51a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4567; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4567: ; +} +/* SUB.L #,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_51b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4568; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4568: ; +} +/* SUB.L #,(xxx).W */ +void REGPARAM2 CPUFUNC(op_51b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4569; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4569: ; +} +/* SUB.L #,(xxx).L */ +void REGPARAM2 CPUFUNC(op_51b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; +{{ uae_u32 src = srcreg; +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4570; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4570: ; +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_51c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_51c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 1)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4572; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4572: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_51d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_51d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_51e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_51e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_51f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_51f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_51f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 1) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_52c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_52c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 2)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4581; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4581: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_52d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_52d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_52e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_52e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_52f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_52f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_52f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 2) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_53c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_53c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 3)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4590; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4590: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_53d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_53d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_53e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_53e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_53f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_53f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_53f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 3) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_54c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_54c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 4)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4599; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4599: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_54d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_54d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_54e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_54e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_54f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_54f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_54f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 4) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_55c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_55c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 5)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4608; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4608: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_55d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_55d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_55e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_55e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_55f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_55f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_55f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 5) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_56c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_56c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 6)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4617; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4617: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_56d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_56d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_56e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_56e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_56f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_56f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_56f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 6) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_57c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_57c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 7)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4626; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4626: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_57d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_57d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_57e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_57e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_57f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_57f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_57f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 7) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_58c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_58c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 8)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4635; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4635: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_58d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_58d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_58e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_58e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_58f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_58f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_58f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 8) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_59c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_59c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 9)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4644; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4644: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_59d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_59d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_59e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_59e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_59f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_59f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_59f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 9) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5ac0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5ac8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 10)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4653; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4653: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5ad0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5ad8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5ae0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5ae8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5af0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5af8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5af9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 10) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5bc0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5bc8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 11)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4662; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4662: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5bd0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5bd8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5be0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5be8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5bf0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5bf8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5bf9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 11) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5cc0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5cc8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 12)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4671; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4671: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5cd0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5cd8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5ce0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5ce8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5cf0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5cf8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5cf9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 12) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5dc0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5dc8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 13)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4680; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4680: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5dd0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5dd8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5de0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5de8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5df0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5df8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5df9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 13) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5ec0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5ec8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 14)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4689; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4689: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5ed0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5ed8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5ee0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5ee8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5ef0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5ef8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5ef9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 14) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Scc.B Dn */ +void REGPARAM2 CPUFUNC(op_5fc0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (val) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* DBcc.W Dn,#.W */ +void REGPARAM2 CPUFUNC(op_5fc8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 offs = regs->irc; + uaecptr oldpc = m68k_getpc (regs); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 15)) { + m68k_incpc (regs, (uae_s32)offs + 2); + get_word_ce_prefetch (regs, 0); + m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); + if (src) { + if (offs & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + goto endlabel4698; + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; + } + } else { + do_cycles_ce (CYCLE_UNIT / 2 * 2); + } + m68k_setpc (regs, oldpc + 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}endlabel4698: ; +} +/* Scc.B (An) */ +void REGPARAM2 CPUFUNC(op_5fd0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (An)+ */ +void REGPARAM2 CPUFUNC(op_5fd8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B -(An) */ +void REGPARAM2 CPUFUNC(op_5fe0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 2); +} +/* Scc.B (d16,An) */ +void REGPARAM2 CPUFUNC(op_5fe8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_5ff0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +/* Scc.B (xxx).W */ +void REGPARAM2 CPUFUNC(op_5ff8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 4); +} +#endif + +#ifdef PART_6 +/* Scc.B (xxx).L */ +void REGPARAM2 CPUFUNC(op_5ff9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ int val = cctrue (®s->ccrflags, 15) ? 0xff : 0; + int cycles = 0; + if (cycles > 0) do_cycles_ce (cycles); + put_byte_ce (srca,val); +}}}}} m68k_incpc (regs, 6); +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6000_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4706; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4706: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6001_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4707; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4707: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_60ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 0)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4708; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4708; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4708; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4708: ; +} +/* BSR.W #.W */ +void REGPARAM2 CPUFUNC(op_6100_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s16 src = regs->irc; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel4709; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_do_bsr_ce (regs, m68k_getpc (regs) + 4, s); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4709: ; +} +/* BSR.B # */ +void REGPARAM2 CPUFUNC(op_6101_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{ uae_s32 s; +{ uae_u32 src = srcreg; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel4710; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_do_bsr_ce (regs, m68k_getpc (regs) + 2, s); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4710: ; +} +/* BSR.L #.L */ +void REGPARAM2 CPUFUNC(op_61ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ uae_s32 s; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= regs->irc; + s = (uae_s32)src + 2; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + s); + goto endlabel4711; + } + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_do_bsr_ce (regs, m68k_getpc (regs) + 6, s); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4711: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6200_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4712; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4712: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6201_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4713; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4713: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_62ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 2)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4714; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4714; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4714; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4714: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6300_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4715; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4715: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6301_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4716; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4716: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_63ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 3)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4717; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4717; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 3)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4717; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4717: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6400_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4718; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4718: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6401_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4719; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4719: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_64ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 4)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4720; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4720; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4720; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4720: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6500_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4721; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4721: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6501_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4722; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4722: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_65ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 5)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4723; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4723; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4723; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4723: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6600_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4724; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4724: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6601_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4725; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4725: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_66ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 6)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4726; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4726; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4726; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4726: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6700_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4727; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4727: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6701_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4728; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4728: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_67ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 7)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4729; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4729; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4729; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4729: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6800_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4730; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4730: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6801_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4731; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4731: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_68ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 8)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4732; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4732; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4732; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4732: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6900_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4733; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4733: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6901_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4734; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4734: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_69ff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 9)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4735; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4735; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4735; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4735: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6a00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4736; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4736: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6a01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4737; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4737: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6aff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 10)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4738; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4738; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4738; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4738: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6b00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4739; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4739: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6b01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4740; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4740: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6bff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 11)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4741; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4741; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4741; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4741: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6c00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4742; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4742: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6c01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4743; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4743: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6cff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 12)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4744; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4744; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4744; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4744: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6d00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4745; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4745: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6d01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4746; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4746: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6dff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 13)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4747; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4747; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4747; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4747: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6e00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4748; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4748: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6e01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4749; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4749: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6eff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 14)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4750; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4750; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4750; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4750: ; +} +/* Bcc.W #.W */ +void REGPARAM2 CPUFUNC(op_6f00_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4751; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4751: ; +} +/* Bcc.B # */ +void REGPARAM2 CPUFUNC(op_6f01_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4752; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 2); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4752: ; +} +/* Bcc.L #.L */ +void REGPARAM2 CPUFUNC(op_6fff_6)(uae_u32 opcode, struct regstruct *regs) +{ +{ do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (cctrue (®s->ccrflags, 15)) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 1); + goto endlabel4753; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + goto endlabel4753; +{ uae_s32 src; + src = get_word_ce_prefetch (regs, 2) << 16; + src |= regs->irc; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (!cctrue (®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc (regs) + 2, m68k_getpc (regs) + 2 + (uae_s32)src); + goto endlabel4753; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); + return; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_ce_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}endlabel4753: ; +} +/* MOVE.L #,Dn */ +void REGPARAM2 CPUFUNC(op_7000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_u32 src = srcreg; +{ m68k_dreg (regs, dstreg) = (src); + optflag_testl (regs, (uae_s32)(src)); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 2); +}}}} +/* OR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_8000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +} +/* OR.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_8010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* OR.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_8018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* OR.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_8020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* OR.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_8028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_8030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* OR.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_8038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* OR.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_8039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +} +/* OR.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_803a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_803b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* OR.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_803c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +} +/* OR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_8040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +} +/* OR.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_8050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4767; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel4767: ; +} +/* OR.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_8058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4768; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel4768: ; +} +/* OR.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_8060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4769; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel4769: ; +} +/* OR.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_8068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4770; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel4770: ; +} +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_8070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4771; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel4771: ; +} +/* OR.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_8078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4772; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel4772: ; +} +/* OR.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_8079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4773; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 6); +endlabel4773: ; +} +/* OR.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_807a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4774; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel4774: ; +} +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_807b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4775; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel4775: ; +} +/* OR.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_807c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +} +/* OR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_8080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* OR.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_8090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4778; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel4778: ; +} +/* OR.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_8098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4779; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel4779: ; +} +/* OR.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_80a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4780; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel4780: ; +} +/* OR.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_80a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4781; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel4781: ; +} +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_80b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4782; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel4782: ; +} +/* OR.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_80b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4783; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel4783: ; +} +/* OR.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_80b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4784; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 6); +endlabel4784: ; +} +/* OR.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_80ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4785; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel4785: ; +} +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_80bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4786; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel4786: ; +} +/* OR.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_80bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +} +/* DIVU.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_80c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4788; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}endlabel4788: ; +} +/* DIVU.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_80d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4789; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4789; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4789: ; +} +/* DIVU.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_80d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4790; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4790; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4790: ; +} +/* DIVU.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_80e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4791; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4791; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4791: ; +} +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_80e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4792; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4792; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4792: ; +} +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_80f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4793; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4793; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4793: ; +} +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_80f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4794; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4794; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4794: ; +} +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_80f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4795; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel4795; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_incpc (regs, 6); + } +}}}}}endlabel4795: ; +} +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_80fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4796; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4796; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4796: ; +} +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_80fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4797; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4797; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4797: ; +} +/* DIVU.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_80fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4798; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel4798: ; +} +/* SBCD.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_8100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* SBCD.B -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_8108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - GET_XFLG (®s->ccrflags)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, ((((dst & 0xFF) - (src & 0xFF) - bcd - GET_XFLG (®s->ccrflags)) & 0x300) > 0xFF) ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0) ? 1 : 0); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* OR.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_8110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* OR.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_8118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* OR.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_8120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* OR.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_8128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_8130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_8138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* OR.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_8139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src |= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* OR.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_8150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4808; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4808: ; +} +/* OR.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_8158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4809; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4809: ; +} +/* OR.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_8160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4810; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4810: ; +} +/* OR.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_8168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4811; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4811: ; +} +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_8170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4812; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4812: ; +} +/* OR.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_8178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4813; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4813: ; +} +/* OR.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_8179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4814; + } +{{ uae_s16 dst = get_word_ce (dsta); + src |= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel4814: ; +} +/* OR.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_8190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4815; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4815: ; +} +/* OR.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_8198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4816; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4816: ; +} +/* OR.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_81a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4817; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4817: ; +} +/* OR.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_81a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4818; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4818: ; +} +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_81b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4819; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4819: ; +} +/* OR.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_81b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4820; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4820: ; +} +/* OR.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_81b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4821; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src |= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel4821: ; +} +/* DIVS.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_81c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4822; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}endlabel4822: ; +} +/* DIVS.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_81d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4823; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4823; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4823: ; +} +/* DIVS.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_81d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4824; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4824; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4824: ; +} +/* DIVS.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_81e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4825; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel4825; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel4825: ; +} +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_81e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4826; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4826; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4826: ; +} +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_81f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4827; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4827; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4827: ; +} +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_81f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4828; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4828; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4828: ; +} +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_81f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4829; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel4829; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_incpc (regs, 6); + } +}}}}}endlabel4829: ; +} +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_81fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4830; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4830; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4830: ; +} +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_81fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4831; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4831; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel4831: ; +} +/* DIVS.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_81fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc (regs); +{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel4832; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src) * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + optflag_testw (regs, (uae_s16)(newv)); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg (regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel4832: ; +} +/* SUB.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_9010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_9018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_9020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_9028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_9030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_9038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_9039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +} +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_903a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_903b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_903c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +} +/* SUB.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.W An,Dn */ +void REGPARAM2 CPUFUNC(op_9048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_9050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4846; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel4846: ; +} +/* SUB.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_9058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4847; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel4847: ; +} +/* SUB.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_9060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4848; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel4848: ; +} +/* SUB.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_9068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4849; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel4849: ; +} +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_9070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4850; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel4850: ; +} +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_9078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4851; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel4851: ; +} +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_9079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4852; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 6); +endlabel4852: ; +} +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_907a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4853; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel4853: ; +} +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_907b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4854; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel4854: ; +} +/* SUB.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_907c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +} +/* SUB.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.L An,Dn */ +void REGPARAM2 CPUFUNC(op_9088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* SUB.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_9090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4858; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4858: ; +} +/* SUB.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_9098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4859; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4859: ; +} +/* SUB.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_90a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4860; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4860: ; +} +/* SUB.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_90a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4861; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4861: ; +} +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_90b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4862; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4862: ; +} +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_90b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4863; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4863: ; +} +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_90b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4864; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4864: ; +} +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_90ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4865; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4865: ; +} +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_90bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4866; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4866: ; +} +/* SUB.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_90bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +} +/* SUBA.W Dn,An */ +void REGPARAM2 CPUFUNC(op_90c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUBA.W An,An */ +void REGPARAM2 CPUFUNC(op_90c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUBA.W (An),An */ +void REGPARAM2 CPUFUNC(op_90d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4870; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4870: ; +} +/* SUBA.W (An)+,An */ +void REGPARAM2 CPUFUNC(op_90d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4871; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4871: ; +} +/* SUBA.W -(An),An */ +void REGPARAM2 CPUFUNC(op_90e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4872; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4872: ; +} +/* SUBA.W (d16,An),An */ +void REGPARAM2 CPUFUNC(op_90e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4873; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4873: ; +} +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_90f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4874; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4874: ; +} +/* SUBA.W (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_90f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4875; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4875: ; +} +/* SUBA.W (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_90f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4876; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel4876: ; +} +/* SUBA.W (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_90fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4877; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4877: ; +} +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_90fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4878; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4878: ; +} +/* SUBA.W #.W,An */ +void REGPARAM2 CPUFUNC(op_90fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +} +/* SUBX.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* SUBX.B -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_9108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_9110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_9118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_9120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_9128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_9130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_9138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_9139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* SUBX.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* SUBX.W -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_9148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4890; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4890; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel4890: ; +} +/* SUB.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_9150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4891; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4891: ; +} +/* SUB.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_9158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4892; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4892: ; +} +/* SUB.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_9160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4893; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4893: ; +} +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_9168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4894; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4894: ; +} +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_9170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4895; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4895: ; +} +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_9178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4896; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4896: ; +} +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_9179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4897; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4897: ; +} +/* SUBX.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_9180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* SUBX.L -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_9188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4899; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4899; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src - GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel4899: ; +} +/* SUB.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_9190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4900; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4900: ; +} +/* SUB.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_9198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4901; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4901: ; +} +/* SUB.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_91a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4902; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel4902: ; +} +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_91a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4903; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4903: ; +} +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_91b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4904; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4904: ; +} +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_91b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4905; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel4905: ; +} +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_91b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4906; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_subl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel4906: ; +} +/* SUBA.L Dn,An */ +void REGPARAM2 CPUFUNC(op_91c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUBA.L An,An */ +void REGPARAM2 CPUFUNC(op_91c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* SUBA.L (An),An */ +void REGPARAM2 CPUFUNC(op_91d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4909; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4909: ; +} +/* SUBA.L (An)+,An */ +void REGPARAM2 CPUFUNC(op_91d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4910; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4910: ; +} +/* SUBA.L -(An),An */ +void REGPARAM2 CPUFUNC(op_91e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4911; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel4911: ; +} +/* SUBA.L (d16,An),An */ +void REGPARAM2 CPUFUNC(op_91e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4912; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4912: ; +} +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_91f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4913; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4913: ; +} +/* SUBA.L (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_91f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4914; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4914: ; +} +/* SUBA.L (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_91f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4915; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel4915: ; +} +/* SUBA.L (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_91fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4916; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4916: ; +} +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_91fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4917; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel4917: ; +} +/* SUBA.L #.L,An */ +void REGPARAM2 CPUFUNC(op_91fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +} +/* CMP.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMP.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_b010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +} +/* CMP.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_b018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +} +/* CMP.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_b020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 2); +} +/* CMP.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_b028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_b038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_b039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 6); +} +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_b03a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b03b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}} m68k_incpc (regs, 4); +} +/* CMP.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_b03c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}} m68k_incpc (regs, 4); +} +/* CMP.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +} +#endif + +#ifdef PART_7 +/* CMP.W An,Dn */ +void REGPARAM2 CPUFUNC(op_b048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMP.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_b050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4932; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4932: ; +} +/* CMP.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_b058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4933; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4933: ; +} +/* CMP.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_b060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4934; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4934: ; +} +/* CMP.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_b068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4935; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4935: ; +} +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4936; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4936: ; +} +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_b078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4937; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4937: ; +} +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_b079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4938; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel4938: ; +} +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_b07a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4939; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4939: ; +} +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b07b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4940; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4940: ; +} +/* CMP.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_b07c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}} m68k_incpc (regs, 4); +} +/* CMP.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMP.L An,Dn */ +void REGPARAM2 CPUFUNC(op_b088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMP.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_b090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4944; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4944: ; +} +/* CMP.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_b098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4945; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4945: ; +} +/* CMP.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_b0a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4946; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4946: ; +} +/* CMP.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_b0a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4947; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4947: ; +} +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b0b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4948; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4948: ; +} +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_b0b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4949; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4949: ; +} +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_b0b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4950; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel4950: ; +} +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_b0ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4951; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4951: ; +} +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_b0bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4952; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4952: ; +} +/* CMP.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_b0bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +} +/* CMPA.W Dn,An */ +void REGPARAM2 CPUFUNC(op_b0c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMPA.W An,An */ +void REGPARAM2 CPUFUNC(op_b0c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMPA.W (An),An */ +void REGPARAM2 CPUFUNC(op_b0d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4956; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4956: ; +} +/* CMPA.W (An)+,An */ +void REGPARAM2 CPUFUNC(op_b0d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4957; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4957: ; +} +/* CMPA.W -(An),An */ +void REGPARAM2 CPUFUNC(op_b0e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4958; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4958: ; +} +/* CMPA.W (d16,An),An */ +void REGPARAM2 CPUFUNC(op_b0e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4959; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4959: ; +} +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_b0f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4960; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4960: ; +} +/* CMPA.W (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_b0f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4961; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4961: ; +} +/* CMPA.W (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_b0f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4962; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel4962: ; +} +/* CMPA.W (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_b0fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4963; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4963: ; +} +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_b0fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4964; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4964: ; +} +/* CMPA.W #.W,An */ +void REGPARAM2 CPUFUNC(op_b0fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +} +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_b108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpb (regs, (uae_s8)(src), (uae_s8)(dst)); +}}}}}} m68k_incpc (regs, 2); +} +/* EOR.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_b110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* EOR.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_b118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* EOR.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_b120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_b128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_b130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_b138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_b139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src ^= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* EOR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +} +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_b148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4976; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4976; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpw (regs, (uae_s16)(src), (uae_s16)(dst)); +}}}}}}}} m68k_incpc (regs, 2); +endlabel4976: ; +} +/* EOR.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_b150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4977; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4977: ; +} +/* EOR.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_b158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4978; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4978: ; +} +/* EOR.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_b160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4979; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel4979: ; +} +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_b168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4980; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4980: ; +} +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_b170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4981; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4981: ; +} +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_b178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4982; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel4982: ; +} +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_b179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4983; + } +{{ uae_s16 dst = get_word_ce (dsta); + src ^= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel4983: ; +} +/* EOR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_b180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 CPUFUNC(op_b188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4985; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4985; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}}}} m68k_incpc (regs, 2); +endlabel4985: ; +} +/* EOR.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_b190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4986; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4986: ; +} +/* EOR.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_b198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4987; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4987: ; +} +/* EOR.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_b1a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4988; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel4988: ; +} +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_b1a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4989; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4989: ; +} +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_b1b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4990; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4990: ; +} +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_b1b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4991; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel4991: ; +} +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_b1b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel4992; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src ^= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel4992: ; +} +/* CMPA.L Dn,An */ +void REGPARAM2 CPUFUNC(op_b1c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMPA.L An,An */ +void REGPARAM2 CPUFUNC(op_b1c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 2); +} +/* CMPA.L (An),An */ +void REGPARAM2 CPUFUNC(op_b1d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4995; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4995: ; +} +/* CMPA.L (An)+,An */ +void REGPARAM2 CPUFUNC(op_b1d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4996; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4996: ; +} +/* CMPA.L -(An),An */ +void REGPARAM2 CPUFUNC(op_b1e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4997; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 2); +endlabel4997: ; +} +/* CMPA.L (d16,An),An */ +void REGPARAM2 CPUFUNC(op_b1e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4998; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4998: ; +} +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_b1f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel4999; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel4999: ; +} +/* CMPA.L (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_b1f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5000; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel5000: ; +} +/* CMPA.L (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_b1f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5001; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 6); +endlabel5001: ; +} +/* CMPA.L (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_b1fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5002; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel5002: ; +} +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_b1fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5003; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}}}} m68k_incpc (regs, 4); +endlabel5003: ; +} +/* CMPA.L #.L,An */ +void REGPARAM2 CPUFUNC(op_b1fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ optflag_cmpl (regs, (uae_s32)(src), (uae_s32)(dst)); +}}}} m68k_incpc (regs, 6); +} +/* AND.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +} +/* AND.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_c010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* AND.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_c018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* AND.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_c020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* AND.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_c028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* AND.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_c038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* AND.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_c039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 6); +} +/* AND.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_c03a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c03b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}}} m68k_incpc (regs, 4); +} +/* AND.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_c03c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 4); +} +/* AND.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +} +/* AND.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_c050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5017; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel5017: ; +} +/* AND.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_c058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5018; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel5018: ; +} +/* AND.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_c060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5019; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 2); +endlabel5019: ; +} +/* AND.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_c068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5020; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel5020: ; +} +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5021; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel5021: ; +} +/* AND.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_c078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5022; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel5022: ; +} +/* AND.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_c079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5023; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 6); +endlabel5023: ; +} +/* AND.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_c07a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5024; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel5024: ; +} +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c07b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5025; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}}}} m68k_incpc (regs, 4); +endlabel5025: ; +} +/* AND.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_c07c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 4); +} +/* AND.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* AND.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_c090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5028; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel5028: ; +} +/* AND.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_c098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5029; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel5029: ; +} +/* AND.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_c0a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5030; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 2); +endlabel5030: ; +} +/* AND.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_c0a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5031; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel5031: ; +} +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c0b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5032; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel5032: ; +} +/* AND.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_c0b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5033; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel5033: ; +} +/* AND.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_c0b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5034; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 6); +endlabel5034: ; +} +/* AND.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_c0ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5035; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel5035: ; +} +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c0bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5036; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + m68k_dreg (regs, dstreg) = (src); +}}}}} m68k_incpc (regs, 4); +endlabel5036: ; +} +/* AND.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_c0bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 6); +} +/* MULU.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c0c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}} +/* MULU.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_c0d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5039; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel5039: ; +} +/* MULU.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_c0d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5040; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel5040: ; +} +/* MULU.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_c0e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5041; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 2); +}}}}}}endlabel5041: ; +} +/* MULU.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_c0e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5042; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel5042: ; +} +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c0f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5043; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel5043: ; +} +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_c0f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5044; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel5044: ; +} +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_c0f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5045; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 6); +}}}}}}endlabel5045: ; +} +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_c0fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5046; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel5046: ; +} +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c0fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5047; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}}}endlabel5047: ; +} +/* MULU.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_c0fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + optflag_testl (regs, (uae_s32)(newv)); + for(bits = 0; bits < 16 && src; bits++, src >>= 1) + if (src & 1) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); + m68k_incpc (regs, 4); +}}}}} +/* ABCD.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ABCD.B -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_c108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + GET_XFLG (®s->ccrflags); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg ? 1 : 0); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + SET_VFLG (®s->ccrflags, ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0) ? 1 : 0); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* AND.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_c110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* AND.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_c118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* AND.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_c120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 2); +} +/* AND.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_c128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_c130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_c138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 4); +} +/* AND.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_c139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + src &= dst; + optflag_testb (regs, (uae_s8)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_byte_ce (dsta,src); +}}}} m68k_incpc (regs, 6); +} +/* EXG.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, srcreg) = (dst); + m68k_dreg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* EXG.L An,An */ +void REGPARAM2 CPUFUNC(op_c148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_areg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* AND.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_c150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5060; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel5060: ; +} +/* AND.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_c158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5061; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel5061: ; +} +/* AND.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_c160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5062; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel5062: ; +} +/* AND.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_c168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5063; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel5063: ; +} +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_c170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5064; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel5064: ; +} +/* AND.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_c178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5065; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel5065: ; +} +/* AND.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_c179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5066; + } +{{ uae_s16 dst = get_word_ce (dsta); + src &= dst; + optflag_testw (regs, (uae_s16)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel5066: ; +} +/* EXG.L Dn,An */ +void REGPARAM2 CPUFUNC(op_c188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + m68k_dreg (regs, srcreg) = (dst); + m68k_areg (regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +} +/* AND.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_c190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5068; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel5068: ; +} +/* AND.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_c198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5069; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel5069: ; +} +/* AND.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_c1a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5070; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 2); +endlabel5070: ; +} +/* AND.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_c1a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5071; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel5071: ; +} +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_c1b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5072; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel5072: ; +} +/* AND.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_c1b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5073; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 4); +endlabel5073: ; +} +/* AND.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_c1b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5074; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + src &= dst; + optflag_testl (regs, (uae_s32)(src)); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); + put_word_ce (dsta, src >> 16); put_word_ce (dsta + 2, src); +}}}}} m68k_incpc (regs, 6); +endlabel5074: ; +} +/* MULS.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_c1c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* MULS.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_c1d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5076; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5076: ; +} +/* MULS.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_c1d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5077; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5077: ; +} +/* MULS.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_c1e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5078; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5078: ; +} +/* MULS.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_c1e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5079; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5079: ; +} +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c1f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5080; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5080: ; +} +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_c1f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5081; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5081: ; +} +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_c1f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5082; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel5082: ; +} +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_c1fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5083; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5083: ; +} +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_c1fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5084; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5084: ; +} +/* MULS.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_c1fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + int cycles = 36 * CYCLE_UNIT / 2, bits; + uae_u32 usrc; + optflag_testl (regs, (uae_s32)(newv)); + usrc = ((uae_u32)src) << 1; + for(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1) + if ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2 * CYCLE_UNIT / 2; + if (cycles > 0) do_cycles_ce (cycles); + m68k_dreg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +} +/* ADD.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.B (An),Dn */ +void REGPARAM2 CPUFUNC(op_d010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_d018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B -(An),Dn */ +void REGPARAM2 CPUFUNC(op_d020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_d028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_d038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_d039_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 6); +} +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_d03a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d03b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 src = get_byte_ce (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B #.B,Dn */ +void REGPARAM2 CPUFUNC(op_d03c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 4); +} +/* ADD.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.W An,Dn */ +void REGPARAM2 CPUFUNC(op_d048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.W (An),Dn */ +void REGPARAM2 CPUFUNC(op_d050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5099; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel5099: ; +} +/* ADD.W (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_d058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5100; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel5100: ; +} +/* ADD.W -(An),Dn */ +void REGPARAM2 CPUFUNC(op_d060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5101; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 2); +endlabel5101: ; +} +/* ADD.W (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_d068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5102; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel5102: ; +} +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5103; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel5103: ; +} +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_d078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5104; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel5104: ; +} +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_d079_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5105; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 6); +endlabel5105: ; +} +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_d07a_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5106; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel5106: ; +} +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d07b_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5107; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}}}} m68k_incpc (regs, 4); +endlabel5107: ; +} +/* ADD.W #.W,Dn */ +void REGPARAM2 CPUFUNC(op_d07c_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 4); +} +/* ADD.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.L An,Dn */ +void REGPARAM2 CPUFUNC(op_d088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* ADD.L (An),Dn */ +void REGPARAM2 CPUFUNC(op_d090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5111; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5111: ; +} +/* ADD.L (An)+,Dn */ +void REGPARAM2 CPUFUNC(op_d098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5112; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5112: ; +} +/* ADD.L -(An),Dn */ +void REGPARAM2 CPUFUNC(op_d0a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5113; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5113: ; +} +/* ADD.L (d16,An),Dn */ +void REGPARAM2 CPUFUNC(op_d0a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5114; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5114: ; +} +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d0b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5115; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5115: ; +} +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 CPUFUNC(op_d0b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5116; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5116: ; +} +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 CPUFUNC(op_d0b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5117; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel5117: ; +} +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 CPUFUNC(op_d0ba_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5118; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5118: ; +} +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 CPUFUNC(op_d0bb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5119; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5119: ; +} +/* ADD.L #.L,Dn */ +void REGPARAM2 CPUFUNC(op_d0bc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 6); +} +/* ADDA.W Dn,An */ +void REGPARAM2 CPUFUNC(op_d0c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADDA.W An,An */ +void REGPARAM2 CPUFUNC(op_d0c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADDA.W (An),An */ +void REGPARAM2 CPUFUNC(op_d0d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5123; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5123: ; +} +/* ADDA.W (An)+,An */ +void REGPARAM2 CPUFUNC(op_d0d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5124; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) += 2; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5124: ; +} +/* ADDA.W -(An),An */ +void REGPARAM2 CPUFUNC(op_d0e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5125; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5125: ; +} +/* ADDA.W (d16,An),An */ +void REGPARAM2 CPUFUNC(op_d0e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5126; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5126: ; +} +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_d0f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5127; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5127: ; +} +/* ADDA.W (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_d0f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5128; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5128: ; +} +/* ADDA.W (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_d0f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5129; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel5129: ; +} +/* ADDA.W (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_d0fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5130; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5130: ; +} +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_d0fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5131; + } +{{ uae_s16 src = get_word_ce (srca); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5131: ; +} +/* ADDA.W #.W,An */ +void REGPARAM2 CPUFUNC(op_d0fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_ce_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 4); +} +/* ADDX.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}}} m68k_incpc (regs, 2); +} +/* ADDX.B -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_d108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s8)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s8)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s8)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s8)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s8)(newv)) < 0) ? 1 : 0); + put_byte_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B Dn,(An) */ +void REGPARAM2 CPUFUNC(op_d110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_d118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_d120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +} +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_d128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_d130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_d138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 4); +} +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_d139_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); +{ uae_s8 dst = get_byte_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addb (regs, newv, (uae_s8)(src), (uae_s8)(dst)); + put_byte_ce (dsta,newv); +}}}}}} m68k_incpc (regs, 6); +} +/* ADDX.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uae_s16 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((newv) & 0xffff); +}}}}} m68k_incpc (regs, 2); +} +/* ADDX.W -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_d148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5143; + } +{{ uae_s16 src = get_word_ce (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5143; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s16)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s16)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s16)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s16)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s16)(newv)) < 0) ? 1 : 0); + put_word_ce (dsta,newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel5143: ; +} +/* ADD.W Dn,(An) */ +void REGPARAM2 CPUFUNC(op_d150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5144; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5144: ; +} +/* ADD.W Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_d158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5145; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5145: ; +} +/* ADD.W Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_d160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5146; + } +{{ uae_s16 dst = get_word_ce (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5146: ; +} +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_d168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5147; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5147: ; +} +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_d170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5148; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5148: ; +} +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_d178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5149; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5149: ; +} +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_d179_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5150; + } +{{ uae_s16 dst = get_word_ce (dsta); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addw (regs, newv, (uae_s16)(src), (uae_s16)(dst)); + put_word_ce (dsta,newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel5150: ; +} +/* ADDX.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_d180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_dreg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + m68k_dreg (regs, dstreg) = (newv); +}}}}} m68k_incpc (regs, 2); +} +/* ADDX.L -(An),-(An) */ +void REGPARAM2 CPUFUNC(op_d188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5152; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5152; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src + GET_XFLG (®s->ccrflags); +{ int flgs = (((uae_s32)(src)) < 0) ? 1 : 0; + int flgo = (((uae_s32)(dst)) < 0) ? 1 : 0; + int flgn = (((uae_s32)(newv)) < 0) ? 1 : 0; + SET_VFLG (®s->ccrflags, (flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG (®s->ccrflags, flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (®s->ccrflags) & ((((uae_s32)(newv)) == 0) ? 1 : 0)); + SET_NFLG (®s->ccrflags, (((uae_s32)(newv)) < 0) ? 1 : 0); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}}}} m68k_incpc (regs, 2); +endlabel5152: ; +} +/* ADD.L Dn,(An) */ +void REGPARAM2 CPUFUNC(op_d190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5153; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5153: ; +} +/* ADD.L Dn,(An)+ */ +void REGPARAM2 CPUFUNC(op_d198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5154; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5154: ; +} +/* ADD.L Dn,-(An) */ +void REGPARAM2 CPUFUNC(op_d1a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg (regs, dstreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5155; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 2); +endlabel5155: ; +} +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 CPUFUNC(op_d1a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5156; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5156: ; +} +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_d1b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000 (regs, m68k_areg (regs, dstreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5157; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5157: ; +} +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 CPUFUNC(op_d1b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5158; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 4); +endlabel5158: ; +} +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 CPUFUNC(op_d1b9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_word_ce_prefetch (regs, 4) << 16; + dsta |= get_word_ce_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel5159; + } +{{ uae_s32 dst = get_word_ce (dsta) << 16; dst |= get_word_ce (dsta + 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{{ uae_u32 newv; + optflag_addl (regs, newv, (uae_s32)(src), (uae_s32)(dst)); + put_word_ce (dsta, newv >> 16); put_word_ce (dsta + 2, newv); +}}}}}}} m68k_incpc (regs, 6); +endlabel5159: ; +} +/* ADDA.L Dn,An */ +void REGPARAM2 CPUFUNC(op_d1c0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADDA.L An,An */ +void REGPARAM2 CPUFUNC(op_d1c8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg (regs, srcreg); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 2); +} +/* ADDA.L (An),An */ +void REGPARAM2 CPUFUNC(op_d1d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5162; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5162: ; +} +/* ADDA.L (An)+,An */ +void REGPARAM2 CPUFUNC(op_d1d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5163; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5163: ; +} +#endif + +#ifdef PART_8 +/* ADDA.L -(An),An */ +void REGPARAM2 CPUFUNC(op_d1e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg (regs, srcreg) - 4; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5164; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel5164: ; +} +/* ADDA.L (d16,An),An */ +void REGPARAM2 CPUFUNC(op_d1e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5165; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5165: ; +} +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 CPUFUNC(op_d1f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5166; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5166: ; +} +/* ADDA.L (xxx).W,An */ +void REGPARAM2 CPUFUNC(op_d1f8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5167; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5167: ; +} +/* ADDA.L (xxx).L,An */ +void REGPARAM2 CPUFUNC(op_d1f9_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_word_ce_prefetch (regs, 4) << 16; + srca |= get_word_ce_prefetch (regs, 6); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5168; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel5168: ; +} +/* ADDA.L (d16,PC),An */ +void REGPARAM2 CPUFUNC(op_d1fa_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5169; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5169: ; +} +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 CPUFUNC(op_d1fb_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc (regs) + 2; + srca = get_disp_ea_000 (regs, tmppc, get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel5170; + } +{{ uae_s32 src = get_word_ce (srca) << 16; src |= get_word_ce (srca + 2); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel5170: ; +} +/* ADDA.L #.L,An */ +void REGPARAM2 CPUFUNC(op_d1fc_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src; + src = get_word_ce_prefetch (regs, 4) << 16; + src |= get_word_ce_prefetch (regs, 6); +{ uae_s32 dst = m68k_areg (regs, dstreg); + do_cycles_ce (CYCLE_UNIT / 2 * 4); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 newv = dst + src; + m68k_areg (regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +} +/* ASR.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e000_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* LSR.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e008_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e010_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROR.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e018_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ASR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e020_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + val = 0xff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)-sign; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* LSR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e028_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, ((cnt == 8) ? 1 : 0) & (val >> 7)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e030_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROR.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e038_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ASR.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e040_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* LSR.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e048_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e050_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROR.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e058_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ASR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e060_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + val = 0xffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* LSR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e068_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, ((cnt == 16) ? 1 : 0) & (val >> 15)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e070_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROR.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e078_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ASR.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e080_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* LSR.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e088_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e090_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROR.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e098_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ASR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e0a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)-sign; + SET_CFLG (®s->ccrflags, sign); + COPY_CARRY (®s->ccrflags); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* LSR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e0a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, ((cnt == 32) ? 1 : 0) & (val >> 31)); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG (®s->ccrflags, val & 1); + COPY_CARRY (®s->ccrflags); + val >>= 1; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROXR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e0b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG (®s->ccrflags); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROR.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e0b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ASRW.W (An) */ +void REGPARAM2 CPUFUNC(op_e0d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5196; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5196: ; +} +/* ASRW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e0d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5197; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5197: ; +} +/* ASRW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e0e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5198; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5198: ; +} +/* ASRW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e0e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5199; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5199: ; +} +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e0f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5200; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5200: ; +} +/* ASRW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e0f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5201; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5201: ; +} +/* ASRW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e0f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5202; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + optflag_testw (regs, (uae_s16)(val)); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5202: ; +} +/* ASL.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e100_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* LSL.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e108_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e110_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROL.B #,Dn */ +void REGPARAM2 CPUFUNC(op_e118_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ASL.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e120_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* LSL.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e128_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e130_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ROL.B Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e138_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testb (regs, (uae_s8)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +} +/* ASL.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e140_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* LSL.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e148_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e150_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROL.W #,Dn */ +void REGPARAM2 CPUFUNC(op_e158_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ASL.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e160_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* LSL.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e168_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e170_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ROL.W Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e178_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg (regs, srcreg); +{ uae_s16 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testw (regs, (uae_s16)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 6; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +} +/* ASL.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e180_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* LSL.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e188_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e190_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROL.L #,Dn */ +void REGPARAM2 CPUFUNC(op_e198_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ASL.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e1a0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, (val != 0) ? 1 : 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, ((val & mask) != mask && (val & mask) != 0) ? 1 : 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* LSL.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e1a8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROXL.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e1b0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ROL.L Dn,Dn */ +void REGPARAM2 CPUFUNC(op_e1b8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg (regs, srcreg); +{ uae_s32 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = data; + int ccnt = cnt & 63; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + {uae_u32 oldcznv = GET_CZNV (®s->ccrflags) & ~(FLAGVAL_Z | FLAGVAL_N); + optflag_testl (regs, (uae_s32)(val)); + IOR_CZNV (®s->ccrflags, oldcznv); + } + { + int cycles = CYCLE_UNIT / 2 * 8; + cycles += 2 * CYCLE_UNIT / 2 * ccnt; + if (cycles > 0) do_cycles_ce (cycles); + } + m68k_dreg (regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +} +/* ASLW.W (An) */ +void REGPARAM2 CPUFUNC(op_e1d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5227; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5227: ; +} +/* ASLW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e1d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5228; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5228: ; +} +/* ASLW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e1e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5229; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5229: ; +} +/* ASLW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e1e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5230; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5230: ; +} +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e1f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5231; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5231: ; +} +/* ASLW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e1f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5232; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5232: ; +} +/* ASLW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e1f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5233; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, (GET_VFLG (®s->ccrflags) | (sign2 != sign)) ? 1 : 0); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5233: ; +} +/* LSRW.W (An) */ +void REGPARAM2 CPUFUNC(op_e2d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5234; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5234: ; +} +/* LSRW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e2d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5235; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5235: ; +} +/* LSRW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e2e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5236; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5236: ; +} +/* LSRW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e2e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5237; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5237: ; +} +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e2f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5238; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5238: ; +} +/* LSRW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e2f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5239; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5239: ; +} +/* LSRW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e2f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5240; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5240: ; +} +/* LSLW.W (An) */ +void REGPARAM2 CPUFUNC(op_e3d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5241; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5241: ; +} +/* LSLW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e3d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5242; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5242: ; +} +/* LSLW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e3e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5243; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5243: ; +} +/* LSLW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e3e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5244; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5244: ; +} +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e3f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5245; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5245: ; +} +/* LSLW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e3f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5246; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5246: ; +} +/* LSLW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e3f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5247; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5247: ; +} +/* ROXRW.W (An) */ +void REGPARAM2 CPUFUNC(op_e4d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5248; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5248: ; +} +/* ROXRW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e4d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5249; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5249: ; +} +/* ROXRW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e4e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5250; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5250: ; +} +/* ROXRW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e4e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5251; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5251: ; +} +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e4f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5252; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5252: ; +} +/* ROXRW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e4f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5253; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5253: ; +} +/* ROXRW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e4f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5254; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5254: ; +} +/* ROXLW.W (An) */ +void REGPARAM2 CPUFUNC(op_e5d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5255; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5255: ; +} +/* ROXLW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e5d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5256; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5256: ; +} +/* ROXLW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e5e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5257; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5257: ; +} +/* ROXLW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e5e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5258; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5258: ; +} +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e5f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5259; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5259: ; +} +/* ROXLW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e5f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5260; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5260: ; +} +/* ROXLW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e5f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5261; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5261: ; +} +/* RORW.W (An) */ +void REGPARAM2 CPUFUNC(op_e6d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5262; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5262: ; +} +/* RORW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e6d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5263; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5263: ; +} +/* RORW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e6e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5264; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5264: ; +} +/* RORW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e6e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5265; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5265: ; +} +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e6f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5266; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5266: ; +} +/* RORW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e6f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5267; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5267: ; +} +/* RORW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e6f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5268; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5268: ; +} +/* ROLW.W (An) */ +void REGPARAM2 CPUFUNC(op_e7d0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5269; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5269: ; +} +/* ROLW.W (An)+ */ +void REGPARAM2 CPUFUNC(op_e7d8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5270; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5270: ; +} +/* ROLW.W -(An) */ +void REGPARAM2 CPUFUNC(op_e7e0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg (regs, srcreg) - 2; + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5271; + } +{{ uae_s16 data = get_word_ce (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel5271: ; +} +/* ROLW.W (d16,An) */ +void REGPARAM2 CPUFUNC(op_e7e8_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5272; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5272: ; +} +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 CPUFUNC(op_e7f0_6)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_ce_prefetch (regs, 4)); + do_cycles_ce (CYCLE_UNIT / 2 * 2); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5273; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5273: ; +} +/* ROLW.W (xxx).W */ +void REGPARAM2 CPUFUNC(op_e7f8_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_ce_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5274; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel5274: ; +} +/* ROLW.W (xxx).L */ +void REGPARAM2 CPUFUNC(op_e7f9_6)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa; + dataa = get_word_ce_prefetch (regs, 4) << 16; + dataa |= get_word_ce_prefetch (regs, 6); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel5275; + } +{{ uae_s16 data = get_word_ce (dataa); + regs->ir = regs->irc; + get_word_ce_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + optflag_testw (regs, (uae_s16)(val)); +SET_CFLG (®s->ccrflags, carry >> 15); + put_word_ce (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel5275: ; +} +#endif + diff --git a/src/cpustbl.c b/src/cpustbl.c new file mode 100644 index 0000000..ea1564d --- /dev/null +++ b/src/cpustbl.c @@ -0,0 +1,12426 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "machdep/m68kops.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define CPUFUNC(x) x##_ff +#define SET_CFLG_ALWAYS(flags, x) SET_CFLG(flags, x) +#define SET_NFLG_ALWAYS(flags, x) SET_NFLG(flags, x) +#ifdef NOFLAGS +#include "noflags.h" +#endif +#ifdef CPUEMU_0 +const struct cputbl CPUFUNC(op_smalltbl_0)[] = { +{ CPUFUNC(op_0000_0), 0 }, /* OR */ +{ CPUFUNC(op_0010_0), 16 }, /* OR */ +{ CPUFUNC(op_0018_0), 24 }, /* OR */ +{ CPUFUNC(op_0020_0), 32 }, /* OR */ +{ CPUFUNC(op_0028_0), 40 }, /* OR */ +{ CPUFUNC(op_0030_0), 48 }, /* OR */ +{ CPUFUNC(op_0038_0), 56 }, /* OR */ +{ CPUFUNC(op_0039_0), 57 }, /* OR */ +{ CPUFUNC(op_003c_0), 60 }, /* ORSR */ +{ CPUFUNC(op_0040_0), 64 }, /* OR */ +{ CPUFUNC(op_0050_0), 80 }, /* OR */ +{ CPUFUNC(op_0058_0), 88 }, /* OR */ +{ CPUFUNC(op_0060_0), 96 }, /* OR */ +{ CPUFUNC(op_0068_0), 104 }, /* OR */ +{ CPUFUNC(op_0070_0), 112 }, /* OR */ +{ CPUFUNC(op_0078_0), 120 }, /* OR */ +{ CPUFUNC(op_0079_0), 121 }, /* OR */ +{ CPUFUNC(op_007c_0), 124 }, /* ORSR */ +{ CPUFUNC(op_0080_0), 128 }, /* OR */ +{ CPUFUNC(op_0090_0), 144 }, /* OR */ +{ CPUFUNC(op_0098_0), 152 }, /* OR */ +{ CPUFUNC(op_00a0_0), 160 }, /* OR */ +{ CPUFUNC(op_00a8_0), 168 }, /* OR */ +{ CPUFUNC(op_00b0_0), 176 }, /* OR */ +{ CPUFUNC(op_00b8_0), 184 }, /* OR */ +{ CPUFUNC(op_00b9_0), 185 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00d0_0), 208 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00e8_0), 232 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00f0_0), 240 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00f8_0), 248 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00f9_0), 249 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00fa_0), 250 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_00fb_0), 251 }, /* CHK2 */ +#endif +{ CPUFUNC(op_0100_0), 256 }, /* BTST */ +{ CPUFUNC(op_0108_0), 264 }, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272 }, /* BTST */ +{ CPUFUNC(op_0118_0), 280 }, /* BTST */ +{ CPUFUNC(op_0120_0), 288 }, /* BTST */ +{ CPUFUNC(op_0128_0), 296 }, /* BTST */ +{ CPUFUNC(op_0130_0), 304 }, /* BTST */ +{ CPUFUNC(op_0138_0), 312 }, /* BTST */ +{ CPUFUNC(op_0139_0), 313 }, /* BTST */ +{ CPUFUNC(op_013a_0), 314 }, /* BTST */ +{ CPUFUNC(op_013b_0), 315 }, /* BTST */ +{ CPUFUNC(op_013c_0), 316 }, /* BTST */ +{ CPUFUNC(op_0140_0), 320 }, /* BCHG */ +{ CPUFUNC(op_0148_0), 328 }, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336 }, /* BCHG */ +{ CPUFUNC(op_0158_0), 344 }, /* BCHG */ +{ CPUFUNC(op_0160_0), 352 }, /* BCHG */ +{ CPUFUNC(op_0168_0), 360 }, /* BCHG */ +{ CPUFUNC(op_0170_0), 368 }, /* BCHG */ +{ CPUFUNC(op_0178_0), 376 }, /* BCHG */ +{ CPUFUNC(op_0179_0), 377 }, /* BCHG */ +{ CPUFUNC(op_017a_0), 378 }, /* BCHG */ +{ CPUFUNC(op_017b_0), 379 }, /* BCHG */ +{ CPUFUNC(op_0180_0), 384 }, /* BCLR */ +{ CPUFUNC(op_0188_0), 392 }, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400 }, /* BCLR */ +{ CPUFUNC(op_0198_0), 408 }, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416 }, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424 }, /* BCLR */ +{ CPUFUNC(op_01b0_0), 432 }, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440 }, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441 }, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442 }, /* BCLR */ +{ CPUFUNC(op_01bb_0), 443 }, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448 }, /* BSET */ +{ CPUFUNC(op_01c8_0), 456 }, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464 }, /* BSET */ +{ CPUFUNC(op_01d8_0), 472 }, /* BSET */ +{ CPUFUNC(op_01e0_0), 480 }, /* BSET */ +{ CPUFUNC(op_01e8_0), 488 }, /* BSET */ +{ CPUFUNC(op_01f0_0), 496 }, /* BSET */ +{ CPUFUNC(op_01f8_0), 504 }, /* BSET */ +{ CPUFUNC(op_01f9_0), 505 }, /* BSET */ +{ CPUFUNC(op_01fa_0), 506 }, /* BSET */ +{ CPUFUNC(op_01fb_0), 507 }, /* BSET */ +{ CPUFUNC(op_0200_0), 512 }, /* AND */ +{ CPUFUNC(op_0210_0), 528 }, /* AND */ +{ CPUFUNC(op_0218_0), 536 }, /* AND */ +{ CPUFUNC(op_0220_0), 544 }, /* AND */ +{ CPUFUNC(op_0228_0), 552 }, /* AND */ +{ CPUFUNC(op_0230_0), 560 }, /* AND */ +{ CPUFUNC(op_0238_0), 568 }, /* AND */ +{ CPUFUNC(op_0239_0), 569 }, /* AND */ +{ CPUFUNC(op_023c_0), 572 }, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576 }, /* AND */ +{ CPUFUNC(op_0250_0), 592 }, /* AND */ +{ CPUFUNC(op_0258_0), 600 }, /* AND */ +{ CPUFUNC(op_0260_0), 608 }, /* AND */ +{ CPUFUNC(op_0268_0), 616 }, /* AND */ +{ CPUFUNC(op_0270_0), 624 }, /* AND */ +{ CPUFUNC(op_0278_0), 632 }, /* AND */ +{ CPUFUNC(op_0279_0), 633 }, /* AND */ +{ CPUFUNC(op_027c_0), 636 }, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640 }, /* AND */ +{ CPUFUNC(op_0290_0), 656 }, /* AND */ +{ CPUFUNC(op_0298_0), 664 }, /* AND */ +{ CPUFUNC(op_02a0_0), 672 }, /* AND */ +{ CPUFUNC(op_02a8_0), 680 }, /* AND */ +{ CPUFUNC(op_02b0_0), 688 }, /* AND */ +{ CPUFUNC(op_02b8_0), 696 }, /* AND */ +{ CPUFUNC(op_02b9_0), 697 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02d0_0), 720 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02e8_0), 744 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02f0_0), 752 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02f8_0), 760 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02f9_0), 761 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02fa_0), 762 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_02fb_0), 763 }, /* CHK2 */ +#endif +{ CPUFUNC(op_0400_0), 1024 }, /* SUB */ +{ CPUFUNC(op_0410_0), 1040 }, /* SUB */ +{ CPUFUNC(op_0418_0), 1048 }, /* SUB */ +{ CPUFUNC(op_0420_0), 1056 }, /* SUB */ +{ CPUFUNC(op_0428_0), 1064 }, /* SUB */ +{ CPUFUNC(op_0430_0), 1072 }, /* SUB */ +{ CPUFUNC(op_0438_0), 1080 }, /* SUB */ +{ CPUFUNC(op_0439_0), 1081 }, /* SUB */ +{ CPUFUNC(op_0440_0), 1088 }, /* SUB */ +{ CPUFUNC(op_0450_0), 1104 }, /* SUB */ +{ CPUFUNC(op_0458_0), 1112 }, /* SUB */ +{ CPUFUNC(op_0460_0), 1120 }, /* SUB */ +{ CPUFUNC(op_0468_0), 1128 }, /* SUB */ +{ CPUFUNC(op_0470_0), 1136 }, /* SUB */ +{ CPUFUNC(op_0478_0), 1144 }, /* SUB */ +{ CPUFUNC(op_0479_0), 1145 }, /* SUB */ +{ CPUFUNC(op_0480_0), 1152 }, /* SUB */ +{ CPUFUNC(op_0490_0), 1168 }, /* SUB */ +{ CPUFUNC(op_0498_0), 1176 }, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184 }, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192 }, /* SUB */ +{ CPUFUNC(op_04b0_0), 1200 }, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208 }, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04d0_0), 1232 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04e8_0), 1256 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04f0_0), 1264 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04f8_0), 1272 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04f9_0), 1273 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04fa_0), 1274 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_04fb_0), 1275 }, /* CHK2 */ +#endif +{ CPUFUNC(op_0600_0), 1536 }, /* ADD */ +{ CPUFUNC(op_0610_0), 1552 }, /* ADD */ +{ CPUFUNC(op_0618_0), 1560 }, /* ADD */ +{ CPUFUNC(op_0620_0), 1568 }, /* ADD */ +{ CPUFUNC(op_0628_0), 1576 }, /* ADD */ +{ CPUFUNC(op_0630_0), 1584 }, /* ADD */ +{ CPUFUNC(op_0638_0), 1592 }, /* ADD */ +{ CPUFUNC(op_0639_0), 1593 }, /* ADD */ +{ CPUFUNC(op_0640_0), 1600 }, /* ADD */ +{ CPUFUNC(op_0650_0), 1616 }, /* ADD */ +{ CPUFUNC(op_0658_0), 1624 }, /* ADD */ +{ CPUFUNC(op_0660_0), 1632 }, /* ADD */ +{ CPUFUNC(op_0668_0), 1640 }, /* ADD */ +{ CPUFUNC(op_0670_0), 1648 }, /* ADD */ +{ CPUFUNC(op_0678_0), 1656 }, /* ADD */ +{ CPUFUNC(op_0679_0), 1657 }, /* ADD */ +{ CPUFUNC(op_0680_0), 1664 }, /* ADD */ +{ CPUFUNC(op_0690_0), 1680 }, /* ADD */ +{ CPUFUNC(op_0698_0), 1688 }, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696 }, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704 }, /* ADD */ +{ CPUFUNC(op_06b0_0), 1712 }, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720 }, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06c0_0), 1728 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06c8_0), 1736 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06d0_0), 1744 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06e8_0), 1768 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06f0_0), 1776 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06f8_0), 1784 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06f9_0), 1785 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06fa_0), 1786 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_06fb_0), 1787 }, /* CALLM */ +#endif +{ CPUFUNC(op_0800_0), 2048 }, /* BTST */ +{ CPUFUNC(op_0810_0), 2064 }, /* BTST */ +{ CPUFUNC(op_0818_0), 2072 }, /* BTST */ +{ CPUFUNC(op_0820_0), 2080 }, /* BTST */ +{ CPUFUNC(op_0828_0), 2088 }, /* BTST */ +{ CPUFUNC(op_0830_0), 2096 }, /* BTST */ +{ CPUFUNC(op_0838_0), 2104 }, /* BTST */ +{ CPUFUNC(op_0839_0), 2105 }, /* BTST */ +{ CPUFUNC(op_083a_0), 2106 }, /* BTST */ +{ CPUFUNC(op_083b_0), 2107 }, /* BTST */ +{ CPUFUNC(op_083c_0), 2108 }, /* BTST */ +{ CPUFUNC(op_0840_0), 2112 }, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128 }, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136 }, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144 }, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152 }, /* BCHG */ +{ CPUFUNC(op_0870_0), 2160 }, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168 }, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169 }, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170 }, /* BCHG */ +{ CPUFUNC(op_087b_0), 2171 }, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176 }, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192 }, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200 }, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208 }, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216 }, /* BCLR */ +{ CPUFUNC(op_08b0_0), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232 }, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233 }, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234 }, /* BCLR */ +{ CPUFUNC(op_08bb_0), 2235 }, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240 }, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256 }, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264 }, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272 }, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280 }, /* BSET */ +{ CPUFUNC(op_08f0_0), 2288 }, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296 }, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297 }, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298 }, /* BSET */ +{ CPUFUNC(op_08fb_0), 2299 }, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560 }, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576 }, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584 }, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592 }, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600 }, /* EOR */ +{ CPUFUNC(op_0a30_0), 2608 }, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616 }, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617 }, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620 }, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624 }, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640 }, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648 }, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656 }, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664 }, /* EOR */ +{ CPUFUNC(op_0a70_0), 2672 }, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680 }, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681 }, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684 }, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688 }, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704 }, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712 }, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720 }, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728 }, /* EOR */ +{ CPUFUNC(op_0ab0_0), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744 }, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ad0_0), 2768 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ad8_0), 2776 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ae0_0), 2784 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ae8_0), 2792 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0af0_0), 2800 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0af8_0), 2808 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0af9_0), 2809 }, /* CAS */ +#endif +{ CPUFUNC(op_0c00_0), 3072 }, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088 }, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096 }, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104 }, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112 }, /* CMP */ +{ CPUFUNC(op_0c30_0), 3120 }, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128 }, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0c3a_0), 3130 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0c3b_0), 3131 }, /* CMP */ +#endif +{ CPUFUNC(op_0c40_0), 3136 }, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152 }, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160 }, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168 }, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176 }, /* CMP */ +{ CPUFUNC(op_0c70_0), 3184 }, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192 }, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0c7a_0), 3194 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0c7b_0), 3195 }, /* CMP */ +#endif +{ CPUFUNC(op_0c80_0), 3200 }, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216 }, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224 }, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232 }, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240 }, /* CMP */ +{ CPUFUNC(op_0cb0_0), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256 }, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cba_0), 3258 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cbb_0), 3259 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cd0_0), 3280 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cd8_0), 3288 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ce0_0), 3296 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ce8_0), 3304 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cf0_0), 3312 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cf8_0), 3320 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cf9_0), 3321 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0cfc_0), 3324 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e10_0), 3600 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e18_0), 3608 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e20_0), 3616 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e28_0), 3624 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e30_0), 3632 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e38_0), 3640 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e39_0), 3641 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e50_0), 3664 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e58_0), 3672 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e60_0), 3680 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e68_0), 3688 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e70_0), 3696 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e78_0), 3704 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e79_0), 3705 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e90_0), 3728 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0e98_0), 3736 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ea0_0), 3744 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ea8_0), 3752 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0eb0_0), 3760 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0eb8_0), 3768 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0eb9_0), 3769 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ed0_0), 3792 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ed8_0), 3800 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ee0_0), 3808 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ee8_0), 3816 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ef0_0), 3824 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ef8_0), 3832 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0ef9_0), 3833 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_0efc_0), 3836 }, /* CAS2 */ +#endif +{ CPUFUNC(op_1000_0), 4096 }, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112 }, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120 }, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128 }, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136 }, /* MOVE */ +{ CPUFUNC(op_1030_0), 4144 }, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152 }, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153 }, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154 }, /* MOVE */ +{ CPUFUNC(op_103b_0), 4155 }, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156 }, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224 }, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240 }, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248 }, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256 }, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264 }, /* MOVE */ +{ CPUFUNC(op_10b0_0), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280 }, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281 }, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282 }, /* MOVE */ +{ CPUFUNC(op_10bb_0), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284 }, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288 }, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304 }, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312 }, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320 }, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328 }, /* MOVE */ +{ CPUFUNC(op_10f0_0), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344 }, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345 }, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346 }, /* MOVE */ +{ CPUFUNC(op_10fb_0), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348 }, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352 }, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368 }, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376 }, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384 }, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392 }, /* MOVE */ +{ CPUFUNC(op_1130_0), 4400 }, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408 }, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409 }, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410 }, /* MOVE */ +{ CPUFUNC(op_113b_0), 4411 }, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412 }, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416 }, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432 }, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440 }, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448 }, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456 }, /* MOVE */ +{ CPUFUNC(op_1170_0), 4464 }, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472 }, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473 }, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474 }, /* MOVE */ +{ CPUFUNC(op_117b_0), 4475 }, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476 }, /* MOVE */ +{ CPUFUNC(op_1180_0), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_0), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_0), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_0), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_0), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_0), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_0), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_0), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_0), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_0), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_0), 4540 }, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544 }, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560 }, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568 }, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576 }, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584 }, /* MOVE */ +{ CPUFUNC(op_11f0_0), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600 }, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601 }, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602 }, /* MOVE */ +{ CPUFUNC(op_11fb_0), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604 }, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056 }, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072 }, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080 }, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088 }, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096 }, /* MOVE */ +{ CPUFUNC(op_13f0_0), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112 }, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113 }, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114 }, /* MOVE */ +{ CPUFUNC(op_13fb_0), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116 }, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192 }, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200 }, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208 }, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216 }, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224 }, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232 }, /* MOVE */ +{ CPUFUNC(op_2030_0), 8240 }, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248 }, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249 }, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250 }, /* MOVE */ +{ CPUFUNC(op_203b_0), 8251 }, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252 }, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256 }, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264 }, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272 }, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280 }, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288 }, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296 }, /* MOVEA */ +{ CPUFUNC(op_2070_0), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312 }, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313 }, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314 }, /* MOVEA */ +{ CPUFUNC(op_207b_0), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316 }, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320 }, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328 }, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336 }, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344 }, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352 }, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360 }, /* MOVE */ +{ CPUFUNC(op_20b0_0), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376 }, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377 }, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378 }, /* MOVE */ +{ CPUFUNC(op_20bb_0), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380 }, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384 }, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392 }, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400 }, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408 }, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416 }, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424 }, /* MOVE */ +{ CPUFUNC(op_20f0_0), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440 }, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441 }, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442 }, /* MOVE */ +{ CPUFUNC(op_20fb_0), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444 }, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448 }, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456 }, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464 }, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472 }, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480 }, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488 }, /* MOVE */ +{ CPUFUNC(op_2130_0), 8496 }, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504 }, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505 }, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506 }, /* MOVE */ +{ CPUFUNC(op_213b_0), 8507 }, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508 }, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512 }, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520 }, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528 }, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536 }, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544 }, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552 }, /* MOVE */ +{ CPUFUNC(op_2170_0), 8560 }, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568 }, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569 }, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570 }, /* MOVE */ +{ CPUFUNC(op_217b_0), 8571 }, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572 }, /* MOVE */ +{ CPUFUNC(op_2180_0), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_0), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_0), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_0), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_0), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_0), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_0), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_0), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_0), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_0), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_0), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_0), 8636 }, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640 }, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648 }, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656 }, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664 }, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672 }, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680 }, /* MOVE */ +{ CPUFUNC(op_21f0_0), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696 }, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697 }, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698 }, /* MOVE */ +{ CPUFUNC(op_21fb_0), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700 }, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152 }, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160 }, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168 }, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176 }, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184 }, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192 }, /* MOVE */ +{ CPUFUNC(op_23f0_0), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208 }, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209 }, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210 }, /* MOVE */ +{ CPUFUNC(op_23fb_0), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212 }, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288 }, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296 }, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304 }, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312 }, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320 }, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328 }, /* MOVE */ +{ CPUFUNC(op_3030_0), 12336 }, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344 }, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345 }, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346 }, /* MOVE */ +{ CPUFUNC(op_303b_0), 12347 }, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348 }, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352 }, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360 }, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368 }, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376 }, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384 }, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392 }, /* MOVEA */ +{ CPUFUNC(op_3070_0), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408 }, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409 }, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410 }, /* MOVEA */ +{ CPUFUNC(op_307b_0), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412 }, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416 }, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424 }, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432 }, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440 }, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448 }, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456 }, /* MOVE */ +{ CPUFUNC(op_30b0_0), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472 }, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473 }, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474 }, /* MOVE */ +{ CPUFUNC(op_30bb_0), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476 }, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480 }, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488 }, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496 }, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504 }, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512 }, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520 }, /* MOVE */ +{ CPUFUNC(op_30f0_0), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536 }, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537 }, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538 }, /* MOVE */ +{ CPUFUNC(op_30fb_0), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540 }, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544 }, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552 }, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560 }, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568 }, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576 }, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584 }, /* MOVE */ +{ CPUFUNC(op_3130_0), 12592 }, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600 }, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601 }, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602 }, /* MOVE */ +{ CPUFUNC(op_313b_0), 12603 }, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604 }, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608 }, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616 }, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624 }, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632 }, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640 }, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648 }, /* MOVE */ +{ CPUFUNC(op_3170_0), 12656 }, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664 }, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665 }, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666 }, /* MOVE */ +{ CPUFUNC(op_317b_0), 12667 }, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668 }, /* MOVE */ +{ CPUFUNC(op_3180_0), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_0), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_0), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_0), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_0), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_0), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_0), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_0), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_0), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_0), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_0), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_0), 12732 }, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736 }, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744 }, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752 }, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760 }, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768 }, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776 }, /* MOVE */ +{ CPUFUNC(op_31f0_0), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792 }, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793 }, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794 }, /* MOVE */ +{ CPUFUNC(op_31fb_0), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796 }, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248 }, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256 }, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264 }, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272 }, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280 }, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288 }, /* MOVE */ +{ CPUFUNC(op_33f0_0), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304 }, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305 }, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306 }, /* MOVE */ +{ CPUFUNC(op_33fb_0), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308 }, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384 }, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400 }, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408 }, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416 }, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424 }, /* NEGX */ +{ CPUFUNC(op_4030_0), 16432 }, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440 }, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441 }, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448 }, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464 }, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472 }, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480 }, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488 }, /* NEGX */ +{ CPUFUNC(op_4070_0), 16496 }, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504 }, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505 }, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512 }, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528 }, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536 }, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544 }, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552 }, /* NEGX */ +{ CPUFUNC(op_40b0_0), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568 }, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569 }, /* NEGX */ +{ CPUFUNC(op_40c0_0), 16576 }, /* MVSR2 */ +{ CPUFUNC(op_40d0_0), 16592 }, /* MVSR2 */ +{ CPUFUNC(op_40d8_0), 16600 }, /* MVSR2 */ +{ CPUFUNC(op_40e0_0), 16608 }, /* MVSR2 */ +{ CPUFUNC(op_40e8_0), 16616 }, /* MVSR2 */ +{ CPUFUNC(op_40f0_0), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_0), 16632 }, /* MVSR2 */ +{ CPUFUNC(op_40f9_0), 16633 }, /* MVSR2 */ +{ CPUFUNC(op_4100_0), 16640 }, /* CHK */ +{ CPUFUNC(op_4110_0), 16656 }, /* CHK */ +{ CPUFUNC(op_4118_0), 16664 }, /* CHK */ +{ CPUFUNC(op_4120_0), 16672 }, /* CHK */ +{ CPUFUNC(op_4128_0), 16680 }, /* CHK */ +{ CPUFUNC(op_4130_0), 16688 }, /* CHK */ +{ CPUFUNC(op_4138_0), 16696 }, /* CHK */ +{ CPUFUNC(op_4139_0), 16697 }, /* CHK */ +{ CPUFUNC(op_413a_0), 16698 }, /* CHK */ +{ CPUFUNC(op_413b_0), 16699 }, /* CHK */ +{ CPUFUNC(op_413c_0), 16700 }, /* CHK */ +{ CPUFUNC(op_4180_0), 16768 }, /* CHK */ +{ CPUFUNC(op_4190_0), 16784 }, /* CHK */ +{ CPUFUNC(op_4198_0), 16792 }, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800 }, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808 }, /* CHK */ +{ CPUFUNC(op_41b0_0), 16816 }, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824 }, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825 }, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826 }, /* CHK */ +{ CPUFUNC(op_41bb_0), 16827 }, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828 }, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848 }, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872 }, /* LEA */ +{ CPUFUNC(op_41f0_0), 16880 }, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888 }, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889 }, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890 }, /* LEA */ +{ CPUFUNC(op_41fb_0), 16891 }, /* LEA */ +{ CPUFUNC(op_4200_0), 16896 }, /* CLR */ +{ CPUFUNC(op_4210_0), 16912 }, /* CLR */ +{ CPUFUNC(op_4218_0), 16920 }, /* CLR */ +{ CPUFUNC(op_4220_0), 16928 }, /* CLR */ +{ CPUFUNC(op_4228_0), 16936 }, /* CLR */ +{ CPUFUNC(op_4230_0), 16944 }, /* CLR */ +{ CPUFUNC(op_4238_0), 16952 }, /* CLR */ +{ CPUFUNC(op_4239_0), 16953 }, /* CLR */ +{ CPUFUNC(op_4240_0), 16960 }, /* CLR */ +{ CPUFUNC(op_4250_0), 16976 }, /* CLR */ +{ CPUFUNC(op_4258_0), 16984 }, /* CLR */ +{ CPUFUNC(op_4260_0), 16992 }, /* CLR */ +{ CPUFUNC(op_4268_0), 17000 }, /* CLR */ +{ CPUFUNC(op_4270_0), 17008 }, /* CLR */ +{ CPUFUNC(op_4278_0), 17016 }, /* CLR */ +{ CPUFUNC(op_4279_0), 17017 }, /* CLR */ +{ CPUFUNC(op_4280_0), 17024 }, /* CLR */ +{ CPUFUNC(op_4290_0), 17040 }, /* CLR */ +{ CPUFUNC(op_4298_0), 17048 }, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056 }, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064 }, /* CLR */ +{ CPUFUNC(op_42b0_0), 17072 }, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080 }, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42c0_0), 17088 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42d0_0), 17104 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42d8_0), 17112 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42e0_0), 17120 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42e8_0), 17128 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42f0_0), 17136 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42f8_0), 17144 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42f9_0), 17145 }, /* MVSR2 */ +#endif +{ CPUFUNC(op_4400_0), 17408 }, /* NEG */ +{ CPUFUNC(op_4410_0), 17424 }, /* NEG */ +{ CPUFUNC(op_4418_0), 17432 }, /* NEG */ +{ CPUFUNC(op_4420_0), 17440 }, /* NEG */ +{ CPUFUNC(op_4428_0), 17448 }, /* NEG */ +{ CPUFUNC(op_4430_0), 17456 }, /* NEG */ +{ CPUFUNC(op_4438_0), 17464 }, /* NEG */ +{ CPUFUNC(op_4439_0), 17465 }, /* NEG */ +{ CPUFUNC(op_4440_0), 17472 }, /* NEG */ +{ CPUFUNC(op_4450_0), 17488 }, /* NEG */ +{ CPUFUNC(op_4458_0), 17496 }, /* NEG */ +{ CPUFUNC(op_4460_0), 17504 }, /* NEG */ +{ CPUFUNC(op_4468_0), 17512 }, /* NEG */ +{ CPUFUNC(op_4470_0), 17520 }, /* NEG */ +{ CPUFUNC(op_4478_0), 17528 }, /* NEG */ +{ CPUFUNC(op_4479_0), 17529 }, /* NEG */ +{ CPUFUNC(op_4480_0), 17536 }, /* NEG */ +{ CPUFUNC(op_4490_0), 17552 }, /* NEG */ +{ CPUFUNC(op_4498_0), 17560 }, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568 }, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576 }, /* NEG */ +{ CPUFUNC(op_44b0_0), 17584 }, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592 }, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593 }, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600 }, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616 }, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624 }, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632 }, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640 }, /* MV2SR */ +{ CPUFUNC(op_44f0_0), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656 }, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657 }, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658 }, /* MV2SR */ +{ CPUFUNC(op_44fb_0), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660 }, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920 }, /* NOT */ +{ CPUFUNC(op_4610_0), 17936 }, /* NOT */ +{ CPUFUNC(op_4618_0), 17944 }, /* NOT */ +{ CPUFUNC(op_4620_0), 17952 }, /* NOT */ +{ CPUFUNC(op_4628_0), 17960 }, /* NOT */ +{ CPUFUNC(op_4630_0), 17968 }, /* NOT */ +{ CPUFUNC(op_4638_0), 17976 }, /* NOT */ +{ CPUFUNC(op_4639_0), 17977 }, /* NOT */ +{ CPUFUNC(op_4640_0), 17984 }, /* NOT */ +{ CPUFUNC(op_4650_0), 18000 }, /* NOT */ +{ CPUFUNC(op_4658_0), 18008 }, /* NOT */ +{ CPUFUNC(op_4660_0), 18016 }, /* NOT */ +{ CPUFUNC(op_4668_0), 18024 }, /* NOT */ +{ CPUFUNC(op_4670_0), 18032 }, /* NOT */ +{ CPUFUNC(op_4678_0), 18040 }, /* NOT */ +{ CPUFUNC(op_4679_0), 18041 }, /* NOT */ +{ CPUFUNC(op_4680_0), 18048 }, /* NOT */ +{ CPUFUNC(op_4690_0), 18064 }, /* NOT */ +{ CPUFUNC(op_4698_0), 18072 }, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080 }, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088 }, /* NOT */ +{ CPUFUNC(op_46b0_0), 18096 }, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104 }, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105 }, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112 }, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128 }, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136 }, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144 }, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152 }, /* MV2SR */ +{ CPUFUNC(op_46f0_0), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168 }, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169 }, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170 }, /* MV2SR */ +{ CPUFUNC(op_46fb_0), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172 }, /* MV2SR */ +{ CPUFUNC(op_4800_0), 18432 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4808_0), 18440 }, /* LINK */ +#endif +{ CPUFUNC(op_4810_0), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_0), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_0), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_0), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_0), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_0), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_0), 18489 }, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4848_0), 18504 }, /* BKPT */ +#endif +{ CPUFUNC(op_4850_0), 18512 }, /* PEA */ +{ CPUFUNC(op_4868_0), 18536 }, /* PEA */ +{ CPUFUNC(op_4870_0), 18544 }, /* PEA */ +{ CPUFUNC(op_4878_0), 18552 }, /* PEA */ +{ CPUFUNC(op_4879_0), 18553 }, /* PEA */ +{ CPUFUNC(op_487a_0), 18554 }, /* PEA */ +{ CPUFUNC(op_487b_0), 18555 }, /* PEA */ +{ CPUFUNC(op_4880_0), 18560 }, /* EXT */ +{ CPUFUNC(op_4890_0), 18576 }, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592 }, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600 }, /* MVMLE */ +{ CPUFUNC(op_48b0_0), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616 }, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617 }, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624 }, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640 }, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656 }, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664 }, /* MVMLE */ +{ CPUFUNC(op_48f0_0), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680 }, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681 }, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880 }, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944 }, /* TST */ +{ CPUFUNC(op_4a10_0), 18960 }, /* TST */ +{ CPUFUNC(op_4a18_0), 18968 }, /* TST */ +{ CPUFUNC(op_4a20_0), 18976 }, /* TST */ +{ CPUFUNC(op_4a28_0), 18984 }, /* TST */ +{ CPUFUNC(op_4a30_0), 18992 }, /* TST */ +{ CPUFUNC(op_4a38_0), 19000 }, /* TST */ +{ CPUFUNC(op_4a39_0), 19001 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a3a_0), 19002 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a3b_0), 19003 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a3c_0), 19004 }, /* TST */ +#endif +{ CPUFUNC(op_4a40_0), 19008 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a48_0), 19016 }, /* TST */ +#endif +{ CPUFUNC(op_4a50_0), 19024 }, /* TST */ +{ CPUFUNC(op_4a58_0), 19032 }, /* TST */ +{ CPUFUNC(op_4a60_0), 19040 }, /* TST */ +{ CPUFUNC(op_4a68_0), 19048 }, /* TST */ +{ CPUFUNC(op_4a70_0), 19056 }, /* TST */ +{ CPUFUNC(op_4a78_0), 19064 }, /* TST */ +{ CPUFUNC(op_4a79_0), 19065 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a7a_0), 19066 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a7b_0), 19067 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a7c_0), 19068 }, /* TST */ +#endif +{ CPUFUNC(op_4a80_0), 19072 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4a88_0), 19080 }, /* TST */ +#endif +{ CPUFUNC(op_4a90_0), 19088 }, /* TST */ +{ CPUFUNC(op_4a98_0), 19096 }, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104 }, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112 }, /* TST */ +{ CPUFUNC(op_4ab0_0), 19120 }, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128 }, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4aba_0), 19130 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4abb_0), 19131 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4abc_0), 19132 }, /* TST */ +#endif +{ CPUFUNC(op_4ac0_0), 19136 }, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152 }, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160 }, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168 }, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176 }, /* TAS */ +{ CPUFUNC(op_4af0_0), 19184 }, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192 }, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c00_0), 19456 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c10_0), 19472 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c18_0), 19480 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c20_0), 19488 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c28_0), 19496 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c30_0), 19504 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c38_0), 19512 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c39_0), 19513 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c3a_0), 19514 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c3b_0), 19515 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c3c_0), 19516 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c40_0), 19520 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c50_0), 19536 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c58_0), 19544 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c60_0), 19552 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c68_0), 19560 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c70_0), 19568 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c78_0), 19576 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c79_0), 19577 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c7a_0), 19578 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c7b_0), 19579 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4c7c_0), 19580 }, /* DIVL */ +#endif +{ CPUFUNC(op_4c90_0), 19600 }, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608 }, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_0), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640 }, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641 }, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_0), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664 }, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672 }, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_0), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704 }, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705 }, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_0), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032 }, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048 }, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056 }, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064 }, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072 }, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080 }, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081 }, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082 }, /* STOP */ +{ CPUFUNC(op_4e73_0), 20083 }, /* RTE */ +{ CPUFUNC(op_4e74_0), 20084 }, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085 }, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086 }, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4e7a_0), 20090 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_4e7b_0), 20091 }, /* MOVE2C */ +#endif +{ CPUFUNC(op_4e90_0), 20112 }, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136 }, /* JSR */ +{ CPUFUNC(op_4eb0_0), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152 }, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153 }, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154 }, /* JSR */ +{ CPUFUNC(op_4ebb_0), 20155 }, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176 }, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200 }, /* JMP */ +{ CPUFUNC(op_4ef0_0), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216 }, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217 }, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218 }, /* JMP */ +{ CPUFUNC(op_4efb_0), 20219 }, /* JMP */ +{ CPUFUNC(op_5000_0), 20480 }, /* ADD */ +{ CPUFUNC(op_5010_0), 20496 }, /* ADD */ +{ CPUFUNC(op_5018_0), 20504 }, /* ADD */ +{ CPUFUNC(op_5020_0), 20512 }, /* ADD */ +{ CPUFUNC(op_5028_0), 20520 }, /* ADD */ +{ CPUFUNC(op_5030_0), 20528 }, /* ADD */ +{ CPUFUNC(op_5038_0), 20536 }, /* ADD */ +{ CPUFUNC(op_5039_0), 20537 }, /* ADD */ +{ CPUFUNC(op_5040_0), 20544 }, /* ADD */ +{ CPUFUNC(op_5048_0), 20552 }, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560 }, /* ADD */ +{ CPUFUNC(op_5058_0), 20568 }, /* ADD */ +{ CPUFUNC(op_5060_0), 20576 }, /* ADD */ +{ CPUFUNC(op_5068_0), 20584 }, /* ADD */ +{ CPUFUNC(op_5070_0), 20592 }, /* ADD */ +{ CPUFUNC(op_5078_0), 20600 }, /* ADD */ +{ CPUFUNC(op_5079_0), 20601 }, /* ADD */ +{ CPUFUNC(op_5080_0), 20608 }, /* ADD */ +{ CPUFUNC(op_5088_0), 20616 }, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624 }, /* ADD */ +{ CPUFUNC(op_5098_0), 20632 }, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640 }, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648 }, /* ADD */ +{ CPUFUNC(op_50b0_0), 20656 }, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664 }, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665 }, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672 }, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680 }, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688 }, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696 }, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704 }, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712 }, /* Scc */ +{ CPUFUNC(op_50f0_0), 20720 }, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728 }, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_50fa_0), 20730 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_50fb_0), 20731 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_50fc_0), 20732 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5100_0), 20736 }, /* SUB */ +{ CPUFUNC(op_5110_0), 20752 }, /* SUB */ +{ CPUFUNC(op_5118_0), 20760 }, /* SUB */ +{ CPUFUNC(op_5120_0), 20768 }, /* SUB */ +{ CPUFUNC(op_5128_0), 20776 }, /* SUB */ +{ CPUFUNC(op_5130_0), 20784 }, /* SUB */ +{ CPUFUNC(op_5138_0), 20792 }, /* SUB */ +{ CPUFUNC(op_5139_0), 20793 }, /* SUB */ +{ CPUFUNC(op_5140_0), 20800 }, /* SUB */ +{ CPUFUNC(op_5148_0), 20808 }, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816 }, /* SUB */ +{ CPUFUNC(op_5158_0), 20824 }, /* SUB */ +{ CPUFUNC(op_5160_0), 20832 }, /* SUB */ +{ CPUFUNC(op_5168_0), 20840 }, /* SUB */ +{ CPUFUNC(op_5170_0), 20848 }, /* SUB */ +{ CPUFUNC(op_5178_0), 20856 }, /* SUB */ +{ CPUFUNC(op_5179_0), 20857 }, /* SUB */ +{ CPUFUNC(op_5180_0), 20864 }, /* SUB */ +{ CPUFUNC(op_5188_0), 20872 }, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880 }, /* SUB */ +{ CPUFUNC(op_5198_0), 20888 }, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896 }, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904 }, /* SUB */ +{ CPUFUNC(op_51b0_0), 20912 }, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920 }, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921 }, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928 }, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936 }, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944 }, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952 }, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960 }, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968 }, /* Scc */ +{ CPUFUNC(op_51f0_0), 20976 }, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984 }, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_51fa_0), 20986 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_51fb_0), 20987 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_51fc_0), 20988 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_52c0_0), 21184 }, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192 }, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200 }, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208 }, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216 }, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224 }, /* Scc */ +{ CPUFUNC(op_52f0_0), 21232 }, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240 }, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_52fa_0), 21242 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_52fb_0), 21243 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_52fc_0), 21244 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_53c0_0), 21440 }, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448 }, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456 }, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464 }, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472 }, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480 }, /* Scc */ +{ CPUFUNC(op_53f0_0), 21488 }, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496 }, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_53fa_0), 21498 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_53fb_0), 21499 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_53fc_0), 21500 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_54c0_0), 21696 }, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704 }, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712 }, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720 }, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728 }, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736 }, /* Scc */ +{ CPUFUNC(op_54f0_0), 21744 }, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752 }, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_54fa_0), 21754 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_54fb_0), 21755 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_54fc_0), 21756 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_55c0_0), 21952 }, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960 }, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968 }, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976 }, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984 }, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992 }, /* Scc */ +{ CPUFUNC(op_55f0_0), 22000 }, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008 }, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_55fa_0), 22010 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_55fb_0), 22011 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_55fc_0), 22012 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_56c0_0), 22208 }, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216 }, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224 }, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232 }, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240 }, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248 }, /* Scc */ +{ CPUFUNC(op_56f0_0), 22256 }, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264 }, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_56fa_0), 22266 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_56fb_0), 22267 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_56fc_0), 22268 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_57c0_0), 22464 }, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472 }, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480 }, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488 }, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496 }, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504 }, /* Scc */ +{ CPUFUNC(op_57f0_0), 22512 }, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520 }, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_57fa_0), 22522 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_57fb_0), 22523 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_57fc_0), 22524 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_58c0_0), 22720 }, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728 }, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736 }, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744 }, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752 }, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760 }, /* Scc */ +{ CPUFUNC(op_58f0_0), 22768 }, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776 }, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_58fa_0), 22778 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_58fb_0), 22779 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_58fc_0), 22780 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_59c0_0), 22976 }, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984 }, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992 }, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000 }, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008 }, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016 }, /* Scc */ +{ CPUFUNC(op_59f0_0), 23024 }, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032 }, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_59fa_0), 23034 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_59fb_0), 23035 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_59fc_0), 23036 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5ac0_0), 23232 }, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240 }, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248 }, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256 }, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264 }, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272 }, /* Scc */ +{ CPUFUNC(op_5af0_0), 23280 }, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288 }, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5afa_0), 23290 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5afb_0), 23291 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5afc_0), 23292 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5bc0_0), 23488 }, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496 }, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504 }, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512 }, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520 }, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528 }, /* Scc */ +{ CPUFUNC(op_5bf0_0), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544 }, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5bfa_0), 23546 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5bfb_0), 23547 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5bfc_0), 23548 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5cc0_0), 23744 }, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752 }, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760 }, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768 }, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776 }, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784 }, /* Scc */ +{ CPUFUNC(op_5cf0_0), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800 }, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5cfa_0), 23802 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5cfb_0), 23803 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5cfc_0), 23804 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5dc0_0), 24000 }, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008 }, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016 }, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024 }, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032 }, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040 }, /* Scc */ +{ CPUFUNC(op_5df0_0), 24048 }, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056 }, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5dfa_0), 24058 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5dfb_0), 24059 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5dfc_0), 24060 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5ec0_0), 24256 }, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264 }, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272 }, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280 }, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288 }, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296 }, /* Scc */ +{ CPUFUNC(op_5ef0_0), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312 }, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5efa_0), 24314 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5efb_0), 24315 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5efc_0), 24316 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_5fc0_0), 24512 }, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520 }, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528 }, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536 }, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544 }, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552 }, /* Scc */ +{ CPUFUNC(op_5ff0_0), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568 }, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5ffa_0), 24570 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5ffb_0), 24571 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_5ffc_0), 24572 }, /* TRAPcc */ +#endif +{ CPUFUNC(op_6000_0), 24576 }, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577 }, /* Bcc */ +{ CPUFUNC(op_60ff_0), 24831 }, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832 }, /* BSR */ +{ CPUFUNC(op_6101_0), 24833 }, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087 }, /* BSR */ +{ CPUFUNC(op_6200_0), 25088 }, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089 }, /* Bcc */ +{ CPUFUNC(op_62ff_0), 25343 }, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344 }, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345 }, /* Bcc */ +{ CPUFUNC(op_63ff_0), 25599 }, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600 }, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601 }, /* Bcc */ +{ CPUFUNC(op_64ff_0), 25855 }, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856 }, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857 }, /* Bcc */ +{ CPUFUNC(op_65ff_0), 26111 }, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112 }, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113 }, /* Bcc */ +{ CPUFUNC(op_66ff_0), 26367 }, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368 }, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369 }, /* Bcc */ +{ CPUFUNC(op_67ff_0), 26623 }, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624 }, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625 }, /* Bcc */ +{ CPUFUNC(op_68ff_0), 26879 }, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880 }, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881 }, /* Bcc */ +{ CPUFUNC(op_69ff_0), 27135 }, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136 }, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137 }, /* Bcc */ +{ CPUFUNC(op_6aff_0), 27391 }, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392 }, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393 }, /* Bcc */ +{ CPUFUNC(op_6bff_0), 27647 }, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648 }, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649 }, /* Bcc */ +{ CPUFUNC(op_6cff_0), 27903 }, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904 }, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905 }, /* Bcc */ +{ CPUFUNC(op_6dff_0), 28159 }, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160 }, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161 }, /* Bcc */ +{ CPUFUNC(op_6eff_0), 28415 }, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416 }, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417 }, /* Bcc */ +{ CPUFUNC(op_6fff_0), 28671 }, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672 }, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768 }, /* OR */ +{ CPUFUNC(op_8010_0), 32784 }, /* OR */ +{ CPUFUNC(op_8018_0), 32792 }, /* OR */ +{ CPUFUNC(op_8020_0), 32800 }, /* OR */ +{ CPUFUNC(op_8028_0), 32808 }, /* OR */ +{ CPUFUNC(op_8030_0), 32816 }, /* OR */ +{ CPUFUNC(op_8038_0), 32824 }, /* OR */ +{ CPUFUNC(op_8039_0), 32825 }, /* OR */ +{ CPUFUNC(op_803a_0), 32826 }, /* OR */ +{ CPUFUNC(op_803b_0), 32827 }, /* OR */ +{ CPUFUNC(op_803c_0), 32828 }, /* OR */ +{ CPUFUNC(op_8040_0), 32832 }, /* OR */ +{ CPUFUNC(op_8050_0), 32848 }, /* OR */ +{ CPUFUNC(op_8058_0), 32856 }, /* OR */ +{ CPUFUNC(op_8060_0), 32864 }, /* OR */ +{ CPUFUNC(op_8068_0), 32872 }, /* OR */ +{ CPUFUNC(op_8070_0), 32880 }, /* OR */ +{ CPUFUNC(op_8078_0), 32888 }, /* OR */ +{ CPUFUNC(op_8079_0), 32889 }, /* OR */ +{ CPUFUNC(op_807a_0), 32890 }, /* OR */ +{ CPUFUNC(op_807b_0), 32891 }, /* OR */ +{ CPUFUNC(op_807c_0), 32892 }, /* OR */ +{ CPUFUNC(op_8080_0), 32896 }, /* OR */ +{ CPUFUNC(op_8090_0), 32912 }, /* OR */ +{ CPUFUNC(op_8098_0), 32920 }, /* OR */ +{ CPUFUNC(op_80a0_0), 32928 }, /* OR */ +{ CPUFUNC(op_80a8_0), 32936 }, /* OR */ +{ CPUFUNC(op_80b0_0), 32944 }, /* OR */ +{ CPUFUNC(op_80b8_0), 32952 }, /* OR */ +{ CPUFUNC(op_80b9_0), 32953 }, /* OR */ +{ CPUFUNC(op_80ba_0), 32954 }, /* OR */ +{ CPUFUNC(op_80bb_0), 32955 }, /* OR */ +{ CPUFUNC(op_80bc_0), 32956 }, /* OR */ +{ CPUFUNC(op_80c0_0), 32960 }, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976 }, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984 }, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992 }, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000 }, /* DIVU */ +{ CPUFUNC(op_80f0_0), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016 }, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017 }, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018 }, /* DIVU */ +{ CPUFUNC(op_80fb_0), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020 }, /* DIVU */ +{ CPUFUNC(op_8100_0), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_0), 33032 }, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040 }, /* OR */ +{ CPUFUNC(op_8118_0), 33048 }, /* OR */ +{ CPUFUNC(op_8120_0), 33056 }, /* OR */ +{ CPUFUNC(op_8128_0), 33064 }, /* OR */ +{ CPUFUNC(op_8130_0), 33072 }, /* OR */ +{ CPUFUNC(op_8138_0), 33080 }, /* OR */ +{ CPUFUNC(op_8139_0), 33081 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_8140_0), 33088 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_8148_0), 33096 }, /* PACK */ +#endif +{ CPUFUNC(op_8150_0), 33104 }, /* OR */ +{ CPUFUNC(op_8158_0), 33112 }, /* OR */ +{ CPUFUNC(op_8160_0), 33120 }, /* OR */ +{ CPUFUNC(op_8168_0), 33128 }, /* OR */ +{ CPUFUNC(op_8170_0), 33136 }, /* OR */ +{ CPUFUNC(op_8178_0), 33144 }, /* OR */ +{ CPUFUNC(op_8179_0), 33145 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_8180_0), 33152 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_8188_0), 33160 }, /* UNPK */ +#endif +{ CPUFUNC(op_8190_0), 33168 }, /* OR */ +{ CPUFUNC(op_8198_0), 33176 }, /* OR */ +{ CPUFUNC(op_81a0_0), 33184 }, /* OR */ +{ CPUFUNC(op_81a8_0), 33192 }, /* OR */ +{ CPUFUNC(op_81b0_0), 33200 }, /* OR */ +{ CPUFUNC(op_81b8_0), 33208 }, /* OR */ +{ CPUFUNC(op_81b9_0), 33209 }, /* OR */ +{ CPUFUNC(op_81c0_0), 33216 }, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232 }, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240 }, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248 }, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256 }, /* DIVS */ +{ CPUFUNC(op_81f0_0), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272 }, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273 }, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274 }, /* DIVS */ +{ CPUFUNC(op_81fb_0), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276 }, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864 }, /* SUB */ +{ CPUFUNC(op_9010_0), 36880 }, /* SUB */ +{ CPUFUNC(op_9018_0), 36888 }, /* SUB */ +{ CPUFUNC(op_9020_0), 36896 }, /* SUB */ +{ CPUFUNC(op_9028_0), 36904 }, /* SUB */ +{ CPUFUNC(op_9030_0), 36912 }, /* SUB */ +{ CPUFUNC(op_9038_0), 36920 }, /* SUB */ +{ CPUFUNC(op_9039_0), 36921 }, /* SUB */ +{ CPUFUNC(op_903a_0), 36922 }, /* SUB */ +{ CPUFUNC(op_903b_0), 36923 }, /* SUB */ +{ CPUFUNC(op_903c_0), 36924 }, /* SUB */ +{ CPUFUNC(op_9040_0), 36928 }, /* SUB */ +{ CPUFUNC(op_9048_0), 36936 }, /* SUB */ +{ CPUFUNC(op_9050_0), 36944 }, /* SUB */ +{ CPUFUNC(op_9058_0), 36952 }, /* SUB */ +{ CPUFUNC(op_9060_0), 36960 }, /* SUB */ +{ CPUFUNC(op_9068_0), 36968 }, /* SUB */ +{ CPUFUNC(op_9070_0), 36976 }, /* SUB */ +{ CPUFUNC(op_9078_0), 36984 }, /* SUB */ +{ CPUFUNC(op_9079_0), 36985 }, /* SUB */ +{ CPUFUNC(op_907a_0), 36986 }, /* SUB */ +{ CPUFUNC(op_907b_0), 36987 }, /* SUB */ +{ CPUFUNC(op_907c_0), 36988 }, /* SUB */ +{ CPUFUNC(op_9080_0), 36992 }, /* SUB */ +{ CPUFUNC(op_9088_0), 37000 }, /* SUB */ +{ CPUFUNC(op_9090_0), 37008 }, /* SUB */ +{ CPUFUNC(op_9098_0), 37016 }, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024 }, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032 }, /* SUB */ +{ CPUFUNC(op_90b0_0), 37040 }, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048 }, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049 }, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050 }, /* SUB */ +{ CPUFUNC(op_90bb_0), 37051 }, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052 }, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056 }, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064 }, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072 }, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080 }, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088 }, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096 }, /* SUBA */ +{ CPUFUNC(op_90f0_0), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112 }, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113 }, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114 }, /* SUBA */ +{ CPUFUNC(op_90fb_0), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116 }, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120 }, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128 }, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136 }, /* SUB */ +{ CPUFUNC(op_9118_0), 37144 }, /* SUB */ +{ CPUFUNC(op_9120_0), 37152 }, /* SUB */ +{ CPUFUNC(op_9128_0), 37160 }, /* SUB */ +{ CPUFUNC(op_9130_0), 37168 }, /* SUB */ +{ CPUFUNC(op_9138_0), 37176 }, /* SUB */ +{ CPUFUNC(op_9139_0), 37177 }, /* SUB */ +{ CPUFUNC(op_9140_0), 37184 }, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192 }, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200 }, /* SUB */ +{ CPUFUNC(op_9158_0), 37208 }, /* SUB */ +{ CPUFUNC(op_9160_0), 37216 }, /* SUB */ +{ CPUFUNC(op_9168_0), 37224 }, /* SUB */ +{ CPUFUNC(op_9170_0), 37232 }, /* SUB */ +{ CPUFUNC(op_9178_0), 37240 }, /* SUB */ +{ CPUFUNC(op_9179_0), 37241 }, /* SUB */ +{ CPUFUNC(op_9180_0), 37248 }, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256 }, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264 }, /* SUB */ +{ CPUFUNC(op_9198_0), 37272 }, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280 }, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288 }, /* SUB */ +{ CPUFUNC(op_91b0_0), 37296 }, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304 }, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305 }, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312 }, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320 }, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328 }, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336 }, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344 }, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352 }, /* SUBA */ +{ CPUFUNC(op_91f0_0), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368 }, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369 }, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370 }, /* SUBA */ +{ CPUFUNC(op_91fb_0), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372 }, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056 }, /* CMP */ +{ CPUFUNC(op_b010_0), 45072 }, /* CMP */ +{ CPUFUNC(op_b018_0), 45080 }, /* CMP */ +{ CPUFUNC(op_b020_0), 45088 }, /* CMP */ +{ CPUFUNC(op_b028_0), 45096 }, /* CMP */ +{ CPUFUNC(op_b030_0), 45104 }, /* CMP */ +{ CPUFUNC(op_b038_0), 45112 }, /* CMP */ +{ CPUFUNC(op_b039_0), 45113 }, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114 }, /* CMP */ +{ CPUFUNC(op_b03b_0), 45115 }, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116 }, /* CMP */ +{ CPUFUNC(op_b040_0), 45120 }, /* CMP */ +{ CPUFUNC(op_b048_0), 45128 }, /* CMP */ +{ CPUFUNC(op_b050_0), 45136 }, /* CMP */ +{ CPUFUNC(op_b058_0), 45144 }, /* CMP */ +{ CPUFUNC(op_b060_0), 45152 }, /* CMP */ +{ CPUFUNC(op_b068_0), 45160 }, /* CMP */ +{ CPUFUNC(op_b070_0), 45168 }, /* CMP */ +{ CPUFUNC(op_b078_0), 45176 }, /* CMP */ +{ CPUFUNC(op_b079_0), 45177 }, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178 }, /* CMP */ +{ CPUFUNC(op_b07b_0), 45179 }, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180 }, /* CMP */ +{ CPUFUNC(op_b080_0), 45184 }, /* CMP */ +{ CPUFUNC(op_b088_0), 45192 }, /* CMP */ +{ CPUFUNC(op_b090_0), 45200 }, /* CMP */ +{ CPUFUNC(op_b098_0), 45208 }, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216 }, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224 }, /* CMP */ +{ CPUFUNC(op_b0b0_0), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240 }, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241 }, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242 }, /* CMP */ +{ CPUFUNC(op_b0bb_0), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244 }, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248 }, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256 }, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264 }, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272 }, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280 }, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288 }, /* CMPA */ +{ CPUFUNC(op_b0f0_0), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304 }, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305 }, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306 }, /* CMPA */ +{ CPUFUNC(op_b0fb_0), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308 }, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312 }, /* EOR */ +{ CPUFUNC(op_b108_0), 45320 }, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328 }, /* EOR */ +{ CPUFUNC(op_b118_0), 45336 }, /* EOR */ +{ CPUFUNC(op_b120_0), 45344 }, /* EOR */ +{ CPUFUNC(op_b128_0), 45352 }, /* EOR */ +{ CPUFUNC(op_b130_0), 45360 }, /* EOR */ +{ CPUFUNC(op_b138_0), 45368 }, /* EOR */ +{ CPUFUNC(op_b139_0), 45369 }, /* EOR */ +{ CPUFUNC(op_b140_0), 45376 }, /* EOR */ +{ CPUFUNC(op_b148_0), 45384 }, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392 }, /* EOR */ +{ CPUFUNC(op_b158_0), 45400 }, /* EOR */ +{ CPUFUNC(op_b160_0), 45408 }, /* EOR */ +{ CPUFUNC(op_b168_0), 45416 }, /* EOR */ +{ CPUFUNC(op_b170_0), 45424 }, /* EOR */ +{ CPUFUNC(op_b178_0), 45432 }, /* EOR */ +{ CPUFUNC(op_b179_0), 45433 }, /* EOR */ +{ CPUFUNC(op_b180_0), 45440 }, /* EOR */ +{ CPUFUNC(op_b188_0), 45448 }, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456 }, /* EOR */ +{ CPUFUNC(op_b198_0), 45464 }, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472 }, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480 }, /* EOR */ +{ CPUFUNC(op_b1b0_0), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496 }, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497 }, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504 }, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512 }, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520 }, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528 }, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536 }, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544 }, /* CMPA */ +{ CPUFUNC(op_b1f0_0), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560 }, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561 }, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562 }, /* CMPA */ +{ CPUFUNC(op_b1fb_0), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564 }, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152 }, /* AND */ +{ CPUFUNC(op_c010_0), 49168 }, /* AND */ +{ CPUFUNC(op_c018_0), 49176 }, /* AND */ +{ CPUFUNC(op_c020_0), 49184 }, /* AND */ +{ CPUFUNC(op_c028_0), 49192 }, /* AND */ +{ CPUFUNC(op_c030_0), 49200 }, /* AND */ +{ CPUFUNC(op_c038_0), 49208 }, /* AND */ +{ CPUFUNC(op_c039_0), 49209 }, /* AND */ +{ CPUFUNC(op_c03a_0), 49210 }, /* AND */ +{ CPUFUNC(op_c03b_0), 49211 }, /* AND */ +{ CPUFUNC(op_c03c_0), 49212 }, /* AND */ +{ CPUFUNC(op_c040_0), 49216 }, /* AND */ +{ CPUFUNC(op_c050_0), 49232 }, /* AND */ +{ CPUFUNC(op_c058_0), 49240 }, /* AND */ +{ CPUFUNC(op_c060_0), 49248 }, /* AND */ +{ CPUFUNC(op_c068_0), 49256 }, /* AND */ +{ CPUFUNC(op_c070_0), 49264 }, /* AND */ +{ CPUFUNC(op_c078_0), 49272 }, /* AND */ +{ CPUFUNC(op_c079_0), 49273 }, /* AND */ +{ CPUFUNC(op_c07a_0), 49274 }, /* AND */ +{ CPUFUNC(op_c07b_0), 49275 }, /* AND */ +{ CPUFUNC(op_c07c_0), 49276 }, /* AND */ +{ CPUFUNC(op_c080_0), 49280 }, /* AND */ +{ CPUFUNC(op_c090_0), 49296 }, /* AND */ +{ CPUFUNC(op_c098_0), 49304 }, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312 }, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320 }, /* AND */ +{ CPUFUNC(op_c0b0_0), 49328 }, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336 }, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337 }, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338 }, /* AND */ +{ CPUFUNC(op_c0bb_0), 49339 }, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340 }, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344 }, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360 }, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368 }, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376 }, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384 }, /* MULU */ +{ CPUFUNC(op_c0f0_0), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400 }, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401 }, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402 }, /* MULU */ +{ CPUFUNC(op_c0fb_0), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404 }, /* MULU */ +{ CPUFUNC(op_c100_0), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_0), 49416 }, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424 }, /* AND */ +{ CPUFUNC(op_c118_0), 49432 }, /* AND */ +{ CPUFUNC(op_c120_0), 49440 }, /* AND */ +{ CPUFUNC(op_c128_0), 49448 }, /* AND */ +{ CPUFUNC(op_c130_0), 49456 }, /* AND */ +{ CPUFUNC(op_c138_0), 49464 }, /* AND */ +{ CPUFUNC(op_c139_0), 49465 }, /* AND */ +{ CPUFUNC(op_c140_0), 49472 }, /* EXG */ +{ CPUFUNC(op_c148_0), 49480 }, /* EXG */ +{ CPUFUNC(op_c150_0), 49488 }, /* AND */ +{ CPUFUNC(op_c158_0), 49496 }, /* AND */ +{ CPUFUNC(op_c160_0), 49504 }, /* AND */ +{ CPUFUNC(op_c168_0), 49512 }, /* AND */ +{ CPUFUNC(op_c170_0), 49520 }, /* AND */ +{ CPUFUNC(op_c178_0), 49528 }, /* AND */ +{ CPUFUNC(op_c179_0), 49529 }, /* AND */ +{ CPUFUNC(op_c188_0), 49544 }, /* EXG */ +{ CPUFUNC(op_c190_0), 49552 }, /* AND */ +{ CPUFUNC(op_c198_0), 49560 }, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568 }, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576 }, /* AND */ +{ CPUFUNC(op_c1b0_0), 49584 }, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592 }, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593 }, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600 }, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616 }, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624 }, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632 }, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640 }, /* MULS */ +{ CPUFUNC(op_c1f0_0), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656 }, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657 }, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658 }, /* MULS */ +{ CPUFUNC(op_c1fb_0), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660 }, /* MULS */ +{ CPUFUNC(op_d000_0), 53248 }, /* ADD */ +{ CPUFUNC(op_d010_0), 53264 }, /* ADD */ +{ CPUFUNC(op_d018_0), 53272 }, /* ADD */ +{ CPUFUNC(op_d020_0), 53280 }, /* ADD */ +{ CPUFUNC(op_d028_0), 53288 }, /* ADD */ +{ CPUFUNC(op_d030_0), 53296 }, /* ADD */ +{ CPUFUNC(op_d038_0), 53304 }, /* ADD */ +{ CPUFUNC(op_d039_0), 53305 }, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306 }, /* ADD */ +{ CPUFUNC(op_d03b_0), 53307 }, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308 }, /* ADD */ +{ CPUFUNC(op_d040_0), 53312 }, /* ADD */ +{ CPUFUNC(op_d048_0), 53320 }, /* ADD */ +{ CPUFUNC(op_d050_0), 53328 }, /* ADD */ +{ CPUFUNC(op_d058_0), 53336 }, /* ADD */ +{ CPUFUNC(op_d060_0), 53344 }, /* ADD */ +{ CPUFUNC(op_d068_0), 53352 }, /* ADD */ +{ CPUFUNC(op_d070_0), 53360 }, /* ADD */ +{ CPUFUNC(op_d078_0), 53368 }, /* ADD */ +{ CPUFUNC(op_d079_0), 53369 }, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370 }, /* ADD */ +{ CPUFUNC(op_d07b_0), 53371 }, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372 }, /* ADD */ +{ CPUFUNC(op_d080_0), 53376 }, /* ADD */ +{ CPUFUNC(op_d088_0), 53384 }, /* ADD */ +{ CPUFUNC(op_d090_0), 53392 }, /* ADD */ +{ CPUFUNC(op_d098_0), 53400 }, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408 }, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416 }, /* ADD */ +{ CPUFUNC(op_d0b0_0), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432 }, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433 }, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434 }, /* ADD */ +{ CPUFUNC(op_d0bb_0), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436 }, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440 }, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448 }, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456 }, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464 }, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472 }, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480 }, /* ADDA */ +{ CPUFUNC(op_d0f0_0), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496 }, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497 }, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498 }, /* ADDA */ +{ CPUFUNC(op_d0fb_0), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500 }, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504 }, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512 }, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520 }, /* ADD */ +{ CPUFUNC(op_d118_0), 53528 }, /* ADD */ +{ CPUFUNC(op_d120_0), 53536 }, /* ADD */ +{ CPUFUNC(op_d128_0), 53544 }, /* ADD */ +{ CPUFUNC(op_d130_0), 53552 }, /* ADD */ +{ CPUFUNC(op_d138_0), 53560 }, /* ADD */ +{ CPUFUNC(op_d139_0), 53561 }, /* ADD */ +{ CPUFUNC(op_d140_0), 53568 }, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576 }, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584 }, /* ADD */ +{ CPUFUNC(op_d158_0), 53592 }, /* ADD */ +{ CPUFUNC(op_d160_0), 53600 }, /* ADD */ +{ CPUFUNC(op_d168_0), 53608 }, /* ADD */ +{ CPUFUNC(op_d170_0), 53616 }, /* ADD */ +{ CPUFUNC(op_d178_0), 53624 }, /* ADD */ +{ CPUFUNC(op_d179_0), 53625 }, /* ADD */ +{ CPUFUNC(op_d180_0), 53632 }, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640 }, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648 }, /* ADD */ +{ CPUFUNC(op_d198_0), 53656 }, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664 }, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672 }, /* ADD */ +{ CPUFUNC(op_d1b0_0), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688 }, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689 }, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696 }, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704 }, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712 }, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720 }, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728 }, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736 }, /* ADDA */ +{ CPUFUNC(op_d1f0_0), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752 }, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753 }, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754 }, /* ADDA */ +{ CPUFUNC(op_d1fb_0), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756 }, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344 }, /* ASR */ +{ CPUFUNC(op_e008_0), 57352 }, /* LSR */ +{ CPUFUNC(op_e010_0), 57360 }, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368 }, /* ROR */ +{ CPUFUNC(op_e020_0), 57376 }, /* ASR */ +{ CPUFUNC(op_e028_0), 57384 }, /* LSR */ +{ CPUFUNC(op_e030_0), 57392 }, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400 }, /* ROR */ +{ CPUFUNC(op_e040_0), 57408 }, /* ASR */ +{ CPUFUNC(op_e048_0), 57416 }, /* LSR */ +{ CPUFUNC(op_e050_0), 57424 }, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432 }, /* ROR */ +{ CPUFUNC(op_e060_0), 57440 }, /* ASR */ +{ CPUFUNC(op_e068_0), 57448 }, /* LSR */ +{ CPUFUNC(op_e070_0), 57456 }, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464 }, /* ROR */ +{ CPUFUNC(op_e080_0), 57472 }, /* ASR */ +{ CPUFUNC(op_e088_0), 57480 }, /* LSR */ +{ CPUFUNC(op_e090_0), 57488 }, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496 }, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504 }, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512 }, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520 }, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528 }, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552 }, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560 }, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568 }, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576 }, /* ASRW */ +{ CPUFUNC(op_e0f0_0), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592 }, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593 }, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600 }, /* ASL */ +{ CPUFUNC(op_e108_0), 57608 }, /* LSL */ +{ CPUFUNC(op_e110_0), 57616 }, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624 }, /* ROL */ +{ CPUFUNC(op_e120_0), 57632 }, /* ASL */ +{ CPUFUNC(op_e128_0), 57640 }, /* LSL */ +{ CPUFUNC(op_e130_0), 57648 }, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656 }, /* ROL */ +{ CPUFUNC(op_e140_0), 57664 }, /* ASL */ +{ CPUFUNC(op_e148_0), 57672 }, /* LSL */ +{ CPUFUNC(op_e150_0), 57680 }, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688 }, /* ROL */ +{ CPUFUNC(op_e160_0), 57696 }, /* ASL */ +{ CPUFUNC(op_e168_0), 57704 }, /* LSL */ +{ CPUFUNC(op_e170_0), 57712 }, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720 }, /* ROL */ +{ CPUFUNC(op_e180_0), 57728 }, /* ASL */ +{ CPUFUNC(op_e188_0), 57736 }, /* LSL */ +{ CPUFUNC(op_e190_0), 57744 }, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752 }, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760 }, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768 }, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776 }, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784 }, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808 }, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816 }, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824 }, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832 }, /* ASLW */ +{ CPUFUNC(op_e1f0_0), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848 }, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849 }, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064 }, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072 }, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080 }, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088 }, /* LSRW */ +{ CPUFUNC(op_e2f0_0), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104 }, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105 }, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320 }, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328 }, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336 }, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344 }, /* LSLW */ +{ CPUFUNC(op_e3f0_0), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360 }, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361 }, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576 }, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584 }, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592 }, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_0), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616 }, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617 }, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832 }, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840 }, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848 }, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_0), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872 }, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873 }, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088 }, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096 }, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104 }, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112 }, /* RORW */ +{ CPUFUNC(op_e6f0_0), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128 }, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129 }, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344 }, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352 }, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360 }, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368 }, /* ROLW */ +{ CPUFUNC(op_e7f0_0), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384 }, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8c0_0), 59584 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8d0_0), 59600 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8e8_0), 59624 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8f0_0), 59632 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8f8_0), 59640 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8f9_0), 59641 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8fa_0), 59642 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e8fb_0), 59643 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9c0_0), 59840 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9d0_0), 59856 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9e8_0), 59880 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9f0_0), 59888 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9f8_0), 59896 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9f9_0), 59897 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9fa_0), 59898 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_e9fb_0), 59899 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eac0_0), 60096 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ead0_0), 60112 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eae8_0), 60136 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eaf0_0), 60144 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eaf8_0), 60152 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eaf9_0), 60153 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebc0_0), 60352 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebd0_0), 60368 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebe8_0), 60392 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebf0_0), 60400 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebf8_0), 60408 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebf9_0), 60409 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebfa_0), 60410 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ebfb_0), 60411 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ecc0_0), 60608 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ecd0_0), 60624 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ece8_0), 60648 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ecf0_0), 60656 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ecf8_0), 60664 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ecf9_0), 60665 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edc0_0), 60864 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edd0_0), 60880 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_ede8_0), 60904 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edf0_0), 60912 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edf8_0), 60920 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edf9_0), 60921 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edfa_0), 60922 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_edfb_0), 60923 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eec0_0), 61120 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eed0_0), 61136 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eee8_0), 61160 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eef0_0), 61168 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eef8_0), 61176 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eef9_0), 61177 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_efc0_0), 61376 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_efd0_0), 61392 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_efe8_0), 61416 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f200_0), 61952 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f208_0), 61960 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f210_0), 61968 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f218_0), 61976 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f220_0), 61984 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f228_0), 61992 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f230_0), 62000 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f238_0), 62008 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f239_0), 62009 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f23a_0), 62010 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f23b_0), 62011 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f23c_0), 62012 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f240_0), 62016 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f248_0), 62024 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f250_0), 62032 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f258_0), 62040 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f260_0), 62048 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f268_0), 62056 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f270_0), 62064 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f278_0), 62072 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f279_0), 62073 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f27a_0), 62074 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f27b_0), 62075 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f27c_0), 62076 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f280_0), 62080 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f2c0_0), 62144 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f310_0), 62224 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f320_0), 62240 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f328_0), 62248 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f330_0), 62256 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f338_0), 62264 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f339_0), 62265 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f350_0), 62288 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f358_0), 62296 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f368_0), 62312 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f370_0), 62320 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f378_0), 62328 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f379_0), 62329 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f37a_0), 62330 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f37b_0), 62331 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f408_0), 62472 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f410_0), 62480 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f418_0), 62488 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f419_0), 62489 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41a_0), 62490 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41b_0), 62491 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41c_0), 62492 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41d_0), 62493 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41e_0), 62494 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f41f_0), 62495 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f428_0), 62504 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f430_0), 62512 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f438_0), 62520 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f439_0), 62521 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43a_0), 62522 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43b_0), 62523 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43c_0), 62524 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43d_0), 62525 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43e_0), 62526 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f43f_0), 62527 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f500_0), 62720 }, /* MMUOP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f600_0), 62976 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f608_0), 62984 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f610_0), 62992 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f618_0), 63000 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f620_0), 63008 }, /* MOVE16 */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_0 */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl CPUFUNC(op_smalltbl_1)[] = { +{ CPUFUNC(op_0000_0), 0}, /* OR */ +{ CPUFUNC(op_0010_0), 16}, /* OR */ +{ CPUFUNC(op_0018_0), 24}, /* OR */ +{ CPUFUNC(op_0020_0), 32}, /* OR */ +{ CPUFUNC(op_0028_0), 40}, /* OR */ +{ CPUFUNC(op_0030_0), 48}, /* OR */ +{ CPUFUNC(op_0038_0), 56}, /* OR */ +{ CPUFUNC(op_0039_0), 57}, /* OR */ +{ CPUFUNC(op_003c_0), 60}, /* ORSR */ +{ CPUFUNC(op_0040_0), 64}, /* OR */ +{ CPUFUNC(op_0050_0), 80}, /* OR */ +{ CPUFUNC(op_0058_0), 88}, /* OR */ +{ CPUFUNC(op_0060_0), 96}, /* OR */ +{ CPUFUNC(op_0068_0), 104}, /* OR */ +{ CPUFUNC(op_0070_0), 112}, /* OR */ +{ CPUFUNC(op_0078_0), 120}, /* OR */ +{ CPUFUNC(op_0079_0), 121}, /* OR */ +{ CPUFUNC(op_007c_0), 124}, /* ORSR */ +{ CPUFUNC(op_0080_0), 128}, /* OR */ +{ CPUFUNC(op_0090_0), 144}, /* OR */ +{ CPUFUNC(op_0098_0), 152}, /* OR */ +{ CPUFUNC(op_00a0_0), 160}, /* OR */ +{ CPUFUNC(op_00a8_0), 168}, /* OR */ +{ CPUFUNC(op_00b0_0), 176}, /* OR */ +{ CPUFUNC(op_00b8_0), 184}, /* OR */ +{ CPUFUNC(op_00b9_0), 185}, /* OR */ +{ CPUFUNC(op_00d0_0), 208}, /* CHK2 */ +{ CPUFUNC(op_00e8_0), 232}, /* CHK2 */ +{ CPUFUNC(op_00f0_0), 240}, /* CHK2 */ +{ CPUFUNC(op_00f8_0), 248}, /* CHK2 */ +{ CPUFUNC(op_00f9_0), 249}, /* CHK2 */ +{ CPUFUNC(op_00fa_0), 250}, /* CHK2 */ +{ CPUFUNC(op_00fb_0), 251}, /* CHK2 */ +{ CPUFUNC(op_0100_0), 256}, /* BTST */ +{ CPUFUNC(op_0108_0), 264}, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272}, /* BTST */ +{ CPUFUNC(op_0118_0), 280}, /* BTST */ +{ CPUFUNC(op_0120_0), 288}, /* BTST */ +{ CPUFUNC(op_0128_0), 296}, /* BTST */ +{ CPUFUNC(op_0130_0), 304}, /* BTST */ +{ CPUFUNC(op_0138_0), 312}, /* BTST */ +{ CPUFUNC(op_0139_0), 313}, /* BTST */ +{ CPUFUNC(op_013a_0), 314}, /* BTST */ +{ CPUFUNC(op_013b_0), 315}, /* BTST */ +{ CPUFUNC(op_013c_0), 316}, /* BTST */ +{ CPUFUNC(op_0140_0), 320}, /* BCHG */ +{ CPUFUNC(op_0148_0), 328}, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336}, /* BCHG */ +{ CPUFUNC(op_0158_0), 344}, /* BCHG */ +{ CPUFUNC(op_0160_0), 352}, /* BCHG */ +{ CPUFUNC(op_0168_0), 360}, /* BCHG */ +{ CPUFUNC(op_0170_0), 368}, /* BCHG */ +{ CPUFUNC(op_0178_0), 376}, /* BCHG */ +{ CPUFUNC(op_0179_0), 377}, /* BCHG */ +{ CPUFUNC(op_017a_0), 378}, /* BCHG */ +{ CPUFUNC(op_017b_0), 379}, /* BCHG */ +{ CPUFUNC(op_0180_0), 384}, /* BCLR */ +{ CPUFUNC(op_0188_0), 392}, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400}, /* BCLR */ +{ CPUFUNC(op_0198_0), 408}, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416}, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424}, /* BCLR */ +{ CPUFUNC(op_01b0_0), 432}, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440}, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441}, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442}, /* BCLR */ +{ CPUFUNC(op_01bb_0), 443}, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448}, /* BSET */ +{ CPUFUNC(op_01c8_0), 456}, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464}, /* BSET */ +{ CPUFUNC(op_01d8_0), 472}, /* BSET */ +{ CPUFUNC(op_01e0_0), 480}, /* BSET */ +{ CPUFUNC(op_01e8_0), 488}, /* BSET */ +{ CPUFUNC(op_01f0_0), 496}, /* BSET */ +{ CPUFUNC(op_01f8_0), 504}, /* BSET */ +{ CPUFUNC(op_01f9_0), 505}, /* BSET */ +{ CPUFUNC(op_01fa_0), 506}, /* BSET */ +{ CPUFUNC(op_01fb_0), 507}, /* BSET */ +{ CPUFUNC(op_0200_0), 512}, /* AND */ +{ CPUFUNC(op_0210_0), 528}, /* AND */ +{ CPUFUNC(op_0218_0), 536}, /* AND */ +{ CPUFUNC(op_0220_0), 544}, /* AND */ +{ CPUFUNC(op_0228_0), 552}, /* AND */ +{ CPUFUNC(op_0230_0), 560}, /* AND */ +{ CPUFUNC(op_0238_0), 568}, /* AND */ +{ CPUFUNC(op_0239_0), 569}, /* AND */ +{ CPUFUNC(op_023c_0), 572}, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576}, /* AND */ +{ CPUFUNC(op_0250_0), 592}, /* AND */ +{ CPUFUNC(op_0258_0), 600}, /* AND */ +{ CPUFUNC(op_0260_0), 608}, /* AND */ +{ CPUFUNC(op_0268_0), 616}, /* AND */ +{ CPUFUNC(op_0270_0), 624}, /* AND */ +{ CPUFUNC(op_0278_0), 632}, /* AND */ +{ CPUFUNC(op_0279_0), 633}, /* AND */ +{ CPUFUNC(op_027c_0), 636}, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640}, /* AND */ +{ CPUFUNC(op_0290_0), 656}, /* AND */ +{ CPUFUNC(op_0298_0), 664}, /* AND */ +{ CPUFUNC(op_02a0_0), 672}, /* AND */ +{ CPUFUNC(op_02a8_0), 680}, /* AND */ +{ CPUFUNC(op_02b0_0), 688}, /* AND */ +{ CPUFUNC(op_02b8_0), 696}, /* AND */ +{ CPUFUNC(op_02b9_0), 697}, /* AND */ +{ CPUFUNC(op_02d0_0), 720}, /* CHK2 */ +{ CPUFUNC(op_02e8_0), 744}, /* CHK2 */ +{ CPUFUNC(op_02f0_0), 752}, /* CHK2 */ +{ CPUFUNC(op_02f8_0), 760}, /* CHK2 */ +{ CPUFUNC(op_02f9_0), 761}, /* CHK2 */ +{ CPUFUNC(op_02fa_0), 762}, /* CHK2 */ +{ CPUFUNC(op_02fb_0), 763}, /* CHK2 */ +{ CPUFUNC(op_0400_0), 1024}, /* SUB */ +{ CPUFUNC(op_0410_0), 1040}, /* SUB */ +{ CPUFUNC(op_0418_0), 1048}, /* SUB */ +{ CPUFUNC(op_0420_0), 1056}, /* SUB */ +{ CPUFUNC(op_0428_0), 1064}, /* SUB */ +{ CPUFUNC(op_0430_0), 1072}, /* SUB */ +{ CPUFUNC(op_0438_0), 1080}, /* SUB */ +{ CPUFUNC(op_0439_0), 1081}, /* SUB */ +{ CPUFUNC(op_0440_0), 1088}, /* SUB */ +{ CPUFUNC(op_0450_0), 1104}, /* SUB */ +{ CPUFUNC(op_0458_0), 1112}, /* SUB */ +{ CPUFUNC(op_0460_0), 1120}, /* SUB */ +{ CPUFUNC(op_0468_0), 1128}, /* SUB */ +{ CPUFUNC(op_0470_0), 1136}, /* SUB */ +{ CPUFUNC(op_0478_0), 1144}, /* SUB */ +{ CPUFUNC(op_0479_0), 1145}, /* SUB */ +{ CPUFUNC(op_0480_0), 1152}, /* SUB */ +{ CPUFUNC(op_0490_0), 1168}, /* SUB */ +{ CPUFUNC(op_0498_0), 1176}, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184}, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192}, /* SUB */ +{ CPUFUNC(op_04b0_0), 1200}, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208}, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209}, /* SUB */ +{ CPUFUNC(op_04d0_0), 1232}, /* CHK2 */ +{ CPUFUNC(op_04e8_0), 1256}, /* CHK2 */ +{ CPUFUNC(op_04f0_0), 1264}, /* CHK2 */ +{ CPUFUNC(op_04f8_0), 1272}, /* CHK2 */ +{ CPUFUNC(op_04f9_0), 1273}, /* CHK2 */ +{ CPUFUNC(op_04fa_0), 1274}, /* CHK2 */ +{ CPUFUNC(op_04fb_0), 1275}, /* CHK2 */ +{ CPUFUNC(op_0600_0), 1536}, /* ADD */ +{ CPUFUNC(op_0610_0), 1552}, /* ADD */ +{ CPUFUNC(op_0618_0), 1560}, /* ADD */ +{ CPUFUNC(op_0620_0), 1568}, /* ADD */ +{ CPUFUNC(op_0628_0), 1576}, /* ADD */ +{ CPUFUNC(op_0630_0), 1584}, /* ADD */ +{ CPUFUNC(op_0638_0), 1592}, /* ADD */ +{ CPUFUNC(op_0639_0), 1593}, /* ADD */ +{ CPUFUNC(op_0640_0), 1600}, /* ADD */ +{ CPUFUNC(op_0650_0), 1616}, /* ADD */ +{ CPUFUNC(op_0658_0), 1624}, /* ADD */ +{ CPUFUNC(op_0660_0), 1632}, /* ADD */ +{ CPUFUNC(op_0668_0), 1640}, /* ADD */ +{ CPUFUNC(op_0670_0), 1648}, /* ADD */ +{ CPUFUNC(op_0678_0), 1656}, /* ADD */ +{ CPUFUNC(op_0679_0), 1657}, /* ADD */ +{ CPUFUNC(op_0680_0), 1664}, /* ADD */ +{ CPUFUNC(op_0690_0), 1680}, /* ADD */ +{ CPUFUNC(op_0698_0), 1688}, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696}, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704}, /* ADD */ +{ CPUFUNC(op_06b0_0), 1712}, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720}, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721}, /* ADD */ +{ CPUFUNC(op_06c0_0), 1728}, /* RTM */ +{ CPUFUNC(op_06c8_0), 1736}, /* RTM */ +{ CPUFUNC(op_06d0_0), 1744}, /* CALLM */ +{ CPUFUNC(op_06e8_0), 1768}, /* CALLM */ +{ CPUFUNC(op_06f0_0), 1776}, /* CALLM */ +{ CPUFUNC(op_06f8_0), 1784}, /* CALLM */ +{ CPUFUNC(op_06f9_0), 1785}, /* CALLM */ +{ CPUFUNC(op_06fa_0), 1786}, /* CALLM */ +{ CPUFUNC(op_06fb_0), 1787}, /* CALLM */ +{ CPUFUNC(op_0800_0), 2048}, /* BTST */ +{ CPUFUNC(op_0810_0), 2064}, /* BTST */ +{ CPUFUNC(op_0818_0), 2072}, /* BTST */ +{ CPUFUNC(op_0820_0), 2080}, /* BTST */ +{ CPUFUNC(op_0828_0), 2088}, /* BTST */ +{ CPUFUNC(op_0830_0), 2096}, /* BTST */ +{ CPUFUNC(op_0838_0), 2104}, /* BTST */ +{ CPUFUNC(op_0839_0), 2105}, /* BTST */ +{ CPUFUNC(op_083a_0), 2106}, /* BTST */ +{ CPUFUNC(op_083b_0), 2107}, /* BTST */ +{ CPUFUNC(op_083c_0), 2108}, /* BTST */ +{ CPUFUNC(op_0840_0), 2112}, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128}, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136}, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144}, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152}, /* BCHG */ +{ CPUFUNC(op_0870_0), 2160}, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168}, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169}, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170}, /* BCHG */ +{ CPUFUNC(op_087b_0), 2171}, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176}, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192}, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200}, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208}, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216}, /* BCLR */ +{ CPUFUNC(op_08b0_0), 2224}, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232}, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233}, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234}, /* BCLR */ +{ CPUFUNC(op_08bb_0), 2235}, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240}, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256}, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264}, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272}, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280}, /* BSET */ +{ CPUFUNC(op_08f0_0), 2288}, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296}, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297}, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298}, /* BSET */ +{ CPUFUNC(op_08fb_0), 2299}, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560}, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576}, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584}, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592}, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600}, /* EOR */ +{ CPUFUNC(op_0a30_0), 2608}, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616}, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617}, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620}, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624}, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640}, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648}, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656}, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664}, /* EOR */ +{ CPUFUNC(op_0a70_0), 2672}, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680}, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681}, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684}, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688}, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704}, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712}, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720}, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728}, /* EOR */ +{ CPUFUNC(op_0ab0_0), 2736}, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744}, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745}, /* EOR */ +{ CPUFUNC(op_0ad0_0), 2768}, /* CAS */ +{ CPUFUNC(op_0ad8_0), 2776}, /* CAS */ +{ CPUFUNC(op_0ae0_0), 2784}, /* CAS */ +{ CPUFUNC(op_0ae8_0), 2792}, /* CAS */ +{ CPUFUNC(op_0af0_0), 2800}, /* CAS */ +{ CPUFUNC(op_0af8_0), 2808}, /* CAS */ +{ CPUFUNC(op_0af9_0), 2809}, /* CAS */ +{ CPUFUNC(op_0c00_0), 3072}, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088}, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096}, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104}, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112}, /* CMP */ +{ CPUFUNC(op_0c30_0), 3120}, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128}, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129}, /* CMP */ +{ CPUFUNC(op_0c3a_0), 3130}, /* CMP */ +{ CPUFUNC(op_0c3b_0), 3131}, /* CMP */ +{ CPUFUNC(op_0c40_0), 3136}, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152}, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160}, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168}, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176}, /* CMP */ +{ CPUFUNC(op_0c70_0), 3184}, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192}, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193}, /* CMP */ +{ CPUFUNC(op_0c7a_0), 3194}, /* CMP */ +{ CPUFUNC(op_0c7b_0), 3195}, /* CMP */ +{ CPUFUNC(op_0c80_0), 3200}, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216}, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224}, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232}, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240}, /* CMP */ +{ CPUFUNC(op_0cb0_0), 3248}, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256}, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257}, /* CMP */ +{ CPUFUNC(op_0cba_0), 3258}, /* CMP */ +{ CPUFUNC(op_0cbb_0), 3259}, /* CMP */ +{ CPUFUNC(op_0cd0_0), 3280}, /* CAS */ +{ CPUFUNC(op_0cd8_0), 3288}, /* CAS */ +{ CPUFUNC(op_0ce0_0), 3296}, /* CAS */ +{ CPUFUNC(op_0ce8_0), 3304}, /* CAS */ +{ CPUFUNC(op_0cf0_0), 3312}, /* CAS */ +{ CPUFUNC(op_0cf8_0), 3320}, /* CAS */ +{ CPUFUNC(op_0cf9_0), 3321}, /* CAS */ +{ CPUFUNC(op_0cfc_0), 3324}, /* CAS2 */ +{ CPUFUNC(op_0e10_0), 3600}, /* MOVES */ +{ CPUFUNC(op_0e18_0), 3608}, /* MOVES */ +{ CPUFUNC(op_0e20_0), 3616}, /* MOVES */ +{ CPUFUNC(op_0e28_0), 3624}, /* MOVES */ +{ CPUFUNC(op_0e30_0), 3632}, /* MOVES */ +{ CPUFUNC(op_0e38_0), 3640}, /* MOVES */ +{ CPUFUNC(op_0e39_0), 3641}, /* MOVES */ +{ CPUFUNC(op_0e50_0), 3664}, /* MOVES */ +{ CPUFUNC(op_0e58_0), 3672}, /* MOVES */ +{ CPUFUNC(op_0e60_0), 3680}, /* MOVES */ +{ CPUFUNC(op_0e68_0), 3688}, /* MOVES */ +{ CPUFUNC(op_0e70_0), 3696}, /* MOVES */ +{ CPUFUNC(op_0e78_0), 3704}, /* MOVES */ +{ CPUFUNC(op_0e79_0), 3705}, /* MOVES */ +{ CPUFUNC(op_0e90_0), 3728}, /* MOVES */ +{ CPUFUNC(op_0e98_0), 3736}, /* MOVES */ +{ CPUFUNC(op_0ea0_0), 3744}, /* MOVES */ +{ CPUFUNC(op_0ea8_0), 3752}, /* MOVES */ +{ CPUFUNC(op_0eb0_0), 3760}, /* MOVES */ +{ CPUFUNC(op_0eb8_0), 3768}, /* MOVES */ +{ CPUFUNC(op_0eb9_0), 3769}, /* MOVES */ +{ CPUFUNC(op_0ed0_0), 3792}, /* CAS */ +{ CPUFUNC(op_0ed8_0), 3800}, /* CAS */ +{ CPUFUNC(op_0ee0_0), 3808}, /* CAS */ +{ CPUFUNC(op_0ee8_0), 3816}, /* CAS */ +{ CPUFUNC(op_0ef0_0), 3824}, /* CAS */ +{ CPUFUNC(op_0ef8_0), 3832}, /* CAS */ +{ CPUFUNC(op_0ef9_0), 3833}, /* CAS */ +{ CPUFUNC(op_0efc_0), 3836}, /* CAS2 */ +{ CPUFUNC(op_1000_0), 4096}, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112}, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120}, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128}, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136}, /* MOVE */ +{ CPUFUNC(op_1030_0), 4144}, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152}, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153}, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154}, /* MOVE */ +{ CPUFUNC(op_103b_0), 4155}, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156}, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224}, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240}, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248}, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256}, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264}, /* MOVE */ +{ CPUFUNC(op_10b0_0), 4272}, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280}, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281}, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282}, /* MOVE */ +{ CPUFUNC(op_10bb_0), 4283}, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284}, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288}, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304}, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312}, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320}, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328}, /* MOVE */ +{ CPUFUNC(op_10f0_0), 4336}, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344}, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345}, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346}, /* MOVE */ +{ CPUFUNC(op_10fb_0), 4347}, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348}, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352}, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368}, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376}, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384}, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392}, /* MOVE */ +{ CPUFUNC(op_1130_0), 4400}, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408}, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409}, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410}, /* MOVE */ +{ CPUFUNC(op_113b_0), 4411}, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412}, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416}, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432}, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440}, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448}, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456}, /* MOVE */ +{ CPUFUNC(op_1170_0), 4464}, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472}, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473}, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474}, /* MOVE */ +{ CPUFUNC(op_117b_0), 4475}, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476}, /* MOVE */ +{ CPUFUNC(op_1180_0), 4480}, /* MOVE */ +{ CPUFUNC(op_1190_0), 4496}, /* MOVE */ +{ CPUFUNC(op_1198_0), 4504}, /* MOVE */ +{ CPUFUNC(op_11a0_0), 4512}, /* MOVE */ +{ CPUFUNC(op_11a8_0), 4520}, /* MOVE */ +{ CPUFUNC(op_11b0_0), 4528}, /* MOVE */ +{ CPUFUNC(op_11b8_0), 4536}, /* MOVE */ +{ CPUFUNC(op_11b9_0), 4537}, /* MOVE */ +{ CPUFUNC(op_11ba_0), 4538}, /* MOVE */ +{ CPUFUNC(op_11bb_0), 4539}, /* MOVE */ +{ CPUFUNC(op_11bc_0), 4540}, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544}, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560}, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568}, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576}, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584}, /* MOVE */ +{ CPUFUNC(op_11f0_0), 4592}, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600}, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601}, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602}, /* MOVE */ +{ CPUFUNC(op_11fb_0), 4603}, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604}, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056}, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072}, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080}, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088}, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096}, /* MOVE */ +{ CPUFUNC(op_13f0_0), 5104}, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112}, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113}, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114}, /* MOVE */ +{ CPUFUNC(op_13fb_0), 5115}, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116}, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192}, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200}, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208}, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216}, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224}, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232}, /* MOVE */ +{ CPUFUNC(op_2030_0), 8240}, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248}, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249}, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250}, /* MOVE */ +{ CPUFUNC(op_203b_0), 8251}, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252}, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256}, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264}, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272}, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280}, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288}, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296}, /* MOVEA */ +{ CPUFUNC(op_2070_0), 8304}, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312}, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313}, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314}, /* MOVEA */ +{ CPUFUNC(op_207b_0), 8315}, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316}, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320}, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328}, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336}, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344}, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352}, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360}, /* MOVE */ +{ CPUFUNC(op_20b0_0), 8368}, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376}, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377}, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378}, /* MOVE */ +{ CPUFUNC(op_20bb_0), 8379}, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380}, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384}, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392}, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400}, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408}, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416}, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424}, /* MOVE */ +{ CPUFUNC(op_20f0_0), 8432}, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440}, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441}, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442}, /* MOVE */ +{ CPUFUNC(op_20fb_0), 8443}, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444}, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448}, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456}, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464}, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472}, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480}, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488}, /* MOVE */ +{ CPUFUNC(op_2130_0), 8496}, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504}, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505}, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506}, /* MOVE */ +{ CPUFUNC(op_213b_0), 8507}, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508}, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512}, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520}, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528}, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536}, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544}, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552}, /* MOVE */ +{ CPUFUNC(op_2170_0), 8560}, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568}, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569}, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570}, /* MOVE */ +{ CPUFUNC(op_217b_0), 8571}, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572}, /* MOVE */ +{ CPUFUNC(op_2180_0), 8576}, /* MOVE */ +{ CPUFUNC(op_2188_0), 8584}, /* MOVE */ +{ CPUFUNC(op_2190_0), 8592}, /* MOVE */ +{ CPUFUNC(op_2198_0), 8600}, /* MOVE */ +{ CPUFUNC(op_21a0_0), 8608}, /* MOVE */ +{ CPUFUNC(op_21a8_0), 8616}, /* MOVE */ +{ CPUFUNC(op_21b0_0), 8624}, /* MOVE */ +{ CPUFUNC(op_21b8_0), 8632}, /* MOVE */ +{ CPUFUNC(op_21b9_0), 8633}, /* MOVE */ +{ CPUFUNC(op_21ba_0), 8634}, /* MOVE */ +{ CPUFUNC(op_21bb_0), 8635}, /* MOVE */ +{ CPUFUNC(op_21bc_0), 8636}, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640}, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648}, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656}, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664}, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672}, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680}, /* MOVE */ +{ CPUFUNC(op_21f0_0), 8688}, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696}, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697}, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698}, /* MOVE */ +{ CPUFUNC(op_21fb_0), 8699}, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700}, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152}, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160}, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168}, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176}, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184}, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192}, /* MOVE */ +{ CPUFUNC(op_23f0_0), 9200}, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208}, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209}, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210}, /* MOVE */ +{ CPUFUNC(op_23fb_0), 9211}, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212}, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288}, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296}, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304}, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312}, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320}, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328}, /* MOVE */ +{ CPUFUNC(op_3030_0), 12336}, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344}, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345}, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346}, /* MOVE */ +{ CPUFUNC(op_303b_0), 12347}, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348}, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352}, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360}, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368}, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376}, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384}, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392}, /* MOVEA */ +{ CPUFUNC(op_3070_0), 12400}, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408}, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409}, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410}, /* MOVEA */ +{ CPUFUNC(op_307b_0), 12411}, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412}, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416}, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424}, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432}, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440}, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448}, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456}, /* MOVE */ +{ CPUFUNC(op_30b0_0), 12464}, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472}, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473}, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474}, /* MOVE */ +{ CPUFUNC(op_30bb_0), 12475}, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476}, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480}, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488}, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496}, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504}, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512}, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520}, /* MOVE */ +{ CPUFUNC(op_30f0_0), 12528}, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536}, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537}, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538}, /* MOVE */ +{ CPUFUNC(op_30fb_0), 12539}, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540}, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544}, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552}, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560}, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568}, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576}, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584}, /* MOVE */ +{ CPUFUNC(op_3130_0), 12592}, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600}, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601}, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602}, /* MOVE */ +{ CPUFUNC(op_313b_0), 12603}, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604}, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608}, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616}, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624}, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632}, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640}, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648}, /* MOVE */ +{ CPUFUNC(op_3170_0), 12656}, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664}, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665}, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666}, /* MOVE */ +{ CPUFUNC(op_317b_0), 12667}, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668}, /* MOVE */ +{ CPUFUNC(op_3180_0), 12672}, /* MOVE */ +{ CPUFUNC(op_3188_0), 12680}, /* MOVE */ +{ CPUFUNC(op_3190_0), 12688}, /* MOVE */ +{ CPUFUNC(op_3198_0), 12696}, /* MOVE */ +{ CPUFUNC(op_31a0_0), 12704}, /* MOVE */ +{ CPUFUNC(op_31a8_0), 12712}, /* MOVE */ +{ CPUFUNC(op_31b0_0), 12720}, /* MOVE */ +{ CPUFUNC(op_31b8_0), 12728}, /* MOVE */ +{ CPUFUNC(op_31b9_0), 12729}, /* MOVE */ +{ CPUFUNC(op_31ba_0), 12730}, /* MOVE */ +{ CPUFUNC(op_31bb_0), 12731}, /* MOVE */ +{ CPUFUNC(op_31bc_0), 12732}, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736}, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744}, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752}, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760}, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768}, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776}, /* MOVE */ +{ CPUFUNC(op_31f0_0), 12784}, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792}, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793}, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794}, /* MOVE */ +{ CPUFUNC(op_31fb_0), 12795}, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796}, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248}, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256}, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264}, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272}, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280}, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288}, /* MOVE */ +{ CPUFUNC(op_33f0_0), 13296}, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304}, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305}, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306}, /* MOVE */ +{ CPUFUNC(op_33fb_0), 13307}, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308}, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384}, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400}, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408}, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416}, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424}, /* NEGX */ +{ CPUFUNC(op_4030_0), 16432}, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440}, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441}, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448}, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464}, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472}, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480}, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488}, /* NEGX */ +{ CPUFUNC(op_4070_0), 16496}, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504}, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505}, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512}, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528}, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536}, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544}, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552}, /* NEGX */ +{ CPUFUNC(op_40b0_0), 16560}, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568}, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569}, /* NEGX */ +{ CPUFUNC(op_40c0_0), 16576}, /* MVSR2 */ +{ CPUFUNC(op_40d0_0), 16592}, /* MVSR2 */ +{ CPUFUNC(op_40d8_0), 16600}, /* MVSR2 */ +{ CPUFUNC(op_40e0_0), 16608}, /* MVSR2 */ +{ CPUFUNC(op_40e8_0), 16616}, /* MVSR2 */ +{ CPUFUNC(op_40f0_0), 16624}, /* MVSR2 */ +{ CPUFUNC(op_40f8_0), 16632}, /* MVSR2 */ +{ CPUFUNC(op_40f9_0), 16633}, /* MVSR2 */ +{ CPUFUNC(op_4100_0), 16640}, /* CHK */ +{ CPUFUNC(op_4110_0), 16656}, /* CHK */ +{ CPUFUNC(op_4118_0), 16664}, /* CHK */ +{ CPUFUNC(op_4120_0), 16672}, /* CHK */ +{ CPUFUNC(op_4128_0), 16680}, /* CHK */ +{ CPUFUNC(op_4130_0), 16688}, /* CHK */ +{ CPUFUNC(op_4138_0), 16696}, /* CHK */ +{ CPUFUNC(op_4139_0), 16697}, /* CHK */ +{ CPUFUNC(op_413a_0), 16698}, /* CHK */ +{ CPUFUNC(op_413b_0), 16699}, /* CHK */ +{ CPUFUNC(op_413c_0), 16700}, /* CHK */ +{ CPUFUNC(op_4180_0), 16768}, /* CHK */ +{ CPUFUNC(op_4190_0), 16784}, /* CHK */ +{ CPUFUNC(op_4198_0), 16792}, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800}, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808}, /* CHK */ +{ CPUFUNC(op_41b0_0), 16816}, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824}, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825}, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826}, /* CHK */ +{ CPUFUNC(op_41bb_0), 16827}, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828}, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848}, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872}, /* LEA */ +{ CPUFUNC(op_41f0_0), 16880}, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888}, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889}, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890}, /* LEA */ +{ CPUFUNC(op_41fb_0), 16891}, /* LEA */ +{ CPUFUNC(op_4200_0), 16896}, /* CLR */ +{ CPUFUNC(op_4210_0), 16912}, /* CLR */ +{ CPUFUNC(op_4218_0), 16920}, /* CLR */ +{ CPUFUNC(op_4220_0), 16928}, /* CLR */ +{ CPUFUNC(op_4228_0), 16936}, /* CLR */ +{ CPUFUNC(op_4230_0), 16944}, /* CLR */ +{ CPUFUNC(op_4238_0), 16952}, /* CLR */ +{ CPUFUNC(op_4239_0), 16953}, /* CLR */ +{ CPUFUNC(op_4240_0), 16960}, /* CLR */ +{ CPUFUNC(op_4250_0), 16976}, /* CLR */ +{ CPUFUNC(op_4258_0), 16984}, /* CLR */ +{ CPUFUNC(op_4260_0), 16992}, /* CLR */ +{ CPUFUNC(op_4268_0), 17000}, /* CLR */ +{ CPUFUNC(op_4270_0), 17008}, /* CLR */ +{ CPUFUNC(op_4278_0), 17016}, /* CLR */ +{ CPUFUNC(op_4279_0), 17017}, /* CLR */ +{ CPUFUNC(op_4280_0), 17024}, /* CLR */ +{ CPUFUNC(op_4290_0), 17040}, /* CLR */ +{ CPUFUNC(op_4298_0), 17048}, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056}, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064}, /* CLR */ +{ CPUFUNC(op_42b0_0), 17072}, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080}, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081}, /* CLR */ +{ CPUFUNC(op_42c0_0), 17088}, /* MVSR2 */ +{ CPUFUNC(op_42d0_0), 17104}, /* MVSR2 */ +{ CPUFUNC(op_42d8_0), 17112}, /* MVSR2 */ +{ CPUFUNC(op_42e0_0), 17120}, /* MVSR2 */ +{ CPUFUNC(op_42e8_0), 17128}, /* MVSR2 */ +{ CPUFUNC(op_42f0_0), 17136}, /* MVSR2 */ +{ CPUFUNC(op_42f8_0), 17144}, /* MVSR2 */ +{ CPUFUNC(op_42f9_0), 17145}, /* MVSR2 */ +{ CPUFUNC(op_4400_0), 17408}, /* NEG */ +{ CPUFUNC(op_4410_0), 17424}, /* NEG */ +{ CPUFUNC(op_4418_0), 17432}, /* NEG */ +{ CPUFUNC(op_4420_0), 17440}, /* NEG */ +{ CPUFUNC(op_4428_0), 17448}, /* NEG */ +{ CPUFUNC(op_4430_0), 17456}, /* NEG */ +{ CPUFUNC(op_4438_0), 17464}, /* NEG */ +{ CPUFUNC(op_4439_0), 17465}, /* NEG */ +{ CPUFUNC(op_4440_0), 17472}, /* NEG */ +{ CPUFUNC(op_4450_0), 17488}, /* NEG */ +{ CPUFUNC(op_4458_0), 17496}, /* NEG */ +{ CPUFUNC(op_4460_0), 17504}, /* NEG */ +{ CPUFUNC(op_4468_0), 17512}, /* NEG */ +{ CPUFUNC(op_4470_0), 17520}, /* NEG */ +{ CPUFUNC(op_4478_0), 17528}, /* NEG */ +{ CPUFUNC(op_4479_0), 17529}, /* NEG */ +{ CPUFUNC(op_4480_0), 17536}, /* NEG */ +{ CPUFUNC(op_4490_0), 17552}, /* NEG */ +{ CPUFUNC(op_4498_0), 17560}, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568}, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576}, /* NEG */ +{ CPUFUNC(op_44b0_0), 17584}, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592}, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593}, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600}, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616}, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624}, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632}, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640}, /* MV2SR */ +{ CPUFUNC(op_44f0_0), 17648}, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656}, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657}, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658}, /* MV2SR */ +{ CPUFUNC(op_44fb_0), 17659}, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660}, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920}, /* NOT */ +{ CPUFUNC(op_4610_0), 17936}, /* NOT */ +{ CPUFUNC(op_4618_0), 17944}, /* NOT */ +{ CPUFUNC(op_4620_0), 17952}, /* NOT */ +{ CPUFUNC(op_4628_0), 17960}, /* NOT */ +{ CPUFUNC(op_4630_0), 17968}, /* NOT */ +{ CPUFUNC(op_4638_0), 17976}, /* NOT */ +{ CPUFUNC(op_4639_0), 17977}, /* NOT */ +{ CPUFUNC(op_4640_0), 17984}, /* NOT */ +{ CPUFUNC(op_4650_0), 18000}, /* NOT */ +{ CPUFUNC(op_4658_0), 18008}, /* NOT */ +{ CPUFUNC(op_4660_0), 18016}, /* NOT */ +{ CPUFUNC(op_4668_0), 18024}, /* NOT */ +{ CPUFUNC(op_4670_0), 18032}, /* NOT */ +{ CPUFUNC(op_4678_0), 18040}, /* NOT */ +{ CPUFUNC(op_4679_0), 18041}, /* NOT */ +{ CPUFUNC(op_4680_0), 18048}, /* NOT */ +{ CPUFUNC(op_4690_0), 18064}, /* NOT */ +{ CPUFUNC(op_4698_0), 18072}, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080}, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088}, /* NOT */ +{ CPUFUNC(op_46b0_0), 18096}, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104}, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105}, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112}, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128}, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136}, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144}, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152}, /* MV2SR */ +{ CPUFUNC(op_46f0_0), 18160}, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168}, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169}, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170}, /* MV2SR */ +{ CPUFUNC(op_46fb_0), 18171}, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172}, /* MV2SR */ +{ CPUFUNC(op_4800_0), 18432}, /* NBCD */ +{ CPUFUNC(op_4808_0), 18440}, /* LINK */ +{ CPUFUNC(op_4810_0), 18448}, /* NBCD */ +{ CPUFUNC(op_4818_0), 18456}, /* NBCD */ +{ CPUFUNC(op_4820_0), 18464}, /* NBCD */ +{ CPUFUNC(op_4828_0), 18472}, /* NBCD */ +{ CPUFUNC(op_4830_0), 18480}, /* NBCD */ +{ CPUFUNC(op_4838_0), 18488}, /* NBCD */ +{ CPUFUNC(op_4839_0), 18489}, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496}, /* SWAP */ +{ CPUFUNC(op_4848_0), 18504}, /* BKPT */ +{ CPUFUNC(op_4850_0), 18512}, /* PEA */ +{ CPUFUNC(op_4868_0), 18536}, /* PEA */ +{ CPUFUNC(op_4870_0), 18544}, /* PEA */ +{ CPUFUNC(op_4878_0), 18552}, /* PEA */ +{ CPUFUNC(op_4879_0), 18553}, /* PEA */ +{ CPUFUNC(op_487a_0), 18554}, /* PEA */ +{ CPUFUNC(op_487b_0), 18555}, /* PEA */ +{ CPUFUNC(op_4880_0), 18560}, /* EXT */ +{ CPUFUNC(op_4890_0), 18576}, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592}, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600}, /* MVMLE */ +{ CPUFUNC(op_48b0_0), 18608}, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616}, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617}, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624}, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640}, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656}, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664}, /* MVMLE */ +{ CPUFUNC(op_48f0_0), 18672}, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680}, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681}, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880}, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944}, /* TST */ +{ CPUFUNC(op_4a10_0), 18960}, /* TST */ +{ CPUFUNC(op_4a18_0), 18968}, /* TST */ +{ CPUFUNC(op_4a20_0), 18976}, /* TST */ +{ CPUFUNC(op_4a28_0), 18984}, /* TST */ +{ CPUFUNC(op_4a30_0), 18992}, /* TST */ +{ CPUFUNC(op_4a38_0), 19000}, /* TST */ +{ CPUFUNC(op_4a39_0), 19001}, /* TST */ +{ CPUFUNC(op_4a3a_0), 19002}, /* TST */ +{ CPUFUNC(op_4a3b_0), 19003}, /* TST */ +{ CPUFUNC(op_4a3c_0), 19004}, /* TST */ +{ CPUFUNC(op_4a40_0), 19008}, /* TST */ +{ CPUFUNC(op_4a48_0), 19016}, /* TST */ +{ CPUFUNC(op_4a50_0), 19024}, /* TST */ +{ CPUFUNC(op_4a58_0), 19032}, /* TST */ +{ CPUFUNC(op_4a60_0), 19040}, /* TST */ +{ CPUFUNC(op_4a68_0), 19048}, /* TST */ +{ CPUFUNC(op_4a70_0), 19056}, /* TST */ +{ CPUFUNC(op_4a78_0), 19064}, /* TST */ +{ CPUFUNC(op_4a79_0), 19065}, /* TST */ +{ CPUFUNC(op_4a7a_0), 19066}, /* TST */ +{ CPUFUNC(op_4a7b_0), 19067}, /* TST */ +{ CPUFUNC(op_4a7c_0), 19068}, /* TST */ +{ CPUFUNC(op_4a80_0), 19072}, /* TST */ +{ CPUFUNC(op_4a88_0), 19080}, /* TST */ +{ CPUFUNC(op_4a90_0), 19088}, /* TST */ +{ CPUFUNC(op_4a98_0), 19096}, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104}, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112}, /* TST */ +{ CPUFUNC(op_4ab0_0), 19120}, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128}, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129}, /* TST */ +{ CPUFUNC(op_4aba_0), 19130}, /* TST */ +{ CPUFUNC(op_4abb_0), 19131}, /* TST */ +{ CPUFUNC(op_4abc_0), 19132}, /* TST */ +{ CPUFUNC(op_4ac0_0), 19136}, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152}, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160}, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168}, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176}, /* TAS */ +{ CPUFUNC(op_4af0_0), 19184}, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192}, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193}, /* TAS */ +{ CPUFUNC(op_4c00_0), 19456}, /* MULL */ +{ CPUFUNC(op_4c10_0), 19472}, /* MULL */ +{ CPUFUNC(op_4c18_0), 19480}, /* MULL */ +{ CPUFUNC(op_4c20_0), 19488}, /* MULL */ +{ CPUFUNC(op_4c28_0), 19496}, /* MULL */ +{ CPUFUNC(op_4c30_0), 19504}, /* MULL */ +{ CPUFUNC(op_4c38_0), 19512}, /* MULL */ +{ CPUFUNC(op_4c39_0), 19513}, /* MULL */ +{ CPUFUNC(op_4c3a_0), 19514}, /* MULL */ +{ CPUFUNC(op_4c3b_0), 19515}, /* MULL */ +{ CPUFUNC(op_4c3c_0), 19516}, /* MULL */ +{ CPUFUNC(op_4c40_0), 19520}, /* DIVL */ +{ CPUFUNC(op_4c50_0), 19536}, /* DIVL */ +{ CPUFUNC(op_4c58_0), 19544}, /* DIVL */ +{ CPUFUNC(op_4c60_0), 19552}, /* DIVL */ +{ CPUFUNC(op_4c68_0), 19560}, /* DIVL */ +{ CPUFUNC(op_4c70_0), 19568}, /* DIVL */ +{ CPUFUNC(op_4c78_0), 19576}, /* DIVL */ +{ CPUFUNC(op_4c79_0), 19577}, /* DIVL */ +{ CPUFUNC(op_4c7a_0), 19578}, /* DIVL */ +{ CPUFUNC(op_4c7b_0), 19579}, /* DIVL */ +{ CPUFUNC(op_4c7c_0), 19580}, /* DIVL */ +{ CPUFUNC(op_4c90_0), 19600}, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608}, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624}, /* MVMEL */ +{ CPUFUNC(op_4cb0_0), 19632}, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640}, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641}, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642}, /* MVMEL */ +{ CPUFUNC(op_4cbb_0), 19643}, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664}, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672}, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688}, /* MVMEL */ +{ CPUFUNC(op_4cf0_0), 19696}, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704}, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705}, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706}, /* MVMEL */ +{ CPUFUNC(op_4cfb_0), 19707}, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032}, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048}, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056}, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064}, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072}, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080}, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081}, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082}, /* STOP */ +{ CPUFUNC(op_4e73_0), 20083}, /* RTE */ +{ CPUFUNC(op_4e74_0), 20084}, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085}, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086}, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087}, /* RTR */ +{ CPUFUNC(op_4e7a_0), 20090}, /* MOVEC2 */ +{ CPUFUNC(op_4e7b_0), 20091}, /* MOVE2C */ +{ CPUFUNC(op_4e90_0), 20112}, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136}, /* JSR */ +{ CPUFUNC(op_4eb0_0), 20144}, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152}, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153}, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154}, /* JSR */ +{ CPUFUNC(op_4ebb_0), 20155}, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176}, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200}, /* JMP */ +{ CPUFUNC(op_4ef0_0), 20208}, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216}, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217}, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218}, /* JMP */ +{ CPUFUNC(op_4efb_0), 20219}, /* JMP */ +{ CPUFUNC(op_5000_0), 20480}, /* ADD */ +{ CPUFUNC(op_5010_0), 20496}, /* ADD */ +{ CPUFUNC(op_5018_0), 20504}, /* ADD */ +{ CPUFUNC(op_5020_0), 20512}, /* ADD */ +{ CPUFUNC(op_5028_0), 20520}, /* ADD */ +{ CPUFUNC(op_5030_0), 20528}, /* ADD */ +{ CPUFUNC(op_5038_0), 20536}, /* ADD */ +{ CPUFUNC(op_5039_0), 20537}, /* ADD */ +{ CPUFUNC(op_5040_0), 20544}, /* ADD */ +{ CPUFUNC(op_5048_0), 20552}, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560}, /* ADD */ +{ CPUFUNC(op_5058_0), 20568}, /* ADD */ +{ CPUFUNC(op_5060_0), 20576}, /* ADD */ +{ CPUFUNC(op_5068_0), 20584}, /* ADD */ +{ CPUFUNC(op_5070_0), 20592}, /* ADD */ +{ CPUFUNC(op_5078_0), 20600}, /* ADD */ +{ CPUFUNC(op_5079_0), 20601}, /* ADD */ +{ CPUFUNC(op_5080_0), 20608}, /* ADD */ +{ CPUFUNC(op_5088_0), 20616}, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624}, /* ADD */ +{ CPUFUNC(op_5098_0), 20632}, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640}, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648}, /* ADD */ +{ CPUFUNC(op_50b0_0), 20656}, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664}, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665}, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672}, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680}, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688}, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696}, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704}, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712}, /* Scc */ +{ CPUFUNC(op_50f0_0), 20720}, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728}, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729}, /* Scc */ +{ CPUFUNC(op_50fa_0), 20730}, /* TRAPcc */ +{ CPUFUNC(op_50fb_0), 20731}, /* TRAPcc */ +{ CPUFUNC(op_50fc_0), 20732}, /* TRAPcc */ +{ CPUFUNC(op_5100_0), 20736}, /* SUB */ +{ CPUFUNC(op_5110_0), 20752}, /* SUB */ +{ CPUFUNC(op_5118_0), 20760}, /* SUB */ +{ CPUFUNC(op_5120_0), 20768}, /* SUB */ +{ CPUFUNC(op_5128_0), 20776}, /* SUB */ +{ CPUFUNC(op_5130_0), 20784}, /* SUB */ +{ CPUFUNC(op_5138_0), 20792}, /* SUB */ +{ CPUFUNC(op_5139_0), 20793}, /* SUB */ +{ CPUFUNC(op_5140_0), 20800}, /* SUB */ +{ CPUFUNC(op_5148_0), 20808}, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816}, /* SUB */ +{ CPUFUNC(op_5158_0), 20824}, /* SUB */ +{ CPUFUNC(op_5160_0), 20832}, /* SUB */ +{ CPUFUNC(op_5168_0), 20840}, /* SUB */ +{ CPUFUNC(op_5170_0), 20848}, /* SUB */ +{ CPUFUNC(op_5178_0), 20856}, /* SUB */ +{ CPUFUNC(op_5179_0), 20857}, /* SUB */ +{ CPUFUNC(op_5180_0), 20864}, /* SUB */ +{ CPUFUNC(op_5188_0), 20872}, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880}, /* SUB */ +{ CPUFUNC(op_5198_0), 20888}, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896}, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904}, /* SUB */ +{ CPUFUNC(op_51b0_0), 20912}, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920}, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921}, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928}, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936}, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944}, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952}, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960}, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968}, /* Scc */ +{ CPUFUNC(op_51f0_0), 20976}, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984}, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985}, /* Scc */ +{ CPUFUNC(op_51fa_0), 20986}, /* TRAPcc */ +{ CPUFUNC(op_51fb_0), 20987}, /* TRAPcc */ +{ CPUFUNC(op_51fc_0), 20988}, /* TRAPcc */ +{ CPUFUNC(op_52c0_0), 21184}, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192}, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200}, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208}, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216}, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224}, /* Scc */ +{ CPUFUNC(op_52f0_0), 21232}, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240}, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241}, /* Scc */ +{ CPUFUNC(op_52fa_0), 21242}, /* TRAPcc */ +{ CPUFUNC(op_52fb_0), 21243}, /* TRAPcc */ +{ CPUFUNC(op_52fc_0), 21244}, /* TRAPcc */ +{ CPUFUNC(op_53c0_0), 21440}, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448}, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456}, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464}, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472}, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480}, /* Scc */ +{ CPUFUNC(op_53f0_0), 21488}, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496}, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497}, /* Scc */ +{ CPUFUNC(op_53fa_0), 21498}, /* TRAPcc */ +{ CPUFUNC(op_53fb_0), 21499}, /* TRAPcc */ +{ CPUFUNC(op_53fc_0), 21500}, /* TRAPcc */ +{ CPUFUNC(op_54c0_0), 21696}, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704}, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712}, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720}, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728}, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736}, /* Scc */ +{ CPUFUNC(op_54f0_0), 21744}, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752}, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753}, /* Scc */ +{ CPUFUNC(op_54fa_0), 21754}, /* TRAPcc */ +{ CPUFUNC(op_54fb_0), 21755}, /* TRAPcc */ +{ CPUFUNC(op_54fc_0), 21756}, /* TRAPcc */ +{ CPUFUNC(op_55c0_0), 21952}, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960}, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968}, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976}, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984}, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992}, /* Scc */ +{ CPUFUNC(op_55f0_0), 22000}, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008}, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009}, /* Scc */ +{ CPUFUNC(op_55fa_0), 22010}, /* TRAPcc */ +{ CPUFUNC(op_55fb_0), 22011}, /* TRAPcc */ +{ CPUFUNC(op_55fc_0), 22012}, /* TRAPcc */ +{ CPUFUNC(op_56c0_0), 22208}, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216}, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224}, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232}, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240}, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248}, /* Scc */ +{ CPUFUNC(op_56f0_0), 22256}, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264}, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265}, /* Scc */ +{ CPUFUNC(op_56fa_0), 22266}, /* TRAPcc */ +{ CPUFUNC(op_56fb_0), 22267}, /* TRAPcc */ +{ CPUFUNC(op_56fc_0), 22268}, /* TRAPcc */ +{ CPUFUNC(op_57c0_0), 22464}, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472}, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480}, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488}, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496}, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504}, /* Scc */ +{ CPUFUNC(op_57f0_0), 22512}, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520}, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521}, /* Scc */ +{ CPUFUNC(op_57fa_0), 22522}, /* TRAPcc */ +{ CPUFUNC(op_57fb_0), 22523}, /* TRAPcc */ +{ CPUFUNC(op_57fc_0), 22524}, /* TRAPcc */ +{ CPUFUNC(op_58c0_0), 22720}, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728}, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736}, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744}, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752}, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760}, /* Scc */ +{ CPUFUNC(op_58f0_0), 22768}, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776}, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777}, /* Scc */ +{ CPUFUNC(op_58fa_0), 22778}, /* TRAPcc */ +{ CPUFUNC(op_58fb_0), 22779}, /* TRAPcc */ +{ CPUFUNC(op_58fc_0), 22780}, /* TRAPcc */ +{ CPUFUNC(op_59c0_0), 22976}, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984}, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992}, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000}, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008}, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016}, /* Scc */ +{ CPUFUNC(op_59f0_0), 23024}, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032}, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033}, /* Scc */ +{ CPUFUNC(op_59fa_0), 23034}, /* TRAPcc */ +{ CPUFUNC(op_59fb_0), 23035}, /* TRAPcc */ +{ CPUFUNC(op_59fc_0), 23036}, /* TRAPcc */ +{ CPUFUNC(op_5ac0_0), 23232}, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240}, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248}, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256}, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264}, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272}, /* Scc */ +{ CPUFUNC(op_5af0_0), 23280}, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288}, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289}, /* Scc */ +{ CPUFUNC(op_5afa_0), 23290}, /* TRAPcc */ +{ CPUFUNC(op_5afb_0), 23291}, /* TRAPcc */ +{ CPUFUNC(op_5afc_0), 23292}, /* TRAPcc */ +{ CPUFUNC(op_5bc0_0), 23488}, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496}, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504}, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512}, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520}, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528}, /* Scc */ +{ CPUFUNC(op_5bf0_0), 23536}, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544}, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545}, /* Scc */ +{ CPUFUNC(op_5bfa_0), 23546}, /* TRAPcc */ +{ CPUFUNC(op_5bfb_0), 23547}, /* TRAPcc */ +{ CPUFUNC(op_5bfc_0), 23548}, /* TRAPcc */ +{ CPUFUNC(op_5cc0_0), 23744}, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752}, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760}, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768}, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776}, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784}, /* Scc */ +{ CPUFUNC(op_5cf0_0), 23792}, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800}, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801}, /* Scc */ +{ CPUFUNC(op_5cfa_0), 23802}, /* TRAPcc */ +{ CPUFUNC(op_5cfb_0), 23803}, /* TRAPcc */ +{ CPUFUNC(op_5cfc_0), 23804}, /* TRAPcc */ +{ CPUFUNC(op_5dc0_0), 24000}, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008}, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016}, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024}, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032}, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040}, /* Scc */ +{ CPUFUNC(op_5df0_0), 24048}, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056}, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057}, /* Scc */ +{ CPUFUNC(op_5dfa_0), 24058}, /* TRAPcc */ +{ CPUFUNC(op_5dfb_0), 24059}, /* TRAPcc */ +{ CPUFUNC(op_5dfc_0), 24060}, /* TRAPcc */ +{ CPUFUNC(op_5ec0_0), 24256}, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264}, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272}, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280}, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288}, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296}, /* Scc */ +{ CPUFUNC(op_5ef0_0), 24304}, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312}, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313}, /* Scc */ +{ CPUFUNC(op_5efa_0), 24314}, /* TRAPcc */ +{ CPUFUNC(op_5efb_0), 24315}, /* TRAPcc */ +{ CPUFUNC(op_5efc_0), 24316}, /* TRAPcc */ +{ CPUFUNC(op_5fc0_0), 24512}, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520}, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528}, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536}, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544}, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552}, /* Scc */ +{ CPUFUNC(op_5ff0_0), 24560}, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568}, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569}, /* Scc */ +{ CPUFUNC(op_5ffa_0), 24570}, /* TRAPcc */ +{ CPUFUNC(op_5ffb_0), 24571}, /* TRAPcc */ +{ CPUFUNC(op_5ffc_0), 24572}, /* TRAPcc */ +{ CPUFUNC(op_6000_0), 24576}, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577}, /* Bcc */ +{ CPUFUNC(op_60ff_0), 24831}, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832}, /* BSR */ +{ CPUFUNC(op_6101_0), 24833}, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087}, /* BSR */ +{ CPUFUNC(op_6200_0), 25088}, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089}, /* Bcc */ +{ CPUFUNC(op_62ff_0), 25343}, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344}, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345}, /* Bcc */ +{ CPUFUNC(op_63ff_0), 25599}, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600}, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601}, /* Bcc */ +{ CPUFUNC(op_64ff_0), 25855}, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856}, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857}, /* Bcc */ +{ CPUFUNC(op_65ff_0), 26111}, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112}, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113}, /* Bcc */ +{ CPUFUNC(op_66ff_0), 26367}, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368}, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369}, /* Bcc */ +{ CPUFUNC(op_67ff_0), 26623}, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624}, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625}, /* Bcc */ +{ CPUFUNC(op_68ff_0), 26879}, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880}, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881}, /* Bcc */ +{ CPUFUNC(op_69ff_0), 27135}, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136}, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137}, /* Bcc */ +{ CPUFUNC(op_6aff_0), 27391}, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392}, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393}, /* Bcc */ +{ CPUFUNC(op_6bff_0), 27647}, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648}, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649}, /* Bcc */ +{ CPUFUNC(op_6cff_0), 27903}, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904}, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905}, /* Bcc */ +{ CPUFUNC(op_6dff_0), 28159}, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160}, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161}, /* Bcc */ +{ CPUFUNC(op_6eff_0), 28415}, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416}, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417}, /* Bcc */ +{ CPUFUNC(op_6fff_0), 28671}, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672}, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768}, /* OR */ +{ CPUFUNC(op_8010_0), 32784}, /* OR */ +{ CPUFUNC(op_8018_0), 32792}, /* OR */ +{ CPUFUNC(op_8020_0), 32800}, /* OR */ +{ CPUFUNC(op_8028_0), 32808}, /* OR */ +{ CPUFUNC(op_8030_0), 32816}, /* OR */ +{ CPUFUNC(op_8038_0), 32824}, /* OR */ +{ CPUFUNC(op_8039_0), 32825}, /* OR */ +{ CPUFUNC(op_803a_0), 32826}, /* OR */ +{ CPUFUNC(op_803b_0), 32827}, /* OR */ +{ CPUFUNC(op_803c_0), 32828}, /* OR */ +{ CPUFUNC(op_8040_0), 32832}, /* OR */ +{ CPUFUNC(op_8050_0), 32848}, /* OR */ +{ CPUFUNC(op_8058_0), 32856}, /* OR */ +{ CPUFUNC(op_8060_0), 32864}, /* OR */ +{ CPUFUNC(op_8068_0), 32872}, /* OR */ +{ CPUFUNC(op_8070_0), 32880}, /* OR */ +{ CPUFUNC(op_8078_0), 32888}, /* OR */ +{ CPUFUNC(op_8079_0), 32889}, /* OR */ +{ CPUFUNC(op_807a_0), 32890}, /* OR */ +{ CPUFUNC(op_807b_0), 32891}, /* OR */ +{ CPUFUNC(op_807c_0), 32892}, /* OR */ +{ CPUFUNC(op_8080_0), 32896}, /* OR */ +{ CPUFUNC(op_8090_0), 32912}, /* OR */ +{ CPUFUNC(op_8098_0), 32920}, /* OR */ +{ CPUFUNC(op_80a0_0), 32928}, /* OR */ +{ CPUFUNC(op_80a8_0), 32936}, /* OR */ +{ CPUFUNC(op_80b0_0), 32944}, /* OR */ +{ CPUFUNC(op_80b8_0), 32952}, /* OR */ +{ CPUFUNC(op_80b9_0), 32953}, /* OR */ +{ CPUFUNC(op_80ba_0), 32954}, /* OR */ +{ CPUFUNC(op_80bb_0), 32955}, /* OR */ +{ CPUFUNC(op_80bc_0), 32956}, /* OR */ +{ CPUFUNC(op_80c0_0), 32960}, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976}, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984}, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992}, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000}, /* DIVU */ +{ CPUFUNC(op_80f0_0), 33008}, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016}, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017}, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018}, /* DIVU */ +{ CPUFUNC(op_80fb_0), 33019}, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020}, /* DIVU */ +{ CPUFUNC(op_8100_0), 33024}, /* SBCD */ +{ CPUFUNC(op_8108_0), 33032}, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040}, /* OR */ +{ CPUFUNC(op_8118_0), 33048}, /* OR */ +{ CPUFUNC(op_8120_0), 33056}, /* OR */ +{ CPUFUNC(op_8128_0), 33064}, /* OR */ +{ CPUFUNC(op_8130_0), 33072}, /* OR */ +{ CPUFUNC(op_8138_0), 33080}, /* OR */ +{ CPUFUNC(op_8139_0), 33081}, /* OR */ +{ CPUFUNC(op_8140_0), 33088}, /* PACK */ +{ CPUFUNC(op_8148_0), 33096}, /* PACK */ +{ CPUFUNC(op_8150_0), 33104}, /* OR */ +{ CPUFUNC(op_8158_0), 33112}, /* OR */ +{ CPUFUNC(op_8160_0), 33120}, /* OR */ +{ CPUFUNC(op_8168_0), 33128}, /* OR */ +{ CPUFUNC(op_8170_0), 33136}, /* OR */ +{ CPUFUNC(op_8178_0), 33144}, /* OR */ +{ CPUFUNC(op_8179_0), 33145}, /* OR */ +{ CPUFUNC(op_8180_0), 33152}, /* UNPK */ +{ CPUFUNC(op_8188_0), 33160}, /* UNPK */ +{ CPUFUNC(op_8190_0), 33168}, /* OR */ +{ CPUFUNC(op_8198_0), 33176}, /* OR */ +{ CPUFUNC(op_81a0_0), 33184}, /* OR */ +{ CPUFUNC(op_81a8_0), 33192}, /* OR */ +{ CPUFUNC(op_81b0_0), 33200}, /* OR */ +{ CPUFUNC(op_81b8_0), 33208}, /* OR */ +{ CPUFUNC(op_81b9_0), 33209}, /* OR */ +{ CPUFUNC(op_81c0_0), 33216}, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232}, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240}, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248}, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256}, /* DIVS */ +{ CPUFUNC(op_81f0_0), 33264}, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272}, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273}, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274}, /* DIVS */ +{ CPUFUNC(op_81fb_0), 33275}, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276}, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864}, /* SUB */ +{ CPUFUNC(op_9010_0), 36880}, /* SUB */ +{ CPUFUNC(op_9018_0), 36888}, /* SUB */ +{ CPUFUNC(op_9020_0), 36896}, /* SUB */ +{ CPUFUNC(op_9028_0), 36904}, /* SUB */ +{ CPUFUNC(op_9030_0), 36912}, /* SUB */ +{ CPUFUNC(op_9038_0), 36920}, /* SUB */ +{ CPUFUNC(op_9039_0), 36921}, /* SUB */ +{ CPUFUNC(op_903a_0), 36922}, /* SUB */ +{ CPUFUNC(op_903b_0), 36923}, /* SUB */ +{ CPUFUNC(op_903c_0), 36924}, /* SUB */ +{ CPUFUNC(op_9040_0), 36928}, /* SUB */ +{ CPUFUNC(op_9048_0), 36936}, /* SUB */ +{ CPUFUNC(op_9050_0), 36944}, /* SUB */ +{ CPUFUNC(op_9058_0), 36952}, /* SUB */ +{ CPUFUNC(op_9060_0), 36960}, /* SUB */ +{ CPUFUNC(op_9068_0), 36968}, /* SUB */ +{ CPUFUNC(op_9070_0), 36976}, /* SUB */ +{ CPUFUNC(op_9078_0), 36984}, /* SUB */ +{ CPUFUNC(op_9079_0), 36985}, /* SUB */ +{ CPUFUNC(op_907a_0), 36986}, /* SUB */ +{ CPUFUNC(op_907b_0), 36987}, /* SUB */ +{ CPUFUNC(op_907c_0), 36988}, /* SUB */ +{ CPUFUNC(op_9080_0), 36992}, /* SUB */ +{ CPUFUNC(op_9088_0), 37000}, /* SUB */ +{ CPUFUNC(op_9090_0), 37008}, /* SUB */ +{ CPUFUNC(op_9098_0), 37016}, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024}, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032}, /* SUB */ +{ CPUFUNC(op_90b0_0), 37040}, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048}, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049}, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050}, /* SUB */ +{ CPUFUNC(op_90bb_0), 37051}, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052}, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056}, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064}, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072}, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080}, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088}, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096}, /* SUBA */ +{ CPUFUNC(op_90f0_0), 37104}, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112}, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113}, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114}, /* SUBA */ +{ CPUFUNC(op_90fb_0), 37115}, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116}, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120}, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128}, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136}, /* SUB */ +{ CPUFUNC(op_9118_0), 37144}, /* SUB */ +{ CPUFUNC(op_9120_0), 37152}, /* SUB */ +{ CPUFUNC(op_9128_0), 37160}, /* SUB */ +{ CPUFUNC(op_9130_0), 37168}, /* SUB */ +{ CPUFUNC(op_9138_0), 37176}, /* SUB */ +{ CPUFUNC(op_9139_0), 37177}, /* SUB */ +{ CPUFUNC(op_9140_0), 37184}, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192}, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200}, /* SUB */ +{ CPUFUNC(op_9158_0), 37208}, /* SUB */ +{ CPUFUNC(op_9160_0), 37216}, /* SUB */ +{ CPUFUNC(op_9168_0), 37224}, /* SUB */ +{ CPUFUNC(op_9170_0), 37232}, /* SUB */ +{ CPUFUNC(op_9178_0), 37240}, /* SUB */ +{ CPUFUNC(op_9179_0), 37241}, /* SUB */ +{ CPUFUNC(op_9180_0), 37248}, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256}, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264}, /* SUB */ +{ CPUFUNC(op_9198_0), 37272}, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280}, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288}, /* SUB */ +{ CPUFUNC(op_91b0_0), 37296}, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304}, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305}, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312}, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320}, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328}, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336}, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344}, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352}, /* SUBA */ +{ CPUFUNC(op_91f0_0), 37360}, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368}, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369}, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370}, /* SUBA */ +{ CPUFUNC(op_91fb_0), 37371}, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372}, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056}, /* CMP */ +{ CPUFUNC(op_b010_0), 45072}, /* CMP */ +{ CPUFUNC(op_b018_0), 45080}, /* CMP */ +{ CPUFUNC(op_b020_0), 45088}, /* CMP */ +{ CPUFUNC(op_b028_0), 45096}, /* CMP */ +{ CPUFUNC(op_b030_0), 45104}, /* CMP */ +{ CPUFUNC(op_b038_0), 45112}, /* CMP */ +{ CPUFUNC(op_b039_0), 45113}, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114}, /* CMP */ +{ CPUFUNC(op_b03b_0), 45115}, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116}, /* CMP */ +{ CPUFUNC(op_b040_0), 45120}, /* CMP */ +{ CPUFUNC(op_b048_0), 45128}, /* CMP */ +{ CPUFUNC(op_b050_0), 45136}, /* CMP */ +{ CPUFUNC(op_b058_0), 45144}, /* CMP */ +{ CPUFUNC(op_b060_0), 45152}, /* CMP */ +{ CPUFUNC(op_b068_0), 45160}, /* CMP */ +{ CPUFUNC(op_b070_0), 45168}, /* CMP */ +{ CPUFUNC(op_b078_0), 45176}, /* CMP */ +{ CPUFUNC(op_b079_0), 45177}, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178}, /* CMP */ +{ CPUFUNC(op_b07b_0), 45179}, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180}, /* CMP */ +{ CPUFUNC(op_b080_0), 45184}, /* CMP */ +{ CPUFUNC(op_b088_0), 45192}, /* CMP */ +{ CPUFUNC(op_b090_0), 45200}, /* CMP */ +{ CPUFUNC(op_b098_0), 45208}, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216}, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224}, /* CMP */ +{ CPUFUNC(op_b0b0_0), 45232}, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240}, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241}, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242}, /* CMP */ +{ CPUFUNC(op_b0bb_0), 45243}, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244}, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248}, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256}, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264}, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272}, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280}, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288}, /* CMPA */ +{ CPUFUNC(op_b0f0_0), 45296}, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304}, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305}, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306}, /* CMPA */ +{ CPUFUNC(op_b0fb_0), 45307}, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308}, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312}, /* EOR */ +{ CPUFUNC(op_b108_0), 45320}, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328}, /* EOR */ +{ CPUFUNC(op_b118_0), 45336}, /* EOR */ +{ CPUFUNC(op_b120_0), 45344}, /* EOR */ +{ CPUFUNC(op_b128_0), 45352}, /* EOR */ +{ CPUFUNC(op_b130_0), 45360}, /* EOR */ +{ CPUFUNC(op_b138_0), 45368}, /* EOR */ +{ CPUFUNC(op_b139_0), 45369}, /* EOR */ +{ CPUFUNC(op_b140_0), 45376}, /* EOR */ +{ CPUFUNC(op_b148_0), 45384}, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392}, /* EOR */ +{ CPUFUNC(op_b158_0), 45400}, /* EOR */ +{ CPUFUNC(op_b160_0), 45408}, /* EOR */ +{ CPUFUNC(op_b168_0), 45416}, /* EOR */ +{ CPUFUNC(op_b170_0), 45424}, /* EOR */ +{ CPUFUNC(op_b178_0), 45432}, /* EOR */ +{ CPUFUNC(op_b179_0), 45433}, /* EOR */ +{ CPUFUNC(op_b180_0), 45440}, /* EOR */ +{ CPUFUNC(op_b188_0), 45448}, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456}, /* EOR */ +{ CPUFUNC(op_b198_0), 45464}, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472}, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480}, /* EOR */ +{ CPUFUNC(op_b1b0_0), 45488}, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496}, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497}, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504}, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512}, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520}, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528}, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536}, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544}, /* CMPA */ +{ CPUFUNC(op_b1f0_0), 45552}, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560}, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561}, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562}, /* CMPA */ +{ CPUFUNC(op_b1fb_0), 45563}, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564}, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152}, /* AND */ +{ CPUFUNC(op_c010_0), 49168}, /* AND */ +{ CPUFUNC(op_c018_0), 49176}, /* AND */ +{ CPUFUNC(op_c020_0), 49184}, /* AND */ +{ CPUFUNC(op_c028_0), 49192}, /* AND */ +{ CPUFUNC(op_c030_0), 49200}, /* AND */ +{ CPUFUNC(op_c038_0), 49208}, /* AND */ +{ CPUFUNC(op_c039_0), 49209}, /* AND */ +{ CPUFUNC(op_c03a_0), 49210}, /* AND */ +{ CPUFUNC(op_c03b_0), 49211}, /* AND */ +{ CPUFUNC(op_c03c_0), 49212}, /* AND */ +{ CPUFUNC(op_c040_0), 49216}, /* AND */ +{ CPUFUNC(op_c050_0), 49232}, /* AND */ +{ CPUFUNC(op_c058_0), 49240}, /* AND */ +{ CPUFUNC(op_c060_0), 49248}, /* AND */ +{ CPUFUNC(op_c068_0), 49256}, /* AND */ +{ CPUFUNC(op_c070_0), 49264}, /* AND */ +{ CPUFUNC(op_c078_0), 49272}, /* AND */ +{ CPUFUNC(op_c079_0), 49273}, /* AND */ +{ CPUFUNC(op_c07a_0), 49274}, /* AND */ +{ CPUFUNC(op_c07b_0), 49275}, /* AND */ +{ CPUFUNC(op_c07c_0), 49276}, /* AND */ +{ CPUFUNC(op_c080_0), 49280}, /* AND */ +{ CPUFUNC(op_c090_0), 49296}, /* AND */ +{ CPUFUNC(op_c098_0), 49304}, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312}, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320}, /* AND */ +{ CPUFUNC(op_c0b0_0), 49328}, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336}, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337}, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338}, /* AND */ +{ CPUFUNC(op_c0bb_0), 49339}, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340}, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344}, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360}, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368}, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376}, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384}, /* MULU */ +{ CPUFUNC(op_c0f0_0), 49392}, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400}, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401}, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402}, /* MULU */ +{ CPUFUNC(op_c0fb_0), 49403}, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404}, /* MULU */ +{ CPUFUNC(op_c100_0), 49408}, /* ABCD */ +{ CPUFUNC(op_c108_0), 49416}, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424}, /* AND */ +{ CPUFUNC(op_c118_0), 49432}, /* AND */ +{ CPUFUNC(op_c120_0), 49440}, /* AND */ +{ CPUFUNC(op_c128_0), 49448}, /* AND */ +{ CPUFUNC(op_c130_0), 49456}, /* AND */ +{ CPUFUNC(op_c138_0), 49464}, /* AND */ +{ CPUFUNC(op_c139_0), 49465}, /* AND */ +{ CPUFUNC(op_c140_0), 49472}, /* EXG */ +{ CPUFUNC(op_c148_0), 49480}, /* EXG */ +{ CPUFUNC(op_c150_0), 49488}, /* AND */ +{ CPUFUNC(op_c158_0), 49496}, /* AND */ +{ CPUFUNC(op_c160_0), 49504}, /* AND */ +{ CPUFUNC(op_c168_0), 49512}, /* AND */ +{ CPUFUNC(op_c170_0), 49520}, /* AND */ +{ CPUFUNC(op_c178_0), 49528}, /* AND */ +{ CPUFUNC(op_c179_0), 49529}, /* AND */ +{ CPUFUNC(op_c188_0), 49544}, /* EXG */ +{ CPUFUNC(op_c190_0), 49552}, /* AND */ +{ CPUFUNC(op_c198_0), 49560}, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568}, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576}, /* AND */ +{ CPUFUNC(op_c1b0_0), 49584}, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592}, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593}, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600}, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616}, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624}, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632}, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640}, /* MULS */ +{ CPUFUNC(op_c1f0_0), 49648}, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656}, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657}, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658}, /* MULS */ +{ CPUFUNC(op_c1fb_0), 49659}, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660}, /* MULS */ +{ CPUFUNC(op_d000_0), 53248}, /* ADD */ +{ CPUFUNC(op_d010_0), 53264}, /* ADD */ +{ CPUFUNC(op_d018_0), 53272}, /* ADD */ +{ CPUFUNC(op_d020_0), 53280}, /* ADD */ +{ CPUFUNC(op_d028_0), 53288}, /* ADD */ +{ CPUFUNC(op_d030_0), 53296}, /* ADD */ +{ CPUFUNC(op_d038_0), 53304}, /* ADD */ +{ CPUFUNC(op_d039_0), 53305}, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306}, /* ADD */ +{ CPUFUNC(op_d03b_0), 53307}, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308}, /* ADD */ +{ CPUFUNC(op_d040_0), 53312}, /* ADD */ +{ CPUFUNC(op_d048_0), 53320}, /* ADD */ +{ CPUFUNC(op_d050_0), 53328}, /* ADD */ +{ CPUFUNC(op_d058_0), 53336}, /* ADD */ +{ CPUFUNC(op_d060_0), 53344}, /* ADD */ +{ CPUFUNC(op_d068_0), 53352}, /* ADD */ +{ CPUFUNC(op_d070_0), 53360}, /* ADD */ +{ CPUFUNC(op_d078_0), 53368}, /* ADD */ +{ CPUFUNC(op_d079_0), 53369}, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370}, /* ADD */ +{ CPUFUNC(op_d07b_0), 53371}, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372}, /* ADD */ +{ CPUFUNC(op_d080_0), 53376}, /* ADD */ +{ CPUFUNC(op_d088_0), 53384}, /* ADD */ +{ CPUFUNC(op_d090_0), 53392}, /* ADD */ +{ CPUFUNC(op_d098_0), 53400}, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408}, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416}, /* ADD */ +{ CPUFUNC(op_d0b0_0), 53424}, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432}, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433}, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434}, /* ADD */ +{ CPUFUNC(op_d0bb_0), 53435}, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436}, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440}, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448}, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456}, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464}, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472}, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480}, /* ADDA */ +{ CPUFUNC(op_d0f0_0), 53488}, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496}, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497}, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498}, /* ADDA */ +{ CPUFUNC(op_d0fb_0), 53499}, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500}, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504}, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512}, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520}, /* ADD */ +{ CPUFUNC(op_d118_0), 53528}, /* ADD */ +{ CPUFUNC(op_d120_0), 53536}, /* ADD */ +{ CPUFUNC(op_d128_0), 53544}, /* ADD */ +{ CPUFUNC(op_d130_0), 53552}, /* ADD */ +{ CPUFUNC(op_d138_0), 53560}, /* ADD */ +{ CPUFUNC(op_d139_0), 53561}, /* ADD */ +{ CPUFUNC(op_d140_0), 53568}, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576}, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584}, /* ADD */ +{ CPUFUNC(op_d158_0), 53592}, /* ADD */ +{ CPUFUNC(op_d160_0), 53600}, /* ADD */ +{ CPUFUNC(op_d168_0), 53608}, /* ADD */ +{ CPUFUNC(op_d170_0), 53616}, /* ADD */ +{ CPUFUNC(op_d178_0), 53624}, /* ADD */ +{ CPUFUNC(op_d179_0), 53625}, /* ADD */ +{ CPUFUNC(op_d180_0), 53632}, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640}, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648}, /* ADD */ +{ CPUFUNC(op_d198_0), 53656}, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664}, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672}, /* ADD */ +{ CPUFUNC(op_d1b0_0), 53680}, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688}, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689}, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696}, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704}, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712}, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720}, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728}, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736}, /* ADDA */ +{ CPUFUNC(op_d1f0_0), 53744}, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752}, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753}, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754}, /* ADDA */ +{ CPUFUNC(op_d1fb_0), 53755}, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756}, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344}, /* ASR */ +{ CPUFUNC(op_e008_0), 57352}, /* LSR */ +{ CPUFUNC(op_e010_0), 57360}, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368}, /* ROR */ +{ CPUFUNC(op_e020_0), 57376}, /* ASR */ +{ CPUFUNC(op_e028_0), 57384}, /* LSR */ +{ CPUFUNC(op_e030_0), 57392}, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400}, /* ROR */ +{ CPUFUNC(op_e040_0), 57408}, /* ASR */ +{ CPUFUNC(op_e048_0), 57416}, /* LSR */ +{ CPUFUNC(op_e050_0), 57424}, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432}, /* ROR */ +{ CPUFUNC(op_e060_0), 57440}, /* ASR */ +{ CPUFUNC(op_e068_0), 57448}, /* LSR */ +{ CPUFUNC(op_e070_0), 57456}, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464}, /* ROR */ +{ CPUFUNC(op_e080_0), 57472}, /* ASR */ +{ CPUFUNC(op_e088_0), 57480}, /* LSR */ +{ CPUFUNC(op_e090_0), 57488}, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496}, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504}, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512}, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520}, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528}, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552}, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560}, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568}, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576}, /* ASRW */ +{ CPUFUNC(op_e0f0_0), 57584}, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592}, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593}, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600}, /* ASL */ +{ CPUFUNC(op_e108_0), 57608}, /* LSL */ +{ CPUFUNC(op_e110_0), 57616}, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624}, /* ROL */ +{ CPUFUNC(op_e120_0), 57632}, /* ASL */ +{ CPUFUNC(op_e128_0), 57640}, /* LSL */ +{ CPUFUNC(op_e130_0), 57648}, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656}, /* ROL */ +{ CPUFUNC(op_e140_0), 57664}, /* ASL */ +{ CPUFUNC(op_e148_0), 57672}, /* LSL */ +{ CPUFUNC(op_e150_0), 57680}, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688}, /* ROL */ +{ CPUFUNC(op_e160_0), 57696}, /* ASL */ +{ CPUFUNC(op_e168_0), 57704}, /* LSL */ +{ CPUFUNC(op_e170_0), 57712}, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720}, /* ROL */ +{ CPUFUNC(op_e180_0), 57728}, /* ASL */ +{ CPUFUNC(op_e188_0), 57736}, /* LSL */ +{ CPUFUNC(op_e190_0), 57744}, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752}, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760}, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768}, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776}, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784}, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808}, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816}, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824}, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832}, /* ASLW */ +{ CPUFUNC(op_e1f0_0), 57840}, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848}, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849}, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064}, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072}, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080}, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088}, /* LSRW */ +{ CPUFUNC(op_e2f0_0), 58096}, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104}, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105}, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320}, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328}, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336}, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344}, /* LSLW */ +{ CPUFUNC(op_e3f0_0), 58352}, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360}, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361}, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576}, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584}, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592}, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600}, /* ROXRW */ +{ CPUFUNC(op_e4f0_0), 58608}, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616}, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617}, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832}, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840}, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848}, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856}, /* ROXLW */ +{ CPUFUNC(op_e5f0_0), 58864}, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872}, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873}, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088}, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096}, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104}, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112}, /* RORW */ +{ CPUFUNC(op_e6f0_0), 59120}, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128}, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129}, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344}, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352}, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360}, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368}, /* ROLW */ +{ CPUFUNC(op_e7f0_0), 59376}, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384}, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385}, /* ROLW */ +{ CPUFUNC(op_e8c0_0), 59584}, /* BFTST */ +{ CPUFUNC(op_e8d0_0), 59600}, /* BFTST */ +{ CPUFUNC(op_e8e8_0), 59624}, /* BFTST */ +{ CPUFUNC(op_e8f0_0), 59632}, /* BFTST */ +{ CPUFUNC(op_e8f8_0), 59640}, /* BFTST */ +{ CPUFUNC(op_e8f9_0), 59641}, /* BFTST */ +{ CPUFUNC(op_e8fa_0), 59642}, /* BFTST */ +{ CPUFUNC(op_e8fb_0), 59643}, /* BFTST */ +{ CPUFUNC(op_e9c0_0), 59840}, /* BFEXTU */ +{ CPUFUNC(op_e9d0_0), 59856}, /* BFEXTU */ +{ CPUFUNC(op_e9e8_0), 59880}, /* BFEXTU */ +{ CPUFUNC(op_e9f0_0), 59888}, /* BFEXTU */ +{ CPUFUNC(op_e9f8_0), 59896}, /* BFEXTU */ +{ CPUFUNC(op_e9f9_0), 59897}, /* BFEXTU */ +{ CPUFUNC(op_e9fa_0), 59898}, /* BFEXTU */ +{ CPUFUNC(op_e9fb_0), 59899}, /* BFEXTU */ +{ CPUFUNC(op_eac0_0), 60096}, /* BFCHG */ +{ CPUFUNC(op_ead0_0), 60112}, /* BFCHG */ +{ CPUFUNC(op_eae8_0), 60136}, /* BFCHG */ +{ CPUFUNC(op_eaf0_0), 60144}, /* BFCHG */ +{ CPUFUNC(op_eaf8_0), 60152}, /* BFCHG */ +{ CPUFUNC(op_eaf9_0), 60153}, /* BFCHG */ +{ CPUFUNC(op_ebc0_0), 60352}, /* BFEXTS */ +{ CPUFUNC(op_ebd0_0), 60368}, /* BFEXTS */ +{ CPUFUNC(op_ebe8_0), 60392}, /* BFEXTS */ +{ CPUFUNC(op_ebf0_0), 60400}, /* BFEXTS */ +{ CPUFUNC(op_ebf8_0), 60408}, /* BFEXTS */ +{ CPUFUNC(op_ebf9_0), 60409}, /* BFEXTS */ +{ CPUFUNC(op_ebfa_0), 60410}, /* BFEXTS */ +{ CPUFUNC(op_ebfb_0), 60411}, /* BFEXTS */ +{ CPUFUNC(op_ecc0_0), 60608}, /* BFCLR */ +{ CPUFUNC(op_ecd0_0), 60624}, /* BFCLR */ +{ CPUFUNC(op_ece8_0), 60648}, /* BFCLR */ +{ CPUFUNC(op_ecf0_0), 60656}, /* BFCLR */ +{ CPUFUNC(op_ecf8_0), 60664}, /* BFCLR */ +{ CPUFUNC(op_ecf9_0), 60665}, /* BFCLR */ +{ CPUFUNC(op_edc0_0), 60864}, /* BFFFO */ +{ CPUFUNC(op_edd0_0), 60880}, /* BFFFO */ +{ CPUFUNC(op_ede8_0), 60904}, /* BFFFO */ +{ CPUFUNC(op_edf0_0), 60912}, /* BFFFO */ +{ CPUFUNC(op_edf8_0), 60920}, /* BFFFO */ +{ CPUFUNC(op_edf9_0), 60921}, /* BFFFO */ +{ CPUFUNC(op_edfa_0), 60922}, /* BFFFO */ +{ CPUFUNC(op_edfb_0), 60923}, /* BFFFO */ +{ CPUFUNC(op_eec0_0), 61120}, /* BFSET */ +{ CPUFUNC(op_eed0_0), 61136}, /* BFSET */ +{ CPUFUNC(op_eee8_0), 61160}, /* BFSET */ +{ CPUFUNC(op_eef0_0), 61168}, /* BFSET */ +{ CPUFUNC(op_eef8_0), 61176}, /* BFSET */ +{ CPUFUNC(op_eef9_0), 61177}, /* BFSET */ +{ CPUFUNC(op_efc0_0), 61376}, /* BFINS */ +{ CPUFUNC(op_efd0_0), 61392}, /* BFINS */ +{ CPUFUNC(op_efe8_0), 61416}, /* BFINS */ +{ CPUFUNC(op_eff0_0), 61424}, /* BFINS */ +{ CPUFUNC(op_eff8_0), 61432}, /* BFINS */ +{ CPUFUNC(op_eff9_0), 61433}, /* BFINS */ +{ CPUFUNC(op_f200_0), 61952}, /* FPP */ +{ CPUFUNC(op_f208_0), 61960}, /* FPP */ +{ CPUFUNC(op_f210_0), 61968}, /* FPP */ +{ CPUFUNC(op_f218_0), 61976}, /* FPP */ +{ CPUFUNC(op_f220_0), 61984}, /* FPP */ +{ CPUFUNC(op_f228_0), 61992}, /* FPP */ +{ CPUFUNC(op_f230_0), 62000}, /* FPP */ +{ CPUFUNC(op_f238_0), 62008}, /* FPP */ +{ CPUFUNC(op_f239_0), 62009}, /* FPP */ +{ CPUFUNC(op_f23a_0), 62010}, /* FPP */ +{ CPUFUNC(op_f23b_0), 62011}, /* FPP */ +{ CPUFUNC(op_f23c_0), 62012}, /* FPP */ +{ CPUFUNC(op_f240_0), 62016}, /* FScc */ +{ CPUFUNC(op_f248_0), 62024}, /* FDBcc */ +{ CPUFUNC(op_f250_0), 62032}, /* FScc */ +{ CPUFUNC(op_f258_0), 62040}, /* FScc */ +{ CPUFUNC(op_f260_0), 62048}, /* FScc */ +{ CPUFUNC(op_f268_0), 62056}, /* FScc */ +{ CPUFUNC(op_f270_0), 62064}, /* FScc */ +{ CPUFUNC(op_f278_0), 62072}, /* FScc */ +{ CPUFUNC(op_f279_0), 62073}, /* FScc */ +{ CPUFUNC(op_f27a_0), 62074}, /* FTRAPcc */ +{ CPUFUNC(op_f27b_0), 62075}, /* FTRAPcc */ +{ CPUFUNC(op_f27c_0), 62076}, /* FTRAPcc */ +{ CPUFUNC(op_f280_0), 62080}, /* FBcc */ +{ CPUFUNC(op_f2c0_0), 62144}, /* FBcc */ +{ CPUFUNC(op_f310_0), 62224}, /* FSAVE */ +{ CPUFUNC(op_f320_0), 62240}, /* FSAVE */ +{ CPUFUNC(op_f328_0), 62248}, /* FSAVE */ +{ CPUFUNC(op_f330_0), 62256}, /* FSAVE */ +{ CPUFUNC(op_f338_0), 62264}, /* FSAVE */ +{ CPUFUNC(op_f339_0), 62265}, /* FSAVE */ +{ CPUFUNC(op_f350_0), 62288}, /* FRESTORE */ +{ CPUFUNC(op_f358_0), 62296}, /* FRESTORE */ +{ CPUFUNC(op_f368_0), 62312}, /* FRESTORE */ +{ CPUFUNC(op_f370_0), 62320}, /* FRESTORE */ +{ CPUFUNC(op_f378_0), 62328}, /* FRESTORE */ +{ CPUFUNC(op_f379_0), 62329}, /* FRESTORE */ +{ CPUFUNC(op_f37a_0), 62330}, /* FRESTORE */ +{ CPUFUNC(op_f37b_0), 62331}, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl CPUFUNC(op_smalltbl_2)[] = { +{ CPUFUNC(op_0000_0), 0}, /* OR */ +{ CPUFUNC(op_0010_0), 16}, /* OR */ +{ CPUFUNC(op_0018_0), 24}, /* OR */ +{ CPUFUNC(op_0020_0), 32}, /* OR */ +{ CPUFUNC(op_0028_0), 40}, /* OR */ +{ CPUFUNC(op_0030_0), 48}, /* OR */ +{ CPUFUNC(op_0038_0), 56}, /* OR */ +{ CPUFUNC(op_0039_0), 57}, /* OR */ +{ CPUFUNC(op_003c_0), 60}, /* ORSR */ +{ CPUFUNC(op_0040_0), 64}, /* OR */ +{ CPUFUNC(op_0050_0), 80}, /* OR */ +{ CPUFUNC(op_0058_0), 88}, /* OR */ +{ CPUFUNC(op_0060_0), 96}, /* OR */ +{ CPUFUNC(op_0068_0), 104}, /* OR */ +{ CPUFUNC(op_0070_0), 112}, /* OR */ +{ CPUFUNC(op_0078_0), 120}, /* OR */ +{ CPUFUNC(op_0079_0), 121}, /* OR */ +{ CPUFUNC(op_007c_0), 124}, /* ORSR */ +{ CPUFUNC(op_0080_0), 128}, /* OR */ +{ CPUFUNC(op_0090_0), 144}, /* OR */ +{ CPUFUNC(op_0098_0), 152}, /* OR */ +{ CPUFUNC(op_00a0_0), 160}, /* OR */ +{ CPUFUNC(op_00a8_0), 168}, /* OR */ +{ CPUFUNC(op_00b0_0), 176}, /* OR */ +{ CPUFUNC(op_00b8_0), 184}, /* OR */ +{ CPUFUNC(op_00b9_0), 185}, /* OR */ +{ CPUFUNC(op_00d0_0), 208}, /* CHK2 */ +{ CPUFUNC(op_00e8_0), 232}, /* CHK2 */ +{ CPUFUNC(op_00f0_0), 240}, /* CHK2 */ +{ CPUFUNC(op_00f8_0), 248}, /* CHK2 */ +{ CPUFUNC(op_00f9_0), 249}, /* CHK2 */ +{ CPUFUNC(op_00fa_0), 250}, /* CHK2 */ +{ CPUFUNC(op_00fb_0), 251}, /* CHK2 */ +{ CPUFUNC(op_0100_0), 256}, /* BTST */ +{ CPUFUNC(op_0108_0), 264}, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272}, /* BTST */ +{ CPUFUNC(op_0118_0), 280}, /* BTST */ +{ CPUFUNC(op_0120_0), 288}, /* BTST */ +{ CPUFUNC(op_0128_0), 296}, /* BTST */ +{ CPUFUNC(op_0130_0), 304}, /* BTST */ +{ CPUFUNC(op_0138_0), 312}, /* BTST */ +{ CPUFUNC(op_0139_0), 313}, /* BTST */ +{ CPUFUNC(op_013a_0), 314}, /* BTST */ +{ CPUFUNC(op_013b_0), 315}, /* BTST */ +{ CPUFUNC(op_013c_0), 316}, /* BTST */ +{ CPUFUNC(op_0140_0), 320}, /* BCHG */ +{ CPUFUNC(op_0148_0), 328}, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336}, /* BCHG */ +{ CPUFUNC(op_0158_0), 344}, /* BCHG */ +{ CPUFUNC(op_0160_0), 352}, /* BCHG */ +{ CPUFUNC(op_0168_0), 360}, /* BCHG */ +{ CPUFUNC(op_0170_0), 368}, /* BCHG */ +{ CPUFUNC(op_0178_0), 376}, /* BCHG */ +{ CPUFUNC(op_0179_0), 377}, /* BCHG */ +{ CPUFUNC(op_017a_0), 378}, /* BCHG */ +{ CPUFUNC(op_017b_0), 379}, /* BCHG */ +{ CPUFUNC(op_0180_0), 384}, /* BCLR */ +{ CPUFUNC(op_0188_0), 392}, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400}, /* BCLR */ +{ CPUFUNC(op_0198_0), 408}, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416}, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424}, /* BCLR */ +{ CPUFUNC(op_01b0_0), 432}, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440}, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441}, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442}, /* BCLR */ +{ CPUFUNC(op_01bb_0), 443}, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448}, /* BSET */ +{ CPUFUNC(op_01c8_0), 456}, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464}, /* BSET */ +{ CPUFUNC(op_01d8_0), 472}, /* BSET */ +{ CPUFUNC(op_01e0_0), 480}, /* BSET */ +{ CPUFUNC(op_01e8_0), 488}, /* BSET */ +{ CPUFUNC(op_01f0_0), 496}, /* BSET */ +{ CPUFUNC(op_01f8_0), 504}, /* BSET */ +{ CPUFUNC(op_01f9_0), 505}, /* BSET */ +{ CPUFUNC(op_01fa_0), 506}, /* BSET */ +{ CPUFUNC(op_01fb_0), 507}, /* BSET */ +{ CPUFUNC(op_0200_0), 512}, /* AND */ +{ CPUFUNC(op_0210_0), 528}, /* AND */ +{ CPUFUNC(op_0218_0), 536}, /* AND */ +{ CPUFUNC(op_0220_0), 544}, /* AND */ +{ CPUFUNC(op_0228_0), 552}, /* AND */ +{ CPUFUNC(op_0230_0), 560}, /* AND */ +{ CPUFUNC(op_0238_0), 568}, /* AND */ +{ CPUFUNC(op_0239_0), 569}, /* AND */ +{ CPUFUNC(op_023c_0), 572}, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576}, /* AND */ +{ CPUFUNC(op_0250_0), 592}, /* AND */ +{ CPUFUNC(op_0258_0), 600}, /* AND */ +{ CPUFUNC(op_0260_0), 608}, /* AND */ +{ CPUFUNC(op_0268_0), 616}, /* AND */ +{ CPUFUNC(op_0270_0), 624}, /* AND */ +{ CPUFUNC(op_0278_0), 632}, /* AND */ +{ CPUFUNC(op_0279_0), 633}, /* AND */ +{ CPUFUNC(op_027c_0), 636}, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640}, /* AND */ +{ CPUFUNC(op_0290_0), 656}, /* AND */ +{ CPUFUNC(op_0298_0), 664}, /* AND */ +{ CPUFUNC(op_02a0_0), 672}, /* AND */ +{ CPUFUNC(op_02a8_0), 680}, /* AND */ +{ CPUFUNC(op_02b0_0), 688}, /* AND */ +{ CPUFUNC(op_02b8_0), 696}, /* AND */ +{ CPUFUNC(op_02b9_0), 697}, /* AND */ +{ CPUFUNC(op_02d0_0), 720}, /* CHK2 */ +{ CPUFUNC(op_02e8_0), 744}, /* CHK2 */ +{ CPUFUNC(op_02f0_0), 752}, /* CHK2 */ +{ CPUFUNC(op_02f8_0), 760}, /* CHK2 */ +{ CPUFUNC(op_02f9_0), 761}, /* CHK2 */ +{ CPUFUNC(op_02fa_0), 762}, /* CHK2 */ +{ CPUFUNC(op_02fb_0), 763}, /* CHK2 */ +{ CPUFUNC(op_0400_0), 1024}, /* SUB */ +{ CPUFUNC(op_0410_0), 1040}, /* SUB */ +{ CPUFUNC(op_0418_0), 1048}, /* SUB */ +{ CPUFUNC(op_0420_0), 1056}, /* SUB */ +{ CPUFUNC(op_0428_0), 1064}, /* SUB */ +{ CPUFUNC(op_0430_0), 1072}, /* SUB */ +{ CPUFUNC(op_0438_0), 1080}, /* SUB */ +{ CPUFUNC(op_0439_0), 1081}, /* SUB */ +{ CPUFUNC(op_0440_0), 1088}, /* SUB */ +{ CPUFUNC(op_0450_0), 1104}, /* SUB */ +{ CPUFUNC(op_0458_0), 1112}, /* SUB */ +{ CPUFUNC(op_0460_0), 1120}, /* SUB */ +{ CPUFUNC(op_0468_0), 1128}, /* SUB */ +{ CPUFUNC(op_0470_0), 1136}, /* SUB */ +{ CPUFUNC(op_0478_0), 1144}, /* SUB */ +{ CPUFUNC(op_0479_0), 1145}, /* SUB */ +{ CPUFUNC(op_0480_0), 1152}, /* SUB */ +{ CPUFUNC(op_0490_0), 1168}, /* SUB */ +{ CPUFUNC(op_0498_0), 1176}, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184}, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192}, /* SUB */ +{ CPUFUNC(op_04b0_0), 1200}, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208}, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209}, /* SUB */ +{ CPUFUNC(op_04d0_0), 1232}, /* CHK2 */ +{ CPUFUNC(op_04e8_0), 1256}, /* CHK2 */ +{ CPUFUNC(op_04f0_0), 1264}, /* CHK2 */ +{ CPUFUNC(op_04f8_0), 1272}, /* CHK2 */ +{ CPUFUNC(op_04f9_0), 1273}, /* CHK2 */ +{ CPUFUNC(op_04fa_0), 1274}, /* CHK2 */ +{ CPUFUNC(op_04fb_0), 1275}, /* CHK2 */ +{ CPUFUNC(op_0600_0), 1536}, /* ADD */ +{ CPUFUNC(op_0610_0), 1552}, /* ADD */ +{ CPUFUNC(op_0618_0), 1560}, /* ADD */ +{ CPUFUNC(op_0620_0), 1568}, /* ADD */ +{ CPUFUNC(op_0628_0), 1576}, /* ADD */ +{ CPUFUNC(op_0630_0), 1584}, /* ADD */ +{ CPUFUNC(op_0638_0), 1592}, /* ADD */ +{ CPUFUNC(op_0639_0), 1593}, /* ADD */ +{ CPUFUNC(op_0640_0), 1600}, /* ADD */ +{ CPUFUNC(op_0650_0), 1616}, /* ADD */ +{ CPUFUNC(op_0658_0), 1624}, /* ADD */ +{ CPUFUNC(op_0660_0), 1632}, /* ADD */ +{ CPUFUNC(op_0668_0), 1640}, /* ADD */ +{ CPUFUNC(op_0670_0), 1648}, /* ADD */ +{ CPUFUNC(op_0678_0), 1656}, /* ADD */ +{ CPUFUNC(op_0679_0), 1657}, /* ADD */ +{ CPUFUNC(op_0680_0), 1664}, /* ADD */ +{ CPUFUNC(op_0690_0), 1680}, /* ADD */ +{ CPUFUNC(op_0698_0), 1688}, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696}, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704}, /* ADD */ +{ CPUFUNC(op_06b0_0), 1712}, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720}, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721}, /* ADD */ +{ CPUFUNC(op_06c0_0), 1728}, /* RTM */ +{ CPUFUNC(op_06c8_0), 1736}, /* RTM */ +{ CPUFUNC(op_06d0_0), 1744}, /* CALLM */ +{ CPUFUNC(op_06e8_0), 1768}, /* CALLM */ +{ CPUFUNC(op_06f0_0), 1776}, /* CALLM */ +{ CPUFUNC(op_06f8_0), 1784}, /* CALLM */ +{ CPUFUNC(op_06f9_0), 1785}, /* CALLM */ +{ CPUFUNC(op_06fa_0), 1786}, /* CALLM */ +{ CPUFUNC(op_06fb_0), 1787}, /* CALLM */ +{ CPUFUNC(op_0800_0), 2048}, /* BTST */ +{ CPUFUNC(op_0810_0), 2064}, /* BTST */ +{ CPUFUNC(op_0818_0), 2072}, /* BTST */ +{ CPUFUNC(op_0820_0), 2080}, /* BTST */ +{ CPUFUNC(op_0828_0), 2088}, /* BTST */ +{ CPUFUNC(op_0830_0), 2096}, /* BTST */ +{ CPUFUNC(op_0838_0), 2104}, /* BTST */ +{ CPUFUNC(op_0839_0), 2105}, /* BTST */ +{ CPUFUNC(op_083a_0), 2106}, /* BTST */ +{ CPUFUNC(op_083b_0), 2107}, /* BTST */ +{ CPUFUNC(op_083c_0), 2108}, /* BTST */ +{ CPUFUNC(op_0840_0), 2112}, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128}, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136}, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144}, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152}, /* BCHG */ +{ CPUFUNC(op_0870_0), 2160}, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168}, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169}, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170}, /* BCHG */ +{ CPUFUNC(op_087b_0), 2171}, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176}, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192}, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200}, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208}, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216}, /* BCLR */ +{ CPUFUNC(op_08b0_0), 2224}, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232}, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233}, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234}, /* BCLR */ +{ CPUFUNC(op_08bb_0), 2235}, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240}, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256}, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264}, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272}, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280}, /* BSET */ +{ CPUFUNC(op_08f0_0), 2288}, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296}, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297}, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298}, /* BSET */ +{ CPUFUNC(op_08fb_0), 2299}, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560}, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576}, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584}, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592}, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600}, /* EOR */ +{ CPUFUNC(op_0a30_0), 2608}, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616}, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617}, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620}, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624}, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640}, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648}, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656}, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664}, /* EOR */ +{ CPUFUNC(op_0a70_0), 2672}, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680}, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681}, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684}, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688}, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704}, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712}, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720}, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728}, /* EOR */ +{ CPUFUNC(op_0ab0_0), 2736}, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744}, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745}, /* EOR */ +{ CPUFUNC(op_0ad0_0), 2768}, /* CAS */ +{ CPUFUNC(op_0ad8_0), 2776}, /* CAS */ +{ CPUFUNC(op_0ae0_0), 2784}, /* CAS */ +{ CPUFUNC(op_0ae8_0), 2792}, /* CAS */ +{ CPUFUNC(op_0af0_0), 2800}, /* CAS */ +{ CPUFUNC(op_0af8_0), 2808}, /* CAS */ +{ CPUFUNC(op_0af9_0), 2809}, /* CAS */ +{ CPUFUNC(op_0c00_0), 3072}, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088}, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096}, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104}, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112}, /* CMP */ +{ CPUFUNC(op_0c30_0), 3120}, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128}, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129}, /* CMP */ +{ CPUFUNC(op_0c3a_0), 3130}, /* CMP */ +{ CPUFUNC(op_0c3b_0), 3131}, /* CMP */ +{ CPUFUNC(op_0c40_0), 3136}, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152}, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160}, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168}, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176}, /* CMP */ +{ CPUFUNC(op_0c70_0), 3184}, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192}, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193}, /* CMP */ +{ CPUFUNC(op_0c7a_0), 3194}, /* CMP */ +{ CPUFUNC(op_0c7b_0), 3195}, /* CMP */ +{ CPUFUNC(op_0c80_0), 3200}, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216}, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224}, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232}, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240}, /* CMP */ +{ CPUFUNC(op_0cb0_0), 3248}, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256}, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257}, /* CMP */ +{ CPUFUNC(op_0cba_0), 3258}, /* CMP */ +{ CPUFUNC(op_0cbb_0), 3259}, /* CMP */ +{ CPUFUNC(op_0cd0_0), 3280}, /* CAS */ +{ CPUFUNC(op_0cd8_0), 3288}, /* CAS */ +{ CPUFUNC(op_0ce0_0), 3296}, /* CAS */ +{ CPUFUNC(op_0ce8_0), 3304}, /* CAS */ +{ CPUFUNC(op_0cf0_0), 3312}, /* CAS */ +{ CPUFUNC(op_0cf8_0), 3320}, /* CAS */ +{ CPUFUNC(op_0cf9_0), 3321}, /* CAS */ +{ CPUFUNC(op_0cfc_0), 3324}, /* CAS2 */ +{ CPUFUNC(op_0e10_0), 3600}, /* MOVES */ +{ CPUFUNC(op_0e18_0), 3608}, /* MOVES */ +{ CPUFUNC(op_0e20_0), 3616}, /* MOVES */ +{ CPUFUNC(op_0e28_0), 3624}, /* MOVES */ +{ CPUFUNC(op_0e30_0), 3632}, /* MOVES */ +{ CPUFUNC(op_0e38_0), 3640}, /* MOVES */ +{ CPUFUNC(op_0e39_0), 3641}, /* MOVES */ +{ CPUFUNC(op_0e50_0), 3664}, /* MOVES */ +{ CPUFUNC(op_0e58_0), 3672}, /* MOVES */ +{ CPUFUNC(op_0e60_0), 3680}, /* MOVES */ +{ CPUFUNC(op_0e68_0), 3688}, /* MOVES */ +{ CPUFUNC(op_0e70_0), 3696}, /* MOVES */ +{ CPUFUNC(op_0e78_0), 3704}, /* MOVES */ +{ CPUFUNC(op_0e79_0), 3705}, /* MOVES */ +{ CPUFUNC(op_0e90_0), 3728}, /* MOVES */ +{ CPUFUNC(op_0e98_0), 3736}, /* MOVES */ +{ CPUFUNC(op_0ea0_0), 3744}, /* MOVES */ +{ CPUFUNC(op_0ea8_0), 3752}, /* MOVES */ +{ CPUFUNC(op_0eb0_0), 3760}, /* MOVES */ +{ CPUFUNC(op_0eb8_0), 3768}, /* MOVES */ +{ CPUFUNC(op_0eb9_0), 3769}, /* MOVES */ +{ CPUFUNC(op_0ed0_0), 3792}, /* CAS */ +{ CPUFUNC(op_0ed8_0), 3800}, /* CAS */ +{ CPUFUNC(op_0ee0_0), 3808}, /* CAS */ +{ CPUFUNC(op_0ee8_0), 3816}, /* CAS */ +{ CPUFUNC(op_0ef0_0), 3824}, /* CAS */ +{ CPUFUNC(op_0ef8_0), 3832}, /* CAS */ +{ CPUFUNC(op_0ef9_0), 3833}, /* CAS */ +{ CPUFUNC(op_0efc_0), 3836}, /* CAS2 */ +{ CPUFUNC(op_1000_0), 4096}, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112}, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120}, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128}, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136}, /* MOVE */ +{ CPUFUNC(op_1030_0), 4144}, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152}, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153}, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154}, /* MOVE */ +{ CPUFUNC(op_103b_0), 4155}, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156}, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224}, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240}, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248}, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256}, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264}, /* MOVE */ +{ CPUFUNC(op_10b0_0), 4272}, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280}, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281}, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282}, /* MOVE */ +{ CPUFUNC(op_10bb_0), 4283}, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284}, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288}, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304}, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312}, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320}, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328}, /* MOVE */ +{ CPUFUNC(op_10f0_0), 4336}, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344}, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345}, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346}, /* MOVE */ +{ CPUFUNC(op_10fb_0), 4347}, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348}, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352}, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368}, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376}, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384}, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392}, /* MOVE */ +{ CPUFUNC(op_1130_0), 4400}, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408}, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409}, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410}, /* MOVE */ +{ CPUFUNC(op_113b_0), 4411}, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412}, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416}, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432}, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440}, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448}, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456}, /* MOVE */ +{ CPUFUNC(op_1170_0), 4464}, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472}, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473}, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474}, /* MOVE */ +{ CPUFUNC(op_117b_0), 4475}, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476}, /* MOVE */ +{ CPUFUNC(op_1180_0), 4480}, /* MOVE */ +{ CPUFUNC(op_1190_0), 4496}, /* MOVE */ +{ CPUFUNC(op_1198_0), 4504}, /* MOVE */ +{ CPUFUNC(op_11a0_0), 4512}, /* MOVE */ +{ CPUFUNC(op_11a8_0), 4520}, /* MOVE */ +{ CPUFUNC(op_11b0_0), 4528}, /* MOVE */ +{ CPUFUNC(op_11b8_0), 4536}, /* MOVE */ +{ CPUFUNC(op_11b9_0), 4537}, /* MOVE */ +{ CPUFUNC(op_11ba_0), 4538}, /* MOVE */ +{ CPUFUNC(op_11bb_0), 4539}, /* MOVE */ +{ CPUFUNC(op_11bc_0), 4540}, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544}, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560}, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568}, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576}, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584}, /* MOVE */ +{ CPUFUNC(op_11f0_0), 4592}, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600}, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601}, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602}, /* MOVE */ +{ CPUFUNC(op_11fb_0), 4603}, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604}, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056}, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072}, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080}, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088}, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096}, /* MOVE */ +{ CPUFUNC(op_13f0_0), 5104}, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112}, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113}, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114}, /* MOVE */ +{ CPUFUNC(op_13fb_0), 5115}, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116}, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192}, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200}, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208}, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216}, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224}, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232}, /* MOVE */ +{ CPUFUNC(op_2030_0), 8240}, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248}, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249}, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250}, /* MOVE */ +{ CPUFUNC(op_203b_0), 8251}, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252}, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256}, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264}, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272}, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280}, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288}, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296}, /* MOVEA */ +{ CPUFUNC(op_2070_0), 8304}, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312}, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313}, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314}, /* MOVEA */ +{ CPUFUNC(op_207b_0), 8315}, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316}, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320}, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328}, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336}, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344}, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352}, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360}, /* MOVE */ +{ CPUFUNC(op_20b0_0), 8368}, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376}, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377}, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378}, /* MOVE */ +{ CPUFUNC(op_20bb_0), 8379}, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380}, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384}, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392}, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400}, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408}, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416}, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424}, /* MOVE */ +{ CPUFUNC(op_20f0_0), 8432}, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440}, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441}, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442}, /* MOVE */ +{ CPUFUNC(op_20fb_0), 8443}, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444}, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448}, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456}, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464}, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472}, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480}, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488}, /* MOVE */ +{ CPUFUNC(op_2130_0), 8496}, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504}, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505}, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506}, /* MOVE */ +{ CPUFUNC(op_213b_0), 8507}, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508}, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512}, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520}, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528}, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536}, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544}, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552}, /* MOVE */ +{ CPUFUNC(op_2170_0), 8560}, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568}, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569}, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570}, /* MOVE */ +{ CPUFUNC(op_217b_0), 8571}, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572}, /* MOVE */ +{ CPUFUNC(op_2180_0), 8576}, /* MOVE */ +{ CPUFUNC(op_2188_0), 8584}, /* MOVE */ +{ CPUFUNC(op_2190_0), 8592}, /* MOVE */ +{ CPUFUNC(op_2198_0), 8600}, /* MOVE */ +{ CPUFUNC(op_21a0_0), 8608}, /* MOVE */ +{ CPUFUNC(op_21a8_0), 8616}, /* MOVE */ +{ CPUFUNC(op_21b0_0), 8624}, /* MOVE */ +{ CPUFUNC(op_21b8_0), 8632}, /* MOVE */ +{ CPUFUNC(op_21b9_0), 8633}, /* MOVE */ +{ CPUFUNC(op_21ba_0), 8634}, /* MOVE */ +{ CPUFUNC(op_21bb_0), 8635}, /* MOVE */ +{ CPUFUNC(op_21bc_0), 8636}, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640}, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648}, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656}, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664}, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672}, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680}, /* MOVE */ +{ CPUFUNC(op_21f0_0), 8688}, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696}, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697}, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698}, /* MOVE */ +{ CPUFUNC(op_21fb_0), 8699}, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700}, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152}, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160}, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168}, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176}, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184}, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192}, /* MOVE */ +{ CPUFUNC(op_23f0_0), 9200}, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208}, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209}, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210}, /* MOVE */ +{ CPUFUNC(op_23fb_0), 9211}, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212}, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288}, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296}, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304}, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312}, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320}, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328}, /* MOVE */ +{ CPUFUNC(op_3030_0), 12336}, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344}, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345}, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346}, /* MOVE */ +{ CPUFUNC(op_303b_0), 12347}, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348}, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352}, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360}, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368}, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376}, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384}, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392}, /* MOVEA */ +{ CPUFUNC(op_3070_0), 12400}, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408}, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409}, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410}, /* MOVEA */ +{ CPUFUNC(op_307b_0), 12411}, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412}, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416}, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424}, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432}, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440}, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448}, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456}, /* MOVE */ +{ CPUFUNC(op_30b0_0), 12464}, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472}, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473}, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474}, /* MOVE */ +{ CPUFUNC(op_30bb_0), 12475}, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476}, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480}, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488}, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496}, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504}, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512}, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520}, /* MOVE */ +{ CPUFUNC(op_30f0_0), 12528}, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536}, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537}, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538}, /* MOVE */ +{ CPUFUNC(op_30fb_0), 12539}, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540}, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544}, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552}, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560}, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568}, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576}, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584}, /* MOVE */ +{ CPUFUNC(op_3130_0), 12592}, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600}, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601}, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602}, /* MOVE */ +{ CPUFUNC(op_313b_0), 12603}, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604}, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608}, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616}, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624}, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632}, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640}, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648}, /* MOVE */ +{ CPUFUNC(op_3170_0), 12656}, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664}, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665}, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666}, /* MOVE */ +{ CPUFUNC(op_317b_0), 12667}, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668}, /* MOVE */ +{ CPUFUNC(op_3180_0), 12672}, /* MOVE */ +{ CPUFUNC(op_3188_0), 12680}, /* MOVE */ +{ CPUFUNC(op_3190_0), 12688}, /* MOVE */ +{ CPUFUNC(op_3198_0), 12696}, /* MOVE */ +{ CPUFUNC(op_31a0_0), 12704}, /* MOVE */ +{ CPUFUNC(op_31a8_0), 12712}, /* MOVE */ +{ CPUFUNC(op_31b0_0), 12720}, /* MOVE */ +{ CPUFUNC(op_31b8_0), 12728}, /* MOVE */ +{ CPUFUNC(op_31b9_0), 12729}, /* MOVE */ +{ CPUFUNC(op_31ba_0), 12730}, /* MOVE */ +{ CPUFUNC(op_31bb_0), 12731}, /* MOVE */ +{ CPUFUNC(op_31bc_0), 12732}, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736}, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744}, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752}, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760}, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768}, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776}, /* MOVE */ +{ CPUFUNC(op_31f0_0), 12784}, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792}, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793}, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794}, /* MOVE */ +{ CPUFUNC(op_31fb_0), 12795}, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796}, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248}, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256}, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264}, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272}, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280}, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288}, /* MOVE */ +{ CPUFUNC(op_33f0_0), 13296}, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304}, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305}, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306}, /* MOVE */ +{ CPUFUNC(op_33fb_0), 13307}, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308}, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384}, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400}, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408}, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416}, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424}, /* NEGX */ +{ CPUFUNC(op_4030_0), 16432}, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440}, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441}, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448}, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464}, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472}, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480}, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488}, /* NEGX */ +{ CPUFUNC(op_4070_0), 16496}, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504}, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505}, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512}, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528}, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536}, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544}, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552}, /* NEGX */ +{ CPUFUNC(op_40b0_0), 16560}, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568}, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569}, /* NEGX */ +{ CPUFUNC(op_40c0_0), 16576}, /* MVSR2 */ +{ CPUFUNC(op_40d0_0), 16592}, /* MVSR2 */ +{ CPUFUNC(op_40d8_0), 16600}, /* MVSR2 */ +{ CPUFUNC(op_40e0_0), 16608}, /* MVSR2 */ +{ CPUFUNC(op_40e8_0), 16616}, /* MVSR2 */ +{ CPUFUNC(op_40f0_0), 16624}, /* MVSR2 */ +{ CPUFUNC(op_40f8_0), 16632}, /* MVSR2 */ +{ CPUFUNC(op_40f9_0), 16633}, /* MVSR2 */ +{ CPUFUNC(op_4100_0), 16640}, /* CHK */ +{ CPUFUNC(op_4110_0), 16656}, /* CHK */ +{ CPUFUNC(op_4118_0), 16664}, /* CHK */ +{ CPUFUNC(op_4120_0), 16672}, /* CHK */ +{ CPUFUNC(op_4128_0), 16680}, /* CHK */ +{ CPUFUNC(op_4130_0), 16688}, /* CHK */ +{ CPUFUNC(op_4138_0), 16696}, /* CHK */ +{ CPUFUNC(op_4139_0), 16697}, /* CHK */ +{ CPUFUNC(op_413a_0), 16698}, /* CHK */ +{ CPUFUNC(op_413b_0), 16699}, /* CHK */ +{ CPUFUNC(op_413c_0), 16700}, /* CHK */ +{ CPUFUNC(op_4180_0), 16768}, /* CHK */ +{ CPUFUNC(op_4190_0), 16784}, /* CHK */ +{ CPUFUNC(op_4198_0), 16792}, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800}, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808}, /* CHK */ +{ CPUFUNC(op_41b0_0), 16816}, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824}, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825}, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826}, /* CHK */ +{ CPUFUNC(op_41bb_0), 16827}, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828}, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848}, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872}, /* LEA */ +{ CPUFUNC(op_41f0_0), 16880}, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888}, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889}, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890}, /* LEA */ +{ CPUFUNC(op_41fb_0), 16891}, /* LEA */ +{ CPUFUNC(op_4200_0), 16896}, /* CLR */ +{ CPUFUNC(op_4210_0), 16912}, /* CLR */ +{ CPUFUNC(op_4218_0), 16920}, /* CLR */ +{ CPUFUNC(op_4220_0), 16928}, /* CLR */ +{ CPUFUNC(op_4228_0), 16936}, /* CLR */ +{ CPUFUNC(op_4230_0), 16944}, /* CLR */ +{ CPUFUNC(op_4238_0), 16952}, /* CLR */ +{ CPUFUNC(op_4239_0), 16953}, /* CLR */ +{ CPUFUNC(op_4240_0), 16960}, /* CLR */ +{ CPUFUNC(op_4250_0), 16976}, /* CLR */ +{ CPUFUNC(op_4258_0), 16984}, /* CLR */ +{ CPUFUNC(op_4260_0), 16992}, /* CLR */ +{ CPUFUNC(op_4268_0), 17000}, /* CLR */ +{ CPUFUNC(op_4270_0), 17008}, /* CLR */ +{ CPUFUNC(op_4278_0), 17016}, /* CLR */ +{ CPUFUNC(op_4279_0), 17017}, /* CLR */ +{ CPUFUNC(op_4280_0), 17024}, /* CLR */ +{ CPUFUNC(op_4290_0), 17040}, /* CLR */ +{ CPUFUNC(op_4298_0), 17048}, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056}, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064}, /* CLR */ +{ CPUFUNC(op_42b0_0), 17072}, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080}, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081}, /* CLR */ +{ CPUFUNC(op_42c0_0), 17088}, /* MVSR2 */ +{ CPUFUNC(op_42d0_0), 17104}, /* MVSR2 */ +{ CPUFUNC(op_42d8_0), 17112}, /* MVSR2 */ +{ CPUFUNC(op_42e0_0), 17120}, /* MVSR2 */ +{ CPUFUNC(op_42e8_0), 17128}, /* MVSR2 */ +{ CPUFUNC(op_42f0_0), 17136}, /* MVSR2 */ +{ CPUFUNC(op_42f8_0), 17144}, /* MVSR2 */ +{ CPUFUNC(op_42f9_0), 17145}, /* MVSR2 */ +{ CPUFUNC(op_4400_0), 17408}, /* NEG */ +{ CPUFUNC(op_4410_0), 17424}, /* NEG */ +{ CPUFUNC(op_4418_0), 17432}, /* NEG */ +{ CPUFUNC(op_4420_0), 17440}, /* NEG */ +{ CPUFUNC(op_4428_0), 17448}, /* NEG */ +{ CPUFUNC(op_4430_0), 17456}, /* NEG */ +{ CPUFUNC(op_4438_0), 17464}, /* NEG */ +{ CPUFUNC(op_4439_0), 17465}, /* NEG */ +{ CPUFUNC(op_4440_0), 17472}, /* NEG */ +{ CPUFUNC(op_4450_0), 17488}, /* NEG */ +{ CPUFUNC(op_4458_0), 17496}, /* NEG */ +{ CPUFUNC(op_4460_0), 17504}, /* NEG */ +{ CPUFUNC(op_4468_0), 17512}, /* NEG */ +{ CPUFUNC(op_4470_0), 17520}, /* NEG */ +{ CPUFUNC(op_4478_0), 17528}, /* NEG */ +{ CPUFUNC(op_4479_0), 17529}, /* NEG */ +{ CPUFUNC(op_4480_0), 17536}, /* NEG */ +{ CPUFUNC(op_4490_0), 17552}, /* NEG */ +{ CPUFUNC(op_4498_0), 17560}, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568}, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576}, /* NEG */ +{ CPUFUNC(op_44b0_0), 17584}, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592}, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593}, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600}, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616}, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624}, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632}, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640}, /* MV2SR */ +{ CPUFUNC(op_44f0_0), 17648}, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656}, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657}, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658}, /* MV2SR */ +{ CPUFUNC(op_44fb_0), 17659}, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660}, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920}, /* NOT */ +{ CPUFUNC(op_4610_0), 17936}, /* NOT */ +{ CPUFUNC(op_4618_0), 17944}, /* NOT */ +{ CPUFUNC(op_4620_0), 17952}, /* NOT */ +{ CPUFUNC(op_4628_0), 17960}, /* NOT */ +{ CPUFUNC(op_4630_0), 17968}, /* NOT */ +{ CPUFUNC(op_4638_0), 17976}, /* NOT */ +{ CPUFUNC(op_4639_0), 17977}, /* NOT */ +{ CPUFUNC(op_4640_0), 17984}, /* NOT */ +{ CPUFUNC(op_4650_0), 18000}, /* NOT */ +{ CPUFUNC(op_4658_0), 18008}, /* NOT */ +{ CPUFUNC(op_4660_0), 18016}, /* NOT */ +{ CPUFUNC(op_4668_0), 18024}, /* NOT */ +{ CPUFUNC(op_4670_0), 18032}, /* NOT */ +{ CPUFUNC(op_4678_0), 18040}, /* NOT */ +{ CPUFUNC(op_4679_0), 18041}, /* NOT */ +{ CPUFUNC(op_4680_0), 18048}, /* NOT */ +{ CPUFUNC(op_4690_0), 18064}, /* NOT */ +{ CPUFUNC(op_4698_0), 18072}, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080}, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088}, /* NOT */ +{ CPUFUNC(op_46b0_0), 18096}, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104}, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105}, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112}, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128}, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136}, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144}, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152}, /* MV2SR */ +{ CPUFUNC(op_46f0_0), 18160}, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168}, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169}, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170}, /* MV2SR */ +{ CPUFUNC(op_46fb_0), 18171}, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172}, /* MV2SR */ +{ CPUFUNC(op_4800_0), 18432}, /* NBCD */ +{ CPUFUNC(op_4808_0), 18440}, /* LINK */ +{ CPUFUNC(op_4810_0), 18448}, /* NBCD */ +{ CPUFUNC(op_4818_0), 18456}, /* NBCD */ +{ CPUFUNC(op_4820_0), 18464}, /* NBCD */ +{ CPUFUNC(op_4828_0), 18472}, /* NBCD */ +{ CPUFUNC(op_4830_0), 18480}, /* NBCD */ +{ CPUFUNC(op_4838_0), 18488}, /* NBCD */ +{ CPUFUNC(op_4839_0), 18489}, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496}, /* SWAP */ +{ CPUFUNC(op_4848_0), 18504}, /* BKPT */ +{ CPUFUNC(op_4850_0), 18512}, /* PEA */ +{ CPUFUNC(op_4868_0), 18536}, /* PEA */ +{ CPUFUNC(op_4870_0), 18544}, /* PEA */ +{ CPUFUNC(op_4878_0), 18552}, /* PEA */ +{ CPUFUNC(op_4879_0), 18553}, /* PEA */ +{ CPUFUNC(op_487a_0), 18554}, /* PEA */ +{ CPUFUNC(op_487b_0), 18555}, /* PEA */ +{ CPUFUNC(op_4880_0), 18560}, /* EXT */ +{ CPUFUNC(op_4890_0), 18576}, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592}, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600}, /* MVMLE */ +{ CPUFUNC(op_48b0_0), 18608}, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616}, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617}, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624}, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640}, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656}, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664}, /* MVMLE */ +{ CPUFUNC(op_48f0_0), 18672}, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680}, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681}, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880}, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944}, /* TST */ +{ CPUFUNC(op_4a10_0), 18960}, /* TST */ +{ CPUFUNC(op_4a18_0), 18968}, /* TST */ +{ CPUFUNC(op_4a20_0), 18976}, /* TST */ +{ CPUFUNC(op_4a28_0), 18984}, /* TST */ +{ CPUFUNC(op_4a30_0), 18992}, /* TST */ +{ CPUFUNC(op_4a38_0), 19000}, /* TST */ +{ CPUFUNC(op_4a39_0), 19001}, /* TST */ +{ CPUFUNC(op_4a3a_0), 19002}, /* TST */ +{ CPUFUNC(op_4a3b_0), 19003}, /* TST */ +{ CPUFUNC(op_4a3c_0), 19004}, /* TST */ +{ CPUFUNC(op_4a40_0), 19008}, /* TST */ +{ CPUFUNC(op_4a48_0), 19016}, /* TST */ +{ CPUFUNC(op_4a50_0), 19024}, /* TST */ +{ CPUFUNC(op_4a58_0), 19032}, /* TST */ +{ CPUFUNC(op_4a60_0), 19040}, /* TST */ +{ CPUFUNC(op_4a68_0), 19048}, /* TST */ +{ CPUFUNC(op_4a70_0), 19056}, /* TST */ +{ CPUFUNC(op_4a78_0), 19064}, /* TST */ +{ CPUFUNC(op_4a79_0), 19065}, /* TST */ +{ CPUFUNC(op_4a7a_0), 19066}, /* TST */ +{ CPUFUNC(op_4a7b_0), 19067}, /* TST */ +{ CPUFUNC(op_4a7c_0), 19068}, /* TST */ +{ CPUFUNC(op_4a80_0), 19072}, /* TST */ +{ CPUFUNC(op_4a88_0), 19080}, /* TST */ +{ CPUFUNC(op_4a90_0), 19088}, /* TST */ +{ CPUFUNC(op_4a98_0), 19096}, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104}, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112}, /* TST */ +{ CPUFUNC(op_4ab0_0), 19120}, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128}, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129}, /* TST */ +{ CPUFUNC(op_4aba_0), 19130}, /* TST */ +{ CPUFUNC(op_4abb_0), 19131}, /* TST */ +{ CPUFUNC(op_4abc_0), 19132}, /* TST */ +{ CPUFUNC(op_4ac0_0), 19136}, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152}, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160}, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168}, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176}, /* TAS */ +{ CPUFUNC(op_4af0_0), 19184}, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192}, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193}, /* TAS */ +{ CPUFUNC(op_4c00_0), 19456}, /* MULL */ +{ CPUFUNC(op_4c10_0), 19472}, /* MULL */ +{ CPUFUNC(op_4c18_0), 19480}, /* MULL */ +{ CPUFUNC(op_4c20_0), 19488}, /* MULL */ +{ CPUFUNC(op_4c28_0), 19496}, /* MULL */ +{ CPUFUNC(op_4c30_0), 19504}, /* MULL */ +{ CPUFUNC(op_4c38_0), 19512}, /* MULL */ +{ CPUFUNC(op_4c39_0), 19513}, /* MULL */ +{ CPUFUNC(op_4c3a_0), 19514}, /* MULL */ +{ CPUFUNC(op_4c3b_0), 19515}, /* MULL */ +{ CPUFUNC(op_4c3c_0), 19516}, /* MULL */ +{ CPUFUNC(op_4c40_0), 19520}, /* DIVL */ +{ CPUFUNC(op_4c50_0), 19536}, /* DIVL */ +{ CPUFUNC(op_4c58_0), 19544}, /* DIVL */ +{ CPUFUNC(op_4c60_0), 19552}, /* DIVL */ +{ CPUFUNC(op_4c68_0), 19560}, /* DIVL */ +{ CPUFUNC(op_4c70_0), 19568}, /* DIVL */ +{ CPUFUNC(op_4c78_0), 19576}, /* DIVL */ +{ CPUFUNC(op_4c79_0), 19577}, /* DIVL */ +{ CPUFUNC(op_4c7a_0), 19578}, /* DIVL */ +{ CPUFUNC(op_4c7b_0), 19579}, /* DIVL */ +{ CPUFUNC(op_4c7c_0), 19580}, /* DIVL */ +{ CPUFUNC(op_4c90_0), 19600}, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608}, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624}, /* MVMEL */ +{ CPUFUNC(op_4cb0_0), 19632}, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640}, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641}, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642}, /* MVMEL */ +{ CPUFUNC(op_4cbb_0), 19643}, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664}, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672}, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688}, /* MVMEL */ +{ CPUFUNC(op_4cf0_0), 19696}, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704}, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705}, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706}, /* MVMEL */ +{ CPUFUNC(op_4cfb_0), 19707}, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032}, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048}, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056}, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064}, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072}, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080}, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081}, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082}, /* STOP */ +{ CPUFUNC(op_4e73_0), 20083}, /* RTE */ +{ CPUFUNC(op_4e74_0), 20084}, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085}, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086}, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087}, /* RTR */ +{ CPUFUNC(op_4e7a_0), 20090}, /* MOVEC2 */ +{ CPUFUNC(op_4e7b_0), 20091}, /* MOVE2C */ +{ CPUFUNC(op_4e90_0), 20112}, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136}, /* JSR */ +{ CPUFUNC(op_4eb0_0), 20144}, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152}, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153}, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154}, /* JSR */ +{ CPUFUNC(op_4ebb_0), 20155}, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176}, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200}, /* JMP */ +{ CPUFUNC(op_4ef0_0), 20208}, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216}, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217}, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218}, /* JMP */ +{ CPUFUNC(op_4efb_0), 20219}, /* JMP */ +{ CPUFUNC(op_5000_0), 20480}, /* ADD */ +{ CPUFUNC(op_5010_0), 20496}, /* ADD */ +{ CPUFUNC(op_5018_0), 20504}, /* ADD */ +{ CPUFUNC(op_5020_0), 20512}, /* ADD */ +{ CPUFUNC(op_5028_0), 20520}, /* ADD */ +{ CPUFUNC(op_5030_0), 20528}, /* ADD */ +{ CPUFUNC(op_5038_0), 20536}, /* ADD */ +{ CPUFUNC(op_5039_0), 20537}, /* ADD */ +{ CPUFUNC(op_5040_0), 20544}, /* ADD */ +{ CPUFUNC(op_5048_0), 20552}, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560}, /* ADD */ +{ CPUFUNC(op_5058_0), 20568}, /* ADD */ +{ CPUFUNC(op_5060_0), 20576}, /* ADD */ +{ CPUFUNC(op_5068_0), 20584}, /* ADD */ +{ CPUFUNC(op_5070_0), 20592}, /* ADD */ +{ CPUFUNC(op_5078_0), 20600}, /* ADD */ +{ CPUFUNC(op_5079_0), 20601}, /* ADD */ +{ CPUFUNC(op_5080_0), 20608}, /* ADD */ +{ CPUFUNC(op_5088_0), 20616}, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624}, /* ADD */ +{ CPUFUNC(op_5098_0), 20632}, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640}, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648}, /* ADD */ +{ CPUFUNC(op_50b0_0), 20656}, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664}, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665}, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672}, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680}, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688}, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696}, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704}, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712}, /* Scc */ +{ CPUFUNC(op_50f0_0), 20720}, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728}, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729}, /* Scc */ +{ CPUFUNC(op_50fa_0), 20730}, /* TRAPcc */ +{ CPUFUNC(op_50fb_0), 20731}, /* TRAPcc */ +{ CPUFUNC(op_50fc_0), 20732}, /* TRAPcc */ +{ CPUFUNC(op_5100_0), 20736}, /* SUB */ +{ CPUFUNC(op_5110_0), 20752}, /* SUB */ +{ CPUFUNC(op_5118_0), 20760}, /* SUB */ +{ CPUFUNC(op_5120_0), 20768}, /* SUB */ +{ CPUFUNC(op_5128_0), 20776}, /* SUB */ +{ CPUFUNC(op_5130_0), 20784}, /* SUB */ +{ CPUFUNC(op_5138_0), 20792}, /* SUB */ +{ CPUFUNC(op_5139_0), 20793}, /* SUB */ +{ CPUFUNC(op_5140_0), 20800}, /* SUB */ +{ CPUFUNC(op_5148_0), 20808}, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816}, /* SUB */ +{ CPUFUNC(op_5158_0), 20824}, /* SUB */ +{ CPUFUNC(op_5160_0), 20832}, /* SUB */ +{ CPUFUNC(op_5168_0), 20840}, /* SUB */ +{ CPUFUNC(op_5170_0), 20848}, /* SUB */ +{ CPUFUNC(op_5178_0), 20856}, /* SUB */ +{ CPUFUNC(op_5179_0), 20857}, /* SUB */ +{ CPUFUNC(op_5180_0), 20864}, /* SUB */ +{ CPUFUNC(op_5188_0), 20872}, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880}, /* SUB */ +{ CPUFUNC(op_5198_0), 20888}, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896}, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904}, /* SUB */ +{ CPUFUNC(op_51b0_0), 20912}, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920}, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921}, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928}, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936}, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944}, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952}, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960}, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968}, /* Scc */ +{ CPUFUNC(op_51f0_0), 20976}, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984}, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985}, /* Scc */ +{ CPUFUNC(op_51fa_0), 20986}, /* TRAPcc */ +{ CPUFUNC(op_51fb_0), 20987}, /* TRAPcc */ +{ CPUFUNC(op_51fc_0), 20988}, /* TRAPcc */ +{ CPUFUNC(op_52c0_0), 21184}, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192}, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200}, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208}, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216}, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224}, /* Scc */ +{ CPUFUNC(op_52f0_0), 21232}, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240}, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241}, /* Scc */ +{ CPUFUNC(op_52fa_0), 21242}, /* TRAPcc */ +{ CPUFUNC(op_52fb_0), 21243}, /* TRAPcc */ +{ CPUFUNC(op_52fc_0), 21244}, /* TRAPcc */ +{ CPUFUNC(op_53c0_0), 21440}, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448}, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456}, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464}, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472}, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480}, /* Scc */ +{ CPUFUNC(op_53f0_0), 21488}, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496}, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497}, /* Scc */ +{ CPUFUNC(op_53fa_0), 21498}, /* TRAPcc */ +{ CPUFUNC(op_53fb_0), 21499}, /* TRAPcc */ +{ CPUFUNC(op_53fc_0), 21500}, /* TRAPcc */ +{ CPUFUNC(op_54c0_0), 21696}, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704}, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712}, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720}, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728}, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736}, /* Scc */ +{ CPUFUNC(op_54f0_0), 21744}, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752}, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753}, /* Scc */ +{ CPUFUNC(op_54fa_0), 21754}, /* TRAPcc */ +{ CPUFUNC(op_54fb_0), 21755}, /* TRAPcc */ +{ CPUFUNC(op_54fc_0), 21756}, /* TRAPcc */ +{ CPUFUNC(op_55c0_0), 21952}, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960}, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968}, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976}, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984}, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992}, /* Scc */ +{ CPUFUNC(op_55f0_0), 22000}, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008}, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009}, /* Scc */ +{ CPUFUNC(op_55fa_0), 22010}, /* TRAPcc */ +{ CPUFUNC(op_55fb_0), 22011}, /* TRAPcc */ +{ CPUFUNC(op_55fc_0), 22012}, /* TRAPcc */ +{ CPUFUNC(op_56c0_0), 22208}, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216}, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224}, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232}, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240}, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248}, /* Scc */ +{ CPUFUNC(op_56f0_0), 22256}, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264}, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265}, /* Scc */ +{ CPUFUNC(op_56fa_0), 22266}, /* TRAPcc */ +{ CPUFUNC(op_56fb_0), 22267}, /* TRAPcc */ +{ CPUFUNC(op_56fc_0), 22268}, /* TRAPcc */ +{ CPUFUNC(op_57c0_0), 22464}, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472}, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480}, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488}, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496}, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504}, /* Scc */ +{ CPUFUNC(op_57f0_0), 22512}, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520}, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521}, /* Scc */ +{ CPUFUNC(op_57fa_0), 22522}, /* TRAPcc */ +{ CPUFUNC(op_57fb_0), 22523}, /* TRAPcc */ +{ CPUFUNC(op_57fc_0), 22524}, /* TRAPcc */ +{ CPUFUNC(op_58c0_0), 22720}, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728}, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736}, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744}, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752}, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760}, /* Scc */ +{ CPUFUNC(op_58f0_0), 22768}, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776}, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777}, /* Scc */ +{ CPUFUNC(op_58fa_0), 22778}, /* TRAPcc */ +{ CPUFUNC(op_58fb_0), 22779}, /* TRAPcc */ +{ CPUFUNC(op_58fc_0), 22780}, /* TRAPcc */ +{ CPUFUNC(op_59c0_0), 22976}, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984}, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992}, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000}, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008}, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016}, /* Scc */ +{ CPUFUNC(op_59f0_0), 23024}, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032}, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033}, /* Scc */ +{ CPUFUNC(op_59fa_0), 23034}, /* TRAPcc */ +{ CPUFUNC(op_59fb_0), 23035}, /* TRAPcc */ +{ CPUFUNC(op_59fc_0), 23036}, /* TRAPcc */ +{ CPUFUNC(op_5ac0_0), 23232}, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240}, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248}, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256}, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264}, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272}, /* Scc */ +{ CPUFUNC(op_5af0_0), 23280}, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288}, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289}, /* Scc */ +{ CPUFUNC(op_5afa_0), 23290}, /* TRAPcc */ +{ CPUFUNC(op_5afb_0), 23291}, /* TRAPcc */ +{ CPUFUNC(op_5afc_0), 23292}, /* TRAPcc */ +{ CPUFUNC(op_5bc0_0), 23488}, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496}, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504}, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512}, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520}, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528}, /* Scc */ +{ CPUFUNC(op_5bf0_0), 23536}, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544}, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545}, /* Scc */ +{ CPUFUNC(op_5bfa_0), 23546}, /* TRAPcc */ +{ CPUFUNC(op_5bfb_0), 23547}, /* TRAPcc */ +{ CPUFUNC(op_5bfc_0), 23548}, /* TRAPcc */ +{ CPUFUNC(op_5cc0_0), 23744}, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752}, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760}, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768}, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776}, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784}, /* Scc */ +{ CPUFUNC(op_5cf0_0), 23792}, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800}, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801}, /* Scc */ +{ CPUFUNC(op_5cfa_0), 23802}, /* TRAPcc */ +{ CPUFUNC(op_5cfb_0), 23803}, /* TRAPcc */ +{ CPUFUNC(op_5cfc_0), 23804}, /* TRAPcc */ +{ CPUFUNC(op_5dc0_0), 24000}, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008}, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016}, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024}, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032}, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040}, /* Scc */ +{ CPUFUNC(op_5df0_0), 24048}, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056}, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057}, /* Scc */ +{ CPUFUNC(op_5dfa_0), 24058}, /* TRAPcc */ +{ CPUFUNC(op_5dfb_0), 24059}, /* TRAPcc */ +{ CPUFUNC(op_5dfc_0), 24060}, /* TRAPcc */ +{ CPUFUNC(op_5ec0_0), 24256}, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264}, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272}, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280}, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288}, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296}, /* Scc */ +{ CPUFUNC(op_5ef0_0), 24304}, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312}, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313}, /* Scc */ +{ CPUFUNC(op_5efa_0), 24314}, /* TRAPcc */ +{ CPUFUNC(op_5efb_0), 24315}, /* TRAPcc */ +{ CPUFUNC(op_5efc_0), 24316}, /* TRAPcc */ +{ CPUFUNC(op_5fc0_0), 24512}, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520}, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528}, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536}, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544}, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552}, /* Scc */ +{ CPUFUNC(op_5ff0_0), 24560}, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568}, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569}, /* Scc */ +{ CPUFUNC(op_5ffa_0), 24570}, /* TRAPcc */ +{ CPUFUNC(op_5ffb_0), 24571}, /* TRAPcc */ +{ CPUFUNC(op_5ffc_0), 24572}, /* TRAPcc */ +{ CPUFUNC(op_6000_0), 24576}, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577}, /* Bcc */ +{ CPUFUNC(op_60ff_0), 24831}, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832}, /* BSR */ +{ CPUFUNC(op_6101_0), 24833}, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087}, /* BSR */ +{ CPUFUNC(op_6200_0), 25088}, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089}, /* Bcc */ +{ CPUFUNC(op_62ff_0), 25343}, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344}, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345}, /* Bcc */ +{ CPUFUNC(op_63ff_0), 25599}, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600}, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601}, /* Bcc */ +{ CPUFUNC(op_64ff_0), 25855}, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856}, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857}, /* Bcc */ +{ CPUFUNC(op_65ff_0), 26111}, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112}, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113}, /* Bcc */ +{ CPUFUNC(op_66ff_0), 26367}, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368}, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369}, /* Bcc */ +{ CPUFUNC(op_67ff_0), 26623}, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624}, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625}, /* Bcc */ +{ CPUFUNC(op_68ff_0), 26879}, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880}, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881}, /* Bcc */ +{ CPUFUNC(op_69ff_0), 27135}, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136}, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137}, /* Bcc */ +{ CPUFUNC(op_6aff_0), 27391}, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392}, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393}, /* Bcc */ +{ CPUFUNC(op_6bff_0), 27647}, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648}, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649}, /* Bcc */ +{ CPUFUNC(op_6cff_0), 27903}, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904}, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905}, /* Bcc */ +{ CPUFUNC(op_6dff_0), 28159}, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160}, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161}, /* Bcc */ +{ CPUFUNC(op_6eff_0), 28415}, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416}, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417}, /* Bcc */ +{ CPUFUNC(op_6fff_0), 28671}, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672}, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768}, /* OR */ +{ CPUFUNC(op_8010_0), 32784}, /* OR */ +{ CPUFUNC(op_8018_0), 32792}, /* OR */ +{ CPUFUNC(op_8020_0), 32800}, /* OR */ +{ CPUFUNC(op_8028_0), 32808}, /* OR */ +{ CPUFUNC(op_8030_0), 32816}, /* OR */ +{ CPUFUNC(op_8038_0), 32824}, /* OR */ +{ CPUFUNC(op_8039_0), 32825}, /* OR */ +{ CPUFUNC(op_803a_0), 32826}, /* OR */ +{ CPUFUNC(op_803b_0), 32827}, /* OR */ +{ CPUFUNC(op_803c_0), 32828}, /* OR */ +{ CPUFUNC(op_8040_0), 32832}, /* OR */ +{ CPUFUNC(op_8050_0), 32848}, /* OR */ +{ CPUFUNC(op_8058_0), 32856}, /* OR */ +{ CPUFUNC(op_8060_0), 32864}, /* OR */ +{ CPUFUNC(op_8068_0), 32872}, /* OR */ +{ CPUFUNC(op_8070_0), 32880}, /* OR */ +{ CPUFUNC(op_8078_0), 32888}, /* OR */ +{ CPUFUNC(op_8079_0), 32889}, /* OR */ +{ CPUFUNC(op_807a_0), 32890}, /* OR */ +{ CPUFUNC(op_807b_0), 32891}, /* OR */ +{ CPUFUNC(op_807c_0), 32892}, /* OR */ +{ CPUFUNC(op_8080_0), 32896}, /* OR */ +{ CPUFUNC(op_8090_0), 32912}, /* OR */ +{ CPUFUNC(op_8098_0), 32920}, /* OR */ +{ CPUFUNC(op_80a0_0), 32928}, /* OR */ +{ CPUFUNC(op_80a8_0), 32936}, /* OR */ +{ CPUFUNC(op_80b0_0), 32944}, /* OR */ +{ CPUFUNC(op_80b8_0), 32952}, /* OR */ +{ CPUFUNC(op_80b9_0), 32953}, /* OR */ +{ CPUFUNC(op_80ba_0), 32954}, /* OR */ +{ CPUFUNC(op_80bb_0), 32955}, /* OR */ +{ CPUFUNC(op_80bc_0), 32956}, /* OR */ +{ CPUFUNC(op_80c0_0), 32960}, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976}, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984}, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992}, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000}, /* DIVU */ +{ CPUFUNC(op_80f0_0), 33008}, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016}, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017}, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018}, /* DIVU */ +{ CPUFUNC(op_80fb_0), 33019}, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020}, /* DIVU */ +{ CPUFUNC(op_8100_0), 33024}, /* SBCD */ +{ CPUFUNC(op_8108_0), 33032}, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040}, /* OR */ +{ CPUFUNC(op_8118_0), 33048}, /* OR */ +{ CPUFUNC(op_8120_0), 33056}, /* OR */ +{ CPUFUNC(op_8128_0), 33064}, /* OR */ +{ CPUFUNC(op_8130_0), 33072}, /* OR */ +{ CPUFUNC(op_8138_0), 33080}, /* OR */ +{ CPUFUNC(op_8139_0), 33081}, /* OR */ +{ CPUFUNC(op_8140_0), 33088}, /* PACK */ +{ CPUFUNC(op_8148_0), 33096}, /* PACK */ +{ CPUFUNC(op_8150_0), 33104}, /* OR */ +{ CPUFUNC(op_8158_0), 33112}, /* OR */ +{ CPUFUNC(op_8160_0), 33120}, /* OR */ +{ CPUFUNC(op_8168_0), 33128}, /* OR */ +{ CPUFUNC(op_8170_0), 33136}, /* OR */ +{ CPUFUNC(op_8178_0), 33144}, /* OR */ +{ CPUFUNC(op_8179_0), 33145}, /* OR */ +{ CPUFUNC(op_8180_0), 33152}, /* UNPK */ +{ CPUFUNC(op_8188_0), 33160}, /* UNPK */ +{ CPUFUNC(op_8190_0), 33168}, /* OR */ +{ CPUFUNC(op_8198_0), 33176}, /* OR */ +{ CPUFUNC(op_81a0_0), 33184}, /* OR */ +{ CPUFUNC(op_81a8_0), 33192}, /* OR */ +{ CPUFUNC(op_81b0_0), 33200}, /* OR */ +{ CPUFUNC(op_81b8_0), 33208}, /* OR */ +{ CPUFUNC(op_81b9_0), 33209}, /* OR */ +{ CPUFUNC(op_81c0_0), 33216}, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232}, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240}, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248}, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256}, /* DIVS */ +{ CPUFUNC(op_81f0_0), 33264}, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272}, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273}, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274}, /* DIVS */ +{ CPUFUNC(op_81fb_0), 33275}, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276}, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864}, /* SUB */ +{ CPUFUNC(op_9010_0), 36880}, /* SUB */ +{ CPUFUNC(op_9018_0), 36888}, /* SUB */ +{ CPUFUNC(op_9020_0), 36896}, /* SUB */ +{ CPUFUNC(op_9028_0), 36904}, /* SUB */ +{ CPUFUNC(op_9030_0), 36912}, /* SUB */ +{ CPUFUNC(op_9038_0), 36920}, /* SUB */ +{ CPUFUNC(op_9039_0), 36921}, /* SUB */ +{ CPUFUNC(op_903a_0), 36922}, /* SUB */ +{ CPUFUNC(op_903b_0), 36923}, /* SUB */ +{ CPUFUNC(op_903c_0), 36924}, /* SUB */ +{ CPUFUNC(op_9040_0), 36928}, /* SUB */ +{ CPUFUNC(op_9048_0), 36936}, /* SUB */ +{ CPUFUNC(op_9050_0), 36944}, /* SUB */ +{ CPUFUNC(op_9058_0), 36952}, /* SUB */ +{ CPUFUNC(op_9060_0), 36960}, /* SUB */ +{ CPUFUNC(op_9068_0), 36968}, /* SUB */ +{ CPUFUNC(op_9070_0), 36976}, /* SUB */ +{ CPUFUNC(op_9078_0), 36984}, /* SUB */ +{ CPUFUNC(op_9079_0), 36985}, /* SUB */ +{ CPUFUNC(op_907a_0), 36986}, /* SUB */ +{ CPUFUNC(op_907b_0), 36987}, /* SUB */ +{ CPUFUNC(op_907c_0), 36988}, /* SUB */ +{ CPUFUNC(op_9080_0), 36992}, /* SUB */ +{ CPUFUNC(op_9088_0), 37000}, /* SUB */ +{ CPUFUNC(op_9090_0), 37008}, /* SUB */ +{ CPUFUNC(op_9098_0), 37016}, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024}, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032}, /* SUB */ +{ CPUFUNC(op_90b0_0), 37040}, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048}, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049}, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050}, /* SUB */ +{ CPUFUNC(op_90bb_0), 37051}, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052}, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056}, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064}, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072}, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080}, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088}, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096}, /* SUBA */ +{ CPUFUNC(op_90f0_0), 37104}, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112}, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113}, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114}, /* SUBA */ +{ CPUFUNC(op_90fb_0), 37115}, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116}, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120}, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128}, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136}, /* SUB */ +{ CPUFUNC(op_9118_0), 37144}, /* SUB */ +{ CPUFUNC(op_9120_0), 37152}, /* SUB */ +{ CPUFUNC(op_9128_0), 37160}, /* SUB */ +{ CPUFUNC(op_9130_0), 37168}, /* SUB */ +{ CPUFUNC(op_9138_0), 37176}, /* SUB */ +{ CPUFUNC(op_9139_0), 37177}, /* SUB */ +{ CPUFUNC(op_9140_0), 37184}, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192}, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200}, /* SUB */ +{ CPUFUNC(op_9158_0), 37208}, /* SUB */ +{ CPUFUNC(op_9160_0), 37216}, /* SUB */ +{ CPUFUNC(op_9168_0), 37224}, /* SUB */ +{ CPUFUNC(op_9170_0), 37232}, /* SUB */ +{ CPUFUNC(op_9178_0), 37240}, /* SUB */ +{ CPUFUNC(op_9179_0), 37241}, /* SUB */ +{ CPUFUNC(op_9180_0), 37248}, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256}, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264}, /* SUB */ +{ CPUFUNC(op_9198_0), 37272}, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280}, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288}, /* SUB */ +{ CPUFUNC(op_91b0_0), 37296}, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304}, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305}, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312}, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320}, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328}, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336}, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344}, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352}, /* SUBA */ +{ CPUFUNC(op_91f0_0), 37360}, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368}, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369}, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370}, /* SUBA */ +{ CPUFUNC(op_91fb_0), 37371}, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372}, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056}, /* CMP */ +{ CPUFUNC(op_b010_0), 45072}, /* CMP */ +{ CPUFUNC(op_b018_0), 45080}, /* CMP */ +{ CPUFUNC(op_b020_0), 45088}, /* CMP */ +{ CPUFUNC(op_b028_0), 45096}, /* CMP */ +{ CPUFUNC(op_b030_0), 45104}, /* CMP */ +{ CPUFUNC(op_b038_0), 45112}, /* CMP */ +{ CPUFUNC(op_b039_0), 45113}, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114}, /* CMP */ +{ CPUFUNC(op_b03b_0), 45115}, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116}, /* CMP */ +{ CPUFUNC(op_b040_0), 45120}, /* CMP */ +{ CPUFUNC(op_b048_0), 45128}, /* CMP */ +{ CPUFUNC(op_b050_0), 45136}, /* CMP */ +{ CPUFUNC(op_b058_0), 45144}, /* CMP */ +{ CPUFUNC(op_b060_0), 45152}, /* CMP */ +{ CPUFUNC(op_b068_0), 45160}, /* CMP */ +{ CPUFUNC(op_b070_0), 45168}, /* CMP */ +{ CPUFUNC(op_b078_0), 45176}, /* CMP */ +{ CPUFUNC(op_b079_0), 45177}, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178}, /* CMP */ +{ CPUFUNC(op_b07b_0), 45179}, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180}, /* CMP */ +{ CPUFUNC(op_b080_0), 45184}, /* CMP */ +{ CPUFUNC(op_b088_0), 45192}, /* CMP */ +{ CPUFUNC(op_b090_0), 45200}, /* CMP */ +{ CPUFUNC(op_b098_0), 45208}, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216}, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224}, /* CMP */ +{ CPUFUNC(op_b0b0_0), 45232}, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240}, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241}, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242}, /* CMP */ +{ CPUFUNC(op_b0bb_0), 45243}, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244}, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248}, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256}, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264}, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272}, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280}, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288}, /* CMPA */ +{ CPUFUNC(op_b0f0_0), 45296}, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304}, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305}, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306}, /* CMPA */ +{ CPUFUNC(op_b0fb_0), 45307}, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308}, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312}, /* EOR */ +{ CPUFUNC(op_b108_0), 45320}, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328}, /* EOR */ +{ CPUFUNC(op_b118_0), 45336}, /* EOR */ +{ CPUFUNC(op_b120_0), 45344}, /* EOR */ +{ CPUFUNC(op_b128_0), 45352}, /* EOR */ +{ CPUFUNC(op_b130_0), 45360}, /* EOR */ +{ CPUFUNC(op_b138_0), 45368}, /* EOR */ +{ CPUFUNC(op_b139_0), 45369}, /* EOR */ +{ CPUFUNC(op_b140_0), 45376}, /* EOR */ +{ CPUFUNC(op_b148_0), 45384}, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392}, /* EOR */ +{ CPUFUNC(op_b158_0), 45400}, /* EOR */ +{ CPUFUNC(op_b160_0), 45408}, /* EOR */ +{ CPUFUNC(op_b168_0), 45416}, /* EOR */ +{ CPUFUNC(op_b170_0), 45424}, /* EOR */ +{ CPUFUNC(op_b178_0), 45432}, /* EOR */ +{ CPUFUNC(op_b179_0), 45433}, /* EOR */ +{ CPUFUNC(op_b180_0), 45440}, /* EOR */ +{ CPUFUNC(op_b188_0), 45448}, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456}, /* EOR */ +{ CPUFUNC(op_b198_0), 45464}, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472}, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480}, /* EOR */ +{ CPUFUNC(op_b1b0_0), 45488}, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496}, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497}, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504}, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512}, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520}, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528}, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536}, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544}, /* CMPA */ +{ CPUFUNC(op_b1f0_0), 45552}, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560}, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561}, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562}, /* CMPA */ +{ CPUFUNC(op_b1fb_0), 45563}, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564}, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152}, /* AND */ +{ CPUFUNC(op_c010_0), 49168}, /* AND */ +{ CPUFUNC(op_c018_0), 49176}, /* AND */ +{ CPUFUNC(op_c020_0), 49184}, /* AND */ +{ CPUFUNC(op_c028_0), 49192}, /* AND */ +{ CPUFUNC(op_c030_0), 49200}, /* AND */ +{ CPUFUNC(op_c038_0), 49208}, /* AND */ +{ CPUFUNC(op_c039_0), 49209}, /* AND */ +{ CPUFUNC(op_c03a_0), 49210}, /* AND */ +{ CPUFUNC(op_c03b_0), 49211}, /* AND */ +{ CPUFUNC(op_c03c_0), 49212}, /* AND */ +{ CPUFUNC(op_c040_0), 49216}, /* AND */ +{ CPUFUNC(op_c050_0), 49232}, /* AND */ +{ CPUFUNC(op_c058_0), 49240}, /* AND */ +{ CPUFUNC(op_c060_0), 49248}, /* AND */ +{ CPUFUNC(op_c068_0), 49256}, /* AND */ +{ CPUFUNC(op_c070_0), 49264}, /* AND */ +{ CPUFUNC(op_c078_0), 49272}, /* AND */ +{ CPUFUNC(op_c079_0), 49273}, /* AND */ +{ CPUFUNC(op_c07a_0), 49274}, /* AND */ +{ CPUFUNC(op_c07b_0), 49275}, /* AND */ +{ CPUFUNC(op_c07c_0), 49276}, /* AND */ +{ CPUFUNC(op_c080_0), 49280}, /* AND */ +{ CPUFUNC(op_c090_0), 49296}, /* AND */ +{ CPUFUNC(op_c098_0), 49304}, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312}, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320}, /* AND */ +{ CPUFUNC(op_c0b0_0), 49328}, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336}, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337}, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338}, /* AND */ +{ CPUFUNC(op_c0bb_0), 49339}, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340}, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344}, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360}, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368}, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376}, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384}, /* MULU */ +{ CPUFUNC(op_c0f0_0), 49392}, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400}, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401}, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402}, /* MULU */ +{ CPUFUNC(op_c0fb_0), 49403}, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404}, /* MULU */ +{ CPUFUNC(op_c100_0), 49408}, /* ABCD */ +{ CPUFUNC(op_c108_0), 49416}, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424}, /* AND */ +{ CPUFUNC(op_c118_0), 49432}, /* AND */ +{ CPUFUNC(op_c120_0), 49440}, /* AND */ +{ CPUFUNC(op_c128_0), 49448}, /* AND */ +{ CPUFUNC(op_c130_0), 49456}, /* AND */ +{ CPUFUNC(op_c138_0), 49464}, /* AND */ +{ CPUFUNC(op_c139_0), 49465}, /* AND */ +{ CPUFUNC(op_c140_0), 49472}, /* EXG */ +{ CPUFUNC(op_c148_0), 49480}, /* EXG */ +{ CPUFUNC(op_c150_0), 49488}, /* AND */ +{ CPUFUNC(op_c158_0), 49496}, /* AND */ +{ CPUFUNC(op_c160_0), 49504}, /* AND */ +{ CPUFUNC(op_c168_0), 49512}, /* AND */ +{ CPUFUNC(op_c170_0), 49520}, /* AND */ +{ CPUFUNC(op_c178_0), 49528}, /* AND */ +{ CPUFUNC(op_c179_0), 49529}, /* AND */ +{ CPUFUNC(op_c188_0), 49544}, /* EXG */ +{ CPUFUNC(op_c190_0), 49552}, /* AND */ +{ CPUFUNC(op_c198_0), 49560}, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568}, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576}, /* AND */ +{ CPUFUNC(op_c1b0_0), 49584}, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592}, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593}, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600}, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616}, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624}, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632}, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640}, /* MULS */ +{ CPUFUNC(op_c1f0_0), 49648}, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656}, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657}, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658}, /* MULS */ +{ CPUFUNC(op_c1fb_0), 49659}, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660}, /* MULS */ +{ CPUFUNC(op_d000_0), 53248}, /* ADD */ +{ CPUFUNC(op_d010_0), 53264}, /* ADD */ +{ CPUFUNC(op_d018_0), 53272}, /* ADD */ +{ CPUFUNC(op_d020_0), 53280}, /* ADD */ +{ CPUFUNC(op_d028_0), 53288}, /* ADD */ +{ CPUFUNC(op_d030_0), 53296}, /* ADD */ +{ CPUFUNC(op_d038_0), 53304}, /* ADD */ +{ CPUFUNC(op_d039_0), 53305}, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306}, /* ADD */ +{ CPUFUNC(op_d03b_0), 53307}, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308}, /* ADD */ +{ CPUFUNC(op_d040_0), 53312}, /* ADD */ +{ CPUFUNC(op_d048_0), 53320}, /* ADD */ +{ CPUFUNC(op_d050_0), 53328}, /* ADD */ +{ CPUFUNC(op_d058_0), 53336}, /* ADD */ +{ CPUFUNC(op_d060_0), 53344}, /* ADD */ +{ CPUFUNC(op_d068_0), 53352}, /* ADD */ +{ CPUFUNC(op_d070_0), 53360}, /* ADD */ +{ CPUFUNC(op_d078_0), 53368}, /* ADD */ +{ CPUFUNC(op_d079_0), 53369}, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370}, /* ADD */ +{ CPUFUNC(op_d07b_0), 53371}, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372}, /* ADD */ +{ CPUFUNC(op_d080_0), 53376}, /* ADD */ +{ CPUFUNC(op_d088_0), 53384}, /* ADD */ +{ CPUFUNC(op_d090_0), 53392}, /* ADD */ +{ CPUFUNC(op_d098_0), 53400}, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408}, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416}, /* ADD */ +{ CPUFUNC(op_d0b0_0), 53424}, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432}, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433}, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434}, /* ADD */ +{ CPUFUNC(op_d0bb_0), 53435}, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436}, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440}, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448}, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456}, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464}, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472}, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480}, /* ADDA */ +{ CPUFUNC(op_d0f0_0), 53488}, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496}, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497}, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498}, /* ADDA */ +{ CPUFUNC(op_d0fb_0), 53499}, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500}, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504}, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512}, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520}, /* ADD */ +{ CPUFUNC(op_d118_0), 53528}, /* ADD */ +{ CPUFUNC(op_d120_0), 53536}, /* ADD */ +{ CPUFUNC(op_d128_0), 53544}, /* ADD */ +{ CPUFUNC(op_d130_0), 53552}, /* ADD */ +{ CPUFUNC(op_d138_0), 53560}, /* ADD */ +{ CPUFUNC(op_d139_0), 53561}, /* ADD */ +{ CPUFUNC(op_d140_0), 53568}, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576}, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584}, /* ADD */ +{ CPUFUNC(op_d158_0), 53592}, /* ADD */ +{ CPUFUNC(op_d160_0), 53600}, /* ADD */ +{ CPUFUNC(op_d168_0), 53608}, /* ADD */ +{ CPUFUNC(op_d170_0), 53616}, /* ADD */ +{ CPUFUNC(op_d178_0), 53624}, /* ADD */ +{ CPUFUNC(op_d179_0), 53625}, /* ADD */ +{ CPUFUNC(op_d180_0), 53632}, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640}, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648}, /* ADD */ +{ CPUFUNC(op_d198_0), 53656}, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664}, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672}, /* ADD */ +{ CPUFUNC(op_d1b0_0), 53680}, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688}, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689}, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696}, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704}, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712}, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720}, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728}, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736}, /* ADDA */ +{ CPUFUNC(op_d1f0_0), 53744}, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752}, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753}, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754}, /* ADDA */ +{ CPUFUNC(op_d1fb_0), 53755}, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756}, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344}, /* ASR */ +{ CPUFUNC(op_e008_0), 57352}, /* LSR */ +{ CPUFUNC(op_e010_0), 57360}, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368}, /* ROR */ +{ CPUFUNC(op_e020_0), 57376}, /* ASR */ +{ CPUFUNC(op_e028_0), 57384}, /* LSR */ +{ CPUFUNC(op_e030_0), 57392}, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400}, /* ROR */ +{ CPUFUNC(op_e040_0), 57408}, /* ASR */ +{ CPUFUNC(op_e048_0), 57416}, /* LSR */ +{ CPUFUNC(op_e050_0), 57424}, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432}, /* ROR */ +{ CPUFUNC(op_e060_0), 57440}, /* ASR */ +{ CPUFUNC(op_e068_0), 57448}, /* LSR */ +{ CPUFUNC(op_e070_0), 57456}, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464}, /* ROR */ +{ CPUFUNC(op_e080_0), 57472}, /* ASR */ +{ CPUFUNC(op_e088_0), 57480}, /* LSR */ +{ CPUFUNC(op_e090_0), 57488}, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496}, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504}, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512}, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520}, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528}, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552}, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560}, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568}, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576}, /* ASRW */ +{ CPUFUNC(op_e0f0_0), 57584}, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592}, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593}, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600}, /* ASL */ +{ CPUFUNC(op_e108_0), 57608}, /* LSL */ +{ CPUFUNC(op_e110_0), 57616}, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624}, /* ROL */ +{ CPUFUNC(op_e120_0), 57632}, /* ASL */ +{ CPUFUNC(op_e128_0), 57640}, /* LSL */ +{ CPUFUNC(op_e130_0), 57648}, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656}, /* ROL */ +{ CPUFUNC(op_e140_0), 57664}, /* ASL */ +{ CPUFUNC(op_e148_0), 57672}, /* LSL */ +{ CPUFUNC(op_e150_0), 57680}, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688}, /* ROL */ +{ CPUFUNC(op_e160_0), 57696}, /* ASL */ +{ CPUFUNC(op_e168_0), 57704}, /* LSL */ +{ CPUFUNC(op_e170_0), 57712}, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720}, /* ROL */ +{ CPUFUNC(op_e180_0), 57728}, /* ASL */ +{ CPUFUNC(op_e188_0), 57736}, /* LSL */ +{ CPUFUNC(op_e190_0), 57744}, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752}, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760}, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768}, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776}, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784}, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808}, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816}, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824}, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832}, /* ASLW */ +{ CPUFUNC(op_e1f0_0), 57840}, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848}, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849}, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064}, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072}, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080}, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088}, /* LSRW */ +{ CPUFUNC(op_e2f0_0), 58096}, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104}, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105}, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320}, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328}, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336}, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344}, /* LSLW */ +{ CPUFUNC(op_e3f0_0), 58352}, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360}, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361}, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576}, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584}, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592}, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600}, /* ROXRW */ +{ CPUFUNC(op_e4f0_0), 58608}, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616}, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617}, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832}, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840}, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848}, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856}, /* ROXLW */ +{ CPUFUNC(op_e5f0_0), 58864}, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872}, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873}, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088}, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096}, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104}, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112}, /* RORW */ +{ CPUFUNC(op_e6f0_0), 59120}, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128}, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129}, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344}, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352}, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360}, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368}, /* ROLW */ +{ CPUFUNC(op_e7f0_0), 59376}, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384}, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385}, /* ROLW */ +{ CPUFUNC(op_e8c0_0), 59584}, /* BFTST */ +{ CPUFUNC(op_e8d0_0), 59600}, /* BFTST */ +{ CPUFUNC(op_e8e8_0), 59624}, /* BFTST */ +{ CPUFUNC(op_e8f0_0), 59632}, /* BFTST */ +{ CPUFUNC(op_e8f8_0), 59640}, /* BFTST */ +{ CPUFUNC(op_e8f9_0), 59641}, /* BFTST */ +{ CPUFUNC(op_e8fa_0), 59642}, /* BFTST */ +{ CPUFUNC(op_e8fb_0), 59643}, /* BFTST */ +{ CPUFUNC(op_e9c0_0), 59840}, /* BFEXTU */ +{ CPUFUNC(op_e9d0_0), 59856}, /* BFEXTU */ +{ CPUFUNC(op_e9e8_0), 59880}, /* BFEXTU */ +{ CPUFUNC(op_e9f0_0), 59888}, /* BFEXTU */ +{ CPUFUNC(op_e9f8_0), 59896}, /* BFEXTU */ +{ CPUFUNC(op_e9f9_0), 59897}, /* BFEXTU */ +{ CPUFUNC(op_e9fa_0), 59898}, /* BFEXTU */ +{ CPUFUNC(op_e9fb_0), 59899}, /* BFEXTU */ +{ CPUFUNC(op_eac0_0), 60096}, /* BFCHG */ +{ CPUFUNC(op_ead0_0), 60112}, /* BFCHG */ +{ CPUFUNC(op_eae8_0), 60136}, /* BFCHG */ +{ CPUFUNC(op_eaf0_0), 60144}, /* BFCHG */ +{ CPUFUNC(op_eaf8_0), 60152}, /* BFCHG */ +{ CPUFUNC(op_eaf9_0), 60153}, /* BFCHG */ +{ CPUFUNC(op_ebc0_0), 60352}, /* BFEXTS */ +{ CPUFUNC(op_ebd0_0), 60368}, /* BFEXTS */ +{ CPUFUNC(op_ebe8_0), 60392}, /* BFEXTS */ +{ CPUFUNC(op_ebf0_0), 60400}, /* BFEXTS */ +{ CPUFUNC(op_ebf8_0), 60408}, /* BFEXTS */ +{ CPUFUNC(op_ebf9_0), 60409}, /* BFEXTS */ +{ CPUFUNC(op_ebfa_0), 60410}, /* BFEXTS */ +{ CPUFUNC(op_ebfb_0), 60411}, /* BFEXTS */ +{ CPUFUNC(op_ecc0_0), 60608}, /* BFCLR */ +{ CPUFUNC(op_ecd0_0), 60624}, /* BFCLR */ +{ CPUFUNC(op_ece8_0), 60648}, /* BFCLR */ +{ CPUFUNC(op_ecf0_0), 60656}, /* BFCLR */ +{ CPUFUNC(op_ecf8_0), 60664}, /* BFCLR */ +{ CPUFUNC(op_ecf9_0), 60665}, /* BFCLR */ +{ CPUFUNC(op_edc0_0), 60864}, /* BFFFO */ +{ CPUFUNC(op_edd0_0), 60880}, /* BFFFO */ +{ CPUFUNC(op_ede8_0), 60904}, /* BFFFO */ +{ CPUFUNC(op_edf0_0), 60912}, /* BFFFO */ +{ CPUFUNC(op_edf8_0), 60920}, /* BFFFO */ +{ CPUFUNC(op_edf9_0), 60921}, /* BFFFO */ +{ CPUFUNC(op_edfa_0), 60922}, /* BFFFO */ +{ CPUFUNC(op_edfb_0), 60923}, /* BFFFO */ +{ CPUFUNC(op_eec0_0), 61120}, /* BFSET */ +{ CPUFUNC(op_eed0_0), 61136}, /* BFSET */ +{ CPUFUNC(op_eee8_0), 61160}, /* BFSET */ +{ CPUFUNC(op_eef0_0), 61168}, /* BFSET */ +{ CPUFUNC(op_eef8_0), 61176}, /* BFSET */ +{ CPUFUNC(op_eef9_0), 61177}, /* BFSET */ +{ CPUFUNC(op_efc0_0), 61376}, /* BFINS */ +{ CPUFUNC(op_efd0_0), 61392}, /* BFINS */ +{ CPUFUNC(op_efe8_0), 61416}, /* BFINS */ +{ CPUFUNC(op_eff0_0), 61424}, /* BFINS */ +{ CPUFUNC(op_eff8_0), 61432}, /* BFINS */ +{ CPUFUNC(op_eff9_0), 61433}, /* BFINS */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl CPUFUNC(op_smalltbl_3)[] = { +{ CPUFUNC(op_0000_0), 0}, /* OR */ +{ CPUFUNC(op_0010_0), 16}, /* OR */ +{ CPUFUNC(op_0018_0), 24}, /* OR */ +{ CPUFUNC(op_0020_0), 32}, /* OR */ +{ CPUFUNC(op_0028_0), 40}, /* OR */ +{ CPUFUNC(op_0030_3), 48 }, /* OR */ +{ CPUFUNC(op_0038_0), 56}, /* OR */ +{ CPUFUNC(op_0039_0), 57}, /* OR */ +{ CPUFUNC(op_003c_0), 60}, /* ORSR */ +{ CPUFUNC(op_0040_0), 64}, /* OR */ +{ CPUFUNC(op_0050_0), 80}, /* OR */ +{ CPUFUNC(op_0058_0), 88}, /* OR */ +{ CPUFUNC(op_0060_0), 96}, /* OR */ +{ CPUFUNC(op_0068_0), 104}, /* OR */ +{ CPUFUNC(op_0070_3), 112 }, /* OR */ +{ CPUFUNC(op_0078_0), 120}, /* OR */ +{ CPUFUNC(op_0079_0), 121}, /* OR */ +{ CPUFUNC(op_007c_0), 124}, /* ORSR */ +{ CPUFUNC(op_0080_0), 128}, /* OR */ +{ CPUFUNC(op_0090_0), 144}, /* OR */ +{ CPUFUNC(op_0098_0), 152}, /* OR */ +{ CPUFUNC(op_00a0_0), 160}, /* OR */ +{ CPUFUNC(op_00a8_0), 168}, /* OR */ +{ CPUFUNC(op_00b0_3), 176 }, /* OR */ +{ CPUFUNC(op_00b8_0), 184}, /* OR */ +{ CPUFUNC(op_00b9_0), 185}, /* OR */ +{ CPUFUNC(op_0100_0), 256}, /* BTST */ +{ CPUFUNC(op_0108_0), 264}, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272}, /* BTST */ +{ CPUFUNC(op_0118_0), 280}, /* BTST */ +{ CPUFUNC(op_0120_0), 288}, /* BTST */ +{ CPUFUNC(op_0128_0), 296}, /* BTST */ +{ CPUFUNC(op_0130_3), 304 }, /* BTST */ +{ CPUFUNC(op_0138_0), 312}, /* BTST */ +{ CPUFUNC(op_0139_0), 313}, /* BTST */ +{ CPUFUNC(op_013a_0), 314}, /* BTST */ +{ CPUFUNC(op_013b_3), 315 }, /* BTST */ +{ CPUFUNC(op_013c_0), 316}, /* BTST */ +{ CPUFUNC(op_0140_0), 320}, /* BCHG */ +{ CPUFUNC(op_0148_0), 328}, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336}, /* BCHG */ +{ CPUFUNC(op_0158_0), 344}, /* BCHG */ +{ CPUFUNC(op_0160_0), 352}, /* BCHG */ +{ CPUFUNC(op_0168_0), 360}, /* BCHG */ +{ CPUFUNC(op_0170_3), 368 }, /* BCHG */ +{ CPUFUNC(op_0178_0), 376}, /* BCHG */ +{ CPUFUNC(op_0179_0), 377}, /* BCHG */ +{ CPUFUNC(op_017a_0), 378}, /* BCHG */ +{ CPUFUNC(op_017b_3), 379 }, /* BCHG */ +{ CPUFUNC(op_0180_0), 384}, /* BCLR */ +{ CPUFUNC(op_0188_0), 392}, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400}, /* BCLR */ +{ CPUFUNC(op_0198_0), 408}, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416}, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424}, /* BCLR */ +{ CPUFUNC(op_01b0_3), 432 }, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440}, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441}, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442}, /* BCLR */ +{ CPUFUNC(op_01bb_3), 443 }, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448}, /* BSET */ +{ CPUFUNC(op_01c8_0), 456}, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464}, /* BSET */ +{ CPUFUNC(op_01d8_0), 472}, /* BSET */ +{ CPUFUNC(op_01e0_0), 480}, /* BSET */ +{ CPUFUNC(op_01e8_0), 488}, /* BSET */ +{ CPUFUNC(op_01f0_3), 496 }, /* BSET */ +{ CPUFUNC(op_01f8_0), 504}, /* BSET */ +{ CPUFUNC(op_01f9_0), 505}, /* BSET */ +{ CPUFUNC(op_01fa_0), 506}, /* BSET */ +{ CPUFUNC(op_01fb_3), 507 }, /* BSET */ +{ CPUFUNC(op_0200_0), 512}, /* AND */ +{ CPUFUNC(op_0210_0), 528}, /* AND */ +{ CPUFUNC(op_0218_0), 536}, /* AND */ +{ CPUFUNC(op_0220_0), 544}, /* AND */ +{ CPUFUNC(op_0228_0), 552}, /* AND */ +{ CPUFUNC(op_0230_3), 560 }, /* AND */ +{ CPUFUNC(op_0238_0), 568}, /* AND */ +{ CPUFUNC(op_0239_0), 569}, /* AND */ +{ CPUFUNC(op_023c_0), 572}, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576}, /* AND */ +{ CPUFUNC(op_0250_0), 592}, /* AND */ +{ CPUFUNC(op_0258_0), 600}, /* AND */ +{ CPUFUNC(op_0260_0), 608}, /* AND */ +{ CPUFUNC(op_0268_0), 616}, /* AND */ +{ CPUFUNC(op_0270_3), 624 }, /* AND */ +{ CPUFUNC(op_0278_0), 632}, /* AND */ +{ CPUFUNC(op_0279_0), 633}, /* AND */ +{ CPUFUNC(op_027c_0), 636}, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640}, /* AND */ +{ CPUFUNC(op_0290_0), 656}, /* AND */ +{ CPUFUNC(op_0298_0), 664}, /* AND */ +{ CPUFUNC(op_02a0_0), 672}, /* AND */ +{ CPUFUNC(op_02a8_0), 680}, /* AND */ +{ CPUFUNC(op_02b0_3), 688 }, /* AND */ +{ CPUFUNC(op_02b8_0), 696}, /* AND */ +{ CPUFUNC(op_02b9_0), 697}, /* AND */ +{ CPUFUNC(op_0400_0), 1024}, /* SUB */ +{ CPUFUNC(op_0410_0), 1040}, /* SUB */ +{ CPUFUNC(op_0418_0), 1048}, /* SUB */ +{ CPUFUNC(op_0420_0), 1056}, /* SUB */ +{ CPUFUNC(op_0428_0), 1064}, /* SUB */ +{ CPUFUNC(op_0430_3), 1072 }, /* SUB */ +{ CPUFUNC(op_0438_0), 1080}, /* SUB */ +{ CPUFUNC(op_0439_0), 1081}, /* SUB */ +{ CPUFUNC(op_0440_0), 1088}, /* SUB */ +{ CPUFUNC(op_0450_0), 1104}, /* SUB */ +{ CPUFUNC(op_0458_0), 1112}, /* SUB */ +{ CPUFUNC(op_0460_0), 1120}, /* SUB */ +{ CPUFUNC(op_0468_0), 1128}, /* SUB */ +{ CPUFUNC(op_0470_3), 1136 }, /* SUB */ +{ CPUFUNC(op_0478_0), 1144}, /* SUB */ +{ CPUFUNC(op_0479_0), 1145}, /* SUB */ +{ CPUFUNC(op_0480_0), 1152}, /* SUB */ +{ CPUFUNC(op_0490_0), 1168}, /* SUB */ +{ CPUFUNC(op_0498_0), 1176}, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184}, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192}, /* SUB */ +{ CPUFUNC(op_04b0_3), 1200 }, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208}, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209}, /* SUB */ +{ CPUFUNC(op_0600_0), 1536}, /* ADD */ +{ CPUFUNC(op_0610_0), 1552}, /* ADD */ +{ CPUFUNC(op_0618_0), 1560}, /* ADD */ +{ CPUFUNC(op_0620_0), 1568}, /* ADD */ +{ CPUFUNC(op_0628_0), 1576}, /* ADD */ +{ CPUFUNC(op_0630_3), 1584 }, /* ADD */ +{ CPUFUNC(op_0638_0), 1592}, /* ADD */ +{ CPUFUNC(op_0639_0), 1593}, /* ADD */ +{ CPUFUNC(op_0640_0), 1600}, /* ADD */ +{ CPUFUNC(op_0650_0), 1616}, /* ADD */ +{ CPUFUNC(op_0658_0), 1624}, /* ADD */ +{ CPUFUNC(op_0660_0), 1632}, /* ADD */ +{ CPUFUNC(op_0668_0), 1640}, /* ADD */ +{ CPUFUNC(op_0670_3), 1648 }, /* ADD */ +{ CPUFUNC(op_0678_0), 1656}, /* ADD */ +{ CPUFUNC(op_0679_0), 1657}, /* ADD */ +{ CPUFUNC(op_0680_0), 1664}, /* ADD */ +{ CPUFUNC(op_0690_0), 1680}, /* ADD */ +{ CPUFUNC(op_0698_0), 1688}, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696}, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704}, /* ADD */ +{ CPUFUNC(op_06b0_3), 1712 }, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720}, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721}, /* ADD */ +{ CPUFUNC(op_0800_0), 2048}, /* BTST */ +{ CPUFUNC(op_0810_0), 2064}, /* BTST */ +{ CPUFUNC(op_0818_0), 2072}, /* BTST */ +{ CPUFUNC(op_0820_0), 2080}, /* BTST */ +{ CPUFUNC(op_0828_0), 2088}, /* BTST */ +{ CPUFUNC(op_0830_3), 2096 }, /* BTST */ +{ CPUFUNC(op_0838_0), 2104}, /* BTST */ +{ CPUFUNC(op_0839_0), 2105}, /* BTST */ +{ CPUFUNC(op_083a_0), 2106}, /* BTST */ +{ CPUFUNC(op_083b_3), 2107 }, /* BTST */ +{ CPUFUNC(op_083c_0), 2108}, /* BTST */ +{ CPUFUNC(op_0840_0), 2112}, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128}, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136}, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144}, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152}, /* BCHG */ +{ CPUFUNC(op_0870_3), 2160 }, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168}, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169}, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170}, /* BCHG */ +{ CPUFUNC(op_087b_3), 2171 }, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176}, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192}, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200}, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208}, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216}, /* BCLR */ +{ CPUFUNC(op_08b0_3), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232}, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233}, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234}, /* BCLR */ +{ CPUFUNC(op_08bb_3), 2235 }, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240}, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256}, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264}, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272}, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280}, /* BSET */ +{ CPUFUNC(op_08f0_3), 2288 }, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296}, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297}, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298}, /* BSET */ +{ CPUFUNC(op_08fb_3), 2299 }, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560}, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576}, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584}, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592}, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600}, /* EOR */ +{ CPUFUNC(op_0a30_3), 2608 }, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616}, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617}, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620}, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624}, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640}, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648}, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656}, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664}, /* EOR */ +{ CPUFUNC(op_0a70_3), 2672 }, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680}, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681}, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684}, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688}, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704}, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712}, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720}, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728}, /* EOR */ +{ CPUFUNC(op_0ab0_3), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744}, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745}, /* EOR */ +{ CPUFUNC(op_0c00_0), 3072}, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088}, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096}, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104}, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112}, /* CMP */ +{ CPUFUNC(op_0c30_3), 3120 }, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128}, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129}, /* CMP */ +{ CPUFUNC(op_0c40_0), 3136}, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152}, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160}, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168}, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176}, /* CMP */ +{ CPUFUNC(op_0c70_3), 3184 }, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192}, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193}, /* CMP */ +{ CPUFUNC(op_0c80_0), 3200}, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216}, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224}, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232}, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240}, /* CMP */ +{ CPUFUNC(op_0cb0_3), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256}, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257}, /* CMP */ +{ CPUFUNC(op_1000_0), 4096}, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112}, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120}, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128}, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136}, /* MOVE */ +{ CPUFUNC(op_1030_3), 4144 }, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152}, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153}, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154}, /* MOVE */ +{ CPUFUNC(op_103b_3), 4155 }, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156}, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224}, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240}, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248}, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256}, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264}, /* MOVE */ +{ CPUFUNC(op_10b0_3), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280}, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281}, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282}, /* MOVE */ +{ CPUFUNC(op_10bb_3), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284}, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288}, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304}, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312}, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320}, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328}, /* MOVE */ +{ CPUFUNC(op_10f0_3), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344}, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345}, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346}, /* MOVE */ +{ CPUFUNC(op_10fb_3), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348}, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352}, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368}, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376}, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384}, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392}, /* MOVE */ +{ CPUFUNC(op_1130_3), 4400 }, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408}, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409}, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410}, /* MOVE */ +{ CPUFUNC(op_113b_3), 4411 }, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412}, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416}, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432}, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440}, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448}, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456}, /* MOVE */ +{ CPUFUNC(op_1170_3), 4464 }, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472}, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473}, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474}, /* MOVE */ +{ CPUFUNC(op_117b_3), 4475 }, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476}, /* MOVE */ +{ CPUFUNC(op_1180_3), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_3), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_3), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_3), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_3), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_3), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_3), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_3), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_3), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_3), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_3), 4540 }, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544}, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560}, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568}, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576}, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584}, /* MOVE */ +{ CPUFUNC(op_11f0_3), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600}, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601}, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602}, /* MOVE */ +{ CPUFUNC(op_11fb_3), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604}, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056}, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072}, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080}, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088}, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096}, /* MOVE */ +{ CPUFUNC(op_13f0_3), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112}, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113}, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114}, /* MOVE */ +{ CPUFUNC(op_13fb_3), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116}, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192}, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200}, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208}, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216}, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224}, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232}, /* MOVE */ +{ CPUFUNC(op_2030_3), 8240 }, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248}, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249}, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250}, /* MOVE */ +{ CPUFUNC(op_203b_3), 8251 }, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252}, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256}, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264}, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272}, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280}, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288}, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296}, /* MOVEA */ +{ CPUFUNC(op_2070_3), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312}, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313}, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314}, /* MOVEA */ +{ CPUFUNC(op_207b_3), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316}, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320}, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328}, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336}, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344}, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352}, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360}, /* MOVE */ +{ CPUFUNC(op_20b0_3), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376}, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377}, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378}, /* MOVE */ +{ CPUFUNC(op_20bb_3), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380}, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384}, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392}, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400}, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408}, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416}, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424}, /* MOVE */ +{ CPUFUNC(op_20f0_3), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440}, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441}, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442}, /* MOVE */ +{ CPUFUNC(op_20fb_3), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444}, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448}, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456}, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464}, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472}, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480}, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488}, /* MOVE */ +{ CPUFUNC(op_2130_3), 8496 }, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504}, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505}, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506}, /* MOVE */ +{ CPUFUNC(op_213b_3), 8507 }, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508}, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512}, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520}, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528}, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536}, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544}, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552}, /* MOVE */ +{ CPUFUNC(op_2170_3), 8560 }, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568}, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569}, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570}, /* MOVE */ +{ CPUFUNC(op_217b_3), 8571 }, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572}, /* MOVE */ +{ CPUFUNC(op_2180_3), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_3), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_3), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_3), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_3), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_3), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_3), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_3), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_3), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_3), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_3), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_3), 8636 }, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640}, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648}, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656}, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664}, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672}, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680}, /* MOVE */ +{ CPUFUNC(op_21f0_3), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696}, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697}, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698}, /* MOVE */ +{ CPUFUNC(op_21fb_3), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700}, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152}, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160}, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168}, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176}, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184}, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192}, /* MOVE */ +{ CPUFUNC(op_23f0_3), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208}, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209}, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210}, /* MOVE */ +{ CPUFUNC(op_23fb_3), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212}, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288}, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296}, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304}, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312}, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320}, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328}, /* MOVE */ +{ CPUFUNC(op_3030_3), 12336 }, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344}, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345}, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346}, /* MOVE */ +{ CPUFUNC(op_303b_3), 12347 }, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348}, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352}, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360}, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368}, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376}, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384}, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392}, /* MOVEA */ +{ CPUFUNC(op_3070_3), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408}, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409}, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410}, /* MOVEA */ +{ CPUFUNC(op_307b_3), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412}, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416}, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424}, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432}, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440}, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448}, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456}, /* MOVE */ +{ CPUFUNC(op_30b0_3), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472}, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473}, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474}, /* MOVE */ +{ CPUFUNC(op_30bb_3), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476}, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480}, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488}, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496}, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504}, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512}, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520}, /* MOVE */ +{ CPUFUNC(op_30f0_3), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536}, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537}, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538}, /* MOVE */ +{ CPUFUNC(op_30fb_3), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540}, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544}, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552}, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560}, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568}, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576}, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584}, /* MOVE */ +{ CPUFUNC(op_3130_3), 12592 }, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600}, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601}, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602}, /* MOVE */ +{ CPUFUNC(op_313b_3), 12603 }, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604}, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608}, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616}, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624}, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632}, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640}, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648}, /* MOVE */ +{ CPUFUNC(op_3170_3), 12656 }, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664}, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665}, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666}, /* MOVE */ +{ CPUFUNC(op_317b_3), 12667 }, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668}, /* MOVE */ +{ CPUFUNC(op_3180_3), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_3), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_3), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_3), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_3), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_3), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_3), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_3), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_3), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_3), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_3), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_3), 12732 }, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736}, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744}, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752}, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760}, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768}, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776}, /* MOVE */ +{ CPUFUNC(op_31f0_3), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792}, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793}, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794}, /* MOVE */ +{ CPUFUNC(op_31fb_3), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796}, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248}, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256}, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264}, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272}, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280}, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288}, /* MOVE */ +{ CPUFUNC(op_33f0_3), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304}, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305}, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306}, /* MOVE */ +{ CPUFUNC(op_33fb_3), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308}, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384}, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400}, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408}, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416}, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424}, /* NEGX */ +{ CPUFUNC(op_4030_3), 16432 }, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440}, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441}, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448}, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464}, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472}, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480}, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488}, /* NEGX */ +{ CPUFUNC(op_4070_3), 16496 }, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504}, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505}, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512}, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528}, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536}, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544}, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552}, /* NEGX */ +{ CPUFUNC(op_40b0_3), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568}, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569}, /* NEGX */ +{ CPUFUNC(op_40c0_0), 16576}, /* MVSR2 */ +{ CPUFUNC(op_40d0_0), 16592}, /* MVSR2 */ +{ CPUFUNC(op_40d8_0), 16600}, /* MVSR2 */ +{ CPUFUNC(op_40e0_0), 16608}, /* MVSR2 */ +{ CPUFUNC(op_40e8_0), 16616}, /* MVSR2 */ +{ CPUFUNC(op_40f0_3), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_0), 16632}, /* MVSR2 */ +{ CPUFUNC(op_40f9_0), 16633}, /* MVSR2 */ +{ CPUFUNC(op_4100_0), 16640}, /* CHK */ +{ CPUFUNC(op_4110_0), 16656}, /* CHK */ +{ CPUFUNC(op_4118_0), 16664}, /* CHK */ +{ CPUFUNC(op_4120_0), 16672}, /* CHK */ +{ CPUFUNC(op_4128_0), 16680}, /* CHK */ +{ CPUFUNC(op_4130_3), 16688 }, /* CHK */ +{ CPUFUNC(op_4138_0), 16696}, /* CHK */ +{ CPUFUNC(op_4139_0), 16697}, /* CHK */ +{ CPUFUNC(op_413a_0), 16698}, /* CHK */ +{ CPUFUNC(op_413b_3), 16699 }, /* CHK */ +{ CPUFUNC(op_413c_0), 16700}, /* CHK */ +{ CPUFUNC(op_4180_0), 16768}, /* CHK */ +{ CPUFUNC(op_4190_0), 16784}, /* CHK */ +{ CPUFUNC(op_4198_0), 16792}, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800}, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808}, /* CHK */ +{ CPUFUNC(op_41b0_3), 16816 }, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824}, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825}, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826}, /* CHK */ +{ CPUFUNC(op_41bb_3), 16827 }, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828}, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848}, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872}, /* LEA */ +{ CPUFUNC(op_41f0_3), 16880 }, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888}, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889}, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890}, /* LEA */ +{ CPUFUNC(op_41fb_3), 16891 }, /* LEA */ +{ CPUFUNC(op_4200_0), 16896}, /* CLR */ +{ CPUFUNC(op_4210_0), 16912}, /* CLR */ +{ CPUFUNC(op_4218_0), 16920}, /* CLR */ +{ CPUFUNC(op_4220_0), 16928}, /* CLR */ +{ CPUFUNC(op_4228_0), 16936}, /* CLR */ +{ CPUFUNC(op_4230_3), 16944 }, /* CLR */ +{ CPUFUNC(op_4238_0), 16952}, /* CLR */ +{ CPUFUNC(op_4239_0), 16953}, /* CLR */ +{ CPUFUNC(op_4240_0), 16960}, /* CLR */ +{ CPUFUNC(op_4250_0), 16976}, /* CLR */ +{ CPUFUNC(op_4258_0), 16984}, /* CLR */ +{ CPUFUNC(op_4260_0), 16992}, /* CLR */ +{ CPUFUNC(op_4268_0), 17000}, /* CLR */ +{ CPUFUNC(op_4270_3), 17008 }, /* CLR */ +{ CPUFUNC(op_4278_0), 17016}, /* CLR */ +{ CPUFUNC(op_4279_0), 17017}, /* CLR */ +{ CPUFUNC(op_4280_0), 17024}, /* CLR */ +{ CPUFUNC(op_4290_0), 17040}, /* CLR */ +{ CPUFUNC(op_4298_0), 17048}, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056}, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064}, /* CLR */ +{ CPUFUNC(op_42b0_3), 17072 }, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080}, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081}, /* CLR */ +{ CPUFUNC(op_42c0_0), 17088}, /* MVSR2 */ +{ CPUFUNC(op_42d0_0), 17104}, /* MVSR2 */ +{ CPUFUNC(op_42d8_0), 17112}, /* MVSR2 */ +{ CPUFUNC(op_42e0_0), 17120}, /* MVSR2 */ +{ CPUFUNC(op_42e8_0), 17128}, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42f0_3), 17136 }, /* MVSR2 */ +#endif +{ CPUFUNC(op_42f8_0), 17144}, /* MVSR2 */ +{ CPUFUNC(op_42f9_0), 17145}, /* MVSR2 */ +{ CPUFUNC(op_4400_0), 17408}, /* NEG */ +{ CPUFUNC(op_4410_0), 17424}, /* NEG */ +{ CPUFUNC(op_4418_0), 17432}, /* NEG */ +{ CPUFUNC(op_4420_0), 17440}, /* NEG */ +{ CPUFUNC(op_4428_0), 17448}, /* NEG */ +{ CPUFUNC(op_4430_3), 17456 }, /* NEG */ +{ CPUFUNC(op_4438_0), 17464}, /* NEG */ +{ CPUFUNC(op_4439_0), 17465}, /* NEG */ +{ CPUFUNC(op_4440_0), 17472}, /* NEG */ +{ CPUFUNC(op_4450_0), 17488}, /* NEG */ +{ CPUFUNC(op_4458_0), 17496}, /* NEG */ +{ CPUFUNC(op_4460_0), 17504}, /* NEG */ +{ CPUFUNC(op_4468_0), 17512}, /* NEG */ +{ CPUFUNC(op_4470_3), 17520 }, /* NEG */ +{ CPUFUNC(op_4478_0), 17528}, /* NEG */ +{ CPUFUNC(op_4479_0), 17529}, /* NEG */ +{ CPUFUNC(op_4480_0), 17536}, /* NEG */ +{ CPUFUNC(op_4490_0), 17552}, /* NEG */ +{ CPUFUNC(op_4498_0), 17560}, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568}, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576}, /* NEG */ +{ CPUFUNC(op_44b0_3), 17584 }, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592}, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593}, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600}, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616}, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624}, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632}, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640}, /* MV2SR */ +{ CPUFUNC(op_44f0_3), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656}, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657}, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658}, /* MV2SR */ +{ CPUFUNC(op_44fb_3), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660}, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920}, /* NOT */ +{ CPUFUNC(op_4610_0), 17936}, /* NOT */ +{ CPUFUNC(op_4618_0), 17944}, /* NOT */ +{ CPUFUNC(op_4620_0), 17952}, /* NOT */ +{ CPUFUNC(op_4628_0), 17960}, /* NOT */ +{ CPUFUNC(op_4630_3), 17968 }, /* NOT */ +{ CPUFUNC(op_4638_0), 17976}, /* NOT */ +{ CPUFUNC(op_4639_0), 17977}, /* NOT */ +{ CPUFUNC(op_4640_0), 17984}, /* NOT */ +{ CPUFUNC(op_4650_0), 18000}, /* NOT */ +{ CPUFUNC(op_4658_0), 18008}, /* NOT */ +{ CPUFUNC(op_4660_0), 18016}, /* NOT */ +{ CPUFUNC(op_4668_0), 18024}, /* NOT */ +{ CPUFUNC(op_4670_3), 18032 }, /* NOT */ +{ CPUFUNC(op_4678_0), 18040}, /* NOT */ +{ CPUFUNC(op_4679_0), 18041}, /* NOT */ +{ CPUFUNC(op_4680_0), 18048}, /* NOT */ +{ CPUFUNC(op_4690_0), 18064}, /* NOT */ +{ CPUFUNC(op_4698_0), 18072}, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080}, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088}, /* NOT */ +{ CPUFUNC(op_46b0_3), 18096 }, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104}, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105}, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112}, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128}, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136}, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144}, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152}, /* MV2SR */ +{ CPUFUNC(op_46f0_3), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168}, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169}, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170}, /* MV2SR */ +{ CPUFUNC(op_46fb_3), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172}, /* MV2SR */ +{ CPUFUNC(op_4800_0), 18432}, /* NBCD */ +{ CPUFUNC(op_4810_0), 18448}, /* NBCD */ +{ CPUFUNC(op_4818_0), 18456}, /* NBCD */ +{ CPUFUNC(op_4820_0), 18464}, /* NBCD */ +{ CPUFUNC(op_4828_0), 18472}, /* NBCD */ +{ CPUFUNC(op_4830_3), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_0), 18488}, /* NBCD */ +{ CPUFUNC(op_4839_0), 18489}, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496}, /* SWAP */ +{ CPUFUNC(op_4850_0), 18512}, /* PEA */ +{ CPUFUNC(op_4868_0), 18536}, /* PEA */ +{ CPUFUNC(op_4870_3), 18544 }, /* PEA */ +{ CPUFUNC(op_4878_0), 18552}, /* PEA */ +{ CPUFUNC(op_4879_0), 18553}, /* PEA */ +{ CPUFUNC(op_487a_0), 18554}, /* PEA */ +{ CPUFUNC(op_487b_3), 18555 }, /* PEA */ +{ CPUFUNC(op_4880_0), 18560}, /* EXT */ +{ CPUFUNC(op_4890_0), 18576}, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592}, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600}, /* MVMLE */ +{ CPUFUNC(op_48b0_3), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616}, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617}, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624}, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640}, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656}, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664}, /* MVMLE */ +{ CPUFUNC(op_48f0_3), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680}, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681}, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880}, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944}, /* TST */ +{ CPUFUNC(op_4a10_0), 18960}, /* TST */ +{ CPUFUNC(op_4a18_0), 18968}, /* TST */ +{ CPUFUNC(op_4a20_0), 18976}, /* TST */ +{ CPUFUNC(op_4a28_0), 18984}, /* TST */ +{ CPUFUNC(op_4a30_3), 18992 }, /* TST */ +{ CPUFUNC(op_4a38_0), 19000}, /* TST */ +{ CPUFUNC(op_4a39_0), 19001}, /* TST */ +{ CPUFUNC(op_4a40_0), 19008}, /* TST */ +{ CPUFUNC(op_4a50_0), 19024}, /* TST */ +{ CPUFUNC(op_4a58_0), 19032}, /* TST */ +{ CPUFUNC(op_4a60_0), 19040}, /* TST */ +{ CPUFUNC(op_4a68_0), 19048}, /* TST */ +{ CPUFUNC(op_4a70_3), 19056 }, /* TST */ +{ CPUFUNC(op_4a78_0), 19064}, /* TST */ +{ CPUFUNC(op_4a79_0), 19065}, /* TST */ +{ CPUFUNC(op_4a80_0), 19072}, /* TST */ +{ CPUFUNC(op_4a90_0), 19088}, /* TST */ +{ CPUFUNC(op_4a98_0), 19096}, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104}, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112}, /* TST */ +{ CPUFUNC(op_4ab0_3), 19120 }, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128}, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129}, /* TST */ +{ CPUFUNC(op_4ac0_0), 19136}, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152}, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160}, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168}, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176}, /* TAS */ +{ CPUFUNC(op_4af0_3), 19184 }, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192}, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193}, /* TAS */ +{ CPUFUNC(op_4c90_0), 19600}, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608}, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624}, /* MVMEL */ +{ CPUFUNC(op_4cb0_3), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640}, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641}, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642}, /* MVMEL */ +{ CPUFUNC(op_4cbb_3), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664}, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672}, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688}, /* MVMEL */ +{ CPUFUNC(op_4cf0_3), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704}, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705}, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706}, /* MVMEL */ +{ CPUFUNC(op_4cfb_3), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032}, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048}, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056}, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064}, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072}, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080}, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081}, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082}, /* STOP */ +{ CPUFUNC(op_4e73_0), 20083}, /* RTE */ +{ CPUFUNC(op_4e74_0), 20084}, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085}, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086}, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087}, /* RTR */ +{ CPUFUNC(op_4e7a_0), 20090}, /* MOVEC2 */ +{ CPUFUNC(op_4e7b_0), 20091}, /* MOVE2C */ +{ CPUFUNC(op_4e90_0), 20112}, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136}, /* JSR */ +{ CPUFUNC(op_4eb0_3), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152}, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153}, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154}, /* JSR */ +{ CPUFUNC(op_4ebb_3), 20155 }, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176}, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200}, /* JMP */ +{ CPUFUNC(op_4ef0_3), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216}, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217}, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218}, /* JMP */ +{ CPUFUNC(op_4efb_3), 20219 }, /* JMP */ +{ CPUFUNC(op_5000_0), 20480}, /* ADD */ +{ CPUFUNC(op_5010_0), 20496}, /* ADD */ +{ CPUFUNC(op_5018_0), 20504}, /* ADD */ +{ CPUFUNC(op_5020_0), 20512}, /* ADD */ +{ CPUFUNC(op_5028_0), 20520}, /* ADD */ +{ CPUFUNC(op_5030_3), 20528 }, /* ADD */ +{ CPUFUNC(op_5038_0), 20536}, /* ADD */ +{ CPUFUNC(op_5039_0), 20537}, /* ADD */ +{ CPUFUNC(op_5040_0), 20544}, /* ADD */ +{ CPUFUNC(op_5048_0), 20552}, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560}, /* ADD */ +{ CPUFUNC(op_5058_0), 20568}, /* ADD */ +{ CPUFUNC(op_5060_0), 20576}, /* ADD */ +{ CPUFUNC(op_5068_0), 20584}, /* ADD */ +{ CPUFUNC(op_5070_3), 20592 }, /* ADD */ +{ CPUFUNC(op_5078_0), 20600}, /* ADD */ +{ CPUFUNC(op_5079_0), 20601}, /* ADD */ +{ CPUFUNC(op_5080_0), 20608}, /* ADD */ +{ CPUFUNC(op_5088_0), 20616}, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624}, /* ADD */ +{ CPUFUNC(op_5098_0), 20632}, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640}, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648}, /* ADD */ +{ CPUFUNC(op_50b0_3), 20656 }, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664}, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665}, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672}, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680}, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688}, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696}, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704}, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712}, /* Scc */ +{ CPUFUNC(op_50f0_3), 20720 }, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728}, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729}, /* Scc */ +{ CPUFUNC(op_5100_0), 20736}, /* SUB */ +{ CPUFUNC(op_5110_0), 20752}, /* SUB */ +{ CPUFUNC(op_5118_0), 20760}, /* SUB */ +{ CPUFUNC(op_5120_0), 20768}, /* SUB */ +{ CPUFUNC(op_5128_0), 20776}, /* SUB */ +{ CPUFUNC(op_5130_3), 20784 }, /* SUB */ +{ CPUFUNC(op_5138_0), 20792}, /* SUB */ +{ CPUFUNC(op_5139_0), 20793}, /* SUB */ +{ CPUFUNC(op_5140_0), 20800}, /* SUB */ +{ CPUFUNC(op_5148_0), 20808}, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816}, /* SUB */ +{ CPUFUNC(op_5158_0), 20824}, /* SUB */ +{ CPUFUNC(op_5160_0), 20832}, /* SUB */ +{ CPUFUNC(op_5168_0), 20840}, /* SUB */ +{ CPUFUNC(op_5170_3), 20848 }, /* SUB */ +{ CPUFUNC(op_5178_0), 20856}, /* SUB */ +{ CPUFUNC(op_5179_0), 20857}, /* SUB */ +{ CPUFUNC(op_5180_0), 20864}, /* SUB */ +{ CPUFUNC(op_5188_0), 20872}, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880}, /* SUB */ +{ CPUFUNC(op_5198_0), 20888}, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896}, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904}, /* SUB */ +{ CPUFUNC(op_51b0_3), 20912 }, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920}, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921}, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928}, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936}, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944}, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952}, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960}, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968}, /* Scc */ +{ CPUFUNC(op_51f0_3), 20976 }, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984}, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985}, /* Scc */ +{ CPUFUNC(op_52c0_0), 21184}, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192}, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200}, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208}, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216}, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224}, /* Scc */ +{ CPUFUNC(op_52f0_3), 21232 }, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240}, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241}, /* Scc */ +{ CPUFUNC(op_53c0_0), 21440}, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448}, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456}, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464}, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472}, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480}, /* Scc */ +{ CPUFUNC(op_53f0_3), 21488 }, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496}, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497}, /* Scc */ +{ CPUFUNC(op_54c0_0), 21696}, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704}, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712}, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720}, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728}, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736}, /* Scc */ +{ CPUFUNC(op_54f0_3), 21744 }, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752}, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753}, /* Scc */ +{ CPUFUNC(op_55c0_0), 21952}, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960}, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968}, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976}, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984}, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992}, /* Scc */ +{ CPUFUNC(op_55f0_3), 22000 }, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008}, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009}, /* Scc */ +{ CPUFUNC(op_56c0_0), 22208}, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216}, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224}, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232}, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240}, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248}, /* Scc */ +{ CPUFUNC(op_56f0_3), 22256 }, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264}, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265}, /* Scc */ +{ CPUFUNC(op_57c0_0), 22464}, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472}, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480}, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488}, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496}, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504}, /* Scc */ +{ CPUFUNC(op_57f0_3), 22512 }, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520}, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521}, /* Scc */ +{ CPUFUNC(op_58c0_0), 22720}, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728}, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736}, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744}, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752}, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760}, /* Scc */ +{ CPUFUNC(op_58f0_3), 22768 }, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776}, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777}, /* Scc */ +{ CPUFUNC(op_59c0_0), 22976}, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984}, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992}, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000}, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008}, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016}, /* Scc */ +{ CPUFUNC(op_59f0_3), 23024 }, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032}, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033}, /* Scc */ +{ CPUFUNC(op_5ac0_0), 23232}, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240}, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248}, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256}, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264}, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272}, /* Scc */ +{ CPUFUNC(op_5af0_3), 23280 }, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288}, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289}, /* Scc */ +{ CPUFUNC(op_5bc0_0), 23488}, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496}, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504}, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512}, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520}, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528}, /* Scc */ +{ CPUFUNC(op_5bf0_3), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544}, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545}, /* Scc */ +{ CPUFUNC(op_5cc0_0), 23744}, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752}, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760}, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768}, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776}, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784}, /* Scc */ +{ CPUFUNC(op_5cf0_3), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800}, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801}, /* Scc */ +{ CPUFUNC(op_5dc0_0), 24000}, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008}, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016}, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024}, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032}, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040}, /* Scc */ +{ CPUFUNC(op_5df0_3), 24048 }, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056}, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057}, /* Scc */ +{ CPUFUNC(op_5ec0_0), 24256}, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264}, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272}, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280}, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288}, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296}, /* Scc */ +{ CPUFUNC(op_5ef0_3), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312}, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313}, /* Scc */ +{ CPUFUNC(op_5fc0_0), 24512}, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520}, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528}, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536}, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544}, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552}, /* Scc */ +{ CPUFUNC(op_5ff0_3), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568}, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569}, /* Scc */ +{ CPUFUNC(op_6000_0), 24576}, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577}, /* Bcc */ +{ CPUFUNC(op_60ff_3), 24831 }, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832}, /* BSR */ +{ CPUFUNC(op_6101_0), 24833}, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087}, /* BSR */ +{ CPUFUNC(op_6200_0), 25088}, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089}, /* Bcc */ +{ CPUFUNC(op_62ff_3), 25343 }, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344}, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345}, /* Bcc */ +{ CPUFUNC(op_63ff_3), 25599 }, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600}, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601}, /* Bcc */ +{ CPUFUNC(op_64ff_3), 25855 }, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856}, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857}, /* Bcc */ +{ CPUFUNC(op_65ff_3), 26111 }, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112}, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113}, /* Bcc */ +{ CPUFUNC(op_66ff_3), 26367 }, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368}, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369}, /* Bcc */ +{ CPUFUNC(op_67ff_3), 26623 }, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624}, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625}, /* Bcc */ +{ CPUFUNC(op_68ff_3), 26879 }, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880}, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881}, /* Bcc */ +{ CPUFUNC(op_69ff_3), 27135 }, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136}, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137}, /* Bcc */ +{ CPUFUNC(op_6aff_3), 27391 }, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392}, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393}, /* Bcc */ +{ CPUFUNC(op_6bff_3), 27647 }, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648}, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649}, /* Bcc */ +{ CPUFUNC(op_6cff_3), 27903 }, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904}, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905}, /* Bcc */ +{ CPUFUNC(op_6dff_3), 28159 }, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160}, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161}, /* Bcc */ +{ CPUFUNC(op_6eff_3), 28415 }, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416}, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417}, /* Bcc */ +{ CPUFUNC(op_6fff_3), 28671 }, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672}, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768}, /* OR */ +{ CPUFUNC(op_8010_0), 32784}, /* OR */ +{ CPUFUNC(op_8018_0), 32792}, /* OR */ +{ CPUFUNC(op_8020_0), 32800}, /* OR */ +{ CPUFUNC(op_8028_0), 32808}, /* OR */ +{ CPUFUNC(op_8030_3), 32816 }, /* OR */ +{ CPUFUNC(op_8038_0), 32824}, /* OR */ +{ CPUFUNC(op_8039_0), 32825}, /* OR */ +{ CPUFUNC(op_803a_0), 32826}, /* OR */ +{ CPUFUNC(op_803b_3), 32827 }, /* OR */ +{ CPUFUNC(op_803c_0), 32828}, /* OR */ +{ CPUFUNC(op_8040_0), 32832}, /* OR */ +{ CPUFUNC(op_8050_0), 32848}, /* OR */ +{ CPUFUNC(op_8058_0), 32856}, /* OR */ +{ CPUFUNC(op_8060_0), 32864}, /* OR */ +{ CPUFUNC(op_8068_0), 32872}, /* OR */ +{ CPUFUNC(op_8070_3), 32880 }, /* OR */ +{ CPUFUNC(op_8078_0), 32888}, /* OR */ +{ CPUFUNC(op_8079_0), 32889}, /* OR */ +{ CPUFUNC(op_807a_0), 32890}, /* OR */ +{ CPUFUNC(op_807b_3), 32891 }, /* OR */ +{ CPUFUNC(op_807c_0), 32892}, /* OR */ +{ CPUFUNC(op_8080_0), 32896}, /* OR */ +{ CPUFUNC(op_8090_0), 32912}, /* OR */ +{ CPUFUNC(op_8098_0), 32920}, /* OR */ +{ CPUFUNC(op_80a0_0), 32928}, /* OR */ +{ CPUFUNC(op_80a8_0), 32936}, /* OR */ +{ CPUFUNC(op_80b0_3), 32944 }, /* OR */ +{ CPUFUNC(op_80b8_0), 32952}, /* OR */ +{ CPUFUNC(op_80b9_0), 32953}, /* OR */ +{ CPUFUNC(op_80ba_0), 32954}, /* OR */ +{ CPUFUNC(op_80bb_3), 32955 }, /* OR */ +{ CPUFUNC(op_80bc_0), 32956}, /* OR */ +{ CPUFUNC(op_80c0_0), 32960}, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976}, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984}, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992}, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000}, /* DIVU */ +{ CPUFUNC(op_80f0_3), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016}, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017}, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018}, /* DIVU */ +{ CPUFUNC(op_80fb_3), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020}, /* DIVU */ +{ CPUFUNC(op_8100_0), 33024}, /* SBCD */ +{ CPUFUNC(op_8108_0), 33032}, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040}, /* OR */ +{ CPUFUNC(op_8118_0), 33048}, /* OR */ +{ CPUFUNC(op_8120_0), 33056}, /* OR */ +{ CPUFUNC(op_8128_0), 33064}, /* OR */ +{ CPUFUNC(op_8130_3), 33072 }, /* OR */ +{ CPUFUNC(op_8138_0), 33080}, /* OR */ +{ CPUFUNC(op_8139_0), 33081}, /* OR */ +{ CPUFUNC(op_8150_0), 33104}, /* OR */ +{ CPUFUNC(op_8158_0), 33112}, /* OR */ +{ CPUFUNC(op_8160_0), 33120}, /* OR */ +{ CPUFUNC(op_8168_0), 33128}, /* OR */ +{ CPUFUNC(op_8170_3), 33136 }, /* OR */ +{ CPUFUNC(op_8178_0), 33144}, /* OR */ +{ CPUFUNC(op_8179_0), 33145}, /* OR */ +{ CPUFUNC(op_8190_0), 33168}, /* OR */ +{ CPUFUNC(op_8198_0), 33176}, /* OR */ +{ CPUFUNC(op_81a0_0), 33184}, /* OR */ +{ CPUFUNC(op_81a8_0), 33192}, /* OR */ +{ CPUFUNC(op_81b0_3), 33200 }, /* OR */ +{ CPUFUNC(op_81b8_0), 33208}, /* OR */ +{ CPUFUNC(op_81b9_0), 33209}, /* OR */ +{ CPUFUNC(op_81c0_0), 33216}, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232}, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240}, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248}, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256}, /* DIVS */ +{ CPUFUNC(op_81f0_3), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272}, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273}, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274}, /* DIVS */ +{ CPUFUNC(op_81fb_3), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276}, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864}, /* SUB */ +{ CPUFUNC(op_9010_0), 36880}, /* SUB */ +{ CPUFUNC(op_9018_0), 36888}, /* SUB */ +{ CPUFUNC(op_9020_0), 36896}, /* SUB */ +{ CPUFUNC(op_9028_0), 36904}, /* SUB */ +{ CPUFUNC(op_9030_3), 36912 }, /* SUB */ +{ CPUFUNC(op_9038_0), 36920}, /* SUB */ +{ CPUFUNC(op_9039_0), 36921}, /* SUB */ +{ CPUFUNC(op_903a_0), 36922}, /* SUB */ +{ CPUFUNC(op_903b_3), 36923 }, /* SUB */ +{ CPUFUNC(op_903c_0), 36924}, /* SUB */ +{ CPUFUNC(op_9040_0), 36928}, /* SUB */ +{ CPUFUNC(op_9048_0), 36936}, /* SUB */ +{ CPUFUNC(op_9050_0), 36944}, /* SUB */ +{ CPUFUNC(op_9058_0), 36952}, /* SUB */ +{ CPUFUNC(op_9060_0), 36960}, /* SUB */ +{ CPUFUNC(op_9068_0), 36968}, /* SUB */ +{ CPUFUNC(op_9070_3), 36976 }, /* SUB */ +{ CPUFUNC(op_9078_0), 36984}, /* SUB */ +{ CPUFUNC(op_9079_0), 36985}, /* SUB */ +{ CPUFUNC(op_907a_0), 36986}, /* SUB */ +{ CPUFUNC(op_907b_3), 36987 }, /* SUB */ +{ CPUFUNC(op_907c_0), 36988}, /* SUB */ +{ CPUFUNC(op_9080_0), 36992}, /* SUB */ +{ CPUFUNC(op_9088_0), 37000}, /* SUB */ +{ CPUFUNC(op_9090_0), 37008}, /* SUB */ +{ CPUFUNC(op_9098_0), 37016}, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024}, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032}, /* SUB */ +{ CPUFUNC(op_90b0_3), 37040 }, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048}, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049}, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050}, /* SUB */ +{ CPUFUNC(op_90bb_3), 37051 }, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052}, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056}, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064}, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072}, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080}, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088}, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096}, /* SUBA */ +{ CPUFUNC(op_90f0_3), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112}, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113}, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114}, /* SUBA */ +{ CPUFUNC(op_90fb_3), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116}, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120}, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128}, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136}, /* SUB */ +{ CPUFUNC(op_9118_0), 37144}, /* SUB */ +{ CPUFUNC(op_9120_0), 37152}, /* SUB */ +{ CPUFUNC(op_9128_0), 37160}, /* SUB */ +{ CPUFUNC(op_9130_3), 37168 }, /* SUB */ +{ CPUFUNC(op_9138_0), 37176}, /* SUB */ +{ CPUFUNC(op_9139_0), 37177}, /* SUB */ +{ CPUFUNC(op_9140_0), 37184}, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192}, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200}, /* SUB */ +{ CPUFUNC(op_9158_0), 37208}, /* SUB */ +{ CPUFUNC(op_9160_0), 37216}, /* SUB */ +{ CPUFUNC(op_9168_0), 37224}, /* SUB */ +{ CPUFUNC(op_9170_3), 37232 }, /* SUB */ +{ CPUFUNC(op_9178_0), 37240}, /* SUB */ +{ CPUFUNC(op_9179_0), 37241}, /* SUB */ +{ CPUFUNC(op_9180_0), 37248}, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256}, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264}, /* SUB */ +{ CPUFUNC(op_9198_0), 37272}, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280}, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288}, /* SUB */ +{ CPUFUNC(op_91b0_3), 37296 }, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304}, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305}, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312}, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320}, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328}, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336}, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344}, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352}, /* SUBA */ +{ CPUFUNC(op_91f0_3), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368}, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369}, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370}, /* SUBA */ +{ CPUFUNC(op_91fb_3), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372}, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056}, /* CMP */ +{ CPUFUNC(op_b010_0), 45072}, /* CMP */ +{ CPUFUNC(op_b018_0), 45080}, /* CMP */ +{ CPUFUNC(op_b020_0), 45088}, /* CMP */ +{ CPUFUNC(op_b028_0), 45096}, /* CMP */ +{ CPUFUNC(op_b030_3), 45104 }, /* CMP */ +{ CPUFUNC(op_b038_0), 45112}, /* CMP */ +{ CPUFUNC(op_b039_0), 45113}, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114}, /* CMP */ +{ CPUFUNC(op_b03b_3), 45115 }, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116}, /* CMP */ +{ CPUFUNC(op_b040_0), 45120}, /* CMP */ +{ CPUFUNC(op_b048_0), 45128}, /* CMP */ +{ CPUFUNC(op_b050_0), 45136}, /* CMP */ +{ CPUFUNC(op_b058_0), 45144}, /* CMP */ +{ CPUFUNC(op_b060_0), 45152}, /* CMP */ +{ CPUFUNC(op_b068_0), 45160}, /* CMP */ +{ CPUFUNC(op_b070_3), 45168 }, /* CMP */ +{ CPUFUNC(op_b078_0), 45176}, /* CMP */ +{ CPUFUNC(op_b079_0), 45177}, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178}, /* CMP */ +{ CPUFUNC(op_b07b_3), 45179 }, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180}, /* CMP */ +{ CPUFUNC(op_b080_0), 45184}, /* CMP */ +{ CPUFUNC(op_b088_0), 45192}, /* CMP */ +{ CPUFUNC(op_b090_0), 45200}, /* CMP */ +{ CPUFUNC(op_b098_0), 45208}, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216}, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224}, /* CMP */ +{ CPUFUNC(op_b0b0_3), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240}, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241}, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242}, /* CMP */ +{ CPUFUNC(op_b0bb_3), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244}, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248}, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256}, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264}, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272}, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280}, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288}, /* CMPA */ +{ CPUFUNC(op_b0f0_3), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304}, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305}, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306}, /* CMPA */ +{ CPUFUNC(op_b0fb_3), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308}, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312}, /* EOR */ +{ CPUFUNC(op_b108_0), 45320}, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328}, /* EOR */ +{ CPUFUNC(op_b118_0), 45336}, /* EOR */ +{ CPUFUNC(op_b120_0), 45344}, /* EOR */ +{ CPUFUNC(op_b128_0), 45352}, /* EOR */ +{ CPUFUNC(op_b130_3), 45360 }, /* EOR */ +{ CPUFUNC(op_b138_0), 45368}, /* EOR */ +{ CPUFUNC(op_b139_0), 45369}, /* EOR */ +{ CPUFUNC(op_b140_0), 45376}, /* EOR */ +{ CPUFUNC(op_b148_0), 45384}, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392}, /* EOR */ +{ CPUFUNC(op_b158_0), 45400}, /* EOR */ +{ CPUFUNC(op_b160_0), 45408}, /* EOR */ +{ CPUFUNC(op_b168_0), 45416}, /* EOR */ +{ CPUFUNC(op_b170_3), 45424 }, /* EOR */ +{ CPUFUNC(op_b178_0), 45432}, /* EOR */ +{ CPUFUNC(op_b179_0), 45433}, /* EOR */ +{ CPUFUNC(op_b180_0), 45440}, /* EOR */ +{ CPUFUNC(op_b188_0), 45448}, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456}, /* EOR */ +{ CPUFUNC(op_b198_0), 45464}, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472}, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480}, /* EOR */ +{ CPUFUNC(op_b1b0_3), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496}, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497}, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504}, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512}, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520}, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528}, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536}, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544}, /* CMPA */ +{ CPUFUNC(op_b1f0_3), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560}, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561}, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562}, /* CMPA */ +{ CPUFUNC(op_b1fb_3), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564}, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152}, /* AND */ +{ CPUFUNC(op_c010_0), 49168}, /* AND */ +{ CPUFUNC(op_c018_0), 49176}, /* AND */ +{ CPUFUNC(op_c020_0), 49184}, /* AND */ +{ CPUFUNC(op_c028_0), 49192}, /* AND */ +{ CPUFUNC(op_c030_3), 49200 }, /* AND */ +{ CPUFUNC(op_c038_0), 49208}, /* AND */ +{ CPUFUNC(op_c039_0), 49209}, /* AND */ +{ CPUFUNC(op_c03a_0), 49210}, /* AND */ +{ CPUFUNC(op_c03b_3), 49211 }, /* AND */ +{ CPUFUNC(op_c03c_0), 49212}, /* AND */ +{ CPUFUNC(op_c040_0), 49216}, /* AND */ +{ CPUFUNC(op_c050_0), 49232}, /* AND */ +{ CPUFUNC(op_c058_0), 49240}, /* AND */ +{ CPUFUNC(op_c060_0), 49248}, /* AND */ +{ CPUFUNC(op_c068_0), 49256}, /* AND */ +{ CPUFUNC(op_c070_3), 49264 }, /* AND */ +{ CPUFUNC(op_c078_0), 49272}, /* AND */ +{ CPUFUNC(op_c079_0), 49273}, /* AND */ +{ CPUFUNC(op_c07a_0), 49274}, /* AND */ +{ CPUFUNC(op_c07b_3), 49275 }, /* AND */ +{ CPUFUNC(op_c07c_0), 49276}, /* AND */ +{ CPUFUNC(op_c080_0), 49280}, /* AND */ +{ CPUFUNC(op_c090_0), 49296}, /* AND */ +{ CPUFUNC(op_c098_0), 49304}, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312}, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320}, /* AND */ +{ CPUFUNC(op_c0b0_3), 49328 }, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336}, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337}, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338}, /* AND */ +{ CPUFUNC(op_c0bb_3), 49339 }, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340}, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344}, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360}, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368}, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376}, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384}, /* MULU */ +{ CPUFUNC(op_c0f0_3), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400}, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401}, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402}, /* MULU */ +{ CPUFUNC(op_c0fb_3), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404}, /* MULU */ +{ CPUFUNC(op_c100_0), 49408}, /* ABCD */ +{ CPUFUNC(op_c108_0), 49416}, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424}, /* AND */ +{ CPUFUNC(op_c118_0), 49432}, /* AND */ +{ CPUFUNC(op_c120_0), 49440}, /* AND */ +{ CPUFUNC(op_c128_0), 49448}, /* AND */ +{ CPUFUNC(op_c130_3), 49456 }, /* AND */ +{ CPUFUNC(op_c138_0), 49464}, /* AND */ +{ CPUFUNC(op_c139_0), 49465}, /* AND */ +{ CPUFUNC(op_c140_0), 49472}, /* EXG */ +{ CPUFUNC(op_c148_0), 49480}, /* EXG */ +{ CPUFUNC(op_c150_0), 49488}, /* AND */ +{ CPUFUNC(op_c158_0), 49496}, /* AND */ +{ CPUFUNC(op_c160_0), 49504}, /* AND */ +{ CPUFUNC(op_c168_0), 49512}, /* AND */ +{ CPUFUNC(op_c170_3), 49520 }, /* AND */ +{ CPUFUNC(op_c178_0), 49528}, /* AND */ +{ CPUFUNC(op_c179_0), 49529}, /* AND */ +{ CPUFUNC(op_c188_0), 49544}, /* EXG */ +{ CPUFUNC(op_c190_0), 49552}, /* AND */ +{ CPUFUNC(op_c198_0), 49560}, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568}, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576}, /* AND */ +{ CPUFUNC(op_c1b0_3), 49584 }, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592}, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593}, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600}, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616}, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624}, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632}, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640}, /* MULS */ +{ CPUFUNC(op_c1f0_3), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656}, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657}, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658}, /* MULS */ +{ CPUFUNC(op_c1fb_3), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660}, /* MULS */ +{ CPUFUNC(op_d000_0), 53248}, /* ADD */ +{ CPUFUNC(op_d010_0), 53264}, /* ADD */ +{ CPUFUNC(op_d018_0), 53272}, /* ADD */ +{ CPUFUNC(op_d020_0), 53280}, /* ADD */ +{ CPUFUNC(op_d028_0), 53288}, /* ADD */ +{ CPUFUNC(op_d030_3), 53296 }, /* ADD */ +{ CPUFUNC(op_d038_0), 53304}, /* ADD */ +{ CPUFUNC(op_d039_0), 53305}, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306}, /* ADD */ +{ CPUFUNC(op_d03b_3), 53307 }, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308}, /* ADD */ +{ CPUFUNC(op_d040_0), 53312}, /* ADD */ +{ CPUFUNC(op_d048_0), 53320}, /* ADD */ +{ CPUFUNC(op_d050_0), 53328}, /* ADD */ +{ CPUFUNC(op_d058_0), 53336}, /* ADD */ +{ CPUFUNC(op_d060_0), 53344}, /* ADD */ +{ CPUFUNC(op_d068_0), 53352}, /* ADD */ +{ CPUFUNC(op_d070_3), 53360 }, /* ADD */ +{ CPUFUNC(op_d078_0), 53368}, /* ADD */ +{ CPUFUNC(op_d079_0), 53369}, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370}, /* ADD */ +{ CPUFUNC(op_d07b_3), 53371 }, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372}, /* ADD */ +{ CPUFUNC(op_d080_0), 53376}, /* ADD */ +{ CPUFUNC(op_d088_0), 53384}, /* ADD */ +{ CPUFUNC(op_d090_0), 53392}, /* ADD */ +{ CPUFUNC(op_d098_0), 53400}, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408}, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416}, /* ADD */ +{ CPUFUNC(op_d0b0_3), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432}, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433}, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434}, /* ADD */ +{ CPUFUNC(op_d0bb_3), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436}, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440}, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448}, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456}, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464}, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472}, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480}, /* ADDA */ +{ CPUFUNC(op_d0f0_3), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496}, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497}, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498}, /* ADDA */ +{ CPUFUNC(op_d0fb_3), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500}, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504}, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512}, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520}, /* ADD */ +{ CPUFUNC(op_d118_0), 53528}, /* ADD */ +{ CPUFUNC(op_d120_0), 53536}, /* ADD */ +{ CPUFUNC(op_d128_0), 53544}, /* ADD */ +{ CPUFUNC(op_d130_3), 53552 }, /* ADD */ +{ CPUFUNC(op_d138_0), 53560}, /* ADD */ +{ CPUFUNC(op_d139_0), 53561}, /* ADD */ +{ CPUFUNC(op_d140_0), 53568}, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576}, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584}, /* ADD */ +{ CPUFUNC(op_d158_0), 53592}, /* ADD */ +{ CPUFUNC(op_d160_0), 53600}, /* ADD */ +{ CPUFUNC(op_d168_0), 53608}, /* ADD */ +{ CPUFUNC(op_d170_3), 53616 }, /* ADD */ +{ CPUFUNC(op_d178_0), 53624}, /* ADD */ +{ CPUFUNC(op_d179_0), 53625}, /* ADD */ +{ CPUFUNC(op_d180_0), 53632}, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640}, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648}, /* ADD */ +{ CPUFUNC(op_d198_0), 53656}, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664}, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672}, /* ADD */ +{ CPUFUNC(op_d1b0_3), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688}, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689}, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696}, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704}, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712}, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720}, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728}, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736}, /* ADDA */ +{ CPUFUNC(op_d1f0_3), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752}, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753}, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754}, /* ADDA */ +{ CPUFUNC(op_d1fb_3), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756}, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344}, /* ASR */ +{ CPUFUNC(op_e008_0), 57352}, /* LSR */ +{ CPUFUNC(op_e010_0), 57360}, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368}, /* ROR */ +{ CPUFUNC(op_e020_0), 57376}, /* ASR */ +{ CPUFUNC(op_e028_0), 57384}, /* LSR */ +{ CPUFUNC(op_e030_0), 57392}, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400}, /* ROR */ +{ CPUFUNC(op_e040_0), 57408}, /* ASR */ +{ CPUFUNC(op_e048_0), 57416}, /* LSR */ +{ CPUFUNC(op_e050_0), 57424}, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432}, /* ROR */ +{ CPUFUNC(op_e060_0), 57440}, /* ASR */ +{ CPUFUNC(op_e068_0), 57448}, /* LSR */ +{ CPUFUNC(op_e070_0), 57456}, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464}, /* ROR */ +{ CPUFUNC(op_e080_0), 57472}, /* ASR */ +{ CPUFUNC(op_e088_0), 57480}, /* LSR */ +{ CPUFUNC(op_e090_0), 57488}, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496}, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504}, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512}, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520}, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528}, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552}, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560}, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568}, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576}, /* ASRW */ +{ CPUFUNC(op_e0f0_3), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592}, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593}, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600}, /* ASL */ +{ CPUFUNC(op_e108_0), 57608}, /* LSL */ +{ CPUFUNC(op_e110_0), 57616}, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624}, /* ROL */ +{ CPUFUNC(op_e120_0), 57632}, /* ASL */ +{ CPUFUNC(op_e128_0), 57640}, /* LSL */ +{ CPUFUNC(op_e130_0), 57648}, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656}, /* ROL */ +{ CPUFUNC(op_e140_0), 57664}, /* ASL */ +{ CPUFUNC(op_e148_0), 57672}, /* LSL */ +{ CPUFUNC(op_e150_0), 57680}, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688}, /* ROL */ +{ CPUFUNC(op_e160_0), 57696}, /* ASL */ +{ CPUFUNC(op_e168_0), 57704}, /* LSL */ +{ CPUFUNC(op_e170_0), 57712}, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720}, /* ROL */ +{ CPUFUNC(op_e180_0), 57728}, /* ASL */ +{ CPUFUNC(op_e188_0), 57736}, /* LSL */ +{ CPUFUNC(op_e190_0), 57744}, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752}, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760}, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768}, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776}, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784}, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808}, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816}, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824}, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832}, /* ASLW */ +{ CPUFUNC(op_e1f0_3), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848}, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849}, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064}, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072}, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080}, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088}, /* LSRW */ +{ CPUFUNC(op_e2f0_3), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104}, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105}, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320}, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328}, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336}, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344}, /* LSLW */ +{ CPUFUNC(op_e3f0_3), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360}, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361}, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576}, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584}, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592}, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600}, /* ROXRW */ +{ CPUFUNC(op_e4f0_3), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616}, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617}, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832}, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840}, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848}, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856}, /* ROXLW */ +{ CPUFUNC(op_e5f0_3), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872}, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873}, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088}, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096}, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104}, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112}, /* RORW */ +{ CPUFUNC(op_e6f0_3), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128}, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129}, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344}, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352}, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360}, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368}, /* ROLW */ +{ CPUFUNC(op_e7f0_3), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384}, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385}, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +const struct cputbl CPUFUNC(op_smalltbl_4)[] = { +{ CPUFUNC(op_0000_0), 0}, /* OR */ +{ CPUFUNC(op_0010_0), 16}, /* OR */ +{ CPUFUNC(op_0018_0), 24}, /* OR */ +{ CPUFUNC(op_0020_0), 32}, /* OR */ +{ CPUFUNC(op_0028_0), 40}, /* OR */ +{ CPUFUNC(op_0030_3), 48}, /* OR */ +{ CPUFUNC(op_0038_0), 56}, /* OR */ +{ CPUFUNC(op_0039_0), 57}, /* OR */ +{ CPUFUNC(op_003c_0), 60}, /* ORSR */ +{ CPUFUNC(op_0040_0), 64}, /* OR */ +{ CPUFUNC(op_0050_0), 80}, /* OR */ +{ CPUFUNC(op_0058_0), 88}, /* OR */ +{ CPUFUNC(op_0060_0), 96}, /* OR */ +{ CPUFUNC(op_0068_0), 104}, /* OR */ +{ CPUFUNC(op_0070_3), 112}, /* OR */ +{ CPUFUNC(op_0078_0), 120}, /* OR */ +{ CPUFUNC(op_0079_0), 121}, /* OR */ +{ CPUFUNC(op_007c_0), 124}, /* ORSR */ +{ CPUFUNC(op_0080_0), 128}, /* OR */ +{ CPUFUNC(op_0090_0), 144}, /* OR */ +{ CPUFUNC(op_0098_0), 152}, /* OR */ +{ CPUFUNC(op_00a0_0), 160}, /* OR */ +{ CPUFUNC(op_00a8_0), 168}, /* OR */ +{ CPUFUNC(op_00b0_3), 176}, /* OR */ +{ CPUFUNC(op_00b8_0), 184}, /* OR */ +{ CPUFUNC(op_00b9_0), 185}, /* OR */ +{ CPUFUNC(op_0100_0), 256}, /* BTST */ +{ CPUFUNC(op_0108_0), 264}, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272}, /* BTST */ +{ CPUFUNC(op_0118_0), 280}, /* BTST */ +{ CPUFUNC(op_0120_0), 288}, /* BTST */ +{ CPUFUNC(op_0128_0), 296}, /* BTST */ +{ CPUFUNC(op_0130_3), 304}, /* BTST */ +{ CPUFUNC(op_0138_0), 312}, /* BTST */ +{ CPUFUNC(op_0139_0), 313}, /* BTST */ +{ CPUFUNC(op_013a_0), 314}, /* BTST */ +{ CPUFUNC(op_013b_3), 315}, /* BTST */ +{ CPUFUNC(op_013c_0), 316}, /* BTST */ +{ CPUFUNC(op_0140_0), 320}, /* BCHG */ +{ CPUFUNC(op_0148_0), 328}, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336}, /* BCHG */ +{ CPUFUNC(op_0158_0), 344}, /* BCHG */ +{ CPUFUNC(op_0160_0), 352}, /* BCHG */ +{ CPUFUNC(op_0168_0), 360}, /* BCHG */ +{ CPUFUNC(op_0170_3), 368}, /* BCHG */ +{ CPUFUNC(op_0178_0), 376}, /* BCHG */ +{ CPUFUNC(op_0179_0), 377}, /* BCHG */ +{ CPUFUNC(op_017a_0), 378}, /* BCHG */ +{ CPUFUNC(op_017b_3), 379}, /* BCHG */ +{ CPUFUNC(op_0180_0), 384}, /* BCLR */ +{ CPUFUNC(op_0188_0), 392}, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400}, /* BCLR */ +{ CPUFUNC(op_0198_0), 408}, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416}, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424}, /* BCLR */ +{ CPUFUNC(op_01b0_3), 432}, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440}, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441}, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442}, /* BCLR */ +{ CPUFUNC(op_01bb_3), 443}, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448}, /* BSET */ +{ CPUFUNC(op_01c8_0), 456}, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464}, /* BSET */ +{ CPUFUNC(op_01d8_0), 472}, /* BSET */ +{ CPUFUNC(op_01e0_0), 480}, /* BSET */ +{ CPUFUNC(op_01e8_0), 488}, /* BSET */ +{ CPUFUNC(op_01f0_3), 496}, /* BSET */ +{ CPUFUNC(op_01f8_0), 504}, /* BSET */ +{ CPUFUNC(op_01f9_0), 505}, /* BSET */ +{ CPUFUNC(op_01fa_0), 506}, /* BSET */ +{ CPUFUNC(op_01fb_3), 507}, /* BSET */ +{ CPUFUNC(op_0200_0), 512}, /* AND */ +{ CPUFUNC(op_0210_0), 528}, /* AND */ +{ CPUFUNC(op_0218_0), 536}, /* AND */ +{ CPUFUNC(op_0220_0), 544}, /* AND */ +{ CPUFUNC(op_0228_0), 552}, /* AND */ +{ CPUFUNC(op_0230_3), 560}, /* AND */ +{ CPUFUNC(op_0238_0), 568}, /* AND */ +{ CPUFUNC(op_0239_0), 569}, /* AND */ +{ CPUFUNC(op_023c_0), 572}, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576}, /* AND */ +{ CPUFUNC(op_0250_0), 592}, /* AND */ +{ CPUFUNC(op_0258_0), 600}, /* AND */ +{ CPUFUNC(op_0260_0), 608}, /* AND */ +{ CPUFUNC(op_0268_0), 616}, /* AND */ +{ CPUFUNC(op_0270_3), 624}, /* AND */ +{ CPUFUNC(op_0278_0), 632}, /* AND */ +{ CPUFUNC(op_0279_0), 633}, /* AND */ +{ CPUFUNC(op_027c_0), 636}, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640}, /* AND */ +{ CPUFUNC(op_0290_0), 656}, /* AND */ +{ CPUFUNC(op_0298_0), 664}, /* AND */ +{ CPUFUNC(op_02a0_0), 672}, /* AND */ +{ CPUFUNC(op_02a8_0), 680}, /* AND */ +{ CPUFUNC(op_02b0_3), 688}, /* AND */ +{ CPUFUNC(op_02b8_0), 696}, /* AND */ +{ CPUFUNC(op_02b9_0), 697}, /* AND */ +{ CPUFUNC(op_0400_0), 1024}, /* SUB */ +{ CPUFUNC(op_0410_0), 1040}, /* SUB */ +{ CPUFUNC(op_0418_0), 1048}, /* SUB */ +{ CPUFUNC(op_0420_0), 1056}, /* SUB */ +{ CPUFUNC(op_0428_0), 1064}, /* SUB */ +{ CPUFUNC(op_0430_3), 1072}, /* SUB */ +{ CPUFUNC(op_0438_0), 1080}, /* SUB */ +{ CPUFUNC(op_0439_0), 1081}, /* SUB */ +{ CPUFUNC(op_0440_0), 1088}, /* SUB */ +{ CPUFUNC(op_0450_0), 1104}, /* SUB */ +{ CPUFUNC(op_0458_0), 1112}, /* SUB */ +{ CPUFUNC(op_0460_0), 1120}, /* SUB */ +{ CPUFUNC(op_0468_0), 1128}, /* SUB */ +{ CPUFUNC(op_0470_3), 1136}, /* SUB */ +{ CPUFUNC(op_0478_0), 1144}, /* SUB */ +{ CPUFUNC(op_0479_0), 1145}, /* SUB */ +{ CPUFUNC(op_0480_0), 1152}, /* SUB */ +{ CPUFUNC(op_0490_0), 1168}, /* SUB */ +{ CPUFUNC(op_0498_0), 1176}, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184}, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192}, /* SUB */ +{ CPUFUNC(op_04b0_3), 1200}, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208}, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209}, /* SUB */ +{ CPUFUNC(op_0600_0), 1536}, /* ADD */ +{ CPUFUNC(op_0610_0), 1552}, /* ADD */ +{ CPUFUNC(op_0618_0), 1560}, /* ADD */ +{ CPUFUNC(op_0620_0), 1568}, /* ADD */ +{ CPUFUNC(op_0628_0), 1576}, /* ADD */ +{ CPUFUNC(op_0630_3), 1584}, /* ADD */ +{ CPUFUNC(op_0638_0), 1592}, /* ADD */ +{ CPUFUNC(op_0639_0), 1593}, /* ADD */ +{ CPUFUNC(op_0640_0), 1600}, /* ADD */ +{ CPUFUNC(op_0650_0), 1616}, /* ADD */ +{ CPUFUNC(op_0658_0), 1624}, /* ADD */ +{ CPUFUNC(op_0660_0), 1632}, /* ADD */ +{ CPUFUNC(op_0668_0), 1640}, /* ADD */ +{ CPUFUNC(op_0670_3), 1648}, /* ADD */ +{ CPUFUNC(op_0678_0), 1656}, /* ADD */ +{ CPUFUNC(op_0679_0), 1657}, /* ADD */ +{ CPUFUNC(op_0680_0), 1664}, /* ADD */ +{ CPUFUNC(op_0690_0), 1680}, /* ADD */ +{ CPUFUNC(op_0698_0), 1688}, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696}, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704}, /* ADD */ +{ CPUFUNC(op_06b0_3), 1712}, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720}, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721}, /* ADD */ +{ CPUFUNC(op_0800_0), 2048}, /* BTST */ +{ CPUFUNC(op_0810_0), 2064}, /* BTST */ +{ CPUFUNC(op_0818_0), 2072}, /* BTST */ +{ CPUFUNC(op_0820_0), 2080}, /* BTST */ +{ CPUFUNC(op_0828_0), 2088}, /* BTST */ +{ CPUFUNC(op_0830_3), 2096}, /* BTST */ +{ CPUFUNC(op_0838_0), 2104}, /* BTST */ +{ CPUFUNC(op_0839_0), 2105}, /* BTST */ +{ CPUFUNC(op_083a_0), 2106}, /* BTST */ +{ CPUFUNC(op_083b_3), 2107}, /* BTST */ +{ CPUFUNC(op_083c_0), 2108}, /* BTST */ +{ CPUFUNC(op_0840_0), 2112}, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128}, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136}, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144}, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152}, /* BCHG */ +{ CPUFUNC(op_0870_3), 2160}, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168}, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169}, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170}, /* BCHG */ +{ CPUFUNC(op_087b_3), 2171}, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176}, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192}, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200}, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208}, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216}, /* BCLR */ +{ CPUFUNC(op_08b0_3), 2224}, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232}, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233}, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234}, /* BCLR */ +{ CPUFUNC(op_08bb_3), 2235}, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240}, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256}, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264}, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272}, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280}, /* BSET */ +{ CPUFUNC(op_08f0_3), 2288}, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296}, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297}, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298}, /* BSET */ +{ CPUFUNC(op_08fb_3), 2299}, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560}, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576}, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584}, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592}, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600}, /* EOR */ +{ CPUFUNC(op_0a30_3), 2608}, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616}, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617}, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620}, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624}, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640}, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648}, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656}, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664}, /* EOR */ +{ CPUFUNC(op_0a70_3), 2672}, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680}, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681}, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684}, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688}, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704}, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712}, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720}, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728}, /* EOR */ +{ CPUFUNC(op_0ab0_3), 2736}, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744}, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745}, /* EOR */ +{ CPUFUNC(op_0c00_0), 3072}, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088}, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096}, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104}, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112}, /* CMP */ +{ CPUFUNC(op_0c30_3), 3120}, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128}, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129}, /* CMP */ +{ CPUFUNC(op_0c40_0), 3136}, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152}, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160}, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168}, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176}, /* CMP */ +{ CPUFUNC(op_0c70_3), 3184}, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192}, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193}, /* CMP */ +{ CPUFUNC(op_0c80_0), 3200}, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216}, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224}, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232}, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240}, /* CMP */ +{ CPUFUNC(op_0cb0_3), 3248}, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256}, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257}, /* CMP */ +{ CPUFUNC(op_1000_0), 4096}, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112}, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120}, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128}, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136}, /* MOVE */ +{ CPUFUNC(op_1030_3), 4144}, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152}, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153}, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154}, /* MOVE */ +{ CPUFUNC(op_103b_3), 4155}, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156}, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224}, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240}, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248}, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256}, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264}, /* MOVE */ +{ CPUFUNC(op_10b0_3), 4272}, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280}, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281}, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282}, /* MOVE */ +{ CPUFUNC(op_10bb_3), 4283}, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284}, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288}, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304}, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312}, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320}, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328}, /* MOVE */ +{ CPUFUNC(op_10f0_3), 4336}, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344}, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345}, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346}, /* MOVE */ +{ CPUFUNC(op_10fb_3), 4347}, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348}, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352}, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368}, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376}, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384}, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392}, /* MOVE */ +{ CPUFUNC(op_1130_3), 4400}, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408}, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409}, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410}, /* MOVE */ +{ CPUFUNC(op_113b_3), 4411}, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412}, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416}, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432}, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440}, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448}, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456}, /* MOVE */ +{ CPUFUNC(op_1170_3), 4464}, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472}, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473}, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474}, /* MOVE */ +{ CPUFUNC(op_117b_3), 4475}, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476}, /* MOVE */ +{ CPUFUNC(op_1180_3), 4480}, /* MOVE */ +{ CPUFUNC(op_1190_3), 4496}, /* MOVE */ +{ CPUFUNC(op_1198_3), 4504}, /* MOVE */ +{ CPUFUNC(op_11a0_3), 4512}, /* MOVE */ +{ CPUFUNC(op_11a8_3), 4520}, /* MOVE */ +{ CPUFUNC(op_11b0_3), 4528}, /* MOVE */ +{ CPUFUNC(op_11b8_3), 4536}, /* MOVE */ +{ CPUFUNC(op_11b9_3), 4537}, /* MOVE */ +{ CPUFUNC(op_11ba_3), 4538}, /* MOVE */ +{ CPUFUNC(op_11bb_3), 4539}, /* MOVE */ +{ CPUFUNC(op_11bc_3), 4540}, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544}, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560}, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568}, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576}, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584}, /* MOVE */ +{ CPUFUNC(op_11f0_3), 4592}, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600}, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601}, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602}, /* MOVE */ +{ CPUFUNC(op_11fb_3), 4603}, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604}, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056}, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072}, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080}, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088}, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096}, /* MOVE */ +{ CPUFUNC(op_13f0_3), 5104}, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112}, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113}, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114}, /* MOVE */ +{ CPUFUNC(op_13fb_3), 5115}, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116}, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192}, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200}, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208}, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216}, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224}, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232}, /* MOVE */ +{ CPUFUNC(op_2030_3), 8240}, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248}, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249}, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250}, /* MOVE */ +{ CPUFUNC(op_203b_3), 8251}, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252}, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256}, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264}, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272}, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280}, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288}, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296}, /* MOVEA */ +{ CPUFUNC(op_2070_3), 8304}, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312}, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313}, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314}, /* MOVEA */ +{ CPUFUNC(op_207b_3), 8315}, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316}, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320}, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328}, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336}, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344}, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352}, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360}, /* MOVE */ +{ CPUFUNC(op_20b0_3), 8368}, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376}, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377}, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378}, /* MOVE */ +{ CPUFUNC(op_20bb_3), 8379}, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380}, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384}, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392}, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400}, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408}, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416}, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424}, /* MOVE */ +{ CPUFUNC(op_20f0_3), 8432}, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440}, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441}, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442}, /* MOVE */ +{ CPUFUNC(op_20fb_3), 8443}, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444}, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448}, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456}, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464}, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472}, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480}, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488}, /* MOVE */ +{ CPUFUNC(op_2130_3), 8496}, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504}, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505}, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506}, /* MOVE */ +{ CPUFUNC(op_213b_3), 8507}, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508}, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512}, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520}, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528}, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536}, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544}, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552}, /* MOVE */ +{ CPUFUNC(op_2170_3), 8560}, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568}, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569}, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570}, /* MOVE */ +{ CPUFUNC(op_217b_3), 8571}, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572}, /* MOVE */ +{ CPUFUNC(op_2180_3), 8576}, /* MOVE */ +{ CPUFUNC(op_2188_3), 8584}, /* MOVE */ +{ CPUFUNC(op_2190_3), 8592}, /* MOVE */ +{ CPUFUNC(op_2198_3), 8600}, /* MOVE */ +{ CPUFUNC(op_21a0_3), 8608}, /* MOVE */ +{ CPUFUNC(op_21a8_3), 8616}, /* MOVE */ +{ CPUFUNC(op_21b0_3), 8624}, /* MOVE */ +{ CPUFUNC(op_21b8_3), 8632}, /* MOVE */ +{ CPUFUNC(op_21b9_3), 8633}, /* MOVE */ +{ CPUFUNC(op_21ba_3), 8634}, /* MOVE */ +{ CPUFUNC(op_21bb_3), 8635}, /* MOVE */ +{ CPUFUNC(op_21bc_3), 8636}, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640}, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648}, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656}, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664}, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672}, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680}, /* MOVE */ +{ CPUFUNC(op_21f0_3), 8688}, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696}, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697}, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698}, /* MOVE */ +{ CPUFUNC(op_21fb_3), 8699}, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700}, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152}, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160}, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168}, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176}, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184}, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192}, /* MOVE */ +{ CPUFUNC(op_23f0_3), 9200}, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208}, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209}, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210}, /* MOVE */ +{ CPUFUNC(op_23fb_3), 9211}, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212}, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288}, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296}, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304}, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312}, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320}, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328}, /* MOVE */ +{ CPUFUNC(op_3030_3), 12336}, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344}, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345}, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346}, /* MOVE */ +{ CPUFUNC(op_303b_3), 12347}, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348}, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352}, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360}, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368}, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376}, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384}, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392}, /* MOVEA */ +{ CPUFUNC(op_3070_3), 12400}, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408}, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409}, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410}, /* MOVEA */ +{ CPUFUNC(op_307b_3), 12411}, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412}, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416}, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424}, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432}, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440}, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448}, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456}, /* MOVE */ +{ CPUFUNC(op_30b0_3), 12464}, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472}, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473}, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474}, /* MOVE */ +{ CPUFUNC(op_30bb_3), 12475}, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476}, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480}, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488}, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496}, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504}, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512}, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520}, /* MOVE */ +{ CPUFUNC(op_30f0_3), 12528}, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536}, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537}, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538}, /* MOVE */ +{ CPUFUNC(op_30fb_3), 12539}, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540}, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544}, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552}, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560}, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568}, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576}, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584}, /* MOVE */ +{ CPUFUNC(op_3130_3), 12592}, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600}, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601}, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602}, /* MOVE */ +{ CPUFUNC(op_313b_3), 12603}, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604}, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608}, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616}, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624}, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632}, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640}, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648}, /* MOVE */ +{ CPUFUNC(op_3170_3), 12656}, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664}, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665}, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666}, /* MOVE */ +{ CPUFUNC(op_317b_3), 12667}, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668}, /* MOVE */ +{ CPUFUNC(op_3180_3), 12672}, /* MOVE */ +{ CPUFUNC(op_3188_3), 12680}, /* MOVE */ +{ CPUFUNC(op_3190_3), 12688}, /* MOVE */ +{ CPUFUNC(op_3198_3), 12696}, /* MOVE */ +{ CPUFUNC(op_31a0_3), 12704}, /* MOVE */ +{ CPUFUNC(op_31a8_3), 12712}, /* MOVE */ +{ CPUFUNC(op_31b0_3), 12720}, /* MOVE */ +{ CPUFUNC(op_31b8_3), 12728}, /* MOVE */ +{ CPUFUNC(op_31b9_3), 12729}, /* MOVE */ +{ CPUFUNC(op_31ba_3), 12730}, /* MOVE */ +{ CPUFUNC(op_31bb_3), 12731}, /* MOVE */ +{ CPUFUNC(op_31bc_3), 12732}, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736}, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744}, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752}, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760}, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768}, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776}, /* MOVE */ +{ CPUFUNC(op_31f0_3), 12784}, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792}, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793}, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794}, /* MOVE */ +{ CPUFUNC(op_31fb_3), 12795}, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796}, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248}, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256}, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264}, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272}, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280}, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288}, /* MOVE */ +{ CPUFUNC(op_33f0_3), 13296}, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304}, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305}, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306}, /* MOVE */ +{ CPUFUNC(op_33fb_3), 13307}, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308}, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384}, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400}, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408}, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416}, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424}, /* NEGX */ +{ CPUFUNC(op_4030_3), 16432}, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440}, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441}, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448}, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464}, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472}, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480}, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488}, /* NEGX */ +{ CPUFUNC(op_4070_3), 16496}, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504}, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505}, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512}, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528}, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536}, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544}, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552}, /* NEGX */ +{ CPUFUNC(op_40b0_3), 16560}, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568}, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569}, /* NEGX */ +{ CPUFUNC(op_40c0_4), 16576 }, /* MVSR2 */ +{ CPUFUNC(op_40d0_4), 16592 }, /* MVSR2 */ +{ CPUFUNC(op_40d8_4), 16600 }, /* MVSR2 */ +{ CPUFUNC(op_40e0_4), 16608 }, /* MVSR2 */ +{ CPUFUNC(op_40e8_4), 16616 }, /* MVSR2 */ +{ CPUFUNC(op_40f0_4), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_4), 16632 }, /* MVSR2 */ +{ CPUFUNC(op_40f9_4), 16633 }, /* MVSR2 */ +{ CPUFUNC(op_4100_0), 16640}, /* CHK */ +{ CPUFUNC(op_4110_0), 16656}, /* CHK */ +{ CPUFUNC(op_4118_0), 16664}, /* CHK */ +{ CPUFUNC(op_4120_0), 16672}, /* CHK */ +{ CPUFUNC(op_4128_0), 16680}, /* CHK */ +{ CPUFUNC(op_4130_3), 16688}, /* CHK */ +{ CPUFUNC(op_4138_0), 16696}, /* CHK */ +{ CPUFUNC(op_4139_0), 16697}, /* CHK */ +{ CPUFUNC(op_413a_0), 16698}, /* CHK */ +{ CPUFUNC(op_413b_3), 16699}, /* CHK */ +{ CPUFUNC(op_413c_0), 16700}, /* CHK */ +{ CPUFUNC(op_4180_0), 16768}, /* CHK */ +{ CPUFUNC(op_4190_0), 16784}, /* CHK */ +{ CPUFUNC(op_4198_0), 16792}, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800}, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808}, /* CHK */ +{ CPUFUNC(op_41b0_3), 16816}, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824}, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825}, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826}, /* CHK */ +{ CPUFUNC(op_41bb_3), 16827}, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828}, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848}, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872}, /* LEA */ +{ CPUFUNC(op_41f0_3), 16880}, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888}, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889}, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890}, /* LEA */ +{ CPUFUNC(op_41fb_3), 16891}, /* LEA */ +{ CPUFUNC(op_4200_0), 16896}, /* CLR */ +{ CPUFUNC(op_4210_0), 16912}, /* CLR */ +{ CPUFUNC(op_4218_0), 16920}, /* CLR */ +{ CPUFUNC(op_4220_0), 16928}, /* CLR */ +{ CPUFUNC(op_4228_0), 16936}, /* CLR */ +{ CPUFUNC(op_4230_3), 16944}, /* CLR */ +{ CPUFUNC(op_4238_0), 16952}, /* CLR */ +{ CPUFUNC(op_4239_0), 16953}, /* CLR */ +{ CPUFUNC(op_4240_0), 16960}, /* CLR */ +{ CPUFUNC(op_4250_0), 16976}, /* CLR */ +{ CPUFUNC(op_4258_0), 16984}, /* CLR */ +{ CPUFUNC(op_4260_0), 16992}, /* CLR */ +{ CPUFUNC(op_4268_0), 17000}, /* CLR */ +{ CPUFUNC(op_4270_3), 17008}, /* CLR */ +{ CPUFUNC(op_4278_0), 17016}, /* CLR */ +{ CPUFUNC(op_4279_0), 17017}, /* CLR */ +{ CPUFUNC(op_4280_0), 17024}, /* CLR */ +{ CPUFUNC(op_4290_0), 17040}, /* CLR */ +{ CPUFUNC(op_4298_0), 17048}, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056}, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064}, /* CLR */ +{ CPUFUNC(op_42b0_3), 17072}, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080}, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081}, /* CLR */ +{ CPUFUNC(op_4400_0), 17408}, /* NEG */ +{ CPUFUNC(op_4410_0), 17424}, /* NEG */ +{ CPUFUNC(op_4418_0), 17432}, /* NEG */ +{ CPUFUNC(op_4420_0), 17440}, /* NEG */ +{ CPUFUNC(op_4428_0), 17448}, /* NEG */ +{ CPUFUNC(op_4430_3), 17456}, /* NEG */ +{ CPUFUNC(op_4438_0), 17464}, /* NEG */ +{ CPUFUNC(op_4439_0), 17465}, /* NEG */ +{ CPUFUNC(op_4440_0), 17472}, /* NEG */ +{ CPUFUNC(op_4450_0), 17488}, /* NEG */ +{ CPUFUNC(op_4458_0), 17496}, /* NEG */ +{ CPUFUNC(op_4460_0), 17504}, /* NEG */ +{ CPUFUNC(op_4468_0), 17512}, /* NEG */ +{ CPUFUNC(op_4470_3), 17520}, /* NEG */ +{ CPUFUNC(op_4478_0), 17528}, /* NEG */ +{ CPUFUNC(op_4479_0), 17529}, /* NEG */ +{ CPUFUNC(op_4480_0), 17536}, /* NEG */ +{ CPUFUNC(op_4490_0), 17552}, /* NEG */ +{ CPUFUNC(op_4498_0), 17560}, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568}, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576}, /* NEG */ +{ CPUFUNC(op_44b0_3), 17584}, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592}, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593}, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600}, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616}, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624}, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632}, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640}, /* MV2SR */ +{ CPUFUNC(op_44f0_3), 17648}, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656}, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657}, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658}, /* MV2SR */ +{ CPUFUNC(op_44fb_3), 17659}, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660}, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920}, /* NOT */ +{ CPUFUNC(op_4610_0), 17936}, /* NOT */ +{ CPUFUNC(op_4618_0), 17944}, /* NOT */ +{ CPUFUNC(op_4620_0), 17952}, /* NOT */ +{ CPUFUNC(op_4628_0), 17960}, /* NOT */ +{ CPUFUNC(op_4630_3), 17968}, /* NOT */ +{ CPUFUNC(op_4638_0), 17976}, /* NOT */ +{ CPUFUNC(op_4639_0), 17977}, /* NOT */ +{ CPUFUNC(op_4640_0), 17984}, /* NOT */ +{ CPUFUNC(op_4650_0), 18000}, /* NOT */ +{ CPUFUNC(op_4658_0), 18008}, /* NOT */ +{ CPUFUNC(op_4660_0), 18016}, /* NOT */ +{ CPUFUNC(op_4668_0), 18024}, /* NOT */ +{ CPUFUNC(op_4670_3), 18032}, /* NOT */ +{ CPUFUNC(op_4678_0), 18040}, /* NOT */ +{ CPUFUNC(op_4679_0), 18041}, /* NOT */ +{ CPUFUNC(op_4680_0), 18048}, /* NOT */ +{ CPUFUNC(op_4690_0), 18064}, /* NOT */ +{ CPUFUNC(op_4698_0), 18072}, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080}, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088}, /* NOT */ +{ CPUFUNC(op_46b0_3), 18096}, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104}, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105}, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112}, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128}, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136}, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144}, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152}, /* MV2SR */ +{ CPUFUNC(op_46f0_3), 18160}, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168}, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169}, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170}, /* MV2SR */ +{ CPUFUNC(op_46fb_3), 18171}, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172}, /* MV2SR */ +{ CPUFUNC(op_4800_0), 18432}, /* NBCD */ +{ CPUFUNC(op_4810_0), 18448}, /* NBCD */ +{ CPUFUNC(op_4818_0), 18456}, /* NBCD */ +{ CPUFUNC(op_4820_0), 18464}, /* NBCD */ +{ CPUFUNC(op_4828_0), 18472}, /* NBCD */ +{ CPUFUNC(op_4830_3), 18480}, /* NBCD */ +{ CPUFUNC(op_4838_0), 18488}, /* NBCD */ +{ CPUFUNC(op_4839_0), 18489}, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496}, /* SWAP */ +{ CPUFUNC(op_4850_0), 18512}, /* PEA */ +{ CPUFUNC(op_4868_0), 18536}, /* PEA */ +{ CPUFUNC(op_4870_3), 18544}, /* PEA */ +{ CPUFUNC(op_4878_0), 18552}, /* PEA */ +{ CPUFUNC(op_4879_0), 18553}, /* PEA */ +{ CPUFUNC(op_487a_0), 18554}, /* PEA */ +{ CPUFUNC(op_487b_3), 18555}, /* PEA */ +{ CPUFUNC(op_4880_0), 18560}, /* EXT */ +{ CPUFUNC(op_4890_0), 18576}, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592}, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600}, /* MVMLE */ +{ CPUFUNC(op_48b0_3), 18608}, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616}, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617}, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624}, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640}, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656}, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664}, /* MVMLE */ +{ CPUFUNC(op_48f0_3), 18672}, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680}, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681}, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880}, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944}, /* TST */ +{ CPUFUNC(op_4a10_0), 18960}, /* TST */ +{ CPUFUNC(op_4a18_0), 18968}, /* TST */ +{ CPUFUNC(op_4a20_0), 18976}, /* TST */ +{ CPUFUNC(op_4a28_0), 18984}, /* TST */ +{ CPUFUNC(op_4a30_3), 18992}, /* TST */ +{ CPUFUNC(op_4a38_0), 19000}, /* TST */ +{ CPUFUNC(op_4a39_0), 19001}, /* TST */ +{ CPUFUNC(op_4a40_0), 19008}, /* TST */ +{ CPUFUNC(op_4a50_0), 19024}, /* TST */ +{ CPUFUNC(op_4a58_0), 19032}, /* TST */ +{ CPUFUNC(op_4a60_0), 19040}, /* TST */ +{ CPUFUNC(op_4a68_0), 19048}, /* TST */ +{ CPUFUNC(op_4a70_3), 19056}, /* TST */ +{ CPUFUNC(op_4a78_0), 19064}, /* TST */ +{ CPUFUNC(op_4a79_0), 19065}, /* TST */ +{ CPUFUNC(op_4a80_0), 19072}, /* TST */ +{ CPUFUNC(op_4a90_0), 19088}, /* TST */ +{ CPUFUNC(op_4a98_0), 19096}, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104}, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112}, /* TST */ +{ CPUFUNC(op_4ab0_3), 19120}, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128}, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129}, /* TST */ +{ CPUFUNC(op_4ac0_0), 19136}, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152}, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160}, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168}, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176}, /* TAS */ +{ CPUFUNC(op_4af0_3), 19184}, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192}, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193}, /* TAS */ +{ CPUFUNC(op_4c90_0), 19600}, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608}, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624}, /* MVMEL */ +{ CPUFUNC(op_4cb0_3), 19632}, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640}, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641}, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642}, /* MVMEL */ +{ CPUFUNC(op_4cbb_3), 19643}, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664}, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672}, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688}, /* MVMEL */ +{ CPUFUNC(op_4cf0_3), 19696}, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704}, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705}, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706}, /* MVMEL */ +{ CPUFUNC(op_4cfb_3), 19707}, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032}, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048}, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056}, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064}, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072}, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080}, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081}, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082}, /* STOP */ +{ CPUFUNC(op_4e73_4), 20083 }, /* RTE */ +{ CPUFUNC(op_4e74_0), 20084}, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085}, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086}, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087}, /* RTR */ +{ CPUFUNC(op_4e90_0), 20112}, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136}, /* JSR */ +{ CPUFUNC(op_4eb0_3), 20144}, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152}, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153}, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154}, /* JSR */ +{ CPUFUNC(op_4ebb_3), 20155}, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176}, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200}, /* JMP */ +{ CPUFUNC(op_4ef0_3), 20208}, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216}, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217}, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218}, /* JMP */ +{ CPUFUNC(op_4efb_3), 20219}, /* JMP */ +{ CPUFUNC(op_5000_0), 20480}, /* ADD */ +{ CPUFUNC(op_5010_0), 20496}, /* ADD */ +{ CPUFUNC(op_5018_0), 20504}, /* ADD */ +{ CPUFUNC(op_5020_0), 20512}, /* ADD */ +{ CPUFUNC(op_5028_0), 20520}, /* ADD */ +{ CPUFUNC(op_5030_3), 20528}, /* ADD */ +{ CPUFUNC(op_5038_0), 20536}, /* ADD */ +{ CPUFUNC(op_5039_0), 20537}, /* ADD */ +{ CPUFUNC(op_5040_0), 20544}, /* ADD */ +{ CPUFUNC(op_5048_0), 20552}, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560}, /* ADD */ +{ CPUFUNC(op_5058_0), 20568}, /* ADD */ +{ CPUFUNC(op_5060_0), 20576}, /* ADD */ +{ CPUFUNC(op_5068_0), 20584}, /* ADD */ +{ CPUFUNC(op_5070_3), 20592}, /* ADD */ +{ CPUFUNC(op_5078_0), 20600}, /* ADD */ +{ CPUFUNC(op_5079_0), 20601}, /* ADD */ +{ CPUFUNC(op_5080_0), 20608}, /* ADD */ +{ CPUFUNC(op_5088_0), 20616}, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624}, /* ADD */ +{ CPUFUNC(op_5098_0), 20632}, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640}, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648}, /* ADD */ +{ CPUFUNC(op_50b0_3), 20656}, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664}, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665}, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672}, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680}, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688}, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696}, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704}, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712}, /* Scc */ +{ CPUFUNC(op_50f0_3), 20720}, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728}, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729}, /* Scc */ +{ CPUFUNC(op_5100_0), 20736}, /* SUB */ +{ CPUFUNC(op_5110_0), 20752}, /* SUB */ +{ CPUFUNC(op_5118_0), 20760}, /* SUB */ +{ CPUFUNC(op_5120_0), 20768}, /* SUB */ +{ CPUFUNC(op_5128_0), 20776}, /* SUB */ +{ CPUFUNC(op_5130_3), 20784}, /* SUB */ +{ CPUFUNC(op_5138_0), 20792}, /* SUB */ +{ CPUFUNC(op_5139_0), 20793}, /* SUB */ +{ CPUFUNC(op_5140_0), 20800}, /* SUB */ +{ CPUFUNC(op_5148_0), 20808}, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816}, /* SUB */ +{ CPUFUNC(op_5158_0), 20824}, /* SUB */ +{ CPUFUNC(op_5160_0), 20832}, /* SUB */ +{ CPUFUNC(op_5168_0), 20840}, /* SUB */ +{ CPUFUNC(op_5170_3), 20848}, /* SUB */ +{ CPUFUNC(op_5178_0), 20856}, /* SUB */ +{ CPUFUNC(op_5179_0), 20857}, /* SUB */ +{ CPUFUNC(op_5180_0), 20864}, /* SUB */ +{ CPUFUNC(op_5188_0), 20872}, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880}, /* SUB */ +{ CPUFUNC(op_5198_0), 20888}, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896}, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904}, /* SUB */ +{ CPUFUNC(op_51b0_3), 20912}, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920}, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921}, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928}, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936}, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944}, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952}, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960}, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968}, /* Scc */ +{ CPUFUNC(op_51f0_3), 20976}, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984}, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985}, /* Scc */ +{ CPUFUNC(op_52c0_0), 21184}, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192}, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200}, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208}, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216}, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224}, /* Scc */ +{ CPUFUNC(op_52f0_3), 21232}, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240}, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241}, /* Scc */ +{ CPUFUNC(op_53c0_0), 21440}, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448}, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456}, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464}, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472}, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480}, /* Scc */ +{ CPUFUNC(op_53f0_3), 21488}, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496}, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497}, /* Scc */ +{ CPUFUNC(op_54c0_0), 21696}, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704}, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712}, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720}, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728}, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736}, /* Scc */ +{ CPUFUNC(op_54f0_3), 21744}, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752}, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753}, /* Scc */ +{ CPUFUNC(op_55c0_0), 21952}, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960}, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968}, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976}, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984}, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992}, /* Scc */ +{ CPUFUNC(op_55f0_3), 22000}, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008}, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009}, /* Scc */ +{ CPUFUNC(op_56c0_0), 22208}, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216}, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224}, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232}, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240}, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248}, /* Scc */ +{ CPUFUNC(op_56f0_3), 22256}, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264}, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265}, /* Scc */ +{ CPUFUNC(op_57c0_0), 22464}, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472}, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480}, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488}, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496}, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504}, /* Scc */ +{ CPUFUNC(op_57f0_3), 22512}, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520}, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521}, /* Scc */ +{ CPUFUNC(op_58c0_0), 22720}, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728}, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736}, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744}, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752}, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760}, /* Scc */ +{ CPUFUNC(op_58f0_3), 22768}, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776}, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777}, /* Scc */ +{ CPUFUNC(op_59c0_0), 22976}, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984}, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992}, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000}, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008}, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016}, /* Scc */ +{ CPUFUNC(op_59f0_3), 23024}, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032}, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033}, /* Scc */ +{ CPUFUNC(op_5ac0_0), 23232}, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240}, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248}, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256}, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264}, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272}, /* Scc */ +{ CPUFUNC(op_5af0_3), 23280}, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288}, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289}, /* Scc */ +{ CPUFUNC(op_5bc0_0), 23488}, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496}, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504}, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512}, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520}, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528}, /* Scc */ +{ CPUFUNC(op_5bf0_3), 23536}, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544}, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545}, /* Scc */ +{ CPUFUNC(op_5cc0_0), 23744}, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752}, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760}, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768}, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776}, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784}, /* Scc */ +{ CPUFUNC(op_5cf0_3), 23792}, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800}, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801}, /* Scc */ +{ CPUFUNC(op_5dc0_0), 24000}, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008}, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016}, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024}, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032}, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040}, /* Scc */ +{ CPUFUNC(op_5df0_3), 24048}, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056}, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057}, /* Scc */ +{ CPUFUNC(op_5ec0_0), 24256}, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264}, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272}, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280}, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288}, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296}, /* Scc */ +{ CPUFUNC(op_5ef0_3), 24304}, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312}, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313}, /* Scc */ +{ CPUFUNC(op_5fc0_0), 24512}, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520}, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528}, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536}, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544}, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552}, /* Scc */ +{ CPUFUNC(op_5ff0_3), 24560}, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568}, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569}, /* Scc */ +{ CPUFUNC(op_6000_0), 24576}, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577}, /* Bcc */ +{ CPUFUNC(op_60ff_3), 24831}, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832}, /* BSR */ +{ CPUFUNC(op_6101_0), 24833}, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087}, /* BSR */ +{ CPUFUNC(op_6200_0), 25088}, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089}, /* Bcc */ +{ CPUFUNC(op_62ff_3), 25343}, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344}, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345}, /* Bcc */ +{ CPUFUNC(op_63ff_3), 25599}, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600}, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601}, /* Bcc */ +{ CPUFUNC(op_64ff_3), 25855}, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856}, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857}, /* Bcc */ +{ CPUFUNC(op_65ff_3), 26111}, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112}, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113}, /* Bcc */ +{ CPUFUNC(op_66ff_3), 26367}, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368}, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369}, /* Bcc */ +{ CPUFUNC(op_67ff_3), 26623}, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624}, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625}, /* Bcc */ +{ CPUFUNC(op_68ff_3), 26879}, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880}, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881}, /* Bcc */ +{ CPUFUNC(op_69ff_3), 27135}, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136}, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137}, /* Bcc */ +{ CPUFUNC(op_6aff_3), 27391}, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392}, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393}, /* Bcc */ +{ CPUFUNC(op_6bff_3), 27647}, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648}, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649}, /* Bcc */ +{ CPUFUNC(op_6cff_3), 27903}, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904}, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905}, /* Bcc */ +{ CPUFUNC(op_6dff_3), 28159}, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160}, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161}, /* Bcc */ +{ CPUFUNC(op_6eff_3), 28415}, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416}, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417}, /* Bcc */ +{ CPUFUNC(op_6fff_3), 28671}, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672}, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768}, /* OR */ +{ CPUFUNC(op_8010_0), 32784}, /* OR */ +{ CPUFUNC(op_8018_0), 32792}, /* OR */ +{ CPUFUNC(op_8020_0), 32800}, /* OR */ +{ CPUFUNC(op_8028_0), 32808}, /* OR */ +{ CPUFUNC(op_8030_3), 32816}, /* OR */ +{ CPUFUNC(op_8038_0), 32824}, /* OR */ +{ CPUFUNC(op_8039_0), 32825}, /* OR */ +{ CPUFUNC(op_803a_0), 32826}, /* OR */ +{ CPUFUNC(op_803b_3), 32827}, /* OR */ +{ CPUFUNC(op_803c_0), 32828}, /* OR */ +{ CPUFUNC(op_8040_0), 32832}, /* OR */ +{ CPUFUNC(op_8050_0), 32848}, /* OR */ +{ CPUFUNC(op_8058_0), 32856}, /* OR */ +{ CPUFUNC(op_8060_0), 32864}, /* OR */ +{ CPUFUNC(op_8068_0), 32872}, /* OR */ +{ CPUFUNC(op_8070_3), 32880}, /* OR */ +{ CPUFUNC(op_8078_0), 32888}, /* OR */ +{ CPUFUNC(op_8079_0), 32889}, /* OR */ +{ CPUFUNC(op_807a_0), 32890}, /* OR */ +{ CPUFUNC(op_807b_3), 32891}, /* OR */ +{ CPUFUNC(op_807c_0), 32892}, /* OR */ +{ CPUFUNC(op_8080_0), 32896}, /* OR */ +{ CPUFUNC(op_8090_0), 32912}, /* OR */ +{ CPUFUNC(op_8098_0), 32920}, /* OR */ +{ CPUFUNC(op_80a0_0), 32928}, /* OR */ +{ CPUFUNC(op_80a8_0), 32936}, /* OR */ +{ CPUFUNC(op_80b0_3), 32944}, /* OR */ +{ CPUFUNC(op_80b8_0), 32952}, /* OR */ +{ CPUFUNC(op_80b9_0), 32953}, /* OR */ +{ CPUFUNC(op_80ba_0), 32954}, /* OR */ +{ CPUFUNC(op_80bb_3), 32955}, /* OR */ +{ CPUFUNC(op_80bc_0), 32956}, /* OR */ +{ CPUFUNC(op_80c0_0), 32960}, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976}, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984}, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992}, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000}, /* DIVU */ +{ CPUFUNC(op_80f0_3), 33008}, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016}, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017}, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018}, /* DIVU */ +{ CPUFUNC(op_80fb_3), 33019}, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020}, /* DIVU */ +{ CPUFUNC(op_8100_0), 33024}, /* SBCD */ +{ CPUFUNC(op_8108_0), 33032}, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040}, /* OR */ +{ CPUFUNC(op_8118_0), 33048}, /* OR */ +{ CPUFUNC(op_8120_0), 33056}, /* OR */ +{ CPUFUNC(op_8128_0), 33064}, /* OR */ +{ CPUFUNC(op_8130_3), 33072}, /* OR */ +{ CPUFUNC(op_8138_0), 33080}, /* OR */ +{ CPUFUNC(op_8139_0), 33081}, /* OR */ +{ CPUFUNC(op_8150_0), 33104}, /* OR */ +{ CPUFUNC(op_8158_0), 33112}, /* OR */ +{ CPUFUNC(op_8160_0), 33120}, /* OR */ +{ CPUFUNC(op_8168_0), 33128}, /* OR */ +{ CPUFUNC(op_8170_3), 33136}, /* OR */ +{ CPUFUNC(op_8178_0), 33144}, /* OR */ +{ CPUFUNC(op_8179_0), 33145}, /* OR */ +{ CPUFUNC(op_8190_0), 33168}, /* OR */ +{ CPUFUNC(op_8198_0), 33176}, /* OR */ +{ CPUFUNC(op_81a0_0), 33184}, /* OR */ +{ CPUFUNC(op_81a8_0), 33192}, /* OR */ +{ CPUFUNC(op_81b0_3), 33200}, /* OR */ +{ CPUFUNC(op_81b8_0), 33208}, /* OR */ +{ CPUFUNC(op_81b9_0), 33209}, /* OR */ +{ CPUFUNC(op_81c0_0), 33216}, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232}, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240}, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248}, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256}, /* DIVS */ +{ CPUFUNC(op_81f0_3), 33264}, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272}, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273}, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274}, /* DIVS */ +{ CPUFUNC(op_81fb_3), 33275}, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276}, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864}, /* SUB */ +{ CPUFUNC(op_9010_0), 36880}, /* SUB */ +{ CPUFUNC(op_9018_0), 36888}, /* SUB */ +{ CPUFUNC(op_9020_0), 36896}, /* SUB */ +{ CPUFUNC(op_9028_0), 36904}, /* SUB */ +{ CPUFUNC(op_9030_3), 36912}, /* SUB */ +{ CPUFUNC(op_9038_0), 36920}, /* SUB */ +{ CPUFUNC(op_9039_0), 36921}, /* SUB */ +{ CPUFUNC(op_903a_0), 36922}, /* SUB */ +{ CPUFUNC(op_903b_3), 36923}, /* SUB */ +{ CPUFUNC(op_903c_0), 36924}, /* SUB */ +{ CPUFUNC(op_9040_0), 36928}, /* SUB */ +{ CPUFUNC(op_9048_0), 36936}, /* SUB */ +{ CPUFUNC(op_9050_0), 36944}, /* SUB */ +{ CPUFUNC(op_9058_0), 36952}, /* SUB */ +{ CPUFUNC(op_9060_0), 36960}, /* SUB */ +{ CPUFUNC(op_9068_0), 36968}, /* SUB */ +{ CPUFUNC(op_9070_3), 36976}, /* SUB */ +{ CPUFUNC(op_9078_0), 36984}, /* SUB */ +{ CPUFUNC(op_9079_0), 36985}, /* SUB */ +{ CPUFUNC(op_907a_0), 36986}, /* SUB */ +{ CPUFUNC(op_907b_3), 36987}, /* SUB */ +{ CPUFUNC(op_907c_0), 36988}, /* SUB */ +{ CPUFUNC(op_9080_0), 36992}, /* SUB */ +{ CPUFUNC(op_9088_0), 37000}, /* SUB */ +{ CPUFUNC(op_9090_0), 37008}, /* SUB */ +{ CPUFUNC(op_9098_0), 37016}, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024}, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032}, /* SUB */ +{ CPUFUNC(op_90b0_3), 37040}, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048}, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049}, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050}, /* SUB */ +{ CPUFUNC(op_90bb_3), 37051}, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052}, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056}, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064}, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072}, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080}, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088}, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096}, /* SUBA */ +{ CPUFUNC(op_90f0_3), 37104}, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112}, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113}, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114}, /* SUBA */ +{ CPUFUNC(op_90fb_3), 37115}, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116}, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120}, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128}, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136}, /* SUB */ +{ CPUFUNC(op_9118_0), 37144}, /* SUB */ +{ CPUFUNC(op_9120_0), 37152}, /* SUB */ +{ CPUFUNC(op_9128_0), 37160}, /* SUB */ +{ CPUFUNC(op_9130_3), 37168}, /* SUB */ +{ CPUFUNC(op_9138_0), 37176}, /* SUB */ +{ CPUFUNC(op_9139_0), 37177}, /* SUB */ +{ CPUFUNC(op_9140_0), 37184}, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192}, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200}, /* SUB */ +{ CPUFUNC(op_9158_0), 37208}, /* SUB */ +{ CPUFUNC(op_9160_0), 37216}, /* SUB */ +{ CPUFUNC(op_9168_0), 37224}, /* SUB */ +{ CPUFUNC(op_9170_3), 37232}, /* SUB */ +{ CPUFUNC(op_9178_0), 37240}, /* SUB */ +{ CPUFUNC(op_9179_0), 37241}, /* SUB */ +{ CPUFUNC(op_9180_0), 37248}, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256}, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264}, /* SUB */ +{ CPUFUNC(op_9198_0), 37272}, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280}, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288}, /* SUB */ +{ CPUFUNC(op_91b0_3), 37296}, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304}, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305}, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312}, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320}, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328}, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336}, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344}, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352}, /* SUBA */ +{ CPUFUNC(op_91f0_3), 37360}, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368}, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369}, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370}, /* SUBA */ +{ CPUFUNC(op_91fb_3), 37371}, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372}, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056}, /* CMP */ +{ CPUFUNC(op_b010_0), 45072}, /* CMP */ +{ CPUFUNC(op_b018_0), 45080}, /* CMP */ +{ CPUFUNC(op_b020_0), 45088}, /* CMP */ +{ CPUFUNC(op_b028_0), 45096}, /* CMP */ +{ CPUFUNC(op_b030_3), 45104}, /* CMP */ +{ CPUFUNC(op_b038_0), 45112}, /* CMP */ +{ CPUFUNC(op_b039_0), 45113}, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114}, /* CMP */ +{ CPUFUNC(op_b03b_3), 45115}, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116}, /* CMP */ +{ CPUFUNC(op_b040_0), 45120}, /* CMP */ +{ CPUFUNC(op_b048_0), 45128}, /* CMP */ +{ CPUFUNC(op_b050_0), 45136}, /* CMP */ +{ CPUFUNC(op_b058_0), 45144}, /* CMP */ +{ CPUFUNC(op_b060_0), 45152}, /* CMP */ +{ CPUFUNC(op_b068_0), 45160}, /* CMP */ +{ CPUFUNC(op_b070_3), 45168}, /* CMP */ +{ CPUFUNC(op_b078_0), 45176}, /* CMP */ +{ CPUFUNC(op_b079_0), 45177}, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178}, /* CMP */ +{ CPUFUNC(op_b07b_3), 45179}, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180}, /* CMP */ +{ CPUFUNC(op_b080_0), 45184}, /* CMP */ +{ CPUFUNC(op_b088_0), 45192}, /* CMP */ +{ CPUFUNC(op_b090_0), 45200}, /* CMP */ +{ CPUFUNC(op_b098_0), 45208}, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216}, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224}, /* CMP */ +{ CPUFUNC(op_b0b0_3), 45232}, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240}, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241}, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242}, /* CMP */ +{ CPUFUNC(op_b0bb_3), 45243}, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244}, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248}, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256}, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264}, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272}, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280}, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288}, /* CMPA */ +{ CPUFUNC(op_b0f0_3), 45296}, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304}, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305}, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306}, /* CMPA */ +{ CPUFUNC(op_b0fb_3), 45307}, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308}, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312}, /* EOR */ +{ CPUFUNC(op_b108_0), 45320}, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328}, /* EOR */ +{ CPUFUNC(op_b118_0), 45336}, /* EOR */ +{ CPUFUNC(op_b120_0), 45344}, /* EOR */ +{ CPUFUNC(op_b128_0), 45352}, /* EOR */ +{ CPUFUNC(op_b130_3), 45360}, /* EOR */ +{ CPUFUNC(op_b138_0), 45368}, /* EOR */ +{ CPUFUNC(op_b139_0), 45369}, /* EOR */ +{ CPUFUNC(op_b140_0), 45376}, /* EOR */ +{ CPUFUNC(op_b148_0), 45384}, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392}, /* EOR */ +{ CPUFUNC(op_b158_0), 45400}, /* EOR */ +{ CPUFUNC(op_b160_0), 45408}, /* EOR */ +{ CPUFUNC(op_b168_0), 45416}, /* EOR */ +{ CPUFUNC(op_b170_3), 45424}, /* EOR */ +{ CPUFUNC(op_b178_0), 45432}, /* EOR */ +{ CPUFUNC(op_b179_0), 45433}, /* EOR */ +{ CPUFUNC(op_b180_0), 45440}, /* EOR */ +{ CPUFUNC(op_b188_0), 45448}, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456}, /* EOR */ +{ CPUFUNC(op_b198_0), 45464}, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472}, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480}, /* EOR */ +{ CPUFUNC(op_b1b0_3), 45488}, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496}, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497}, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504}, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512}, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520}, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528}, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536}, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544}, /* CMPA */ +{ CPUFUNC(op_b1f0_3), 45552}, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560}, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561}, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562}, /* CMPA */ +{ CPUFUNC(op_b1fb_3), 45563}, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564}, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152}, /* AND */ +{ CPUFUNC(op_c010_0), 49168}, /* AND */ +{ CPUFUNC(op_c018_0), 49176}, /* AND */ +{ CPUFUNC(op_c020_0), 49184}, /* AND */ +{ CPUFUNC(op_c028_0), 49192}, /* AND */ +{ CPUFUNC(op_c030_3), 49200}, /* AND */ +{ CPUFUNC(op_c038_0), 49208}, /* AND */ +{ CPUFUNC(op_c039_0), 49209}, /* AND */ +{ CPUFUNC(op_c03a_0), 49210}, /* AND */ +{ CPUFUNC(op_c03b_3), 49211}, /* AND */ +{ CPUFUNC(op_c03c_0), 49212}, /* AND */ +{ CPUFUNC(op_c040_0), 49216}, /* AND */ +{ CPUFUNC(op_c050_0), 49232}, /* AND */ +{ CPUFUNC(op_c058_0), 49240}, /* AND */ +{ CPUFUNC(op_c060_0), 49248}, /* AND */ +{ CPUFUNC(op_c068_0), 49256}, /* AND */ +{ CPUFUNC(op_c070_3), 49264}, /* AND */ +{ CPUFUNC(op_c078_0), 49272}, /* AND */ +{ CPUFUNC(op_c079_0), 49273}, /* AND */ +{ CPUFUNC(op_c07a_0), 49274}, /* AND */ +{ CPUFUNC(op_c07b_3), 49275}, /* AND */ +{ CPUFUNC(op_c07c_0), 49276}, /* AND */ +{ CPUFUNC(op_c080_0), 49280}, /* AND */ +{ CPUFUNC(op_c090_0), 49296}, /* AND */ +{ CPUFUNC(op_c098_0), 49304}, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312}, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320}, /* AND */ +{ CPUFUNC(op_c0b0_3), 49328}, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336}, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337}, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338}, /* AND */ +{ CPUFUNC(op_c0bb_3), 49339}, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340}, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344}, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360}, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368}, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376}, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384}, /* MULU */ +{ CPUFUNC(op_c0f0_3), 49392}, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400}, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401}, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402}, /* MULU */ +{ CPUFUNC(op_c0fb_3), 49403}, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404}, /* MULU */ +{ CPUFUNC(op_c100_0), 49408}, /* ABCD */ +{ CPUFUNC(op_c108_0), 49416}, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424}, /* AND */ +{ CPUFUNC(op_c118_0), 49432}, /* AND */ +{ CPUFUNC(op_c120_0), 49440}, /* AND */ +{ CPUFUNC(op_c128_0), 49448}, /* AND */ +{ CPUFUNC(op_c130_3), 49456}, /* AND */ +{ CPUFUNC(op_c138_0), 49464}, /* AND */ +{ CPUFUNC(op_c139_0), 49465}, /* AND */ +{ CPUFUNC(op_c140_0), 49472}, /* EXG */ +{ CPUFUNC(op_c148_0), 49480}, /* EXG */ +{ CPUFUNC(op_c150_0), 49488}, /* AND */ +{ CPUFUNC(op_c158_0), 49496}, /* AND */ +{ CPUFUNC(op_c160_0), 49504}, /* AND */ +{ CPUFUNC(op_c168_0), 49512}, /* AND */ +{ CPUFUNC(op_c170_3), 49520}, /* AND */ +{ CPUFUNC(op_c178_0), 49528}, /* AND */ +{ CPUFUNC(op_c179_0), 49529}, /* AND */ +{ CPUFUNC(op_c188_0), 49544}, /* EXG */ +{ CPUFUNC(op_c190_0), 49552}, /* AND */ +{ CPUFUNC(op_c198_0), 49560}, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568}, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576}, /* AND */ +{ CPUFUNC(op_c1b0_3), 49584}, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592}, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593}, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600}, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616}, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624}, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632}, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640}, /* MULS */ +{ CPUFUNC(op_c1f0_3), 49648}, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656}, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657}, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658}, /* MULS */ +{ CPUFUNC(op_c1fb_3), 49659}, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660}, /* MULS */ +{ CPUFUNC(op_d000_0), 53248}, /* ADD */ +{ CPUFUNC(op_d010_0), 53264}, /* ADD */ +{ CPUFUNC(op_d018_0), 53272}, /* ADD */ +{ CPUFUNC(op_d020_0), 53280}, /* ADD */ +{ CPUFUNC(op_d028_0), 53288}, /* ADD */ +{ CPUFUNC(op_d030_3), 53296}, /* ADD */ +{ CPUFUNC(op_d038_0), 53304}, /* ADD */ +{ CPUFUNC(op_d039_0), 53305}, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306}, /* ADD */ +{ CPUFUNC(op_d03b_3), 53307}, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308}, /* ADD */ +{ CPUFUNC(op_d040_0), 53312}, /* ADD */ +{ CPUFUNC(op_d048_0), 53320}, /* ADD */ +{ CPUFUNC(op_d050_0), 53328}, /* ADD */ +{ CPUFUNC(op_d058_0), 53336}, /* ADD */ +{ CPUFUNC(op_d060_0), 53344}, /* ADD */ +{ CPUFUNC(op_d068_0), 53352}, /* ADD */ +{ CPUFUNC(op_d070_3), 53360}, /* ADD */ +{ CPUFUNC(op_d078_0), 53368}, /* ADD */ +{ CPUFUNC(op_d079_0), 53369}, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370}, /* ADD */ +{ CPUFUNC(op_d07b_3), 53371}, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372}, /* ADD */ +{ CPUFUNC(op_d080_0), 53376}, /* ADD */ +{ CPUFUNC(op_d088_0), 53384}, /* ADD */ +{ CPUFUNC(op_d090_0), 53392}, /* ADD */ +{ CPUFUNC(op_d098_0), 53400}, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408}, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416}, /* ADD */ +{ CPUFUNC(op_d0b0_3), 53424}, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432}, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433}, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434}, /* ADD */ +{ CPUFUNC(op_d0bb_3), 53435}, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436}, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440}, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448}, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456}, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464}, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472}, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480}, /* ADDA */ +{ CPUFUNC(op_d0f0_3), 53488}, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496}, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497}, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498}, /* ADDA */ +{ CPUFUNC(op_d0fb_3), 53499}, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500}, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504}, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512}, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520}, /* ADD */ +{ CPUFUNC(op_d118_0), 53528}, /* ADD */ +{ CPUFUNC(op_d120_0), 53536}, /* ADD */ +{ CPUFUNC(op_d128_0), 53544}, /* ADD */ +{ CPUFUNC(op_d130_3), 53552}, /* ADD */ +{ CPUFUNC(op_d138_0), 53560}, /* ADD */ +{ CPUFUNC(op_d139_0), 53561}, /* ADD */ +{ CPUFUNC(op_d140_0), 53568}, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576}, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584}, /* ADD */ +{ CPUFUNC(op_d158_0), 53592}, /* ADD */ +{ CPUFUNC(op_d160_0), 53600}, /* ADD */ +{ CPUFUNC(op_d168_0), 53608}, /* ADD */ +{ CPUFUNC(op_d170_3), 53616}, /* ADD */ +{ CPUFUNC(op_d178_0), 53624}, /* ADD */ +{ CPUFUNC(op_d179_0), 53625}, /* ADD */ +{ CPUFUNC(op_d180_0), 53632}, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640}, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648}, /* ADD */ +{ CPUFUNC(op_d198_0), 53656}, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664}, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672}, /* ADD */ +{ CPUFUNC(op_d1b0_3), 53680}, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688}, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689}, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696}, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704}, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712}, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720}, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728}, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736}, /* ADDA */ +{ CPUFUNC(op_d1f0_3), 53744}, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752}, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753}, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754}, /* ADDA */ +{ CPUFUNC(op_d1fb_3), 53755}, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756}, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344}, /* ASR */ +{ CPUFUNC(op_e008_0), 57352}, /* LSR */ +{ CPUFUNC(op_e010_0), 57360}, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368}, /* ROR */ +{ CPUFUNC(op_e020_0), 57376}, /* ASR */ +{ CPUFUNC(op_e028_0), 57384}, /* LSR */ +{ CPUFUNC(op_e030_0), 57392}, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400}, /* ROR */ +{ CPUFUNC(op_e040_0), 57408}, /* ASR */ +{ CPUFUNC(op_e048_0), 57416}, /* LSR */ +{ CPUFUNC(op_e050_0), 57424}, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432}, /* ROR */ +{ CPUFUNC(op_e060_0), 57440}, /* ASR */ +{ CPUFUNC(op_e068_0), 57448}, /* LSR */ +{ CPUFUNC(op_e070_0), 57456}, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464}, /* ROR */ +{ CPUFUNC(op_e080_0), 57472}, /* ASR */ +{ CPUFUNC(op_e088_0), 57480}, /* LSR */ +{ CPUFUNC(op_e090_0), 57488}, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496}, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504}, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512}, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520}, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528}, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552}, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560}, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568}, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576}, /* ASRW */ +{ CPUFUNC(op_e0f0_3), 57584}, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592}, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593}, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600}, /* ASL */ +{ CPUFUNC(op_e108_0), 57608}, /* LSL */ +{ CPUFUNC(op_e110_0), 57616}, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624}, /* ROL */ +{ CPUFUNC(op_e120_0), 57632}, /* ASL */ +{ CPUFUNC(op_e128_0), 57640}, /* LSL */ +{ CPUFUNC(op_e130_0), 57648}, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656}, /* ROL */ +{ CPUFUNC(op_e140_0), 57664}, /* ASL */ +{ CPUFUNC(op_e148_0), 57672}, /* LSL */ +{ CPUFUNC(op_e150_0), 57680}, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688}, /* ROL */ +{ CPUFUNC(op_e160_0), 57696}, /* ASL */ +{ CPUFUNC(op_e168_0), 57704}, /* LSL */ +{ CPUFUNC(op_e170_0), 57712}, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720}, /* ROL */ +{ CPUFUNC(op_e180_0), 57728}, /* ASL */ +{ CPUFUNC(op_e188_0), 57736}, /* LSL */ +{ CPUFUNC(op_e190_0), 57744}, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752}, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760}, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768}, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776}, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784}, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808}, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816}, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824}, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832}, /* ASLW */ +{ CPUFUNC(op_e1f0_3), 57840}, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848}, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849}, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064}, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072}, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080}, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088}, /* LSRW */ +{ CPUFUNC(op_e2f0_3), 58096}, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104}, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105}, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320}, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328}, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336}, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344}, /* LSLW */ +{ CPUFUNC(op_e3f0_3), 58352}, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360}, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361}, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576}, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584}, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592}, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600}, /* ROXRW */ +{ CPUFUNC(op_e4f0_3), 58608}, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616}, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617}, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832}, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840}, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848}, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856}, /* ROXLW */ +{ CPUFUNC(op_e5f0_3), 58864}, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872}, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873}, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088}, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096}, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104}, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112}, /* RORW */ +{ CPUFUNC(op_e6f0_3), 59120}, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128}, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129}, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344}, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352}, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360}, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368}, /* ROLW */ +{ CPUFUNC(op_e7f0_3), 59376}, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384}, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385}, /* ROLW */ +{ 0, 0 }}; +#ifdef CPUEMU_5 +const struct cputbl CPUFUNC(op_smalltbl_5)[] = { +{ CPUFUNC(op_0000_5), 0 }, /* OR */ +{ CPUFUNC(op_0010_5), 16 }, /* OR */ +{ CPUFUNC(op_0018_5), 24 }, /* OR */ +{ CPUFUNC(op_0020_5), 32 }, /* OR */ +{ CPUFUNC(op_0028_5), 40 }, /* OR */ +{ CPUFUNC(op_0030_5), 48 }, /* OR */ +{ CPUFUNC(op_0038_5), 56 }, /* OR */ +{ CPUFUNC(op_0039_5), 57 }, /* OR */ +{ CPUFUNC(op_003c_5), 60 }, /* ORSR */ +{ CPUFUNC(op_0040_5), 64 }, /* OR */ +{ CPUFUNC(op_0050_5), 80 }, /* OR */ +{ CPUFUNC(op_0058_5), 88 }, /* OR */ +{ CPUFUNC(op_0060_5), 96 }, /* OR */ +{ CPUFUNC(op_0068_5), 104 }, /* OR */ +{ CPUFUNC(op_0070_5), 112 }, /* OR */ +{ CPUFUNC(op_0078_5), 120 }, /* OR */ +{ CPUFUNC(op_0079_5), 121 }, /* OR */ +{ CPUFUNC(op_007c_5), 124 }, /* ORSR */ +{ CPUFUNC(op_0080_5), 128 }, /* OR */ +{ CPUFUNC(op_0090_5), 144 }, /* OR */ +{ CPUFUNC(op_0098_5), 152 }, /* OR */ +{ CPUFUNC(op_00a0_5), 160 }, /* OR */ +{ CPUFUNC(op_00a8_5), 168 }, /* OR */ +{ CPUFUNC(op_00b0_5), 176 }, /* OR */ +{ CPUFUNC(op_00b8_5), 184 }, /* OR */ +{ CPUFUNC(op_00b9_5), 185 }, /* OR */ +{ CPUFUNC(op_0100_5), 256 }, /* BTST */ +{ CPUFUNC(op_0108_5), 264 }, /* MVPMR */ +{ CPUFUNC(op_0110_5), 272 }, /* BTST */ +{ CPUFUNC(op_0118_5), 280 }, /* BTST */ +{ CPUFUNC(op_0120_5), 288 }, /* BTST */ +{ CPUFUNC(op_0128_5), 296 }, /* BTST */ +{ CPUFUNC(op_0130_5), 304 }, /* BTST */ +{ CPUFUNC(op_0138_5), 312 }, /* BTST */ +{ CPUFUNC(op_0139_5), 313 }, /* BTST */ +{ CPUFUNC(op_013a_5), 314 }, /* BTST */ +{ CPUFUNC(op_013b_5), 315 }, /* BTST */ +{ CPUFUNC(op_013c_5), 316 }, /* BTST */ +{ CPUFUNC(op_0140_5), 320 }, /* BCHG */ +{ CPUFUNC(op_0148_5), 328 }, /* MVPMR */ +{ CPUFUNC(op_0150_5), 336 }, /* BCHG */ +{ CPUFUNC(op_0158_5), 344 }, /* BCHG */ +{ CPUFUNC(op_0160_5), 352 }, /* BCHG */ +{ CPUFUNC(op_0168_5), 360 }, /* BCHG */ +{ CPUFUNC(op_0170_5), 368 }, /* BCHG */ +{ CPUFUNC(op_0178_5), 376 }, /* BCHG */ +{ CPUFUNC(op_0179_5), 377 }, /* BCHG */ +{ CPUFUNC(op_017a_5), 378 }, /* BCHG */ +{ CPUFUNC(op_017b_5), 379 }, /* BCHG */ +{ CPUFUNC(op_0180_5), 384 }, /* BCLR */ +{ CPUFUNC(op_0188_5), 392 }, /* MVPRM */ +{ CPUFUNC(op_0190_5), 400 }, /* BCLR */ +{ CPUFUNC(op_0198_5), 408 }, /* BCLR */ +{ CPUFUNC(op_01a0_5), 416 }, /* BCLR */ +{ CPUFUNC(op_01a8_5), 424 }, /* BCLR */ +{ CPUFUNC(op_01b0_5), 432 }, /* BCLR */ +{ CPUFUNC(op_01b8_5), 440 }, /* BCLR */ +{ CPUFUNC(op_01b9_5), 441 }, /* BCLR */ +{ CPUFUNC(op_01ba_5), 442 }, /* BCLR */ +{ CPUFUNC(op_01bb_5), 443 }, /* BCLR */ +{ CPUFUNC(op_01c0_5), 448 }, /* BSET */ +{ CPUFUNC(op_01c8_5), 456 }, /* MVPRM */ +{ CPUFUNC(op_01d0_5), 464 }, /* BSET */ +{ CPUFUNC(op_01d8_5), 472 }, /* BSET */ +{ CPUFUNC(op_01e0_5), 480 }, /* BSET */ +{ CPUFUNC(op_01e8_5), 488 }, /* BSET */ +{ CPUFUNC(op_01f0_5), 496 }, /* BSET */ +{ CPUFUNC(op_01f8_5), 504 }, /* BSET */ +{ CPUFUNC(op_01f9_5), 505 }, /* BSET */ +{ CPUFUNC(op_01fa_5), 506 }, /* BSET */ +{ CPUFUNC(op_01fb_5), 507 }, /* BSET */ +{ CPUFUNC(op_0200_5), 512 }, /* AND */ +{ CPUFUNC(op_0210_5), 528 }, /* AND */ +{ CPUFUNC(op_0218_5), 536 }, /* AND */ +{ CPUFUNC(op_0220_5), 544 }, /* AND */ +{ CPUFUNC(op_0228_5), 552 }, /* AND */ +{ CPUFUNC(op_0230_5), 560 }, /* AND */ +{ CPUFUNC(op_0238_5), 568 }, /* AND */ +{ CPUFUNC(op_0239_5), 569 }, /* AND */ +{ CPUFUNC(op_023c_5), 572 }, /* ANDSR */ +{ CPUFUNC(op_0240_5), 576 }, /* AND */ +{ CPUFUNC(op_0250_5), 592 }, /* AND */ +{ CPUFUNC(op_0258_5), 600 }, /* AND */ +{ CPUFUNC(op_0260_5), 608 }, /* AND */ +{ CPUFUNC(op_0268_5), 616 }, /* AND */ +{ CPUFUNC(op_0270_5), 624 }, /* AND */ +{ CPUFUNC(op_0278_5), 632 }, /* AND */ +{ CPUFUNC(op_0279_5), 633 }, /* AND */ +{ CPUFUNC(op_027c_5), 636 }, /* ANDSR */ +{ CPUFUNC(op_0280_5), 640 }, /* AND */ +{ CPUFUNC(op_0290_5), 656 }, /* AND */ +{ CPUFUNC(op_0298_5), 664 }, /* AND */ +{ CPUFUNC(op_02a0_5), 672 }, /* AND */ +{ CPUFUNC(op_02a8_5), 680 }, /* AND */ +{ CPUFUNC(op_02b0_5), 688 }, /* AND */ +{ CPUFUNC(op_02b8_5), 696 }, /* AND */ +{ CPUFUNC(op_02b9_5), 697 }, /* AND */ +{ CPUFUNC(op_0400_5), 1024 }, /* SUB */ +{ CPUFUNC(op_0410_5), 1040 }, /* SUB */ +{ CPUFUNC(op_0418_5), 1048 }, /* SUB */ +{ CPUFUNC(op_0420_5), 1056 }, /* SUB */ +{ CPUFUNC(op_0428_5), 1064 }, /* SUB */ +{ CPUFUNC(op_0430_5), 1072 }, /* SUB */ +{ CPUFUNC(op_0438_5), 1080 }, /* SUB */ +{ CPUFUNC(op_0439_5), 1081 }, /* SUB */ +{ CPUFUNC(op_0440_5), 1088 }, /* SUB */ +{ CPUFUNC(op_0450_5), 1104 }, /* SUB */ +{ CPUFUNC(op_0458_5), 1112 }, /* SUB */ +{ CPUFUNC(op_0460_5), 1120 }, /* SUB */ +{ CPUFUNC(op_0468_5), 1128 }, /* SUB */ +{ CPUFUNC(op_0470_5), 1136 }, /* SUB */ +{ CPUFUNC(op_0478_5), 1144 }, /* SUB */ +{ CPUFUNC(op_0479_5), 1145 }, /* SUB */ +{ CPUFUNC(op_0480_5), 1152 }, /* SUB */ +{ CPUFUNC(op_0490_5), 1168 }, /* SUB */ +{ CPUFUNC(op_0498_5), 1176 }, /* SUB */ +{ CPUFUNC(op_04a0_5), 1184 }, /* SUB */ +{ CPUFUNC(op_04a8_5), 1192 }, /* SUB */ +{ CPUFUNC(op_04b0_5), 1200 }, /* SUB */ +{ CPUFUNC(op_04b8_5), 1208 }, /* SUB */ +{ CPUFUNC(op_04b9_5), 1209 }, /* SUB */ +{ CPUFUNC(op_0600_5), 1536 }, /* ADD */ +{ CPUFUNC(op_0610_5), 1552 }, /* ADD */ +{ CPUFUNC(op_0618_5), 1560 }, /* ADD */ +{ CPUFUNC(op_0620_5), 1568 }, /* ADD */ +{ CPUFUNC(op_0628_5), 1576 }, /* ADD */ +{ CPUFUNC(op_0630_5), 1584 }, /* ADD */ +{ CPUFUNC(op_0638_5), 1592 }, /* ADD */ +{ CPUFUNC(op_0639_5), 1593 }, /* ADD */ +{ CPUFUNC(op_0640_5), 1600 }, /* ADD */ +{ CPUFUNC(op_0650_5), 1616 }, /* ADD */ +{ CPUFUNC(op_0658_5), 1624 }, /* ADD */ +{ CPUFUNC(op_0660_5), 1632 }, /* ADD */ +{ CPUFUNC(op_0668_5), 1640 }, /* ADD */ +{ CPUFUNC(op_0670_5), 1648 }, /* ADD */ +{ CPUFUNC(op_0678_5), 1656 }, /* ADD */ +{ CPUFUNC(op_0679_5), 1657 }, /* ADD */ +{ CPUFUNC(op_0680_5), 1664 }, /* ADD */ +{ CPUFUNC(op_0690_5), 1680 }, /* ADD */ +{ CPUFUNC(op_0698_5), 1688 }, /* ADD */ +{ CPUFUNC(op_06a0_5), 1696 }, /* ADD */ +{ CPUFUNC(op_06a8_5), 1704 }, /* ADD */ +{ CPUFUNC(op_06b0_5), 1712 }, /* ADD */ +{ CPUFUNC(op_06b8_5), 1720 }, /* ADD */ +{ CPUFUNC(op_06b9_5), 1721 }, /* ADD */ +{ CPUFUNC(op_0800_5), 2048 }, /* BTST */ +{ CPUFUNC(op_0810_5), 2064 }, /* BTST */ +{ CPUFUNC(op_0818_5), 2072 }, /* BTST */ +{ CPUFUNC(op_0820_5), 2080 }, /* BTST */ +{ CPUFUNC(op_0828_5), 2088 }, /* BTST */ +{ CPUFUNC(op_0830_5), 2096 }, /* BTST */ +{ CPUFUNC(op_0838_5), 2104 }, /* BTST */ +{ CPUFUNC(op_0839_5), 2105 }, /* BTST */ +{ CPUFUNC(op_083a_5), 2106 }, /* BTST */ +{ CPUFUNC(op_083b_5), 2107 }, /* BTST */ +{ CPUFUNC(op_083c_5), 2108 }, /* BTST */ +{ CPUFUNC(op_0840_5), 2112 }, /* BCHG */ +{ CPUFUNC(op_0850_5), 2128 }, /* BCHG */ +{ CPUFUNC(op_0858_5), 2136 }, /* BCHG */ +{ CPUFUNC(op_0860_5), 2144 }, /* BCHG */ +{ CPUFUNC(op_0868_5), 2152 }, /* BCHG */ +{ CPUFUNC(op_0870_5), 2160 }, /* BCHG */ +{ CPUFUNC(op_0878_5), 2168 }, /* BCHG */ +{ CPUFUNC(op_0879_5), 2169 }, /* BCHG */ +{ CPUFUNC(op_087a_5), 2170 }, /* BCHG */ +{ CPUFUNC(op_087b_5), 2171 }, /* BCHG */ +{ CPUFUNC(op_0880_5), 2176 }, /* BCLR */ +{ CPUFUNC(op_0890_5), 2192 }, /* BCLR */ +{ CPUFUNC(op_0898_5), 2200 }, /* BCLR */ +{ CPUFUNC(op_08a0_5), 2208 }, /* BCLR */ +{ CPUFUNC(op_08a8_5), 2216 }, /* BCLR */ +{ CPUFUNC(op_08b0_5), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b8_5), 2232 }, /* BCLR */ +{ CPUFUNC(op_08b9_5), 2233 }, /* BCLR */ +{ CPUFUNC(op_08ba_5), 2234 }, /* BCLR */ +{ CPUFUNC(op_08bb_5), 2235 }, /* BCLR */ +{ CPUFUNC(op_08c0_5), 2240 }, /* BSET */ +{ CPUFUNC(op_08d0_5), 2256 }, /* BSET */ +{ CPUFUNC(op_08d8_5), 2264 }, /* BSET */ +{ CPUFUNC(op_08e0_5), 2272 }, /* BSET */ +{ CPUFUNC(op_08e8_5), 2280 }, /* BSET */ +{ CPUFUNC(op_08f0_5), 2288 }, /* BSET */ +{ CPUFUNC(op_08f8_5), 2296 }, /* BSET */ +{ CPUFUNC(op_08f9_5), 2297 }, /* BSET */ +{ CPUFUNC(op_08fa_5), 2298 }, /* BSET */ +{ CPUFUNC(op_08fb_5), 2299 }, /* BSET */ +{ CPUFUNC(op_0a00_5), 2560 }, /* EOR */ +{ CPUFUNC(op_0a10_5), 2576 }, /* EOR */ +{ CPUFUNC(op_0a18_5), 2584 }, /* EOR */ +{ CPUFUNC(op_0a20_5), 2592 }, /* EOR */ +{ CPUFUNC(op_0a28_5), 2600 }, /* EOR */ +{ CPUFUNC(op_0a30_5), 2608 }, /* EOR */ +{ CPUFUNC(op_0a38_5), 2616 }, /* EOR */ +{ CPUFUNC(op_0a39_5), 2617 }, /* EOR */ +{ CPUFUNC(op_0a3c_5), 2620 }, /* EORSR */ +{ CPUFUNC(op_0a40_5), 2624 }, /* EOR */ +{ CPUFUNC(op_0a50_5), 2640 }, /* EOR */ +{ CPUFUNC(op_0a58_5), 2648 }, /* EOR */ +{ CPUFUNC(op_0a60_5), 2656 }, /* EOR */ +{ CPUFUNC(op_0a68_5), 2664 }, /* EOR */ +{ CPUFUNC(op_0a70_5), 2672 }, /* EOR */ +{ CPUFUNC(op_0a78_5), 2680 }, /* EOR */ +{ CPUFUNC(op_0a79_5), 2681 }, /* EOR */ +{ CPUFUNC(op_0a7c_5), 2684 }, /* EORSR */ +{ CPUFUNC(op_0a80_5), 2688 }, /* EOR */ +{ CPUFUNC(op_0a90_5), 2704 }, /* EOR */ +{ CPUFUNC(op_0a98_5), 2712 }, /* EOR */ +{ CPUFUNC(op_0aa0_5), 2720 }, /* EOR */ +{ CPUFUNC(op_0aa8_5), 2728 }, /* EOR */ +{ CPUFUNC(op_0ab0_5), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab8_5), 2744 }, /* EOR */ +{ CPUFUNC(op_0ab9_5), 2745 }, /* EOR */ +{ CPUFUNC(op_0c00_5), 3072 }, /* CMP */ +{ CPUFUNC(op_0c10_5), 3088 }, /* CMP */ +{ CPUFUNC(op_0c18_5), 3096 }, /* CMP */ +{ CPUFUNC(op_0c20_5), 3104 }, /* CMP */ +{ CPUFUNC(op_0c28_5), 3112 }, /* CMP */ +{ CPUFUNC(op_0c30_5), 3120 }, /* CMP */ +{ CPUFUNC(op_0c38_5), 3128 }, /* CMP */ +{ CPUFUNC(op_0c39_5), 3129 }, /* CMP */ +{ CPUFUNC(op_0c40_5), 3136 }, /* CMP */ +{ CPUFUNC(op_0c50_5), 3152 }, /* CMP */ +{ CPUFUNC(op_0c58_5), 3160 }, /* CMP */ +{ CPUFUNC(op_0c60_5), 3168 }, /* CMP */ +{ CPUFUNC(op_0c68_5), 3176 }, /* CMP */ +{ CPUFUNC(op_0c70_5), 3184 }, /* CMP */ +{ CPUFUNC(op_0c78_5), 3192 }, /* CMP */ +{ CPUFUNC(op_0c79_5), 3193 }, /* CMP */ +{ CPUFUNC(op_0c80_5), 3200 }, /* CMP */ +{ CPUFUNC(op_0c90_5), 3216 }, /* CMP */ +{ CPUFUNC(op_0c98_5), 3224 }, /* CMP */ +{ CPUFUNC(op_0ca0_5), 3232 }, /* CMP */ +{ CPUFUNC(op_0ca8_5), 3240 }, /* CMP */ +{ CPUFUNC(op_0cb0_5), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb8_5), 3256 }, /* CMP */ +{ CPUFUNC(op_0cb9_5), 3257 }, /* CMP */ +{ CPUFUNC(op_1000_5), 4096 }, /* MOVE */ +{ CPUFUNC(op_1010_5), 4112 }, /* MOVE */ +{ CPUFUNC(op_1018_5), 4120 }, /* MOVE */ +{ CPUFUNC(op_1020_5), 4128 }, /* MOVE */ +{ CPUFUNC(op_1028_5), 4136 }, /* MOVE */ +{ CPUFUNC(op_1030_5), 4144 }, /* MOVE */ +{ CPUFUNC(op_1038_5), 4152 }, /* MOVE */ +{ CPUFUNC(op_1039_5), 4153 }, /* MOVE */ +{ CPUFUNC(op_103a_5), 4154 }, /* MOVE */ +{ CPUFUNC(op_103b_5), 4155 }, /* MOVE */ +{ CPUFUNC(op_103c_5), 4156 }, /* MOVE */ +{ CPUFUNC(op_1080_5), 4224 }, /* MOVE */ +{ CPUFUNC(op_1090_5), 4240 }, /* MOVE */ +{ CPUFUNC(op_1098_5), 4248 }, /* MOVE */ +{ CPUFUNC(op_10a0_5), 4256 }, /* MOVE */ +{ CPUFUNC(op_10a8_5), 4264 }, /* MOVE */ +{ CPUFUNC(op_10b0_5), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b8_5), 4280 }, /* MOVE */ +{ CPUFUNC(op_10b9_5), 4281 }, /* MOVE */ +{ CPUFUNC(op_10ba_5), 4282 }, /* MOVE */ +{ CPUFUNC(op_10bb_5), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bc_5), 4284 }, /* MOVE */ +{ CPUFUNC(op_10c0_5), 4288 }, /* MOVE */ +{ CPUFUNC(op_10d0_5), 4304 }, /* MOVE */ +{ CPUFUNC(op_10d8_5), 4312 }, /* MOVE */ +{ CPUFUNC(op_10e0_5), 4320 }, /* MOVE */ +{ CPUFUNC(op_10e8_5), 4328 }, /* MOVE */ +{ CPUFUNC(op_10f0_5), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f8_5), 4344 }, /* MOVE */ +{ CPUFUNC(op_10f9_5), 4345 }, /* MOVE */ +{ CPUFUNC(op_10fa_5), 4346 }, /* MOVE */ +{ CPUFUNC(op_10fb_5), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fc_5), 4348 }, /* MOVE */ +{ CPUFUNC(op_1100_5), 4352 }, /* MOVE */ +{ CPUFUNC(op_1110_5), 4368 }, /* MOVE */ +{ CPUFUNC(op_1118_5), 4376 }, /* MOVE */ +{ CPUFUNC(op_1120_5), 4384 }, /* MOVE */ +{ CPUFUNC(op_1128_5), 4392 }, /* MOVE */ +{ CPUFUNC(op_1130_5), 4400 }, /* MOVE */ +{ CPUFUNC(op_1138_5), 4408 }, /* MOVE */ +{ CPUFUNC(op_1139_5), 4409 }, /* MOVE */ +{ CPUFUNC(op_113a_5), 4410 }, /* MOVE */ +{ CPUFUNC(op_113b_5), 4411 }, /* MOVE */ +{ CPUFUNC(op_113c_5), 4412 }, /* MOVE */ +{ CPUFUNC(op_1140_5), 4416 }, /* MOVE */ +{ CPUFUNC(op_1150_5), 4432 }, /* MOVE */ +{ CPUFUNC(op_1158_5), 4440 }, /* MOVE */ +{ CPUFUNC(op_1160_5), 4448 }, /* MOVE */ +{ CPUFUNC(op_1168_5), 4456 }, /* MOVE */ +{ CPUFUNC(op_1170_5), 4464 }, /* MOVE */ +{ CPUFUNC(op_1178_5), 4472 }, /* MOVE */ +{ CPUFUNC(op_1179_5), 4473 }, /* MOVE */ +{ CPUFUNC(op_117a_5), 4474 }, /* MOVE */ +{ CPUFUNC(op_117b_5), 4475 }, /* MOVE */ +{ CPUFUNC(op_117c_5), 4476 }, /* MOVE */ +{ CPUFUNC(op_1180_5), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_5), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_5), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_5), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_5), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_5), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_5), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_5), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_5), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_5), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_5), 4540 }, /* MOVE */ +{ CPUFUNC(op_11c0_5), 4544 }, /* MOVE */ +{ CPUFUNC(op_11d0_5), 4560 }, /* MOVE */ +{ CPUFUNC(op_11d8_5), 4568 }, /* MOVE */ +{ CPUFUNC(op_11e0_5), 4576 }, /* MOVE */ +{ CPUFUNC(op_11e8_5), 4584 }, /* MOVE */ +{ CPUFUNC(op_11f0_5), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f8_5), 4600 }, /* MOVE */ +{ CPUFUNC(op_11f9_5), 4601 }, /* MOVE */ +{ CPUFUNC(op_11fa_5), 4602 }, /* MOVE */ +{ CPUFUNC(op_11fb_5), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fc_5), 4604 }, /* MOVE */ +{ CPUFUNC(op_13c0_5), 5056 }, /* MOVE */ +{ CPUFUNC(op_13d0_5), 5072 }, /* MOVE */ +{ CPUFUNC(op_13d8_5), 5080 }, /* MOVE */ +{ CPUFUNC(op_13e0_5), 5088 }, /* MOVE */ +{ CPUFUNC(op_13e8_5), 5096 }, /* MOVE */ +{ CPUFUNC(op_13f0_5), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f8_5), 5112 }, /* MOVE */ +{ CPUFUNC(op_13f9_5), 5113 }, /* MOVE */ +{ CPUFUNC(op_13fa_5), 5114 }, /* MOVE */ +{ CPUFUNC(op_13fb_5), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fc_5), 5116 }, /* MOVE */ +{ CPUFUNC(op_2000_5), 8192 }, /* MOVE */ +{ CPUFUNC(op_2008_5), 8200 }, /* MOVE */ +{ CPUFUNC(op_2010_5), 8208 }, /* MOVE */ +{ CPUFUNC(op_2018_5), 8216 }, /* MOVE */ +{ CPUFUNC(op_2020_5), 8224 }, /* MOVE */ +{ CPUFUNC(op_2028_5), 8232 }, /* MOVE */ +{ CPUFUNC(op_2030_5), 8240 }, /* MOVE */ +{ CPUFUNC(op_2038_5), 8248 }, /* MOVE */ +{ CPUFUNC(op_2039_5), 8249 }, /* MOVE */ +{ CPUFUNC(op_203a_5), 8250 }, /* MOVE */ +{ CPUFUNC(op_203b_5), 8251 }, /* MOVE */ +{ CPUFUNC(op_203c_5), 8252 }, /* MOVE */ +{ CPUFUNC(op_2040_5), 8256 }, /* MOVEA */ +{ CPUFUNC(op_2048_5), 8264 }, /* MOVEA */ +{ CPUFUNC(op_2050_5), 8272 }, /* MOVEA */ +{ CPUFUNC(op_2058_5), 8280 }, /* MOVEA */ +{ CPUFUNC(op_2060_5), 8288 }, /* MOVEA */ +{ CPUFUNC(op_2068_5), 8296 }, /* MOVEA */ +{ CPUFUNC(op_2070_5), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2078_5), 8312 }, /* MOVEA */ +{ CPUFUNC(op_2079_5), 8313 }, /* MOVEA */ +{ CPUFUNC(op_207a_5), 8314 }, /* MOVEA */ +{ CPUFUNC(op_207b_5), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207c_5), 8316 }, /* MOVEA */ +{ CPUFUNC(op_2080_5), 8320 }, /* MOVE */ +{ CPUFUNC(op_2088_5), 8328 }, /* MOVE */ +{ CPUFUNC(op_2090_5), 8336 }, /* MOVE */ +{ CPUFUNC(op_2098_5), 8344 }, /* MOVE */ +{ CPUFUNC(op_20a0_5), 8352 }, /* MOVE */ +{ CPUFUNC(op_20a8_5), 8360 }, /* MOVE */ +{ CPUFUNC(op_20b0_5), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b8_5), 8376 }, /* MOVE */ +{ CPUFUNC(op_20b9_5), 8377 }, /* MOVE */ +{ CPUFUNC(op_20ba_5), 8378 }, /* MOVE */ +{ CPUFUNC(op_20bb_5), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bc_5), 8380 }, /* MOVE */ +{ CPUFUNC(op_20c0_5), 8384 }, /* MOVE */ +{ CPUFUNC(op_20c8_5), 8392 }, /* MOVE */ +{ CPUFUNC(op_20d0_5), 8400 }, /* MOVE */ +{ CPUFUNC(op_20d8_5), 8408 }, /* MOVE */ +{ CPUFUNC(op_20e0_5), 8416 }, /* MOVE */ +{ CPUFUNC(op_20e8_5), 8424 }, /* MOVE */ +{ CPUFUNC(op_20f0_5), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f8_5), 8440 }, /* MOVE */ +{ CPUFUNC(op_20f9_5), 8441 }, /* MOVE */ +{ CPUFUNC(op_20fa_5), 8442 }, /* MOVE */ +{ CPUFUNC(op_20fb_5), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fc_5), 8444 }, /* MOVE */ +{ CPUFUNC(op_2100_5), 8448 }, /* MOVE */ +{ CPUFUNC(op_2108_5), 8456 }, /* MOVE */ +{ CPUFUNC(op_2110_5), 8464 }, /* MOVE */ +{ CPUFUNC(op_2118_5), 8472 }, /* MOVE */ +{ CPUFUNC(op_2120_5), 8480 }, /* MOVE */ +{ CPUFUNC(op_2128_5), 8488 }, /* MOVE */ +{ CPUFUNC(op_2130_5), 8496 }, /* MOVE */ +{ CPUFUNC(op_2138_5), 8504 }, /* MOVE */ +{ CPUFUNC(op_2139_5), 8505 }, /* MOVE */ +{ CPUFUNC(op_213a_5), 8506 }, /* MOVE */ +{ CPUFUNC(op_213b_5), 8507 }, /* MOVE */ +{ CPUFUNC(op_213c_5), 8508 }, /* MOVE */ +{ CPUFUNC(op_2140_5), 8512 }, /* MOVE */ +{ CPUFUNC(op_2148_5), 8520 }, /* MOVE */ +{ CPUFUNC(op_2150_5), 8528 }, /* MOVE */ +{ CPUFUNC(op_2158_5), 8536 }, /* MOVE */ +{ CPUFUNC(op_2160_5), 8544 }, /* MOVE */ +{ CPUFUNC(op_2168_5), 8552 }, /* MOVE */ +{ CPUFUNC(op_2170_5), 8560 }, /* MOVE */ +{ CPUFUNC(op_2178_5), 8568 }, /* MOVE */ +{ CPUFUNC(op_2179_5), 8569 }, /* MOVE */ +{ CPUFUNC(op_217a_5), 8570 }, /* MOVE */ +{ CPUFUNC(op_217b_5), 8571 }, /* MOVE */ +{ CPUFUNC(op_217c_5), 8572 }, /* MOVE */ +{ CPUFUNC(op_2180_5), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_5), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_5), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_5), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_5), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_5), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_5), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_5), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_5), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_5), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_5), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_5), 8636 }, /* MOVE */ +{ CPUFUNC(op_21c0_5), 8640 }, /* MOVE */ +{ CPUFUNC(op_21c8_5), 8648 }, /* MOVE */ +{ CPUFUNC(op_21d0_5), 8656 }, /* MOVE */ +{ CPUFUNC(op_21d8_5), 8664 }, /* MOVE */ +{ CPUFUNC(op_21e0_5), 8672 }, /* MOVE */ +{ CPUFUNC(op_21e8_5), 8680 }, /* MOVE */ +{ CPUFUNC(op_21f0_5), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f8_5), 8696 }, /* MOVE */ +{ CPUFUNC(op_21f9_5), 8697 }, /* MOVE */ +{ CPUFUNC(op_21fa_5), 8698 }, /* MOVE */ +{ CPUFUNC(op_21fb_5), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fc_5), 8700 }, /* MOVE */ +{ CPUFUNC(op_23c0_5), 9152 }, /* MOVE */ +{ CPUFUNC(op_23c8_5), 9160 }, /* MOVE */ +{ CPUFUNC(op_23d0_5), 9168 }, /* MOVE */ +{ CPUFUNC(op_23d8_5), 9176 }, /* MOVE */ +{ CPUFUNC(op_23e0_5), 9184 }, /* MOVE */ +{ CPUFUNC(op_23e8_5), 9192 }, /* MOVE */ +{ CPUFUNC(op_23f0_5), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f8_5), 9208 }, /* MOVE */ +{ CPUFUNC(op_23f9_5), 9209 }, /* MOVE */ +{ CPUFUNC(op_23fa_5), 9210 }, /* MOVE */ +{ CPUFUNC(op_23fb_5), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fc_5), 9212 }, /* MOVE */ +{ CPUFUNC(op_3000_5), 12288 }, /* MOVE */ +{ CPUFUNC(op_3008_5), 12296 }, /* MOVE */ +{ CPUFUNC(op_3010_5), 12304 }, /* MOVE */ +{ CPUFUNC(op_3018_5), 12312 }, /* MOVE */ +{ CPUFUNC(op_3020_5), 12320 }, /* MOVE */ +{ CPUFUNC(op_3028_5), 12328 }, /* MOVE */ +{ CPUFUNC(op_3030_5), 12336 }, /* MOVE */ +{ CPUFUNC(op_3038_5), 12344 }, /* MOVE */ +{ CPUFUNC(op_3039_5), 12345 }, /* MOVE */ +{ CPUFUNC(op_303a_5), 12346 }, /* MOVE */ +{ CPUFUNC(op_303b_5), 12347 }, /* MOVE */ +{ CPUFUNC(op_303c_5), 12348 }, /* MOVE */ +{ CPUFUNC(op_3040_5), 12352 }, /* MOVEA */ +{ CPUFUNC(op_3048_5), 12360 }, /* MOVEA */ +{ CPUFUNC(op_3050_5), 12368 }, /* MOVEA */ +{ CPUFUNC(op_3058_5), 12376 }, /* MOVEA */ +{ CPUFUNC(op_3060_5), 12384 }, /* MOVEA */ +{ CPUFUNC(op_3068_5), 12392 }, /* MOVEA */ +{ CPUFUNC(op_3070_5), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3078_5), 12408 }, /* MOVEA */ +{ CPUFUNC(op_3079_5), 12409 }, /* MOVEA */ +{ CPUFUNC(op_307a_5), 12410 }, /* MOVEA */ +{ CPUFUNC(op_307b_5), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307c_5), 12412 }, /* MOVEA */ +{ CPUFUNC(op_3080_5), 12416 }, /* MOVE */ +{ CPUFUNC(op_3088_5), 12424 }, /* MOVE */ +{ CPUFUNC(op_3090_5), 12432 }, /* MOVE */ +{ CPUFUNC(op_3098_5), 12440 }, /* MOVE */ +{ CPUFUNC(op_30a0_5), 12448 }, /* MOVE */ +{ CPUFUNC(op_30a8_5), 12456 }, /* MOVE */ +{ CPUFUNC(op_30b0_5), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b8_5), 12472 }, /* MOVE */ +{ CPUFUNC(op_30b9_5), 12473 }, /* MOVE */ +{ CPUFUNC(op_30ba_5), 12474 }, /* MOVE */ +{ CPUFUNC(op_30bb_5), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bc_5), 12476 }, /* MOVE */ +{ CPUFUNC(op_30c0_5), 12480 }, /* MOVE */ +{ CPUFUNC(op_30c8_5), 12488 }, /* MOVE */ +{ CPUFUNC(op_30d0_5), 12496 }, /* MOVE */ +{ CPUFUNC(op_30d8_5), 12504 }, /* MOVE */ +{ CPUFUNC(op_30e0_5), 12512 }, /* MOVE */ +{ CPUFUNC(op_30e8_5), 12520 }, /* MOVE */ +{ CPUFUNC(op_30f0_5), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f8_5), 12536 }, /* MOVE */ +{ CPUFUNC(op_30f9_5), 12537 }, /* MOVE */ +{ CPUFUNC(op_30fa_5), 12538 }, /* MOVE */ +{ CPUFUNC(op_30fb_5), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fc_5), 12540 }, /* MOVE */ +{ CPUFUNC(op_3100_5), 12544 }, /* MOVE */ +{ CPUFUNC(op_3108_5), 12552 }, /* MOVE */ +{ CPUFUNC(op_3110_5), 12560 }, /* MOVE */ +{ CPUFUNC(op_3118_5), 12568 }, /* MOVE */ +{ CPUFUNC(op_3120_5), 12576 }, /* MOVE */ +{ CPUFUNC(op_3128_5), 12584 }, /* MOVE */ +{ CPUFUNC(op_3130_5), 12592 }, /* MOVE */ +{ CPUFUNC(op_3138_5), 12600 }, /* MOVE */ +{ CPUFUNC(op_3139_5), 12601 }, /* MOVE */ +{ CPUFUNC(op_313a_5), 12602 }, /* MOVE */ +{ CPUFUNC(op_313b_5), 12603 }, /* MOVE */ +{ CPUFUNC(op_313c_5), 12604 }, /* MOVE */ +{ CPUFUNC(op_3140_5), 12608 }, /* MOVE */ +{ CPUFUNC(op_3148_5), 12616 }, /* MOVE */ +{ CPUFUNC(op_3150_5), 12624 }, /* MOVE */ +{ CPUFUNC(op_3158_5), 12632 }, /* MOVE */ +{ CPUFUNC(op_3160_5), 12640 }, /* MOVE */ +{ CPUFUNC(op_3168_5), 12648 }, /* MOVE */ +{ CPUFUNC(op_3170_5), 12656 }, /* MOVE */ +{ CPUFUNC(op_3178_5), 12664 }, /* MOVE */ +{ CPUFUNC(op_3179_5), 12665 }, /* MOVE */ +{ CPUFUNC(op_317a_5), 12666 }, /* MOVE */ +{ CPUFUNC(op_317b_5), 12667 }, /* MOVE */ +{ CPUFUNC(op_317c_5), 12668 }, /* MOVE */ +{ CPUFUNC(op_3180_5), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_5), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_5), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_5), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_5), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_5), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_5), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_5), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_5), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_5), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_5), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_5), 12732 }, /* MOVE */ +{ CPUFUNC(op_31c0_5), 12736 }, /* MOVE */ +{ CPUFUNC(op_31c8_5), 12744 }, /* MOVE */ +{ CPUFUNC(op_31d0_5), 12752 }, /* MOVE */ +{ CPUFUNC(op_31d8_5), 12760 }, /* MOVE */ +{ CPUFUNC(op_31e0_5), 12768 }, /* MOVE */ +{ CPUFUNC(op_31e8_5), 12776 }, /* MOVE */ +{ CPUFUNC(op_31f0_5), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f8_5), 12792 }, /* MOVE */ +{ CPUFUNC(op_31f9_5), 12793 }, /* MOVE */ +{ CPUFUNC(op_31fa_5), 12794 }, /* MOVE */ +{ CPUFUNC(op_31fb_5), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fc_5), 12796 }, /* MOVE */ +{ CPUFUNC(op_33c0_5), 13248 }, /* MOVE */ +{ CPUFUNC(op_33c8_5), 13256 }, /* MOVE */ +{ CPUFUNC(op_33d0_5), 13264 }, /* MOVE */ +{ CPUFUNC(op_33d8_5), 13272 }, /* MOVE */ +{ CPUFUNC(op_33e0_5), 13280 }, /* MOVE */ +{ CPUFUNC(op_33e8_5), 13288 }, /* MOVE */ +{ CPUFUNC(op_33f0_5), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f8_5), 13304 }, /* MOVE */ +{ CPUFUNC(op_33f9_5), 13305 }, /* MOVE */ +{ CPUFUNC(op_33fa_5), 13306 }, /* MOVE */ +{ CPUFUNC(op_33fb_5), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fc_5), 13308 }, /* MOVE */ +{ CPUFUNC(op_4000_5), 16384 }, /* NEGX */ +{ CPUFUNC(op_4010_5), 16400 }, /* NEGX */ +{ CPUFUNC(op_4018_5), 16408 }, /* NEGX */ +{ CPUFUNC(op_4020_5), 16416 }, /* NEGX */ +{ CPUFUNC(op_4028_5), 16424 }, /* NEGX */ +{ CPUFUNC(op_4030_5), 16432 }, /* NEGX */ +{ CPUFUNC(op_4038_5), 16440 }, /* NEGX */ +{ CPUFUNC(op_4039_5), 16441 }, /* NEGX */ +{ CPUFUNC(op_4040_5), 16448 }, /* NEGX */ +{ CPUFUNC(op_4050_5), 16464 }, /* NEGX */ +{ CPUFUNC(op_4058_5), 16472 }, /* NEGX */ +{ CPUFUNC(op_4060_5), 16480 }, /* NEGX */ +{ CPUFUNC(op_4068_5), 16488 }, /* NEGX */ +{ CPUFUNC(op_4070_5), 16496 }, /* NEGX */ +{ CPUFUNC(op_4078_5), 16504 }, /* NEGX */ +{ CPUFUNC(op_4079_5), 16505 }, /* NEGX */ +{ CPUFUNC(op_4080_5), 16512 }, /* NEGX */ +{ CPUFUNC(op_4090_5), 16528 }, /* NEGX */ +{ CPUFUNC(op_4098_5), 16536 }, /* NEGX */ +{ CPUFUNC(op_40a0_5), 16544 }, /* NEGX */ +{ CPUFUNC(op_40a8_5), 16552 }, /* NEGX */ +{ CPUFUNC(op_40b0_5), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b8_5), 16568 }, /* NEGX */ +{ CPUFUNC(op_40b9_5), 16569 }, /* NEGX */ +{ CPUFUNC(op_40c0_5), 16576 }, /* MVSR2 */ +{ CPUFUNC(op_40d0_5), 16592 }, /* MVSR2 */ +{ CPUFUNC(op_40d8_5), 16600 }, /* MVSR2 */ +{ CPUFUNC(op_40e0_5), 16608 }, /* MVSR2 */ +{ CPUFUNC(op_40e8_5), 16616 }, /* MVSR2 */ +{ CPUFUNC(op_40f0_5), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_5), 16632 }, /* MVSR2 */ +{ CPUFUNC(op_40f9_5), 16633 }, /* MVSR2 */ +{ CPUFUNC(op_4100_5), 16640 }, /* CHK */ +{ CPUFUNC(op_4110_5), 16656 }, /* CHK */ +{ CPUFUNC(op_4118_5), 16664 }, /* CHK */ +{ CPUFUNC(op_4120_5), 16672 }, /* CHK */ +{ CPUFUNC(op_4128_5), 16680 }, /* CHK */ +{ CPUFUNC(op_4130_5), 16688 }, /* CHK */ +{ CPUFUNC(op_4138_5), 16696 }, /* CHK */ +{ CPUFUNC(op_4139_5), 16697 }, /* CHK */ +{ CPUFUNC(op_413a_5), 16698 }, /* CHK */ +{ CPUFUNC(op_413b_5), 16699 }, /* CHK */ +{ CPUFUNC(op_413c_5), 16700 }, /* CHK */ +{ CPUFUNC(op_4180_5), 16768 }, /* CHK */ +{ CPUFUNC(op_4190_5), 16784 }, /* CHK */ +{ CPUFUNC(op_4198_5), 16792 }, /* CHK */ +{ CPUFUNC(op_41a0_5), 16800 }, /* CHK */ +{ CPUFUNC(op_41a8_5), 16808 }, /* CHK */ +{ CPUFUNC(op_41b0_5), 16816 }, /* CHK */ +{ CPUFUNC(op_41b8_5), 16824 }, /* CHK */ +{ CPUFUNC(op_41b9_5), 16825 }, /* CHK */ +{ CPUFUNC(op_41ba_5), 16826 }, /* CHK */ +{ CPUFUNC(op_41bb_5), 16827 }, /* CHK */ +{ CPUFUNC(op_41bc_5), 16828 }, /* CHK */ +{ CPUFUNC(op_41d0_5), 16848 }, /* LEA */ +{ CPUFUNC(op_41e8_5), 16872 }, /* LEA */ +{ CPUFUNC(op_41f0_5), 16880 }, /* LEA */ +{ CPUFUNC(op_41f8_5), 16888 }, /* LEA */ +{ CPUFUNC(op_41f9_5), 16889 }, /* LEA */ +{ CPUFUNC(op_41fa_5), 16890 }, /* LEA */ +{ CPUFUNC(op_41fb_5), 16891 }, /* LEA */ +{ CPUFUNC(op_4200_5), 16896 }, /* CLR */ +{ CPUFUNC(op_4210_5), 16912 }, /* CLR */ +{ CPUFUNC(op_4218_5), 16920 }, /* CLR */ +{ CPUFUNC(op_4220_5), 16928 }, /* CLR */ +{ CPUFUNC(op_4228_5), 16936 }, /* CLR */ +{ CPUFUNC(op_4230_5), 16944 }, /* CLR */ +{ CPUFUNC(op_4238_5), 16952 }, /* CLR */ +{ CPUFUNC(op_4239_5), 16953 }, /* CLR */ +{ CPUFUNC(op_4240_5), 16960 }, /* CLR */ +{ CPUFUNC(op_4250_5), 16976 }, /* CLR */ +{ CPUFUNC(op_4258_5), 16984 }, /* CLR */ +{ CPUFUNC(op_4260_5), 16992 }, /* CLR */ +{ CPUFUNC(op_4268_5), 17000 }, /* CLR */ +{ CPUFUNC(op_4270_5), 17008 }, /* CLR */ +{ CPUFUNC(op_4278_5), 17016 }, /* CLR */ +{ CPUFUNC(op_4279_5), 17017 }, /* CLR */ +{ CPUFUNC(op_4280_5), 17024 }, /* CLR */ +{ CPUFUNC(op_4290_5), 17040 }, /* CLR */ +{ CPUFUNC(op_4298_5), 17048 }, /* CLR */ +{ CPUFUNC(op_42a0_5), 17056 }, /* CLR */ +{ CPUFUNC(op_42a8_5), 17064 }, /* CLR */ +{ CPUFUNC(op_42b0_5), 17072 }, /* CLR */ +{ CPUFUNC(op_42b8_5), 17080 }, /* CLR */ +{ CPUFUNC(op_42b9_5), 17081 }, /* CLR */ +{ CPUFUNC(op_4400_5), 17408 }, /* NEG */ +{ CPUFUNC(op_4410_5), 17424 }, /* NEG */ +{ CPUFUNC(op_4418_5), 17432 }, /* NEG */ +{ CPUFUNC(op_4420_5), 17440 }, /* NEG */ +{ CPUFUNC(op_4428_5), 17448 }, /* NEG */ +{ CPUFUNC(op_4430_5), 17456 }, /* NEG */ +{ CPUFUNC(op_4438_5), 17464 }, /* NEG */ +{ CPUFUNC(op_4439_5), 17465 }, /* NEG */ +{ CPUFUNC(op_4440_5), 17472 }, /* NEG */ +{ CPUFUNC(op_4450_5), 17488 }, /* NEG */ +{ CPUFUNC(op_4458_5), 17496 }, /* NEG */ +{ CPUFUNC(op_4460_5), 17504 }, /* NEG */ +{ CPUFUNC(op_4468_5), 17512 }, /* NEG */ +{ CPUFUNC(op_4470_5), 17520 }, /* NEG */ +{ CPUFUNC(op_4478_5), 17528 }, /* NEG */ +{ CPUFUNC(op_4479_5), 17529 }, /* NEG */ +{ CPUFUNC(op_4480_5), 17536 }, /* NEG */ +{ CPUFUNC(op_4490_5), 17552 }, /* NEG */ +{ CPUFUNC(op_4498_5), 17560 }, /* NEG */ +{ CPUFUNC(op_44a0_5), 17568 }, /* NEG */ +{ CPUFUNC(op_44a8_5), 17576 }, /* NEG */ +{ CPUFUNC(op_44b0_5), 17584 }, /* NEG */ +{ CPUFUNC(op_44b8_5), 17592 }, /* NEG */ +{ CPUFUNC(op_44b9_5), 17593 }, /* NEG */ +{ CPUFUNC(op_44c0_5), 17600 }, /* MV2SR */ +{ CPUFUNC(op_44d0_5), 17616 }, /* MV2SR */ +{ CPUFUNC(op_44d8_5), 17624 }, /* MV2SR */ +{ CPUFUNC(op_44e0_5), 17632 }, /* MV2SR */ +{ CPUFUNC(op_44e8_5), 17640 }, /* MV2SR */ +{ CPUFUNC(op_44f0_5), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f8_5), 17656 }, /* MV2SR */ +{ CPUFUNC(op_44f9_5), 17657 }, /* MV2SR */ +{ CPUFUNC(op_44fa_5), 17658 }, /* MV2SR */ +{ CPUFUNC(op_44fb_5), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fc_5), 17660 }, /* MV2SR */ +{ CPUFUNC(op_4600_5), 17920 }, /* NOT */ +{ CPUFUNC(op_4610_5), 17936 }, /* NOT */ +{ CPUFUNC(op_4618_5), 17944 }, /* NOT */ +{ CPUFUNC(op_4620_5), 17952 }, /* NOT */ +{ CPUFUNC(op_4628_5), 17960 }, /* NOT */ +{ CPUFUNC(op_4630_5), 17968 }, /* NOT */ +{ CPUFUNC(op_4638_5), 17976 }, /* NOT */ +{ CPUFUNC(op_4639_5), 17977 }, /* NOT */ +{ CPUFUNC(op_4640_5), 17984 }, /* NOT */ +{ CPUFUNC(op_4650_5), 18000 }, /* NOT */ +{ CPUFUNC(op_4658_5), 18008 }, /* NOT */ +{ CPUFUNC(op_4660_5), 18016 }, /* NOT */ +{ CPUFUNC(op_4668_5), 18024 }, /* NOT */ +{ CPUFUNC(op_4670_5), 18032 }, /* NOT */ +{ CPUFUNC(op_4678_5), 18040 }, /* NOT */ +{ CPUFUNC(op_4679_5), 18041 }, /* NOT */ +{ CPUFUNC(op_4680_5), 18048 }, /* NOT */ +{ CPUFUNC(op_4690_5), 18064 }, /* NOT */ +{ CPUFUNC(op_4698_5), 18072 }, /* NOT */ +{ CPUFUNC(op_46a0_5), 18080 }, /* NOT */ +{ CPUFUNC(op_46a8_5), 18088 }, /* NOT */ +{ CPUFUNC(op_46b0_5), 18096 }, /* NOT */ +{ CPUFUNC(op_46b8_5), 18104 }, /* NOT */ +{ CPUFUNC(op_46b9_5), 18105 }, /* NOT */ +{ CPUFUNC(op_46c0_5), 18112 }, /* MV2SR */ +{ CPUFUNC(op_46d0_5), 18128 }, /* MV2SR */ +{ CPUFUNC(op_46d8_5), 18136 }, /* MV2SR */ +{ CPUFUNC(op_46e0_5), 18144 }, /* MV2SR */ +{ CPUFUNC(op_46e8_5), 18152 }, /* MV2SR */ +{ CPUFUNC(op_46f0_5), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f8_5), 18168 }, /* MV2SR */ +{ CPUFUNC(op_46f9_5), 18169 }, /* MV2SR */ +{ CPUFUNC(op_46fa_5), 18170 }, /* MV2SR */ +{ CPUFUNC(op_46fb_5), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fc_5), 18172 }, /* MV2SR */ +{ CPUFUNC(op_4800_5), 18432 }, /* NBCD */ +{ CPUFUNC(op_4810_5), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_5), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_5), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_5), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_5), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_5), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_5), 18489 }, /* NBCD */ +{ CPUFUNC(op_4840_5), 18496 }, /* SWAP */ +{ CPUFUNC(op_4850_5), 18512 }, /* PEA */ +{ CPUFUNC(op_4868_5), 18536 }, /* PEA */ +{ CPUFUNC(op_4870_5), 18544 }, /* PEA */ +{ CPUFUNC(op_4878_5), 18552 }, /* PEA */ +{ CPUFUNC(op_4879_5), 18553 }, /* PEA */ +{ CPUFUNC(op_487a_5), 18554 }, /* PEA */ +{ CPUFUNC(op_487b_5), 18555 }, /* PEA */ +{ CPUFUNC(op_4880_5), 18560 }, /* EXT */ +{ CPUFUNC(op_4890_5), 18576 }, /* MVMLE */ +{ CPUFUNC(op_48a0_5), 18592 }, /* MVMLE */ +{ CPUFUNC(op_48a8_5), 18600 }, /* MVMLE */ +{ CPUFUNC(op_48b0_5), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b8_5), 18616 }, /* MVMLE */ +{ CPUFUNC(op_48b9_5), 18617 }, /* MVMLE */ +{ CPUFUNC(op_48c0_5), 18624 }, /* EXT */ +{ CPUFUNC(op_48d0_5), 18640 }, /* MVMLE */ +{ CPUFUNC(op_48e0_5), 18656 }, /* MVMLE */ +{ CPUFUNC(op_48e8_5), 18664 }, /* MVMLE */ +{ CPUFUNC(op_48f0_5), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f8_5), 18680 }, /* MVMLE */ +{ CPUFUNC(op_48f9_5), 18681 }, /* MVMLE */ +{ CPUFUNC(op_49c0_5), 18880 }, /* EXT */ +{ CPUFUNC(op_4a00_5), 18944 }, /* TST */ +{ CPUFUNC(op_4a10_5), 18960 }, /* TST */ +{ CPUFUNC(op_4a18_5), 18968 }, /* TST */ +{ CPUFUNC(op_4a20_5), 18976 }, /* TST */ +{ CPUFUNC(op_4a28_5), 18984 }, /* TST */ +{ CPUFUNC(op_4a30_5), 18992 }, /* TST */ +{ CPUFUNC(op_4a38_5), 19000 }, /* TST */ +{ CPUFUNC(op_4a39_5), 19001 }, /* TST */ +{ CPUFUNC(op_4a40_5), 19008 }, /* TST */ +{ CPUFUNC(op_4a50_5), 19024 }, /* TST */ +{ CPUFUNC(op_4a58_5), 19032 }, /* TST */ +{ CPUFUNC(op_4a60_5), 19040 }, /* TST */ +{ CPUFUNC(op_4a68_5), 19048 }, /* TST */ +{ CPUFUNC(op_4a70_5), 19056 }, /* TST */ +{ CPUFUNC(op_4a78_5), 19064 }, /* TST */ +{ CPUFUNC(op_4a79_5), 19065 }, /* TST */ +{ CPUFUNC(op_4a80_5), 19072 }, /* TST */ +{ CPUFUNC(op_4a90_5), 19088 }, /* TST */ +{ CPUFUNC(op_4a98_5), 19096 }, /* TST */ +{ CPUFUNC(op_4aa0_5), 19104 }, /* TST */ +{ CPUFUNC(op_4aa8_5), 19112 }, /* TST */ +{ CPUFUNC(op_4ab0_5), 19120 }, /* TST */ +{ CPUFUNC(op_4ab8_5), 19128 }, /* TST */ +{ CPUFUNC(op_4ab9_5), 19129 }, /* TST */ +{ CPUFUNC(op_4ac0_5), 19136 }, /* TAS */ +{ CPUFUNC(op_4ad0_5), 19152 }, /* TAS */ +{ CPUFUNC(op_4ad8_5), 19160 }, /* TAS */ +{ CPUFUNC(op_4ae0_5), 19168 }, /* TAS */ +{ CPUFUNC(op_4ae8_5), 19176 }, /* TAS */ +{ CPUFUNC(op_4af0_5), 19184 }, /* TAS */ +{ CPUFUNC(op_4af8_5), 19192 }, /* TAS */ +{ CPUFUNC(op_4af9_5), 19193 }, /* TAS */ +{ CPUFUNC(op_4c90_5), 19600 }, /* MVMEL */ +{ CPUFUNC(op_4c98_5), 19608 }, /* MVMEL */ +{ CPUFUNC(op_4ca8_5), 19624 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_5), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb8_5), 19640 }, /* MVMEL */ +{ CPUFUNC(op_4cb9_5), 19641 }, /* MVMEL */ +{ CPUFUNC(op_4cba_5), 19642 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_5), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cd0_5), 19664 }, /* MVMEL */ +{ CPUFUNC(op_4cd8_5), 19672 }, /* MVMEL */ +{ CPUFUNC(op_4ce8_5), 19688 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_5), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf8_5), 19704 }, /* MVMEL */ +{ CPUFUNC(op_4cf9_5), 19705 }, /* MVMEL */ +{ CPUFUNC(op_4cfa_5), 19706 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_5), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4e40_5), 20032 }, /* TRAP */ +{ CPUFUNC(op_4e50_5), 20048 }, /* LINK */ +{ CPUFUNC(op_4e58_5), 20056 }, /* UNLK */ +{ CPUFUNC(op_4e60_5), 20064 }, /* MVR2USP */ +{ CPUFUNC(op_4e68_5), 20072 }, /* MVUSP2R */ +{ CPUFUNC(op_4e70_5), 20080 }, /* RESET */ +{ CPUFUNC(op_4e71_5), 20081 }, /* NOP */ +{ CPUFUNC(op_4e72_5), 20082 }, /* STOP */ +{ CPUFUNC(op_4e73_5), 20083 }, /* RTE */ +{ CPUFUNC(op_4e74_5), 20084 }, /* RTD */ +{ CPUFUNC(op_4e75_5), 20085 }, /* RTS */ +{ CPUFUNC(op_4e76_5), 20086 }, /* TRAPV */ +{ CPUFUNC(op_4e77_5), 20087 }, /* RTR */ +{ CPUFUNC(op_4e90_5), 20112 }, /* JSR */ +{ CPUFUNC(op_4ea8_5), 20136 }, /* JSR */ +{ CPUFUNC(op_4eb0_5), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb8_5), 20152 }, /* JSR */ +{ CPUFUNC(op_4eb9_5), 20153 }, /* JSR */ +{ CPUFUNC(op_4eba_5), 20154 }, /* JSR */ +{ CPUFUNC(op_4ebb_5), 20155 }, /* JSR */ +{ CPUFUNC(op_4ed0_5), 20176 }, /* JMP */ +{ CPUFUNC(op_4ee8_5), 20200 }, /* JMP */ +{ CPUFUNC(op_4ef0_5), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef8_5), 20216 }, /* JMP */ +{ CPUFUNC(op_4ef9_5), 20217 }, /* JMP */ +{ CPUFUNC(op_4efa_5), 20218 }, /* JMP */ +{ CPUFUNC(op_4efb_5), 20219 }, /* JMP */ +{ CPUFUNC(op_5000_5), 20480 }, /* ADD */ +{ CPUFUNC(op_5010_5), 20496 }, /* ADD */ +{ CPUFUNC(op_5018_5), 20504 }, /* ADD */ +{ CPUFUNC(op_5020_5), 20512 }, /* ADD */ +{ CPUFUNC(op_5028_5), 20520 }, /* ADD */ +{ CPUFUNC(op_5030_5), 20528 }, /* ADD */ +{ CPUFUNC(op_5038_5), 20536 }, /* ADD */ +{ CPUFUNC(op_5039_5), 20537 }, /* ADD */ +{ CPUFUNC(op_5040_5), 20544 }, /* ADD */ +{ CPUFUNC(op_5048_5), 20552 }, /* ADDA */ +{ CPUFUNC(op_5050_5), 20560 }, /* ADD */ +{ CPUFUNC(op_5058_5), 20568 }, /* ADD */ +{ CPUFUNC(op_5060_5), 20576 }, /* ADD */ +{ CPUFUNC(op_5068_5), 20584 }, /* ADD */ +{ CPUFUNC(op_5070_5), 20592 }, /* ADD */ +{ CPUFUNC(op_5078_5), 20600 }, /* ADD */ +{ CPUFUNC(op_5079_5), 20601 }, /* ADD */ +{ CPUFUNC(op_5080_5), 20608 }, /* ADD */ +{ CPUFUNC(op_5088_5), 20616 }, /* ADDA */ +{ CPUFUNC(op_5090_5), 20624 }, /* ADD */ +{ CPUFUNC(op_5098_5), 20632 }, /* ADD */ +{ CPUFUNC(op_50a0_5), 20640 }, /* ADD */ +{ CPUFUNC(op_50a8_5), 20648 }, /* ADD */ +{ CPUFUNC(op_50b0_5), 20656 }, /* ADD */ +{ CPUFUNC(op_50b8_5), 20664 }, /* ADD */ +{ CPUFUNC(op_50b9_5), 20665 }, /* ADD */ +{ CPUFUNC(op_50c0_5), 20672 }, /* Scc */ +{ CPUFUNC(op_50c8_5), 20680 }, /* DBcc */ +{ CPUFUNC(op_50d0_5), 20688 }, /* Scc */ +{ CPUFUNC(op_50d8_5), 20696 }, /* Scc */ +{ CPUFUNC(op_50e0_5), 20704 }, /* Scc */ +{ CPUFUNC(op_50e8_5), 20712 }, /* Scc */ +{ CPUFUNC(op_50f0_5), 20720 }, /* Scc */ +{ CPUFUNC(op_50f8_5), 20728 }, /* Scc */ +{ CPUFUNC(op_50f9_5), 20729 }, /* Scc */ +{ CPUFUNC(op_5100_5), 20736 }, /* SUB */ +{ CPUFUNC(op_5110_5), 20752 }, /* SUB */ +{ CPUFUNC(op_5118_5), 20760 }, /* SUB */ +{ CPUFUNC(op_5120_5), 20768 }, /* SUB */ +{ CPUFUNC(op_5128_5), 20776 }, /* SUB */ +{ CPUFUNC(op_5130_5), 20784 }, /* SUB */ +{ CPUFUNC(op_5138_5), 20792 }, /* SUB */ +{ CPUFUNC(op_5139_5), 20793 }, /* SUB */ +{ CPUFUNC(op_5140_5), 20800 }, /* SUB */ +{ CPUFUNC(op_5148_5), 20808 }, /* SUBA */ +{ CPUFUNC(op_5150_5), 20816 }, /* SUB */ +{ CPUFUNC(op_5158_5), 20824 }, /* SUB */ +{ CPUFUNC(op_5160_5), 20832 }, /* SUB */ +{ CPUFUNC(op_5168_5), 20840 }, /* SUB */ +{ CPUFUNC(op_5170_5), 20848 }, /* SUB */ +{ CPUFUNC(op_5178_5), 20856 }, /* SUB */ +{ CPUFUNC(op_5179_5), 20857 }, /* SUB */ +{ CPUFUNC(op_5180_5), 20864 }, /* SUB */ +{ CPUFUNC(op_5188_5), 20872 }, /* SUBA */ +{ CPUFUNC(op_5190_5), 20880 }, /* SUB */ +{ CPUFUNC(op_5198_5), 20888 }, /* SUB */ +{ CPUFUNC(op_51a0_5), 20896 }, /* SUB */ +{ CPUFUNC(op_51a8_5), 20904 }, /* SUB */ +{ CPUFUNC(op_51b0_5), 20912 }, /* SUB */ +{ CPUFUNC(op_51b8_5), 20920 }, /* SUB */ +{ CPUFUNC(op_51b9_5), 20921 }, /* SUB */ +{ CPUFUNC(op_51c0_5), 20928 }, /* Scc */ +{ CPUFUNC(op_51c8_5), 20936 }, /* DBcc */ +{ CPUFUNC(op_51d0_5), 20944 }, /* Scc */ +{ CPUFUNC(op_51d8_5), 20952 }, /* Scc */ +{ CPUFUNC(op_51e0_5), 20960 }, /* Scc */ +{ CPUFUNC(op_51e8_5), 20968 }, /* Scc */ +{ CPUFUNC(op_51f0_5), 20976 }, /* Scc */ +{ CPUFUNC(op_51f8_5), 20984 }, /* Scc */ +{ CPUFUNC(op_51f9_5), 20985 }, /* Scc */ +{ CPUFUNC(op_52c0_5), 21184 }, /* Scc */ +{ CPUFUNC(op_52c8_5), 21192 }, /* DBcc */ +{ CPUFUNC(op_52d0_5), 21200 }, /* Scc */ +{ CPUFUNC(op_52d8_5), 21208 }, /* Scc */ +{ CPUFUNC(op_52e0_5), 21216 }, /* Scc */ +{ CPUFUNC(op_52e8_5), 21224 }, /* Scc */ +{ CPUFUNC(op_52f0_5), 21232 }, /* Scc */ +{ CPUFUNC(op_52f8_5), 21240 }, /* Scc */ +{ CPUFUNC(op_52f9_5), 21241 }, /* Scc */ +{ CPUFUNC(op_53c0_5), 21440 }, /* Scc */ +{ CPUFUNC(op_53c8_5), 21448 }, /* DBcc */ +{ CPUFUNC(op_53d0_5), 21456 }, /* Scc */ +{ CPUFUNC(op_53d8_5), 21464 }, /* Scc */ +{ CPUFUNC(op_53e0_5), 21472 }, /* Scc */ +{ CPUFUNC(op_53e8_5), 21480 }, /* Scc */ +{ CPUFUNC(op_53f0_5), 21488 }, /* Scc */ +{ CPUFUNC(op_53f8_5), 21496 }, /* Scc */ +{ CPUFUNC(op_53f9_5), 21497 }, /* Scc */ +{ CPUFUNC(op_54c0_5), 21696 }, /* Scc */ +{ CPUFUNC(op_54c8_5), 21704 }, /* DBcc */ +{ CPUFUNC(op_54d0_5), 21712 }, /* Scc */ +{ CPUFUNC(op_54d8_5), 21720 }, /* Scc */ +{ CPUFUNC(op_54e0_5), 21728 }, /* Scc */ +{ CPUFUNC(op_54e8_5), 21736 }, /* Scc */ +{ CPUFUNC(op_54f0_5), 21744 }, /* Scc */ +{ CPUFUNC(op_54f8_5), 21752 }, /* Scc */ +{ CPUFUNC(op_54f9_5), 21753 }, /* Scc */ +{ CPUFUNC(op_55c0_5), 21952 }, /* Scc */ +{ CPUFUNC(op_55c8_5), 21960 }, /* DBcc */ +{ CPUFUNC(op_55d0_5), 21968 }, /* Scc */ +{ CPUFUNC(op_55d8_5), 21976 }, /* Scc */ +{ CPUFUNC(op_55e0_5), 21984 }, /* Scc */ +{ CPUFUNC(op_55e8_5), 21992 }, /* Scc */ +{ CPUFUNC(op_55f0_5), 22000 }, /* Scc */ +{ CPUFUNC(op_55f8_5), 22008 }, /* Scc */ +{ CPUFUNC(op_55f9_5), 22009 }, /* Scc */ +{ CPUFUNC(op_56c0_5), 22208 }, /* Scc */ +{ CPUFUNC(op_56c8_5), 22216 }, /* DBcc */ +{ CPUFUNC(op_56d0_5), 22224 }, /* Scc */ +{ CPUFUNC(op_56d8_5), 22232 }, /* Scc */ +{ CPUFUNC(op_56e0_5), 22240 }, /* Scc */ +{ CPUFUNC(op_56e8_5), 22248 }, /* Scc */ +{ CPUFUNC(op_56f0_5), 22256 }, /* Scc */ +{ CPUFUNC(op_56f8_5), 22264 }, /* Scc */ +{ CPUFUNC(op_56f9_5), 22265 }, /* Scc */ +{ CPUFUNC(op_57c0_5), 22464 }, /* Scc */ +{ CPUFUNC(op_57c8_5), 22472 }, /* DBcc */ +{ CPUFUNC(op_57d0_5), 22480 }, /* Scc */ +{ CPUFUNC(op_57d8_5), 22488 }, /* Scc */ +{ CPUFUNC(op_57e0_5), 22496 }, /* Scc */ +{ CPUFUNC(op_57e8_5), 22504 }, /* Scc */ +{ CPUFUNC(op_57f0_5), 22512 }, /* Scc */ +{ CPUFUNC(op_57f8_5), 22520 }, /* Scc */ +{ CPUFUNC(op_57f9_5), 22521 }, /* Scc */ +{ CPUFUNC(op_58c0_5), 22720 }, /* Scc */ +{ CPUFUNC(op_58c8_5), 22728 }, /* DBcc */ +{ CPUFUNC(op_58d0_5), 22736 }, /* Scc */ +{ CPUFUNC(op_58d8_5), 22744 }, /* Scc */ +{ CPUFUNC(op_58e0_5), 22752 }, /* Scc */ +{ CPUFUNC(op_58e8_5), 22760 }, /* Scc */ +{ CPUFUNC(op_58f0_5), 22768 }, /* Scc */ +{ CPUFUNC(op_58f8_5), 22776 }, /* Scc */ +{ CPUFUNC(op_58f9_5), 22777 }, /* Scc */ +{ CPUFUNC(op_59c0_5), 22976 }, /* Scc */ +{ CPUFUNC(op_59c8_5), 22984 }, /* DBcc */ +{ CPUFUNC(op_59d0_5), 22992 }, /* Scc */ +{ CPUFUNC(op_59d8_5), 23000 }, /* Scc */ +{ CPUFUNC(op_59e0_5), 23008 }, /* Scc */ +{ CPUFUNC(op_59e8_5), 23016 }, /* Scc */ +{ CPUFUNC(op_59f0_5), 23024 }, /* Scc */ +{ CPUFUNC(op_59f8_5), 23032 }, /* Scc */ +{ CPUFUNC(op_59f9_5), 23033 }, /* Scc */ +{ CPUFUNC(op_5ac0_5), 23232 }, /* Scc */ +{ CPUFUNC(op_5ac8_5), 23240 }, /* DBcc */ +{ CPUFUNC(op_5ad0_5), 23248 }, /* Scc */ +{ CPUFUNC(op_5ad8_5), 23256 }, /* Scc */ +{ CPUFUNC(op_5ae0_5), 23264 }, /* Scc */ +{ CPUFUNC(op_5ae8_5), 23272 }, /* Scc */ +{ CPUFUNC(op_5af0_5), 23280 }, /* Scc */ +{ CPUFUNC(op_5af8_5), 23288 }, /* Scc */ +{ CPUFUNC(op_5af9_5), 23289 }, /* Scc */ +{ CPUFUNC(op_5bc0_5), 23488 }, /* Scc */ +{ CPUFUNC(op_5bc8_5), 23496 }, /* DBcc */ +{ CPUFUNC(op_5bd0_5), 23504 }, /* Scc */ +{ CPUFUNC(op_5bd8_5), 23512 }, /* Scc */ +{ CPUFUNC(op_5be0_5), 23520 }, /* Scc */ +{ CPUFUNC(op_5be8_5), 23528 }, /* Scc */ +{ CPUFUNC(op_5bf0_5), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf8_5), 23544 }, /* Scc */ +{ CPUFUNC(op_5bf9_5), 23545 }, /* Scc */ +{ CPUFUNC(op_5cc0_5), 23744 }, /* Scc */ +{ CPUFUNC(op_5cc8_5), 23752 }, /* DBcc */ +{ CPUFUNC(op_5cd0_5), 23760 }, /* Scc */ +{ CPUFUNC(op_5cd8_5), 23768 }, /* Scc */ +{ CPUFUNC(op_5ce0_5), 23776 }, /* Scc */ +{ CPUFUNC(op_5ce8_5), 23784 }, /* Scc */ +{ CPUFUNC(op_5cf0_5), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf8_5), 23800 }, /* Scc */ +{ CPUFUNC(op_5cf9_5), 23801 }, /* Scc */ +{ CPUFUNC(op_5dc0_5), 24000 }, /* Scc */ +{ CPUFUNC(op_5dc8_5), 24008 }, /* DBcc */ +{ CPUFUNC(op_5dd0_5), 24016 }, /* Scc */ +{ CPUFUNC(op_5dd8_5), 24024 }, /* Scc */ +{ CPUFUNC(op_5de0_5), 24032 }, /* Scc */ +{ CPUFUNC(op_5de8_5), 24040 }, /* Scc */ +{ CPUFUNC(op_5df0_5), 24048 }, /* Scc */ +{ CPUFUNC(op_5df8_5), 24056 }, /* Scc */ +{ CPUFUNC(op_5df9_5), 24057 }, /* Scc */ +{ CPUFUNC(op_5ec0_5), 24256 }, /* Scc */ +{ CPUFUNC(op_5ec8_5), 24264 }, /* DBcc */ +{ CPUFUNC(op_5ed0_5), 24272 }, /* Scc */ +{ CPUFUNC(op_5ed8_5), 24280 }, /* Scc */ +{ CPUFUNC(op_5ee0_5), 24288 }, /* Scc */ +{ CPUFUNC(op_5ee8_5), 24296 }, /* Scc */ +{ CPUFUNC(op_5ef0_5), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef8_5), 24312 }, /* Scc */ +{ CPUFUNC(op_5ef9_5), 24313 }, /* Scc */ +{ CPUFUNC(op_5fc0_5), 24512 }, /* Scc */ +{ CPUFUNC(op_5fc8_5), 24520 }, /* DBcc */ +{ CPUFUNC(op_5fd0_5), 24528 }, /* Scc */ +{ CPUFUNC(op_5fd8_5), 24536 }, /* Scc */ +{ CPUFUNC(op_5fe0_5), 24544 }, /* Scc */ +{ CPUFUNC(op_5fe8_5), 24552 }, /* Scc */ +{ CPUFUNC(op_5ff0_5), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff8_5), 24568 }, /* Scc */ +{ CPUFUNC(op_5ff9_5), 24569 }, /* Scc */ +{ CPUFUNC(op_6000_5), 24576 }, /* Bcc */ +{ CPUFUNC(op_6001_5), 24577 }, /* Bcc */ +{ CPUFUNC(op_60ff_5), 24831 }, /* Bcc */ +{ CPUFUNC(op_6100_5), 24832 }, /* BSR */ +{ CPUFUNC(op_6101_5), 24833 }, /* BSR */ +{ CPUFUNC(op_61ff_5), 25087 }, /* BSR */ +{ CPUFUNC(op_6200_5), 25088 }, /* Bcc */ +{ CPUFUNC(op_6201_5), 25089 }, /* Bcc */ +{ CPUFUNC(op_62ff_5), 25343 }, /* Bcc */ +{ CPUFUNC(op_6300_5), 25344 }, /* Bcc */ +{ CPUFUNC(op_6301_5), 25345 }, /* Bcc */ +{ CPUFUNC(op_63ff_5), 25599 }, /* Bcc */ +{ CPUFUNC(op_6400_5), 25600 }, /* Bcc */ +{ CPUFUNC(op_6401_5), 25601 }, /* Bcc */ +{ CPUFUNC(op_64ff_5), 25855 }, /* Bcc */ +{ CPUFUNC(op_6500_5), 25856 }, /* Bcc */ +{ CPUFUNC(op_6501_5), 25857 }, /* Bcc */ +{ CPUFUNC(op_65ff_5), 26111 }, /* Bcc */ +{ CPUFUNC(op_6600_5), 26112 }, /* Bcc */ +{ CPUFUNC(op_6601_5), 26113 }, /* Bcc */ +{ CPUFUNC(op_66ff_5), 26367 }, /* Bcc */ +{ CPUFUNC(op_6700_5), 26368 }, /* Bcc */ +{ CPUFUNC(op_6701_5), 26369 }, /* Bcc */ +{ CPUFUNC(op_67ff_5), 26623 }, /* Bcc */ +{ CPUFUNC(op_6800_5), 26624 }, /* Bcc */ +{ CPUFUNC(op_6801_5), 26625 }, /* Bcc */ +{ CPUFUNC(op_68ff_5), 26879 }, /* Bcc */ +{ CPUFUNC(op_6900_5), 26880 }, /* Bcc */ +{ CPUFUNC(op_6901_5), 26881 }, /* Bcc */ +{ CPUFUNC(op_69ff_5), 27135 }, /* Bcc */ +{ CPUFUNC(op_6a00_5), 27136 }, /* Bcc */ +{ CPUFUNC(op_6a01_5), 27137 }, /* Bcc */ +{ CPUFUNC(op_6aff_5), 27391 }, /* Bcc */ +{ CPUFUNC(op_6b00_5), 27392 }, /* Bcc */ +{ CPUFUNC(op_6b01_5), 27393 }, /* Bcc */ +{ CPUFUNC(op_6bff_5), 27647 }, /* Bcc */ +{ CPUFUNC(op_6c00_5), 27648 }, /* Bcc */ +{ CPUFUNC(op_6c01_5), 27649 }, /* Bcc */ +{ CPUFUNC(op_6cff_5), 27903 }, /* Bcc */ +{ CPUFUNC(op_6d00_5), 27904 }, /* Bcc */ +{ CPUFUNC(op_6d01_5), 27905 }, /* Bcc */ +{ CPUFUNC(op_6dff_5), 28159 }, /* Bcc */ +{ CPUFUNC(op_6e00_5), 28160 }, /* Bcc */ +{ CPUFUNC(op_6e01_5), 28161 }, /* Bcc */ +{ CPUFUNC(op_6eff_5), 28415 }, /* Bcc */ +{ CPUFUNC(op_6f00_5), 28416 }, /* Bcc */ +{ CPUFUNC(op_6f01_5), 28417 }, /* Bcc */ +{ CPUFUNC(op_6fff_5), 28671 }, /* Bcc */ +{ CPUFUNC(op_7000_5), 28672 }, /* MOVE */ +{ CPUFUNC(op_8000_5), 32768 }, /* OR */ +{ CPUFUNC(op_8010_5), 32784 }, /* OR */ +{ CPUFUNC(op_8018_5), 32792 }, /* OR */ +{ CPUFUNC(op_8020_5), 32800 }, /* OR */ +{ CPUFUNC(op_8028_5), 32808 }, /* OR */ +{ CPUFUNC(op_8030_5), 32816 }, /* OR */ +{ CPUFUNC(op_8038_5), 32824 }, /* OR */ +{ CPUFUNC(op_8039_5), 32825 }, /* OR */ +{ CPUFUNC(op_803a_5), 32826 }, /* OR */ +{ CPUFUNC(op_803b_5), 32827 }, /* OR */ +{ CPUFUNC(op_803c_5), 32828 }, /* OR */ +{ CPUFUNC(op_8040_5), 32832 }, /* OR */ +{ CPUFUNC(op_8050_5), 32848 }, /* OR */ +{ CPUFUNC(op_8058_5), 32856 }, /* OR */ +{ CPUFUNC(op_8060_5), 32864 }, /* OR */ +{ CPUFUNC(op_8068_5), 32872 }, /* OR */ +{ CPUFUNC(op_8070_5), 32880 }, /* OR */ +{ CPUFUNC(op_8078_5), 32888 }, /* OR */ +{ CPUFUNC(op_8079_5), 32889 }, /* OR */ +{ CPUFUNC(op_807a_5), 32890 }, /* OR */ +{ CPUFUNC(op_807b_5), 32891 }, /* OR */ +{ CPUFUNC(op_807c_5), 32892 }, /* OR */ +{ CPUFUNC(op_8080_5), 32896 }, /* OR */ +{ CPUFUNC(op_8090_5), 32912 }, /* OR */ +{ CPUFUNC(op_8098_5), 32920 }, /* OR */ +{ CPUFUNC(op_80a0_5), 32928 }, /* OR */ +{ CPUFUNC(op_80a8_5), 32936 }, /* OR */ +{ CPUFUNC(op_80b0_5), 32944 }, /* OR */ +{ CPUFUNC(op_80b8_5), 32952 }, /* OR */ +{ CPUFUNC(op_80b9_5), 32953 }, /* OR */ +{ CPUFUNC(op_80ba_5), 32954 }, /* OR */ +{ CPUFUNC(op_80bb_5), 32955 }, /* OR */ +{ CPUFUNC(op_80bc_5), 32956 }, /* OR */ +{ CPUFUNC(op_80c0_5), 32960 }, /* DIVU */ +{ CPUFUNC(op_80d0_5), 32976 }, /* DIVU */ +{ CPUFUNC(op_80d8_5), 32984 }, /* DIVU */ +{ CPUFUNC(op_80e0_5), 32992 }, /* DIVU */ +{ CPUFUNC(op_80e8_5), 33000 }, /* DIVU */ +{ CPUFUNC(op_80f0_5), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f8_5), 33016 }, /* DIVU */ +{ CPUFUNC(op_80f9_5), 33017 }, /* DIVU */ +{ CPUFUNC(op_80fa_5), 33018 }, /* DIVU */ +{ CPUFUNC(op_80fb_5), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fc_5), 33020 }, /* DIVU */ +{ CPUFUNC(op_8100_5), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_5), 33032 }, /* SBCD */ +{ CPUFUNC(op_8110_5), 33040 }, /* OR */ +{ CPUFUNC(op_8118_5), 33048 }, /* OR */ +{ CPUFUNC(op_8120_5), 33056 }, /* OR */ +{ CPUFUNC(op_8128_5), 33064 }, /* OR */ +{ CPUFUNC(op_8130_5), 33072 }, /* OR */ +{ CPUFUNC(op_8138_5), 33080 }, /* OR */ +{ CPUFUNC(op_8139_5), 33081 }, /* OR */ +{ CPUFUNC(op_8150_5), 33104 }, /* OR */ +{ CPUFUNC(op_8158_5), 33112 }, /* OR */ +{ CPUFUNC(op_8160_5), 33120 }, /* OR */ +{ CPUFUNC(op_8168_5), 33128 }, /* OR */ +{ CPUFUNC(op_8170_5), 33136 }, /* OR */ +{ CPUFUNC(op_8178_5), 33144 }, /* OR */ +{ CPUFUNC(op_8179_5), 33145 }, /* OR */ +{ CPUFUNC(op_8190_5), 33168 }, /* OR */ +{ CPUFUNC(op_8198_5), 33176 }, /* OR */ +{ CPUFUNC(op_81a0_5), 33184 }, /* OR */ +{ CPUFUNC(op_81a8_5), 33192 }, /* OR */ +{ CPUFUNC(op_81b0_5), 33200 }, /* OR */ +{ CPUFUNC(op_81b8_5), 33208 }, /* OR */ +{ CPUFUNC(op_81b9_5), 33209 }, /* OR */ +{ CPUFUNC(op_81c0_5), 33216 }, /* DIVS */ +{ CPUFUNC(op_81d0_5), 33232 }, /* DIVS */ +{ CPUFUNC(op_81d8_5), 33240 }, /* DIVS */ +{ CPUFUNC(op_81e0_5), 33248 }, /* DIVS */ +{ CPUFUNC(op_81e8_5), 33256 }, /* DIVS */ +{ CPUFUNC(op_81f0_5), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f8_5), 33272 }, /* DIVS */ +{ CPUFUNC(op_81f9_5), 33273 }, /* DIVS */ +{ CPUFUNC(op_81fa_5), 33274 }, /* DIVS */ +{ CPUFUNC(op_81fb_5), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fc_5), 33276 }, /* DIVS */ +{ CPUFUNC(op_9000_5), 36864 }, /* SUB */ +{ CPUFUNC(op_9010_5), 36880 }, /* SUB */ +{ CPUFUNC(op_9018_5), 36888 }, /* SUB */ +{ CPUFUNC(op_9020_5), 36896 }, /* SUB */ +{ CPUFUNC(op_9028_5), 36904 }, /* SUB */ +{ CPUFUNC(op_9030_5), 36912 }, /* SUB */ +{ CPUFUNC(op_9038_5), 36920 }, /* SUB */ +{ CPUFUNC(op_9039_5), 36921 }, /* SUB */ +{ CPUFUNC(op_903a_5), 36922 }, /* SUB */ +{ CPUFUNC(op_903b_5), 36923 }, /* SUB */ +{ CPUFUNC(op_903c_5), 36924 }, /* SUB */ +{ CPUFUNC(op_9040_5), 36928 }, /* SUB */ +{ CPUFUNC(op_9048_5), 36936 }, /* SUB */ +{ CPUFUNC(op_9050_5), 36944 }, /* SUB */ +{ CPUFUNC(op_9058_5), 36952 }, /* SUB */ +{ CPUFUNC(op_9060_5), 36960 }, /* SUB */ +{ CPUFUNC(op_9068_5), 36968 }, /* SUB */ +{ CPUFUNC(op_9070_5), 36976 }, /* SUB */ +{ CPUFUNC(op_9078_5), 36984 }, /* SUB */ +{ CPUFUNC(op_9079_5), 36985 }, /* SUB */ +{ CPUFUNC(op_907a_5), 36986 }, /* SUB */ +{ CPUFUNC(op_907b_5), 36987 }, /* SUB */ +{ CPUFUNC(op_907c_5), 36988 }, /* SUB */ +{ CPUFUNC(op_9080_5), 36992 }, /* SUB */ +{ CPUFUNC(op_9088_5), 37000 }, /* SUB */ +{ CPUFUNC(op_9090_5), 37008 }, /* SUB */ +{ CPUFUNC(op_9098_5), 37016 }, /* SUB */ +{ CPUFUNC(op_90a0_5), 37024 }, /* SUB */ +{ CPUFUNC(op_90a8_5), 37032 }, /* SUB */ +{ CPUFUNC(op_90b0_5), 37040 }, /* SUB */ +{ CPUFUNC(op_90b8_5), 37048 }, /* SUB */ +{ CPUFUNC(op_90b9_5), 37049 }, /* SUB */ +{ CPUFUNC(op_90ba_5), 37050 }, /* SUB */ +{ CPUFUNC(op_90bb_5), 37051 }, /* SUB */ +{ CPUFUNC(op_90bc_5), 37052 }, /* SUB */ +{ CPUFUNC(op_90c0_5), 37056 }, /* SUBA */ +{ CPUFUNC(op_90c8_5), 37064 }, /* SUBA */ +{ CPUFUNC(op_90d0_5), 37072 }, /* SUBA */ +{ CPUFUNC(op_90d8_5), 37080 }, /* SUBA */ +{ CPUFUNC(op_90e0_5), 37088 }, /* SUBA */ +{ CPUFUNC(op_90e8_5), 37096 }, /* SUBA */ +{ CPUFUNC(op_90f0_5), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f8_5), 37112 }, /* SUBA */ +{ CPUFUNC(op_90f9_5), 37113 }, /* SUBA */ +{ CPUFUNC(op_90fa_5), 37114 }, /* SUBA */ +{ CPUFUNC(op_90fb_5), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fc_5), 37116 }, /* SUBA */ +{ CPUFUNC(op_9100_5), 37120 }, /* SUBX */ +{ CPUFUNC(op_9108_5), 37128 }, /* SUBX */ +{ CPUFUNC(op_9110_5), 37136 }, /* SUB */ +{ CPUFUNC(op_9118_5), 37144 }, /* SUB */ +{ CPUFUNC(op_9120_5), 37152 }, /* SUB */ +{ CPUFUNC(op_9128_5), 37160 }, /* SUB */ +{ CPUFUNC(op_9130_5), 37168 }, /* SUB */ +{ CPUFUNC(op_9138_5), 37176 }, /* SUB */ +{ CPUFUNC(op_9139_5), 37177 }, /* SUB */ +{ CPUFUNC(op_9140_5), 37184 }, /* SUBX */ +{ CPUFUNC(op_9148_5), 37192 }, /* SUBX */ +{ CPUFUNC(op_9150_5), 37200 }, /* SUB */ +{ CPUFUNC(op_9158_5), 37208 }, /* SUB */ +{ CPUFUNC(op_9160_5), 37216 }, /* SUB */ +{ CPUFUNC(op_9168_5), 37224 }, /* SUB */ +{ CPUFUNC(op_9170_5), 37232 }, /* SUB */ +{ CPUFUNC(op_9178_5), 37240 }, /* SUB */ +{ CPUFUNC(op_9179_5), 37241 }, /* SUB */ +{ CPUFUNC(op_9180_5), 37248 }, /* SUBX */ +{ CPUFUNC(op_9188_5), 37256 }, /* SUBX */ +{ CPUFUNC(op_9190_5), 37264 }, /* SUB */ +{ CPUFUNC(op_9198_5), 37272 }, /* SUB */ +{ CPUFUNC(op_91a0_5), 37280 }, /* SUB */ +{ CPUFUNC(op_91a8_5), 37288 }, /* SUB */ +{ CPUFUNC(op_91b0_5), 37296 }, /* SUB */ +{ CPUFUNC(op_91b8_5), 37304 }, /* SUB */ +{ CPUFUNC(op_91b9_5), 37305 }, /* SUB */ +{ CPUFUNC(op_91c0_5), 37312 }, /* SUBA */ +{ CPUFUNC(op_91c8_5), 37320 }, /* SUBA */ +{ CPUFUNC(op_91d0_5), 37328 }, /* SUBA */ +{ CPUFUNC(op_91d8_5), 37336 }, /* SUBA */ +{ CPUFUNC(op_91e0_5), 37344 }, /* SUBA */ +{ CPUFUNC(op_91e8_5), 37352 }, /* SUBA */ +{ CPUFUNC(op_91f0_5), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f8_5), 37368 }, /* SUBA */ +{ CPUFUNC(op_91f9_5), 37369 }, /* SUBA */ +{ CPUFUNC(op_91fa_5), 37370 }, /* SUBA */ +{ CPUFUNC(op_91fb_5), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fc_5), 37372 }, /* SUBA */ +{ CPUFUNC(op_b000_5), 45056 }, /* CMP */ +{ CPUFUNC(op_b010_5), 45072 }, /* CMP */ +{ CPUFUNC(op_b018_5), 45080 }, /* CMP */ +{ CPUFUNC(op_b020_5), 45088 }, /* CMP */ +{ CPUFUNC(op_b028_5), 45096 }, /* CMP */ +{ CPUFUNC(op_b030_5), 45104 }, /* CMP */ +{ CPUFUNC(op_b038_5), 45112 }, /* CMP */ +{ CPUFUNC(op_b039_5), 45113 }, /* CMP */ +{ CPUFUNC(op_b03a_5), 45114 }, /* CMP */ +{ CPUFUNC(op_b03b_5), 45115 }, /* CMP */ +{ CPUFUNC(op_b03c_5), 45116 }, /* CMP */ +{ CPUFUNC(op_b040_5), 45120 }, /* CMP */ +{ CPUFUNC(op_b048_5), 45128 }, /* CMP */ +{ CPUFUNC(op_b050_5), 45136 }, /* CMP */ +{ CPUFUNC(op_b058_5), 45144 }, /* CMP */ +{ CPUFUNC(op_b060_5), 45152 }, /* CMP */ +{ CPUFUNC(op_b068_5), 45160 }, /* CMP */ +{ CPUFUNC(op_b070_5), 45168 }, /* CMP */ +{ CPUFUNC(op_b078_5), 45176 }, /* CMP */ +{ CPUFUNC(op_b079_5), 45177 }, /* CMP */ +{ CPUFUNC(op_b07a_5), 45178 }, /* CMP */ +{ CPUFUNC(op_b07b_5), 45179 }, /* CMP */ +{ CPUFUNC(op_b07c_5), 45180 }, /* CMP */ +{ CPUFUNC(op_b080_5), 45184 }, /* CMP */ +{ CPUFUNC(op_b088_5), 45192 }, /* CMP */ +{ CPUFUNC(op_b090_5), 45200 }, /* CMP */ +{ CPUFUNC(op_b098_5), 45208 }, /* CMP */ +{ CPUFUNC(op_b0a0_5), 45216 }, /* CMP */ +{ CPUFUNC(op_b0a8_5), 45224 }, /* CMP */ +{ CPUFUNC(op_b0b0_5), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b8_5), 45240 }, /* CMP */ +{ CPUFUNC(op_b0b9_5), 45241 }, /* CMP */ +{ CPUFUNC(op_b0ba_5), 45242 }, /* CMP */ +{ CPUFUNC(op_b0bb_5), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bc_5), 45244 }, /* CMP */ +{ CPUFUNC(op_b0c0_5), 45248 }, /* CMPA */ +{ CPUFUNC(op_b0c8_5), 45256 }, /* CMPA */ +{ CPUFUNC(op_b0d0_5), 45264 }, /* CMPA */ +{ CPUFUNC(op_b0d8_5), 45272 }, /* CMPA */ +{ CPUFUNC(op_b0e0_5), 45280 }, /* CMPA */ +{ CPUFUNC(op_b0e8_5), 45288 }, /* CMPA */ +{ CPUFUNC(op_b0f0_5), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f8_5), 45304 }, /* CMPA */ +{ CPUFUNC(op_b0f9_5), 45305 }, /* CMPA */ +{ CPUFUNC(op_b0fa_5), 45306 }, /* CMPA */ +{ CPUFUNC(op_b0fb_5), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fc_5), 45308 }, /* CMPA */ +{ CPUFUNC(op_b100_5), 45312 }, /* EOR */ +{ CPUFUNC(op_b108_5), 45320 }, /* CMPM */ +{ CPUFUNC(op_b110_5), 45328 }, /* EOR */ +{ CPUFUNC(op_b118_5), 45336 }, /* EOR */ +{ CPUFUNC(op_b120_5), 45344 }, /* EOR */ +{ CPUFUNC(op_b128_5), 45352 }, /* EOR */ +{ CPUFUNC(op_b130_5), 45360 }, /* EOR */ +{ CPUFUNC(op_b138_5), 45368 }, /* EOR */ +{ CPUFUNC(op_b139_5), 45369 }, /* EOR */ +{ CPUFUNC(op_b140_5), 45376 }, /* EOR */ +{ CPUFUNC(op_b148_5), 45384 }, /* CMPM */ +{ CPUFUNC(op_b150_5), 45392 }, /* EOR */ +{ CPUFUNC(op_b158_5), 45400 }, /* EOR */ +{ CPUFUNC(op_b160_5), 45408 }, /* EOR */ +{ CPUFUNC(op_b168_5), 45416 }, /* EOR */ +{ CPUFUNC(op_b170_5), 45424 }, /* EOR */ +{ CPUFUNC(op_b178_5), 45432 }, /* EOR */ +{ CPUFUNC(op_b179_5), 45433 }, /* EOR */ +{ CPUFUNC(op_b180_5), 45440 }, /* EOR */ +{ CPUFUNC(op_b188_5), 45448 }, /* CMPM */ +{ CPUFUNC(op_b190_5), 45456 }, /* EOR */ +{ CPUFUNC(op_b198_5), 45464 }, /* EOR */ +{ CPUFUNC(op_b1a0_5), 45472 }, /* EOR */ +{ CPUFUNC(op_b1a8_5), 45480 }, /* EOR */ +{ CPUFUNC(op_b1b0_5), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b8_5), 45496 }, /* EOR */ +{ CPUFUNC(op_b1b9_5), 45497 }, /* EOR */ +{ CPUFUNC(op_b1c0_5), 45504 }, /* CMPA */ +{ CPUFUNC(op_b1c8_5), 45512 }, /* CMPA */ +{ CPUFUNC(op_b1d0_5), 45520 }, /* CMPA */ +{ CPUFUNC(op_b1d8_5), 45528 }, /* CMPA */ +{ CPUFUNC(op_b1e0_5), 45536 }, /* CMPA */ +{ CPUFUNC(op_b1e8_5), 45544 }, /* CMPA */ +{ CPUFUNC(op_b1f0_5), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f8_5), 45560 }, /* CMPA */ +{ CPUFUNC(op_b1f9_5), 45561 }, /* CMPA */ +{ CPUFUNC(op_b1fa_5), 45562 }, /* CMPA */ +{ CPUFUNC(op_b1fb_5), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fc_5), 45564 }, /* CMPA */ +{ CPUFUNC(op_c000_5), 49152 }, /* AND */ +{ CPUFUNC(op_c010_5), 49168 }, /* AND */ +{ CPUFUNC(op_c018_5), 49176 }, /* AND */ +{ CPUFUNC(op_c020_5), 49184 }, /* AND */ +{ CPUFUNC(op_c028_5), 49192 }, /* AND */ +{ CPUFUNC(op_c030_5), 49200 }, /* AND */ +{ CPUFUNC(op_c038_5), 49208 }, /* AND */ +{ CPUFUNC(op_c039_5), 49209 }, /* AND */ +{ CPUFUNC(op_c03a_5), 49210 }, /* AND */ +{ CPUFUNC(op_c03b_5), 49211 }, /* AND */ +{ CPUFUNC(op_c03c_5), 49212 }, /* AND */ +{ CPUFUNC(op_c040_5), 49216 }, /* AND */ +{ CPUFUNC(op_c050_5), 49232 }, /* AND */ +{ CPUFUNC(op_c058_5), 49240 }, /* AND */ +{ CPUFUNC(op_c060_5), 49248 }, /* AND */ +{ CPUFUNC(op_c068_5), 49256 }, /* AND */ +{ CPUFUNC(op_c070_5), 49264 }, /* AND */ +{ CPUFUNC(op_c078_5), 49272 }, /* AND */ +{ CPUFUNC(op_c079_5), 49273 }, /* AND */ +{ CPUFUNC(op_c07a_5), 49274 }, /* AND */ +{ CPUFUNC(op_c07b_5), 49275 }, /* AND */ +{ CPUFUNC(op_c07c_5), 49276 }, /* AND */ +{ CPUFUNC(op_c080_5), 49280 }, /* AND */ +{ CPUFUNC(op_c090_5), 49296 }, /* AND */ +{ CPUFUNC(op_c098_5), 49304 }, /* AND */ +{ CPUFUNC(op_c0a0_5), 49312 }, /* AND */ +{ CPUFUNC(op_c0a8_5), 49320 }, /* AND */ +{ CPUFUNC(op_c0b0_5), 49328 }, /* AND */ +{ CPUFUNC(op_c0b8_5), 49336 }, /* AND */ +{ CPUFUNC(op_c0b9_5), 49337 }, /* AND */ +{ CPUFUNC(op_c0ba_5), 49338 }, /* AND */ +{ CPUFUNC(op_c0bb_5), 49339 }, /* AND */ +{ CPUFUNC(op_c0bc_5), 49340 }, /* AND */ +{ CPUFUNC(op_c0c0_5), 49344 }, /* MULU */ +{ CPUFUNC(op_c0d0_5), 49360 }, /* MULU */ +{ CPUFUNC(op_c0d8_5), 49368 }, /* MULU */ +{ CPUFUNC(op_c0e0_5), 49376 }, /* MULU */ +{ CPUFUNC(op_c0e8_5), 49384 }, /* MULU */ +{ CPUFUNC(op_c0f0_5), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f8_5), 49400 }, /* MULU */ +{ CPUFUNC(op_c0f9_5), 49401 }, /* MULU */ +{ CPUFUNC(op_c0fa_5), 49402 }, /* MULU */ +{ CPUFUNC(op_c0fb_5), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fc_5), 49404 }, /* MULU */ +{ CPUFUNC(op_c100_5), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_5), 49416 }, /* ABCD */ +{ CPUFUNC(op_c110_5), 49424 }, /* AND */ +{ CPUFUNC(op_c118_5), 49432 }, /* AND */ +{ CPUFUNC(op_c120_5), 49440 }, /* AND */ +{ CPUFUNC(op_c128_5), 49448 }, /* AND */ +{ CPUFUNC(op_c130_5), 49456 }, /* AND */ +{ CPUFUNC(op_c138_5), 49464 }, /* AND */ +{ CPUFUNC(op_c139_5), 49465 }, /* AND */ +{ CPUFUNC(op_c140_5), 49472 }, /* EXG */ +{ CPUFUNC(op_c148_5), 49480 }, /* EXG */ +{ CPUFUNC(op_c150_5), 49488 }, /* AND */ +{ CPUFUNC(op_c158_5), 49496 }, /* AND */ +{ CPUFUNC(op_c160_5), 49504 }, /* AND */ +{ CPUFUNC(op_c168_5), 49512 }, /* AND */ +{ CPUFUNC(op_c170_5), 49520 }, /* AND */ +{ CPUFUNC(op_c178_5), 49528 }, /* AND */ +{ CPUFUNC(op_c179_5), 49529 }, /* AND */ +{ CPUFUNC(op_c188_5), 49544 }, /* EXG */ +{ CPUFUNC(op_c190_5), 49552 }, /* AND */ +{ CPUFUNC(op_c198_5), 49560 }, /* AND */ +{ CPUFUNC(op_c1a0_5), 49568 }, /* AND */ +{ CPUFUNC(op_c1a8_5), 49576 }, /* AND */ +{ CPUFUNC(op_c1b0_5), 49584 }, /* AND */ +{ CPUFUNC(op_c1b8_5), 49592 }, /* AND */ +{ CPUFUNC(op_c1b9_5), 49593 }, /* AND */ +{ CPUFUNC(op_c1c0_5), 49600 }, /* MULS */ +{ CPUFUNC(op_c1d0_5), 49616 }, /* MULS */ +{ CPUFUNC(op_c1d8_5), 49624 }, /* MULS */ +{ CPUFUNC(op_c1e0_5), 49632 }, /* MULS */ +{ CPUFUNC(op_c1e8_5), 49640 }, /* MULS */ +{ CPUFUNC(op_c1f0_5), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f8_5), 49656 }, /* MULS */ +{ CPUFUNC(op_c1f9_5), 49657 }, /* MULS */ +{ CPUFUNC(op_c1fa_5), 49658 }, /* MULS */ +{ CPUFUNC(op_c1fb_5), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fc_5), 49660 }, /* MULS */ +{ CPUFUNC(op_d000_5), 53248 }, /* ADD */ +{ CPUFUNC(op_d010_5), 53264 }, /* ADD */ +{ CPUFUNC(op_d018_5), 53272 }, /* ADD */ +{ CPUFUNC(op_d020_5), 53280 }, /* ADD */ +{ CPUFUNC(op_d028_5), 53288 }, /* ADD */ +{ CPUFUNC(op_d030_5), 53296 }, /* ADD */ +{ CPUFUNC(op_d038_5), 53304 }, /* ADD */ +{ CPUFUNC(op_d039_5), 53305 }, /* ADD */ +{ CPUFUNC(op_d03a_5), 53306 }, /* ADD */ +{ CPUFUNC(op_d03b_5), 53307 }, /* ADD */ +{ CPUFUNC(op_d03c_5), 53308 }, /* ADD */ +{ CPUFUNC(op_d040_5), 53312 }, /* ADD */ +{ CPUFUNC(op_d048_5), 53320 }, /* ADD */ +{ CPUFUNC(op_d050_5), 53328 }, /* ADD */ +{ CPUFUNC(op_d058_5), 53336 }, /* ADD */ +{ CPUFUNC(op_d060_5), 53344 }, /* ADD */ +{ CPUFUNC(op_d068_5), 53352 }, /* ADD */ +{ CPUFUNC(op_d070_5), 53360 }, /* ADD */ +{ CPUFUNC(op_d078_5), 53368 }, /* ADD */ +{ CPUFUNC(op_d079_5), 53369 }, /* ADD */ +{ CPUFUNC(op_d07a_5), 53370 }, /* ADD */ +{ CPUFUNC(op_d07b_5), 53371 }, /* ADD */ +{ CPUFUNC(op_d07c_5), 53372 }, /* ADD */ +{ CPUFUNC(op_d080_5), 53376 }, /* ADD */ +{ CPUFUNC(op_d088_5), 53384 }, /* ADD */ +{ CPUFUNC(op_d090_5), 53392 }, /* ADD */ +{ CPUFUNC(op_d098_5), 53400 }, /* ADD */ +{ CPUFUNC(op_d0a0_5), 53408 }, /* ADD */ +{ CPUFUNC(op_d0a8_5), 53416 }, /* ADD */ +{ CPUFUNC(op_d0b0_5), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b8_5), 53432 }, /* ADD */ +{ CPUFUNC(op_d0b9_5), 53433 }, /* ADD */ +{ CPUFUNC(op_d0ba_5), 53434 }, /* ADD */ +{ CPUFUNC(op_d0bb_5), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bc_5), 53436 }, /* ADD */ +{ CPUFUNC(op_d0c0_5), 53440 }, /* ADDA */ +{ CPUFUNC(op_d0c8_5), 53448 }, /* ADDA */ +{ CPUFUNC(op_d0d0_5), 53456 }, /* ADDA */ +{ CPUFUNC(op_d0d8_5), 53464 }, /* ADDA */ +{ CPUFUNC(op_d0e0_5), 53472 }, /* ADDA */ +{ CPUFUNC(op_d0e8_5), 53480 }, /* ADDA */ +{ CPUFUNC(op_d0f0_5), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f8_5), 53496 }, /* ADDA */ +{ CPUFUNC(op_d0f9_5), 53497 }, /* ADDA */ +{ CPUFUNC(op_d0fa_5), 53498 }, /* ADDA */ +{ CPUFUNC(op_d0fb_5), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fc_5), 53500 }, /* ADDA */ +{ CPUFUNC(op_d100_5), 53504 }, /* ADDX */ +{ CPUFUNC(op_d108_5), 53512 }, /* ADDX */ +{ CPUFUNC(op_d110_5), 53520 }, /* ADD */ +{ CPUFUNC(op_d118_5), 53528 }, /* ADD */ +{ CPUFUNC(op_d120_5), 53536 }, /* ADD */ +{ CPUFUNC(op_d128_5), 53544 }, /* ADD */ +{ CPUFUNC(op_d130_5), 53552 }, /* ADD */ +{ CPUFUNC(op_d138_5), 53560 }, /* ADD */ +{ CPUFUNC(op_d139_5), 53561 }, /* ADD */ +{ CPUFUNC(op_d140_5), 53568 }, /* ADDX */ +{ CPUFUNC(op_d148_5), 53576 }, /* ADDX */ +{ CPUFUNC(op_d150_5), 53584 }, /* ADD */ +{ CPUFUNC(op_d158_5), 53592 }, /* ADD */ +{ CPUFUNC(op_d160_5), 53600 }, /* ADD */ +{ CPUFUNC(op_d168_5), 53608 }, /* ADD */ +{ CPUFUNC(op_d170_5), 53616 }, /* ADD */ +{ CPUFUNC(op_d178_5), 53624 }, /* ADD */ +{ CPUFUNC(op_d179_5), 53625 }, /* ADD */ +{ CPUFUNC(op_d180_5), 53632 }, /* ADDX */ +{ CPUFUNC(op_d188_5), 53640 }, /* ADDX */ +{ CPUFUNC(op_d190_5), 53648 }, /* ADD */ +{ CPUFUNC(op_d198_5), 53656 }, /* ADD */ +{ CPUFUNC(op_d1a0_5), 53664 }, /* ADD */ +{ CPUFUNC(op_d1a8_5), 53672 }, /* ADD */ +{ CPUFUNC(op_d1b0_5), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b8_5), 53688 }, /* ADD */ +{ CPUFUNC(op_d1b9_5), 53689 }, /* ADD */ +{ CPUFUNC(op_d1c0_5), 53696 }, /* ADDA */ +{ CPUFUNC(op_d1c8_5), 53704 }, /* ADDA */ +{ CPUFUNC(op_d1d0_5), 53712 }, /* ADDA */ +{ CPUFUNC(op_d1d8_5), 53720 }, /* ADDA */ +{ CPUFUNC(op_d1e0_5), 53728 }, /* ADDA */ +{ CPUFUNC(op_d1e8_5), 53736 }, /* ADDA */ +{ CPUFUNC(op_d1f0_5), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f8_5), 53752 }, /* ADDA */ +{ CPUFUNC(op_d1f9_5), 53753 }, /* ADDA */ +{ CPUFUNC(op_d1fa_5), 53754 }, /* ADDA */ +{ CPUFUNC(op_d1fb_5), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fc_5), 53756 }, /* ADDA */ +{ CPUFUNC(op_e000_5), 57344 }, /* ASR */ +{ CPUFUNC(op_e008_5), 57352 }, /* LSR */ +{ CPUFUNC(op_e010_5), 57360 }, /* ROXR */ +{ CPUFUNC(op_e018_5), 57368 }, /* ROR */ +{ CPUFUNC(op_e020_5), 57376 }, /* ASR */ +{ CPUFUNC(op_e028_5), 57384 }, /* LSR */ +{ CPUFUNC(op_e030_5), 57392 }, /* ROXR */ +{ CPUFUNC(op_e038_5), 57400 }, /* ROR */ +{ CPUFUNC(op_e040_5), 57408 }, /* ASR */ +{ CPUFUNC(op_e048_5), 57416 }, /* LSR */ +{ CPUFUNC(op_e050_5), 57424 }, /* ROXR */ +{ CPUFUNC(op_e058_5), 57432 }, /* ROR */ +{ CPUFUNC(op_e060_5), 57440 }, /* ASR */ +{ CPUFUNC(op_e068_5), 57448 }, /* LSR */ +{ CPUFUNC(op_e070_5), 57456 }, /* ROXR */ +{ CPUFUNC(op_e078_5), 57464 }, /* ROR */ +{ CPUFUNC(op_e080_5), 57472 }, /* ASR */ +{ CPUFUNC(op_e088_5), 57480 }, /* LSR */ +{ CPUFUNC(op_e090_5), 57488 }, /* ROXR */ +{ CPUFUNC(op_e098_5), 57496 }, /* ROR */ +{ CPUFUNC(op_e0a0_5), 57504 }, /* ASR */ +{ CPUFUNC(op_e0a8_5), 57512 }, /* LSR */ +{ CPUFUNC(op_e0b0_5), 57520 }, /* ROXR */ +{ CPUFUNC(op_e0b8_5), 57528 }, /* ROR */ +{ CPUFUNC(op_e0d0_5), 57552 }, /* ASRW */ +{ CPUFUNC(op_e0d8_5), 57560 }, /* ASRW */ +{ CPUFUNC(op_e0e0_5), 57568 }, /* ASRW */ +{ CPUFUNC(op_e0e8_5), 57576 }, /* ASRW */ +{ CPUFUNC(op_e0f0_5), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f8_5), 57592 }, /* ASRW */ +{ CPUFUNC(op_e0f9_5), 57593 }, /* ASRW */ +{ CPUFUNC(op_e100_5), 57600 }, /* ASL */ +{ CPUFUNC(op_e108_5), 57608 }, /* LSL */ +{ CPUFUNC(op_e110_5), 57616 }, /* ROXL */ +{ CPUFUNC(op_e118_5), 57624 }, /* ROL */ +{ CPUFUNC(op_e120_5), 57632 }, /* ASL */ +{ CPUFUNC(op_e128_5), 57640 }, /* LSL */ +{ CPUFUNC(op_e130_5), 57648 }, /* ROXL */ +{ CPUFUNC(op_e138_5), 57656 }, /* ROL */ +{ CPUFUNC(op_e140_5), 57664 }, /* ASL */ +{ CPUFUNC(op_e148_5), 57672 }, /* LSL */ +{ CPUFUNC(op_e150_5), 57680 }, /* ROXL */ +{ CPUFUNC(op_e158_5), 57688 }, /* ROL */ +{ CPUFUNC(op_e160_5), 57696 }, /* ASL */ +{ CPUFUNC(op_e168_5), 57704 }, /* LSL */ +{ CPUFUNC(op_e170_5), 57712 }, /* ROXL */ +{ CPUFUNC(op_e178_5), 57720 }, /* ROL */ +{ CPUFUNC(op_e180_5), 57728 }, /* ASL */ +{ CPUFUNC(op_e188_5), 57736 }, /* LSL */ +{ CPUFUNC(op_e190_5), 57744 }, /* ROXL */ +{ CPUFUNC(op_e198_5), 57752 }, /* ROL */ +{ CPUFUNC(op_e1a0_5), 57760 }, /* ASL */ +{ CPUFUNC(op_e1a8_5), 57768 }, /* LSL */ +{ CPUFUNC(op_e1b0_5), 57776 }, /* ROXL */ +{ CPUFUNC(op_e1b8_5), 57784 }, /* ROL */ +{ CPUFUNC(op_e1d0_5), 57808 }, /* ASLW */ +{ CPUFUNC(op_e1d8_5), 57816 }, /* ASLW */ +{ CPUFUNC(op_e1e0_5), 57824 }, /* ASLW */ +{ CPUFUNC(op_e1e8_5), 57832 }, /* ASLW */ +{ CPUFUNC(op_e1f0_5), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f8_5), 57848 }, /* ASLW */ +{ CPUFUNC(op_e1f9_5), 57849 }, /* ASLW */ +{ CPUFUNC(op_e2d0_5), 58064 }, /* LSRW */ +{ CPUFUNC(op_e2d8_5), 58072 }, /* LSRW */ +{ CPUFUNC(op_e2e0_5), 58080 }, /* LSRW */ +{ CPUFUNC(op_e2e8_5), 58088 }, /* LSRW */ +{ CPUFUNC(op_e2f0_5), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f8_5), 58104 }, /* LSRW */ +{ CPUFUNC(op_e2f9_5), 58105 }, /* LSRW */ +{ CPUFUNC(op_e3d0_5), 58320 }, /* LSLW */ +{ CPUFUNC(op_e3d8_5), 58328 }, /* LSLW */ +{ CPUFUNC(op_e3e0_5), 58336 }, /* LSLW */ +{ CPUFUNC(op_e3e8_5), 58344 }, /* LSLW */ +{ CPUFUNC(op_e3f0_5), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f8_5), 58360 }, /* LSLW */ +{ CPUFUNC(op_e3f9_5), 58361 }, /* LSLW */ +{ CPUFUNC(op_e4d0_5), 58576 }, /* ROXRW */ +{ CPUFUNC(op_e4d8_5), 58584 }, /* ROXRW */ +{ CPUFUNC(op_e4e0_5), 58592 }, /* ROXRW */ +{ CPUFUNC(op_e4e8_5), 58600 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_5), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f8_5), 58616 }, /* ROXRW */ +{ CPUFUNC(op_e4f9_5), 58617 }, /* ROXRW */ +{ CPUFUNC(op_e5d0_5), 58832 }, /* ROXLW */ +{ CPUFUNC(op_e5d8_5), 58840 }, /* ROXLW */ +{ CPUFUNC(op_e5e0_5), 58848 }, /* ROXLW */ +{ CPUFUNC(op_e5e8_5), 58856 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_5), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f8_5), 58872 }, /* ROXLW */ +{ CPUFUNC(op_e5f9_5), 58873 }, /* ROXLW */ +{ CPUFUNC(op_e6d0_5), 59088 }, /* RORW */ +{ CPUFUNC(op_e6d8_5), 59096 }, /* RORW */ +{ CPUFUNC(op_e6e0_5), 59104 }, /* RORW */ +{ CPUFUNC(op_e6e8_5), 59112 }, /* RORW */ +{ CPUFUNC(op_e6f0_5), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f8_5), 59128 }, /* RORW */ +{ CPUFUNC(op_e6f9_5), 59129 }, /* RORW */ +{ CPUFUNC(op_e7d0_5), 59344 }, /* ROLW */ +{ CPUFUNC(op_e7d8_5), 59352 }, /* ROLW */ +{ CPUFUNC(op_e7e0_5), 59360 }, /* ROLW */ +{ CPUFUNC(op_e7e8_5), 59368 }, /* ROLW */ +{ CPUFUNC(op_e7f0_5), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f8_5), 59384 }, /* ROLW */ +{ CPUFUNC(op_e7f9_5), 59385 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_5 */ +#ifdef CPUEMU_6 +const struct cputbl CPUFUNC(op_smalltbl_6)[] = { +{ (cpuop_func*)CPUFUNC(op_0000_6), 0 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0010_6), 16 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0018_6), 24 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0020_6), 32 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0028_6), 40 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0030_6), 48 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0038_6), 56 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0039_6), 57 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_003c_6), 60 }, /* ORSR */ +{ (cpuop_func*)CPUFUNC(op_0040_6), 64 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0050_6), 80 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0058_6), 88 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0060_6), 96 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0068_6), 104 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0070_6), 112 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0078_6), 120 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0079_6), 121 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_007c_6), 124 }, /* ORSR */ +{ (cpuop_func*)CPUFUNC(op_0080_6), 128 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0090_6), 144 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0098_6), 152 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_00a0_6), 160 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_00a8_6), 168 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_00b0_6), 176 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_00b8_6), 184 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_00b9_6), 185 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_0100_6), 256 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0108_6), 264 }, /* MVPMR */ +{ (cpuop_func*)CPUFUNC(op_0110_6), 272 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0118_6), 280 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0120_6), 288 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0128_6), 296 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0130_6), 304 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0138_6), 312 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0139_6), 313 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_013a_6), 314 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_013b_6), 315 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_013c_6), 316 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0140_6), 320 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0148_6), 328 }, /* MVPMR */ +{ (cpuop_func*)CPUFUNC(op_0150_6), 336 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0158_6), 344 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0160_6), 352 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0168_6), 360 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0170_6), 368 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0178_6), 376 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0179_6), 377 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_017a_6), 378 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_017b_6), 379 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0180_6), 384 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_0188_6), 392 }, /* MVPRM */ +{ (cpuop_func*)CPUFUNC(op_0190_6), 400 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_0198_6), 408 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01a0_6), 416 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01a8_6), 424 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01b0_6), 432 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01b8_6), 440 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01b9_6), 441 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01ba_6), 442 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01bb_6), 443 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_01c0_6), 448 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01c8_6), 456 }, /* MVPRM */ +{ (cpuop_func*)CPUFUNC(op_01d0_6), 464 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01d8_6), 472 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01e0_6), 480 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01e8_6), 488 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01f0_6), 496 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01f8_6), 504 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01f9_6), 505 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01fa_6), 506 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_01fb_6), 507 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_0200_6), 512 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0210_6), 528 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0218_6), 536 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0220_6), 544 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0228_6), 552 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0230_6), 560 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0238_6), 568 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0239_6), 569 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_023c_6), 572 }, /* ANDSR */ +{ (cpuop_func*)CPUFUNC(op_0240_6), 576 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0250_6), 592 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0258_6), 600 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0260_6), 608 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0268_6), 616 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0270_6), 624 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0278_6), 632 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0279_6), 633 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_027c_6), 636 }, /* ANDSR */ +{ (cpuop_func*)CPUFUNC(op_0280_6), 640 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0290_6), 656 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0298_6), 664 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_02a0_6), 672 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_02a8_6), 680 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_02b0_6), 688 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_02b8_6), 696 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_02b9_6), 697 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_0400_6), 1024 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0410_6), 1040 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0418_6), 1048 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0420_6), 1056 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0428_6), 1064 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0430_6), 1072 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0438_6), 1080 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0439_6), 1081 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0440_6), 1088 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0450_6), 1104 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0458_6), 1112 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0460_6), 1120 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0468_6), 1128 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0470_6), 1136 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0478_6), 1144 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0479_6), 1145 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0480_6), 1152 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0490_6), 1168 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0498_6), 1176 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_04a0_6), 1184 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_04a8_6), 1192 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_04b0_6), 1200 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_04b8_6), 1208 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_04b9_6), 1209 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_0600_6), 1536 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0610_6), 1552 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0618_6), 1560 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0620_6), 1568 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0628_6), 1576 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0630_6), 1584 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0638_6), 1592 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0639_6), 1593 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0640_6), 1600 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0650_6), 1616 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0658_6), 1624 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0660_6), 1632 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0668_6), 1640 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0670_6), 1648 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0678_6), 1656 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0679_6), 1657 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0680_6), 1664 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0690_6), 1680 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0698_6), 1688 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_06a0_6), 1696 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_06a8_6), 1704 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_06b0_6), 1712 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_06b8_6), 1720 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_06b9_6), 1721 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_0800_6), 2048 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0810_6), 2064 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0818_6), 2072 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0820_6), 2080 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0828_6), 2088 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0830_6), 2096 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0838_6), 2104 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0839_6), 2105 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_083a_6), 2106 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_083b_6), 2107 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_083c_6), 2108 }, /* BTST */ +{ (cpuop_func*)CPUFUNC(op_0840_6), 2112 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0850_6), 2128 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0858_6), 2136 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0860_6), 2144 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0868_6), 2152 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0870_6), 2160 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0878_6), 2168 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0879_6), 2169 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_087a_6), 2170 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_087b_6), 2171 }, /* BCHG */ +{ (cpuop_func*)CPUFUNC(op_0880_6), 2176 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_0890_6), 2192 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_0898_6), 2200 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08a0_6), 2208 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08a8_6), 2216 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08b0_6), 2224 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08b8_6), 2232 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08b9_6), 2233 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08ba_6), 2234 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08bb_6), 2235 }, /* BCLR */ +{ (cpuop_func*)CPUFUNC(op_08c0_6), 2240 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08d0_6), 2256 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08d8_6), 2264 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08e0_6), 2272 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08e8_6), 2280 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08f0_6), 2288 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08f8_6), 2296 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08f9_6), 2297 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08fa_6), 2298 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_08fb_6), 2299 }, /* BSET */ +{ (cpuop_func*)CPUFUNC(op_0a00_6), 2560 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a10_6), 2576 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a18_6), 2584 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a20_6), 2592 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a28_6), 2600 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a30_6), 2608 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a38_6), 2616 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a39_6), 2617 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a3c_6), 2620 }, /* EORSR */ +{ (cpuop_func*)CPUFUNC(op_0a40_6), 2624 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a50_6), 2640 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a58_6), 2648 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a60_6), 2656 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a68_6), 2664 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a70_6), 2672 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a78_6), 2680 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a79_6), 2681 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a7c_6), 2684 }, /* EORSR */ +{ (cpuop_func*)CPUFUNC(op_0a80_6), 2688 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a90_6), 2704 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0a98_6), 2712 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0aa0_6), 2720 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0aa8_6), 2728 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0ab0_6), 2736 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0ab8_6), 2744 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0ab9_6), 2745 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_0c00_6), 3072 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c10_6), 3088 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c18_6), 3096 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c20_6), 3104 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c28_6), 3112 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c30_6), 3120 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c38_6), 3128 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c39_6), 3129 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c40_6), 3136 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c50_6), 3152 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c58_6), 3160 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c60_6), 3168 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c68_6), 3176 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c70_6), 3184 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c78_6), 3192 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c79_6), 3193 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c80_6), 3200 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c90_6), 3216 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0c98_6), 3224 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0ca0_6), 3232 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0ca8_6), 3240 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0cb0_6), 3248 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0cb8_6), 3256 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_0cb9_6), 3257 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_1000_6), 4096 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1010_6), 4112 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1018_6), 4120 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1020_6), 4128 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1028_6), 4136 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1030_6), 4144 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1038_6), 4152 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1039_6), 4153 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_103a_6), 4154 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_103b_6), 4155 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_103c_6), 4156 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1080_6), 4224 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1090_6), 4240 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1098_6), 4248 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10a0_6), 4256 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10a8_6), 4264 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10b0_6), 4272 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10b8_6), 4280 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10b9_6), 4281 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10ba_6), 4282 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10bb_6), 4283 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10bc_6), 4284 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10c0_6), 4288 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10d0_6), 4304 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10d8_6), 4312 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10e0_6), 4320 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10e8_6), 4328 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10f0_6), 4336 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10f8_6), 4344 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10f9_6), 4345 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10fa_6), 4346 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10fb_6), 4347 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_10fc_6), 4348 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1100_6), 4352 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1110_6), 4368 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1118_6), 4376 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1120_6), 4384 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1128_6), 4392 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1130_6), 4400 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1138_6), 4408 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1139_6), 4409 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_113a_6), 4410 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_113b_6), 4411 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_113c_6), 4412 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1140_6), 4416 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1150_6), 4432 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1158_6), 4440 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1160_6), 4448 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1168_6), 4456 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1170_6), 4464 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1178_6), 4472 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1179_6), 4473 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_117a_6), 4474 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_117b_6), 4475 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_117c_6), 4476 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1180_6), 4480 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1190_6), 4496 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_1198_6), 4504 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11a0_6), 4512 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11a8_6), 4520 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11b0_6), 4528 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11b8_6), 4536 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11b9_6), 4537 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11ba_6), 4538 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11bb_6), 4539 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11bc_6), 4540 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11c0_6), 4544 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11d0_6), 4560 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11d8_6), 4568 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11e0_6), 4576 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11e8_6), 4584 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11f0_6), 4592 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11f8_6), 4600 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11f9_6), 4601 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11fa_6), 4602 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11fb_6), 4603 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_11fc_6), 4604 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13c0_6), 5056 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13d0_6), 5072 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13d8_6), 5080 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13e0_6), 5088 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13e8_6), 5096 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13f0_6), 5104 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13f8_6), 5112 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13f9_6), 5113 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13fa_6), 5114 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13fb_6), 5115 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_13fc_6), 5116 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2000_6), 8192 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2008_6), 8200 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2010_6), 8208 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2018_6), 8216 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2020_6), 8224 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2028_6), 8232 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2030_6), 8240 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2038_6), 8248 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2039_6), 8249 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_203a_6), 8250 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_203b_6), 8251 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_203c_6), 8252 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2040_6), 8256 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2048_6), 8264 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2050_6), 8272 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2058_6), 8280 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2060_6), 8288 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2068_6), 8296 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2070_6), 8304 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2078_6), 8312 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2079_6), 8313 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_207a_6), 8314 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_207b_6), 8315 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_207c_6), 8316 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_2080_6), 8320 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2088_6), 8328 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2090_6), 8336 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2098_6), 8344 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20a0_6), 8352 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20a8_6), 8360 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20b0_6), 8368 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20b8_6), 8376 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20b9_6), 8377 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20ba_6), 8378 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20bb_6), 8379 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20bc_6), 8380 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20c0_6), 8384 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20c8_6), 8392 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20d0_6), 8400 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20d8_6), 8408 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20e0_6), 8416 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20e8_6), 8424 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20f0_6), 8432 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20f8_6), 8440 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20f9_6), 8441 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20fa_6), 8442 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20fb_6), 8443 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_20fc_6), 8444 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2100_6), 8448 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2108_6), 8456 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2110_6), 8464 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2118_6), 8472 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2120_6), 8480 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2128_6), 8488 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2130_6), 8496 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2138_6), 8504 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2139_6), 8505 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_213a_6), 8506 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_213b_6), 8507 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_213c_6), 8508 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2140_6), 8512 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2148_6), 8520 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2150_6), 8528 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2158_6), 8536 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2160_6), 8544 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2168_6), 8552 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2170_6), 8560 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2178_6), 8568 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2179_6), 8569 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_217a_6), 8570 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_217b_6), 8571 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_217c_6), 8572 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2180_6), 8576 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2188_6), 8584 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2190_6), 8592 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_2198_6), 8600 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21a0_6), 8608 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21a8_6), 8616 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21b0_6), 8624 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21b8_6), 8632 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21b9_6), 8633 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21ba_6), 8634 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21bb_6), 8635 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21bc_6), 8636 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21c0_6), 8640 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21c8_6), 8648 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21d0_6), 8656 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21d8_6), 8664 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21e0_6), 8672 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21e8_6), 8680 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21f0_6), 8688 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21f8_6), 8696 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21f9_6), 8697 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21fa_6), 8698 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21fb_6), 8699 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_21fc_6), 8700 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23c0_6), 9152 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23c8_6), 9160 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23d0_6), 9168 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23d8_6), 9176 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23e0_6), 9184 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23e8_6), 9192 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23f0_6), 9200 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23f8_6), 9208 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23f9_6), 9209 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23fa_6), 9210 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23fb_6), 9211 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_23fc_6), 9212 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3000_6), 12288 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3008_6), 12296 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3010_6), 12304 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3018_6), 12312 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3020_6), 12320 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3028_6), 12328 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3030_6), 12336 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3038_6), 12344 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3039_6), 12345 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_303a_6), 12346 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_303b_6), 12347 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_303c_6), 12348 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3040_6), 12352 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3048_6), 12360 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3050_6), 12368 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3058_6), 12376 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3060_6), 12384 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3068_6), 12392 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3070_6), 12400 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3078_6), 12408 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3079_6), 12409 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_307a_6), 12410 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_307b_6), 12411 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_307c_6), 12412 }, /* MOVEA */ +{ (cpuop_func*)CPUFUNC(op_3080_6), 12416 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3088_6), 12424 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3090_6), 12432 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3098_6), 12440 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30a0_6), 12448 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30a8_6), 12456 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30b0_6), 12464 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30b8_6), 12472 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30b9_6), 12473 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30ba_6), 12474 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30bb_6), 12475 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30bc_6), 12476 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30c0_6), 12480 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30c8_6), 12488 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30d0_6), 12496 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30d8_6), 12504 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30e0_6), 12512 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30e8_6), 12520 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30f0_6), 12528 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30f8_6), 12536 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30f9_6), 12537 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30fa_6), 12538 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30fb_6), 12539 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_30fc_6), 12540 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3100_6), 12544 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3108_6), 12552 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3110_6), 12560 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3118_6), 12568 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3120_6), 12576 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3128_6), 12584 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3130_6), 12592 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3138_6), 12600 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3139_6), 12601 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_313a_6), 12602 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_313b_6), 12603 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_313c_6), 12604 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3140_6), 12608 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3148_6), 12616 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3150_6), 12624 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3158_6), 12632 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3160_6), 12640 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3168_6), 12648 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3170_6), 12656 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3178_6), 12664 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3179_6), 12665 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_317a_6), 12666 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_317b_6), 12667 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_317c_6), 12668 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3180_6), 12672 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3188_6), 12680 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3190_6), 12688 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_3198_6), 12696 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31a0_6), 12704 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31a8_6), 12712 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31b0_6), 12720 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31b8_6), 12728 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31b9_6), 12729 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31ba_6), 12730 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31bb_6), 12731 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31bc_6), 12732 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31c0_6), 12736 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31c8_6), 12744 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31d0_6), 12752 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31d8_6), 12760 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31e0_6), 12768 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31e8_6), 12776 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31f0_6), 12784 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31f8_6), 12792 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31f9_6), 12793 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31fa_6), 12794 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31fb_6), 12795 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_31fc_6), 12796 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33c0_6), 13248 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33c8_6), 13256 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33d0_6), 13264 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33d8_6), 13272 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33e0_6), 13280 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33e8_6), 13288 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33f0_6), 13296 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33f8_6), 13304 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33f9_6), 13305 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33fa_6), 13306 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33fb_6), 13307 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_33fc_6), 13308 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_4000_6), 16384 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4010_6), 16400 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4018_6), 16408 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4020_6), 16416 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4028_6), 16424 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4030_6), 16432 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4038_6), 16440 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4039_6), 16441 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4040_6), 16448 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4050_6), 16464 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4058_6), 16472 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4060_6), 16480 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4068_6), 16488 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4070_6), 16496 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4078_6), 16504 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4079_6), 16505 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4080_6), 16512 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4090_6), 16528 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_4098_6), 16536 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40a0_6), 16544 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40a8_6), 16552 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40b0_6), 16560 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40b8_6), 16568 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40b9_6), 16569 }, /* NEGX */ +{ (cpuop_func*)CPUFUNC(op_40c0_6), 16576 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40d0_6), 16592 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40d8_6), 16600 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40e0_6), 16608 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40e8_6), 16616 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40f0_6), 16624 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40f8_6), 16632 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_40f9_6), 16633 }, /* MVSR2 */ +{ (cpuop_func*)CPUFUNC(op_4100_6), 16640 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4110_6), 16656 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4118_6), 16664 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4120_6), 16672 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4128_6), 16680 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4130_6), 16688 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4138_6), 16696 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4139_6), 16697 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_413a_6), 16698 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_413b_6), 16699 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_413c_6), 16700 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4180_6), 16768 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4190_6), 16784 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_4198_6), 16792 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41a0_6), 16800 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41a8_6), 16808 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41b0_6), 16816 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41b8_6), 16824 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41b9_6), 16825 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41ba_6), 16826 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41bb_6), 16827 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41bc_6), 16828 }, /* CHK */ +{ (cpuop_func*)CPUFUNC(op_41d0_6), 16848 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41e8_6), 16872 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41f0_6), 16880 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41f8_6), 16888 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41f9_6), 16889 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41fa_6), 16890 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_41fb_6), 16891 }, /* LEA */ +{ (cpuop_func*)CPUFUNC(op_4200_6), 16896 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4210_6), 16912 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4218_6), 16920 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4220_6), 16928 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4228_6), 16936 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4230_6), 16944 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4238_6), 16952 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4239_6), 16953 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4240_6), 16960 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4250_6), 16976 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4258_6), 16984 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4260_6), 16992 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4268_6), 17000 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4270_6), 17008 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4278_6), 17016 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4279_6), 17017 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4280_6), 17024 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4290_6), 17040 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4298_6), 17048 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_42a0_6), 17056 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_42a8_6), 17064 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_42b0_6), 17072 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_42b8_6), 17080 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_42b9_6), 17081 }, /* CLR */ +{ (cpuop_func*)CPUFUNC(op_4400_6), 17408 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4410_6), 17424 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4418_6), 17432 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4420_6), 17440 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4428_6), 17448 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4430_6), 17456 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4438_6), 17464 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4439_6), 17465 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4440_6), 17472 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4450_6), 17488 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4458_6), 17496 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4460_6), 17504 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4468_6), 17512 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4470_6), 17520 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4478_6), 17528 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4479_6), 17529 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4480_6), 17536 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4490_6), 17552 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_4498_6), 17560 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44a0_6), 17568 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44a8_6), 17576 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44b0_6), 17584 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44b8_6), 17592 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44b9_6), 17593 }, /* NEG */ +{ (cpuop_func*)CPUFUNC(op_44c0_6), 17600 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44d0_6), 17616 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44d8_6), 17624 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44e0_6), 17632 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44e8_6), 17640 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44f0_6), 17648 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44f8_6), 17656 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44f9_6), 17657 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44fa_6), 17658 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44fb_6), 17659 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_44fc_6), 17660 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_4600_6), 17920 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4610_6), 17936 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4618_6), 17944 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4620_6), 17952 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4628_6), 17960 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4630_6), 17968 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4638_6), 17976 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4639_6), 17977 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4640_6), 17984 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4650_6), 18000 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4658_6), 18008 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4660_6), 18016 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4668_6), 18024 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4670_6), 18032 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4678_6), 18040 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4679_6), 18041 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4680_6), 18048 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4690_6), 18064 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_4698_6), 18072 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46a0_6), 18080 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46a8_6), 18088 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46b0_6), 18096 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46b8_6), 18104 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46b9_6), 18105 }, /* NOT */ +{ (cpuop_func*)CPUFUNC(op_46c0_6), 18112 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46d0_6), 18128 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46d8_6), 18136 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46e0_6), 18144 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46e8_6), 18152 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46f0_6), 18160 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46f8_6), 18168 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46f9_6), 18169 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46fa_6), 18170 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46fb_6), 18171 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_46fc_6), 18172 }, /* MV2SR */ +{ (cpuop_func*)CPUFUNC(op_4800_6), 18432 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4810_6), 18448 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4818_6), 18456 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4820_6), 18464 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4828_6), 18472 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4830_6), 18480 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4838_6), 18488 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4839_6), 18489 }, /* NBCD */ +{ (cpuop_func*)CPUFUNC(op_4840_6), 18496 }, /* SWAP */ +{ (cpuop_func*)CPUFUNC(op_4850_6), 18512 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_4868_6), 18536 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_4870_6), 18544 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_4878_6), 18552 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_4879_6), 18553 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_487a_6), 18554 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_487b_6), 18555 }, /* PEA */ +{ (cpuop_func*)CPUFUNC(op_4880_6), 18560 }, /* EXT */ +{ (cpuop_func*)CPUFUNC(op_4890_6), 18576 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48a0_6), 18592 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48a8_6), 18600 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48b0_6), 18608 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48b8_6), 18616 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48b9_6), 18617 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48c0_6), 18624 }, /* EXT */ +{ (cpuop_func*)CPUFUNC(op_48d0_6), 18640 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48e0_6), 18656 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48e8_6), 18664 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48f0_6), 18672 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48f8_6), 18680 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_48f9_6), 18681 }, /* MVMLE */ +{ (cpuop_func*)CPUFUNC(op_49c0_6), 18880 }, /* EXT */ +{ (cpuop_func*)CPUFUNC(op_4a00_6), 18944 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a10_6), 18960 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a18_6), 18968 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a20_6), 18976 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a28_6), 18984 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a30_6), 18992 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a38_6), 19000 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a39_6), 19001 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a40_6), 19008 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a50_6), 19024 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a58_6), 19032 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a60_6), 19040 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a68_6), 19048 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a70_6), 19056 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a78_6), 19064 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a79_6), 19065 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a80_6), 19072 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a90_6), 19088 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4a98_6), 19096 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4aa0_6), 19104 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4aa8_6), 19112 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4ab0_6), 19120 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4ab8_6), 19128 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4ab9_6), 19129 }, /* TST */ +{ (cpuop_func*)CPUFUNC(op_4ac0_6), 19136 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4ad0_6), 19152 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4ad8_6), 19160 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4ae0_6), 19168 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4ae8_6), 19176 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4af0_6), 19184 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4af8_6), 19192 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4af9_6), 19193 }, /* TAS */ +{ (cpuop_func*)CPUFUNC(op_4c90_6), 19600 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4c98_6), 19608 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4ca8_6), 19624 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cb0_6), 19632 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cb8_6), 19640 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cb9_6), 19641 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cba_6), 19642 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cbb_6), 19643 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cd0_6), 19664 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cd8_6), 19672 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4ce8_6), 19688 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cf0_6), 19696 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cf8_6), 19704 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cf9_6), 19705 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cfa_6), 19706 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4cfb_6), 19707 }, /* MVMEL */ +{ (cpuop_func*)CPUFUNC(op_4e40_6), 20032 }, /* TRAP */ +{ (cpuop_func*)CPUFUNC(op_4e50_6), 20048 }, /* LINK */ +{ (cpuop_func*)CPUFUNC(op_4e58_6), 20056 }, /* UNLK */ +{ (cpuop_func*)CPUFUNC(op_4e60_6), 20064 }, /* MVR2USP */ +{ (cpuop_func*)CPUFUNC(op_4e68_6), 20072 }, /* MVUSP2R */ +{ (cpuop_func*)CPUFUNC(op_4e70_6), 20080 }, /* RESET */ +{ (cpuop_func*)CPUFUNC(op_4e71_6), 20081 }, /* NOP */ +{ (cpuop_func*)CPUFUNC(op_4e72_6), 20082 }, /* STOP */ +{ (cpuop_func*)CPUFUNC(op_4e73_6), 20083 }, /* RTE */ +{ (cpuop_func*)CPUFUNC(op_4e74_6), 20084 }, /* RTD */ +{ (cpuop_func*)CPUFUNC(op_4e75_6), 20085 }, /* RTS */ +{ (cpuop_func*)CPUFUNC(op_4e76_6), 20086 }, /* TRAPV */ +{ (cpuop_func*)CPUFUNC(op_4e77_6), 20087 }, /* RTR */ +{ (cpuop_func*)CPUFUNC(op_4e90_6), 20112 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4ea8_6), 20136 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4eb0_6), 20144 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4eb8_6), 20152 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4eb9_6), 20153 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4eba_6), 20154 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4ebb_6), 20155 }, /* JSR */ +{ (cpuop_func*)CPUFUNC(op_4ed0_6), 20176 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4ee8_6), 20200 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4ef0_6), 20208 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4ef8_6), 20216 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4ef9_6), 20217 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4efa_6), 20218 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_4efb_6), 20219 }, /* JMP */ +{ (cpuop_func*)CPUFUNC(op_5000_6), 20480 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5010_6), 20496 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5018_6), 20504 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5020_6), 20512 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5028_6), 20520 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5030_6), 20528 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5038_6), 20536 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5039_6), 20537 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5040_6), 20544 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5048_6), 20552 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_5050_6), 20560 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5058_6), 20568 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5060_6), 20576 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5068_6), 20584 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5070_6), 20592 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5078_6), 20600 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5079_6), 20601 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5080_6), 20608 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5088_6), 20616 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_5090_6), 20624 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_5098_6), 20632 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50a0_6), 20640 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50a8_6), 20648 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50b0_6), 20656 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50b8_6), 20664 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50b9_6), 20665 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_50c0_6), 20672 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50c8_6), 20680 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_50d0_6), 20688 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50d8_6), 20696 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50e0_6), 20704 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50e8_6), 20712 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50f0_6), 20720 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50f8_6), 20728 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_50f9_6), 20729 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5100_6), 20736 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5110_6), 20752 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5118_6), 20760 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5120_6), 20768 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5128_6), 20776 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5130_6), 20784 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5138_6), 20792 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5139_6), 20793 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5140_6), 20800 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5148_6), 20808 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_5150_6), 20816 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5158_6), 20824 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5160_6), 20832 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5168_6), 20840 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5170_6), 20848 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5178_6), 20856 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5179_6), 20857 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5180_6), 20864 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5188_6), 20872 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_5190_6), 20880 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_5198_6), 20888 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51a0_6), 20896 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51a8_6), 20904 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51b0_6), 20912 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51b8_6), 20920 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51b9_6), 20921 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_51c0_6), 20928 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51c8_6), 20936 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_51d0_6), 20944 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51d8_6), 20952 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51e0_6), 20960 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51e8_6), 20968 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51f0_6), 20976 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51f8_6), 20984 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_51f9_6), 20985 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52c0_6), 21184 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52c8_6), 21192 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_52d0_6), 21200 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52d8_6), 21208 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52e0_6), 21216 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52e8_6), 21224 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52f0_6), 21232 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52f8_6), 21240 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_52f9_6), 21241 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53c0_6), 21440 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53c8_6), 21448 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_53d0_6), 21456 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53d8_6), 21464 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53e0_6), 21472 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53e8_6), 21480 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53f0_6), 21488 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53f8_6), 21496 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_53f9_6), 21497 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54c0_6), 21696 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54c8_6), 21704 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_54d0_6), 21712 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54d8_6), 21720 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54e0_6), 21728 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54e8_6), 21736 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54f0_6), 21744 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54f8_6), 21752 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_54f9_6), 21753 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55c0_6), 21952 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55c8_6), 21960 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_55d0_6), 21968 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55d8_6), 21976 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55e0_6), 21984 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55e8_6), 21992 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55f0_6), 22000 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55f8_6), 22008 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_55f9_6), 22009 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56c0_6), 22208 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56c8_6), 22216 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_56d0_6), 22224 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56d8_6), 22232 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56e0_6), 22240 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56e8_6), 22248 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56f0_6), 22256 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56f8_6), 22264 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_56f9_6), 22265 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57c0_6), 22464 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57c8_6), 22472 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_57d0_6), 22480 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57d8_6), 22488 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57e0_6), 22496 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57e8_6), 22504 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57f0_6), 22512 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57f8_6), 22520 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_57f9_6), 22521 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58c0_6), 22720 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58c8_6), 22728 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_58d0_6), 22736 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58d8_6), 22744 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58e0_6), 22752 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58e8_6), 22760 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58f0_6), 22768 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58f8_6), 22776 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_58f9_6), 22777 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59c0_6), 22976 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59c8_6), 22984 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_59d0_6), 22992 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59d8_6), 23000 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59e0_6), 23008 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59e8_6), 23016 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59f0_6), 23024 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59f8_6), 23032 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_59f9_6), 23033 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ac0_6), 23232 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ac8_6), 23240 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5ad0_6), 23248 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ad8_6), 23256 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ae0_6), 23264 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ae8_6), 23272 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5af0_6), 23280 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5af8_6), 23288 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5af9_6), 23289 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bc0_6), 23488 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bc8_6), 23496 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5bd0_6), 23504 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bd8_6), 23512 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5be0_6), 23520 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5be8_6), 23528 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bf0_6), 23536 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bf8_6), 23544 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5bf9_6), 23545 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cc0_6), 23744 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cc8_6), 23752 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5cd0_6), 23760 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cd8_6), 23768 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ce0_6), 23776 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ce8_6), 23784 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cf0_6), 23792 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cf8_6), 23800 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5cf9_6), 23801 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5dc0_6), 24000 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5dc8_6), 24008 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5dd0_6), 24016 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5dd8_6), 24024 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5de0_6), 24032 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5de8_6), 24040 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5df0_6), 24048 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5df8_6), 24056 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5df9_6), 24057 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ec0_6), 24256 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ec8_6), 24264 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5ed0_6), 24272 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ed8_6), 24280 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ee0_6), 24288 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ee8_6), 24296 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ef0_6), 24304 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ef8_6), 24312 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ef9_6), 24313 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5fc0_6), 24512 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5fc8_6), 24520 }, /* DBcc */ +{ (cpuop_func*)CPUFUNC(op_5fd0_6), 24528 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5fd8_6), 24536 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5fe0_6), 24544 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5fe8_6), 24552 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ff0_6), 24560 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ff8_6), 24568 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_5ff9_6), 24569 }, /* Scc */ +{ (cpuop_func*)CPUFUNC(op_6000_6), 24576 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6001_6), 24577 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_60ff_6), 24831 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6100_6), 24832 }, /* BSR */ +{ (cpuop_func*)CPUFUNC(op_6101_6), 24833 }, /* BSR */ +{ (cpuop_func*)CPUFUNC(op_61ff_6), 25087 }, /* BSR */ +{ (cpuop_func*)CPUFUNC(op_6200_6), 25088 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6201_6), 25089 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_62ff_6), 25343 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6300_6), 25344 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6301_6), 25345 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_63ff_6), 25599 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6400_6), 25600 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6401_6), 25601 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_64ff_6), 25855 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6500_6), 25856 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6501_6), 25857 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_65ff_6), 26111 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6600_6), 26112 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6601_6), 26113 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_66ff_6), 26367 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6700_6), 26368 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6701_6), 26369 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_67ff_6), 26623 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6800_6), 26624 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6801_6), 26625 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_68ff_6), 26879 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6900_6), 26880 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6901_6), 26881 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_69ff_6), 27135 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6a00_6), 27136 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6a01_6), 27137 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6aff_6), 27391 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6b00_6), 27392 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6b01_6), 27393 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6bff_6), 27647 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6c00_6), 27648 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6c01_6), 27649 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6cff_6), 27903 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6d00_6), 27904 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6d01_6), 27905 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6dff_6), 28159 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6e00_6), 28160 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6e01_6), 28161 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6eff_6), 28415 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6f00_6), 28416 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6f01_6), 28417 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_6fff_6), 28671 }, /* Bcc */ +{ (cpuop_func*)CPUFUNC(op_7000_6), 28672 }, /* MOVE */ +{ (cpuop_func*)CPUFUNC(op_8000_6), 32768 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8010_6), 32784 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8018_6), 32792 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8020_6), 32800 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8028_6), 32808 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8030_6), 32816 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8038_6), 32824 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8039_6), 32825 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_803a_6), 32826 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_803b_6), 32827 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_803c_6), 32828 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8040_6), 32832 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8050_6), 32848 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8058_6), 32856 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8060_6), 32864 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8068_6), 32872 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8070_6), 32880 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8078_6), 32888 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8079_6), 32889 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_807a_6), 32890 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_807b_6), 32891 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_807c_6), 32892 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8080_6), 32896 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8090_6), 32912 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8098_6), 32920 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80a0_6), 32928 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80a8_6), 32936 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80b0_6), 32944 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80b8_6), 32952 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80b9_6), 32953 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80ba_6), 32954 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80bb_6), 32955 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80bc_6), 32956 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_80c0_6), 32960 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80d0_6), 32976 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80d8_6), 32984 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80e0_6), 32992 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80e8_6), 33000 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80f0_6), 33008 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80f8_6), 33016 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80f9_6), 33017 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80fa_6), 33018 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80fb_6), 33019 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_80fc_6), 33020 }, /* DIVU */ +{ (cpuop_func*)CPUFUNC(op_8100_6), 33024 }, /* SBCD */ +{ (cpuop_func*)CPUFUNC(op_8108_6), 33032 }, /* SBCD */ +{ (cpuop_func*)CPUFUNC(op_8110_6), 33040 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8118_6), 33048 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8120_6), 33056 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8128_6), 33064 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8130_6), 33072 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8138_6), 33080 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8139_6), 33081 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8150_6), 33104 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8158_6), 33112 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8160_6), 33120 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8168_6), 33128 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8170_6), 33136 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8178_6), 33144 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8179_6), 33145 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8190_6), 33168 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_8198_6), 33176 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81a0_6), 33184 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81a8_6), 33192 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81b0_6), 33200 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81b8_6), 33208 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81b9_6), 33209 }, /* OR */ +{ (cpuop_func*)CPUFUNC(op_81c0_6), 33216 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81d0_6), 33232 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81d8_6), 33240 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81e0_6), 33248 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81e8_6), 33256 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81f0_6), 33264 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81f8_6), 33272 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81f9_6), 33273 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81fa_6), 33274 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81fb_6), 33275 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_81fc_6), 33276 }, /* DIVS */ +{ (cpuop_func*)CPUFUNC(op_9000_6), 36864 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9010_6), 36880 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9018_6), 36888 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9020_6), 36896 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9028_6), 36904 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9030_6), 36912 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9038_6), 36920 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9039_6), 36921 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_903a_6), 36922 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_903b_6), 36923 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_903c_6), 36924 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9040_6), 36928 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9048_6), 36936 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9050_6), 36944 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9058_6), 36952 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9060_6), 36960 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9068_6), 36968 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9070_6), 36976 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9078_6), 36984 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9079_6), 36985 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_907a_6), 36986 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_907b_6), 36987 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_907c_6), 36988 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9080_6), 36992 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9088_6), 37000 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9090_6), 37008 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9098_6), 37016 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90a0_6), 37024 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90a8_6), 37032 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90b0_6), 37040 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90b8_6), 37048 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90b9_6), 37049 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90ba_6), 37050 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90bb_6), 37051 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90bc_6), 37052 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_90c0_6), 37056 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90c8_6), 37064 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90d0_6), 37072 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90d8_6), 37080 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90e0_6), 37088 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90e8_6), 37096 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90f0_6), 37104 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90f8_6), 37112 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90f9_6), 37113 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90fa_6), 37114 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90fb_6), 37115 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_90fc_6), 37116 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_9100_6), 37120 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9108_6), 37128 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9110_6), 37136 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9118_6), 37144 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9120_6), 37152 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9128_6), 37160 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9130_6), 37168 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9138_6), 37176 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9139_6), 37177 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9140_6), 37184 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9148_6), 37192 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9150_6), 37200 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9158_6), 37208 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9160_6), 37216 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9168_6), 37224 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9170_6), 37232 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9178_6), 37240 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9179_6), 37241 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9180_6), 37248 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9188_6), 37256 }, /* SUBX */ +{ (cpuop_func*)CPUFUNC(op_9190_6), 37264 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_9198_6), 37272 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91a0_6), 37280 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91a8_6), 37288 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91b0_6), 37296 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91b8_6), 37304 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91b9_6), 37305 }, /* SUB */ +{ (cpuop_func*)CPUFUNC(op_91c0_6), 37312 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91c8_6), 37320 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91d0_6), 37328 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91d8_6), 37336 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91e0_6), 37344 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91e8_6), 37352 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91f0_6), 37360 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91f8_6), 37368 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91f9_6), 37369 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91fa_6), 37370 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91fb_6), 37371 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_91fc_6), 37372 }, /* SUBA */ +{ (cpuop_func*)CPUFUNC(op_b000_6), 45056 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b010_6), 45072 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b018_6), 45080 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b020_6), 45088 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b028_6), 45096 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b030_6), 45104 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b038_6), 45112 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b039_6), 45113 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b03a_6), 45114 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b03b_6), 45115 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b03c_6), 45116 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b040_6), 45120 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b048_6), 45128 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b050_6), 45136 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b058_6), 45144 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b060_6), 45152 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b068_6), 45160 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b070_6), 45168 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b078_6), 45176 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b079_6), 45177 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b07a_6), 45178 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b07b_6), 45179 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b07c_6), 45180 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b080_6), 45184 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b088_6), 45192 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b090_6), 45200 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b098_6), 45208 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0a0_6), 45216 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0a8_6), 45224 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0b0_6), 45232 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0b8_6), 45240 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0b9_6), 45241 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0ba_6), 45242 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0bb_6), 45243 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0bc_6), 45244 }, /* CMP */ +{ (cpuop_func*)CPUFUNC(op_b0c0_6), 45248 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0c8_6), 45256 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0d0_6), 45264 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0d8_6), 45272 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0e0_6), 45280 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0e8_6), 45288 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0f0_6), 45296 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0f8_6), 45304 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0f9_6), 45305 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0fa_6), 45306 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0fb_6), 45307 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b0fc_6), 45308 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b100_6), 45312 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b108_6), 45320 }, /* CMPM */ +{ (cpuop_func*)CPUFUNC(op_b110_6), 45328 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b118_6), 45336 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b120_6), 45344 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b128_6), 45352 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b130_6), 45360 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b138_6), 45368 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b139_6), 45369 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b140_6), 45376 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b148_6), 45384 }, /* CMPM */ +{ (cpuop_func*)CPUFUNC(op_b150_6), 45392 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b158_6), 45400 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b160_6), 45408 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b168_6), 45416 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b170_6), 45424 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b178_6), 45432 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b179_6), 45433 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b180_6), 45440 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b188_6), 45448 }, /* CMPM */ +{ (cpuop_func*)CPUFUNC(op_b190_6), 45456 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b198_6), 45464 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1a0_6), 45472 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1a8_6), 45480 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1b0_6), 45488 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1b8_6), 45496 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1b9_6), 45497 }, /* EOR */ +{ (cpuop_func*)CPUFUNC(op_b1c0_6), 45504 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1c8_6), 45512 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1d0_6), 45520 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1d8_6), 45528 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1e0_6), 45536 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1e8_6), 45544 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1f0_6), 45552 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1f8_6), 45560 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1f9_6), 45561 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1fa_6), 45562 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1fb_6), 45563 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_b1fc_6), 45564 }, /* CMPA */ +{ (cpuop_func*)CPUFUNC(op_c000_6), 49152 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c010_6), 49168 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c018_6), 49176 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c020_6), 49184 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c028_6), 49192 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c030_6), 49200 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c038_6), 49208 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c039_6), 49209 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c03a_6), 49210 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c03b_6), 49211 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c03c_6), 49212 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c040_6), 49216 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c050_6), 49232 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c058_6), 49240 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c060_6), 49248 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c068_6), 49256 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c070_6), 49264 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c078_6), 49272 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c079_6), 49273 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c07a_6), 49274 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c07b_6), 49275 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c07c_6), 49276 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c080_6), 49280 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c090_6), 49296 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c098_6), 49304 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0a0_6), 49312 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0a8_6), 49320 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0b0_6), 49328 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0b8_6), 49336 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0b9_6), 49337 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0ba_6), 49338 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0bb_6), 49339 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0bc_6), 49340 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c0c0_6), 49344 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0d0_6), 49360 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0d8_6), 49368 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0e0_6), 49376 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0e8_6), 49384 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0f0_6), 49392 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0f8_6), 49400 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0f9_6), 49401 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0fa_6), 49402 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0fb_6), 49403 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c0fc_6), 49404 }, /* MULU */ +{ (cpuop_func*)CPUFUNC(op_c100_6), 49408 }, /* ABCD */ +{ (cpuop_func*)CPUFUNC(op_c108_6), 49416 }, /* ABCD */ +{ (cpuop_func*)CPUFUNC(op_c110_6), 49424 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c118_6), 49432 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c120_6), 49440 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c128_6), 49448 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c130_6), 49456 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c138_6), 49464 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c139_6), 49465 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c140_6), 49472 }, /* EXG */ +{ (cpuop_func*)CPUFUNC(op_c148_6), 49480 }, /* EXG */ +{ (cpuop_func*)CPUFUNC(op_c150_6), 49488 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c158_6), 49496 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c160_6), 49504 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c168_6), 49512 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c170_6), 49520 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c178_6), 49528 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c179_6), 49529 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c188_6), 49544 }, /* EXG */ +{ (cpuop_func*)CPUFUNC(op_c190_6), 49552 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c198_6), 49560 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1a0_6), 49568 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1a8_6), 49576 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1b0_6), 49584 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1b8_6), 49592 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1b9_6), 49593 }, /* AND */ +{ (cpuop_func*)CPUFUNC(op_c1c0_6), 49600 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1d0_6), 49616 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1d8_6), 49624 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1e0_6), 49632 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1e8_6), 49640 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1f0_6), 49648 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1f8_6), 49656 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1f9_6), 49657 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1fa_6), 49658 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1fb_6), 49659 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_c1fc_6), 49660 }, /* MULS */ +{ (cpuop_func*)CPUFUNC(op_d000_6), 53248 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d010_6), 53264 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d018_6), 53272 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d020_6), 53280 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d028_6), 53288 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d030_6), 53296 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d038_6), 53304 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d039_6), 53305 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d03a_6), 53306 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d03b_6), 53307 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d03c_6), 53308 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d040_6), 53312 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d048_6), 53320 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d050_6), 53328 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d058_6), 53336 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d060_6), 53344 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d068_6), 53352 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d070_6), 53360 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d078_6), 53368 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d079_6), 53369 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d07a_6), 53370 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d07b_6), 53371 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d07c_6), 53372 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d080_6), 53376 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d088_6), 53384 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d090_6), 53392 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d098_6), 53400 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0a0_6), 53408 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0a8_6), 53416 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0b0_6), 53424 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0b8_6), 53432 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0b9_6), 53433 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0ba_6), 53434 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0bb_6), 53435 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0bc_6), 53436 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d0c0_6), 53440 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0c8_6), 53448 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0d0_6), 53456 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0d8_6), 53464 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0e0_6), 53472 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0e8_6), 53480 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0f0_6), 53488 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0f8_6), 53496 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0f9_6), 53497 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0fa_6), 53498 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0fb_6), 53499 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d0fc_6), 53500 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d100_6), 53504 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d108_6), 53512 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d110_6), 53520 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d118_6), 53528 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d120_6), 53536 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d128_6), 53544 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d130_6), 53552 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d138_6), 53560 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d139_6), 53561 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d140_6), 53568 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d148_6), 53576 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d150_6), 53584 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d158_6), 53592 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d160_6), 53600 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d168_6), 53608 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d170_6), 53616 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d178_6), 53624 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d179_6), 53625 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d180_6), 53632 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d188_6), 53640 }, /* ADDX */ +{ (cpuop_func*)CPUFUNC(op_d190_6), 53648 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d198_6), 53656 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1a0_6), 53664 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1a8_6), 53672 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1b0_6), 53680 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1b8_6), 53688 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1b9_6), 53689 }, /* ADD */ +{ (cpuop_func*)CPUFUNC(op_d1c0_6), 53696 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1c8_6), 53704 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1d0_6), 53712 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1d8_6), 53720 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1e0_6), 53728 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1e8_6), 53736 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1f0_6), 53744 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1f8_6), 53752 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1f9_6), 53753 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1fa_6), 53754 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1fb_6), 53755 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_d1fc_6), 53756 }, /* ADDA */ +{ (cpuop_func*)CPUFUNC(op_e000_6), 57344 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e008_6), 57352 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e010_6), 57360 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e018_6), 57368 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e020_6), 57376 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e028_6), 57384 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e030_6), 57392 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e038_6), 57400 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e040_6), 57408 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e048_6), 57416 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e050_6), 57424 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e058_6), 57432 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e060_6), 57440 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e068_6), 57448 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e070_6), 57456 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e078_6), 57464 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e080_6), 57472 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e088_6), 57480 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e090_6), 57488 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e098_6), 57496 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e0a0_6), 57504 }, /* ASR */ +{ (cpuop_func*)CPUFUNC(op_e0a8_6), 57512 }, /* LSR */ +{ (cpuop_func*)CPUFUNC(op_e0b0_6), 57520 }, /* ROXR */ +{ (cpuop_func*)CPUFUNC(op_e0b8_6), 57528 }, /* ROR */ +{ (cpuop_func*)CPUFUNC(op_e0d0_6), 57552 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0d8_6), 57560 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0e0_6), 57568 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0e8_6), 57576 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0f0_6), 57584 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0f8_6), 57592 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e0f9_6), 57593 }, /* ASRW */ +{ (cpuop_func*)CPUFUNC(op_e100_6), 57600 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e108_6), 57608 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e110_6), 57616 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e118_6), 57624 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e120_6), 57632 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e128_6), 57640 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e130_6), 57648 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e138_6), 57656 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e140_6), 57664 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e148_6), 57672 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e150_6), 57680 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e158_6), 57688 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e160_6), 57696 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e168_6), 57704 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e170_6), 57712 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e178_6), 57720 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e180_6), 57728 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e188_6), 57736 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e190_6), 57744 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e198_6), 57752 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e1a0_6), 57760 }, /* ASL */ +{ (cpuop_func*)CPUFUNC(op_e1a8_6), 57768 }, /* LSL */ +{ (cpuop_func*)CPUFUNC(op_e1b0_6), 57776 }, /* ROXL */ +{ (cpuop_func*)CPUFUNC(op_e1b8_6), 57784 }, /* ROL */ +{ (cpuop_func*)CPUFUNC(op_e1d0_6), 57808 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1d8_6), 57816 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1e0_6), 57824 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1e8_6), 57832 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1f0_6), 57840 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1f8_6), 57848 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e1f9_6), 57849 }, /* ASLW */ +{ (cpuop_func*)CPUFUNC(op_e2d0_6), 58064 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2d8_6), 58072 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2e0_6), 58080 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2e8_6), 58088 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2f0_6), 58096 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2f8_6), 58104 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e2f9_6), 58105 }, /* LSRW */ +{ (cpuop_func*)CPUFUNC(op_e3d0_6), 58320 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3d8_6), 58328 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3e0_6), 58336 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3e8_6), 58344 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3f0_6), 58352 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3f8_6), 58360 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e3f9_6), 58361 }, /* LSLW */ +{ (cpuop_func*)CPUFUNC(op_e4d0_6), 58576 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4d8_6), 58584 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4e0_6), 58592 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4e8_6), 58600 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4f0_6), 58608 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4f8_6), 58616 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e4f9_6), 58617 }, /* ROXRW */ +{ (cpuop_func*)CPUFUNC(op_e5d0_6), 58832 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5d8_6), 58840 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5e0_6), 58848 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5e8_6), 58856 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5f0_6), 58864 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5f8_6), 58872 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e5f9_6), 58873 }, /* ROXLW */ +{ (cpuop_func*)CPUFUNC(op_e6d0_6), 59088 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6d8_6), 59096 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6e0_6), 59104 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6e8_6), 59112 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6f0_6), 59120 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6f8_6), 59128 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e6f9_6), 59129 }, /* RORW */ +{ (cpuop_func*)CPUFUNC(op_e7d0_6), 59344 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7d8_6), 59352 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7e0_6), 59360 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7e8_6), 59368 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7f0_6), 59376 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7f8_6), 59384 }, /* ROLW */ +{ (cpuop_func*)CPUFUNC(op_e7f9_6), 59385 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_6 */ diff --git a/src/cputbl.h b/src/cputbl.h new file mode 100644 index 0000000..10ecc7c --- /dev/null +++ b/src/cputbl.h @@ -0,0 +1,10550 @@ +extern cpuop_func op_0000_0_nf; +extern cpuop_func op_0000_0_ff; +extern cpuop_func op_0010_0_nf; +extern cpuop_func op_0010_0_ff; +extern cpuop_func op_0018_0_nf; +extern cpuop_func op_0018_0_ff; +extern cpuop_func op_0020_0_nf; +extern cpuop_func op_0020_0_ff; +extern cpuop_func op_0028_0_nf; +extern cpuop_func op_0028_0_ff; +extern cpuop_func op_0030_0_nf; +extern cpuop_func op_0030_0_ff; +extern cpuop_func op_0038_0_nf; +extern cpuop_func op_0038_0_ff; +extern cpuop_func op_0039_0_nf; +extern cpuop_func op_0039_0_ff; +extern cpuop_func op_003c_0_nf; +extern cpuop_func op_003c_0_ff; +extern cpuop_func op_0040_0_nf; +extern cpuop_func op_0040_0_ff; +extern cpuop_func op_0050_0_nf; +extern cpuop_func op_0050_0_ff; +extern cpuop_func op_0058_0_nf; +extern cpuop_func op_0058_0_ff; +extern cpuop_func op_0060_0_nf; +extern cpuop_func op_0060_0_ff; +extern cpuop_func op_0068_0_nf; +extern cpuop_func op_0068_0_ff; +extern cpuop_func op_0070_0_nf; +extern cpuop_func op_0070_0_ff; +extern cpuop_func op_0078_0_nf; +extern cpuop_func op_0078_0_ff; +extern cpuop_func op_0079_0_nf; +extern cpuop_func op_0079_0_ff; +extern cpuop_func op_007c_0_nf; +extern cpuop_func op_007c_0_ff; +extern cpuop_func op_0080_0_nf; +extern cpuop_func op_0080_0_ff; +extern cpuop_func op_0090_0_nf; +extern cpuop_func op_0090_0_ff; +extern cpuop_func op_0098_0_nf; +extern cpuop_func op_0098_0_ff; +extern cpuop_func op_00a0_0_nf; +extern cpuop_func op_00a0_0_ff; +extern cpuop_func op_00a8_0_nf; +extern cpuop_func op_00a8_0_ff; +extern cpuop_func op_00b0_0_nf; +extern cpuop_func op_00b0_0_ff; +extern cpuop_func op_00b8_0_nf; +extern cpuop_func op_00b8_0_ff; +extern cpuop_func op_00b9_0_nf; +extern cpuop_func op_00b9_0_ff; +extern cpuop_func op_00d0_0_nf; +extern cpuop_func op_00d0_0_ff; +extern cpuop_func op_00e8_0_nf; +extern cpuop_func op_00e8_0_ff; +extern cpuop_func op_00f0_0_nf; +extern cpuop_func op_00f0_0_ff; +extern cpuop_func op_00f8_0_nf; +extern cpuop_func op_00f8_0_ff; +extern cpuop_func op_00f9_0_nf; +extern cpuop_func op_00f9_0_ff; +extern cpuop_func op_00fa_0_nf; +extern cpuop_func op_00fa_0_ff; +extern cpuop_func op_00fb_0_nf; +extern cpuop_func op_00fb_0_ff; +extern cpuop_func op_0100_0_nf; +extern cpuop_func op_0100_0_ff; +extern cpuop_func op_0108_0_nf; +extern cpuop_func op_0108_0_ff; +extern cpuop_func op_0110_0_nf; +extern cpuop_func op_0110_0_ff; +extern cpuop_func op_0118_0_nf; +extern cpuop_func op_0118_0_ff; +extern cpuop_func op_0120_0_nf; +extern cpuop_func op_0120_0_ff; +extern cpuop_func op_0128_0_nf; +extern cpuop_func op_0128_0_ff; +extern cpuop_func op_0130_0_nf; +extern cpuop_func op_0130_0_ff; +extern cpuop_func op_0138_0_nf; +extern cpuop_func op_0138_0_ff; +extern cpuop_func op_0139_0_nf; +extern cpuop_func op_0139_0_ff; +extern cpuop_func op_013a_0_nf; +extern cpuop_func op_013a_0_ff; +extern cpuop_func op_013b_0_nf; +extern cpuop_func op_013b_0_ff; +extern cpuop_func op_013c_0_nf; +extern cpuop_func op_013c_0_ff; +extern cpuop_func op_0140_0_nf; +extern cpuop_func op_0140_0_ff; +extern cpuop_func op_0148_0_nf; +extern cpuop_func op_0148_0_ff; +extern cpuop_func op_0150_0_nf; +extern cpuop_func op_0150_0_ff; +extern cpuop_func op_0158_0_nf; +extern cpuop_func op_0158_0_ff; +extern cpuop_func op_0160_0_nf; +extern cpuop_func op_0160_0_ff; +extern cpuop_func op_0168_0_nf; +extern cpuop_func op_0168_0_ff; +extern cpuop_func op_0170_0_nf; +extern cpuop_func op_0170_0_ff; +extern cpuop_func op_0178_0_nf; +extern cpuop_func op_0178_0_ff; +extern cpuop_func op_0179_0_nf; +extern cpuop_func op_0179_0_ff; +extern cpuop_func op_017a_0_nf; +extern cpuop_func op_017a_0_ff; +extern cpuop_func op_017b_0_nf; +extern cpuop_func op_017b_0_ff; +extern cpuop_func op_0180_0_nf; +extern cpuop_func op_0180_0_ff; +extern cpuop_func op_0188_0_nf; +extern cpuop_func op_0188_0_ff; +extern cpuop_func op_0190_0_nf; +extern cpuop_func op_0190_0_ff; +extern cpuop_func op_0198_0_nf; +extern cpuop_func op_0198_0_ff; +extern cpuop_func op_01a0_0_nf; +extern cpuop_func op_01a0_0_ff; +extern cpuop_func op_01a8_0_nf; +extern cpuop_func op_01a8_0_ff; +extern cpuop_func op_01b0_0_nf; +extern cpuop_func op_01b0_0_ff; +extern cpuop_func op_01b8_0_nf; +extern cpuop_func op_01b8_0_ff; +extern cpuop_func op_01b9_0_nf; +extern cpuop_func op_01b9_0_ff; +extern cpuop_func op_01ba_0_nf; +extern cpuop_func op_01ba_0_ff; +extern cpuop_func op_01bb_0_nf; +extern cpuop_func op_01bb_0_ff; +extern cpuop_func op_01c0_0_nf; +extern cpuop_func op_01c0_0_ff; +extern cpuop_func op_01c8_0_nf; +extern cpuop_func op_01c8_0_ff; +extern cpuop_func op_01d0_0_nf; +extern cpuop_func op_01d0_0_ff; +extern cpuop_func op_01d8_0_nf; +extern cpuop_func op_01d8_0_ff; +extern cpuop_func op_01e0_0_nf; +extern cpuop_func op_01e0_0_ff; +extern cpuop_func op_01e8_0_nf; +extern cpuop_func op_01e8_0_ff; +extern cpuop_func op_01f0_0_nf; +extern cpuop_func op_01f0_0_ff; +extern cpuop_func op_01f8_0_nf; +extern cpuop_func op_01f8_0_ff; +extern cpuop_func op_01f9_0_nf; +extern cpuop_func op_01f9_0_ff; +extern cpuop_func op_01fa_0_nf; +extern cpuop_func op_01fa_0_ff; +extern cpuop_func op_01fb_0_nf; +extern cpuop_func op_01fb_0_ff; +extern cpuop_func op_0200_0_nf; +extern cpuop_func op_0200_0_ff; +extern cpuop_func op_0210_0_nf; +extern cpuop_func op_0210_0_ff; +extern cpuop_func op_0218_0_nf; +extern cpuop_func op_0218_0_ff; +extern cpuop_func op_0220_0_nf; +extern cpuop_func op_0220_0_ff; +extern cpuop_func op_0228_0_nf; +extern cpuop_func op_0228_0_ff; +extern cpuop_func op_0230_0_nf; +extern cpuop_func op_0230_0_ff; +extern cpuop_func op_0238_0_nf; +extern cpuop_func op_0238_0_ff; +extern cpuop_func op_0239_0_nf; +extern cpuop_func op_0239_0_ff; +extern cpuop_func op_023c_0_nf; +extern cpuop_func op_023c_0_ff; +extern cpuop_func op_0240_0_nf; +extern cpuop_func op_0240_0_ff; +extern cpuop_func op_0250_0_nf; +extern cpuop_func op_0250_0_ff; +extern cpuop_func op_0258_0_nf; +extern cpuop_func op_0258_0_ff; +extern cpuop_func op_0260_0_nf; +extern cpuop_func op_0260_0_ff; +extern cpuop_func op_0268_0_nf; +extern cpuop_func op_0268_0_ff; +extern cpuop_func op_0270_0_nf; +extern cpuop_func op_0270_0_ff; +extern cpuop_func op_0278_0_nf; +extern cpuop_func op_0278_0_ff; +extern cpuop_func op_0279_0_nf; +extern cpuop_func op_0279_0_ff; +extern cpuop_func op_027c_0_nf; +extern cpuop_func op_027c_0_ff; +extern cpuop_func op_0280_0_nf; +extern cpuop_func op_0280_0_ff; +extern cpuop_func op_0290_0_nf; +extern cpuop_func op_0290_0_ff; +extern cpuop_func op_0298_0_nf; +extern cpuop_func op_0298_0_ff; +extern cpuop_func op_02a0_0_nf; +extern cpuop_func op_02a0_0_ff; +extern cpuop_func op_02a8_0_nf; +extern cpuop_func op_02a8_0_ff; +extern cpuop_func op_02b0_0_nf; +extern cpuop_func op_02b0_0_ff; +extern cpuop_func op_02b8_0_nf; +extern cpuop_func op_02b8_0_ff; +extern cpuop_func op_02b9_0_nf; +extern cpuop_func op_02b9_0_ff; +extern cpuop_func op_02d0_0_nf; +extern cpuop_func op_02d0_0_ff; +extern cpuop_func op_02e8_0_nf; +extern cpuop_func op_02e8_0_ff; +extern cpuop_func op_02f0_0_nf; +extern cpuop_func op_02f0_0_ff; +extern cpuop_func op_02f8_0_nf; +extern cpuop_func op_02f8_0_ff; +extern cpuop_func op_02f9_0_nf; +extern cpuop_func op_02f9_0_ff; +extern cpuop_func op_02fa_0_nf; +extern cpuop_func op_02fa_0_ff; +extern cpuop_func op_02fb_0_nf; +extern cpuop_func op_02fb_0_ff; +extern cpuop_func op_0400_0_nf; +extern cpuop_func op_0400_0_ff; +extern cpuop_func op_0410_0_nf; +extern cpuop_func op_0410_0_ff; +extern cpuop_func op_0418_0_nf; +extern cpuop_func op_0418_0_ff; +extern cpuop_func op_0420_0_nf; +extern cpuop_func op_0420_0_ff; +extern cpuop_func op_0428_0_nf; +extern cpuop_func op_0428_0_ff; +extern cpuop_func op_0430_0_nf; +extern cpuop_func op_0430_0_ff; +extern cpuop_func op_0438_0_nf; +extern cpuop_func op_0438_0_ff; +extern cpuop_func op_0439_0_nf; +extern cpuop_func op_0439_0_ff; +extern cpuop_func op_0440_0_nf; +extern cpuop_func op_0440_0_ff; +extern cpuop_func op_0450_0_nf; +extern cpuop_func op_0450_0_ff; +extern cpuop_func op_0458_0_nf; +extern cpuop_func op_0458_0_ff; +extern cpuop_func op_0460_0_nf; +extern cpuop_func op_0460_0_ff; +extern cpuop_func op_0468_0_nf; +extern cpuop_func op_0468_0_ff; +extern cpuop_func op_0470_0_nf; +extern cpuop_func op_0470_0_ff; +extern cpuop_func op_0478_0_nf; +extern cpuop_func op_0478_0_ff; +extern cpuop_func op_0479_0_nf; +extern cpuop_func op_0479_0_ff; +extern cpuop_func op_0480_0_nf; +extern cpuop_func op_0480_0_ff; +extern cpuop_func op_0490_0_nf; +extern cpuop_func op_0490_0_ff; +extern cpuop_func op_0498_0_nf; +extern cpuop_func op_0498_0_ff; +extern cpuop_func op_04a0_0_nf; +extern cpuop_func op_04a0_0_ff; +extern cpuop_func op_04a8_0_nf; +extern cpuop_func op_04a8_0_ff; +extern cpuop_func op_04b0_0_nf; +extern cpuop_func op_04b0_0_ff; +extern cpuop_func op_04b8_0_nf; +extern cpuop_func op_04b8_0_ff; +extern cpuop_func op_04b9_0_nf; +extern cpuop_func op_04b9_0_ff; +extern cpuop_func op_04d0_0_nf; +extern cpuop_func op_04d0_0_ff; +extern cpuop_func op_04e8_0_nf; +extern cpuop_func op_04e8_0_ff; +extern cpuop_func op_04f0_0_nf; +extern cpuop_func op_04f0_0_ff; +extern cpuop_func op_04f8_0_nf; +extern cpuop_func op_04f8_0_ff; +extern cpuop_func op_04f9_0_nf; +extern cpuop_func op_04f9_0_ff; +extern cpuop_func op_04fa_0_nf; +extern cpuop_func op_04fa_0_ff; +extern cpuop_func op_04fb_0_nf; +extern cpuop_func op_04fb_0_ff; +extern cpuop_func op_0600_0_nf; +extern cpuop_func op_0600_0_ff; +extern cpuop_func op_0610_0_nf; +extern cpuop_func op_0610_0_ff; +extern cpuop_func op_0618_0_nf; +extern cpuop_func op_0618_0_ff; +extern cpuop_func op_0620_0_nf; +extern cpuop_func op_0620_0_ff; +extern cpuop_func op_0628_0_nf; +extern cpuop_func op_0628_0_ff; +extern cpuop_func op_0630_0_nf; +extern cpuop_func op_0630_0_ff; +extern cpuop_func op_0638_0_nf; +extern cpuop_func op_0638_0_ff; +extern cpuop_func op_0639_0_nf; +extern cpuop_func op_0639_0_ff; +extern cpuop_func op_0640_0_nf; +extern cpuop_func op_0640_0_ff; +extern cpuop_func op_0650_0_nf; +extern cpuop_func op_0650_0_ff; +extern cpuop_func op_0658_0_nf; +extern cpuop_func op_0658_0_ff; +extern cpuop_func op_0660_0_nf; +extern cpuop_func op_0660_0_ff; +extern cpuop_func op_0668_0_nf; +extern cpuop_func op_0668_0_ff; +extern cpuop_func op_0670_0_nf; +extern cpuop_func op_0670_0_ff; +extern cpuop_func op_0678_0_nf; +extern cpuop_func op_0678_0_ff; +extern cpuop_func op_0679_0_nf; +extern cpuop_func op_0679_0_ff; +extern cpuop_func op_0680_0_nf; +extern cpuop_func op_0680_0_ff; +extern cpuop_func op_0690_0_nf; +extern cpuop_func op_0690_0_ff; +extern cpuop_func op_0698_0_nf; +extern cpuop_func op_0698_0_ff; +extern cpuop_func op_06a0_0_nf; +extern cpuop_func op_06a0_0_ff; +extern cpuop_func op_06a8_0_nf; +extern cpuop_func op_06a8_0_ff; +extern cpuop_func op_06b0_0_nf; +extern cpuop_func op_06b0_0_ff; +extern cpuop_func op_06b8_0_nf; +extern cpuop_func op_06b8_0_ff; +extern cpuop_func op_06b9_0_nf; +extern cpuop_func op_06b9_0_ff; +extern cpuop_func op_06c0_0_nf; +extern cpuop_func op_06c0_0_ff; +extern cpuop_func op_06c8_0_nf; +extern cpuop_func op_06c8_0_ff; +extern cpuop_func op_06d0_0_nf; +extern cpuop_func op_06d0_0_ff; +extern cpuop_func op_06e8_0_nf; +extern cpuop_func op_06e8_0_ff; +extern cpuop_func op_06f0_0_nf; +extern cpuop_func op_06f0_0_ff; +extern cpuop_func op_06f8_0_nf; +extern cpuop_func op_06f8_0_ff; +extern cpuop_func op_06f9_0_nf; +extern cpuop_func op_06f9_0_ff; +extern cpuop_func op_06fa_0_nf; +extern cpuop_func op_06fa_0_ff; +extern cpuop_func op_06fb_0_nf; +extern cpuop_func op_06fb_0_ff; +extern cpuop_func op_0800_0_nf; +extern cpuop_func op_0800_0_ff; +extern cpuop_func op_0810_0_nf; +extern cpuop_func op_0810_0_ff; +extern cpuop_func op_0818_0_nf; +extern cpuop_func op_0818_0_ff; +extern cpuop_func op_0820_0_nf; +extern cpuop_func op_0820_0_ff; +extern cpuop_func op_0828_0_nf; +extern cpuop_func op_0828_0_ff; +extern cpuop_func op_0830_0_nf; +extern cpuop_func op_0830_0_ff; +extern cpuop_func op_0838_0_nf; +extern cpuop_func op_0838_0_ff; +extern cpuop_func op_0839_0_nf; +extern cpuop_func op_0839_0_ff; +extern cpuop_func op_083a_0_nf; +extern cpuop_func op_083a_0_ff; +extern cpuop_func op_083b_0_nf; +extern cpuop_func op_083b_0_ff; +extern cpuop_func op_083c_0_nf; +extern cpuop_func op_083c_0_ff; +extern cpuop_func op_0840_0_nf; +extern cpuop_func op_0840_0_ff; +extern cpuop_func op_0850_0_nf; +extern cpuop_func op_0850_0_ff; +extern cpuop_func op_0858_0_nf; +extern cpuop_func op_0858_0_ff; +extern cpuop_func op_0860_0_nf; +extern cpuop_func op_0860_0_ff; +extern cpuop_func op_0868_0_nf; +extern cpuop_func op_0868_0_ff; +extern cpuop_func op_0870_0_nf; +extern cpuop_func op_0870_0_ff; +extern cpuop_func op_0878_0_nf; +extern cpuop_func op_0878_0_ff; +extern cpuop_func op_0879_0_nf; +extern cpuop_func op_0879_0_ff; +extern cpuop_func op_087a_0_nf; +extern cpuop_func op_087a_0_ff; +extern cpuop_func op_087b_0_nf; +extern cpuop_func op_087b_0_ff; +extern cpuop_func op_0880_0_nf; +extern cpuop_func op_0880_0_ff; +extern cpuop_func op_0890_0_nf; +extern cpuop_func op_0890_0_ff; +extern cpuop_func op_0898_0_nf; +extern cpuop_func op_0898_0_ff; +extern cpuop_func op_08a0_0_nf; +extern cpuop_func op_08a0_0_ff; +extern cpuop_func op_08a8_0_nf; +extern cpuop_func op_08a8_0_ff; +extern cpuop_func op_08b0_0_nf; +extern cpuop_func op_08b0_0_ff; +extern cpuop_func op_08b8_0_nf; +extern cpuop_func op_08b8_0_ff; +extern cpuop_func op_08b9_0_nf; +extern cpuop_func op_08b9_0_ff; +extern cpuop_func op_08ba_0_nf; +extern cpuop_func op_08ba_0_ff; +extern cpuop_func op_08bb_0_nf; +extern cpuop_func op_08bb_0_ff; +extern cpuop_func op_08c0_0_nf; +extern cpuop_func op_08c0_0_ff; +extern cpuop_func op_08d0_0_nf; +extern cpuop_func op_08d0_0_ff; +extern cpuop_func op_08d8_0_nf; +extern cpuop_func op_08d8_0_ff; +extern cpuop_func op_08e0_0_nf; +extern cpuop_func op_08e0_0_ff; +extern cpuop_func op_08e8_0_nf; +extern cpuop_func op_08e8_0_ff; +extern cpuop_func op_08f0_0_nf; +extern cpuop_func op_08f0_0_ff; +extern cpuop_func op_08f8_0_nf; +extern cpuop_func op_08f8_0_ff; +extern cpuop_func op_08f9_0_nf; +extern cpuop_func op_08f9_0_ff; +extern cpuop_func op_08fa_0_nf; +extern cpuop_func op_08fa_0_ff; +extern cpuop_func op_08fb_0_nf; +extern cpuop_func op_08fb_0_ff; +extern cpuop_func op_0a00_0_nf; +extern cpuop_func op_0a00_0_ff; +extern cpuop_func op_0a10_0_nf; +extern cpuop_func op_0a10_0_ff; +extern cpuop_func op_0a18_0_nf; +extern cpuop_func op_0a18_0_ff; +extern cpuop_func op_0a20_0_nf; +extern cpuop_func op_0a20_0_ff; +extern cpuop_func op_0a28_0_nf; +extern cpuop_func op_0a28_0_ff; +extern cpuop_func op_0a30_0_nf; +extern cpuop_func op_0a30_0_ff; +extern cpuop_func op_0a38_0_nf; +extern cpuop_func op_0a38_0_ff; +extern cpuop_func op_0a39_0_nf; +extern cpuop_func op_0a39_0_ff; +extern cpuop_func op_0a3c_0_nf; +extern cpuop_func op_0a3c_0_ff; +extern cpuop_func op_0a40_0_nf; +extern cpuop_func op_0a40_0_ff; +extern cpuop_func op_0a50_0_nf; +extern cpuop_func op_0a50_0_ff; +extern cpuop_func op_0a58_0_nf; +extern cpuop_func op_0a58_0_ff; +extern cpuop_func op_0a60_0_nf; +extern cpuop_func op_0a60_0_ff; +extern cpuop_func op_0a68_0_nf; +extern cpuop_func op_0a68_0_ff; +extern cpuop_func op_0a70_0_nf; +extern cpuop_func op_0a70_0_ff; +extern cpuop_func op_0a78_0_nf; +extern cpuop_func op_0a78_0_ff; +extern cpuop_func op_0a79_0_nf; +extern cpuop_func op_0a79_0_ff; +extern cpuop_func op_0a7c_0_nf; +extern cpuop_func op_0a7c_0_ff; +extern cpuop_func op_0a80_0_nf; +extern cpuop_func op_0a80_0_ff; +extern cpuop_func op_0a90_0_nf; +extern cpuop_func op_0a90_0_ff; +extern cpuop_func op_0a98_0_nf; +extern cpuop_func op_0a98_0_ff; +extern cpuop_func op_0aa0_0_nf; +extern cpuop_func op_0aa0_0_ff; +extern cpuop_func op_0aa8_0_nf; +extern cpuop_func op_0aa8_0_ff; +extern cpuop_func op_0ab0_0_nf; +extern cpuop_func op_0ab0_0_ff; +extern cpuop_func op_0ab8_0_nf; +extern cpuop_func op_0ab8_0_ff; +extern cpuop_func op_0ab9_0_nf; +extern cpuop_func op_0ab9_0_ff; +extern cpuop_func op_0ad0_0_nf; +extern cpuop_func op_0ad0_0_ff; +extern cpuop_func op_0ad8_0_nf; +extern cpuop_func op_0ad8_0_ff; +extern cpuop_func op_0ae0_0_nf; +extern cpuop_func op_0ae0_0_ff; +extern cpuop_func op_0ae8_0_nf; +extern cpuop_func op_0ae8_0_ff; +extern cpuop_func op_0af0_0_nf; +extern cpuop_func op_0af0_0_ff; +extern cpuop_func op_0af8_0_nf; +extern cpuop_func op_0af8_0_ff; +extern cpuop_func op_0af9_0_nf; +extern cpuop_func op_0af9_0_ff; +extern cpuop_func op_0c00_0_nf; +extern cpuop_func op_0c00_0_ff; +extern cpuop_func op_0c10_0_nf; +extern cpuop_func op_0c10_0_ff; +extern cpuop_func op_0c18_0_nf; +extern cpuop_func op_0c18_0_ff; +extern cpuop_func op_0c20_0_nf; +extern cpuop_func op_0c20_0_ff; +extern cpuop_func op_0c28_0_nf; +extern cpuop_func op_0c28_0_ff; +extern cpuop_func op_0c30_0_nf; +extern cpuop_func op_0c30_0_ff; +extern cpuop_func op_0c38_0_nf; +extern cpuop_func op_0c38_0_ff; +extern cpuop_func op_0c39_0_nf; +extern cpuop_func op_0c39_0_ff; +extern cpuop_func op_0c3a_0_nf; +extern cpuop_func op_0c3a_0_ff; +extern cpuop_func op_0c3b_0_nf; +extern cpuop_func op_0c3b_0_ff; +extern cpuop_func op_0c40_0_nf; +extern cpuop_func op_0c40_0_ff; +extern cpuop_func op_0c50_0_nf; +extern cpuop_func op_0c50_0_ff; +extern cpuop_func op_0c58_0_nf; +extern cpuop_func op_0c58_0_ff; +extern cpuop_func op_0c60_0_nf; +extern cpuop_func op_0c60_0_ff; +extern cpuop_func op_0c68_0_nf; +extern cpuop_func op_0c68_0_ff; +extern cpuop_func op_0c70_0_nf; +extern cpuop_func op_0c70_0_ff; +extern cpuop_func op_0c78_0_nf; +extern cpuop_func op_0c78_0_ff; +extern cpuop_func op_0c79_0_nf; +extern cpuop_func op_0c79_0_ff; +extern cpuop_func op_0c7a_0_nf; +extern cpuop_func op_0c7a_0_ff; +extern cpuop_func op_0c7b_0_nf; +extern cpuop_func op_0c7b_0_ff; +extern cpuop_func op_0c80_0_nf; +extern cpuop_func op_0c80_0_ff; +extern cpuop_func op_0c90_0_nf; +extern cpuop_func op_0c90_0_ff; +extern cpuop_func op_0c98_0_nf; +extern cpuop_func op_0c98_0_ff; +extern cpuop_func op_0ca0_0_nf; +extern cpuop_func op_0ca0_0_ff; +extern cpuop_func op_0ca8_0_nf; +extern cpuop_func op_0ca8_0_ff; +extern cpuop_func op_0cb0_0_nf; +extern cpuop_func op_0cb0_0_ff; +extern cpuop_func op_0cb8_0_nf; +extern cpuop_func op_0cb8_0_ff; +extern cpuop_func op_0cb9_0_nf; +extern cpuop_func op_0cb9_0_ff; +extern cpuop_func op_0cba_0_nf; +extern cpuop_func op_0cba_0_ff; +extern cpuop_func op_0cbb_0_nf; +extern cpuop_func op_0cbb_0_ff; +extern cpuop_func op_0cd0_0_nf; +extern cpuop_func op_0cd0_0_ff; +extern cpuop_func op_0cd8_0_nf; +extern cpuop_func op_0cd8_0_ff; +extern cpuop_func op_0ce0_0_nf; +extern cpuop_func op_0ce0_0_ff; +extern cpuop_func op_0ce8_0_nf; +extern cpuop_func op_0ce8_0_ff; +extern cpuop_func op_0cf0_0_nf; +extern cpuop_func op_0cf0_0_ff; +extern cpuop_func op_0cf8_0_nf; +extern cpuop_func op_0cf8_0_ff; +extern cpuop_func op_0cf9_0_nf; +extern cpuop_func op_0cf9_0_ff; +extern cpuop_func op_0cfc_0_nf; +extern cpuop_func op_0cfc_0_ff; +extern cpuop_func op_0e10_0_nf; +extern cpuop_func op_0e10_0_ff; +extern cpuop_func op_0e18_0_nf; +extern cpuop_func op_0e18_0_ff; +extern cpuop_func op_0e20_0_nf; +extern cpuop_func op_0e20_0_ff; +extern cpuop_func op_0e28_0_nf; +extern cpuop_func op_0e28_0_ff; +extern cpuop_func op_0e30_0_nf; +extern cpuop_func op_0e30_0_ff; +extern cpuop_func op_0e38_0_nf; +extern cpuop_func op_0e38_0_ff; +extern cpuop_func op_0e39_0_nf; +extern cpuop_func op_0e39_0_ff; +extern cpuop_func op_0e50_0_nf; +extern cpuop_func op_0e50_0_ff; +extern cpuop_func op_0e58_0_nf; +extern cpuop_func op_0e58_0_ff; +extern cpuop_func op_0e60_0_nf; +extern cpuop_func op_0e60_0_ff; +extern cpuop_func op_0e68_0_nf; +extern cpuop_func op_0e68_0_ff; +extern cpuop_func op_0e70_0_nf; +extern cpuop_func op_0e70_0_ff; +extern cpuop_func op_0e78_0_nf; +extern cpuop_func op_0e78_0_ff; +extern cpuop_func op_0e79_0_nf; +extern cpuop_func op_0e79_0_ff; +extern cpuop_func op_0e90_0_nf; +extern cpuop_func op_0e90_0_ff; +extern cpuop_func op_0e98_0_nf; +extern cpuop_func op_0e98_0_ff; +extern cpuop_func op_0ea0_0_nf; +extern cpuop_func op_0ea0_0_ff; +extern cpuop_func op_0ea8_0_nf; +extern cpuop_func op_0ea8_0_ff; +extern cpuop_func op_0eb0_0_nf; +extern cpuop_func op_0eb0_0_ff; +extern cpuop_func op_0eb8_0_nf; +extern cpuop_func op_0eb8_0_ff; +extern cpuop_func op_0eb9_0_nf; +extern cpuop_func op_0eb9_0_ff; +extern cpuop_func op_0ed0_0_nf; +extern cpuop_func op_0ed0_0_ff; +extern cpuop_func op_0ed8_0_nf; +extern cpuop_func op_0ed8_0_ff; +extern cpuop_func op_0ee0_0_nf; +extern cpuop_func op_0ee0_0_ff; +extern cpuop_func op_0ee8_0_nf; +extern cpuop_func op_0ee8_0_ff; +extern cpuop_func op_0ef0_0_nf; +extern cpuop_func op_0ef0_0_ff; +extern cpuop_func op_0ef8_0_nf; +extern cpuop_func op_0ef8_0_ff; +extern cpuop_func op_0ef9_0_nf; +extern cpuop_func op_0ef9_0_ff; +extern cpuop_func op_0efc_0_nf; +extern cpuop_func op_0efc_0_ff; +extern cpuop_func op_1000_0_nf; +extern cpuop_func op_1000_0_ff; +extern cpuop_func op_1010_0_nf; +extern cpuop_func op_1010_0_ff; +extern cpuop_func op_1018_0_nf; +extern cpuop_func op_1018_0_ff; +extern cpuop_func op_1020_0_nf; +extern cpuop_func op_1020_0_ff; +extern cpuop_func op_1028_0_nf; +extern cpuop_func op_1028_0_ff; +extern cpuop_func op_1030_0_nf; +extern cpuop_func op_1030_0_ff; +extern cpuop_func op_1038_0_nf; +extern cpuop_func op_1038_0_ff; +extern cpuop_func op_1039_0_nf; +extern cpuop_func op_1039_0_ff; +extern cpuop_func op_103a_0_nf; +extern cpuop_func op_103a_0_ff; +extern cpuop_func op_103b_0_nf; +extern cpuop_func op_103b_0_ff; +extern cpuop_func op_103c_0_nf; +extern cpuop_func op_103c_0_ff; +extern cpuop_func op_1080_0_nf; +extern cpuop_func op_1080_0_ff; +extern cpuop_func op_1090_0_nf; +extern cpuop_func op_1090_0_ff; +extern cpuop_func op_1098_0_nf; +extern cpuop_func op_1098_0_ff; +extern cpuop_func op_10a0_0_nf; +extern cpuop_func op_10a0_0_ff; +extern cpuop_func op_10a8_0_nf; +extern cpuop_func op_10a8_0_ff; +extern cpuop_func op_10b0_0_nf; +extern cpuop_func op_10b0_0_ff; +extern cpuop_func op_10b8_0_nf; +extern cpuop_func op_10b8_0_ff; +extern cpuop_func op_10b9_0_nf; +extern cpuop_func op_10b9_0_ff; +extern cpuop_func op_10ba_0_nf; +extern cpuop_func op_10ba_0_ff; +extern cpuop_func op_10bb_0_nf; +extern cpuop_func op_10bb_0_ff; +extern cpuop_func op_10bc_0_nf; +extern cpuop_func op_10bc_0_ff; +extern cpuop_func op_10c0_0_nf; +extern cpuop_func op_10c0_0_ff; +extern cpuop_func op_10d0_0_nf; +extern cpuop_func op_10d0_0_ff; +extern cpuop_func op_10d8_0_nf; +extern cpuop_func op_10d8_0_ff; +extern cpuop_func op_10e0_0_nf; +extern cpuop_func op_10e0_0_ff; +extern cpuop_func op_10e8_0_nf; +extern cpuop_func op_10e8_0_ff; +extern cpuop_func op_10f0_0_nf; +extern cpuop_func op_10f0_0_ff; +extern cpuop_func op_10f8_0_nf; +extern cpuop_func op_10f8_0_ff; +extern cpuop_func op_10f9_0_nf; +extern cpuop_func op_10f9_0_ff; +extern cpuop_func op_10fa_0_nf; +extern cpuop_func op_10fa_0_ff; +extern cpuop_func op_10fb_0_nf; +extern cpuop_func op_10fb_0_ff; +extern cpuop_func op_10fc_0_nf; +extern cpuop_func op_10fc_0_ff; +extern cpuop_func op_1100_0_nf; +extern cpuop_func op_1100_0_ff; +extern cpuop_func op_1110_0_nf; +extern cpuop_func op_1110_0_ff; +extern cpuop_func op_1118_0_nf; +extern cpuop_func op_1118_0_ff; +extern cpuop_func op_1120_0_nf; +extern cpuop_func op_1120_0_ff; +extern cpuop_func op_1128_0_nf; +extern cpuop_func op_1128_0_ff; +extern cpuop_func op_1130_0_nf; +extern cpuop_func op_1130_0_ff; +extern cpuop_func op_1138_0_nf; +extern cpuop_func op_1138_0_ff; +extern cpuop_func op_1139_0_nf; +extern cpuop_func op_1139_0_ff; +extern cpuop_func op_113a_0_nf; +extern cpuop_func op_113a_0_ff; +extern cpuop_func op_113b_0_nf; +extern cpuop_func op_113b_0_ff; +extern cpuop_func op_113c_0_nf; +extern cpuop_func op_113c_0_ff; +extern cpuop_func op_1140_0_nf; +extern cpuop_func op_1140_0_ff; +extern cpuop_func op_1150_0_nf; +extern cpuop_func op_1150_0_ff; +extern cpuop_func op_1158_0_nf; +extern cpuop_func op_1158_0_ff; +extern cpuop_func op_1160_0_nf; +extern cpuop_func op_1160_0_ff; +extern cpuop_func op_1168_0_nf; +extern cpuop_func op_1168_0_ff; +extern cpuop_func op_1170_0_nf; +extern cpuop_func op_1170_0_ff; +extern cpuop_func op_1178_0_nf; +extern cpuop_func op_1178_0_ff; +extern cpuop_func op_1179_0_nf; +extern cpuop_func op_1179_0_ff; +extern cpuop_func op_117a_0_nf; +extern cpuop_func op_117a_0_ff; +extern cpuop_func op_117b_0_nf; +extern cpuop_func op_117b_0_ff; +extern cpuop_func op_117c_0_nf; +extern cpuop_func op_117c_0_ff; +extern cpuop_func op_1180_0_nf; +extern cpuop_func op_1180_0_ff; +extern cpuop_func op_1190_0_nf; +extern cpuop_func op_1190_0_ff; +extern cpuop_func op_1198_0_nf; +extern cpuop_func op_1198_0_ff; +extern cpuop_func op_11a0_0_nf; +extern cpuop_func op_11a0_0_ff; +extern cpuop_func op_11a8_0_nf; +extern cpuop_func op_11a8_0_ff; +extern cpuop_func op_11b0_0_nf; +extern cpuop_func op_11b0_0_ff; +extern cpuop_func op_11b8_0_nf; +extern cpuop_func op_11b8_0_ff; +extern cpuop_func op_11b9_0_nf; +extern cpuop_func op_11b9_0_ff; +extern cpuop_func op_11ba_0_nf; +extern cpuop_func op_11ba_0_ff; +extern cpuop_func op_11bb_0_nf; +extern cpuop_func op_11bb_0_ff; +extern cpuop_func op_11bc_0_nf; +extern cpuop_func op_11bc_0_ff; +extern cpuop_func op_11c0_0_nf; +extern cpuop_func op_11c0_0_ff; +extern cpuop_func op_11d0_0_nf; +extern cpuop_func op_11d0_0_ff; +extern cpuop_func op_11d8_0_nf; +extern cpuop_func op_11d8_0_ff; +extern cpuop_func op_11e0_0_nf; +extern cpuop_func op_11e0_0_ff; +extern cpuop_func op_11e8_0_nf; +extern cpuop_func op_11e8_0_ff; +extern cpuop_func op_11f0_0_nf; +extern cpuop_func op_11f0_0_ff; +extern cpuop_func op_11f8_0_nf; +extern cpuop_func op_11f8_0_ff; +extern cpuop_func op_11f9_0_nf; +extern cpuop_func op_11f9_0_ff; +extern cpuop_func op_11fa_0_nf; +extern cpuop_func op_11fa_0_ff; +extern cpuop_func op_11fb_0_nf; +extern cpuop_func op_11fb_0_ff; +extern cpuop_func op_11fc_0_nf; +extern cpuop_func op_11fc_0_ff; +extern cpuop_func op_13c0_0_nf; +extern cpuop_func op_13c0_0_ff; +extern cpuop_func op_13d0_0_nf; +extern cpuop_func op_13d0_0_ff; +extern cpuop_func op_13d8_0_nf; +extern cpuop_func op_13d8_0_ff; +extern cpuop_func op_13e0_0_nf; +extern cpuop_func op_13e0_0_ff; +extern cpuop_func op_13e8_0_nf; +extern cpuop_func op_13e8_0_ff; +extern cpuop_func op_13f0_0_nf; +extern cpuop_func op_13f0_0_ff; +extern cpuop_func op_13f8_0_nf; +extern cpuop_func op_13f8_0_ff; +extern cpuop_func op_13f9_0_nf; +extern cpuop_func op_13f9_0_ff; +extern cpuop_func op_13fa_0_nf; +extern cpuop_func op_13fa_0_ff; +extern cpuop_func op_13fb_0_nf; +extern cpuop_func op_13fb_0_ff; +extern cpuop_func op_13fc_0_nf; +extern cpuop_func op_13fc_0_ff; +extern cpuop_func op_2000_0_nf; +extern cpuop_func op_2000_0_ff; +extern cpuop_func op_2008_0_nf; +extern cpuop_func op_2008_0_ff; +extern cpuop_func op_2010_0_nf; +extern cpuop_func op_2010_0_ff; +extern cpuop_func op_2018_0_nf; +extern cpuop_func op_2018_0_ff; +extern cpuop_func op_2020_0_nf; +extern cpuop_func op_2020_0_ff; +extern cpuop_func op_2028_0_nf; +extern cpuop_func op_2028_0_ff; +extern cpuop_func op_2030_0_nf; +extern cpuop_func op_2030_0_ff; +extern cpuop_func op_2038_0_nf; +extern cpuop_func op_2038_0_ff; +extern cpuop_func op_2039_0_nf; +extern cpuop_func op_2039_0_ff; +extern cpuop_func op_203a_0_nf; +extern cpuop_func op_203a_0_ff; +extern cpuop_func op_203b_0_nf; +extern cpuop_func op_203b_0_ff; +extern cpuop_func op_203c_0_nf; +extern cpuop_func op_203c_0_ff; +extern cpuop_func op_2040_0_nf; +extern cpuop_func op_2040_0_ff; +extern cpuop_func op_2048_0_nf; +extern cpuop_func op_2048_0_ff; +extern cpuop_func op_2050_0_nf; +extern cpuop_func op_2050_0_ff; +extern cpuop_func op_2058_0_nf; +extern cpuop_func op_2058_0_ff; +extern cpuop_func op_2060_0_nf; +extern cpuop_func op_2060_0_ff; +extern cpuop_func op_2068_0_nf; +extern cpuop_func op_2068_0_ff; +extern cpuop_func op_2070_0_nf; +extern cpuop_func op_2070_0_ff; +extern cpuop_func op_2078_0_nf; +extern cpuop_func op_2078_0_ff; +extern cpuop_func op_2079_0_nf; +extern cpuop_func op_2079_0_ff; +extern cpuop_func op_207a_0_nf; +extern cpuop_func op_207a_0_ff; +extern cpuop_func op_207b_0_nf; +extern cpuop_func op_207b_0_ff; +extern cpuop_func op_207c_0_nf; +extern cpuop_func op_207c_0_ff; +extern cpuop_func op_2080_0_nf; +extern cpuop_func op_2080_0_ff; +extern cpuop_func op_2088_0_nf; +extern cpuop_func op_2088_0_ff; +extern cpuop_func op_2090_0_nf; +extern cpuop_func op_2090_0_ff; +extern cpuop_func op_2098_0_nf; +extern cpuop_func op_2098_0_ff; +extern cpuop_func op_20a0_0_nf; +extern cpuop_func op_20a0_0_ff; +extern cpuop_func op_20a8_0_nf; +extern cpuop_func op_20a8_0_ff; +extern cpuop_func op_20b0_0_nf; +extern cpuop_func op_20b0_0_ff; +extern cpuop_func op_20b8_0_nf; +extern cpuop_func op_20b8_0_ff; +extern cpuop_func op_20b9_0_nf; +extern cpuop_func op_20b9_0_ff; +extern cpuop_func op_20ba_0_nf; +extern cpuop_func op_20ba_0_ff; +extern cpuop_func op_20bb_0_nf; +extern cpuop_func op_20bb_0_ff; +extern cpuop_func op_20bc_0_nf; +extern cpuop_func op_20bc_0_ff; +extern cpuop_func op_20c0_0_nf; +extern cpuop_func op_20c0_0_ff; +extern cpuop_func op_20c8_0_nf; +extern cpuop_func op_20c8_0_ff; +extern cpuop_func op_20d0_0_nf; +extern cpuop_func op_20d0_0_ff; +extern cpuop_func op_20d8_0_nf; +extern cpuop_func op_20d8_0_ff; +extern cpuop_func op_20e0_0_nf; +extern cpuop_func op_20e0_0_ff; +extern cpuop_func op_20e8_0_nf; +extern cpuop_func op_20e8_0_ff; +extern cpuop_func op_20f0_0_nf; +extern cpuop_func op_20f0_0_ff; +extern cpuop_func op_20f8_0_nf; +extern cpuop_func op_20f8_0_ff; +extern cpuop_func op_20f9_0_nf; +extern cpuop_func op_20f9_0_ff; +extern cpuop_func op_20fa_0_nf; +extern cpuop_func op_20fa_0_ff; +extern cpuop_func op_20fb_0_nf; +extern cpuop_func op_20fb_0_ff; +extern cpuop_func op_20fc_0_nf; +extern cpuop_func op_20fc_0_ff; +extern cpuop_func op_2100_0_nf; +extern cpuop_func op_2100_0_ff; +extern cpuop_func op_2108_0_nf; +extern cpuop_func op_2108_0_ff; +extern cpuop_func op_2110_0_nf; +extern cpuop_func op_2110_0_ff; +extern cpuop_func op_2118_0_nf; +extern cpuop_func op_2118_0_ff; +extern cpuop_func op_2120_0_nf; +extern cpuop_func op_2120_0_ff; +extern cpuop_func op_2128_0_nf; +extern cpuop_func op_2128_0_ff; +extern cpuop_func op_2130_0_nf; +extern cpuop_func op_2130_0_ff; +extern cpuop_func op_2138_0_nf; +extern cpuop_func op_2138_0_ff; +extern cpuop_func op_2139_0_nf; +extern cpuop_func op_2139_0_ff; +extern cpuop_func op_213a_0_nf; +extern cpuop_func op_213a_0_ff; +extern cpuop_func op_213b_0_nf; +extern cpuop_func op_213b_0_ff; +extern cpuop_func op_213c_0_nf; +extern cpuop_func op_213c_0_ff; +extern cpuop_func op_2140_0_nf; +extern cpuop_func op_2140_0_ff; +extern cpuop_func op_2148_0_nf; +extern cpuop_func op_2148_0_ff; +extern cpuop_func op_2150_0_nf; +extern cpuop_func op_2150_0_ff; +extern cpuop_func op_2158_0_nf; +extern cpuop_func op_2158_0_ff; +extern cpuop_func op_2160_0_nf; +extern cpuop_func op_2160_0_ff; +extern cpuop_func op_2168_0_nf; +extern cpuop_func op_2168_0_ff; +extern cpuop_func op_2170_0_nf; +extern cpuop_func op_2170_0_ff; +extern cpuop_func op_2178_0_nf; +extern cpuop_func op_2178_0_ff; +extern cpuop_func op_2179_0_nf; +extern cpuop_func op_2179_0_ff; +extern cpuop_func op_217a_0_nf; +extern cpuop_func op_217a_0_ff; +extern cpuop_func op_217b_0_nf; +extern cpuop_func op_217b_0_ff; +extern cpuop_func op_217c_0_nf; +extern cpuop_func op_217c_0_ff; +extern cpuop_func op_2180_0_nf; +extern cpuop_func op_2180_0_ff; +extern cpuop_func op_2188_0_nf; +extern cpuop_func op_2188_0_ff; +extern cpuop_func op_2190_0_nf; +extern cpuop_func op_2190_0_ff; +extern cpuop_func op_2198_0_nf; +extern cpuop_func op_2198_0_ff; +extern cpuop_func op_21a0_0_nf; +extern cpuop_func op_21a0_0_ff; +extern cpuop_func op_21a8_0_nf; +extern cpuop_func op_21a8_0_ff; +extern cpuop_func op_21b0_0_nf; +extern cpuop_func op_21b0_0_ff; +extern cpuop_func op_21b8_0_nf; +extern cpuop_func op_21b8_0_ff; +extern cpuop_func op_21b9_0_nf; +extern cpuop_func op_21b9_0_ff; +extern cpuop_func op_21ba_0_nf; +extern cpuop_func op_21ba_0_ff; +extern cpuop_func op_21bb_0_nf; +extern cpuop_func op_21bb_0_ff; +extern cpuop_func op_21bc_0_nf; +extern cpuop_func op_21bc_0_ff; +extern cpuop_func op_21c0_0_nf; +extern cpuop_func op_21c0_0_ff; +extern cpuop_func op_21c8_0_nf; +extern cpuop_func op_21c8_0_ff; +extern cpuop_func op_21d0_0_nf; +extern cpuop_func op_21d0_0_ff; +extern cpuop_func op_21d8_0_nf; +extern cpuop_func op_21d8_0_ff; +extern cpuop_func op_21e0_0_nf; +extern cpuop_func op_21e0_0_ff; +extern cpuop_func op_21e8_0_nf; +extern cpuop_func op_21e8_0_ff; +extern cpuop_func op_21f0_0_nf; +extern cpuop_func op_21f0_0_ff; +extern cpuop_func op_21f8_0_nf; +extern cpuop_func op_21f8_0_ff; +extern cpuop_func op_21f9_0_nf; +extern cpuop_func op_21f9_0_ff; +extern cpuop_func op_21fa_0_nf; +extern cpuop_func op_21fa_0_ff; +extern cpuop_func op_21fb_0_nf; +extern cpuop_func op_21fb_0_ff; +extern cpuop_func op_21fc_0_nf; +extern cpuop_func op_21fc_0_ff; +extern cpuop_func op_23c0_0_nf; +extern cpuop_func op_23c0_0_ff; +extern cpuop_func op_23c8_0_nf; +extern cpuop_func op_23c8_0_ff; +extern cpuop_func op_23d0_0_nf; +extern cpuop_func op_23d0_0_ff; +extern cpuop_func op_23d8_0_nf; +extern cpuop_func op_23d8_0_ff; +extern cpuop_func op_23e0_0_nf; +extern cpuop_func op_23e0_0_ff; +extern cpuop_func op_23e8_0_nf; +extern cpuop_func op_23e8_0_ff; +extern cpuop_func op_23f0_0_nf; +extern cpuop_func op_23f0_0_ff; +extern cpuop_func op_23f8_0_nf; +extern cpuop_func op_23f8_0_ff; +extern cpuop_func op_23f9_0_nf; +extern cpuop_func op_23f9_0_ff; +extern cpuop_func op_23fa_0_nf; +extern cpuop_func op_23fa_0_ff; +extern cpuop_func op_23fb_0_nf; +extern cpuop_func op_23fb_0_ff; +extern cpuop_func op_23fc_0_nf; +extern cpuop_func op_23fc_0_ff; +extern cpuop_func op_3000_0_nf; +extern cpuop_func op_3000_0_ff; +extern cpuop_func op_3008_0_nf; +extern cpuop_func op_3008_0_ff; +extern cpuop_func op_3010_0_nf; +extern cpuop_func op_3010_0_ff; +extern cpuop_func op_3018_0_nf; +extern cpuop_func op_3018_0_ff; +extern cpuop_func op_3020_0_nf; +extern cpuop_func op_3020_0_ff; +extern cpuop_func op_3028_0_nf; +extern cpuop_func op_3028_0_ff; +extern cpuop_func op_3030_0_nf; +extern cpuop_func op_3030_0_ff; +extern cpuop_func op_3038_0_nf; +extern cpuop_func op_3038_0_ff; +extern cpuop_func op_3039_0_nf; +extern cpuop_func op_3039_0_ff; +extern cpuop_func op_303a_0_nf; +extern cpuop_func op_303a_0_ff; +extern cpuop_func op_303b_0_nf; +extern cpuop_func op_303b_0_ff; +extern cpuop_func op_303c_0_nf; +extern cpuop_func op_303c_0_ff; +extern cpuop_func op_3040_0_nf; +extern cpuop_func op_3040_0_ff; +extern cpuop_func op_3048_0_nf; +extern cpuop_func op_3048_0_ff; +extern cpuop_func op_3050_0_nf; +extern cpuop_func op_3050_0_ff; +extern cpuop_func op_3058_0_nf; +extern cpuop_func op_3058_0_ff; +extern cpuop_func op_3060_0_nf; +extern cpuop_func op_3060_0_ff; +extern cpuop_func op_3068_0_nf; +extern cpuop_func op_3068_0_ff; +extern cpuop_func op_3070_0_nf; +extern cpuop_func op_3070_0_ff; +extern cpuop_func op_3078_0_nf; +extern cpuop_func op_3078_0_ff; +extern cpuop_func op_3079_0_nf; +extern cpuop_func op_3079_0_ff; +extern cpuop_func op_307a_0_nf; +extern cpuop_func op_307a_0_ff; +extern cpuop_func op_307b_0_nf; +extern cpuop_func op_307b_0_ff; +extern cpuop_func op_307c_0_nf; +extern cpuop_func op_307c_0_ff; +extern cpuop_func op_3080_0_nf; +extern cpuop_func op_3080_0_ff; +extern cpuop_func op_3088_0_nf; +extern cpuop_func op_3088_0_ff; +extern cpuop_func op_3090_0_nf; +extern cpuop_func op_3090_0_ff; +extern cpuop_func op_3098_0_nf; +extern cpuop_func op_3098_0_ff; +extern cpuop_func op_30a0_0_nf; +extern cpuop_func op_30a0_0_ff; +extern cpuop_func op_30a8_0_nf; +extern cpuop_func op_30a8_0_ff; +extern cpuop_func op_30b0_0_nf; +extern cpuop_func op_30b0_0_ff; +extern cpuop_func op_30b8_0_nf; +extern cpuop_func op_30b8_0_ff; +extern cpuop_func op_30b9_0_nf; +extern cpuop_func op_30b9_0_ff; +extern cpuop_func op_30ba_0_nf; +extern cpuop_func op_30ba_0_ff; +extern cpuop_func op_30bb_0_nf; +extern cpuop_func op_30bb_0_ff; +extern cpuop_func op_30bc_0_nf; +extern cpuop_func op_30bc_0_ff; +extern cpuop_func op_30c0_0_nf; +extern cpuop_func op_30c0_0_ff; +extern cpuop_func op_30c8_0_nf; +extern cpuop_func op_30c8_0_ff; +extern cpuop_func op_30d0_0_nf; +extern cpuop_func op_30d0_0_ff; +extern cpuop_func op_30d8_0_nf; +extern cpuop_func op_30d8_0_ff; +extern cpuop_func op_30e0_0_nf; +extern cpuop_func op_30e0_0_ff; +extern cpuop_func op_30e8_0_nf; +extern cpuop_func op_30e8_0_ff; +extern cpuop_func op_30f0_0_nf; +extern cpuop_func op_30f0_0_ff; +extern cpuop_func op_30f8_0_nf; +extern cpuop_func op_30f8_0_ff; +extern cpuop_func op_30f9_0_nf; +extern cpuop_func op_30f9_0_ff; +extern cpuop_func op_30fa_0_nf; +extern cpuop_func op_30fa_0_ff; +extern cpuop_func op_30fb_0_nf; +extern cpuop_func op_30fb_0_ff; +extern cpuop_func op_30fc_0_nf; +extern cpuop_func op_30fc_0_ff; +extern cpuop_func op_3100_0_nf; +extern cpuop_func op_3100_0_ff; +extern cpuop_func op_3108_0_nf; +extern cpuop_func op_3108_0_ff; +extern cpuop_func op_3110_0_nf; +extern cpuop_func op_3110_0_ff; +extern cpuop_func op_3118_0_nf; +extern cpuop_func op_3118_0_ff; +extern cpuop_func op_3120_0_nf; +extern cpuop_func op_3120_0_ff; +extern cpuop_func op_3128_0_nf; +extern cpuop_func op_3128_0_ff; +extern cpuop_func op_3130_0_nf; +extern cpuop_func op_3130_0_ff; +extern cpuop_func op_3138_0_nf; +extern cpuop_func op_3138_0_ff; +extern cpuop_func op_3139_0_nf; +extern cpuop_func op_3139_0_ff; +extern cpuop_func op_313a_0_nf; +extern cpuop_func op_313a_0_ff; +extern cpuop_func op_313b_0_nf; +extern cpuop_func op_313b_0_ff; +extern cpuop_func op_313c_0_nf; +extern cpuop_func op_313c_0_ff; +extern cpuop_func op_3140_0_nf; +extern cpuop_func op_3140_0_ff; +extern cpuop_func op_3148_0_nf; +extern cpuop_func op_3148_0_ff; +extern cpuop_func op_3150_0_nf; +extern cpuop_func op_3150_0_ff; +extern cpuop_func op_3158_0_nf; +extern cpuop_func op_3158_0_ff; +extern cpuop_func op_3160_0_nf; +extern cpuop_func op_3160_0_ff; +extern cpuop_func op_3168_0_nf; +extern cpuop_func op_3168_0_ff; +extern cpuop_func op_3170_0_nf; +extern cpuop_func op_3170_0_ff; +extern cpuop_func op_3178_0_nf; +extern cpuop_func op_3178_0_ff; +extern cpuop_func op_3179_0_nf; +extern cpuop_func op_3179_0_ff; +extern cpuop_func op_317a_0_nf; +extern cpuop_func op_317a_0_ff; +extern cpuop_func op_317b_0_nf; +extern cpuop_func op_317b_0_ff; +extern cpuop_func op_317c_0_nf; +extern cpuop_func op_317c_0_ff; +extern cpuop_func op_3180_0_nf; +extern cpuop_func op_3180_0_ff; +extern cpuop_func op_3188_0_nf; +extern cpuop_func op_3188_0_ff; +extern cpuop_func op_3190_0_nf; +extern cpuop_func op_3190_0_ff; +extern cpuop_func op_3198_0_nf; +extern cpuop_func op_3198_0_ff; +extern cpuop_func op_31a0_0_nf; +extern cpuop_func op_31a0_0_ff; +extern cpuop_func op_31a8_0_nf; +extern cpuop_func op_31a8_0_ff; +extern cpuop_func op_31b0_0_nf; +extern cpuop_func op_31b0_0_ff; +extern cpuop_func op_31b8_0_nf; +extern cpuop_func op_31b8_0_ff; +extern cpuop_func op_31b9_0_nf; +extern cpuop_func op_31b9_0_ff; +extern cpuop_func op_31ba_0_nf; +extern cpuop_func op_31ba_0_ff; +extern cpuop_func op_31bb_0_nf; +extern cpuop_func op_31bb_0_ff; +extern cpuop_func op_31bc_0_nf; +extern cpuop_func op_31bc_0_ff; +extern cpuop_func op_31c0_0_nf; +extern cpuop_func op_31c0_0_ff; +extern cpuop_func op_31c8_0_nf; +extern cpuop_func op_31c8_0_ff; +extern cpuop_func op_31d0_0_nf; +extern cpuop_func op_31d0_0_ff; +extern cpuop_func op_31d8_0_nf; +extern cpuop_func op_31d8_0_ff; +extern cpuop_func op_31e0_0_nf; +extern cpuop_func op_31e0_0_ff; +extern cpuop_func op_31e8_0_nf; +extern cpuop_func op_31e8_0_ff; +extern cpuop_func op_31f0_0_nf; +extern cpuop_func op_31f0_0_ff; +extern cpuop_func op_31f8_0_nf; +extern cpuop_func op_31f8_0_ff; +extern cpuop_func op_31f9_0_nf; +extern cpuop_func op_31f9_0_ff; +extern cpuop_func op_31fa_0_nf; +extern cpuop_func op_31fa_0_ff; +extern cpuop_func op_31fb_0_nf; +extern cpuop_func op_31fb_0_ff; +extern cpuop_func op_31fc_0_nf; +extern cpuop_func op_31fc_0_ff; +extern cpuop_func op_33c0_0_nf; +extern cpuop_func op_33c0_0_ff; +extern cpuop_func op_33c8_0_nf; +extern cpuop_func op_33c8_0_ff; +extern cpuop_func op_33d0_0_nf; +extern cpuop_func op_33d0_0_ff; +extern cpuop_func op_33d8_0_nf; +extern cpuop_func op_33d8_0_ff; +extern cpuop_func op_33e0_0_nf; +extern cpuop_func op_33e0_0_ff; +extern cpuop_func op_33e8_0_nf; +extern cpuop_func op_33e8_0_ff; +extern cpuop_func op_33f0_0_nf; +extern cpuop_func op_33f0_0_ff; +extern cpuop_func op_33f8_0_nf; +extern cpuop_func op_33f8_0_ff; +extern cpuop_func op_33f9_0_nf; +extern cpuop_func op_33f9_0_ff; +extern cpuop_func op_33fa_0_nf; +extern cpuop_func op_33fa_0_ff; +extern cpuop_func op_33fb_0_nf; +extern cpuop_func op_33fb_0_ff; +extern cpuop_func op_33fc_0_nf; +extern cpuop_func op_33fc_0_ff; +extern cpuop_func op_4000_0_nf; +extern cpuop_func op_4000_0_ff; +extern cpuop_func op_4010_0_nf; +extern cpuop_func op_4010_0_ff; +extern cpuop_func op_4018_0_nf; +extern cpuop_func op_4018_0_ff; +extern cpuop_func op_4020_0_nf; +extern cpuop_func op_4020_0_ff; +extern cpuop_func op_4028_0_nf; +extern cpuop_func op_4028_0_ff; +extern cpuop_func op_4030_0_nf; +extern cpuop_func op_4030_0_ff; +extern cpuop_func op_4038_0_nf; +extern cpuop_func op_4038_0_ff; +extern cpuop_func op_4039_0_nf; +extern cpuop_func op_4039_0_ff; +extern cpuop_func op_4040_0_nf; +extern cpuop_func op_4040_0_ff; +extern cpuop_func op_4050_0_nf; +extern cpuop_func op_4050_0_ff; +extern cpuop_func op_4058_0_nf; +extern cpuop_func op_4058_0_ff; +extern cpuop_func op_4060_0_nf; +extern cpuop_func op_4060_0_ff; +extern cpuop_func op_4068_0_nf; +extern cpuop_func op_4068_0_ff; +extern cpuop_func op_4070_0_nf; +extern cpuop_func op_4070_0_ff; +extern cpuop_func op_4078_0_nf; +extern cpuop_func op_4078_0_ff; +extern cpuop_func op_4079_0_nf; +extern cpuop_func op_4079_0_ff; +extern cpuop_func op_4080_0_nf; +extern cpuop_func op_4080_0_ff; +extern cpuop_func op_4090_0_nf; +extern cpuop_func op_4090_0_ff; +extern cpuop_func op_4098_0_nf; +extern cpuop_func op_4098_0_ff; +extern cpuop_func op_40a0_0_nf; +extern cpuop_func op_40a0_0_ff; +extern cpuop_func op_40a8_0_nf; +extern cpuop_func op_40a8_0_ff; +extern cpuop_func op_40b0_0_nf; +extern cpuop_func op_40b0_0_ff; +extern cpuop_func op_40b8_0_nf; +extern cpuop_func op_40b8_0_ff; +extern cpuop_func op_40b9_0_nf; +extern cpuop_func op_40b9_0_ff; +extern cpuop_func op_40c0_0_nf; +extern cpuop_func op_40c0_0_ff; +extern cpuop_func op_40d0_0_nf; +extern cpuop_func op_40d0_0_ff; +extern cpuop_func op_40d8_0_nf; +extern cpuop_func op_40d8_0_ff; +extern cpuop_func op_40e0_0_nf; +extern cpuop_func op_40e0_0_ff; +extern cpuop_func op_40e8_0_nf; +extern cpuop_func op_40e8_0_ff; +extern cpuop_func op_40f0_0_nf; +extern cpuop_func op_40f0_0_ff; +extern cpuop_func op_40f8_0_nf; +extern cpuop_func op_40f8_0_ff; +extern cpuop_func op_40f9_0_nf; +extern cpuop_func op_40f9_0_ff; +extern cpuop_func op_4100_0_nf; +extern cpuop_func op_4100_0_ff; +extern cpuop_func op_4110_0_nf; +extern cpuop_func op_4110_0_ff; +extern cpuop_func op_4118_0_nf; +extern cpuop_func op_4118_0_ff; +extern cpuop_func op_4120_0_nf; +extern cpuop_func op_4120_0_ff; +extern cpuop_func op_4128_0_nf; +extern cpuop_func op_4128_0_ff; +extern cpuop_func op_4130_0_nf; +extern cpuop_func op_4130_0_ff; +extern cpuop_func op_4138_0_nf; +extern cpuop_func op_4138_0_ff; +extern cpuop_func op_4139_0_nf; +extern cpuop_func op_4139_0_ff; +extern cpuop_func op_413a_0_nf; +extern cpuop_func op_413a_0_ff; +extern cpuop_func op_413b_0_nf; +extern cpuop_func op_413b_0_ff; +extern cpuop_func op_413c_0_nf; +extern cpuop_func op_413c_0_ff; +extern cpuop_func op_4180_0_nf; +extern cpuop_func op_4180_0_ff; +extern cpuop_func op_4190_0_nf; +extern cpuop_func op_4190_0_ff; +extern cpuop_func op_4198_0_nf; +extern cpuop_func op_4198_0_ff; +extern cpuop_func op_41a0_0_nf; +extern cpuop_func op_41a0_0_ff; +extern cpuop_func op_41a8_0_nf; +extern cpuop_func op_41a8_0_ff; +extern cpuop_func op_41b0_0_nf; +extern cpuop_func op_41b0_0_ff; +extern cpuop_func op_41b8_0_nf; +extern cpuop_func op_41b8_0_ff; +extern cpuop_func op_41b9_0_nf; +extern cpuop_func op_41b9_0_ff; +extern cpuop_func op_41ba_0_nf; +extern cpuop_func op_41ba_0_ff; +extern cpuop_func op_41bb_0_nf; +extern cpuop_func op_41bb_0_ff; +extern cpuop_func op_41bc_0_nf; +extern cpuop_func op_41bc_0_ff; +extern cpuop_func op_41d0_0_nf; +extern cpuop_func op_41d0_0_ff; +extern cpuop_func op_41e8_0_nf; +extern cpuop_func op_41e8_0_ff; +extern cpuop_func op_41f0_0_nf; +extern cpuop_func op_41f0_0_ff; +extern cpuop_func op_41f8_0_nf; +extern cpuop_func op_41f8_0_ff; +extern cpuop_func op_41f9_0_nf; +extern cpuop_func op_41f9_0_ff; +extern cpuop_func op_41fa_0_nf; +extern cpuop_func op_41fa_0_ff; +extern cpuop_func op_41fb_0_nf; +extern cpuop_func op_41fb_0_ff; +extern cpuop_func op_4200_0_nf; +extern cpuop_func op_4200_0_ff; +extern cpuop_func op_4210_0_nf; +extern cpuop_func op_4210_0_ff; +extern cpuop_func op_4218_0_nf; +extern cpuop_func op_4218_0_ff; +extern cpuop_func op_4220_0_nf; +extern cpuop_func op_4220_0_ff; +extern cpuop_func op_4228_0_nf; +extern cpuop_func op_4228_0_ff; +extern cpuop_func op_4230_0_nf; +extern cpuop_func op_4230_0_ff; +extern cpuop_func op_4238_0_nf; +extern cpuop_func op_4238_0_ff; +extern cpuop_func op_4239_0_nf; +extern cpuop_func op_4239_0_ff; +extern cpuop_func op_4240_0_nf; +extern cpuop_func op_4240_0_ff; +extern cpuop_func op_4250_0_nf; +extern cpuop_func op_4250_0_ff; +extern cpuop_func op_4258_0_nf; +extern cpuop_func op_4258_0_ff; +extern cpuop_func op_4260_0_nf; +extern cpuop_func op_4260_0_ff; +extern cpuop_func op_4268_0_nf; +extern cpuop_func op_4268_0_ff; +extern cpuop_func op_4270_0_nf; +extern cpuop_func op_4270_0_ff; +extern cpuop_func op_4278_0_nf; +extern cpuop_func op_4278_0_ff; +extern cpuop_func op_4279_0_nf; +extern cpuop_func op_4279_0_ff; +extern cpuop_func op_4280_0_nf; +extern cpuop_func op_4280_0_ff; +extern cpuop_func op_4290_0_nf; +extern cpuop_func op_4290_0_ff; +extern cpuop_func op_4298_0_nf; +extern cpuop_func op_4298_0_ff; +extern cpuop_func op_42a0_0_nf; +extern cpuop_func op_42a0_0_ff; +extern cpuop_func op_42a8_0_nf; +extern cpuop_func op_42a8_0_ff; +extern cpuop_func op_42b0_0_nf; +extern cpuop_func op_42b0_0_ff; +extern cpuop_func op_42b8_0_nf; +extern cpuop_func op_42b8_0_ff; +extern cpuop_func op_42b9_0_nf; +extern cpuop_func op_42b9_0_ff; +extern cpuop_func op_42c0_0_nf; +extern cpuop_func op_42c0_0_ff; +extern cpuop_func op_42d0_0_nf; +extern cpuop_func op_42d0_0_ff; +extern cpuop_func op_42d8_0_nf; +extern cpuop_func op_42d8_0_ff; +extern cpuop_func op_42e0_0_nf; +extern cpuop_func op_42e0_0_ff; +extern cpuop_func op_42e8_0_nf; +extern cpuop_func op_42e8_0_ff; +extern cpuop_func op_42f0_0_nf; +extern cpuop_func op_42f0_0_ff; +extern cpuop_func op_42f8_0_nf; +extern cpuop_func op_42f8_0_ff; +extern cpuop_func op_42f9_0_nf; +extern cpuop_func op_42f9_0_ff; +extern cpuop_func op_4400_0_nf; +extern cpuop_func op_4400_0_ff; +extern cpuop_func op_4410_0_nf; +extern cpuop_func op_4410_0_ff; +extern cpuop_func op_4418_0_nf; +extern cpuop_func op_4418_0_ff; +extern cpuop_func op_4420_0_nf; +extern cpuop_func op_4420_0_ff; +extern cpuop_func op_4428_0_nf; +extern cpuop_func op_4428_0_ff; +extern cpuop_func op_4430_0_nf; +extern cpuop_func op_4430_0_ff; +extern cpuop_func op_4438_0_nf; +extern cpuop_func op_4438_0_ff; +extern cpuop_func op_4439_0_nf; +extern cpuop_func op_4439_0_ff; +extern cpuop_func op_4440_0_nf; +extern cpuop_func op_4440_0_ff; +extern cpuop_func op_4450_0_nf; +extern cpuop_func op_4450_0_ff; +extern cpuop_func op_4458_0_nf; +extern cpuop_func op_4458_0_ff; +extern cpuop_func op_4460_0_nf; +extern cpuop_func op_4460_0_ff; +extern cpuop_func op_4468_0_nf; +extern cpuop_func op_4468_0_ff; +extern cpuop_func op_4470_0_nf; +extern cpuop_func op_4470_0_ff; +extern cpuop_func op_4478_0_nf; +extern cpuop_func op_4478_0_ff; +extern cpuop_func op_4479_0_nf; +extern cpuop_func op_4479_0_ff; +extern cpuop_func op_4480_0_nf; +extern cpuop_func op_4480_0_ff; +extern cpuop_func op_4490_0_nf; +extern cpuop_func op_4490_0_ff; +extern cpuop_func op_4498_0_nf; +extern cpuop_func op_4498_0_ff; +extern cpuop_func op_44a0_0_nf; +extern cpuop_func op_44a0_0_ff; +extern cpuop_func op_44a8_0_nf; +extern cpuop_func op_44a8_0_ff; +extern cpuop_func op_44b0_0_nf; +extern cpuop_func op_44b0_0_ff; +extern cpuop_func op_44b8_0_nf; +extern cpuop_func op_44b8_0_ff; +extern cpuop_func op_44b9_0_nf; +extern cpuop_func op_44b9_0_ff; +extern cpuop_func op_44c0_0_nf; +extern cpuop_func op_44c0_0_ff; +extern cpuop_func op_44d0_0_nf; +extern cpuop_func op_44d0_0_ff; +extern cpuop_func op_44d8_0_nf; +extern cpuop_func op_44d8_0_ff; +extern cpuop_func op_44e0_0_nf; +extern cpuop_func op_44e0_0_ff; +extern cpuop_func op_44e8_0_nf; +extern cpuop_func op_44e8_0_ff; +extern cpuop_func op_44f0_0_nf; +extern cpuop_func op_44f0_0_ff; +extern cpuop_func op_44f8_0_nf; +extern cpuop_func op_44f8_0_ff; +extern cpuop_func op_44f9_0_nf; +extern cpuop_func op_44f9_0_ff; +extern cpuop_func op_44fa_0_nf; +extern cpuop_func op_44fa_0_ff; +extern cpuop_func op_44fb_0_nf; +extern cpuop_func op_44fb_0_ff; +extern cpuop_func op_44fc_0_nf; +extern cpuop_func op_44fc_0_ff; +extern cpuop_func op_4600_0_nf; +extern cpuop_func op_4600_0_ff; +extern cpuop_func op_4610_0_nf; +extern cpuop_func op_4610_0_ff; +extern cpuop_func op_4618_0_nf; +extern cpuop_func op_4618_0_ff; +extern cpuop_func op_4620_0_nf; +extern cpuop_func op_4620_0_ff; +extern cpuop_func op_4628_0_nf; +extern cpuop_func op_4628_0_ff; +extern cpuop_func op_4630_0_nf; +extern cpuop_func op_4630_0_ff; +extern cpuop_func op_4638_0_nf; +extern cpuop_func op_4638_0_ff; +extern cpuop_func op_4639_0_nf; +extern cpuop_func op_4639_0_ff; +extern cpuop_func op_4640_0_nf; +extern cpuop_func op_4640_0_ff; +extern cpuop_func op_4650_0_nf; +extern cpuop_func op_4650_0_ff; +extern cpuop_func op_4658_0_nf; +extern cpuop_func op_4658_0_ff; +extern cpuop_func op_4660_0_nf; +extern cpuop_func op_4660_0_ff; +extern cpuop_func op_4668_0_nf; +extern cpuop_func op_4668_0_ff; +extern cpuop_func op_4670_0_nf; +extern cpuop_func op_4670_0_ff; +extern cpuop_func op_4678_0_nf; +extern cpuop_func op_4678_0_ff; +extern cpuop_func op_4679_0_nf; +extern cpuop_func op_4679_0_ff; +extern cpuop_func op_4680_0_nf; +extern cpuop_func op_4680_0_ff; +extern cpuop_func op_4690_0_nf; +extern cpuop_func op_4690_0_ff; +extern cpuop_func op_4698_0_nf; +extern cpuop_func op_4698_0_ff; +extern cpuop_func op_46a0_0_nf; +extern cpuop_func op_46a0_0_ff; +extern cpuop_func op_46a8_0_nf; +extern cpuop_func op_46a8_0_ff; +extern cpuop_func op_46b0_0_nf; +extern cpuop_func op_46b0_0_ff; +extern cpuop_func op_46b8_0_nf; +extern cpuop_func op_46b8_0_ff; +extern cpuop_func op_46b9_0_nf; +extern cpuop_func op_46b9_0_ff; +extern cpuop_func op_46c0_0_nf; +extern cpuop_func op_46c0_0_ff; +extern cpuop_func op_46d0_0_nf; +extern cpuop_func op_46d0_0_ff; +extern cpuop_func op_46d8_0_nf; +extern cpuop_func op_46d8_0_ff; +extern cpuop_func op_46e0_0_nf; +extern cpuop_func op_46e0_0_ff; +extern cpuop_func op_46e8_0_nf; +extern cpuop_func op_46e8_0_ff; +extern cpuop_func op_46f0_0_nf; +extern cpuop_func op_46f0_0_ff; +extern cpuop_func op_46f8_0_nf; +extern cpuop_func op_46f8_0_ff; +extern cpuop_func op_46f9_0_nf; +extern cpuop_func op_46f9_0_ff; +extern cpuop_func op_46fa_0_nf; +extern cpuop_func op_46fa_0_ff; +extern cpuop_func op_46fb_0_nf; +extern cpuop_func op_46fb_0_ff; +extern cpuop_func op_46fc_0_nf; +extern cpuop_func op_46fc_0_ff; +extern cpuop_func op_4800_0_nf; +extern cpuop_func op_4800_0_ff; +extern cpuop_func op_4808_0_nf; +extern cpuop_func op_4808_0_ff; +extern cpuop_func op_4810_0_nf; +extern cpuop_func op_4810_0_ff; +extern cpuop_func op_4818_0_nf; +extern cpuop_func op_4818_0_ff; +extern cpuop_func op_4820_0_nf; +extern cpuop_func op_4820_0_ff; +extern cpuop_func op_4828_0_nf; +extern cpuop_func op_4828_0_ff; +extern cpuop_func op_4830_0_nf; +extern cpuop_func op_4830_0_ff; +extern cpuop_func op_4838_0_nf; +extern cpuop_func op_4838_0_ff; +extern cpuop_func op_4839_0_nf; +extern cpuop_func op_4839_0_ff; +extern cpuop_func op_4840_0_nf; +extern cpuop_func op_4840_0_ff; +extern cpuop_func op_4848_0_nf; +extern cpuop_func op_4848_0_ff; +extern cpuop_func op_4850_0_nf; +extern cpuop_func op_4850_0_ff; +extern cpuop_func op_4868_0_nf; +extern cpuop_func op_4868_0_ff; +extern cpuop_func op_4870_0_nf; +extern cpuop_func op_4870_0_ff; +extern cpuop_func op_4878_0_nf; +extern cpuop_func op_4878_0_ff; +extern cpuop_func op_4879_0_nf; +extern cpuop_func op_4879_0_ff; +extern cpuop_func op_487a_0_nf; +extern cpuop_func op_487a_0_ff; +extern cpuop_func op_487b_0_nf; +extern cpuop_func op_487b_0_ff; +extern cpuop_func op_4880_0_nf; +extern cpuop_func op_4880_0_ff; +extern cpuop_func op_4890_0_nf; +extern cpuop_func op_4890_0_ff; +extern cpuop_func op_48a0_0_nf; +extern cpuop_func op_48a0_0_ff; +extern cpuop_func op_48a8_0_nf; +extern cpuop_func op_48a8_0_ff; +extern cpuop_func op_48b0_0_nf; +extern cpuop_func op_48b0_0_ff; +extern cpuop_func op_48b8_0_nf; +extern cpuop_func op_48b8_0_ff; +extern cpuop_func op_48b9_0_nf; +extern cpuop_func op_48b9_0_ff; +extern cpuop_func op_48c0_0_nf; +extern cpuop_func op_48c0_0_ff; +extern cpuop_func op_48d0_0_nf; +extern cpuop_func op_48d0_0_ff; +extern cpuop_func op_48e0_0_nf; +extern cpuop_func op_48e0_0_ff; +extern cpuop_func op_48e8_0_nf; +extern cpuop_func op_48e8_0_ff; +extern cpuop_func op_48f0_0_nf; +extern cpuop_func op_48f0_0_ff; +extern cpuop_func op_48f8_0_nf; +extern cpuop_func op_48f8_0_ff; +extern cpuop_func op_48f9_0_nf; +extern cpuop_func op_48f9_0_ff; +extern cpuop_func op_49c0_0_nf; +extern cpuop_func op_49c0_0_ff; +extern cpuop_func op_4a00_0_nf; +extern cpuop_func op_4a00_0_ff; +extern cpuop_func op_4a10_0_nf; +extern cpuop_func op_4a10_0_ff; +extern cpuop_func op_4a18_0_nf; +extern cpuop_func op_4a18_0_ff; +extern cpuop_func op_4a20_0_nf; +extern cpuop_func op_4a20_0_ff; +extern cpuop_func op_4a28_0_nf; +extern cpuop_func op_4a28_0_ff; +extern cpuop_func op_4a30_0_nf; +extern cpuop_func op_4a30_0_ff; +extern cpuop_func op_4a38_0_nf; +extern cpuop_func op_4a38_0_ff; +extern cpuop_func op_4a39_0_nf; +extern cpuop_func op_4a39_0_ff; +extern cpuop_func op_4a3a_0_nf; +extern cpuop_func op_4a3a_0_ff; +extern cpuop_func op_4a3b_0_nf; +extern cpuop_func op_4a3b_0_ff; +extern cpuop_func op_4a3c_0_nf; +extern cpuop_func op_4a3c_0_ff; +extern cpuop_func op_4a40_0_nf; +extern cpuop_func op_4a40_0_ff; +extern cpuop_func op_4a48_0_nf; +extern cpuop_func op_4a48_0_ff; +extern cpuop_func op_4a50_0_nf; +extern cpuop_func op_4a50_0_ff; +extern cpuop_func op_4a58_0_nf; +extern cpuop_func op_4a58_0_ff; +extern cpuop_func op_4a60_0_nf; +extern cpuop_func op_4a60_0_ff; +extern cpuop_func op_4a68_0_nf; +extern cpuop_func op_4a68_0_ff; +extern cpuop_func op_4a70_0_nf; +extern cpuop_func op_4a70_0_ff; +extern cpuop_func op_4a78_0_nf; +extern cpuop_func op_4a78_0_ff; +extern cpuop_func op_4a79_0_nf; +extern cpuop_func op_4a79_0_ff; +extern cpuop_func op_4a7a_0_nf; +extern cpuop_func op_4a7a_0_ff; +extern cpuop_func op_4a7b_0_nf; +extern cpuop_func op_4a7b_0_ff; +extern cpuop_func op_4a7c_0_nf; +extern cpuop_func op_4a7c_0_ff; +extern cpuop_func op_4a80_0_nf; +extern cpuop_func op_4a80_0_ff; +extern cpuop_func op_4a88_0_nf; +extern cpuop_func op_4a88_0_ff; +extern cpuop_func op_4a90_0_nf; +extern cpuop_func op_4a90_0_ff; +extern cpuop_func op_4a98_0_nf; +extern cpuop_func op_4a98_0_ff; +extern cpuop_func op_4aa0_0_nf; +extern cpuop_func op_4aa0_0_ff; +extern cpuop_func op_4aa8_0_nf; +extern cpuop_func op_4aa8_0_ff; +extern cpuop_func op_4ab0_0_nf; +extern cpuop_func op_4ab0_0_ff; +extern cpuop_func op_4ab8_0_nf; +extern cpuop_func op_4ab8_0_ff; +extern cpuop_func op_4ab9_0_nf; +extern cpuop_func op_4ab9_0_ff; +extern cpuop_func op_4aba_0_nf; +extern cpuop_func op_4aba_0_ff; +extern cpuop_func op_4abb_0_nf; +extern cpuop_func op_4abb_0_ff; +extern cpuop_func op_4abc_0_nf; +extern cpuop_func op_4abc_0_ff; +extern cpuop_func op_4ac0_0_nf; +extern cpuop_func op_4ac0_0_ff; +extern cpuop_func op_4ad0_0_nf; +extern cpuop_func op_4ad0_0_ff; +extern cpuop_func op_4ad8_0_nf; +extern cpuop_func op_4ad8_0_ff; +extern cpuop_func op_4ae0_0_nf; +extern cpuop_func op_4ae0_0_ff; +extern cpuop_func op_4ae8_0_nf; +extern cpuop_func op_4ae8_0_ff; +extern cpuop_func op_4af0_0_nf; +extern cpuop_func op_4af0_0_ff; +extern cpuop_func op_4af8_0_nf; +extern cpuop_func op_4af8_0_ff; +extern cpuop_func op_4af9_0_nf; +extern cpuop_func op_4af9_0_ff; +extern cpuop_func op_4c00_0_nf; +extern cpuop_func op_4c00_0_ff; +extern cpuop_func op_4c10_0_nf; +extern cpuop_func op_4c10_0_ff; +extern cpuop_func op_4c18_0_nf; +extern cpuop_func op_4c18_0_ff; +extern cpuop_func op_4c20_0_nf; +extern cpuop_func op_4c20_0_ff; +extern cpuop_func op_4c28_0_nf; +extern cpuop_func op_4c28_0_ff; +extern cpuop_func op_4c30_0_nf; +extern cpuop_func op_4c30_0_ff; +extern cpuop_func op_4c38_0_nf; +extern cpuop_func op_4c38_0_ff; +extern cpuop_func op_4c39_0_nf; +extern cpuop_func op_4c39_0_ff; +extern cpuop_func op_4c3a_0_nf; +extern cpuop_func op_4c3a_0_ff; +extern cpuop_func op_4c3b_0_nf; +extern cpuop_func op_4c3b_0_ff; +extern cpuop_func op_4c3c_0_nf; +extern cpuop_func op_4c3c_0_ff; +extern cpuop_func op_4c40_0_nf; +extern cpuop_func op_4c40_0_ff; +extern cpuop_func op_4c50_0_nf; +extern cpuop_func op_4c50_0_ff; +extern cpuop_func op_4c58_0_nf; +extern cpuop_func op_4c58_0_ff; +extern cpuop_func op_4c60_0_nf; +extern cpuop_func op_4c60_0_ff; +extern cpuop_func op_4c68_0_nf; +extern cpuop_func op_4c68_0_ff; +extern cpuop_func op_4c70_0_nf; +extern cpuop_func op_4c70_0_ff; +extern cpuop_func op_4c78_0_nf; +extern cpuop_func op_4c78_0_ff; +extern cpuop_func op_4c79_0_nf; +extern cpuop_func op_4c79_0_ff; +extern cpuop_func op_4c7a_0_nf; +extern cpuop_func op_4c7a_0_ff; +extern cpuop_func op_4c7b_0_nf; +extern cpuop_func op_4c7b_0_ff; +extern cpuop_func op_4c7c_0_nf; +extern cpuop_func op_4c7c_0_ff; +extern cpuop_func op_4c90_0_nf; +extern cpuop_func op_4c90_0_ff; +extern cpuop_func op_4c98_0_nf; +extern cpuop_func op_4c98_0_ff; +extern cpuop_func op_4ca8_0_nf; +extern cpuop_func op_4ca8_0_ff; +extern cpuop_func op_4cb0_0_nf; +extern cpuop_func op_4cb0_0_ff; +extern cpuop_func op_4cb8_0_nf; +extern cpuop_func op_4cb8_0_ff; +extern cpuop_func op_4cb9_0_nf; +extern cpuop_func op_4cb9_0_ff; +extern cpuop_func op_4cba_0_nf; +extern cpuop_func op_4cba_0_ff; +extern cpuop_func op_4cbb_0_nf; +extern cpuop_func op_4cbb_0_ff; +extern cpuop_func op_4cd0_0_nf; +extern cpuop_func op_4cd0_0_ff; +extern cpuop_func op_4cd8_0_nf; +extern cpuop_func op_4cd8_0_ff; +extern cpuop_func op_4ce8_0_nf; +extern cpuop_func op_4ce8_0_ff; +extern cpuop_func op_4cf0_0_nf; +extern cpuop_func op_4cf0_0_ff; +extern cpuop_func op_4cf8_0_nf; +extern cpuop_func op_4cf8_0_ff; +extern cpuop_func op_4cf9_0_nf; +extern cpuop_func op_4cf9_0_ff; +extern cpuop_func op_4cfa_0_nf; +extern cpuop_func op_4cfa_0_ff; +extern cpuop_func op_4cfb_0_nf; +extern cpuop_func op_4cfb_0_ff; +extern cpuop_func op_4e40_0_nf; +extern cpuop_func op_4e40_0_ff; +extern cpuop_func op_4e50_0_nf; +extern cpuop_func op_4e50_0_ff; +extern cpuop_func op_4e58_0_nf; +extern cpuop_func op_4e58_0_ff; +extern cpuop_func op_4e60_0_nf; +extern cpuop_func op_4e60_0_ff; +extern cpuop_func op_4e68_0_nf; +extern cpuop_func op_4e68_0_ff; +extern cpuop_func op_4e70_0_nf; +extern cpuop_func op_4e70_0_ff; +extern cpuop_func op_4e71_0_nf; +extern cpuop_func op_4e71_0_ff; +extern cpuop_func op_4e72_0_nf; +extern cpuop_func op_4e72_0_ff; +extern cpuop_func op_4e73_0_nf; +extern cpuop_func op_4e73_0_ff; +extern cpuop_func op_4e74_0_nf; +extern cpuop_func op_4e74_0_ff; +extern cpuop_func op_4e75_0_nf; +extern cpuop_func op_4e75_0_ff; +extern cpuop_func op_4e76_0_nf; +extern cpuop_func op_4e76_0_ff; +extern cpuop_func op_4e77_0_nf; +extern cpuop_func op_4e77_0_ff; +extern cpuop_func op_4e7a_0_nf; +extern cpuop_func op_4e7a_0_ff; +extern cpuop_func op_4e7b_0_nf; +extern cpuop_func op_4e7b_0_ff; +extern cpuop_func op_4e90_0_nf; +extern cpuop_func op_4e90_0_ff; +extern cpuop_func op_4ea8_0_nf; +extern cpuop_func op_4ea8_0_ff; +extern cpuop_func op_4eb0_0_nf; +extern cpuop_func op_4eb0_0_ff; +extern cpuop_func op_4eb8_0_nf; +extern cpuop_func op_4eb8_0_ff; +extern cpuop_func op_4eb9_0_nf; +extern cpuop_func op_4eb9_0_ff; +extern cpuop_func op_4eba_0_nf; +extern cpuop_func op_4eba_0_ff; +extern cpuop_func op_4ebb_0_nf; +extern cpuop_func op_4ebb_0_ff; +extern cpuop_func op_4ed0_0_nf; +extern cpuop_func op_4ed0_0_ff; +extern cpuop_func op_4ee8_0_nf; +extern cpuop_func op_4ee8_0_ff; +extern cpuop_func op_4ef0_0_nf; +extern cpuop_func op_4ef0_0_ff; +extern cpuop_func op_4ef8_0_nf; +extern cpuop_func op_4ef8_0_ff; +extern cpuop_func op_4ef9_0_nf; +extern cpuop_func op_4ef9_0_ff; +extern cpuop_func op_4efa_0_nf; +extern cpuop_func op_4efa_0_ff; +extern cpuop_func op_4efb_0_nf; +extern cpuop_func op_4efb_0_ff; +extern cpuop_func op_5000_0_nf; +extern cpuop_func op_5000_0_ff; +extern cpuop_func op_5010_0_nf; +extern cpuop_func op_5010_0_ff; +extern cpuop_func op_5018_0_nf; +extern cpuop_func op_5018_0_ff; +extern cpuop_func op_5020_0_nf; +extern cpuop_func op_5020_0_ff; +extern cpuop_func op_5028_0_nf; +extern cpuop_func op_5028_0_ff; +extern cpuop_func op_5030_0_nf; +extern cpuop_func op_5030_0_ff; +extern cpuop_func op_5038_0_nf; +extern cpuop_func op_5038_0_ff; +extern cpuop_func op_5039_0_nf; +extern cpuop_func op_5039_0_ff; +extern cpuop_func op_5040_0_nf; +extern cpuop_func op_5040_0_ff; +extern cpuop_func op_5048_0_nf; +extern cpuop_func op_5048_0_ff; +extern cpuop_func op_5050_0_nf; +extern cpuop_func op_5050_0_ff; +extern cpuop_func op_5058_0_nf; +extern cpuop_func op_5058_0_ff; +extern cpuop_func op_5060_0_nf; +extern cpuop_func op_5060_0_ff; +extern cpuop_func op_5068_0_nf; +extern cpuop_func op_5068_0_ff; +extern cpuop_func op_5070_0_nf; +extern cpuop_func op_5070_0_ff; +extern cpuop_func op_5078_0_nf; +extern cpuop_func op_5078_0_ff; +extern cpuop_func op_5079_0_nf; +extern cpuop_func op_5079_0_ff; +extern cpuop_func op_5080_0_nf; +extern cpuop_func op_5080_0_ff; +extern cpuop_func op_5088_0_nf; +extern cpuop_func op_5088_0_ff; +extern cpuop_func op_5090_0_nf; +extern cpuop_func op_5090_0_ff; +extern cpuop_func op_5098_0_nf; +extern cpuop_func op_5098_0_ff; +extern cpuop_func op_50a0_0_nf; +extern cpuop_func op_50a0_0_ff; +extern cpuop_func op_50a8_0_nf; +extern cpuop_func op_50a8_0_ff; +extern cpuop_func op_50b0_0_nf; +extern cpuop_func op_50b0_0_ff; +extern cpuop_func op_50b8_0_nf; +extern cpuop_func op_50b8_0_ff; +extern cpuop_func op_50b9_0_nf; +extern cpuop_func op_50b9_0_ff; +extern cpuop_func op_50c0_0_nf; +extern cpuop_func op_50c0_0_ff; +extern cpuop_func op_50c8_0_nf; +extern cpuop_func op_50c8_0_ff; +extern cpuop_func op_50d0_0_nf; +extern cpuop_func op_50d0_0_ff; +extern cpuop_func op_50d8_0_nf; +extern cpuop_func op_50d8_0_ff; +extern cpuop_func op_50e0_0_nf; +extern cpuop_func op_50e0_0_ff; +extern cpuop_func op_50e8_0_nf; +extern cpuop_func op_50e8_0_ff; +extern cpuop_func op_50f0_0_nf; +extern cpuop_func op_50f0_0_ff; +extern cpuop_func op_50f8_0_nf; +extern cpuop_func op_50f8_0_ff; +extern cpuop_func op_50f9_0_nf; +extern cpuop_func op_50f9_0_ff; +extern cpuop_func op_50fa_0_nf; +extern cpuop_func op_50fa_0_ff; +extern cpuop_func op_50fb_0_nf; +extern cpuop_func op_50fb_0_ff; +extern cpuop_func op_50fc_0_nf; +extern cpuop_func op_50fc_0_ff; +extern cpuop_func op_5100_0_nf; +extern cpuop_func op_5100_0_ff; +extern cpuop_func op_5110_0_nf; +extern cpuop_func op_5110_0_ff; +extern cpuop_func op_5118_0_nf; +extern cpuop_func op_5118_0_ff; +extern cpuop_func op_5120_0_nf; +extern cpuop_func op_5120_0_ff; +extern cpuop_func op_5128_0_nf; +extern cpuop_func op_5128_0_ff; +extern cpuop_func op_5130_0_nf; +extern cpuop_func op_5130_0_ff; +extern cpuop_func op_5138_0_nf; +extern cpuop_func op_5138_0_ff; +extern cpuop_func op_5139_0_nf; +extern cpuop_func op_5139_0_ff; +extern cpuop_func op_5140_0_nf; +extern cpuop_func op_5140_0_ff; +extern cpuop_func op_5148_0_nf; +extern cpuop_func op_5148_0_ff; +extern cpuop_func op_5150_0_nf; +extern cpuop_func op_5150_0_ff; +extern cpuop_func op_5158_0_nf; +extern cpuop_func op_5158_0_ff; +extern cpuop_func op_5160_0_nf; +extern cpuop_func op_5160_0_ff; +extern cpuop_func op_5168_0_nf; +extern cpuop_func op_5168_0_ff; +extern cpuop_func op_5170_0_nf; +extern cpuop_func op_5170_0_ff; +extern cpuop_func op_5178_0_nf; +extern cpuop_func op_5178_0_ff; +extern cpuop_func op_5179_0_nf; +extern cpuop_func op_5179_0_ff; +extern cpuop_func op_5180_0_nf; +extern cpuop_func op_5180_0_ff; +extern cpuop_func op_5188_0_nf; +extern cpuop_func op_5188_0_ff; +extern cpuop_func op_5190_0_nf; +extern cpuop_func op_5190_0_ff; +extern cpuop_func op_5198_0_nf; +extern cpuop_func op_5198_0_ff; +extern cpuop_func op_51a0_0_nf; +extern cpuop_func op_51a0_0_ff; +extern cpuop_func op_51a8_0_nf; +extern cpuop_func op_51a8_0_ff; +extern cpuop_func op_51b0_0_nf; +extern cpuop_func op_51b0_0_ff; +extern cpuop_func op_51b8_0_nf; +extern cpuop_func op_51b8_0_ff; +extern cpuop_func op_51b9_0_nf; +extern cpuop_func op_51b9_0_ff; +extern cpuop_func op_51c0_0_nf; +extern cpuop_func op_51c0_0_ff; +extern cpuop_func op_51c8_0_nf; +extern cpuop_func op_51c8_0_ff; +extern cpuop_func op_51d0_0_nf; +extern cpuop_func op_51d0_0_ff; +extern cpuop_func op_51d8_0_nf; +extern cpuop_func op_51d8_0_ff; +extern cpuop_func op_51e0_0_nf; +extern cpuop_func op_51e0_0_ff; +extern cpuop_func op_51e8_0_nf; +extern cpuop_func op_51e8_0_ff; +extern cpuop_func op_51f0_0_nf; +extern cpuop_func op_51f0_0_ff; +extern cpuop_func op_51f8_0_nf; +extern cpuop_func op_51f8_0_ff; +extern cpuop_func op_51f9_0_nf; +extern cpuop_func op_51f9_0_ff; +extern cpuop_func op_51fa_0_nf; +extern cpuop_func op_51fa_0_ff; +extern cpuop_func op_51fb_0_nf; +extern cpuop_func op_51fb_0_ff; +extern cpuop_func op_51fc_0_nf; +extern cpuop_func op_51fc_0_ff; +extern cpuop_func op_52c0_0_nf; +extern cpuop_func op_52c0_0_ff; +extern cpuop_func op_52c8_0_nf; +extern cpuop_func op_52c8_0_ff; +extern cpuop_func op_52d0_0_nf; +extern cpuop_func op_52d0_0_ff; +extern cpuop_func op_52d8_0_nf; +extern cpuop_func op_52d8_0_ff; +extern cpuop_func op_52e0_0_nf; +extern cpuop_func op_52e0_0_ff; +extern cpuop_func op_52e8_0_nf; +extern cpuop_func op_52e8_0_ff; +extern cpuop_func op_52f0_0_nf; +extern cpuop_func op_52f0_0_ff; +extern cpuop_func op_52f8_0_nf; +extern cpuop_func op_52f8_0_ff; +extern cpuop_func op_52f9_0_nf; +extern cpuop_func op_52f9_0_ff; +extern cpuop_func op_52fa_0_nf; +extern cpuop_func op_52fa_0_ff; +extern cpuop_func op_52fb_0_nf; +extern cpuop_func op_52fb_0_ff; +extern cpuop_func op_52fc_0_nf; +extern cpuop_func op_52fc_0_ff; +extern cpuop_func op_53c0_0_nf; +extern cpuop_func op_53c0_0_ff; +extern cpuop_func op_53c8_0_nf; +extern cpuop_func op_53c8_0_ff; +extern cpuop_func op_53d0_0_nf; +extern cpuop_func op_53d0_0_ff; +extern cpuop_func op_53d8_0_nf; +extern cpuop_func op_53d8_0_ff; +extern cpuop_func op_53e0_0_nf; +extern cpuop_func op_53e0_0_ff; +extern cpuop_func op_53e8_0_nf; +extern cpuop_func op_53e8_0_ff; +extern cpuop_func op_53f0_0_nf; +extern cpuop_func op_53f0_0_ff; +extern cpuop_func op_53f8_0_nf; +extern cpuop_func op_53f8_0_ff; +extern cpuop_func op_53f9_0_nf; +extern cpuop_func op_53f9_0_ff; +extern cpuop_func op_53fa_0_nf; +extern cpuop_func op_53fa_0_ff; +extern cpuop_func op_53fb_0_nf; +extern cpuop_func op_53fb_0_ff; +extern cpuop_func op_53fc_0_nf; +extern cpuop_func op_53fc_0_ff; +extern cpuop_func op_54c0_0_nf; +extern cpuop_func op_54c0_0_ff; +extern cpuop_func op_54c8_0_nf; +extern cpuop_func op_54c8_0_ff; +extern cpuop_func op_54d0_0_nf; +extern cpuop_func op_54d0_0_ff; +extern cpuop_func op_54d8_0_nf; +extern cpuop_func op_54d8_0_ff; +extern cpuop_func op_54e0_0_nf; +extern cpuop_func op_54e0_0_ff; +extern cpuop_func op_54e8_0_nf; +extern cpuop_func op_54e8_0_ff; +extern cpuop_func op_54f0_0_nf; +extern cpuop_func op_54f0_0_ff; +extern cpuop_func op_54f8_0_nf; +extern cpuop_func op_54f8_0_ff; +extern cpuop_func op_54f9_0_nf; +extern cpuop_func op_54f9_0_ff; +extern cpuop_func op_54fa_0_nf; +extern cpuop_func op_54fa_0_ff; +extern cpuop_func op_54fb_0_nf; +extern cpuop_func op_54fb_0_ff; +extern cpuop_func op_54fc_0_nf; +extern cpuop_func op_54fc_0_ff; +extern cpuop_func op_55c0_0_nf; +extern cpuop_func op_55c0_0_ff; +extern cpuop_func op_55c8_0_nf; +extern cpuop_func op_55c8_0_ff; +extern cpuop_func op_55d0_0_nf; +extern cpuop_func op_55d0_0_ff; +extern cpuop_func op_55d8_0_nf; +extern cpuop_func op_55d8_0_ff; +extern cpuop_func op_55e0_0_nf; +extern cpuop_func op_55e0_0_ff; +extern cpuop_func op_55e8_0_nf; +extern cpuop_func op_55e8_0_ff; +extern cpuop_func op_55f0_0_nf; +extern cpuop_func op_55f0_0_ff; +extern cpuop_func op_55f8_0_nf; +extern cpuop_func op_55f8_0_ff; +extern cpuop_func op_55f9_0_nf; +extern cpuop_func op_55f9_0_ff; +extern cpuop_func op_55fa_0_nf; +extern cpuop_func op_55fa_0_ff; +extern cpuop_func op_55fb_0_nf; +extern cpuop_func op_55fb_0_ff; +extern cpuop_func op_55fc_0_nf; +extern cpuop_func op_55fc_0_ff; +extern cpuop_func op_56c0_0_nf; +extern cpuop_func op_56c0_0_ff; +extern cpuop_func op_56c8_0_nf; +extern cpuop_func op_56c8_0_ff; +extern cpuop_func op_56d0_0_nf; +extern cpuop_func op_56d0_0_ff; +extern cpuop_func op_56d8_0_nf; +extern cpuop_func op_56d8_0_ff; +extern cpuop_func op_56e0_0_nf; +extern cpuop_func op_56e0_0_ff; +extern cpuop_func op_56e8_0_nf; +extern cpuop_func op_56e8_0_ff; +extern cpuop_func op_56f0_0_nf; +extern cpuop_func op_56f0_0_ff; +extern cpuop_func op_56f8_0_nf; +extern cpuop_func op_56f8_0_ff; +extern cpuop_func op_56f9_0_nf; +extern cpuop_func op_56f9_0_ff; +extern cpuop_func op_56fa_0_nf; +extern cpuop_func op_56fa_0_ff; +extern cpuop_func op_56fb_0_nf; +extern cpuop_func op_56fb_0_ff; +extern cpuop_func op_56fc_0_nf; +extern cpuop_func op_56fc_0_ff; +extern cpuop_func op_57c0_0_nf; +extern cpuop_func op_57c0_0_ff; +extern cpuop_func op_57c8_0_nf; +extern cpuop_func op_57c8_0_ff; +extern cpuop_func op_57d0_0_nf; +extern cpuop_func op_57d0_0_ff; +extern cpuop_func op_57d8_0_nf; +extern cpuop_func op_57d8_0_ff; +extern cpuop_func op_57e0_0_nf; +extern cpuop_func op_57e0_0_ff; +extern cpuop_func op_57e8_0_nf; +extern cpuop_func op_57e8_0_ff; +extern cpuop_func op_57f0_0_nf; +extern cpuop_func op_57f0_0_ff; +extern cpuop_func op_57f8_0_nf; +extern cpuop_func op_57f8_0_ff; +extern cpuop_func op_57f9_0_nf; +extern cpuop_func op_57f9_0_ff; +extern cpuop_func op_57fa_0_nf; +extern cpuop_func op_57fa_0_ff; +extern cpuop_func op_57fb_0_nf; +extern cpuop_func op_57fb_0_ff; +extern cpuop_func op_57fc_0_nf; +extern cpuop_func op_57fc_0_ff; +extern cpuop_func op_58c0_0_nf; +extern cpuop_func op_58c0_0_ff; +extern cpuop_func op_58c8_0_nf; +extern cpuop_func op_58c8_0_ff; +extern cpuop_func op_58d0_0_nf; +extern cpuop_func op_58d0_0_ff; +extern cpuop_func op_58d8_0_nf; +extern cpuop_func op_58d8_0_ff; +extern cpuop_func op_58e0_0_nf; +extern cpuop_func op_58e0_0_ff; +extern cpuop_func op_58e8_0_nf; +extern cpuop_func op_58e8_0_ff; +extern cpuop_func op_58f0_0_nf; +extern cpuop_func op_58f0_0_ff; +extern cpuop_func op_58f8_0_nf; +extern cpuop_func op_58f8_0_ff; +extern cpuop_func op_58f9_0_nf; +extern cpuop_func op_58f9_0_ff; +extern cpuop_func op_58fa_0_nf; +extern cpuop_func op_58fa_0_ff; +extern cpuop_func op_58fb_0_nf; +extern cpuop_func op_58fb_0_ff; +extern cpuop_func op_58fc_0_nf; +extern cpuop_func op_58fc_0_ff; +extern cpuop_func op_59c0_0_nf; +extern cpuop_func op_59c0_0_ff; +extern cpuop_func op_59c8_0_nf; +extern cpuop_func op_59c8_0_ff; +extern cpuop_func op_59d0_0_nf; +extern cpuop_func op_59d0_0_ff; +extern cpuop_func op_59d8_0_nf; +extern cpuop_func op_59d8_0_ff; +extern cpuop_func op_59e0_0_nf; +extern cpuop_func op_59e0_0_ff; +extern cpuop_func op_59e8_0_nf; +extern cpuop_func op_59e8_0_ff; +extern cpuop_func op_59f0_0_nf; +extern cpuop_func op_59f0_0_ff; +extern cpuop_func op_59f8_0_nf; +extern cpuop_func op_59f8_0_ff; +extern cpuop_func op_59f9_0_nf; +extern cpuop_func op_59f9_0_ff; +extern cpuop_func op_59fa_0_nf; +extern cpuop_func op_59fa_0_ff; +extern cpuop_func op_59fb_0_nf; +extern cpuop_func op_59fb_0_ff; +extern cpuop_func op_59fc_0_nf; +extern cpuop_func op_59fc_0_ff; +extern cpuop_func op_5ac0_0_nf; +extern cpuop_func op_5ac0_0_ff; +extern cpuop_func op_5ac8_0_nf; +extern cpuop_func op_5ac8_0_ff; +extern cpuop_func op_5ad0_0_nf; +extern cpuop_func op_5ad0_0_ff; +extern cpuop_func op_5ad8_0_nf; +extern cpuop_func op_5ad8_0_ff; +extern cpuop_func op_5ae0_0_nf; +extern cpuop_func op_5ae0_0_ff; +extern cpuop_func op_5ae8_0_nf; +extern cpuop_func op_5ae8_0_ff; +extern cpuop_func op_5af0_0_nf; +extern cpuop_func op_5af0_0_ff; +extern cpuop_func op_5af8_0_nf; +extern cpuop_func op_5af8_0_ff; +extern cpuop_func op_5af9_0_nf; +extern cpuop_func op_5af9_0_ff; +extern cpuop_func op_5afa_0_nf; +extern cpuop_func op_5afa_0_ff; +extern cpuop_func op_5afb_0_nf; +extern cpuop_func op_5afb_0_ff; +extern cpuop_func op_5afc_0_nf; +extern cpuop_func op_5afc_0_ff; +extern cpuop_func op_5bc0_0_nf; +extern cpuop_func op_5bc0_0_ff; +extern cpuop_func op_5bc8_0_nf; +extern cpuop_func op_5bc8_0_ff; +extern cpuop_func op_5bd0_0_nf; +extern cpuop_func op_5bd0_0_ff; +extern cpuop_func op_5bd8_0_nf; +extern cpuop_func op_5bd8_0_ff; +extern cpuop_func op_5be0_0_nf; +extern cpuop_func op_5be0_0_ff; +extern cpuop_func op_5be8_0_nf; +extern cpuop_func op_5be8_0_ff; +extern cpuop_func op_5bf0_0_nf; +extern cpuop_func op_5bf0_0_ff; +extern cpuop_func op_5bf8_0_nf; +extern cpuop_func op_5bf8_0_ff; +extern cpuop_func op_5bf9_0_nf; +extern cpuop_func op_5bf9_0_ff; +extern cpuop_func op_5bfa_0_nf; +extern cpuop_func op_5bfa_0_ff; +extern cpuop_func op_5bfb_0_nf; +extern cpuop_func op_5bfb_0_ff; +extern cpuop_func op_5bfc_0_nf; +extern cpuop_func op_5bfc_0_ff; +extern cpuop_func op_5cc0_0_nf; +extern cpuop_func op_5cc0_0_ff; +extern cpuop_func op_5cc8_0_nf; +extern cpuop_func op_5cc8_0_ff; +extern cpuop_func op_5cd0_0_nf; +extern cpuop_func op_5cd0_0_ff; +extern cpuop_func op_5cd8_0_nf; +extern cpuop_func op_5cd8_0_ff; +extern cpuop_func op_5ce0_0_nf; +extern cpuop_func op_5ce0_0_ff; +extern cpuop_func op_5ce8_0_nf; +extern cpuop_func op_5ce8_0_ff; +extern cpuop_func op_5cf0_0_nf; +extern cpuop_func op_5cf0_0_ff; +extern cpuop_func op_5cf8_0_nf; +extern cpuop_func op_5cf8_0_ff; +extern cpuop_func op_5cf9_0_nf; +extern cpuop_func op_5cf9_0_ff; +extern cpuop_func op_5cfa_0_nf; +extern cpuop_func op_5cfa_0_ff; +extern cpuop_func op_5cfb_0_nf; +extern cpuop_func op_5cfb_0_ff; +extern cpuop_func op_5cfc_0_nf; +extern cpuop_func op_5cfc_0_ff; +extern cpuop_func op_5dc0_0_nf; +extern cpuop_func op_5dc0_0_ff; +extern cpuop_func op_5dc8_0_nf; +extern cpuop_func op_5dc8_0_ff; +extern cpuop_func op_5dd0_0_nf; +extern cpuop_func op_5dd0_0_ff; +extern cpuop_func op_5dd8_0_nf; +extern cpuop_func op_5dd8_0_ff; +extern cpuop_func op_5de0_0_nf; +extern cpuop_func op_5de0_0_ff; +extern cpuop_func op_5de8_0_nf; +extern cpuop_func op_5de8_0_ff; +extern cpuop_func op_5df0_0_nf; +extern cpuop_func op_5df0_0_ff; +extern cpuop_func op_5df8_0_nf; +extern cpuop_func op_5df8_0_ff; +extern cpuop_func op_5df9_0_nf; +extern cpuop_func op_5df9_0_ff; +extern cpuop_func op_5dfa_0_nf; +extern cpuop_func op_5dfa_0_ff; +extern cpuop_func op_5dfb_0_nf; +extern cpuop_func op_5dfb_0_ff; +extern cpuop_func op_5dfc_0_nf; +extern cpuop_func op_5dfc_0_ff; +extern cpuop_func op_5ec0_0_nf; +extern cpuop_func op_5ec0_0_ff; +extern cpuop_func op_5ec8_0_nf; +extern cpuop_func op_5ec8_0_ff; +extern cpuop_func op_5ed0_0_nf; +extern cpuop_func op_5ed0_0_ff; +extern cpuop_func op_5ed8_0_nf; +extern cpuop_func op_5ed8_0_ff; +extern cpuop_func op_5ee0_0_nf; +extern cpuop_func op_5ee0_0_ff; +extern cpuop_func op_5ee8_0_nf; +extern cpuop_func op_5ee8_0_ff; +extern cpuop_func op_5ef0_0_nf; +extern cpuop_func op_5ef0_0_ff; +extern cpuop_func op_5ef8_0_nf; +extern cpuop_func op_5ef8_0_ff; +extern cpuop_func op_5ef9_0_nf; +extern cpuop_func op_5ef9_0_ff; +extern cpuop_func op_5efa_0_nf; +extern cpuop_func op_5efa_0_ff; +extern cpuop_func op_5efb_0_nf; +extern cpuop_func op_5efb_0_ff; +extern cpuop_func op_5efc_0_nf; +extern cpuop_func op_5efc_0_ff; +extern cpuop_func op_5fc0_0_nf; +extern cpuop_func op_5fc0_0_ff; +extern cpuop_func op_5fc8_0_nf; +extern cpuop_func op_5fc8_0_ff; +extern cpuop_func op_5fd0_0_nf; +extern cpuop_func op_5fd0_0_ff; +extern cpuop_func op_5fd8_0_nf; +extern cpuop_func op_5fd8_0_ff; +extern cpuop_func op_5fe0_0_nf; +extern cpuop_func op_5fe0_0_ff; +extern cpuop_func op_5fe8_0_nf; +extern cpuop_func op_5fe8_0_ff; +extern cpuop_func op_5ff0_0_nf; +extern cpuop_func op_5ff0_0_ff; +extern cpuop_func op_5ff8_0_nf; +extern cpuop_func op_5ff8_0_ff; +extern cpuop_func op_5ff9_0_nf; +extern cpuop_func op_5ff9_0_ff; +extern cpuop_func op_5ffa_0_nf; +extern cpuop_func op_5ffa_0_ff; +extern cpuop_func op_5ffb_0_nf; +extern cpuop_func op_5ffb_0_ff; +extern cpuop_func op_5ffc_0_nf; +extern cpuop_func op_5ffc_0_ff; +extern cpuop_func op_6000_0_nf; +extern cpuop_func op_6000_0_ff; +extern cpuop_func op_6001_0_nf; +extern cpuop_func op_6001_0_ff; +extern cpuop_func op_60ff_0_nf; +extern cpuop_func op_60ff_0_ff; +extern cpuop_func op_6100_0_nf; +extern cpuop_func op_6100_0_ff; +extern cpuop_func op_6101_0_nf; +extern cpuop_func op_6101_0_ff; +extern cpuop_func op_61ff_0_nf; +extern cpuop_func op_61ff_0_ff; +extern cpuop_func op_6200_0_nf; +extern cpuop_func op_6200_0_ff; +extern cpuop_func op_6201_0_nf; +extern cpuop_func op_6201_0_ff; +extern cpuop_func op_62ff_0_nf; +extern cpuop_func op_62ff_0_ff; +extern cpuop_func op_6300_0_nf; +extern cpuop_func op_6300_0_ff; +extern cpuop_func op_6301_0_nf; +extern cpuop_func op_6301_0_ff; +extern cpuop_func op_63ff_0_nf; +extern cpuop_func op_63ff_0_ff; +extern cpuop_func op_6400_0_nf; +extern cpuop_func op_6400_0_ff; +extern cpuop_func op_6401_0_nf; +extern cpuop_func op_6401_0_ff; +extern cpuop_func op_64ff_0_nf; +extern cpuop_func op_64ff_0_ff; +extern cpuop_func op_6500_0_nf; +extern cpuop_func op_6500_0_ff; +extern cpuop_func op_6501_0_nf; +extern cpuop_func op_6501_0_ff; +extern cpuop_func op_65ff_0_nf; +extern cpuop_func op_65ff_0_ff; +extern cpuop_func op_6600_0_nf; +extern cpuop_func op_6600_0_ff; +extern cpuop_func op_6601_0_nf; +extern cpuop_func op_6601_0_ff; +extern cpuop_func op_66ff_0_nf; +extern cpuop_func op_66ff_0_ff; +extern cpuop_func op_6700_0_nf; +extern cpuop_func op_6700_0_ff; +extern cpuop_func op_6701_0_nf; +extern cpuop_func op_6701_0_ff; +extern cpuop_func op_67ff_0_nf; +extern cpuop_func op_67ff_0_ff; +extern cpuop_func op_6800_0_nf; +extern cpuop_func op_6800_0_ff; +extern cpuop_func op_6801_0_nf; +extern cpuop_func op_6801_0_ff; +extern cpuop_func op_68ff_0_nf; +extern cpuop_func op_68ff_0_ff; +extern cpuop_func op_6900_0_nf; +extern cpuop_func op_6900_0_ff; +extern cpuop_func op_6901_0_nf; +extern cpuop_func op_6901_0_ff; +extern cpuop_func op_69ff_0_nf; +extern cpuop_func op_69ff_0_ff; +extern cpuop_func op_6a00_0_nf; +extern cpuop_func op_6a00_0_ff; +extern cpuop_func op_6a01_0_nf; +extern cpuop_func op_6a01_0_ff; +extern cpuop_func op_6aff_0_nf; +extern cpuop_func op_6aff_0_ff; +extern cpuop_func op_6b00_0_nf; +extern cpuop_func op_6b00_0_ff; +extern cpuop_func op_6b01_0_nf; +extern cpuop_func op_6b01_0_ff; +extern cpuop_func op_6bff_0_nf; +extern cpuop_func op_6bff_0_ff; +extern cpuop_func op_6c00_0_nf; +extern cpuop_func op_6c00_0_ff; +extern cpuop_func op_6c01_0_nf; +extern cpuop_func op_6c01_0_ff; +extern cpuop_func op_6cff_0_nf; +extern cpuop_func op_6cff_0_ff; +extern cpuop_func op_6d00_0_nf; +extern cpuop_func op_6d00_0_ff; +extern cpuop_func op_6d01_0_nf; +extern cpuop_func op_6d01_0_ff; +extern cpuop_func op_6dff_0_nf; +extern cpuop_func op_6dff_0_ff; +extern cpuop_func op_6e00_0_nf; +extern cpuop_func op_6e00_0_ff; +extern cpuop_func op_6e01_0_nf; +extern cpuop_func op_6e01_0_ff; +extern cpuop_func op_6eff_0_nf; +extern cpuop_func op_6eff_0_ff; +extern cpuop_func op_6f00_0_nf; +extern cpuop_func op_6f00_0_ff; +extern cpuop_func op_6f01_0_nf; +extern cpuop_func op_6f01_0_ff; +extern cpuop_func op_6fff_0_nf; +extern cpuop_func op_6fff_0_ff; +extern cpuop_func op_7000_0_nf; +extern cpuop_func op_7000_0_ff; +extern cpuop_func op_8000_0_nf; +extern cpuop_func op_8000_0_ff; +extern cpuop_func op_8010_0_nf; +extern cpuop_func op_8010_0_ff; +extern cpuop_func op_8018_0_nf; +extern cpuop_func op_8018_0_ff; +extern cpuop_func op_8020_0_nf; +extern cpuop_func op_8020_0_ff; +extern cpuop_func op_8028_0_nf; +extern cpuop_func op_8028_0_ff; +extern cpuop_func op_8030_0_nf; +extern cpuop_func op_8030_0_ff; +extern cpuop_func op_8038_0_nf; +extern cpuop_func op_8038_0_ff; +extern cpuop_func op_8039_0_nf; +extern cpuop_func op_8039_0_ff; +extern cpuop_func op_803a_0_nf; +extern cpuop_func op_803a_0_ff; +extern cpuop_func op_803b_0_nf; +extern cpuop_func op_803b_0_ff; +extern cpuop_func op_803c_0_nf; +extern cpuop_func op_803c_0_ff; +extern cpuop_func op_8040_0_nf; +extern cpuop_func op_8040_0_ff; +extern cpuop_func op_8050_0_nf; +extern cpuop_func op_8050_0_ff; +extern cpuop_func op_8058_0_nf; +extern cpuop_func op_8058_0_ff; +extern cpuop_func op_8060_0_nf; +extern cpuop_func op_8060_0_ff; +extern cpuop_func op_8068_0_nf; +extern cpuop_func op_8068_0_ff; +extern cpuop_func op_8070_0_nf; +extern cpuop_func op_8070_0_ff; +extern cpuop_func op_8078_0_nf; +extern cpuop_func op_8078_0_ff; +extern cpuop_func op_8079_0_nf; +extern cpuop_func op_8079_0_ff; +extern cpuop_func op_807a_0_nf; +extern cpuop_func op_807a_0_ff; +extern cpuop_func op_807b_0_nf; +extern cpuop_func op_807b_0_ff; +extern cpuop_func op_807c_0_nf; +extern cpuop_func op_807c_0_ff; +extern cpuop_func op_8080_0_nf; +extern cpuop_func op_8080_0_ff; +extern cpuop_func op_8090_0_nf; +extern cpuop_func op_8090_0_ff; +extern cpuop_func op_8098_0_nf; +extern cpuop_func op_8098_0_ff; +extern cpuop_func op_80a0_0_nf; +extern cpuop_func op_80a0_0_ff; +extern cpuop_func op_80a8_0_nf; +extern cpuop_func op_80a8_0_ff; +extern cpuop_func op_80b0_0_nf; +extern cpuop_func op_80b0_0_ff; +extern cpuop_func op_80b8_0_nf; +extern cpuop_func op_80b8_0_ff; +extern cpuop_func op_80b9_0_nf; +extern cpuop_func op_80b9_0_ff; +extern cpuop_func op_80ba_0_nf; +extern cpuop_func op_80ba_0_ff; +extern cpuop_func op_80bb_0_nf; +extern cpuop_func op_80bb_0_ff; +extern cpuop_func op_80bc_0_nf; +extern cpuop_func op_80bc_0_ff; +extern cpuop_func op_80c0_0_nf; +extern cpuop_func op_80c0_0_ff; +extern cpuop_func op_80d0_0_nf; +extern cpuop_func op_80d0_0_ff; +extern cpuop_func op_80d8_0_nf; +extern cpuop_func op_80d8_0_ff; +extern cpuop_func op_80e0_0_nf; +extern cpuop_func op_80e0_0_ff; +extern cpuop_func op_80e8_0_nf; +extern cpuop_func op_80e8_0_ff; +extern cpuop_func op_80f0_0_nf; +extern cpuop_func op_80f0_0_ff; +extern cpuop_func op_80f8_0_nf; +extern cpuop_func op_80f8_0_ff; +extern cpuop_func op_80f9_0_nf; +extern cpuop_func op_80f9_0_ff; +extern cpuop_func op_80fa_0_nf; +extern cpuop_func op_80fa_0_ff; +extern cpuop_func op_80fb_0_nf; +extern cpuop_func op_80fb_0_ff; +extern cpuop_func op_80fc_0_nf; +extern cpuop_func op_80fc_0_ff; +extern cpuop_func op_8100_0_nf; +extern cpuop_func op_8100_0_ff; +extern cpuop_func op_8108_0_nf; +extern cpuop_func op_8108_0_ff; +extern cpuop_func op_8110_0_nf; +extern cpuop_func op_8110_0_ff; +extern cpuop_func op_8118_0_nf; +extern cpuop_func op_8118_0_ff; +extern cpuop_func op_8120_0_nf; +extern cpuop_func op_8120_0_ff; +extern cpuop_func op_8128_0_nf; +extern cpuop_func op_8128_0_ff; +extern cpuop_func op_8130_0_nf; +extern cpuop_func op_8130_0_ff; +extern cpuop_func op_8138_0_nf; +extern cpuop_func op_8138_0_ff; +extern cpuop_func op_8139_0_nf; +extern cpuop_func op_8139_0_ff; +extern cpuop_func op_8140_0_nf; +extern cpuop_func op_8140_0_ff; +extern cpuop_func op_8148_0_nf; +extern cpuop_func op_8148_0_ff; +extern cpuop_func op_8150_0_nf; +extern cpuop_func op_8150_0_ff; +extern cpuop_func op_8158_0_nf; +extern cpuop_func op_8158_0_ff; +extern cpuop_func op_8160_0_nf; +extern cpuop_func op_8160_0_ff; +extern cpuop_func op_8168_0_nf; +extern cpuop_func op_8168_0_ff; +extern cpuop_func op_8170_0_nf; +extern cpuop_func op_8170_0_ff; +extern cpuop_func op_8178_0_nf; +extern cpuop_func op_8178_0_ff; +extern cpuop_func op_8179_0_nf; +extern cpuop_func op_8179_0_ff; +extern cpuop_func op_8180_0_nf; +extern cpuop_func op_8180_0_ff; +extern cpuop_func op_8188_0_nf; +extern cpuop_func op_8188_0_ff; +extern cpuop_func op_8190_0_nf; +extern cpuop_func op_8190_0_ff; +extern cpuop_func op_8198_0_nf; +extern cpuop_func op_8198_0_ff; +extern cpuop_func op_81a0_0_nf; +extern cpuop_func op_81a0_0_ff; +extern cpuop_func op_81a8_0_nf; +extern cpuop_func op_81a8_0_ff; +extern cpuop_func op_81b0_0_nf; +extern cpuop_func op_81b0_0_ff; +extern cpuop_func op_81b8_0_nf; +extern cpuop_func op_81b8_0_ff; +extern cpuop_func op_81b9_0_nf; +extern cpuop_func op_81b9_0_ff; +extern cpuop_func op_81c0_0_nf; +extern cpuop_func op_81c0_0_ff; +extern cpuop_func op_81d0_0_nf; +extern cpuop_func op_81d0_0_ff; +extern cpuop_func op_81d8_0_nf; +extern cpuop_func op_81d8_0_ff; +extern cpuop_func op_81e0_0_nf; +extern cpuop_func op_81e0_0_ff; +extern cpuop_func op_81e8_0_nf; +extern cpuop_func op_81e8_0_ff; +extern cpuop_func op_81f0_0_nf; +extern cpuop_func op_81f0_0_ff; +extern cpuop_func op_81f8_0_nf; +extern cpuop_func op_81f8_0_ff; +extern cpuop_func op_81f9_0_nf; +extern cpuop_func op_81f9_0_ff; +extern cpuop_func op_81fa_0_nf; +extern cpuop_func op_81fa_0_ff; +extern cpuop_func op_81fb_0_nf; +extern cpuop_func op_81fb_0_ff; +extern cpuop_func op_81fc_0_nf; +extern cpuop_func op_81fc_0_ff; +extern cpuop_func op_9000_0_nf; +extern cpuop_func op_9000_0_ff; +extern cpuop_func op_9010_0_nf; +extern cpuop_func op_9010_0_ff; +extern cpuop_func op_9018_0_nf; +extern cpuop_func op_9018_0_ff; +extern cpuop_func op_9020_0_nf; +extern cpuop_func op_9020_0_ff; +extern cpuop_func op_9028_0_nf; +extern cpuop_func op_9028_0_ff; +extern cpuop_func op_9030_0_nf; +extern cpuop_func op_9030_0_ff; +extern cpuop_func op_9038_0_nf; +extern cpuop_func op_9038_0_ff; +extern cpuop_func op_9039_0_nf; +extern cpuop_func op_9039_0_ff; +extern cpuop_func op_903a_0_nf; +extern cpuop_func op_903a_0_ff; +extern cpuop_func op_903b_0_nf; +extern cpuop_func op_903b_0_ff; +extern cpuop_func op_903c_0_nf; +extern cpuop_func op_903c_0_ff; +extern cpuop_func op_9040_0_nf; +extern cpuop_func op_9040_0_ff; +extern cpuop_func op_9048_0_nf; +extern cpuop_func op_9048_0_ff; +extern cpuop_func op_9050_0_nf; +extern cpuop_func op_9050_0_ff; +extern cpuop_func op_9058_0_nf; +extern cpuop_func op_9058_0_ff; +extern cpuop_func op_9060_0_nf; +extern cpuop_func op_9060_0_ff; +extern cpuop_func op_9068_0_nf; +extern cpuop_func op_9068_0_ff; +extern cpuop_func op_9070_0_nf; +extern cpuop_func op_9070_0_ff; +extern cpuop_func op_9078_0_nf; +extern cpuop_func op_9078_0_ff; +extern cpuop_func op_9079_0_nf; +extern cpuop_func op_9079_0_ff; +extern cpuop_func op_907a_0_nf; +extern cpuop_func op_907a_0_ff; +extern cpuop_func op_907b_0_nf; +extern cpuop_func op_907b_0_ff; +extern cpuop_func op_907c_0_nf; +extern cpuop_func op_907c_0_ff; +extern cpuop_func op_9080_0_nf; +extern cpuop_func op_9080_0_ff; +extern cpuop_func op_9088_0_nf; +extern cpuop_func op_9088_0_ff; +extern cpuop_func op_9090_0_nf; +extern cpuop_func op_9090_0_ff; +extern cpuop_func op_9098_0_nf; +extern cpuop_func op_9098_0_ff; +extern cpuop_func op_90a0_0_nf; +extern cpuop_func op_90a0_0_ff; +extern cpuop_func op_90a8_0_nf; +extern cpuop_func op_90a8_0_ff; +extern cpuop_func op_90b0_0_nf; +extern cpuop_func op_90b0_0_ff; +extern cpuop_func op_90b8_0_nf; +extern cpuop_func op_90b8_0_ff; +extern cpuop_func op_90b9_0_nf; +extern cpuop_func op_90b9_0_ff; +extern cpuop_func op_90ba_0_nf; +extern cpuop_func op_90ba_0_ff; +extern cpuop_func op_90bb_0_nf; +extern cpuop_func op_90bb_0_ff; +extern cpuop_func op_90bc_0_nf; +extern cpuop_func op_90bc_0_ff; +extern cpuop_func op_90c0_0_nf; +extern cpuop_func op_90c0_0_ff; +extern cpuop_func op_90c8_0_nf; +extern cpuop_func op_90c8_0_ff; +extern cpuop_func op_90d0_0_nf; +extern cpuop_func op_90d0_0_ff; +extern cpuop_func op_90d8_0_nf; +extern cpuop_func op_90d8_0_ff; +extern cpuop_func op_90e0_0_nf; +extern cpuop_func op_90e0_0_ff; +extern cpuop_func op_90e8_0_nf; +extern cpuop_func op_90e8_0_ff; +extern cpuop_func op_90f0_0_nf; +extern cpuop_func op_90f0_0_ff; +extern cpuop_func op_90f8_0_nf; +extern cpuop_func op_90f8_0_ff; +extern cpuop_func op_90f9_0_nf; +extern cpuop_func op_90f9_0_ff; +extern cpuop_func op_90fa_0_nf; +extern cpuop_func op_90fa_0_ff; +extern cpuop_func op_90fb_0_nf; +extern cpuop_func op_90fb_0_ff; +extern cpuop_func op_90fc_0_nf; +extern cpuop_func op_90fc_0_ff; +extern cpuop_func op_9100_0_nf; +extern cpuop_func op_9100_0_ff; +extern cpuop_func op_9108_0_nf; +extern cpuop_func op_9108_0_ff; +extern cpuop_func op_9110_0_nf; +extern cpuop_func op_9110_0_ff; +extern cpuop_func op_9118_0_nf; +extern cpuop_func op_9118_0_ff; +extern cpuop_func op_9120_0_nf; +extern cpuop_func op_9120_0_ff; +extern cpuop_func op_9128_0_nf; +extern cpuop_func op_9128_0_ff; +extern cpuop_func op_9130_0_nf; +extern cpuop_func op_9130_0_ff; +extern cpuop_func op_9138_0_nf; +extern cpuop_func op_9138_0_ff; +extern cpuop_func op_9139_0_nf; +extern cpuop_func op_9139_0_ff; +extern cpuop_func op_9140_0_nf; +extern cpuop_func op_9140_0_ff; +extern cpuop_func op_9148_0_nf; +extern cpuop_func op_9148_0_ff; +extern cpuop_func op_9150_0_nf; +extern cpuop_func op_9150_0_ff; +extern cpuop_func op_9158_0_nf; +extern cpuop_func op_9158_0_ff; +extern cpuop_func op_9160_0_nf; +extern cpuop_func op_9160_0_ff; +extern cpuop_func op_9168_0_nf; +extern cpuop_func op_9168_0_ff; +extern cpuop_func op_9170_0_nf; +extern cpuop_func op_9170_0_ff; +extern cpuop_func op_9178_0_nf; +extern cpuop_func op_9178_0_ff; +extern cpuop_func op_9179_0_nf; +extern cpuop_func op_9179_0_ff; +extern cpuop_func op_9180_0_nf; +extern cpuop_func op_9180_0_ff; +extern cpuop_func op_9188_0_nf; +extern cpuop_func op_9188_0_ff; +extern cpuop_func op_9190_0_nf; +extern cpuop_func op_9190_0_ff; +extern cpuop_func op_9198_0_nf; +extern cpuop_func op_9198_0_ff; +extern cpuop_func op_91a0_0_nf; +extern cpuop_func op_91a0_0_ff; +extern cpuop_func op_91a8_0_nf; +extern cpuop_func op_91a8_0_ff; +extern cpuop_func op_91b0_0_nf; +extern cpuop_func op_91b0_0_ff; +extern cpuop_func op_91b8_0_nf; +extern cpuop_func op_91b8_0_ff; +extern cpuop_func op_91b9_0_nf; +extern cpuop_func op_91b9_0_ff; +extern cpuop_func op_91c0_0_nf; +extern cpuop_func op_91c0_0_ff; +extern cpuop_func op_91c8_0_nf; +extern cpuop_func op_91c8_0_ff; +extern cpuop_func op_91d0_0_nf; +extern cpuop_func op_91d0_0_ff; +extern cpuop_func op_91d8_0_nf; +extern cpuop_func op_91d8_0_ff; +extern cpuop_func op_91e0_0_nf; +extern cpuop_func op_91e0_0_ff; +extern cpuop_func op_91e8_0_nf; +extern cpuop_func op_91e8_0_ff; +extern cpuop_func op_91f0_0_nf; +extern cpuop_func op_91f0_0_ff; +extern cpuop_func op_91f8_0_nf; +extern cpuop_func op_91f8_0_ff; +extern cpuop_func op_91f9_0_nf; +extern cpuop_func op_91f9_0_ff; +extern cpuop_func op_91fa_0_nf; +extern cpuop_func op_91fa_0_ff; +extern cpuop_func op_91fb_0_nf; +extern cpuop_func op_91fb_0_ff; +extern cpuop_func op_91fc_0_nf; +extern cpuop_func op_91fc_0_ff; +extern cpuop_func op_b000_0_nf; +extern cpuop_func op_b000_0_ff; +extern cpuop_func op_b010_0_nf; +extern cpuop_func op_b010_0_ff; +extern cpuop_func op_b018_0_nf; +extern cpuop_func op_b018_0_ff; +extern cpuop_func op_b020_0_nf; +extern cpuop_func op_b020_0_ff; +extern cpuop_func op_b028_0_nf; +extern cpuop_func op_b028_0_ff; +extern cpuop_func op_b030_0_nf; +extern cpuop_func op_b030_0_ff; +extern cpuop_func op_b038_0_nf; +extern cpuop_func op_b038_0_ff; +extern cpuop_func op_b039_0_nf; +extern cpuop_func op_b039_0_ff; +extern cpuop_func op_b03a_0_nf; +extern cpuop_func op_b03a_0_ff; +extern cpuop_func op_b03b_0_nf; +extern cpuop_func op_b03b_0_ff; +extern cpuop_func op_b03c_0_nf; +extern cpuop_func op_b03c_0_ff; +extern cpuop_func op_b040_0_nf; +extern cpuop_func op_b040_0_ff; +extern cpuop_func op_b048_0_nf; +extern cpuop_func op_b048_0_ff; +extern cpuop_func op_b050_0_nf; +extern cpuop_func op_b050_0_ff; +extern cpuop_func op_b058_0_nf; +extern cpuop_func op_b058_0_ff; +extern cpuop_func op_b060_0_nf; +extern cpuop_func op_b060_0_ff; +extern cpuop_func op_b068_0_nf; +extern cpuop_func op_b068_0_ff; +extern cpuop_func op_b070_0_nf; +extern cpuop_func op_b070_0_ff; +extern cpuop_func op_b078_0_nf; +extern cpuop_func op_b078_0_ff; +extern cpuop_func op_b079_0_nf; +extern cpuop_func op_b079_0_ff; +extern cpuop_func op_b07a_0_nf; +extern cpuop_func op_b07a_0_ff; +extern cpuop_func op_b07b_0_nf; +extern cpuop_func op_b07b_0_ff; +extern cpuop_func op_b07c_0_nf; +extern cpuop_func op_b07c_0_ff; +extern cpuop_func op_b080_0_nf; +extern cpuop_func op_b080_0_ff; +extern cpuop_func op_b088_0_nf; +extern cpuop_func op_b088_0_ff; +extern cpuop_func op_b090_0_nf; +extern cpuop_func op_b090_0_ff; +extern cpuop_func op_b098_0_nf; +extern cpuop_func op_b098_0_ff; +extern cpuop_func op_b0a0_0_nf; +extern cpuop_func op_b0a0_0_ff; +extern cpuop_func op_b0a8_0_nf; +extern cpuop_func op_b0a8_0_ff; +extern cpuop_func op_b0b0_0_nf; +extern cpuop_func op_b0b0_0_ff; +extern cpuop_func op_b0b8_0_nf; +extern cpuop_func op_b0b8_0_ff; +extern cpuop_func op_b0b9_0_nf; +extern cpuop_func op_b0b9_0_ff; +extern cpuop_func op_b0ba_0_nf; +extern cpuop_func op_b0ba_0_ff; +extern cpuop_func op_b0bb_0_nf; +extern cpuop_func op_b0bb_0_ff; +extern cpuop_func op_b0bc_0_nf; +extern cpuop_func op_b0bc_0_ff; +extern cpuop_func op_b0c0_0_nf; +extern cpuop_func op_b0c0_0_ff; +extern cpuop_func op_b0c8_0_nf; +extern cpuop_func op_b0c8_0_ff; +extern cpuop_func op_b0d0_0_nf; +extern cpuop_func op_b0d0_0_ff; +extern cpuop_func op_b0d8_0_nf; +extern cpuop_func op_b0d8_0_ff; +extern cpuop_func op_b0e0_0_nf; +extern cpuop_func op_b0e0_0_ff; +extern cpuop_func op_b0e8_0_nf; +extern cpuop_func op_b0e8_0_ff; +extern cpuop_func op_b0f0_0_nf; +extern cpuop_func op_b0f0_0_ff; +extern cpuop_func op_b0f8_0_nf; +extern cpuop_func op_b0f8_0_ff; +extern cpuop_func op_b0f9_0_nf; +extern cpuop_func op_b0f9_0_ff; +extern cpuop_func op_b0fa_0_nf; +extern cpuop_func op_b0fa_0_ff; +extern cpuop_func op_b0fb_0_nf; +extern cpuop_func op_b0fb_0_ff; +extern cpuop_func op_b0fc_0_nf; +extern cpuop_func op_b0fc_0_ff; +extern cpuop_func op_b100_0_nf; +extern cpuop_func op_b100_0_ff; +extern cpuop_func op_b108_0_nf; +extern cpuop_func op_b108_0_ff; +extern cpuop_func op_b110_0_nf; +extern cpuop_func op_b110_0_ff; +extern cpuop_func op_b118_0_nf; +extern cpuop_func op_b118_0_ff; +extern cpuop_func op_b120_0_nf; +extern cpuop_func op_b120_0_ff; +extern cpuop_func op_b128_0_nf; +extern cpuop_func op_b128_0_ff; +extern cpuop_func op_b130_0_nf; +extern cpuop_func op_b130_0_ff; +extern cpuop_func op_b138_0_nf; +extern cpuop_func op_b138_0_ff; +extern cpuop_func op_b139_0_nf; +extern cpuop_func op_b139_0_ff; +extern cpuop_func op_b140_0_nf; +extern cpuop_func op_b140_0_ff; +extern cpuop_func op_b148_0_nf; +extern cpuop_func op_b148_0_ff; +extern cpuop_func op_b150_0_nf; +extern cpuop_func op_b150_0_ff; +extern cpuop_func op_b158_0_nf; +extern cpuop_func op_b158_0_ff; +extern cpuop_func op_b160_0_nf; +extern cpuop_func op_b160_0_ff; +extern cpuop_func op_b168_0_nf; +extern cpuop_func op_b168_0_ff; +extern cpuop_func op_b170_0_nf; +extern cpuop_func op_b170_0_ff; +extern cpuop_func op_b178_0_nf; +extern cpuop_func op_b178_0_ff; +extern cpuop_func op_b179_0_nf; +extern cpuop_func op_b179_0_ff; +extern cpuop_func op_b180_0_nf; +extern cpuop_func op_b180_0_ff; +extern cpuop_func op_b188_0_nf; +extern cpuop_func op_b188_0_ff; +extern cpuop_func op_b190_0_nf; +extern cpuop_func op_b190_0_ff; +extern cpuop_func op_b198_0_nf; +extern cpuop_func op_b198_0_ff; +extern cpuop_func op_b1a0_0_nf; +extern cpuop_func op_b1a0_0_ff; +extern cpuop_func op_b1a8_0_nf; +extern cpuop_func op_b1a8_0_ff; +extern cpuop_func op_b1b0_0_nf; +extern cpuop_func op_b1b0_0_ff; +extern cpuop_func op_b1b8_0_nf; +extern cpuop_func op_b1b8_0_ff; +extern cpuop_func op_b1b9_0_nf; +extern cpuop_func op_b1b9_0_ff; +extern cpuop_func op_b1c0_0_nf; +extern cpuop_func op_b1c0_0_ff; +extern cpuop_func op_b1c8_0_nf; +extern cpuop_func op_b1c8_0_ff; +extern cpuop_func op_b1d0_0_nf; +extern cpuop_func op_b1d0_0_ff; +extern cpuop_func op_b1d8_0_nf; +extern cpuop_func op_b1d8_0_ff; +extern cpuop_func op_b1e0_0_nf; +extern cpuop_func op_b1e0_0_ff; +extern cpuop_func op_b1e8_0_nf; +extern cpuop_func op_b1e8_0_ff; +extern cpuop_func op_b1f0_0_nf; +extern cpuop_func op_b1f0_0_ff; +extern cpuop_func op_b1f8_0_nf; +extern cpuop_func op_b1f8_0_ff; +extern cpuop_func op_b1f9_0_nf; +extern cpuop_func op_b1f9_0_ff; +extern cpuop_func op_b1fa_0_nf; +extern cpuop_func op_b1fa_0_ff; +extern cpuop_func op_b1fb_0_nf; +extern cpuop_func op_b1fb_0_ff; +extern cpuop_func op_b1fc_0_nf; +extern cpuop_func op_b1fc_0_ff; +extern cpuop_func op_c000_0_nf; +extern cpuop_func op_c000_0_ff; +extern cpuop_func op_c010_0_nf; +extern cpuop_func op_c010_0_ff; +extern cpuop_func op_c018_0_nf; +extern cpuop_func op_c018_0_ff; +extern cpuop_func op_c020_0_nf; +extern cpuop_func op_c020_0_ff; +extern cpuop_func op_c028_0_nf; +extern cpuop_func op_c028_0_ff; +extern cpuop_func op_c030_0_nf; +extern cpuop_func op_c030_0_ff; +extern cpuop_func op_c038_0_nf; +extern cpuop_func op_c038_0_ff; +extern cpuop_func op_c039_0_nf; +extern cpuop_func op_c039_0_ff; +extern cpuop_func op_c03a_0_nf; +extern cpuop_func op_c03a_0_ff; +extern cpuop_func op_c03b_0_nf; +extern cpuop_func op_c03b_0_ff; +extern cpuop_func op_c03c_0_nf; +extern cpuop_func op_c03c_0_ff; +extern cpuop_func op_c040_0_nf; +extern cpuop_func op_c040_0_ff; +extern cpuop_func op_c050_0_nf; +extern cpuop_func op_c050_0_ff; +extern cpuop_func op_c058_0_nf; +extern cpuop_func op_c058_0_ff; +extern cpuop_func op_c060_0_nf; +extern cpuop_func op_c060_0_ff; +extern cpuop_func op_c068_0_nf; +extern cpuop_func op_c068_0_ff; +extern cpuop_func op_c070_0_nf; +extern cpuop_func op_c070_0_ff; +extern cpuop_func op_c078_0_nf; +extern cpuop_func op_c078_0_ff; +extern cpuop_func op_c079_0_nf; +extern cpuop_func op_c079_0_ff; +extern cpuop_func op_c07a_0_nf; +extern cpuop_func op_c07a_0_ff; +extern cpuop_func op_c07b_0_nf; +extern cpuop_func op_c07b_0_ff; +extern cpuop_func op_c07c_0_nf; +extern cpuop_func op_c07c_0_ff; +extern cpuop_func op_c080_0_nf; +extern cpuop_func op_c080_0_ff; +extern cpuop_func op_c090_0_nf; +extern cpuop_func op_c090_0_ff; +extern cpuop_func op_c098_0_nf; +extern cpuop_func op_c098_0_ff; +extern cpuop_func op_c0a0_0_nf; +extern cpuop_func op_c0a0_0_ff; +extern cpuop_func op_c0a8_0_nf; +extern cpuop_func op_c0a8_0_ff; +extern cpuop_func op_c0b0_0_nf; +extern cpuop_func op_c0b0_0_ff; +extern cpuop_func op_c0b8_0_nf; +extern cpuop_func op_c0b8_0_ff; +extern cpuop_func op_c0b9_0_nf; +extern cpuop_func op_c0b9_0_ff; +extern cpuop_func op_c0ba_0_nf; +extern cpuop_func op_c0ba_0_ff; +extern cpuop_func op_c0bb_0_nf; +extern cpuop_func op_c0bb_0_ff; +extern cpuop_func op_c0bc_0_nf; +extern cpuop_func op_c0bc_0_ff; +extern cpuop_func op_c0c0_0_nf; +extern cpuop_func op_c0c0_0_ff; +extern cpuop_func op_c0d0_0_nf; +extern cpuop_func op_c0d0_0_ff; +extern cpuop_func op_c0d8_0_nf; +extern cpuop_func op_c0d8_0_ff; +extern cpuop_func op_c0e0_0_nf; +extern cpuop_func op_c0e0_0_ff; +extern cpuop_func op_c0e8_0_nf; +extern cpuop_func op_c0e8_0_ff; +extern cpuop_func op_c0f0_0_nf; +extern cpuop_func op_c0f0_0_ff; +extern cpuop_func op_c0f8_0_nf; +extern cpuop_func op_c0f8_0_ff; +extern cpuop_func op_c0f9_0_nf; +extern cpuop_func op_c0f9_0_ff; +extern cpuop_func op_c0fa_0_nf; +extern cpuop_func op_c0fa_0_ff; +extern cpuop_func op_c0fb_0_nf; +extern cpuop_func op_c0fb_0_ff; +extern cpuop_func op_c0fc_0_nf; +extern cpuop_func op_c0fc_0_ff; +extern cpuop_func op_c100_0_nf; +extern cpuop_func op_c100_0_ff; +extern cpuop_func op_c108_0_nf; +extern cpuop_func op_c108_0_ff; +extern cpuop_func op_c110_0_nf; +extern cpuop_func op_c110_0_ff; +extern cpuop_func op_c118_0_nf; +extern cpuop_func op_c118_0_ff; +extern cpuop_func op_c120_0_nf; +extern cpuop_func op_c120_0_ff; +extern cpuop_func op_c128_0_nf; +extern cpuop_func op_c128_0_ff; +extern cpuop_func op_c130_0_nf; +extern cpuop_func op_c130_0_ff; +extern cpuop_func op_c138_0_nf; +extern cpuop_func op_c138_0_ff; +extern cpuop_func op_c139_0_nf; +extern cpuop_func op_c139_0_ff; +extern cpuop_func op_c140_0_nf; +extern cpuop_func op_c140_0_ff; +extern cpuop_func op_c148_0_nf; +extern cpuop_func op_c148_0_ff; +extern cpuop_func op_c150_0_nf; +extern cpuop_func op_c150_0_ff; +extern cpuop_func op_c158_0_nf; +extern cpuop_func op_c158_0_ff; +extern cpuop_func op_c160_0_nf; +extern cpuop_func op_c160_0_ff; +extern cpuop_func op_c168_0_nf; +extern cpuop_func op_c168_0_ff; +extern cpuop_func op_c170_0_nf; +extern cpuop_func op_c170_0_ff; +extern cpuop_func op_c178_0_nf; +extern cpuop_func op_c178_0_ff; +extern cpuop_func op_c179_0_nf; +extern cpuop_func op_c179_0_ff; +extern cpuop_func op_c188_0_nf; +extern cpuop_func op_c188_0_ff; +extern cpuop_func op_c190_0_nf; +extern cpuop_func op_c190_0_ff; +extern cpuop_func op_c198_0_nf; +extern cpuop_func op_c198_0_ff; +extern cpuop_func op_c1a0_0_nf; +extern cpuop_func op_c1a0_0_ff; +extern cpuop_func op_c1a8_0_nf; +extern cpuop_func op_c1a8_0_ff; +extern cpuop_func op_c1b0_0_nf; +extern cpuop_func op_c1b0_0_ff; +extern cpuop_func op_c1b8_0_nf; +extern cpuop_func op_c1b8_0_ff; +extern cpuop_func op_c1b9_0_nf; +extern cpuop_func op_c1b9_0_ff; +extern cpuop_func op_c1c0_0_nf; +extern cpuop_func op_c1c0_0_ff; +extern cpuop_func op_c1d0_0_nf; +extern cpuop_func op_c1d0_0_ff; +extern cpuop_func op_c1d8_0_nf; +extern cpuop_func op_c1d8_0_ff; +extern cpuop_func op_c1e0_0_nf; +extern cpuop_func op_c1e0_0_ff; +extern cpuop_func op_c1e8_0_nf; +extern cpuop_func op_c1e8_0_ff; +extern cpuop_func op_c1f0_0_nf; +extern cpuop_func op_c1f0_0_ff; +extern cpuop_func op_c1f8_0_nf; +extern cpuop_func op_c1f8_0_ff; +extern cpuop_func op_c1f9_0_nf; +extern cpuop_func op_c1f9_0_ff; +extern cpuop_func op_c1fa_0_nf; +extern cpuop_func op_c1fa_0_ff; +extern cpuop_func op_c1fb_0_nf; +extern cpuop_func op_c1fb_0_ff; +extern cpuop_func op_c1fc_0_nf; +extern cpuop_func op_c1fc_0_ff; +extern cpuop_func op_d000_0_nf; +extern cpuop_func op_d000_0_ff; +extern cpuop_func op_d010_0_nf; +extern cpuop_func op_d010_0_ff; +extern cpuop_func op_d018_0_nf; +extern cpuop_func op_d018_0_ff; +extern cpuop_func op_d020_0_nf; +extern cpuop_func op_d020_0_ff; +extern cpuop_func op_d028_0_nf; +extern cpuop_func op_d028_0_ff; +extern cpuop_func op_d030_0_nf; +extern cpuop_func op_d030_0_ff; +extern cpuop_func op_d038_0_nf; +extern cpuop_func op_d038_0_ff; +extern cpuop_func op_d039_0_nf; +extern cpuop_func op_d039_0_ff; +extern cpuop_func op_d03a_0_nf; +extern cpuop_func op_d03a_0_ff; +extern cpuop_func op_d03b_0_nf; +extern cpuop_func op_d03b_0_ff; +extern cpuop_func op_d03c_0_nf; +extern cpuop_func op_d03c_0_ff; +extern cpuop_func op_d040_0_nf; +extern cpuop_func op_d040_0_ff; +extern cpuop_func op_d048_0_nf; +extern cpuop_func op_d048_0_ff; +extern cpuop_func op_d050_0_nf; +extern cpuop_func op_d050_0_ff; +extern cpuop_func op_d058_0_nf; +extern cpuop_func op_d058_0_ff; +extern cpuop_func op_d060_0_nf; +extern cpuop_func op_d060_0_ff; +extern cpuop_func op_d068_0_nf; +extern cpuop_func op_d068_0_ff; +extern cpuop_func op_d070_0_nf; +extern cpuop_func op_d070_0_ff; +extern cpuop_func op_d078_0_nf; +extern cpuop_func op_d078_0_ff; +extern cpuop_func op_d079_0_nf; +extern cpuop_func op_d079_0_ff; +extern cpuop_func op_d07a_0_nf; +extern cpuop_func op_d07a_0_ff; +extern cpuop_func op_d07b_0_nf; +extern cpuop_func op_d07b_0_ff; +extern cpuop_func op_d07c_0_nf; +extern cpuop_func op_d07c_0_ff; +extern cpuop_func op_d080_0_nf; +extern cpuop_func op_d080_0_ff; +extern cpuop_func op_d088_0_nf; +extern cpuop_func op_d088_0_ff; +extern cpuop_func op_d090_0_nf; +extern cpuop_func op_d090_0_ff; +extern cpuop_func op_d098_0_nf; +extern cpuop_func op_d098_0_ff; +extern cpuop_func op_d0a0_0_nf; +extern cpuop_func op_d0a0_0_ff; +extern cpuop_func op_d0a8_0_nf; +extern cpuop_func op_d0a8_0_ff; +extern cpuop_func op_d0b0_0_nf; +extern cpuop_func op_d0b0_0_ff; +extern cpuop_func op_d0b8_0_nf; +extern cpuop_func op_d0b8_0_ff; +extern cpuop_func op_d0b9_0_nf; +extern cpuop_func op_d0b9_0_ff; +extern cpuop_func op_d0ba_0_nf; +extern cpuop_func op_d0ba_0_ff; +extern cpuop_func op_d0bb_0_nf; +extern cpuop_func op_d0bb_0_ff; +extern cpuop_func op_d0bc_0_nf; +extern cpuop_func op_d0bc_0_ff; +extern cpuop_func op_d0c0_0_nf; +extern cpuop_func op_d0c0_0_ff; +extern cpuop_func op_d0c8_0_nf; +extern cpuop_func op_d0c8_0_ff; +extern cpuop_func op_d0d0_0_nf; +extern cpuop_func op_d0d0_0_ff; +extern cpuop_func op_d0d8_0_nf; +extern cpuop_func op_d0d8_0_ff; +extern cpuop_func op_d0e0_0_nf; +extern cpuop_func op_d0e0_0_ff; +extern cpuop_func op_d0e8_0_nf; +extern cpuop_func op_d0e8_0_ff; +extern cpuop_func op_d0f0_0_nf; +extern cpuop_func op_d0f0_0_ff; +extern cpuop_func op_d0f8_0_nf; +extern cpuop_func op_d0f8_0_ff; +extern cpuop_func op_d0f9_0_nf; +extern cpuop_func op_d0f9_0_ff; +extern cpuop_func op_d0fa_0_nf; +extern cpuop_func op_d0fa_0_ff; +extern cpuop_func op_d0fb_0_nf; +extern cpuop_func op_d0fb_0_ff; +extern cpuop_func op_d0fc_0_nf; +extern cpuop_func op_d0fc_0_ff; +extern cpuop_func op_d100_0_nf; +extern cpuop_func op_d100_0_ff; +extern cpuop_func op_d108_0_nf; +extern cpuop_func op_d108_0_ff; +extern cpuop_func op_d110_0_nf; +extern cpuop_func op_d110_0_ff; +extern cpuop_func op_d118_0_nf; +extern cpuop_func op_d118_0_ff; +extern cpuop_func op_d120_0_nf; +extern cpuop_func op_d120_0_ff; +extern cpuop_func op_d128_0_nf; +extern cpuop_func op_d128_0_ff; +extern cpuop_func op_d130_0_nf; +extern cpuop_func op_d130_0_ff; +extern cpuop_func op_d138_0_nf; +extern cpuop_func op_d138_0_ff; +extern cpuop_func op_d139_0_nf; +extern cpuop_func op_d139_0_ff; +extern cpuop_func op_d140_0_nf; +extern cpuop_func op_d140_0_ff; +extern cpuop_func op_d148_0_nf; +extern cpuop_func op_d148_0_ff; +extern cpuop_func op_d150_0_nf; +extern cpuop_func op_d150_0_ff; +extern cpuop_func op_d158_0_nf; +extern cpuop_func op_d158_0_ff; +extern cpuop_func op_d160_0_nf; +extern cpuop_func op_d160_0_ff; +extern cpuop_func op_d168_0_nf; +extern cpuop_func op_d168_0_ff; +extern cpuop_func op_d170_0_nf; +extern cpuop_func op_d170_0_ff; +extern cpuop_func op_d178_0_nf; +extern cpuop_func op_d178_0_ff; +extern cpuop_func op_d179_0_nf; +extern cpuop_func op_d179_0_ff; +extern cpuop_func op_d180_0_nf; +extern cpuop_func op_d180_0_ff; +extern cpuop_func op_d188_0_nf; +extern cpuop_func op_d188_0_ff; +extern cpuop_func op_d190_0_nf; +extern cpuop_func op_d190_0_ff; +extern cpuop_func op_d198_0_nf; +extern cpuop_func op_d198_0_ff; +extern cpuop_func op_d1a0_0_nf; +extern cpuop_func op_d1a0_0_ff; +extern cpuop_func op_d1a8_0_nf; +extern cpuop_func op_d1a8_0_ff; +extern cpuop_func op_d1b0_0_nf; +extern cpuop_func op_d1b0_0_ff; +extern cpuop_func op_d1b8_0_nf; +extern cpuop_func op_d1b8_0_ff; +extern cpuop_func op_d1b9_0_nf; +extern cpuop_func op_d1b9_0_ff; +extern cpuop_func op_d1c0_0_nf; +extern cpuop_func op_d1c0_0_ff; +extern cpuop_func op_d1c8_0_nf; +extern cpuop_func op_d1c8_0_ff; +extern cpuop_func op_d1d0_0_nf; +extern cpuop_func op_d1d0_0_ff; +extern cpuop_func op_d1d8_0_nf; +extern cpuop_func op_d1d8_0_ff; +extern cpuop_func op_d1e0_0_nf; +extern cpuop_func op_d1e0_0_ff; +extern cpuop_func op_d1e8_0_nf; +extern cpuop_func op_d1e8_0_ff; +extern cpuop_func op_d1f0_0_nf; +extern cpuop_func op_d1f0_0_ff; +extern cpuop_func op_d1f8_0_nf; +extern cpuop_func op_d1f8_0_ff; +extern cpuop_func op_d1f9_0_nf; +extern cpuop_func op_d1f9_0_ff; +extern cpuop_func op_d1fa_0_nf; +extern cpuop_func op_d1fa_0_ff; +extern cpuop_func op_d1fb_0_nf; +extern cpuop_func op_d1fb_0_ff; +extern cpuop_func op_d1fc_0_nf; +extern cpuop_func op_d1fc_0_ff; +extern cpuop_func op_e000_0_nf; +extern cpuop_func op_e000_0_ff; +extern cpuop_func op_e008_0_nf; +extern cpuop_func op_e008_0_ff; +extern cpuop_func op_e010_0_nf; +extern cpuop_func op_e010_0_ff; +extern cpuop_func op_e018_0_nf; +extern cpuop_func op_e018_0_ff; +extern cpuop_func op_e020_0_nf; +extern cpuop_func op_e020_0_ff; +extern cpuop_func op_e028_0_nf; +extern cpuop_func op_e028_0_ff; +extern cpuop_func op_e030_0_nf; +extern cpuop_func op_e030_0_ff; +extern cpuop_func op_e038_0_nf; +extern cpuop_func op_e038_0_ff; +extern cpuop_func op_e040_0_nf; +extern cpuop_func op_e040_0_ff; +extern cpuop_func op_e048_0_nf; +extern cpuop_func op_e048_0_ff; +extern cpuop_func op_e050_0_nf; +extern cpuop_func op_e050_0_ff; +extern cpuop_func op_e058_0_nf; +extern cpuop_func op_e058_0_ff; +extern cpuop_func op_e060_0_nf; +extern cpuop_func op_e060_0_ff; +extern cpuop_func op_e068_0_nf; +extern cpuop_func op_e068_0_ff; +extern cpuop_func op_e070_0_nf; +extern cpuop_func op_e070_0_ff; +extern cpuop_func op_e078_0_nf; +extern cpuop_func op_e078_0_ff; +extern cpuop_func op_e080_0_nf; +extern cpuop_func op_e080_0_ff; +extern cpuop_func op_e088_0_nf; +extern cpuop_func op_e088_0_ff; +extern cpuop_func op_e090_0_nf; +extern cpuop_func op_e090_0_ff; +extern cpuop_func op_e098_0_nf; +extern cpuop_func op_e098_0_ff; +extern cpuop_func op_e0a0_0_nf; +extern cpuop_func op_e0a0_0_ff; +extern cpuop_func op_e0a8_0_nf; +extern cpuop_func op_e0a8_0_ff; +extern cpuop_func op_e0b0_0_nf; +extern cpuop_func op_e0b0_0_ff; +extern cpuop_func op_e0b8_0_nf; +extern cpuop_func op_e0b8_0_ff; +extern cpuop_func op_e0d0_0_nf; +extern cpuop_func op_e0d0_0_ff; +extern cpuop_func op_e0d8_0_nf; +extern cpuop_func op_e0d8_0_ff; +extern cpuop_func op_e0e0_0_nf; +extern cpuop_func op_e0e0_0_ff; +extern cpuop_func op_e0e8_0_nf; +extern cpuop_func op_e0e8_0_ff; +extern cpuop_func op_e0f0_0_nf; +extern cpuop_func op_e0f0_0_ff; +extern cpuop_func op_e0f8_0_nf; +extern cpuop_func op_e0f8_0_ff; +extern cpuop_func op_e0f9_0_nf; +extern cpuop_func op_e0f9_0_ff; +extern cpuop_func op_e100_0_nf; +extern cpuop_func op_e100_0_ff; +extern cpuop_func op_e108_0_nf; +extern cpuop_func op_e108_0_ff; +extern cpuop_func op_e110_0_nf; +extern cpuop_func op_e110_0_ff; +extern cpuop_func op_e118_0_nf; +extern cpuop_func op_e118_0_ff; +extern cpuop_func op_e120_0_nf; +extern cpuop_func op_e120_0_ff; +extern cpuop_func op_e128_0_nf; +extern cpuop_func op_e128_0_ff; +extern cpuop_func op_e130_0_nf; +extern cpuop_func op_e130_0_ff; +extern cpuop_func op_e138_0_nf; +extern cpuop_func op_e138_0_ff; +extern cpuop_func op_e140_0_nf; +extern cpuop_func op_e140_0_ff; +extern cpuop_func op_e148_0_nf; +extern cpuop_func op_e148_0_ff; +extern cpuop_func op_e150_0_nf; +extern cpuop_func op_e150_0_ff; +extern cpuop_func op_e158_0_nf; +extern cpuop_func op_e158_0_ff; +extern cpuop_func op_e160_0_nf; +extern cpuop_func op_e160_0_ff; +extern cpuop_func op_e168_0_nf; +extern cpuop_func op_e168_0_ff; +extern cpuop_func op_e170_0_nf; +extern cpuop_func op_e170_0_ff; +extern cpuop_func op_e178_0_nf; +extern cpuop_func op_e178_0_ff; +extern cpuop_func op_e180_0_nf; +extern cpuop_func op_e180_0_ff; +extern cpuop_func op_e188_0_nf; +extern cpuop_func op_e188_0_ff; +extern cpuop_func op_e190_0_nf; +extern cpuop_func op_e190_0_ff; +extern cpuop_func op_e198_0_nf; +extern cpuop_func op_e198_0_ff; +extern cpuop_func op_e1a0_0_nf; +extern cpuop_func op_e1a0_0_ff; +extern cpuop_func op_e1a8_0_nf; +extern cpuop_func op_e1a8_0_ff; +extern cpuop_func op_e1b0_0_nf; +extern cpuop_func op_e1b0_0_ff; +extern cpuop_func op_e1b8_0_nf; +extern cpuop_func op_e1b8_0_ff; +extern cpuop_func op_e1d0_0_nf; +extern cpuop_func op_e1d0_0_ff; +extern cpuop_func op_e1d8_0_nf; +extern cpuop_func op_e1d8_0_ff; +extern cpuop_func op_e1e0_0_nf; +extern cpuop_func op_e1e0_0_ff; +extern cpuop_func op_e1e8_0_nf; +extern cpuop_func op_e1e8_0_ff; +extern cpuop_func op_e1f0_0_nf; +extern cpuop_func op_e1f0_0_ff; +extern cpuop_func op_e1f8_0_nf; +extern cpuop_func op_e1f8_0_ff; +extern cpuop_func op_e1f9_0_nf; +extern cpuop_func op_e1f9_0_ff; +extern cpuop_func op_e2d0_0_nf; +extern cpuop_func op_e2d0_0_ff; +extern cpuop_func op_e2d8_0_nf; +extern cpuop_func op_e2d8_0_ff; +extern cpuop_func op_e2e0_0_nf; +extern cpuop_func op_e2e0_0_ff; +extern cpuop_func op_e2e8_0_nf; +extern cpuop_func op_e2e8_0_ff; +extern cpuop_func op_e2f0_0_nf; +extern cpuop_func op_e2f0_0_ff; +extern cpuop_func op_e2f8_0_nf; +extern cpuop_func op_e2f8_0_ff; +extern cpuop_func op_e2f9_0_nf; +extern cpuop_func op_e2f9_0_ff; +extern cpuop_func op_e3d0_0_nf; +extern cpuop_func op_e3d0_0_ff; +extern cpuop_func op_e3d8_0_nf; +extern cpuop_func op_e3d8_0_ff; +extern cpuop_func op_e3e0_0_nf; +extern cpuop_func op_e3e0_0_ff; +extern cpuop_func op_e3e8_0_nf; +extern cpuop_func op_e3e8_0_ff; +extern cpuop_func op_e3f0_0_nf; +extern cpuop_func op_e3f0_0_ff; +extern cpuop_func op_e3f8_0_nf; +extern cpuop_func op_e3f8_0_ff; +extern cpuop_func op_e3f9_0_nf; +extern cpuop_func op_e3f9_0_ff; +extern cpuop_func op_e4d0_0_nf; +extern cpuop_func op_e4d0_0_ff; +extern cpuop_func op_e4d8_0_nf; +extern cpuop_func op_e4d8_0_ff; +extern cpuop_func op_e4e0_0_nf; +extern cpuop_func op_e4e0_0_ff; +extern cpuop_func op_e4e8_0_nf; +extern cpuop_func op_e4e8_0_ff; +extern cpuop_func op_e4f0_0_nf; +extern cpuop_func op_e4f0_0_ff; +extern cpuop_func op_e4f8_0_nf; +extern cpuop_func op_e4f8_0_ff; +extern cpuop_func op_e4f9_0_nf; +extern cpuop_func op_e4f9_0_ff; +extern cpuop_func op_e5d0_0_nf; +extern cpuop_func op_e5d0_0_ff; +extern cpuop_func op_e5d8_0_nf; +extern cpuop_func op_e5d8_0_ff; +extern cpuop_func op_e5e0_0_nf; +extern cpuop_func op_e5e0_0_ff; +extern cpuop_func op_e5e8_0_nf; +extern cpuop_func op_e5e8_0_ff; +extern cpuop_func op_e5f0_0_nf; +extern cpuop_func op_e5f0_0_ff; +extern cpuop_func op_e5f8_0_nf; +extern cpuop_func op_e5f8_0_ff; +extern cpuop_func op_e5f9_0_nf; +extern cpuop_func op_e5f9_0_ff; +extern cpuop_func op_e6d0_0_nf; +extern cpuop_func op_e6d0_0_ff; +extern cpuop_func op_e6d8_0_nf; +extern cpuop_func op_e6d8_0_ff; +extern cpuop_func op_e6e0_0_nf; +extern cpuop_func op_e6e0_0_ff; +extern cpuop_func op_e6e8_0_nf; +extern cpuop_func op_e6e8_0_ff; +extern cpuop_func op_e6f0_0_nf; +extern cpuop_func op_e6f0_0_ff; +extern cpuop_func op_e6f8_0_nf; +extern cpuop_func op_e6f8_0_ff; +extern cpuop_func op_e6f9_0_nf; +extern cpuop_func op_e6f9_0_ff; +extern cpuop_func op_e7d0_0_nf; +extern cpuop_func op_e7d0_0_ff; +extern cpuop_func op_e7d8_0_nf; +extern cpuop_func op_e7d8_0_ff; +extern cpuop_func op_e7e0_0_nf; +extern cpuop_func op_e7e0_0_ff; +extern cpuop_func op_e7e8_0_nf; +extern cpuop_func op_e7e8_0_ff; +extern cpuop_func op_e7f0_0_nf; +extern cpuop_func op_e7f0_0_ff; +extern cpuop_func op_e7f8_0_nf; +extern cpuop_func op_e7f8_0_ff; +extern cpuop_func op_e7f9_0_nf; +extern cpuop_func op_e7f9_0_ff; +extern cpuop_func op_e8c0_0_nf; +extern cpuop_func op_e8c0_0_ff; +extern cpuop_func op_e8d0_0_nf; +extern cpuop_func op_e8d0_0_ff; +extern cpuop_func op_e8e8_0_nf; +extern cpuop_func op_e8e8_0_ff; +extern cpuop_func op_e8f0_0_nf; +extern cpuop_func op_e8f0_0_ff; +extern cpuop_func op_e8f8_0_nf; +extern cpuop_func op_e8f8_0_ff; +extern cpuop_func op_e8f9_0_nf; +extern cpuop_func op_e8f9_0_ff; +extern cpuop_func op_e8fa_0_nf; +extern cpuop_func op_e8fa_0_ff; +extern cpuop_func op_e8fb_0_nf; +extern cpuop_func op_e8fb_0_ff; +extern cpuop_func op_e9c0_0_nf; +extern cpuop_func op_e9c0_0_ff; +extern cpuop_func op_e9d0_0_nf; +extern cpuop_func op_e9d0_0_ff; +extern cpuop_func op_e9e8_0_nf; +extern cpuop_func op_e9e8_0_ff; +extern cpuop_func op_e9f0_0_nf; +extern cpuop_func op_e9f0_0_ff; +extern cpuop_func op_e9f8_0_nf; +extern cpuop_func op_e9f8_0_ff; +extern cpuop_func op_e9f9_0_nf; +extern cpuop_func op_e9f9_0_ff; +extern cpuop_func op_e9fa_0_nf; +extern cpuop_func op_e9fa_0_ff; +extern cpuop_func op_e9fb_0_nf; +extern cpuop_func op_e9fb_0_ff; +extern cpuop_func op_eac0_0_nf; +extern cpuop_func op_eac0_0_ff; +extern cpuop_func op_ead0_0_nf; +extern cpuop_func op_ead0_0_ff; +extern cpuop_func op_eae8_0_nf; +extern cpuop_func op_eae8_0_ff; +extern cpuop_func op_eaf0_0_nf; +extern cpuop_func op_eaf0_0_ff; +extern cpuop_func op_eaf8_0_nf; +extern cpuop_func op_eaf8_0_ff; +extern cpuop_func op_eaf9_0_nf; +extern cpuop_func op_eaf9_0_ff; +extern cpuop_func op_ebc0_0_nf; +extern cpuop_func op_ebc0_0_ff; +extern cpuop_func op_ebd0_0_nf; +extern cpuop_func op_ebd0_0_ff; +extern cpuop_func op_ebe8_0_nf; +extern cpuop_func op_ebe8_0_ff; +extern cpuop_func op_ebf0_0_nf; +extern cpuop_func op_ebf0_0_ff; +extern cpuop_func op_ebf8_0_nf; +extern cpuop_func op_ebf8_0_ff; +extern cpuop_func op_ebf9_0_nf; +extern cpuop_func op_ebf9_0_ff; +extern cpuop_func op_ebfa_0_nf; +extern cpuop_func op_ebfa_0_ff; +extern cpuop_func op_ebfb_0_nf; +extern cpuop_func op_ebfb_0_ff; +extern cpuop_func op_ecc0_0_nf; +extern cpuop_func op_ecc0_0_ff; +extern cpuop_func op_ecd0_0_nf; +extern cpuop_func op_ecd0_0_ff; +extern cpuop_func op_ece8_0_nf; +extern cpuop_func op_ece8_0_ff; +extern cpuop_func op_ecf0_0_nf; +extern cpuop_func op_ecf0_0_ff; +extern cpuop_func op_ecf8_0_nf; +extern cpuop_func op_ecf8_0_ff; +extern cpuop_func op_ecf9_0_nf; +extern cpuop_func op_ecf9_0_ff; +extern cpuop_func op_edc0_0_nf; +extern cpuop_func op_edc0_0_ff; +extern cpuop_func op_edd0_0_nf; +extern cpuop_func op_edd0_0_ff; +extern cpuop_func op_ede8_0_nf; +extern cpuop_func op_ede8_0_ff; +extern cpuop_func op_edf0_0_nf; +extern cpuop_func op_edf0_0_ff; +extern cpuop_func op_edf8_0_nf; +extern cpuop_func op_edf8_0_ff; +extern cpuop_func op_edf9_0_nf; +extern cpuop_func op_edf9_0_ff; +extern cpuop_func op_edfa_0_nf; +extern cpuop_func op_edfa_0_ff; +extern cpuop_func op_edfb_0_nf; +extern cpuop_func op_edfb_0_ff; +extern cpuop_func op_eec0_0_nf; +extern cpuop_func op_eec0_0_ff; +extern cpuop_func op_eed0_0_nf; +extern cpuop_func op_eed0_0_ff; +extern cpuop_func op_eee8_0_nf; +extern cpuop_func op_eee8_0_ff; +extern cpuop_func op_eef0_0_nf; +extern cpuop_func op_eef0_0_ff; +extern cpuop_func op_eef8_0_nf; +extern cpuop_func op_eef8_0_ff; +extern cpuop_func op_eef9_0_nf; +extern cpuop_func op_eef9_0_ff; +extern cpuop_func op_efc0_0_nf; +extern cpuop_func op_efc0_0_ff; +extern cpuop_func op_efd0_0_nf; +extern cpuop_func op_efd0_0_ff; +extern cpuop_func op_efe8_0_nf; +extern cpuop_func op_efe8_0_ff; +extern cpuop_func op_eff0_0_nf; +extern cpuop_func op_eff0_0_ff; +extern cpuop_func op_eff8_0_nf; +extern cpuop_func op_eff8_0_ff; +extern cpuop_func op_eff9_0_nf; +extern cpuop_func op_eff9_0_ff; +extern cpuop_func op_f200_0_nf; +extern cpuop_func op_f200_0_ff; +extern cpuop_func op_f208_0_nf; +extern cpuop_func op_f208_0_ff; +extern cpuop_func op_f210_0_nf; +extern cpuop_func op_f210_0_ff; +extern cpuop_func op_f218_0_nf; +extern cpuop_func op_f218_0_ff; +extern cpuop_func op_f220_0_nf; +extern cpuop_func op_f220_0_ff; +extern cpuop_func op_f228_0_nf; +extern cpuop_func op_f228_0_ff; +extern cpuop_func op_f230_0_nf; +extern cpuop_func op_f230_0_ff; +extern cpuop_func op_f238_0_nf; +extern cpuop_func op_f238_0_ff; +extern cpuop_func op_f239_0_nf; +extern cpuop_func op_f239_0_ff; +extern cpuop_func op_f23a_0_nf; +extern cpuop_func op_f23a_0_ff; +extern cpuop_func op_f23b_0_nf; +extern cpuop_func op_f23b_0_ff; +extern cpuop_func op_f23c_0_nf; +extern cpuop_func op_f23c_0_ff; +extern cpuop_func op_f240_0_nf; +extern cpuop_func op_f240_0_ff; +extern cpuop_func op_f248_0_nf; +extern cpuop_func op_f248_0_ff; +extern cpuop_func op_f250_0_nf; +extern cpuop_func op_f250_0_ff; +extern cpuop_func op_f258_0_nf; +extern cpuop_func op_f258_0_ff; +extern cpuop_func op_f260_0_nf; +extern cpuop_func op_f260_0_ff; +extern cpuop_func op_f268_0_nf; +extern cpuop_func op_f268_0_ff; +extern cpuop_func op_f270_0_nf; +extern cpuop_func op_f270_0_ff; +extern cpuop_func op_f278_0_nf; +extern cpuop_func op_f278_0_ff; +extern cpuop_func op_f279_0_nf; +extern cpuop_func op_f279_0_ff; +extern cpuop_func op_f27a_0_nf; +extern cpuop_func op_f27a_0_ff; +extern cpuop_func op_f27b_0_nf; +extern cpuop_func op_f27b_0_ff; +extern cpuop_func op_f27c_0_nf; +extern cpuop_func op_f27c_0_ff; +extern cpuop_func op_f280_0_nf; +extern cpuop_func op_f280_0_ff; +extern cpuop_func op_f2c0_0_nf; +extern cpuop_func op_f2c0_0_ff; +extern cpuop_func op_f310_0_nf; +extern cpuop_func op_f310_0_ff; +extern cpuop_func op_f320_0_nf; +extern cpuop_func op_f320_0_ff; +extern cpuop_func op_f328_0_nf; +extern cpuop_func op_f328_0_ff; +extern cpuop_func op_f330_0_nf; +extern cpuop_func op_f330_0_ff; +extern cpuop_func op_f338_0_nf; +extern cpuop_func op_f338_0_ff; +extern cpuop_func op_f339_0_nf; +extern cpuop_func op_f339_0_ff; +extern cpuop_func op_f350_0_nf; +extern cpuop_func op_f350_0_ff; +extern cpuop_func op_f358_0_nf; +extern cpuop_func op_f358_0_ff; +extern cpuop_func op_f368_0_nf; +extern cpuop_func op_f368_0_ff; +extern cpuop_func op_f370_0_nf; +extern cpuop_func op_f370_0_ff; +extern cpuop_func op_f378_0_nf; +extern cpuop_func op_f378_0_ff; +extern cpuop_func op_f379_0_nf; +extern cpuop_func op_f379_0_ff; +extern cpuop_func op_f37a_0_nf; +extern cpuop_func op_f37a_0_ff; +extern cpuop_func op_f37b_0_nf; +extern cpuop_func op_f37b_0_ff; +extern cpuop_func op_f408_0_nf; +extern cpuop_func op_f408_0_ff; +extern cpuop_func op_f410_0_nf; +extern cpuop_func op_f410_0_ff; +extern cpuop_func op_f418_0_nf; +extern cpuop_func op_f418_0_ff; +extern cpuop_func op_f419_0_nf; +extern cpuop_func op_f419_0_ff; +extern cpuop_func op_f41a_0_nf; +extern cpuop_func op_f41a_0_ff; +extern cpuop_func op_f41b_0_nf; +extern cpuop_func op_f41b_0_ff; +extern cpuop_func op_f41c_0_nf; +extern cpuop_func op_f41c_0_ff; +extern cpuop_func op_f41d_0_nf; +extern cpuop_func op_f41d_0_ff; +extern cpuop_func op_f41e_0_nf; +extern cpuop_func op_f41e_0_ff; +extern cpuop_func op_f41f_0_nf; +extern cpuop_func op_f41f_0_ff; +extern cpuop_func op_f428_0_nf; +extern cpuop_func op_f428_0_ff; +extern cpuop_func op_f430_0_nf; +extern cpuop_func op_f430_0_ff; +extern cpuop_func op_f438_0_nf; +extern cpuop_func op_f438_0_ff; +extern cpuop_func op_f439_0_nf; +extern cpuop_func op_f439_0_ff; +extern cpuop_func op_f43a_0_nf; +extern cpuop_func op_f43a_0_ff; +extern cpuop_func op_f43b_0_nf; +extern cpuop_func op_f43b_0_ff; +extern cpuop_func op_f43c_0_nf; +extern cpuop_func op_f43c_0_ff; +extern cpuop_func op_f43d_0_nf; +extern cpuop_func op_f43d_0_ff; +extern cpuop_func op_f43e_0_nf; +extern cpuop_func op_f43e_0_ff; +extern cpuop_func op_f43f_0_nf; +extern cpuop_func op_f43f_0_ff; +extern cpuop_func op_f500_0_nf; +extern cpuop_func op_f500_0_ff; +extern cpuop_func op_f600_0_nf; +extern cpuop_func op_f600_0_ff; +extern cpuop_func op_f608_0_nf; +extern cpuop_func op_f608_0_ff; +extern cpuop_func op_f610_0_nf; +extern cpuop_func op_f610_0_ff; +extern cpuop_func op_f618_0_nf; +extern cpuop_func op_f618_0_ff; +extern cpuop_func op_f620_0_nf; +extern cpuop_func op_f620_0_ff; +extern cpuop_func op_0030_3_nf; +extern cpuop_func op_0030_3_ff; +extern cpuop_func op_0070_3_nf; +extern cpuop_func op_0070_3_ff; +extern cpuop_func op_00b0_3_nf; +extern cpuop_func op_00b0_3_ff; +extern cpuop_func op_0130_3_nf; +extern cpuop_func op_0130_3_ff; +extern cpuop_func op_013b_3_nf; +extern cpuop_func op_013b_3_ff; +extern cpuop_func op_0170_3_nf; +extern cpuop_func op_0170_3_ff; +extern cpuop_func op_017b_3_nf; +extern cpuop_func op_017b_3_ff; +extern cpuop_func op_01b0_3_nf; +extern cpuop_func op_01b0_3_ff; +extern cpuop_func op_01bb_3_nf; +extern cpuop_func op_01bb_3_ff; +extern cpuop_func op_01f0_3_nf; +extern cpuop_func op_01f0_3_ff; +extern cpuop_func op_01fb_3_nf; +extern cpuop_func op_01fb_3_ff; +extern cpuop_func op_0230_3_nf; +extern cpuop_func op_0230_3_ff; +extern cpuop_func op_0270_3_nf; +extern cpuop_func op_0270_3_ff; +extern cpuop_func op_02b0_3_nf; +extern cpuop_func op_02b0_3_ff; +extern cpuop_func op_0430_3_nf; +extern cpuop_func op_0430_3_ff; +extern cpuop_func op_0470_3_nf; +extern cpuop_func op_0470_3_ff; +extern cpuop_func op_04b0_3_nf; +extern cpuop_func op_04b0_3_ff; +extern cpuop_func op_0630_3_nf; +extern cpuop_func op_0630_3_ff; +extern cpuop_func op_0670_3_nf; +extern cpuop_func op_0670_3_ff; +extern cpuop_func op_06b0_3_nf; +extern cpuop_func op_06b0_3_ff; +extern cpuop_func op_0830_3_nf; +extern cpuop_func op_0830_3_ff; +extern cpuop_func op_083b_3_nf; +extern cpuop_func op_083b_3_ff; +extern cpuop_func op_0870_3_nf; +extern cpuop_func op_0870_3_ff; +extern cpuop_func op_087b_3_nf; +extern cpuop_func op_087b_3_ff; +extern cpuop_func op_08b0_3_nf; +extern cpuop_func op_08b0_3_ff; +extern cpuop_func op_08bb_3_nf; +extern cpuop_func op_08bb_3_ff; +extern cpuop_func op_08f0_3_nf; +extern cpuop_func op_08f0_3_ff; +extern cpuop_func op_08fb_3_nf; +extern cpuop_func op_08fb_3_ff; +extern cpuop_func op_0a30_3_nf; +extern cpuop_func op_0a30_3_ff; +extern cpuop_func op_0a70_3_nf; +extern cpuop_func op_0a70_3_ff; +extern cpuop_func op_0ab0_3_nf; +extern cpuop_func op_0ab0_3_ff; +extern cpuop_func op_0c30_3_nf; +extern cpuop_func op_0c30_3_ff; +extern cpuop_func op_0c70_3_nf; +extern cpuop_func op_0c70_3_ff; +extern cpuop_func op_0cb0_3_nf; +extern cpuop_func op_0cb0_3_ff; +extern cpuop_func op_1030_3_nf; +extern cpuop_func op_1030_3_ff; +extern cpuop_func op_103b_3_nf; +extern cpuop_func op_103b_3_ff; +extern cpuop_func op_10b0_3_nf; +extern cpuop_func op_10b0_3_ff; +extern cpuop_func op_10bb_3_nf; +extern cpuop_func op_10bb_3_ff; +extern cpuop_func op_10f0_3_nf; +extern cpuop_func op_10f0_3_ff; +extern cpuop_func op_10fb_3_nf; +extern cpuop_func op_10fb_3_ff; +extern cpuop_func op_1130_3_nf; +extern cpuop_func op_1130_3_ff; +extern cpuop_func op_113b_3_nf; +extern cpuop_func op_113b_3_ff; +extern cpuop_func op_1170_3_nf; +extern cpuop_func op_1170_3_ff; +extern cpuop_func op_117b_3_nf; +extern cpuop_func op_117b_3_ff; +extern cpuop_func op_1180_3_nf; +extern cpuop_func op_1180_3_ff; +extern cpuop_func op_1190_3_nf; +extern cpuop_func op_1190_3_ff; +extern cpuop_func op_1198_3_nf; +extern cpuop_func op_1198_3_ff; +extern cpuop_func op_11a0_3_nf; +extern cpuop_func op_11a0_3_ff; +extern cpuop_func op_11a8_3_nf; +extern cpuop_func op_11a8_3_ff; +extern cpuop_func op_11b0_3_nf; +extern cpuop_func op_11b0_3_ff; +extern cpuop_func op_11b8_3_nf; +extern cpuop_func op_11b8_3_ff; +extern cpuop_func op_11b9_3_nf; +extern cpuop_func op_11b9_3_ff; +extern cpuop_func op_11ba_3_nf; +extern cpuop_func op_11ba_3_ff; +extern cpuop_func op_11bb_3_nf; +extern cpuop_func op_11bb_3_ff; +extern cpuop_func op_11bc_3_nf; +extern cpuop_func op_11bc_3_ff; +extern cpuop_func op_11f0_3_nf; +extern cpuop_func op_11f0_3_ff; +extern cpuop_func op_11fb_3_nf; +extern cpuop_func op_11fb_3_ff; +extern cpuop_func op_13f0_3_nf; +extern cpuop_func op_13f0_3_ff; +extern cpuop_func op_13fb_3_nf; +extern cpuop_func op_13fb_3_ff; +extern cpuop_func op_2030_3_nf; +extern cpuop_func op_2030_3_ff; +extern cpuop_func op_203b_3_nf; +extern cpuop_func op_203b_3_ff; +extern cpuop_func op_2070_3_nf; +extern cpuop_func op_2070_3_ff; +extern cpuop_func op_207b_3_nf; +extern cpuop_func op_207b_3_ff; +extern cpuop_func op_20b0_3_nf; +extern cpuop_func op_20b0_3_ff; +extern cpuop_func op_20bb_3_nf; +extern cpuop_func op_20bb_3_ff; +extern cpuop_func op_20f0_3_nf; +extern cpuop_func op_20f0_3_ff; +extern cpuop_func op_20fb_3_nf; +extern cpuop_func op_20fb_3_ff; +extern cpuop_func op_2130_3_nf; +extern cpuop_func op_2130_3_ff; +extern cpuop_func op_213b_3_nf; +extern cpuop_func op_213b_3_ff; +extern cpuop_func op_2170_3_nf; +extern cpuop_func op_2170_3_ff; +extern cpuop_func op_217b_3_nf; +extern cpuop_func op_217b_3_ff; +extern cpuop_func op_2180_3_nf; +extern cpuop_func op_2180_3_ff; +extern cpuop_func op_2188_3_nf; +extern cpuop_func op_2188_3_ff; +extern cpuop_func op_2190_3_nf; +extern cpuop_func op_2190_3_ff; +extern cpuop_func op_2198_3_nf; +extern cpuop_func op_2198_3_ff; +extern cpuop_func op_21a0_3_nf; +extern cpuop_func op_21a0_3_ff; +extern cpuop_func op_21a8_3_nf; +extern cpuop_func op_21a8_3_ff; +extern cpuop_func op_21b0_3_nf; +extern cpuop_func op_21b0_3_ff; +extern cpuop_func op_21b8_3_nf; +extern cpuop_func op_21b8_3_ff; +extern cpuop_func op_21b9_3_nf; +extern cpuop_func op_21b9_3_ff; +extern cpuop_func op_21ba_3_nf; +extern cpuop_func op_21ba_3_ff; +extern cpuop_func op_21bb_3_nf; +extern cpuop_func op_21bb_3_ff; +extern cpuop_func op_21bc_3_nf; +extern cpuop_func op_21bc_3_ff; +extern cpuop_func op_21f0_3_nf; +extern cpuop_func op_21f0_3_ff; +extern cpuop_func op_21fb_3_nf; +extern cpuop_func op_21fb_3_ff; +extern cpuop_func op_23f0_3_nf; +extern cpuop_func op_23f0_3_ff; +extern cpuop_func op_23fb_3_nf; +extern cpuop_func op_23fb_3_ff; +extern cpuop_func op_3030_3_nf; +extern cpuop_func op_3030_3_ff; +extern cpuop_func op_303b_3_nf; +extern cpuop_func op_303b_3_ff; +extern cpuop_func op_3070_3_nf; +extern cpuop_func op_3070_3_ff; +extern cpuop_func op_307b_3_nf; +extern cpuop_func op_307b_3_ff; +extern cpuop_func op_30b0_3_nf; +extern cpuop_func op_30b0_3_ff; +extern cpuop_func op_30bb_3_nf; +extern cpuop_func op_30bb_3_ff; +extern cpuop_func op_30f0_3_nf; +extern cpuop_func op_30f0_3_ff; +extern cpuop_func op_30fb_3_nf; +extern cpuop_func op_30fb_3_ff; +extern cpuop_func op_3130_3_nf; +extern cpuop_func op_3130_3_ff; +extern cpuop_func op_313b_3_nf; +extern cpuop_func op_313b_3_ff; +extern cpuop_func op_3170_3_nf; +extern cpuop_func op_3170_3_ff; +extern cpuop_func op_317b_3_nf; +extern cpuop_func op_317b_3_ff; +extern cpuop_func op_3180_3_nf; +extern cpuop_func op_3180_3_ff; +extern cpuop_func op_3188_3_nf; +extern cpuop_func op_3188_3_ff; +extern cpuop_func op_3190_3_nf; +extern cpuop_func op_3190_3_ff; +extern cpuop_func op_3198_3_nf; +extern cpuop_func op_3198_3_ff; +extern cpuop_func op_31a0_3_nf; +extern cpuop_func op_31a0_3_ff; +extern cpuop_func op_31a8_3_nf; +extern cpuop_func op_31a8_3_ff; +extern cpuop_func op_31b0_3_nf; +extern cpuop_func op_31b0_3_ff; +extern cpuop_func op_31b8_3_nf; +extern cpuop_func op_31b8_3_ff; +extern cpuop_func op_31b9_3_nf; +extern cpuop_func op_31b9_3_ff; +extern cpuop_func op_31ba_3_nf; +extern cpuop_func op_31ba_3_ff; +extern cpuop_func op_31bb_3_nf; +extern cpuop_func op_31bb_3_ff; +extern cpuop_func op_31bc_3_nf; +extern cpuop_func op_31bc_3_ff; +extern cpuop_func op_31f0_3_nf; +extern cpuop_func op_31f0_3_ff; +extern cpuop_func op_31fb_3_nf; +extern cpuop_func op_31fb_3_ff; +extern cpuop_func op_33f0_3_nf; +extern cpuop_func op_33f0_3_ff; +extern cpuop_func op_33fb_3_nf; +extern cpuop_func op_33fb_3_ff; +extern cpuop_func op_4030_3_nf; +extern cpuop_func op_4030_3_ff; +extern cpuop_func op_4070_3_nf; +extern cpuop_func op_4070_3_ff; +extern cpuop_func op_40b0_3_nf; +extern cpuop_func op_40b0_3_ff; +extern cpuop_func op_40f0_3_nf; +extern cpuop_func op_40f0_3_ff; +extern cpuop_func op_4130_3_nf; +extern cpuop_func op_4130_3_ff; +extern cpuop_func op_413b_3_nf; +extern cpuop_func op_413b_3_ff; +extern cpuop_func op_41b0_3_nf; +extern cpuop_func op_41b0_3_ff; +extern cpuop_func op_41bb_3_nf; +extern cpuop_func op_41bb_3_ff; +extern cpuop_func op_41f0_3_nf; +extern cpuop_func op_41f0_3_ff; +extern cpuop_func op_41fb_3_nf; +extern cpuop_func op_41fb_3_ff; +extern cpuop_func op_4230_3_nf; +extern cpuop_func op_4230_3_ff; +extern cpuop_func op_4270_3_nf; +extern cpuop_func op_4270_3_ff; +extern cpuop_func op_42b0_3_nf; +extern cpuop_func op_42b0_3_ff; +extern cpuop_func op_42f0_3_nf; +extern cpuop_func op_42f0_3_ff; +extern cpuop_func op_4430_3_nf; +extern cpuop_func op_4430_3_ff; +extern cpuop_func op_4470_3_nf; +extern cpuop_func op_4470_3_ff; +extern cpuop_func op_44b0_3_nf; +extern cpuop_func op_44b0_3_ff; +extern cpuop_func op_44f0_3_nf; +extern cpuop_func op_44f0_3_ff; +extern cpuop_func op_44fb_3_nf; +extern cpuop_func op_44fb_3_ff; +extern cpuop_func op_4630_3_nf; +extern cpuop_func op_4630_3_ff; +extern cpuop_func op_4670_3_nf; +extern cpuop_func op_4670_3_ff; +extern cpuop_func op_46b0_3_nf; +extern cpuop_func op_46b0_3_ff; +extern cpuop_func op_46f0_3_nf; +extern cpuop_func op_46f0_3_ff; +extern cpuop_func op_46fb_3_nf; +extern cpuop_func op_46fb_3_ff; +extern cpuop_func op_4830_3_nf; +extern cpuop_func op_4830_3_ff; +extern cpuop_func op_4870_3_nf; +extern cpuop_func op_4870_3_ff; +extern cpuop_func op_487b_3_nf; +extern cpuop_func op_487b_3_ff; +extern cpuop_func op_48b0_3_nf; +extern cpuop_func op_48b0_3_ff; +extern cpuop_func op_48f0_3_nf; +extern cpuop_func op_48f0_3_ff; +extern cpuop_func op_4a30_3_nf; +extern cpuop_func op_4a30_3_ff; +extern cpuop_func op_4a70_3_nf; +extern cpuop_func op_4a70_3_ff; +extern cpuop_func op_4ab0_3_nf; +extern cpuop_func op_4ab0_3_ff; +extern cpuop_func op_4af0_3_nf; +extern cpuop_func op_4af0_3_ff; +extern cpuop_func op_4cb0_3_nf; +extern cpuop_func op_4cb0_3_ff; +extern cpuop_func op_4cbb_3_nf; +extern cpuop_func op_4cbb_3_ff; +extern cpuop_func op_4cf0_3_nf; +extern cpuop_func op_4cf0_3_ff; +extern cpuop_func op_4cfb_3_nf; +extern cpuop_func op_4cfb_3_ff; +extern cpuop_func op_4eb0_3_nf; +extern cpuop_func op_4eb0_3_ff; +extern cpuop_func op_4ebb_3_nf; +extern cpuop_func op_4ebb_3_ff; +extern cpuop_func op_4ef0_3_nf; +extern cpuop_func op_4ef0_3_ff; +extern cpuop_func op_4efb_3_nf; +extern cpuop_func op_4efb_3_ff; +extern cpuop_func op_5030_3_nf; +extern cpuop_func op_5030_3_ff; +extern cpuop_func op_5070_3_nf; +extern cpuop_func op_5070_3_ff; +extern cpuop_func op_50b0_3_nf; +extern cpuop_func op_50b0_3_ff; +extern cpuop_func op_50f0_3_nf; +extern cpuop_func op_50f0_3_ff; +extern cpuop_func op_5130_3_nf; +extern cpuop_func op_5130_3_ff; +extern cpuop_func op_5170_3_nf; +extern cpuop_func op_5170_3_ff; +extern cpuop_func op_51b0_3_nf; +extern cpuop_func op_51b0_3_ff; +extern cpuop_func op_51f0_3_nf; +extern cpuop_func op_51f0_3_ff; +extern cpuop_func op_52f0_3_nf; +extern cpuop_func op_52f0_3_ff; +extern cpuop_func op_53f0_3_nf; +extern cpuop_func op_53f0_3_ff; +extern cpuop_func op_54f0_3_nf; +extern cpuop_func op_54f0_3_ff; +extern cpuop_func op_55f0_3_nf; +extern cpuop_func op_55f0_3_ff; +extern cpuop_func op_56f0_3_nf; +extern cpuop_func op_56f0_3_ff; +extern cpuop_func op_57f0_3_nf; +extern cpuop_func op_57f0_3_ff; +extern cpuop_func op_58f0_3_nf; +extern cpuop_func op_58f0_3_ff; +extern cpuop_func op_59f0_3_nf; +extern cpuop_func op_59f0_3_ff; +extern cpuop_func op_5af0_3_nf; +extern cpuop_func op_5af0_3_ff; +extern cpuop_func op_5bf0_3_nf; +extern cpuop_func op_5bf0_3_ff; +extern cpuop_func op_5cf0_3_nf; +extern cpuop_func op_5cf0_3_ff; +extern cpuop_func op_5df0_3_nf; +extern cpuop_func op_5df0_3_ff; +extern cpuop_func op_5ef0_3_nf; +extern cpuop_func op_5ef0_3_ff; +extern cpuop_func op_5ff0_3_nf; +extern cpuop_func op_5ff0_3_ff; +extern cpuop_func op_60ff_3_nf; +extern cpuop_func op_60ff_3_ff; +extern cpuop_func op_62ff_3_nf; +extern cpuop_func op_62ff_3_ff; +extern cpuop_func op_63ff_3_nf; +extern cpuop_func op_63ff_3_ff; +extern cpuop_func op_64ff_3_nf; +extern cpuop_func op_64ff_3_ff; +extern cpuop_func op_65ff_3_nf; +extern cpuop_func op_65ff_3_ff; +extern cpuop_func op_66ff_3_nf; +extern cpuop_func op_66ff_3_ff; +extern cpuop_func op_67ff_3_nf; +extern cpuop_func op_67ff_3_ff; +extern cpuop_func op_68ff_3_nf; +extern cpuop_func op_68ff_3_ff; +extern cpuop_func op_69ff_3_nf; +extern cpuop_func op_69ff_3_ff; +extern cpuop_func op_6aff_3_nf; +extern cpuop_func op_6aff_3_ff; +extern cpuop_func op_6bff_3_nf; +extern cpuop_func op_6bff_3_ff; +extern cpuop_func op_6cff_3_nf; +extern cpuop_func op_6cff_3_ff; +extern cpuop_func op_6dff_3_nf; +extern cpuop_func op_6dff_3_ff; +extern cpuop_func op_6eff_3_nf; +extern cpuop_func op_6eff_3_ff; +extern cpuop_func op_6fff_3_nf; +extern cpuop_func op_6fff_3_ff; +extern cpuop_func op_8030_3_nf; +extern cpuop_func op_8030_3_ff; +extern cpuop_func op_803b_3_nf; +extern cpuop_func op_803b_3_ff; +extern cpuop_func op_8070_3_nf; +extern cpuop_func op_8070_3_ff; +extern cpuop_func op_807b_3_nf; +extern cpuop_func op_807b_3_ff; +extern cpuop_func op_80b0_3_nf; +extern cpuop_func op_80b0_3_ff; +extern cpuop_func op_80bb_3_nf; +extern cpuop_func op_80bb_3_ff; +extern cpuop_func op_80f0_3_nf; +extern cpuop_func op_80f0_3_ff; +extern cpuop_func op_80fb_3_nf; +extern cpuop_func op_80fb_3_ff; +extern cpuop_func op_8130_3_nf; +extern cpuop_func op_8130_3_ff; +extern cpuop_func op_8170_3_nf; +extern cpuop_func op_8170_3_ff; +extern cpuop_func op_81b0_3_nf; +extern cpuop_func op_81b0_3_ff; +extern cpuop_func op_81f0_3_nf; +extern cpuop_func op_81f0_3_ff; +extern cpuop_func op_81fb_3_nf; +extern cpuop_func op_81fb_3_ff; +extern cpuop_func op_9030_3_nf; +extern cpuop_func op_9030_3_ff; +extern cpuop_func op_903b_3_nf; +extern cpuop_func op_903b_3_ff; +extern cpuop_func op_9070_3_nf; +extern cpuop_func op_9070_3_ff; +extern cpuop_func op_907b_3_nf; +extern cpuop_func op_907b_3_ff; +extern cpuop_func op_90b0_3_nf; +extern cpuop_func op_90b0_3_ff; +extern cpuop_func op_90bb_3_nf; +extern cpuop_func op_90bb_3_ff; +extern cpuop_func op_90f0_3_nf; +extern cpuop_func op_90f0_3_ff; +extern cpuop_func op_90fb_3_nf; +extern cpuop_func op_90fb_3_ff; +extern cpuop_func op_9130_3_nf; +extern cpuop_func op_9130_3_ff; +extern cpuop_func op_9170_3_nf; +extern cpuop_func op_9170_3_ff; +extern cpuop_func op_91b0_3_nf; +extern cpuop_func op_91b0_3_ff; +extern cpuop_func op_91f0_3_nf; +extern cpuop_func op_91f0_3_ff; +extern cpuop_func op_91fb_3_nf; +extern cpuop_func op_91fb_3_ff; +extern cpuop_func op_b030_3_nf; +extern cpuop_func op_b030_3_ff; +extern cpuop_func op_b03b_3_nf; +extern cpuop_func op_b03b_3_ff; +extern cpuop_func op_b070_3_nf; +extern cpuop_func op_b070_3_ff; +extern cpuop_func op_b07b_3_nf; +extern cpuop_func op_b07b_3_ff; +extern cpuop_func op_b0b0_3_nf; +extern cpuop_func op_b0b0_3_ff; +extern cpuop_func op_b0bb_3_nf; +extern cpuop_func op_b0bb_3_ff; +extern cpuop_func op_b0f0_3_nf; +extern cpuop_func op_b0f0_3_ff; +extern cpuop_func op_b0fb_3_nf; +extern cpuop_func op_b0fb_3_ff; +extern cpuop_func op_b130_3_nf; +extern cpuop_func op_b130_3_ff; +extern cpuop_func op_b170_3_nf; +extern cpuop_func op_b170_3_ff; +extern cpuop_func op_b1b0_3_nf; +extern cpuop_func op_b1b0_3_ff; +extern cpuop_func op_b1f0_3_nf; +extern cpuop_func op_b1f0_3_ff; +extern cpuop_func op_b1fb_3_nf; +extern cpuop_func op_b1fb_3_ff; +extern cpuop_func op_c030_3_nf; +extern cpuop_func op_c030_3_ff; +extern cpuop_func op_c03b_3_nf; +extern cpuop_func op_c03b_3_ff; +extern cpuop_func op_c070_3_nf; +extern cpuop_func op_c070_3_ff; +extern cpuop_func op_c07b_3_nf; +extern cpuop_func op_c07b_3_ff; +extern cpuop_func op_c0b0_3_nf; +extern cpuop_func op_c0b0_3_ff; +extern cpuop_func op_c0bb_3_nf; +extern cpuop_func op_c0bb_3_ff; +extern cpuop_func op_c0f0_3_nf; +extern cpuop_func op_c0f0_3_ff; +extern cpuop_func op_c0fb_3_nf; +extern cpuop_func op_c0fb_3_ff; +extern cpuop_func op_c130_3_nf; +extern cpuop_func op_c130_3_ff; +extern cpuop_func op_c170_3_nf; +extern cpuop_func op_c170_3_ff; +extern cpuop_func op_c1b0_3_nf; +extern cpuop_func op_c1b0_3_ff; +extern cpuop_func op_c1f0_3_nf; +extern cpuop_func op_c1f0_3_ff; +extern cpuop_func op_c1fb_3_nf; +extern cpuop_func op_c1fb_3_ff; +extern cpuop_func op_d030_3_nf; +extern cpuop_func op_d030_3_ff; +extern cpuop_func op_d03b_3_nf; +extern cpuop_func op_d03b_3_ff; +extern cpuop_func op_d070_3_nf; +extern cpuop_func op_d070_3_ff; +extern cpuop_func op_d07b_3_nf; +extern cpuop_func op_d07b_3_ff; +extern cpuop_func op_d0b0_3_nf; +extern cpuop_func op_d0b0_3_ff; +extern cpuop_func op_d0bb_3_nf; +extern cpuop_func op_d0bb_3_ff; +extern cpuop_func op_d0f0_3_nf; +extern cpuop_func op_d0f0_3_ff; +extern cpuop_func op_d0fb_3_nf; +extern cpuop_func op_d0fb_3_ff; +extern cpuop_func op_d130_3_nf; +extern cpuop_func op_d130_3_ff; +extern cpuop_func op_d170_3_nf; +extern cpuop_func op_d170_3_ff; +extern cpuop_func op_d1b0_3_nf; +extern cpuop_func op_d1b0_3_ff; +extern cpuop_func op_d1f0_3_nf; +extern cpuop_func op_d1f0_3_ff; +extern cpuop_func op_d1fb_3_nf; +extern cpuop_func op_d1fb_3_ff; +extern cpuop_func op_e0f0_3_nf; +extern cpuop_func op_e0f0_3_ff; +extern cpuop_func op_e1f0_3_nf; +extern cpuop_func op_e1f0_3_ff; +extern cpuop_func op_e2f0_3_nf; +extern cpuop_func op_e2f0_3_ff; +extern cpuop_func op_e3f0_3_nf; +extern cpuop_func op_e3f0_3_ff; +extern cpuop_func op_e4f0_3_nf; +extern cpuop_func op_e4f0_3_ff; +extern cpuop_func op_e5f0_3_nf; +extern cpuop_func op_e5f0_3_ff; +extern cpuop_func op_e6f0_3_nf; +extern cpuop_func op_e6f0_3_ff; +extern cpuop_func op_e7f0_3_nf; +extern cpuop_func op_e7f0_3_ff; +extern cpuop_func op_40c0_4_nf; +extern cpuop_func op_40c0_4_ff; +extern cpuop_func op_40d0_4_nf; +extern cpuop_func op_40d0_4_ff; +extern cpuop_func op_40d8_4_nf; +extern cpuop_func op_40d8_4_ff; +extern cpuop_func op_40e0_4_nf; +extern cpuop_func op_40e0_4_ff; +extern cpuop_func op_40e8_4_nf; +extern cpuop_func op_40e8_4_ff; +extern cpuop_func op_40f0_4_nf; +extern cpuop_func op_40f0_4_ff; +extern cpuop_func op_40f8_4_nf; +extern cpuop_func op_40f8_4_ff; +extern cpuop_func op_40f9_4_nf; +extern cpuop_func op_40f9_4_ff; +extern cpuop_func op_4e73_4_nf; +extern cpuop_func op_4e73_4_ff; +extern cpuop_func op_0000_5_nf; +extern cpuop_func op_0000_5_ff; +extern cpuop_func op_0010_5_nf; +extern cpuop_func op_0010_5_ff; +extern cpuop_func op_0018_5_nf; +extern cpuop_func op_0018_5_ff; +extern cpuop_func op_0020_5_nf; +extern cpuop_func op_0020_5_ff; +extern cpuop_func op_0028_5_nf; +extern cpuop_func op_0028_5_ff; +extern cpuop_func op_0030_5_nf; +extern cpuop_func op_0030_5_ff; +extern cpuop_func op_0038_5_nf; +extern cpuop_func op_0038_5_ff; +extern cpuop_func op_0039_5_nf; +extern cpuop_func op_0039_5_ff; +extern cpuop_func op_003c_5_nf; +extern cpuop_func op_003c_5_ff; +extern cpuop_func op_0040_5_nf; +extern cpuop_func op_0040_5_ff; +extern cpuop_func op_0050_5_nf; +extern cpuop_func op_0050_5_ff; +extern cpuop_func op_0058_5_nf; +extern cpuop_func op_0058_5_ff; +extern cpuop_func op_0060_5_nf; +extern cpuop_func op_0060_5_ff; +extern cpuop_func op_0068_5_nf; +extern cpuop_func op_0068_5_ff; +extern cpuop_func op_0070_5_nf; +extern cpuop_func op_0070_5_ff; +extern cpuop_func op_0078_5_nf; +extern cpuop_func op_0078_5_ff; +extern cpuop_func op_0079_5_nf; +extern cpuop_func op_0079_5_ff; +extern cpuop_func op_007c_5_nf; +extern cpuop_func op_007c_5_ff; +extern cpuop_func op_0080_5_nf; +extern cpuop_func op_0080_5_ff; +extern cpuop_func op_0090_5_nf; +extern cpuop_func op_0090_5_ff; +extern cpuop_func op_0098_5_nf; +extern cpuop_func op_0098_5_ff; +extern cpuop_func op_00a0_5_nf; +extern cpuop_func op_00a0_5_ff; +extern cpuop_func op_00a8_5_nf; +extern cpuop_func op_00a8_5_ff; +extern cpuop_func op_00b0_5_nf; +extern cpuop_func op_00b0_5_ff; +extern cpuop_func op_00b8_5_nf; +extern cpuop_func op_00b8_5_ff; +extern cpuop_func op_00b9_5_nf; +extern cpuop_func op_00b9_5_ff; +extern cpuop_func op_0100_5_nf; +extern cpuop_func op_0100_5_ff; +extern cpuop_func op_0108_5_nf; +extern cpuop_func op_0108_5_ff; +extern cpuop_func op_0110_5_nf; +extern cpuop_func op_0110_5_ff; +extern cpuop_func op_0118_5_nf; +extern cpuop_func op_0118_5_ff; +extern cpuop_func op_0120_5_nf; +extern cpuop_func op_0120_5_ff; +extern cpuop_func op_0128_5_nf; +extern cpuop_func op_0128_5_ff; +extern cpuop_func op_0130_5_nf; +extern cpuop_func op_0130_5_ff; +extern cpuop_func op_0138_5_nf; +extern cpuop_func op_0138_5_ff; +extern cpuop_func op_0139_5_nf; +extern cpuop_func op_0139_5_ff; +extern cpuop_func op_013a_5_nf; +extern cpuop_func op_013a_5_ff; +extern cpuop_func op_013b_5_nf; +extern cpuop_func op_013b_5_ff; +extern cpuop_func op_013c_5_nf; +extern cpuop_func op_013c_5_ff; +extern cpuop_func op_0140_5_nf; +extern cpuop_func op_0140_5_ff; +extern cpuop_func op_0148_5_nf; +extern cpuop_func op_0148_5_ff; +extern cpuop_func op_0150_5_nf; +extern cpuop_func op_0150_5_ff; +extern cpuop_func op_0158_5_nf; +extern cpuop_func op_0158_5_ff; +extern cpuop_func op_0160_5_nf; +extern cpuop_func op_0160_5_ff; +extern cpuop_func op_0168_5_nf; +extern cpuop_func op_0168_5_ff; +extern cpuop_func op_0170_5_nf; +extern cpuop_func op_0170_5_ff; +extern cpuop_func op_0178_5_nf; +extern cpuop_func op_0178_5_ff; +extern cpuop_func op_0179_5_nf; +extern cpuop_func op_0179_5_ff; +extern cpuop_func op_017a_5_nf; +extern cpuop_func op_017a_5_ff; +extern cpuop_func op_017b_5_nf; +extern cpuop_func op_017b_5_ff; +extern cpuop_func op_0180_5_nf; +extern cpuop_func op_0180_5_ff; +extern cpuop_func op_0188_5_nf; +extern cpuop_func op_0188_5_ff; +extern cpuop_func op_0190_5_nf; +extern cpuop_func op_0190_5_ff; +extern cpuop_func op_0198_5_nf; +extern cpuop_func op_0198_5_ff; +extern cpuop_func op_01a0_5_nf; +extern cpuop_func op_01a0_5_ff; +extern cpuop_func op_01a8_5_nf; +extern cpuop_func op_01a8_5_ff; +extern cpuop_func op_01b0_5_nf; +extern cpuop_func op_01b0_5_ff; +extern cpuop_func op_01b8_5_nf; +extern cpuop_func op_01b8_5_ff; +extern cpuop_func op_01b9_5_nf; +extern cpuop_func op_01b9_5_ff; +extern cpuop_func op_01ba_5_nf; +extern cpuop_func op_01ba_5_ff; +extern cpuop_func op_01bb_5_nf; +extern cpuop_func op_01bb_5_ff; +extern cpuop_func op_01c0_5_nf; +extern cpuop_func op_01c0_5_ff; +extern cpuop_func op_01c8_5_nf; +extern cpuop_func op_01c8_5_ff; +extern cpuop_func op_01d0_5_nf; +extern cpuop_func op_01d0_5_ff; +extern cpuop_func op_01d8_5_nf; +extern cpuop_func op_01d8_5_ff; +extern cpuop_func op_01e0_5_nf; +extern cpuop_func op_01e0_5_ff; +extern cpuop_func op_01e8_5_nf; +extern cpuop_func op_01e8_5_ff; +extern cpuop_func op_01f0_5_nf; +extern cpuop_func op_01f0_5_ff; +extern cpuop_func op_01f8_5_nf; +extern cpuop_func op_01f8_5_ff; +extern cpuop_func op_01f9_5_nf; +extern cpuop_func op_01f9_5_ff; +extern cpuop_func op_01fa_5_nf; +extern cpuop_func op_01fa_5_ff; +extern cpuop_func op_01fb_5_nf; +extern cpuop_func op_01fb_5_ff; +extern cpuop_func op_0200_5_nf; +extern cpuop_func op_0200_5_ff; +extern cpuop_func op_0210_5_nf; +extern cpuop_func op_0210_5_ff; +extern cpuop_func op_0218_5_nf; +extern cpuop_func op_0218_5_ff; +extern cpuop_func op_0220_5_nf; +extern cpuop_func op_0220_5_ff; +extern cpuop_func op_0228_5_nf; +extern cpuop_func op_0228_5_ff; +extern cpuop_func op_0230_5_nf; +extern cpuop_func op_0230_5_ff; +extern cpuop_func op_0238_5_nf; +extern cpuop_func op_0238_5_ff; +extern cpuop_func op_0239_5_nf; +extern cpuop_func op_0239_5_ff; +extern cpuop_func op_023c_5_nf; +extern cpuop_func op_023c_5_ff; +extern cpuop_func op_0240_5_nf; +extern cpuop_func op_0240_5_ff; +extern cpuop_func op_0250_5_nf; +extern cpuop_func op_0250_5_ff; +extern cpuop_func op_0258_5_nf; +extern cpuop_func op_0258_5_ff; +extern cpuop_func op_0260_5_nf; +extern cpuop_func op_0260_5_ff; +extern cpuop_func op_0268_5_nf; +extern cpuop_func op_0268_5_ff; +extern cpuop_func op_0270_5_nf; +extern cpuop_func op_0270_5_ff; +extern cpuop_func op_0278_5_nf; +extern cpuop_func op_0278_5_ff; +extern cpuop_func op_0279_5_nf; +extern cpuop_func op_0279_5_ff; +extern cpuop_func op_027c_5_nf; +extern cpuop_func op_027c_5_ff; +extern cpuop_func op_0280_5_nf; +extern cpuop_func op_0280_5_ff; +extern cpuop_func op_0290_5_nf; +extern cpuop_func op_0290_5_ff; +extern cpuop_func op_0298_5_nf; +extern cpuop_func op_0298_5_ff; +extern cpuop_func op_02a0_5_nf; +extern cpuop_func op_02a0_5_ff; +extern cpuop_func op_02a8_5_nf; +extern cpuop_func op_02a8_5_ff; +extern cpuop_func op_02b0_5_nf; +extern cpuop_func op_02b0_5_ff; +extern cpuop_func op_02b8_5_nf; +extern cpuop_func op_02b8_5_ff; +extern cpuop_func op_02b9_5_nf; +extern cpuop_func op_02b9_5_ff; +extern cpuop_func op_0400_5_nf; +extern cpuop_func op_0400_5_ff; +extern cpuop_func op_0410_5_nf; +extern cpuop_func op_0410_5_ff; +extern cpuop_func op_0418_5_nf; +extern cpuop_func op_0418_5_ff; +extern cpuop_func op_0420_5_nf; +extern cpuop_func op_0420_5_ff; +extern cpuop_func op_0428_5_nf; +extern cpuop_func op_0428_5_ff; +extern cpuop_func op_0430_5_nf; +extern cpuop_func op_0430_5_ff; +extern cpuop_func op_0438_5_nf; +extern cpuop_func op_0438_5_ff; +extern cpuop_func op_0439_5_nf; +extern cpuop_func op_0439_5_ff; +extern cpuop_func op_0440_5_nf; +extern cpuop_func op_0440_5_ff; +extern cpuop_func op_0450_5_nf; +extern cpuop_func op_0450_5_ff; +extern cpuop_func op_0458_5_nf; +extern cpuop_func op_0458_5_ff; +extern cpuop_func op_0460_5_nf; +extern cpuop_func op_0460_5_ff; +extern cpuop_func op_0468_5_nf; +extern cpuop_func op_0468_5_ff; +extern cpuop_func op_0470_5_nf; +extern cpuop_func op_0470_5_ff; +extern cpuop_func op_0478_5_nf; +extern cpuop_func op_0478_5_ff; +extern cpuop_func op_0479_5_nf; +extern cpuop_func op_0479_5_ff; +extern cpuop_func op_0480_5_nf; +extern cpuop_func op_0480_5_ff; +extern cpuop_func op_0490_5_nf; +extern cpuop_func op_0490_5_ff; +extern cpuop_func op_0498_5_nf; +extern cpuop_func op_0498_5_ff; +extern cpuop_func op_04a0_5_nf; +extern cpuop_func op_04a0_5_ff; +extern cpuop_func op_04a8_5_nf; +extern cpuop_func op_04a8_5_ff; +extern cpuop_func op_04b0_5_nf; +extern cpuop_func op_04b0_5_ff; +extern cpuop_func op_04b8_5_nf; +extern cpuop_func op_04b8_5_ff; +extern cpuop_func op_04b9_5_nf; +extern cpuop_func op_04b9_5_ff; +extern cpuop_func op_0600_5_nf; +extern cpuop_func op_0600_5_ff; +extern cpuop_func op_0610_5_nf; +extern cpuop_func op_0610_5_ff; +extern cpuop_func op_0618_5_nf; +extern cpuop_func op_0618_5_ff; +extern cpuop_func op_0620_5_nf; +extern cpuop_func op_0620_5_ff; +extern cpuop_func op_0628_5_nf; +extern cpuop_func op_0628_5_ff; +extern cpuop_func op_0630_5_nf; +extern cpuop_func op_0630_5_ff; +extern cpuop_func op_0638_5_nf; +extern cpuop_func op_0638_5_ff; +extern cpuop_func op_0639_5_nf; +extern cpuop_func op_0639_5_ff; +extern cpuop_func op_0640_5_nf; +extern cpuop_func op_0640_5_ff; +extern cpuop_func op_0650_5_nf; +extern cpuop_func op_0650_5_ff; +extern cpuop_func op_0658_5_nf; +extern cpuop_func op_0658_5_ff; +extern cpuop_func op_0660_5_nf; +extern cpuop_func op_0660_5_ff; +extern cpuop_func op_0668_5_nf; +extern cpuop_func op_0668_5_ff; +extern cpuop_func op_0670_5_nf; +extern cpuop_func op_0670_5_ff; +extern cpuop_func op_0678_5_nf; +extern cpuop_func op_0678_5_ff; +extern cpuop_func op_0679_5_nf; +extern cpuop_func op_0679_5_ff; +extern cpuop_func op_0680_5_nf; +extern cpuop_func op_0680_5_ff; +extern cpuop_func op_0690_5_nf; +extern cpuop_func op_0690_5_ff; +extern cpuop_func op_0698_5_nf; +extern cpuop_func op_0698_5_ff; +extern cpuop_func op_06a0_5_nf; +extern cpuop_func op_06a0_5_ff; +extern cpuop_func op_06a8_5_nf; +extern cpuop_func op_06a8_5_ff; +extern cpuop_func op_06b0_5_nf; +extern cpuop_func op_06b0_5_ff; +extern cpuop_func op_06b8_5_nf; +extern cpuop_func op_06b8_5_ff; +extern cpuop_func op_06b9_5_nf; +extern cpuop_func op_06b9_5_ff; +extern cpuop_func op_0800_5_nf; +extern cpuop_func op_0800_5_ff; +extern cpuop_func op_0810_5_nf; +extern cpuop_func op_0810_5_ff; +extern cpuop_func op_0818_5_nf; +extern cpuop_func op_0818_5_ff; +extern cpuop_func op_0820_5_nf; +extern cpuop_func op_0820_5_ff; +extern cpuop_func op_0828_5_nf; +extern cpuop_func op_0828_5_ff; +extern cpuop_func op_0830_5_nf; +extern cpuop_func op_0830_5_ff; +extern cpuop_func op_0838_5_nf; +extern cpuop_func op_0838_5_ff; +extern cpuop_func op_0839_5_nf; +extern cpuop_func op_0839_5_ff; +extern cpuop_func op_083a_5_nf; +extern cpuop_func op_083a_5_ff; +extern cpuop_func op_083b_5_nf; +extern cpuop_func op_083b_5_ff; +extern cpuop_func op_083c_5_nf; +extern cpuop_func op_083c_5_ff; +extern cpuop_func op_0840_5_nf; +extern cpuop_func op_0840_5_ff; +extern cpuop_func op_0850_5_nf; +extern cpuop_func op_0850_5_ff; +extern cpuop_func op_0858_5_nf; +extern cpuop_func op_0858_5_ff; +extern cpuop_func op_0860_5_nf; +extern cpuop_func op_0860_5_ff; +extern cpuop_func op_0868_5_nf; +extern cpuop_func op_0868_5_ff; +extern cpuop_func op_0870_5_nf; +extern cpuop_func op_0870_5_ff; +extern cpuop_func op_0878_5_nf; +extern cpuop_func op_0878_5_ff; +extern cpuop_func op_0879_5_nf; +extern cpuop_func op_0879_5_ff; +extern cpuop_func op_087a_5_nf; +extern cpuop_func op_087a_5_ff; +extern cpuop_func op_087b_5_nf; +extern cpuop_func op_087b_5_ff; +extern cpuop_func op_0880_5_nf; +extern cpuop_func op_0880_5_ff; +extern cpuop_func op_0890_5_nf; +extern cpuop_func op_0890_5_ff; +extern cpuop_func op_0898_5_nf; +extern cpuop_func op_0898_5_ff; +extern cpuop_func op_08a0_5_nf; +extern cpuop_func op_08a0_5_ff; +extern cpuop_func op_08a8_5_nf; +extern cpuop_func op_08a8_5_ff; +extern cpuop_func op_08b0_5_nf; +extern cpuop_func op_08b0_5_ff; +extern cpuop_func op_08b8_5_nf; +extern cpuop_func op_08b8_5_ff; +extern cpuop_func op_08b9_5_nf; +extern cpuop_func op_08b9_5_ff; +extern cpuop_func op_08ba_5_nf; +extern cpuop_func op_08ba_5_ff; +extern cpuop_func op_08bb_5_nf; +extern cpuop_func op_08bb_5_ff; +extern cpuop_func op_08c0_5_nf; +extern cpuop_func op_08c0_5_ff; +extern cpuop_func op_08d0_5_nf; +extern cpuop_func op_08d0_5_ff; +extern cpuop_func op_08d8_5_nf; +extern cpuop_func op_08d8_5_ff; +extern cpuop_func op_08e0_5_nf; +extern cpuop_func op_08e0_5_ff; +extern cpuop_func op_08e8_5_nf; +extern cpuop_func op_08e8_5_ff; +extern cpuop_func op_08f0_5_nf; +extern cpuop_func op_08f0_5_ff; +extern cpuop_func op_08f8_5_nf; +extern cpuop_func op_08f8_5_ff; +extern cpuop_func op_08f9_5_nf; +extern cpuop_func op_08f9_5_ff; +extern cpuop_func op_08fa_5_nf; +extern cpuop_func op_08fa_5_ff; +extern cpuop_func op_08fb_5_nf; +extern cpuop_func op_08fb_5_ff; +extern cpuop_func op_0a00_5_nf; +extern cpuop_func op_0a00_5_ff; +extern cpuop_func op_0a10_5_nf; +extern cpuop_func op_0a10_5_ff; +extern cpuop_func op_0a18_5_nf; +extern cpuop_func op_0a18_5_ff; +extern cpuop_func op_0a20_5_nf; +extern cpuop_func op_0a20_5_ff; +extern cpuop_func op_0a28_5_nf; +extern cpuop_func op_0a28_5_ff; +extern cpuop_func op_0a30_5_nf; +extern cpuop_func op_0a30_5_ff; +extern cpuop_func op_0a38_5_nf; +extern cpuop_func op_0a38_5_ff; +extern cpuop_func op_0a39_5_nf; +extern cpuop_func op_0a39_5_ff; +extern cpuop_func op_0a3c_5_nf; +extern cpuop_func op_0a3c_5_ff; +extern cpuop_func op_0a40_5_nf; +extern cpuop_func op_0a40_5_ff; +extern cpuop_func op_0a50_5_nf; +extern cpuop_func op_0a50_5_ff; +extern cpuop_func op_0a58_5_nf; +extern cpuop_func op_0a58_5_ff; +extern cpuop_func op_0a60_5_nf; +extern cpuop_func op_0a60_5_ff; +extern cpuop_func op_0a68_5_nf; +extern cpuop_func op_0a68_5_ff; +extern cpuop_func op_0a70_5_nf; +extern cpuop_func op_0a70_5_ff; +extern cpuop_func op_0a78_5_nf; +extern cpuop_func op_0a78_5_ff; +extern cpuop_func op_0a79_5_nf; +extern cpuop_func op_0a79_5_ff; +extern cpuop_func op_0a7c_5_nf; +extern cpuop_func op_0a7c_5_ff; +extern cpuop_func op_0a80_5_nf; +extern cpuop_func op_0a80_5_ff; +extern cpuop_func op_0a90_5_nf; +extern cpuop_func op_0a90_5_ff; +extern cpuop_func op_0a98_5_nf; +extern cpuop_func op_0a98_5_ff; +extern cpuop_func op_0aa0_5_nf; +extern cpuop_func op_0aa0_5_ff; +extern cpuop_func op_0aa8_5_nf; +extern cpuop_func op_0aa8_5_ff; +extern cpuop_func op_0ab0_5_nf; +extern cpuop_func op_0ab0_5_ff; +extern cpuop_func op_0ab8_5_nf; +extern cpuop_func op_0ab8_5_ff; +extern cpuop_func op_0ab9_5_nf; +extern cpuop_func op_0ab9_5_ff; +extern cpuop_func op_0c00_5_nf; +extern cpuop_func op_0c00_5_ff; +extern cpuop_func op_0c10_5_nf; +extern cpuop_func op_0c10_5_ff; +extern cpuop_func op_0c18_5_nf; +extern cpuop_func op_0c18_5_ff; +extern cpuop_func op_0c20_5_nf; +extern cpuop_func op_0c20_5_ff; +extern cpuop_func op_0c28_5_nf; +extern cpuop_func op_0c28_5_ff; +extern cpuop_func op_0c30_5_nf; +extern cpuop_func op_0c30_5_ff; +extern cpuop_func op_0c38_5_nf; +extern cpuop_func op_0c38_5_ff; +extern cpuop_func op_0c39_5_nf; +extern cpuop_func op_0c39_5_ff; +extern cpuop_func op_0c40_5_nf; +extern cpuop_func op_0c40_5_ff; +extern cpuop_func op_0c50_5_nf; +extern cpuop_func op_0c50_5_ff; +extern cpuop_func op_0c58_5_nf; +extern cpuop_func op_0c58_5_ff; +extern cpuop_func op_0c60_5_nf; +extern cpuop_func op_0c60_5_ff; +extern cpuop_func op_0c68_5_nf; +extern cpuop_func op_0c68_5_ff; +extern cpuop_func op_0c70_5_nf; +extern cpuop_func op_0c70_5_ff; +extern cpuop_func op_0c78_5_nf; +extern cpuop_func op_0c78_5_ff; +extern cpuop_func op_0c79_5_nf; +extern cpuop_func op_0c79_5_ff; +extern cpuop_func op_0c80_5_nf; +extern cpuop_func op_0c80_5_ff; +extern cpuop_func op_0c90_5_nf; +extern cpuop_func op_0c90_5_ff; +extern cpuop_func op_0c98_5_nf; +extern cpuop_func op_0c98_5_ff; +extern cpuop_func op_0ca0_5_nf; +extern cpuop_func op_0ca0_5_ff; +extern cpuop_func op_0ca8_5_nf; +extern cpuop_func op_0ca8_5_ff; +extern cpuop_func op_0cb0_5_nf; +extern cpuop_func op_0cb0_5_ff; +extern cpuop_func op_0cb8_5_nf; +extern cpuop_func op_0cb8_5_ff; +extern cpuop_func op_0cb9_5_nf; +extern cpuop_func op_0cb9_5_ff; +extern cpuop_func op_1000_5_nf; +extern cpuop_func op_1000_5_ff; +extern cpuop_func op_1010_5_nf; +extern cpuop_func op_1010_5_ff; +extern cpuop_func op_1018_5_nf; +extern cpuop_func op_1018_5_ff; +extern cpuop_func op_1020_5_nf; +extern cpuop_func op_1020_5_ff; +extern cpuop_func op_1028_5_nf; +extern cpuop_func op_1028_5_ff; +extern cpuop_func op_1030_5_nf; +extern cpuop_func op_1030_5_ff; +extern cpuop_func op_1038_5_nf; +extern cpuop_func op_1038_5_ff; +extern cpuop_func op_1039_5_nf; +extern cpuop_func op_1039_5_ff; +extern cpuop_func op_103a_5_nf; +extern cpuop_func op_103a_5_ff; +extern cpuop_func op_103b_5_nf; +extern cpuop_func op_103b_5_ff; +extern cpuop_func op_103c_5_nf; +extern cpuop_func op_103c_5_ff; +extern cpuop_func op_1080_5_nf; +extern cpuop_func op_1080_5_ff; +extern cpuop_func op_1090_5_nf; +extern cpuop_func op_1090_5_ff; +extern cpuop_func op_1098_5_nf; +extern cpuop_func op_1098_5_ff; +extern cpuop_func op_10a0_5_nf; +extern cpuop_func op_10a0_5_ff; +extern cpuop_func op_10a8_5_nf; +extern cpuop_func op_10a8_5_ff; +extern cpuop_func op_10b0_5_nf; +extern cpuop_func op_10b0_5_ff; +extern cpuop_func op_10b8_5_nf; +extern cpuop_func op_10b8_5_ff; +extern cpuop_func op_10b9_5_nf; +extern cpuop_func op_10b9_5_ff; +extern cpuop_func op_10ba_5_nf; +extern cpuop_func op_10ba_5_ff; +extern cpuop_func op_10bb_5_nf; +extern cpuop_func op_10bb_5_ff; +extern cpuop_func op_10bc_5_nf; +extern cpuop_func op_10bc_5_ff; +extern cpuop_func op_10c0_5_nf; +extern cpuop_func op_10c0_5_ff; +extern cpuop_func op_10d0_5_nf; +extern cpuop_func op_10d0_5_ff; +extern cpuop_func op_10d8_5_nf; +extern cpuop_func op_10d8_5_ff; +extern cpuop_func op_10e0_5_nf; +extern cpuop_func op_10e0_5_ff; +extern cpuop_func op_10e8_5_nf; +extern cpuop_func op_10e8_5_ff; +extern cpuop_func op_10f0_5_nf; +extern cpuop_func op_10f0_5_ff; +extern cpuop_func op_10f8_5_nf; +extern cpuop_func op_10f8_5_ff; +extern cpuop_func op_10f9_5_nf; +extern cpuop_func op_10f9_5_ff; +extern cpuop_func op_10fa_5_nf; +extern cpuop_func op_10fa_5_ff; +extern cpuop_func op_10fb_5_nf; +extern cpuop_func op_10fb_5_ff; +extern cpuop_func op_10fc_5_nf; +extern cpuop_func op_10fc_5_ff; +extern cpuop_func op_1100_5_nf; +extern cpuop_func op_1100_5_ff; +extern cpuop_func op_1110_5_nf; +extern cpuop_func op_1110_5_ff; +extern cpuop_func op_1118_5_nf; +extern cpuop_func op_1118_5_ff; +extern cpuop_func op_1120_5_nf; +extern cpuop_func op_1120_5_ff; +extern cpuop_func op_1128_5_nf; +extern cpuop_func op_1128_5_ff; +extern cpuop_func op_1130_5_nf; +extern cpuop_func op_1130_5_ff; +extern cpuop_func op_1138_5_nf; +extern cpuop_func op_1138_5_ff; +extern cpuop_func op_1139_5_nf; +extern cpuop_func op_1139_5_ff; +extern cpuop_func op_113a_5_nf; +extern cpuop_func op_113a_5_ff; +extern cpuop_func op_113b_5_nf; +extern cpuop_func op_113b_5_ff; +extern cpuop_func op_113c_5_nf; +extern cpuop_func op_113c_5_ff; +extern cpuop_func op_1140_5_nf; +extern cpuop_func op_1140_5_ff; +extern cpuop_func op_1150_5_nf; +extern cpuop_func op_1150_5_ff; +extern cpuop_func op_1158_5_nf; +extern cpuop_func op_1158_5_ff; +extern cpuop_func op_1160_5_nf; +extern cpuop_func op_1160_5_ff; +extern cpuop_func op_1168_5_nf; +extern cpuop_func op_1168_5_ff; +extern cpuop_func op_1170_5_nf; +extern cpuop_func op_1170_5_ff; +extern cpuop_func op_1178_5_nf; +extern cpuop_func op_1178_5_ff; +extern cpuop_func op_1179_5_nf; +extern cpuop_func op_1179_5_ff; +extern cpuop_func op_117a_5_nf; +extern cpuop_func op_117a_5_ff; +extern cpuop_func op_117b_5_nf; +extern cpuop_func op_117b_5_ff; +extern cpuop_func op_117c_5_nf; +extern cpuop_func op_117c_5_ff; +extern cpuop_func op_1180_5_nf; +extern cpuop_func op_1180_5_ff; +extern cpuop_func op_1190_5_nf; +extern cpuop_func op_1190_5_ff; +extern cpuop_func op_1198_5_nf; +extern cpuop_func op_1198_5_ff; +extern cpuop_func op_11a0_5_nf; +extern cpuop_func op_11a0_5_ff; +extern cpuop_func op_11a8_5_nf; +extern cpuop_func op_11a8_5_ff; +extern cpuop_func op_11b0_5_nf; +extern cpuop_func op_11b0_5_ff; +extern cpuop_func op_11b8_5_nf; +extern cpuop_func op_11b8_5_ff; +extern cpuop_func op_11b9_5_nf; +extern cpuop_func op_11b9_5_ff; +extern cpuop_func op_11ba_5_nf; +extern cpuop_func op_11ba_5_ff; +extern cpuop_func op_11bb_5_nf; +extern cpuop_func op_11bb_5_ff; +extern cpuop_func op_11bc_5_nf; +extern cpuop_func op_11bc_5_ff; +extern cpuop_func op_11c0_5_nf; +extern cpuop_func op_11c0_5_ff; +extern cpuop_func op_11d0_5_nf; +extern cpuop_func op_11d0_5_ff; +extern cpuop_func op_11d8_5_nf; +extern cpuop_func op_11d8_5_ff; +extern cpuop_func op_11e0_5_nf; +extern cpuop_func op_11e0_5_ff; +extern cpuop_func op_11e8_5_nf; +extern cpuop_func op_11e8_5_ff; +extern cpuop_func op_11f0_5_nf; +extern cpuop_func op_11f0_5_ff; +extern cpuop_func op_11f8_5_nf; +extern cpuop_func op_11f8_5_ff; +extern cpuop_func op_11f9_5_nf; +extern cpuop_func op_11f9_5_ff; +extern cpuop_func op_11fa_5_nf; +extern cpuop_func op_11fa_5_ff; +extern cpuop_func op_11fb_5_nf; +extern cpuop_func op_11fb_5_ff; +extern cpuop_func op_11fc_5_nf; +extern cpuop_func op_11fc_5_ff; +extern cpuop_func op_13c0_5_nf; +extern cpuop_func op_13c0_5_ff; +extern cpuop_func op_13d0_5_nf; +extern cpuop_func op_13d0_5_ff; +extern cpuop_func op_13d8_5_nf; +extern cpuop_func op_13d8_5_ff; +extern cpuop_func op_13e0_5_nf; +extern cpuop_func op_13e0_5_ff; +extern cpuop_func op_13e8_5_nf; +extern cpuop_func op_13e8_5_ff; +extern cpuop_func op_13f0_5_nf; +extern cpuop_func op_13f0_5_ff; +extern cpuop_func op_13f8_5_nf; +extern cpuop_func op_13f8_5_ff; +extern cpuop_func op_13f9_5_nf; +extern cpuop_func op_13f9_5_ff; +extern cpuop_func op_13fa_5_nf; +extern cpuop_func op_13fa_5_ff; +extern cpuop_func op_13fb_5_nf; +extern cpuop_func op_13fb_5_ff; +extern cpuop_func op_13fc_5_nf; +extern cpuop_func op_13fc_5_ff; +extern cpuop_func op_2000_5_nf; +extern cpuop_func op_2000_5_ff; +extern cpuop_func op_2008_5_nf; +extern cpuop_func op_2008_5_ff; +extern cpuop_func op_2010_5_nf; +extern cpuop_func op_2010_5_ff; +extern cpuop_func op_2018_5_nf; +extern cpuop_func op_2018_5_ff; +extern cpuop_func op_2020_5_nf; +extern cpuop_func op_2020_5_ff; +extern cpuop_func op_2028_5_nf; +extern cpuop_func op_2028_5_ff; +extern cpuop_func op_2030_5_nf; +extern cpuop_func op_2030_5_ff; +extern cpuop_func op_2038_5_nf; +extern cpuop_func op_2038_5_ff; +extern cpuop_func op_2039_5_nf; +extern cpuop_func op_2039_5_ff; +extern cpuop_func op_203a_5_nf; +extern cpuop_func op_203a_5_ff; +extern cpuop_func op_203b_5_nf; +extern cpuop_func op_203b_5_ff; +extern cpuop_func op_203c_5_nf; +extern cpuop_func op_203c_5_ff; +extern cpuop_func op_2040_5_nf; +extern cpuop_func op_2040_5_ff; +extern cpuop_func op_2048_5_nf; +extern cpuop_func op_2048_5_ff; +extern cpuop_func op_2050_5_nf; +extern cpuop_func op_2050_5_ff; +extern cpuop_func op_2058_5_nf; +extern cpuop_func op_2058_5_ff; +extern cpuop_func op_2060_5_nf; +extern cpuop_func op_2060_5_ff; +extern cpuop_func op_2068_5_nf; +extern cpuop_func op_2068_5_ff; +extern cpuop_func op_2070_5_nf; +extern cpuop_func op_2070_5_ff; +extern cpuop_func op_2078_5_nf; +extern cpuop_func op_2078_5_ff; +extern cpuop_func op_2079_5_nf; +extern cpuop_func op_2079_5_ff; +extern cpuop_func op_207a_5_nf; +extern cpuop_func op_207a_5_ff; +extern cpuop_func op_207b_5_nf; +extern cpuop_func op_207b_5_ff; +extern cpuop_func op_207c_5_nf; +extern cpuop_func op_207c_5_ff; +extern cpuop_func op_2080_5_nf; +extern cpuop_func op_2080_5_ff; +extern cpuop_func op_2088_5_nf; +extern cpuop_func op_2088_5_ff; +extern cpuop_func op_2090_5_nf; +extern cpuop_func op_2090_5_ff; +extern cpuop_func op_2098_5_nf; +extern cpuop_func op_2098_5_ff; +extern cpuop_func op_20a0_5_nf; +extern cpuop_func op_20a0_5_ff; +extern cpuop_func op_20a8_5_nf; +extern cpuop_func op_20a8_5_ff; +extern cpuop_func op_20b0_5_nf; +extern cpuop_func op_20b0_5_ff; +extern cpuop_func op_20b8_5_nf; +extern cpuop_func op_20b8_5_ff; +extern cpuop_func op_20b9_5_nf; +extern cpuop_func op_20b9_5_ff; +extern cpuop_func op_20ba_5_nf; +extern cpuop_func op_20ba_5_ff; +extern cpuop_func op_20bb_5_nf; +extern cpuop_func op_20bb_5_ff; +extern cpuop_func op_20bc_5_nf; +extern cpuop_func op_20bc_5_ff; +extern cpuop_func op_20c0_5_nf; +extern cpuop_func op_20c0_5_ff; +extern cpuop_func op_20c8_5_nf; +extern cpuop_func op_20c8_5_ff; +extern cpuop_func op_20d0_5_nf; +extern cpuop_func op_20d0_5_ff; +extern cpuop_func op_20d8_5_nf; +extern cpuop_func op_20d8_5_ff; +extern cpuop_func op_20e0_5_nf; +extern cpuop_func op_20e0_5_ff; +extern cpuop_func op_20e8_5_nf; +extern cpuop_func op_20e8_5_ff; +extern cpuop_func op_20f0_5_nf; +extern cpuop_func op_20f0_5_ff; +extern cpuop_func op_20f8_5_nf; +extern cpuop_func op_20f8_5_ff; +extern cpuop_func op_20f9_5_nf; +extern cpuop_func op_20f9_5_ff; +extern cpuop_func op_20fa_5_nf; +extern cpuop_func op_20fa_5_ff; +extern cpuop_func op_20fb_5_nf; +extern cpuop_func op_20fb_5_ff; +extern cpuop_func op_20fc_5_nf; +extern cpuop_func op_20fc_5_ff; +extern cpuop_func op_2100_5_nf; +extern cpuop_func op_2100_5_ff; +extern cpuop_func op_2108_5_nf; +extern cpuop_func op_2108_5_ff; +extern cpuop_func op_2110_5_nf; +extern cpuop_func op_2110_5_ff; +extern cpuop_func op_2118_5_nf; +extern cpuop_func op_2118_5_ff; +extern cpuop_func op_2120_5_nf; +extern cpuop_func op_2120_5_ff; +extern cpuop_func op_2128_5_nf; +extern cpuop_func op_2128_5_ff; +extern cpuop_func op_2130_5_nf; +extern cpuop_func op_2130_5_ff; +extern cpuop_func op_2138_5_nf; +extern cpuop_func op_2138_5_ff; +extern cpuop_func op_2139_5_nf; +extern cpuop_func op_2139_5_ff; +extern cpuop_func op_213a_5_nf; +extern cpuop_func op_213a_5_ff; +extern cpuop_func op_213b_5_nf; +extern cpuop_func op_213b_5_ff; +extern cpuop_func op_213c_5_nf; +extern cpuop_func op_213c_5_ff; +extern cpuop_func op_2140_5_nf; +extern cpuop_func op_2140_5_ff; +extern cpuop_func op_2148_5_nf; +extern cpuop_func op_2148_5_ff; +extern cpuop_func op_2150_5_nf; +extern cpuop_func op_2150_5_ff; +extern cpuop_func op_2158_5_nf; +extern cpuop_func op_2158_5_ff; +extern cpuop_func op_2160_5_nf; +extern cpuop_func op_2160_5_ff; +extern cpuop_func op_2168_5_nf; +extern cpuop_func op_2168_5_ff; +extern cpuop_func op_2170_5_nf; +extern cpuop_func op_2170_5_ff; +extern cpuop_func op_2178_5_nf; +extern cpuop_func op_2178_5_ff; +extern cpuop_func op_2179_5_nf; +extern cpuop_func op_2179_5_ff; +extern cpuop_func op_217a_5_nf; +extern cpuop_func op_217a_5_ff; +extern cpuop_func op_217b_5_nf; +extern cpuop_func op_217b_5_ff; +extern cpuop_func op_217c_5_nf; +extern cpuop_func op_217c_5_ff; +extern cpuop_func op_2180_5_nf; +extern cpuop_func op_2180_5_ff; +extern cpuop_func op_2188_5_nf; +extern cpuop_func op_2188_5_ff; +extern cpuop_func op_2190_5_nf; +extern cpuop_func op_2190_5_ff; +extern cpuop_func op_2198_5_nf; +extern cpuop_func op_2198_5_ff; +extern cpuop_func op_21a0_5_nf; +extern cpuop_func op_21a0_5_ff; +extern cpuop_func op_21a8_5_nf; +extern cpuop_func op_21a8_5_ff; +extern cpuop_func op_21b0_5_nf; +extern cpuop_func op_21b0_5_ff; +extern cpuop_func op_21b8_5_nf; +extern cpuop_func op_21b8_5_ff; +extern cpuop_func op_21b9_5_nf; +extern cpuop_func op_21b9_5_ff; +extern cpuop_func op_21ba_5_nf; +extern cpuop_func op_21ba_5_ff; +extern cpuop_func op_21bb_5_nf; +extern cpuop_func op_21bb_5_ff; +extern cpuop_func op_21bc_5_nf; +extern cpuop_func op_21bc_5_ff; +extern cpuop_func op_21c0_5_nf; +extern cpuop_func op_21c0_5_ff; +extern cpuop_func op_21c8_5_nf; +extern cpuop_func op_21c8_5_ff; +extern cpuop_func op_21d0_5_nf; +extern cpuop_func op_21d0_5_ff; +extern cpuop_func op_21d8_5_nf; +extern cpuop_func op_21d8_5_ff; +extern cpuop_func op_21e0_5_nf; +extern cpuop_func op_21e0_5_ff; +extern cpuop_func op_21e8_5_nf; +extern cpuop_func op_21e8_5_ff; +extern cpuop_func op_21f0_5_nf; +extern cpuop_func op_21f0_5_ff; +extern cpuop_func op_21f8_5_nf; +extern cpuop_func op_21f8_5_ff; +extern cpuop_func op_21f9_5_nf; +extern cpuop_func op_21f9_5_ff; +extern cpuop_func op_21fa_5_nf; +extern cpuop_func op_21fa_5_ff; +extern cpuop_func op_21fb_5_nf; +extern cpuop_func op_21fb_5_ff; +extern cpuop_func op_21fc_5_nf; +extern cpuop_func op_21fc_5_ff; +extern cpuop_func op_23c0_5_nf; +extern cpuop_func op_23c0_5_ff; +extern cpuop_func op_23c8_5_nf; +extern cpuop_func op_23c8_5_ff; +extern cpuop_func op_23d0_5_nf; +extern cpuop_func op_23d0_5_ff; +extern cpuop_func op_23d8_5_nf; +extern cpuop_func op_23d8_5_ff; +extern cpuop_func op_23e0_5_nf; +extern cpuop_func op_23e0_5_ff; +extern cpuop_func op_23e8_5_nf; +extern cpuop_func op_23e8_5_ff; +extern cpuop_func op_23f0_5_nf; +extern cpuop_func op_23f0_5_ff; +extern cpuop_func op_23f8_5_nf; +extern cpuop_func op_23f8_5_ff; +extern cpuop_func op_23f9_5_nf; +extern cpuop_func op_23f9_5_ff; +extern cpuop_func op_23fa_5_nf; +extern cpuop_func op_23fa_5_ff; +extern cpuop_func op_23fb_5_nf; +extern cpuop_func op_23fb_5_ff; +extern cpuop_func op_23fc_5_nf; +extern cpuop_func op_23fc_5_ff; +extern cpuop_func op_3000_5_nf; +extern cpuop_func op_3000_5_ff; +extern cpuop_func op_3008_5_nf; +extern cpuop_func op_3008_5_ff; +extern cpuop_func op_3010_5_nf; +extern cpuop_func op_3010_5_ff; +extern cpuop_func op_3018_5_nf; +extern cpuop_func op_3018_5_ff; +extern cpuop_func op_3020_5_nf; +extern cpuop_func op_3020_5_ff; +extern cpuop_func op_3028_5_nf; +extern cpuop_func op_3028_5_ff; +extern cpuop_func op_3030_5_nf; +extern cpuop_func op_3030_5_ff; +extern cpuop_func op_3038_5_nf; +extern cpuop_func op_3038_5_ff; +extern cpuop_func op_3039_5_nf; +extern cpuop_func op_3039_5_ff; +extern cpuop_func op_303a_5_nf; +extern cpuop_func op_303a_5_ff; +extern cpuop_func op_303b_5_nf; +extern cpuop_func op_303b_5_ff; +extern cpuop_func op_303c_5_nf; +extern cpuop_func op_303c_5_ff; +extern cpuop_func op_3040_5_nf; +extern cpuop_func op_3040_5_ff; +extern cpuop_func op_3048_5_nf; +extern cpuop_func op_3048_5_ff; +extern cpuop_func op_3050_5_nf; +extern cpuop_func op_3050_5_ff; +extern cpuop_func op_3058_5_nf; +extern cpuop_func op_3058_5_ff; +extern cpuop_func op_3060_5_nf; +extern cpuop_func op_3060_5_ff; +extern cpuop_func op_3068_5_nf; +extern cpuop_func op_3068_5_ff; +extern cpuop_func op_3070_5_nf; +extern cpuop_func op_3070_5_ff; +extern cpuop_func op_3078_5_nf; +extern cpuop_func op_3078_5_ff; +extern cpuop_func op_3079_5_nf; +extern cpuop_func op_3079_5_ff; +extern cpuop_func op_307a_5_nf; +extern cpuop_func op_307a_5_ff; +extern cpuop_func op_307b_5_nf; +extern cpuop_func op_307b_5_ff; +extern cpuop_func op_307c_5_nf; +extern cpuop_func op_307c_5_ff; +extern cpuop_func op_3080_5_nf; +extern cpuop_func op_3080_5_ff; +extern cpuop_func op_3088_5_nf; +extern cpuop_func op_3088_5_ff; +extern cpuop_func op_3090_5_nf; +extern cpuop_func op_3090_5_ff; +extern cpuop_func op_3098_5_nf; +extern cpuop_func op_3098_5_ff; +extern cpuop_func op_30a0_5_nf; +extern cpuop_func op_30a0_5_ff; +extern cpuop_func op_30a8_5_nf; +extern cpuop_func op_30a8_5_ff; +extern cpuop_func op_30b0_5_nf; +extern cpuop_func op_30b0_5_ff; +extern cpuop_func op_30b8_5_nf; +extern cpuop_func op_30b8_5_ff; +extern cpuop_func op_30b9_5_nf; +extern cpuop_func op_30b9_5_ff; +extern cpuop_func op_30ba_5_nf; +extern cpuop_func op_30ba_5_ff; +extern cpuop_func op_30bb_5_nf; +extern cpuop_func op_30bb_5_ff; +extern cpuop_func op_30bc_5_nf; +extern cpuop_func op_30bc_5_ff; +extern cpuop_func op_30c0_5_nf; +extern cpuop_func op_30c0_5_ff; +extern cpuop_func op_30c8_5_nf; +extern cpuop_func op_30c8_5_ff; +extern cpuop_func op_30d0_5_nf; +extern cpuop_func op_30d0_5_ff; +extern cpuop_func op_30d8_5_nf; +extern cpuop_func op_30d8_5_ff; +extern cpuop_func op_30e0_5_nf; +extern cpuop_func op_30e0_5_ff; +extern cpuop_func op_30e8_5_nf; +extern cpuop_func op_30e8_5_ff; +extern cpuop_func op_30f0_5_nf; +extern cpuop_func op_30f0_5_ff; +extern cpuop_func op_30f8_5_nf; +extern cpuop_func op_30f8_5_ff; +extern cpuop_func op_30f9_5_nf; +extern cpuop_func op_30f9_5_ff; +extern cpuop_func op_30fa_5_nf; +extern cpuop_func op_30fa_5_ff; +extern cpuop_func op_30fb_5_nf; +extern cpuop_func op_30fb_5_ff; +extern cpuop_func op_30fc_5_nf; +extern cpuop_func op_30fc_5_ff; +extern cpuop_func op_3100_5_nf; +extern cpuop_func op_3100_5_ff; +extern cpuop_func op_3108_5_nf; +extern cpuop_func op_3108_5_ff; +extern cpuop_func op_3110_5_nf; +extern cpuop_func op_3110_5_ff; +extern cpuop_func op_3118_5_nf; +extern cpuop_func op_3118_5_ff; +extern cpuop_func op_3120_5_nf; +extern cpuop_func op_3120_5_ff; +extern cpuop_func op_3128_5_nf; +extern cpuop_func op_3128_5_ff; +extern cpuop_func op_3130_5_nf; +extern cpuop_func op_3130_5_ff; +extern cpuop_func op_3138_5_nf; +extern cpuop_func op_3138_5_ff; +extern cpuop_func op_3139_5_nf; +extern cpuop_func op_3139_5_ff; +extern cpuop_func op_313a_5_nf; +extern cpuop_func op_313a_5_ff; +extern cpuop_func op_313b_5_nf; +extern cpuop_func op_313b_5_ff; +extern cpuop_func op_313c_5_nf; +extern cpuop_func op_313c_5_ff; +extern cpuop_func op_3140_5_nf; +extern cpuop_func op_3140_5_ff; +extern cpuop_func op_3148_5_nf; +extern cpuop_func op_3148_5_ff; +extern cpuop_func op_3150_5_nf; +extern cpuop_func op_3150_5_ff; +extern cpuop_func op_3158_5_nf; +extern cpuop_func op_3158_5_ff; +extern cpuop_func op_3160_5_nf; +extern cpuop_func op_3160_5_ff; +extern cpuop_func op_3168_5_nf; +extern cpuop_func op_3168_5_ff; +extern cpuop_func op_3170_5_nf; +extern cpuop_func op_3170_5_ff; +extern cpuop_func op_3178_5_nf; +extern cpuop_func op_3178_5_ff; +extern cpuop_func op_3179_5_nf; +extern cpuop_func op_3179_5_ff; +extern cpuop_func op_317a_5_nf; +extern cpuop_func op_317a_5_ff; +extern cpuop_func op_317b_5_nf; +extern cpuop_func op_317b_5_ff; +extern cpuop_func op_317c_5_nf; +extern cpuop_func op_317c_5_ff; +extern cpuop_func op_3180_5_nf; +extern cpuop_func op_3180_5_ff; +extern cpuop_func op_3188_5_nf; +extern cpuop_func op_3188_5_ff; +extern cpuop_func op_3190_5_nf; +extern cpuop_func op_3190_5_ff; +extern cpuop_func op_3198_5_nf; +extern cpuop_func op_3198_5_ff; +extern cpuop_func op_31a0_5_nf; +extern cpuop_func op_31a0_5_ff; +extern cpuop_func op_31a8_5_nf; +extern cpuop_func op_31a8_5_ff; +extern cpuop_func op_31b0_5_nf; +extern cpuop_func op_31b0_5_ff; +extern cpuop_func op_31b8_5_nf; +extern cpuop_func op_31b8_5_ff; +extern cpuop_func op_31b9_5_nf; +extern cpuop_func op_31b9_5_ff; +extern cpuop_func op_31ba_5_nf; +extern cpuop_func op_31ba_5_ff; +extern cpuop_func op_31bb_5_nf; +extern cpuop_func op_31bb_5_ff; +extern cpuop_func op_31bc_5_nf; +extern cpuop_func op_31bc_5_ff; +extern cpuop_func op_31c0_5_nf; +extern cpuop_func op_31c0_5_ff; +extern cpuop_func op_31c8_5_nf; +extern cpuop_func op_31c8_5_ff; +extern cpuop_func op_31d0_5_nf; +extern cpuop_func op_31d0_5_ff; +extern cpuop_func op_31d8_5_nf; +extern cpuop_func op_31d8_5_ff; +extern cpuop_func op_31e0_5_nf; +extern cpuop_func op_31e0_5_ff; +extern cpuop_func op_31e8_5_nf; +extern cpuop_func op_31e8_5_ff; +extern cpuop_func op_31f0_5_nf; +extern cpuop_func op_31f0_5_ff; +extern cpuop_func op_31f8_5_nf; +extern cpuop_func op_31f8_5_ff; +extern cpuop_func op_31f9_5_nf; +extern cpuop_func op_31f9_5_ff; +extern cpuop_func op_31fa_5_nf; +extern cpuop_func op_31fa_5_ff; +extern cpuop_func op_31fb_5_nf; +extern cpuop_func op_31fb_5_ff; +extern cpuop_func op_31fc_5_nf; +extern cpuop_func op_31fc_5_ff; +extern cpuop_func op_33c0_5_nf; +extern cpuop_func op_33c0_5_ff; +extern cpuop_func op_33c8_5_nf; +extern cpuop_func op_33c8_5_ff; +extern cpuop_func op_33d0_5_nf; +extern cpuop_func op_33d0_5_ff; +extern cpuop_func op_33d8_5_nf; +extern cpuop_func op_33d8_5_ff; +extern cpuop_func op_33e0_5_nf; +extern cpuop_func op_33e0_5_ff; +extern cpuop_func op_33e8_5_nf; +extern cpuop_func op_33e8_5_ff; +extern cpuop_func op_33f0_5_nf; +extern cpuop_func op_33f0_5_ff; +extern cpuop_func op_33f8_5_nf; +extern cpuop_func op_33f8_5_ff; +extern cpuop_func op_33f9_5_nf; +extern cpuop_func op_33f9_5_ff; +extern cpuop_func op_33fa_5_nf; +extern cpuop_func op_33fa_5_ff; +extern cpuop_func op_33fb_5_nf; +extern cpuop_func op_33fb_5_ff; +extern cpuop_func op_33fc_5_nf; +extern cpuop_func op_33fc_5_ff; +extern cpuop_func op_4000_5_nf; +extern cpuop_func op_4000_5_ff; +extern cpuop_func op_4010_5_nf; +extern cpuop_func op_4010_5_ff; +extern cpuop_func op_4018_5_nf; +extern cpuop_func op_4018_5_ff; +extern cpuop_func op_4020_5_nf; +extern cpuop_func op_4020_5_ff; +extern cpuop_func op_4028_5_nf; +extern cpuop_func op_4028_5_ff; +extern cpuop_func op_4030_5_nf; +extern cpuop_func op_4030_5_ff; +extern cpuop_func op_4038_5_nf; +extern cpuop_func op_4038_5_ff; +extern cpuop_func op_4039_5_nf; +extern cpuop_func op_4039_5_ff; +extern cpuop_func op_4040_5_nf; +extern cpuop_func op_4040_5_ff; +extern cpuop_func op_4050_5_nf; +extern cpuop_func op_4050_5_ff; +extern cpuop_func op_4058_5_nf; +extern cpuop_func op_4058_5_ff; +extern cpuop_func op_4060_5_nf; +extern cpuop_func op_4060_5_ff; +extern cpuop_func op_4068_5_nf; +extern cpuop_func op_4068_5_ff; +extern cpuop_func op_4070_5_nf; +extern cpuop_func op_4070_5_ff; +extern cpuop_func op_4078_5_nf; +extern cpuop_func op_4078_5_ff; +extern cpuop_func op_4079_5_nf; +extern cpuop_func op_4079_5_ff; +extern cpuop_func op_4080_5_nf; +extern cpuop_func op_4080_5_ff; +extern cpuop_func op_4090_5_nf; +extern cpuop_func op_4090_5_ff; +extern cpuop_func op_4098_5_nf; +extern cpuop_func op_4098_5_ff; +extern cpuop_func op_40a0_5_nf; +extern cpuop_func op_40a0_5_ff; +extern cpuop_func op_40a8_5_nf; +extern cpuop_func op_40a8_5_ff; +extern cpuop_func op_40b0_5_nf; +extern cpuop_func op_40b0_5_ff; +extern cpuop_func op_40b8_5_nf; +extern cpuop_func op_40b8_5_ff; +extern cpuop_func op_40b9_5_nf; +extern cpuop_func op_40b9_5_ff; +extern cpuop_func op_40c0_5_nf; +extern cpuop_func op_40c0_5_ff; +extern cpuop_func op_40d0_5_nf; +extern cpuop_func op_40d0_5_ff; +extern cpuop_func op_40d8_5_nf; +extern cpuop_func op_40d8_5_ff; +extern cpuop_func op_40e0_5_nf; +extern cpuop_func op_40e0_5_ff; +extern cpuop_func op_40e8_5_nf; +extern cpuop_func op_40e8_5_ff; +extern cpuop_func op_40f0_5_nf; +extern cpuop_func op_40f0_5_ff; +extern cpuop_func op_40f8_5_nf; +extern cpuop_func op_40f8_5_ff; +extern cpuop_func op_40f9_5_nf; +extern cpuop_func op_40f9_5_ff; +extern cpuop_func op_4100_5_nf; +extern cpuop_func op_4100_5_ff; +extern cpuop_func op_4110_5_nf; +extern cpuop_func op_4110_5_ff; +extern cpuop_func op_4118_5_nf; +extern cpuop_func op_4118_5_ff; +extern cpuop_func op_4120_5_nf; +extern cpuop_func op_4120_5_ff; +extern cpuop_func op_4128_5_nf; +extern cpuop_func op_4128_5_ff; +extern cpuop_func op_4130_5_nf; +extern cpuop_func op_4130_5_ff; +extern cpuop_func op_4138_5_nf; +extern cpuop_func op_4138_5_ff; +extern cpuop_func op_4139_5_nf; +extern cpuop_func op_4139_5_ff; +extern cpuop_func op_413a_5_nf; +extern cpuop_func op_413a_5_ff; +extern cpuop_func op_413b_5_nf; +extern cpuop_func op_413b_5_ff; +extern cpuop_func op_413c_5_nf; +extern cpuop_func op_413c_5_ff; +extern cpuop_func op_4180_5_nf; +extern cpuop_func op_4180_5_ff; +extern cpuop_func op_4190_5_nf; +extern cpuop_func op_4190_5_ff; +extern cpuop_func op_4198_5_nf; +extern cpuop_func op_4198_5_ff; +extern cpuop_func op_41a0_5_nf; +extern cpuop_func op_41a0_5_ff; +extern cpuop_func op_41a8_5_nf; +extern cpuop_func op_41a8_5_ff; +extern cpuop_func op_41b0_5_nf; +extern cpuop_func op_41b0_5_ff; +extern cpuop_func op_41b8_5_nf; +extern cpuop_func op_41b8_5_ff; +extern cpuop_func op_41b9_5_nf; +extern cpuop_func op_41b9_5_ff; +extern cpuop_func op_41ba_5_nf; +extern cpuop_func op_41ba_5_ff; +extern cpuop_func op_41bb_5_nf; +extern cpuop_func op_41bb_5_ff; +extern cpuop_func op_41bc_5_nf; +extern cpuop_func op_41bc_5_ff; +extern cpuop_func op_41d0_5_nf; +extern cpuop_func op_41d0_5_ff; +extern cpuop_func op_41e8_5_nf; +extern cpuop_func op_41e8_5_ff; +extern cpuop_func op_41f0_5_nf; +extern cpuop_func op_41f0_5_ff; +extern cpuop_func op_41f8_5_nf; +extern cpuop_func op_41f8_5_ff; +extern cpuop_func op_41f9_5_nf; +extern cpuop_func op_41f9_5_ff; +extern cpuop_func op_41fa_5_nf; +extern cpuop_func op_41fa_5_ff; +extern cpuop_func op_41fb_5_nf; +extern cpuop_func op_41fb_5_ff; +extern cpuop_func op_4200_5_nf; +extern cpuop_func op_4200_5_ff; +extern cpuop_func op_4210_5_nf; +extern cpuop_func op_4210_5_ff; +extern cpuop_func op_4218_5_nf; +extern cpuop_func op_4218_5_ff; +extern cpuop_func op_4220_5_nf; +extern cpuop_func op_4220_5_ff; +extern cpuop_func op_4228_5_nf; +extern cpuop_func op_4228_5_ff; +extern cpuop_func op_4230_5_nf; +extern cpuop_func op_4230_5_ff; +extern cpuop_func op_4238_5_nf; +extern cpuop_func op_4238_5_ff; +extern cpuop_func op_4239_5_nf; +extern cpuop_func op_4239_5_ff; +extern cpuop_func op_4240_5_nf; +extern cpuop_func op_4240_5_ff; +extern cpuop_func op_4250_5_nf; +extern cpuop_func op_4250_5_ff; +extern cpuop_func op_4258_5_nf; +extern cpuop_func op_4258_5_ff; +extern cpuop_func op_4260_5_nf; +extern cpuop_func op_4260_5_ff; +extern cpuop_func op_4268_5_nf; +extern cpuop_func op_4268_5_ff; +extern cpuop_func op_4270_5_nf; +extern cpuop_func op_4270_5_ff; +extern cpuop_func op_4278_5_nf; +extern cpuop_func op_4278_5_ff; +extern cpuop_func op_4279_5_nf; +extern cpuop_func op_4279_5_ff; +extern cpuop_func op_4280_5_nf; +extern cpuop_func op_4280_5_ff; +extern cpuop_func op_4290_5_nf; +extern cpuop_func op_4290_5_ff; +extern cpuop_func op_4298_5_nf; +extern cpuop_func op_4298_5_ff; +extern cpuop_func op_42a0_5_nf; +extern cpuop_func op_42a0_5_ff; +extern cpuop_func op_42a8_5_nf; +extern cpuop_func op_42a8_5_ff; +extern cpuop_func op_42b0_5_nf; +extern cpuop_func op_42b0_5_ff; +extern cpuop_func op_42b8_5_nf; +extern cpuop_func op_42b8_5_ff; +extern cpuop_func op_42b9_5_nf; +extern cpuop_func op_42b9_5_ff; +extern cpuop_func op_4400_5_nf; +extern cpuop_func op_4400_5_ff; +extern cpuop_func op_4410_5_nf; +extern cpuop_func op_4410_5_ff; +extern cpuop_func op_4418_5_nf; +extern cpuop_func op_4418_5_ff; +extern cpuop_func op_4420_5_nf; +extern cpuop_func op_4420_5_ff; +extern cpuop_func op_4428_5_nf; +extern cpuop_func op_4428_5_ff; +extern cpuop_func op_4430_5_nf; +extern cpuop_func op_4430_5_ff; +extern cpuop_func op_4438_5_nf; +extern cpuop_func op_4438_5_ff; +extern cpuop_func op_4439_5_nf; +extern cpuop_func op_4439_5_ff; +extern cpuop_func op_4440_5_nf; +extern cpuop_func op_4440_5_ff; +extern cpuop_func op_4450_5_nf; +extern cpuop_func op_4450_5_ff; +extern cpuop_func op_4458_5_nf; +extern cpuop_func op_4458_5_ff; +extern cpuop_func op_4460_5_nf; +extern cpuop_func op_4460_5_ff; +extern cpuop_func op_4468_5_nf; +extern cpuop_func op_4468_5_ff; +extern cpuop_func op_4470_5_nf; +extern cpuop_func op_4470_5_ff; +extern cpuop_func op_4478_5_nf; +extern cpuop_func op_4478_5_ff; +extern cpuop_func op_4479_5_nf; +extern cpuop_func op_4479_5_ff; +extern cpuop_func op_4480_5_nf; +extern cpuop_func op_4480_5_ff; +extern cpuop_func op_4490_5_nf; +extern cpuop_func op_4490_5_ff; +extern cpuop_func op_4498_5_nf; +extern cpuop_func op_4498_5_ff; +extern cpuop_func op_44a0_5_nf; +extern cpuop_func op_44a0_5_ff; +extern cpuop_func op_44a8_5_nf; +extern cpuop_func op_44a8_5_ff; +extern cpuop_func op_44b0_5_nf; +extern cpuop_func op_44b0_5_ff; +extern cpuop_func op_44b8_5_nf; +extern cpuop_func op_44b8_5_ff; +extern cpuop_func op_44b9_5_nf; +extern cpuop_func op_44b9_5_ff; +extern cpuop_func op_44c0_5_nf; +extern cpuop_func op_44c0_5_ff; +extern cpuop_func op_44d0_5_nf; +extern cpuop_func op_44d0_5_ff; +extern cpuop_func op_44d8_5_nf; +extern cpuop_func op_44d8_5_ff; +extern cpuop_func op_44e0_5_nf; +extern cpuop_func op_44e0_5_ff; +extern cpuop_func op_44e8_5_nf; +extern cpuop_func op_44e8_5_ff; +extern cpuop_func op_44f0_5_nf; +extern cpuop_func op_44f0_5_ff; +extern cpuop_func op_44f8_5_nf; +extern cpuop_func op_44f8_5_ff; +extern cpuop_func op_44f9_5_nf; +extern cpuop_func op_44f9_5_ff; +extern cpuop_func op_44fa_5_nf; +extern cpuop_func op_44fa_5_ff; +extern cpuop_func op_44fb_5_nf; +extern cpuop_func op_44fb_5_ff; +extern cpuop_func op_44fc_5_nf; +extern cpuop_func op_44fc_5_ff; +extern cpuop_func op_4600_5_nf; +extern cpuop_func op_4600_5_ff; +extern cpuop_func op_4610_5_nf; +extern cpuop_func op_4610_5_ff; +extern cpuop_func op_4618_5_nf; +extern cpuop_func op_4618_5_ff; +extern cpuop_func op_4620_5_nf; +extern cpuop_func op_4620_5_ff; +extern cpuop_func op_4628_5_nf; +extern cpuop_func op_4628_5_ff; +extern cpuop_func op_4630_5_nf; +extern cpuop_func op_4630_5_ff; +extern cpuop_func op_4638_5_nf; +extern cpuop_func op_4638_5_ff; +extern cpuop_func op_4639_5_nf; +extern cpuop_func op_4639_5_ff; +extern cpuop_func op_4640_5_nf; +extern cpuop_func op_4640_5_ff; +extern cpuop_func op_4650_5_nf; +extern cpuop_func op_4650_5_ff; +extern cpuop_func op_4658_5_nf; +extern cpuop_func op_4658_5_ff; +extern cpuop_func op_4660_5_nf; +extern cpuop_func op_4660_5_ff; +extern cpuop_func op_4668_5_nf; +extern cpuop_func op_4668_5_ff; +extern cpuop_func op_4670_5_nf; +extern cpuop_func op_4670_5_ff; +extern cpuop_func op_4678_5_nf; +extern cpuop_func op_4678_5_ff; +extern cpuop_func op_4679_5_nf; +extern cpuop_func op_4679_5_ff; +extern cpuop_func op_4680_5_nf; +extern cpuop_func op_4680_5_ff; +extern cpuop_func op_4690_5_nf; +extern cpuop_func op_4690_5_ff; +extern cpuop_func op_4698_5_nf; +extern cpuop_func op_4698_5_ff; +extern cpuop_func op_46a0_5_nf; +extern cpuop_func op_46a0_5_ff; +extern cpuop_func op_46a8_5_nf; +extern cpuop_func op_46a8_5_ff; +extern cpuop_func op_46b0_5_nf; +extern cpuop_func op_46b0_5_ff; +extern cpuop_func op_46b8_5_nf; +extern cpuop_func op_46b8_5_ff; +extern cpuop_func op_46b9_5_nf; +extern cpuop_func op_46b9_5_ff; +extern cpuop_func op_46c0_5_nf; +extern cpuop_func op_46c0_5_ff; +extern cpuop_func op_46d0_5_nf; +extern cpuop_func op_46d0_5_ff; +extern cpuop_func op_46d8_5_nf; +extern cpuop_func op_46d8_5_ff; +extern cpuop_func op_46e0_5_nf; +extern cpuop_func op_46e0_5_ff; +extern cpuop_func op_46e8_5_nf; +extern cpuop_func op_46e8_5_ff; +extern cpuop_func op_46f0_5_nf; +extern cpuop_func op_46f0_5_ff; +extern cpuop_func op_46f8_5_nf; +extern cpuop_func op_46f8_5_ff; +extern cpuop_func op_46f9_5_nf; +extern cpuop_func op_46f9_5_ff; +extern cpuop_func op_46fa_5_nf; +extern cpuop_func op_46fa_5_ff; +extern cpuop_func op_46fb_5_nf; +extern cpuop_func op_46fb_5_ff; +extern cpuop_func op_46fc_5_nf; +extern cpuop_func op_46fc_5_ff; +extern cpuop_func op_4800_5_nf; +extern cpuop_func op_4800_5_ff; +extern cpuop_func op_4810_5_nf; +extern cpuop_func op_4810_5_ff; +extern cpuop_func op_4818_5_nf; +extern cpuop_func op_4818_5_ff; +extern cpuop_func op_4820_5_nf; +extern cpuop_func op_4820_5_ff; +extern cpuop_func op_4828_5_nf; +extern cpuop_func op_4828_5_ff; +extern cpuop_func op_4830_5_nf; +extern cpuop_func op_4830_5_ff; +extern cpuop_func op_4838_5_nf; +extern cpuop_func op_4838_5_ff; +extern cpuop_func op_4839_5_nf; +extern cpuop_func op_4839_5_ff; +extern cpuop_func op_4840_5_nf; +extern cpuop_func op_4840_5_ff; +extern cpuop_func op_4850_5_nf; +extern cpuop_func op_4850_5_ff; +extern cpuop_func op_4868_5_nf; +extern cpuop_func op_4868_5_ff; +extern cpuop_func op_4870_5_nf; +extern cpuop_func op_4870_5_ff; +extern cpuop_func op_4878_5_nf; +extern cpuop_func op_4878_5_ff; +extern cpuop_func op_4879_5_nf; +extern cpuop_func op_4879_5_ff; +extern cpuop_func op_487a_5_nf; +extern cpuop_func op_487a_5_ff; +extern cpuop_func op_487b_5_nf; +extern cpuop_func op_487b_5_ff; +extern cpuop_func op_4880_5_nf; +extern cpuop_func op_4880_5_ff; +extern cpuop_func op_4890_5_nf; +extern cpuop_func op_4890_5_ff; +extern cpuop_func op_48a0_5_nf; +extern cpuop_func op_48a0_5_ff; +extern cpuop_func op_48a8_5_nf; +extern cpuop_func op_48a8_5_ff; +extern cpuop_func op_48b0_5_nf; +extern cpuop_func op_48b0_5_ff; +extern cpuop_func op_48b8_5_nf; +extern cpuop_func op_48b8_5_ff; +extern cpuop_func op_48b9_5_nf; +extern cpuop_func op_48b9_5_ff; +extern cpuop_func op_48c0_5_nf; +extern cpuop_func op_48c0_5_ff; +extern cpuop_func op_48d0_5_nf; +extern cpuop_func op_48d0_5_ff; +extern cpuop_func op_48e0_5_nf; +extern cpuop_func op_48e0_5_ff; +extern cpuop_func op_48e8_5_nf; +extern cpuop_func op_48e8_5_ff; +extern cpuop_func op_48f0_5_nf; +extern cpuop_func op_48f0_5_ff; +extern cpuop_func op_48f8_5_nf; +extern cpuop_func op_48f8_5_ff; +extern cpuop_func op_48f9_5_nf; +extern cpuop_func op_48f9_5_ff; +extern cpuop_func op_49c0_5_nf; +extern cpuop_func op_49c0_5_ff; +extern cpuop_func op_4a00_5_nf; +extern cpuop_func op_4a00_5_ff; +extern cpuop_func op_4a10_5_nf; +extern cpuop_func op_4a10_5_ff; +extern cpuop_func op_4a18_5_nf; +extern cpuop_func op_4a18_5_ff; +extern cpuop_func op_4a20_5_nf; +extern cpuop_func op_4a20_5_ff; +extern cpuop_func op_4a28_5_nf; +extern cpuop_func op_4a28_5_ff; +extern cpuop_func op_4a30_5_nf; +extern cpuop_func op_4a30_5_ff; +extern cpuop_func op_4a38_5_nf; +extern cpuop_func op_4a38_5_ff; +extern cpuop_func op_4a39_5_nf; +extern cpuop_func op_4a39_5_ff; +extern cpuop_func op_4a40_5_nf; +extern cpuop_func op_4a40_5_ff; +extern cpuop_func op_4a50_5_nf; +extern cpuop_func op_4a50_5_ff; +extern cpuop_func op_4a58_5_nf; +extern cpuop_func op_4a58_5_ff; +extern cpuop_func op_4a60_5_nf; +extern cpuop_func op_4a60_5_ff; +extern cpuop_func op_4a68_5_nf; +extern cpuop_func op_4a68_5_ff; +extern cpuop_func op_4a70_5_nf; +extern cpuop_func op_4a70_5_ff; +extern cpuop_func op_4a78_5_nf; +extern cpuop_func op_4a78_5_ff; +extern cpuop_func op_4a79_5_nf; +extern cpuop_func op_4a79_5_ff; +extern cpuop_func op_4a80_5_nf; +extern cpuop_func op_4a80_5_ff; +extern cpuop_func op_4a90_5_nf; +extern cpuop_func op_4a90_5_ff; +extern cpuop_func op_4a98_5_nf; +extern cpuop_func op_4a98_5_ff; +extern cpuop_func op_4aa0_5_nf; +extern cpuop_func op_4aa0_5_ff; +extern cpuop_func op_4aa8_5_nf; +extern cpuop_func op_4aa8_5_ff; +extern cpuop_func op_4ab0_5_nf; +extern cpuop_func op_4ab0_5_ff; +extern cpuop_func op_4ab8_5_nf; +extern cpuop_func op_4ab8_5_ff; +extern cpuop_func op_4ab9_5_nf; +extern cpuop_func op_4ab9_5_ff; +extern cpuop_func op_4ac0_5_nf; +extern cpuop_func op_4ac0_5_ff; +extern cpuop_func op_4ad0_5_nf; +extern cpuop_func op_4ad0_5_ff; +extern cpuop_func op_4ad8_5_nf; +extern cpuop_func op_4ad8_5_ff; +extern cpuop_func op_4ae0_5_nf; +extern cpuop_func op_4ae0_5_ff; +extern cpuop_func op_4ae8_5_nf; +extern cpuop_func op_4ae8_5_ff; +extern cpuop_func op_4af0_5_nf; +extern cpuop_func op_4af0_5_ff; +extern cpuop_func op_4af8_5_nf; +extern cpuop_func op_4af8_5_ff; +extern cpuop_func op_4af9_5_nf; +extern cpuop_func op_4af9_5_ff; +extern cpuop_func op_4c90_5_nf; +extern cpuop_func op_4c90_5_ff; +extern cpuop_func op_4c98_5_nf; +extern cpuop_func op_4c98_5_ff; +extern cpuop_func op_4ca8_5_nf; +extern cpuop_func op_4ca8_5_ff; +extern cpuop_func op_4cb0_5_nf; +extern cpuop_func op_4cb0_5_ff; +extern cpuop_func op_4cb8_5_nf; +extern cpuop_func op_4cb8_5_ff; +extern cpuop_func op_4cb9_5_nf; +extern cpuop_func op_4cb9_5_ff; +extern cpuop_func op_4cba_5_nf; +extern cpuop_func op_4cba_5_ff; +extern cpuop_func op_4cbb_5_nf; +extern cpuop_func op_4cbb_5_ff; +extern cpuop_func op_4cd0_5_nf; +extern cpuop_func op_4cd0_5_ff; +extern cpuop_func op_4cd8_5_nf; +extern cpuop_func op_4cd8_5_ff; +extern cpuop_func op_4ce8_5_nf; +extern cpuop_func op_4ce8_5_ff; +extern cpuop_func op_4cf0_5_nf; +extern cpuop_func op_4cf0_5_ff; +extern cpuop_func op_4cf8_5_nf; +extern cpuop_func op_4cf8_5_ff; +extern cpuop_func op_4cf9_5_nf; +extern cpuop_func op_4cf9_5_ff; +extern cpuop_func op_4cfa_5_nf; +extern cpuop_func op_4cfa_5_ff; +extern cpuop_func op_4cfb_5_nf; +extern cpuop_func op_4cfb_5_ff; +extern cpuop_func op_4e40_5_nf; +extern cpuop_func op_4e40_5_ff; +extern cpuop_func op_4e50_5_nf; +extern cpuop_func op_4e50_5_ff; +extern cpuop_func op_4e58_5_nf; +extern cpuop_func op_4e58_5_ff; +extern cpuop_func op_4e60_5_nf; +extern cpuop_func op_4e60_5_ff; +extern cpuop_func op_4e68_5_nf; +extern cpuop_func op_4e68_5_ff; +extern cpuop_func op_4e70_5_nf; +extern cpuop_func op_4e70_5_ff; +extern cpuop_func op_4e71_5_nf; +extern cpuop_func op_4e71_5_ff; +extern cpuop_func op_4e72_5_nf; +extern cpuop_func op_4e72_5_ff; +extern cpuop_func op_4e73_5_nf; +extern cpuop_func op_4e73_5_ff; +extern cpuop_func op_4e74_5_nf; +extern cpuop_func op_4e74_5_ff; +extern cpuop_func op_4e75_5_nf; +extern cpuop_func op_4e75_5_ff; +extern cpuop_func op_4e76_5_nf; +extern cpuop_func op_4e76_5_ff; +extern cpuop_func op_4e77_5_nf; +extern cpuop_func op_4e77_5_ff; +extern cpuop_func op_4e90_5_nf; +extern cpuop_func op_4e90_5_ff; +extern cpuop_func op_4ea8_5_nf; +extern cpuop_func op_4ea8_5_ff; +extern cpuop_func op_4eb0_5_nf; +extern cpuop_func op_4eb0_5_ff; +extern cpuop_func op_4eb8_5_nf; +extern cpuop_func op_4eb8_5_ff; +extern cpuop_func op_4eb9_5_nf; +extern cpuop_func op_4eb9_5_ff; +extern cpuop_func op_4eba_5_nf; +extern cpuop_func op_4eba_5_ff; +extern cpuop_func op_4ebb_5_nf; +extern cpuop_func op_4ebb_5_ff; +extern cpuop_func op_4ed0_5_nf; +extern cpuop_func op_4ed0_5_ff; +extern cpuop_func op_4ee8_5_nf; +extern cpuop_func op_4ee8_5_ff; +extern cpuop_func op_4ef0_5_nf; +extern cpuop_func op_4ef0_5_ff; +extern cpuop_func op_4ef8_5_nf; +extern cpuop_func op_4ef8_5_ff; +extern cpuop_func op_4ef9_5_nf; +extern cpuop_func op_4ef9_5_ff; +extern cpuop_func op_4efa_5_nf; +extern cpuop_func op_4efa_5_ff; +extern cpuop_func op_4efb_5_nf; +extern cpuop_func op_4efb_5_ff; +extern cpuop_func op_5000_5_nf; +extern cpuop_func op_5000_5_ff; +extern cpuop_func op_5010_5_nf; +extern cpuop_func op_5010_5_ff; +extern cpuop_func op_5018_5_nf; +extern cpuop_func op_5018_5_ff; +extern cpuop_func op_5020_5_nf; +extern cpuop_func op_5020_5_ff; +extern cpuop_func op_5028_5_nf; +extern cpuop_func op_5028_5_ff; +extern cpuop_func op_5030_5_nf; +extern cpuop_func op_5030_5_ff; +extern cpuop_func op_5038_5_nf; +extern cpuop_func op_5038_5_ff; +extern cpuop_func op_5039_5_nf; +extern cpuop_func op_5039_5_ff; +extern cpuop_func op_5040_5_nf; +extern cpuop_func op_5040_5_ff; +extern cpuop_func op_5048_5_nf; +extern cpuop_func op_5048_5_ff; +extern cpuop_func op_5050_5_nf; +extern cpuop_func op_5050_5_ff; +extern cpuop_func op_5058_5_nf; +extern cpuop_func op_5058_5_ff; +extern cpuop_func op_5060_5_nf; +extern cpuop_func op_5060_5_ff; +extern cpuop_func op_5068_5_nf; +extern cpuop_func op_5068_5_ff; +extern cpuop_func op_5070_5_nf; +extern cpuop_func op_5070_5_ff; +extern cpuop_func op_5078_5_nf; +extern cpuop_func op_5078_5_ff; +extern cpuop_func op_5079_5_nf; +extern cpuop_func op_5079_5_ff; +extern cpuop_func op_5080_5_nf; +extern cpuop_func op_5080_5_ff; +extern cpuop_func op_5088_5_nf; +extern cpuop_func op_5088_5_ff; +extern cpuop_func op_5090_5_nf; +extern cpuop_func op_5090_5_ff; +extern cpuop_func op_5098_5_nf; +extern cpuop_func op_5098_5_ff; +extern cpuop_func op_50a0_5_nf; +extern cpuop_func op_50a0_5_ff; +extern cpuop_func op_50a8_5_nf; +extern cpuop_func op_50a8_5_ff; +extern cpuop_func op_50b0_5_nf; +extern cpuop_func op_50b0_5_ff; +extern cpuop_func op_50b8_5_nf; +extern cpuop_func op_50b8_5_ff; +extern cpuop_func op_50b9_5_nf; +extern cpuop_func op_50b9_5_ff; +extern cpuop_func op_50c0_5_nf; +extern cpuop_func op_50c0_5_ff; +extern cpuop_func op_50c8_5_nf; +extern cpuop_func op_50c8_5_ff; +extern cpuop_func op_50d0_5_nf; +extern cpuop_func op_50d0_5_ff; +extern cpuop_func op_50d8_5_nf; +extern cpuop_func op_50d8_5_ff; +extern cpuop_func op_50e0_5_nf; +extern cpuop_func op_50e0_5_ff; +extern cpuop_func op_50e8_5_nf; +extern cpuop_func op_50e8_5_ff; +extern cpuop_func op_50f0_5_nf; +extern cpuop_func op_50f0_5_ff; +extern cpuop_func op_50f8_5_nf; +extern cpuop_func op_50f8_5_ff; +extern cpuop_func op_50f9_5_nf; +extern cpuop_func op_50f9_5_ff; +extern cpuop_func op_5100_5_nf; +extern cpuop_func op_5100_5_ff; +extern cpuop_func op_5110_5_nf; +extern cpuop_func op_5110_5_ff; +extern cpuop_func op_5118_5_nf; +extern cpuop_func op_5118_5_ff; +extern cpuop_func op_5120_5_nf; +extern cpuop_func op_5120_5_ff; +extern cpuop_func op_5128_5_nf; +extern cpuop_func op_5128_5_ff; +extern cpuop_func op_5130_5_nf; +extern cpuop_func op_5130_5_ff; +extern cpuop_func op_5138_5_nf; +extern cpuop_func op_5138_5_ff; +extern cpuop_func op_5139_5_nf; +extern cpuop_func op_5139_5_ff; +extern cpuop_func op_5140_5_nf; +extern cpuop_func op_5140_5_ff; +extern cpuop_func op_5148_5_nf; +extern cpuop_func op_5148_5_ff; +extern cpuop_func op_5150_5_nf; +extern cpuop_func op_5150_5_ff; +extern cpuop_func op_5158_5_nf; +extern cpuop_func op_5158_5_ff; +extern cpuop_func op_5160_5_nf; +extern cpuop_func op_5160_5_ff; +extern cpuop_func op_5168_5_nf; +extern cpuop_func op_5168_5_ff; +extern cpuop_func op_5170_5_nf; +extern cpuop_func op_5170_5_ff; +extern cpuop_func op_5178_5_nf; +extern cpuop_func op_5178_5_ff; +extern cpuop_func op_5179_5_nf; +extern cpuop_func op_5179_5_ff; +extern cpuop_func op_5180_5_nf; +extern cpuop_func op_5180_5_ff; +extern cpuop_func op_5188_5_nf; +extern cpuop_func op_5188_5_ff; +extern cpuop_func op_5190_5_nf; +extern cpuop_func op_5190_5_ff; +extern cpuop_func op_5198_5_nf; +extern cpuop_func op_5198_5_ff; +extern cpuop_func op_51a0_5_nf; +extern cpuop_func op_51a0_5_ff; +extern cpuop_func op_51a8_5_nf; +extern cpuop_func op_51a8_5_ff; +extern cpuop_func op_51b0_5_nf; +extern cpuop_func op_51b0_5_ff; +extern cpuop_func op_51b8_5_nf; +extern cpuop_func op_51b8_5_ff; +extern cpuop_func op_51b9_5_nf; +extern cpuop_func op_51b9_5_ff; +extern cpuop_func op_51c0_5_nf; +extern cpuop_func op_51c0_5_ff; +extern cpuop_func op_51c8_5_nf; +extern cpuop_func op_51c8_5_ff; +extern cpuop_func op_51d0_5_nf; +extern cpuop_func op_51d0_5_ff; +extern cpuop_func op_51d8_5_nf; +extern cpuop_func op_51d8_5_ff; +extern cpuop_func op_51e0_5_nf; +extern cpuop_func op_51e0_5_ff; +extern cpuop_func op_51e8_5_nf; +extern cpuop_func op_51e8_5_ff; +extern cpuop_func op_51f0_5_nf; +extern cpuop_func op_51f0_5_ff; +extern cpuop_func op_51f8_5_nf; +extern cpuop_func op_51f8_5_ff; +extern cpuop_func op_51f9_5_nf; +extern cpuop_func op_51f9_5_ff; +extern cpuop_func op_52c0_5_nf; +extern cpuop_func op_52c0_5_ff; +extern cpuop_func op_52c8_5_nf; +extern cpuop_func op_52c8_5_ff; +extern cpuop_func op_52d0_5_nf; +extern cpuop_func op_52d0_5_ff; +extern cpuop_func op_52d8_5_nf; +extern cpuop_func op_52d8_5_ff; +extern cpuop_func op_52e0_5_nf; +extern cpuop_func op_52e0_5_ff; +extern cpuop_func op_52e8_5_nf; +extern cpuop_func op_52e8_5_ff; +extern cpuop_func op_52f0_5_nf; +extern cpuop_func op_52f0_5_ff; +extern cpuop_func op_52f8_5_nf; +extern cpuop_func op_52f8_5_ff; +extern cpuop_func op_52f9_5_nf; +extern cpuop_func op_52f9_5_ff; +extern cpuop_func op_53c0_5_nf; +extern cpuop_func op_53c0_5_ff; +extern cpuop_func op_53c8_5_nf; +extern cpuop_func op_53c8_5_ff; +extern cpuop_func op_53d0_5_nf; +extern cpuop_func op_53d0_5_ff; +extern cpuop_func op_53d8_5_nf; +extern cpuop_func op_53d8_5_ff; +extern cpuop_func op_53e0_5_nf; +extern cpuop_func op_53e0_5_ff; +extern cpuop_func op_53e8_5_nf; +extern cpuop_func op_53e8_5_ff; +extern cpuop_func op_53f0_5_nf; +extern cpuop_func op_53f0_5_ff; +extern cpuop_func op_53f8_5_nf; +extern cpuop_func op_53f8_5_ff; +extern cpuop_func op_53f9_5_nf; +extern cpuop_func op_53f9_5_ff; +extern cpuop_func op_54c0_5_nf; +extern cpuop_func op_54c0_5_ff; +extern cpuop_func op_54c8_5_nf; +extern cpuop_func op_54c8_5_ff; +extern cpuop_func op_54d0_5_nf; +extern cpuop_func op_54d0_5_ff; +extern cpuop_func op_54d8_5_nf; +extern cpuop_func op_54d8_5_ff; +extern cpuop_func op_54e0_5_nf; +extern cpuop_func op_54e0_5_ff; +extern cpuop_func op_54e8_5_nf; +extern cpuop_func op_54e8_5_ff; +extern cpuop_func op_54f0_5_nf; +extern cpuop_func op_54f0_5_ff; +extern cpuop_func op_54f8_5_nf; +extern cpuop_func op_54f8_5_ff; +extern cpuop_func op_54f9_5_nf; +extern cpuop_func op_54f9_5_ff; +extern cpuop_func op_55c0_5_nf; +extern cpuop_func op_55c0_5_ff; +extern cpuop_func op_55c8_5_nf; +extern cpuop_func op_55c8_5_ff; +extern cpuop_func op_55d0_5_nf; +extern cpuop_func op_55d0_5_ff; +extern cpuop_func op_55d8_5_nf; +extern cpuop_func op_55d8_5_ff; +extern cpuop_func op_55e0_5_nf; +extern cpuop_func op_55e0_5_ff; +extern cpuop_func op_55e8_5_nf; +extern cpuop_func op_55e8_5_ff; +extern cpuop_func op_55f0_5_nf; +extern cpuop_func op_55f0_5_ff; +extern cpuop_func op_55f8_5_nf; +extern cpuop_func op_55f8_5_ff; +extern cpuop_func op_55f9_5_nf; +extern cpuop_func op_55f9_5_ff; +extern cpuop_func op_56c0_5_nf; +extern cpuop_func op_56c0_5_ff; +extern cpuop_func op_56c8_5_nf; +extern cpuop_func op_56c8_5_ff; +extern cpuop_func op_56d0_5_nf; +extern cpuop_func op_56d0_5_ff; +extern cpuop_func op_56d8_5_nf; +extern cpuop_func op_56d8_5_ff; +extern cpuop_func op_56e0_5_nf; +extern cpuop_func op_56e0_5_ff; +extern cpuop_func op_56e8_5_nf; +extern cpuop_func op_56e8_5_ff; +extern cpuop_func op_56f0_5_nf; +extern cpuop_func op_56f0_5_ff; +extern cpuop_func op_56f8_5_nf; +extern cpuop_func op_56f8_5_ff; +extern cpuop_func op_56f9_5_nf; +extern cpuop_func op_56f9_5_ff; +extern cpuop_func op_57c0_5_nf; +extern cpuop_func op_57c0_5_ff; +extern cpuop_func op_57c8_5_nf; +extern cpuop_func op_57c8_5_ff; +extern cpuop_func op_57d0_5_nf; +extern cpuop_func op_57d0_5_ff; +extern cpuop_func op_57d8_5_nf; +extern cpuop_func op_57d8_5_ff; +extern cpuop_func op_57e0_5_nf; +extern cpuop_func op_57e0_5_ff; +extern cpuop_func op_57e8_5_nf; +extern cpuop_func op_57e8_5_ff; +extern cpuop_func op_57f0_5_nf; +extern cpuop_func op_57f0_5_ff; +extern cpuop_func op_57f8_5_nf; +extern cpuop_func op_57f8_5_ff; +extern cpuop_func op_57f9_5_nf; +extern cpuop_func op_57f9_5_ff; +extern cpuop_func op_58c0_5_nf; +extern cpuop_func op_58c0_5_ff; +extern cpuop_func op_58c8_5_nf; +extern cpuop_func op_58c8_5_ff; +extern cpuop_func op_58d0_5_nf; +extern cpuop_func op_58d0_5_ff; +extern cpuop_func op_58d8_5_nf; +extern cpuop_func op_58d8_5_ff; +extern cpuop_func op_58e0_5_nf; +extern cpuop_func op_58e0_5_ff; +extern cpuop_func op_58e8_5_nf; +extern cpuop_func op_58e8_5_ff; +extern cpuop_func op_58f0_5_nf; +extern cpuop_func op_58f0_5_ff; +extern cpuop_func op_58f8_5_nf; +extern cpuop_func op_58f8_5_ff; +extern cpuop_func op_58f9_5_nf; +extern cpuop_func op_58f9_5_ff; +extern cpuop_func op_59c0_5_nf; +extern cpuop_func op_59c0_5_ff; +extern cpuop_func op_59c8_5_nf; +extern cpuop_func op_59c8_5_ff; +extern cpuop_func op_59d0_5_nf; +extern cpuop_func op_59d0_5_ff; +extern cpuop_func op_59d8_5_nf; +extern cpuop_func op_59d8_5_ff; +extern cpuop_func op_59e0_5_nf; +extern cpuop_func op_59e0_5_ff; +extern cpuop_func op_59e8_5_nf; +extern cpuop_func op_59e8_5_ff; +extern cpuop_func op_59f0_5_nf; +extern cpuop_func op_59f0_5_ff; +extern cpuop_func op_59f8_5_nf; +extern cpuop_func op_59f8_5_ff; +extern cpuop_func op_59f9_5_nf; +extern cpuop_func op_59f9_5_ff; +extern cpuop_func op_5ac0_5_nf; +extern cpuop_func op_5ac0_5_ff; +extern cpuop_func op_5ac8_5_nf; +extern cpuop_func op_5ac8_5_ff; +extern cpuop_func op_5ad0_5_nf; +extern cpuop_func op_5ad0_5_ff; +extern cpuop_func op_5ad8_5_nf; +extern cpuop_func op_5ad8_5_ff; +extern cpuop_func op_5ae0_5_nf; +extern cpuop_func op_5ae0_5_ff; +extern cpuop_func op_5ae8_5_nf; +extern cpuop_func op_5ae8_5_ff; +extern cpuop_func op_5af0_5_nf; +extern cpuop_func op_5af0_5_ff; +extern cpuop_func op_5af8_5_nf; +extern cpuop_func op_5af8_5_ff; +extern cpuop_func op_5af9_5_nf; +extern cpuop_func op_5af9_5_ff; +extern cpuop_func op_5bc0_5_nf; +extern cpuop_func op_5bc0_5_ff; +extern cpuop_func op_5bc8_5_nf; +extern cpuop_func op_5bc8_5_ff; +extern cpuop_func op_5bd0_5_nf; +extern cpuop_func op_5bd0_5_ff; +extern cpuop_func op_5bd8_5_nf; +extern cpuop_func op_5bd8_5_ff; +extern cpuop_func op_5be0_5_nf; +extern cpuop_func op_5be0_5_ff; +extern cpuop_func op_5be8_5_nf; +extern cpuop_func op_5be8_5_ff; +extern cpuop_func op_5bf0_5_nf; +extern cpuop_func op_5bf0_5_ff; +extern cpuop_func op_5bf8_5_nf; +extern cpuop_func op_5bf8_5_ff; +extern cpuop_func op_5bf9_5_nf; +extern cpuop_func op_5bf9_5_ff; +extern cpuop_func op_5cc0_5_nf; +extern cpuop_func op_5cc0_5_ff; +extern cpuop_func op_5cc8_5_nf; +extern cpuop_func op_5cc8_5_ff; +extern cpuop_func op_5cd0_5_nf; +extern cpuop_func op_5cd0_5_ff; +extern cpuop_func op_5cd8_5_nf; +extern cpuop_func op_5cd8_5_ff; +extern cpuop_func op_5ce0_5_nf; +extern cpuop_func op_5ce0_5_ff; +extern cpuop_func op_5ce8_5_nf; +extern cpuop_func op_5ce8_5_ff; +extern cpuop_func op_5cf0_5_nf; +extern cpuop_func op_5cf0_5_ff; +extern cpuop_func op_5cf8_5_nf; +extern cpuop_func op_5cf8_5_ff; +extern cpuop_func op_5cf9_5_nf; +extern cpuop_func op_5cf9_5_ff; +extern cpuop_func op_5dc0_5_nf; +extern cpuop_func op_5dc0_5_ff; +extern cpuop_func op_5dc8_5_nf; +extern cpuop_func op_5dc8_5_ff; +extern cpuop_func op_5dd0_5_nf; +extern cpuop_func op_5dd0_5_ff; +extern cpuop_func op_5dd8_5_nf; +extern cpuop_func op_5dd8_5_ff; +extern cpuop_func op_5de0_5_nf; +extern cpuop_func op_5de0_5_ff; +extern cpuop_func op_5de8_5_nf; +extern cpuop_func op_5de8_5_ff; +extern cpuop_func op_5df0_5_nf; +extern cpuop_func op_5df0_5_ff; +extern cpuop_func op_5df8_5_nf; +extern cpuop_func op_5df8_5_ff; +extern cpuop_func op_5df9_5_nf; +extern cpuop_func op_5df9_5_ff; +extern cpuop_func op_5ec0_5_nf; +extern cpuop_func op_5ec0_5_ff; +extern cpuop_func op_5ec8_5_nf; +extern cpuop_func op_5ec8_5_ff; +extern cpuop_func op_5ed0_5_nf; +extern cpuop_func op_5ed0_5_ff; +extern cpuop_func op_5ed8_5_nf; +extern cpuop_func op_5ed8_5_ff; +extern cpuop_func op_5ee0_5_nf; +extern cpuop_func op_5ee0_5_ff; +extern cpuop_func op_5ee8_5_nf; +extern cpuop_func op_5ee8_5_ff; +extern cpuop_func op_5ef0_5_nf; +extern cpuop_func op_5ef0_5_ff; +extern cpuop_func op_5ef8_5_nf; +extern cpuop_func op_5ef8_5_ff; +extern cpuop_func op_5ef9_5_nf; +extern cpuop_func op_5ef9_5_ff; +extern cpuop_func op_5fc0_5_nf; +extern cpuop_func op_5fc0_5_ff; +extern cpuop_func op_5fc8_5_nf; +extern cpuop_func op_5fc8_5_ff; +extern cpuop_func op_5fd0_5_nf; +extern cpuop_func op_5fd0_5_ff; +extern cpuop_func op_5fd8_5_nf; +extern cpuop_func op_5fd8_5_ff; +extern cpuop_func op_5fe0_5_nf; +extern cpuop_func op_5fe0_5_ff; +extern cpuop_func op_5fe8_5_nf; +extern cpuop_func op_5fe8_5_ff; +extern cpuop_func op_5ff0_5_nf; +extern cpuop_func op_5ff0_5_ff; +extern cpuop_func op_5ff8_5_nf; +extern cpuop_func op_5ff8_5_ff; +extern cpuop_func op_5ff9_5_nf; +extern cpuop_func op_5ff9_5_ff; +extern cpuop_func op_6000_5_nf; +extern cpuop_func op_6000_5_ff; +extern cpuop_func op_6001_5_nf; +extern cpuop_func op_6001_5_ff; +extern cpuop_func op_60ff_5_nf; +extern cpuop_func op_60ff_5_ff; +extern cpuop_func op_6100_5_nf; +extern cpuop_func op_6100_5_ff; +extern cpuop_func op_6101_5_nf; +extern cpuop_func op_6101_5_ff; +extern cpuop_func op_61ff_5_nf; +extern cpuop_func op_61ff_5_ff; +extern cpuop_func op_6200_5_nf; +extern cpuop_func op_6200_5_ff; +extern cpuop_func op_6201_5_nf; +extern cpuop_func op_6201_5_ff; +extern cpuop_func op_62ff_5_nf; +extern cpuop_func op_62ff_5_ff; +extern cpuop_func op_6300_5_nf; +extern cpuop_func op_6300_5_ff; +extern cpuop_func op_6301_5_nf; +extern cpuop_func op_6301_5_ff; +extern cpuop_func op_63ff_5_nf; +extern cpuop_func op_63ff_5_ff; +extern cpuop_func op_6400_5_nf; +extern cpuop_func op_6400_5_ff; +extern cpuop_func op_6401_5_nf; +extern cpuop_func op_6401_5_ff; +extern cpuop_func op_64ff_5_nf; +extern cpuop_func op_64ff_5_ff; +extern cpuop_func op_6500_5_nf; +extern cpuop_func op_6500_5_ff; +extern cpuop_func op_6501_5_nf; +extern cpuop_func op_6501_5_ff; +extern cpuop_func op_65ff_5_nf; +extern cpuop_func op_65ff_5_ff; +extern cpuop_func op_6600_5_nf; +extern cpuop_func op_6600_5_ff; +extern cpuop_func op_6601_5_nf; +extern cpuop_func op_6601_5_ff; +extern cpuop_func op_66ff_5_nf; +extern cpuop_func op_66ff_5_ff; +extern cpuop_func op_6700_5_nf; +extern cpuop_func op_6700_5_ff; +extern cpuop_func op_6701_5_nf; +extern cpuop_func op_6701_5_ff; +extern cpuop_func op_67ff_5_nf; +extern cpuop_func op_67ff_5_ff; +extern cpuop_func op_6800_5_nf; +extern cpuop_func op_6800_5_ff; +extern cpuop_func op_6801_5_nf; +extern cpuop_func op_6801_5_ff; +extern cpuop_func op_68ff_5_nf; +extern cpuop_func op_68ff_5_ff; +extern cpuop_func op_6900_5_nf; +extern cpuop_func op_6900_5_ff; +extern cpuop_func op_6901_5_nf; +extern cpuop_func op_6901_5_ff; +extern cpuop_func op_69ff_5_nf; +extern cpuop_func op_69ff_5_ff; +extern cpuop_func op_6a00_5_nf; +extern cpuop_func op_6a00_5_ff; +extern cpuop_func op_6a01_5_nf; +extern cpuop_func op_6a01_5_ff; +extern cpuop_func op_6aff_5_nf; +extern cpuop_func op_6aff_5_ff; +extern cpuop_func op_6b00_5_nf; +extern cpuop_func op_6b00_5_ff; +extern cpuop_func op_6b01_5_nf; +extern cpuop_func op_6b01_5_ff; +extern cpuop_func op_6bff_5_nf; +extern cpuop_func op_6bff_5_ff; +extern cpuop_func op_6c00_5_nf; +extern cpuop_func op_6c00_5_ff; +extern cpuop_func op_6c01_5_nf; +extern cpuop_func op_6c01_5_ff; +extern cpuop_func op_6cff_5_nf; +extern cpuop_func op_6cff_5_ff; +extern cpuop_func op_6d00_5_nf; +extern cpuop_func op_6d00_5_ff; +extern cpuop_func op_6d01_5_nf; +extern cpuop_func op_6d01_5_ff; +extern cpuop_func op_6dff_5_nf; +extern cpuop_func op_6dff_5_ff; +extern cpuop_func op_6e00_5_nf; +extern cpuop_func op_6e00_5_ff; +extern cpuop_func op_6e01_5_nf; +extern cpuop_func op_6e01_5_ff; +extern cpuop_func op_6eff_5_nf; +extern cpuop_func op_6eff_5_ff; +extern cpuop_func op_6f00_5_nf; +extern cpuop_func op_6f00_5_ff; +extern cpuop_func op_6f01_5_nf; +extern cpuop_func op_6f01_5_ff; +extern cpuop_func op_6fff_5_nf; +extern cpuop_func op_6fff_5_ff; +extern cpuop_func op_7000_5_nf; +extern cpuop_func op_7000_5_ff; +extern cpuop_func op_8000_5_nf; +extern cpuop_func op_8000_5_ff; +extern cpuop_func op_8010_5_nf; +extern cpuop_func op_8010_5_ff; +extern cpuop_func op_8018_5_nf; +extern cpuop_func op_8018_5_ff; +extern cpuop_func op_8020_5_nf; +extern cpuop_func op_8020_5_ff; +extern cpuop_func op_8028_5_nf; +extern cpuop_func op_8028_5_ff; +extern cpuop_func op_8030_5_nf; +extern cpuop_func op_8030_5_ff; +extern cpuop_func op_8038_5_nf; +extern cpuop_func op_8038_5_ff; +extern cpuop_func op_8039_5_nf; +extern cpuop_func op_8039_5_ff; +extern cpuop_func op_803a_5_nf; +extern cpuop_func op_803a_5_ff; +extern cpuop_func op_803b_5_nf; +extern cpuop_func op_803b_5_ff; +extern cpuop_func op_803c_5_nf; +extern cpuop_func op_803c_5_ff; +extern cpuop_func op_8040_5_nf; +extern cpuop_func op_8040_5_ff; +extern cpuop_func op_8050_5_nf; +extern cpuop_func op_8050_5_ff; +extern cpuop_func op_8058_5_nf; +extern cpuop_func op_8058_5_ff; +extern cpuop_func op_8060_5_nf; +extern cpuop_func op_8060_5_ff; +extern cpuop_func op_8068_5_nf; +extern cpuop_func op_8068_5_ff; +extern cpuop_func op_8070_5_nf; +extern cpuop_func op_8070_5_ff; +extern cpuop_func op_8078_5_nf; +extern cpuop_func op_8078_5_ff; +extern cpuop_func op_8079_5_nf; +extern cpuop_func op_8079_5_ff; +extern cpuop_func op_807a_5_nf; +extern cpuop_func op_807a_5_ff; +extern cpuop_func op_807b_5_nf; +extern cpuop_func op_807b_5_ff; +extern cpuop_func op_807c_5_nf; +extern cpuop_func op_807c_5_ff; +extern cpuop_func op_8080_5_nf; +extern cpuop_func op_8080_5_ff; +extern cpuop_func op_8090_5_nf; +extern cpuop_func op_8090_5_ff; +extern cpuop_func op_8098_5_nf; +extern cpuop_func op_8098_5_ff; +extern cpuop_func op_80a0_5_nf; +extern cpuop_func op_80a0_5_ff; +extern cpuop_func op_80a8_5_nf; +extern cpuop_func op_80a8_5_ff; +extern cpuop_func op_80b0_5_nf; +extern cpuop_func op_80b0_5_ff; +extern cpuop_func op_80b8_5_nf; +extern cpuop_func op_80b8_5_ff; +extern cpuop_func op_80b9_5_nf; +extern cpuop_func op_80b9_5_ff; +extern cpuop_func op_80ba_5_nf; +extern cpuop_func op_80ba_5_ff; +extern cpuop_func op_80bb_5_nf; +extern cpuop_func op_80bb_5_ff; +extern cpuop_func op_80bc_5_nf; +extern cpuop_func op_80bc_5_ff; +extern cpuop_func op_80c0_5_nf; +extern cpuop_func op_80c0_5_ff; +extern cpuop_func op_80d0_5_nf; +extern cpuop_func op_80d0_5_ff; +extern cpuop_func op_80d8_5_nf; +extern cpuop_func op_80d8_5_ff; +extern cpuop_func op_80e0_5_nf; +extern cpuop_func op_80e0_5_ff; +extern cpuop_func op_80e8_5_nf; +extern cpuop_func op_80e8_5_ff; +extern cpuop_func op_80f0_5_nf; +extern cpuop_func op_80f0_5_ff; +extern cpuop_func op_80f8_5_nf; +extern cpuop_func op_80f8_5_ff; +extern cpuop_func op_80f9_5_nf; +extern cpuop_func op_80f9_5_ff; +extern cpuop_func op_80fa_5_nf; +extern cpuop_func op_80fa_5_ff; +extern cpuop_func op_80fb_5_nf; +extern cpuop_func op_80fb_5_ff; +extern cpuop_func op_80fc_5_nf; +extern cpuop_func op_80fc_5_ff; +extern cpuop_func op_8100_5_nf; +extern cpuop_func op_8100_5_ff; +extern cpuop_func op_8108_5_nf; +extern cpuop_func op_8108_5_ff; +extern cpuop_func op_8110_5_nf; +extern cpuop_func op_8110_5_ff; +extern cpuop_func op_8118_5_nf; +extern cpuop_func op_8118_5_ff; +extern cpuop_func op_8120_5_nf; +extern cpuop_func op_8120_5_ff; +extern cpuop_func op_8128_5_nf; +extern cpuop_func op_8128_5_ff; +extern cpuop_func op_8130_5_nf; +extern cpuop_func op_8130_5_ff; +extern cpuop_func op_8138_5_nf; +extern cpuop_func op_8138_5_ff; +extern cpuop_func op_8139_5_nf; +extern cpuop_func op_8139_5_ff; +extern cpuop_func op_8150_5_nf; +extern cpuop_func op_8150_5_ff; +extern cpuop_func op_8158_5_nf; +extern cpuop_func op_8158_5_ff; +extern cpuop_func op_8160_5_nf; +extern cpuop_func op_8160_5_ff; +extern cpuop_func op_8168_5_nf; +extern cpuop_func op_8168_5_ff; +extern cpuop_func op_8170_5_nf; +extern cpuop_func op_8170_5_ff; +extern cpuop_func op_8178_5_nf; +extern cpuop_func op_8178_5_ff; +extern cpuop_func op_8179_5_nf; +extern cpuop_func op_8179_5_ff; +extern cpuop_func op_8190_5_nf; +extern cpuop_func op_8190_5_ff; +extern cpuop_func op_8198_5_nf; +extern cpuop_func op_8198_5_ff; +extern cpuop_func op_81a0_5_nf; +extern cpuop_func op_81a0_5_ff; +extern cpuop_func op_81a8_5_nf; +extern cpuop_func op_81a8_5_ff; +extern cpuop_func op_81b0_5_nf; +extern cpuop_func op_81b0_5_ff; +extern cpuop_func op_81b8_5_nf; +extern cpuop_func op_81b8_5_ff; +extern cpuop_func op_81b9_5_nf; +extern cpuop_func op_81b9_5_ff; +extern cpuop_func op_81c0_5_nf; +extern cpuop_func op_81c0_5_ff; +extern cpuop_func op_81d0_5_nf; +extern cpuop_func op_81d0_5_ff; +extern cpuop_func op_81d8_5_nf; +extern cpuop_func op_81d8_5_ff; +extern cpuop_func op_81e0_5_nf; +extern cpuop_func op_81e0_5_ff; +extern cpuop_func op_81e8_5_nf; +extern cpuop_func op_81e8_5_ff; +extern cpuop_func op_81f0_5_nf; +extern cpuop_func op_81f0_5_ff; +extern cpuop_func op_81f8_5_nf; +extern cpuop_func op_81f8_5_ff; +extern cpuop_func op_81f9_5_nf; +extern cpuop_func op_81f9_5_ff; +extern cpuop_func op_81fa_5_nf; +extern cpuop_func op_81fa_5_ff; +extern cpuop_func op_81fb_5_nf; +extern cpuop_func op_81fb_5_ff; +extern cpuop_func op_81fc_5_nf; +extern cpuop_func op_81fc_5_ff; +extern cpuop_func op_9000_5_nf; +extern cpuop_func op_9000_5_ff; +extern cpuop_func op_9010_5_nf; +extern cpuop_func op_9010_5_ff; +extern cpuop_func op_9018_5_nf; +extern cpuop_func op_9018_5_ff; +extern cpuop_func op_9020_5_nf; +extern cpuop_func op_9020_5_ff; +extern cpuop_func op_9028_5_nf; +extern cpuop_func op_9028_5_ff; +extern cpuop_func op_9030_5_nf; +extern cpuop_func op_9030_5_ff; +extern cpuop_func op_9038_5_nf; +extern cpuop_func op_9038_5_ff; +extern cpuop_func op_9039_5_nf; +extern cpuop_func op_9039_5_ff; +extern cpuop_func op_903a_5_nf; +extern cpuop_func op_903a_5_ff; +extern cpuop_func op_903b_5_nf; +extern cpuop_func op_903b_5_ff; +extern cpuop_func op_903c_5_nf; +extern cpuop_func op_903c_5_ff; +extern cpuop_func op_9040_5_nf; +extern cpuop_func op_9040_5_ff; +extern cpuop_func op_9048_5_nf; +extern cpuop_func op_9048_5_ff; +extern cpuop_func op_9050_5_nf; +extern cpuop_func op_9050_5_ff; +extern cpuop_func op_9058_5_nf; +extern cpuop_func op_9058_5_ff; +extern cpuop_func op_9060_5_nf; +extern cpuop_func op_9060_5_ff; +extern cpuop_func op_9068_5_nf; +extern cpuop_func op_9068_5_ff; +extern cpuop_func op_9070_5_nf; +extern cpuop_func op_9070_5_ff; +extern cpuop_func op_9078_5_nf; +extern cpuop_func op_9078_5_ff; +extern cpuop_func op_9079_5_nf; +extern cpuop_func op_9079_5_ff; +extern cpuop_func op_907a_5_nf; +extern cpuop_func op_907a_5_ff; +extern cpuop_func op_907b_5_nf; +extern cpuop_func op_907b_5_ff; +extern cpuop_func op_907c_5_nf; +extern cpuop_func op_907c_5_ff; +extern cpuop_func op_9080_5_nf; +extern cpuop_func op_9080_5_ff; +extern cpuop_func op_9088_5_nf; +extern cpuop_func op_9088_5_ff; +extern cpuop_func op_9090_5_nf; +extern cpuop_func op_9090_5_ff; +extern cpuop_func op_9098_5_nf; +extern cpuop_func op_9098_5_ff; +extern cpuop_func op_90a0_5_nf; +extern cpuop_func op_90a0_5_ff; +extern cpuop_func op_90a8_5_nf; +extern cpuop_func op_90a8_5_ff; +extern cpuop_func op_90b0_5_nf; +extern cpuop_func op_90b0_5_ff; +extern cpuop_func op_90b8_5_nf; +extern cpuop_func op_90b8_5_ff; +extern cpuop_func op_90b9_5_nf; +extern cpuop_func op_90b9_5_ff; +extern cpuop_func op_90ba_5_nf; +extern cpuop_func op_90ba_5_ff; +extern cpuop_func op_90bb_5_nf; +extern cpuop_func op_90bb_5_ff; +extern cpuop_func op_90bc_5_nf; +extern cpuop_func op_90bc_5_ff; +extern cpuop_func op_90c0_5_nf; +extern cpuop_func op_90c0_5_ff; +extern cpuop_func op_90c8_5_nf; +extern cpuop_func op_90c8_5_ff; +extern cpuop_func op_90d0_5_nf; +extern cpuop_func op_90d0_5_ff; +extern cpuop_func op_90d8_5_nf; +extern cpuop_func op_90d8_5_ff; +extern cpuop_func op_90e0_5_nf; +extern cpuop_func op_90e0_5_ff; +extern cpuop_func op_90e8_5_nf; +extern cpuop_func op_90e8_5_ff; +extern cpuop_func op_90f0_5_nf; +extern cpuop_func op_90f0_5_ff; +extern cpuop_func op_90f8_5_nf; +extern cpuop_func op_90f8_5_ff; +extern cpuop_func op_90f9_5_nf; +extern cpuop_func op_90f9_5_ff; +extern cpuop_func op_90fa_5_nf; +extern cpuop_func op_90fa_5_ff; +extern cpuop_func op_90fb_5_nf; +extern cpuop_func op_90fb_5_ff; +extern cpuop_func op_90fc_5_nf; +extern cpuop_func op_90fc_5_ff; +extern cpuop_func op_9100_5_nf; +extern cpuop_func op_9100_5_ff; +extern cpuop_func op_9108_5_nf; +extern cpuop_func op_9108_5_ff; +extern cpuop_func op_9110_5_nf; +extern cpuop_func op_9110_5_ff; +extern cpuop_func op_9118_5_nf; +extern cpuop_func op_9118_5_ff; +extern cpuop_func op_9120_5_nf; +extern cpuop_func op_9120_5_ff; +extern cpuop_func op_9128_5_nf; +extern cpuop_func op_9128_5_ff; +extern cpuop_func op_9130_5_nf; +extern cpuop_func op_9130_5_ff; +extern cpuop_func op_9138_5_nf; +extern cpuop_func op_9138_5_ff; +extern cpuop_func op_9139_5_nf; +extern cpuop_func op_9139_5_ff; +extern cpuop_func op_9140_5_nf; +extern cpuop_func op_9140_5_ff; +extern cpuop_func op_9148_5_nf; +extern cpuop_func op_9148_5_ff; +extern cpuop_func op_9150_5_nf; +extern cpuop_func op_9150_5_ff; +extern cpuop_func op_9158_5_nf; +extern cpuop_func op_9158_5_ff; +extern cpuop_func op_9160_5_nf; +extern cpuop_func op_9160_5_ff; +extern cpuop_func op_9168_5_nf; +extern cpuop_func op_9168_5_ff; +extern cpuop_func op_9170_5_nf; +extern cpuop_func op_9170_5_ff; +extern cpuop_func op_9178_5_nf; +extern cpuop_func op_9178_5_ff; +extern cpuop_func op_9179_5_nf; +extern cpuop_func op_9179_5_ff; +extern cpuop_func op_9180_5_nf; +extern cpuop_func op_9180_5_ff; +extern cpuop_func op_9188_5_nf; +extern cpuop_func op_9188_5_ff; +extern cpuop_func op_9190_5_nf; +extern cpuop_func op_9190_5_ff; +extern cpuop_func op_9198_5_nf; +extern cpuop_func op_9198_5_ff; +extern cpuop_func op_91a0_5_nf; +extern cpuop_func op_91a0_5_ff; +extern cpuop_func op_91a8_5_nf; +extern cpuop_func op_91a8_5_ff; +extern cpuop_func op_91b0_5_nf; +extern cpuop_func op_91b0_5_ff; +extern cpuop_func op_91b8_5_nf; +extern cpuop_func op_91b8_5_ff; +extern cpuop_func op_91b9_5_nf; +extern cpuop_func op_91b9_5_ff; +extern cpuop_func op_91c0_5_nf; +extern cpuop_func op_91c0_5_ff; +extern cpuop_func op_91c8_5_nf; +extern cpuop_func op_91c8_5_ff; +extern cpuop_func op_91d0_5_nf; +extern cpuop_func op_91d0_5_ff; +extern cpuop_func op_91d8_5_nf; +extern cpuop_func op_91d8_5_ff; +extern cpuop_func op_91e0_5_nf; +extern cpuop_func op_91e0_5_ff; +extern cpuop_func op_91e8_5_nf; +extern cpuop_func op_91e8_5_ff; +extern cpuop_func op_91f0_5_nf; +extern cpuop_func op_91f0_5_ff; +extern cpuop_func op_91f8_5_nf; +extern cpuop_func op_91f8_5_ff; +extern cpuop_func op_91f9_5_nf; +extern cpuop_func op_91f9_5_ff; +extern cpuop_func op_91fa_5_nf; +extern cpuop_func op_91fa_5_ff; +extern cpuop_func op_91fb_5_nf; +extern cpuop_func op_91fb_5_ff; +extern cpuop_func op_91fc_5_nf; +extern cpuop_func op_91fc_5_ff; +extern cpuop_func op_b000_5_nf; +extern cpuop_func op_b000_5_ff; +extern cpuop_func op_b010_5_nf; +extern cpuop_func op_b010_5_ff; +extern cpuop_func op_b018_5_nf; +extern cpuop_func op_b018_5_ff; +extern cpuop_func op_b020_5_nf; +extern cpuop_func op_b020_5_ff; +extern cpuop_func op_b028_5_nf; +extern cpuop_func op_b028_5_ff; +extern cpuop_func op_b030_5_nf; +extern cpuop_func op_b030_5_ff; +extern cpuop_func op_b038_5_nf; +extern cpuop_func op_b038_5_ff; +extern cpuop_func op_b039_5_nf; +extern cpuop_func op_b039_5_ff; +extern cpuop_func op_b03a_5_nf; +extern cpuop_func op_b03a_5_ff; +extern cpuop_func op_b03b_5_nf; +extern cpuop_func op_b03b_5_ff; +extern cpuop_func op_b03c_5_nf; +extern cpuop_func op_b03c_5_ff; +extern cpuop_func op_b040_5_nf; +extern cpuop_func op_b040_5_ff; +extern cpuop_func op_b048_5_nf; +extern cpuop_func op_b048_5_ff; +extern cpuop_func op_b050_5_nf; +extern cpuop_func op_b050_5_ff; +extern cpuop_func op_b058_5_nf; +extern cpuop_func op_b058_5_ff; +extern cpuop_func op_b060_5_nf; +extern cpuop_func op_b060_5_ff; +extern cpuop_func op_b068_5_nf; +extern cpuop_func op_b068_5_ff; +extern cpuop_func op_b070_5_nf; +extern cpuop_func op_b070_5_ff; +extern cpuop_func op_b078_5_nf; +extern cpuop_func op_b078_5_ff; +extern cpuop_func op_b079_5_nf; +extern cpuop_func op_b079_5_ff; +extern cpuop_func op_b07a_5_nf; +extern cpuop_func op_b07a_5_ff; +extern cpuop_func op_b07b_5_nf; +extern cpuop_func op_b07b_5_ff; +extern cpuop_func op_b07c_5_nf; +extern cpuop_func op_b07c_5_ff; +extern cpuop_func op_b080_5_nf; +extern cpuop_func op_b080_5_ff; +extern cpuop_func op_b088_5_nf; +extern cpuop_func op_b088_5_ff; +extern cpuop_func op_b090_5_nf; +extern cpuop_func op_b090_5_ff; +extern cpuop_func op_b098_5_nf; +extern cpuop_func op_b098_5_ff; +extern cpuop_func op_b0a0_5_nf; +extern cpuop_func op_b0a0_5_ff; +extern cpuop_func op_b0a8_5_nf; +extern cpuop_func op_b0a8_5_ff; +extern cpuop_func op_b0b0_5_nf; +extern cpuop_func op_b0b0_5_ff; +extern cpuop_func op_b0b8_5_nf; +extern cpuop_func op_b0b8_5_ff; +extern cpuop_func op_b0b9_5_nf; +extern cpuop_func op_b0b9_5_ff; +extern cpuop_func op_b0ba_5_nf; +extern cpuop_func op_b0ba_5_ff; +extern cpuop_func op_b0bb_5_nf; +extern cpuop_func op_b0bb_5_ff; +extern cpuop_func op_b0bc_5_nf; +extern cpuop_func op_b0bc_5_ff; +extern cpuop_func op_b0c0_5_nf; +extern cpuop_func op_b0c0_5_ff; +extern cpuop_func op_b0c8_5_nf; +extern cpuop_func op_b0c8_5_ff; +extern cpuop_func op_b0d0_5_nf; +extern cpuop_func op_b0d0_5_ff; +extern cpuop_func op_b0d8_5_nf; +extern cpuop_func op_b0d8_5_ff; +extern cpuop_func op_b0e0_5_nf; +extern cpuop_func op_b0e0_5_ff; +extern cpuop_func op_b0e8_5_nf; +extern cpuop_func op_b0e8_5_ff; +extern cpuop_func op_b0f0_5_nf; +extern cpuop_func op_b0f0_5_ff; +extern cpuop_func op_b0f8_5_nf; +extern cpuop_func op_b0f8_5_ff; +extern cpuop_func op_b0f9_5_nf; +extern cpuop_func op_b0f9_5_ff; +extern cpuop_func op_b0fa_5_nf; +extern cpuop_func op_b0fa_5_ff; +extern cpuop_func op_b0fb_5_nf; +extern cpuop_func op_b0fb_5_ff; +extern cpuop_func op_b0fc_5_nf; +extern cpuop_func op_b0fc_5_ff; +extern cpuop_func op_b100_5_nf; +extern cpuop_func op_b100_5_ff; +extern cpuop_func op_b108_5_nf; +extern cpuop_func op_b108_5_ff; +extern cpuop_func op_b110_5_nf; +extern cpuop_func op_b110_5_ff; +extern cpuop_func op_b118_5_nf; +extern cpuop_func op_b118_5_ff; +extern cpuop_func op_b120_5_nf; +extern cpuop_func op_b120_5_ff; +extern cpuop_func op_b128_5_nf; +extern cpuop_func op_b128_5_ff; +extern cpuop_func op_b130_5_nf; +extern cpuop_func op_b130_5_ff; +extern cpuop_func op_b138_5_nf; +extern cpuop_func op_b138_5_ff; +extern cpuop_func op_b139_5_nf; +extern cpuop_func op_b139_5_ff; +extern cpuop_func op_b140_5_nf; +extern cpuop_func op_b140_5_ff; +extern cpuop_func op_b148_5_nf; +extern cpuop_func op_b148_5_ff; +extern cpuop_func op_b150_5_nf; +extern cpuop_func op_b150_5_ff; +extern cpuop_func op_b158_5_nf; +extern cpuop_func op_b158_5_ff; +extern cpuop_func op_b160_5_nf; +extern cpuop_func op_b160_5_ff; +extern cpuop_func op_b168_5_nf; +extern cpuop_func op_b168_5_ff; +extern cpuop_func op_b170_5_nf; +extern cpuop_func op_b170_5_ff; +extern cpuop_func op_b178_5_nf; +extern cpuop_func op_b178_5_ff; +extern cpuop_func op_b179_5_nf; +extern cpuop_func op_b179_5_ff; +extern cpuop_func op_b180_5_nf; +extern cpuop_func op_b180_5_ff; +extern cpuop_func op_b188_5_nf; +extern cpuop_func op_b188_5_ff; +extern cpuop_func op_b190_5_nf; +extern cpuop_func op_b190_5_ff; +extern cpuop_func op_b198_5_nf; +extern cpuop_func op_b198_5_ff; +extern cpuop_func op_b1a0_5_nf; +extern cpuop_func op_b1a0_5_ff; +extern cpuop_func op_b1a8_5_nf; +extern cpuop_func op_b1a8_5_ff; +extern cpuop_func op_b1b0_5_nf; +extern cpuop_func op_b1b0_5_ff; +extern cpuop_func op_b1b8_5_nf; +extern cpuop_func op_b1b8_5_ff; +extern cpuop_func op_b1b9_5_nf; +extern cpuop_func op_b1b9_5_ff; +extern cpuop_func op_b1c0_5_nf; +extern cpuop_func op_b1c0_5_ff; +extern cpuop_func op_b1c8_5_nf; +extern cpuop_func op_b1c8_5_ff; +extern cpuop_func op_b1d0_5_nf; +extern cpuop_func op_b1d0_5_ff; +extern cpuop_func op_b1d8_5_nf; +extern cpuop_func op_b1d8_5_ff; +extern cpuop_func op_b1e0_5_nf; +extern cpuop_func op_b1e0_5_ff; +extern cpuop_func op_b1e8_5_nf; +extern cpuop_func op_b1e8_5_ff; +extern cpuop_func op_b1f0_5_nf; +extern cpuop_func op_b1f0_5_ff; +extern cpuop_func op_b1f8_5_nf; +extern cpuop_func op_b1f8_5_ff; +extern cpuop_func op_b1f9_5_nf; +extern cpuop_func op_b1f9_5_ff; +extern cpuop_func op_b1fa_5_nf; +extern cpuop_func op_b1fa_5_ff; +extern cpuop_func op_b1fb_5_nf; +extern cpuop_func op_b1fb_5_ff; +extern cpuop_func op_b1fc_5_nf; +extern cpuop_func op_b1fc_5_ff; +extern cpuop_func op_c000_5_nf; +extern cpuop_func op_c000_5_ff; +extern cpuop_func op_c010_5_nf; +extern cpuop_func op_c010_5_ff; +extern cpuop_func op_c018_5_nf; +extern cpuop_func op_c018_5_ff; +extern cpuop_func op_c020_5_nf; +extern cpuop_func op_c020_5_ff; +extern cpuop_func op_c028_5_nf; +extern cpuop_func op_c028_5_ff; +extern cpuop_func op_c030_5_nf; +extern cpuop_func op_c030_5_ff; +extern cpuop_func op_c038_5_nf; +extern cpuop_func op_c038_5_ff; +extern cpuop_func op_c039_5_nf; +extern cpuop_func op_c039_5_ff; +extern cpuop_func op_c03a_5_nf; +extern cpuop_func op_c03a_5_ff; +extern cpuop_func op_c03b_5_nf; +extern cpuop_func op_c03b_5_ff; +extern cpuop_func op_c03c_5_nf; +extern cpuop_func op_c03c_5_ff; +extern cpuop_func op_c040_5_nf; +extern cpuop_func op_c040_5_ff; +extern cpuop_func op_c050_5_nf; +extern cpuop_func op_c050_5_ff; +extern cpuop_func op_c058_5_nf; +extern cpuop_func op_c058_5_ff; +extern cpuop_func op_c060_5_nf; +extern cpuop_func op_c060_5_ff; +extern cpuop_func op_c068_5_nf; +extern cpuop_func op_c068_5_ff; +extern cpuop_func op_c070_5_nf; +extern cpuop_func op_c070_5_ff; +extern cpuop_func op_c078_5_nf; +extern cpuop_func op_c078_5_ff; +extern cpuop_func op_c079_5_nf; +extern cpuop_func op_c079_5_ff; +extern cpuop_func op_c07a_5_nf; +extern cpuop_func op_c07a_5_ff; +extern cpuop_func op_c07b_5_nf; +extern cpuop_func op_c07b_5_ff; +extern cpuop_func op_c07c_5_nf; +extern cpuop_func op_c07c_5_ff; +extern cpuop_func op_c080_5_nf; +extern cpuop_func op_c080_5_ff; +extern cpuop_func op_c090_5_nf; +extern cpuop_func op_c090_5_ff; +extern cpuop_func op_c098_5_nf; +extern cpuop_func op_c098_5_ff; +extern cpuop_func op_c0a0_5_nf; +extern cpuop_func op_c0a0_5_ff; +extern cpuop_func op_c0a8_5_nf; +extern cpuop_func op_c0a8_5_ff; +extern cpuop_func op_c0b0_5_nf; +extern cpuop_func op_c0b0_5_ff; +extern cpuop_func op_c0b8_5_nf; +extern cpuop_func op_c0b8_5_ff; +extern cpuop_func op_c0b9_5_nf; +extern cpuop_func op_c0b9_5_ff; +extern cpuop_func op_c0ba_5_nf; +extern cpuop_func op_c0ba_5_ff; +extern cpuop_func op_c0bb_5_nf; +extern cpuop_func op_c0bb_5_ff; +extern cpuop_func op_c0bc_5_nf; +extern cpuop_func op_c0bc_5_ff; +extern cpuop_func op_c0c0_5_nf; +extern cpuop_func op_c0c0_5_ff; +extern cpuop_func op_c0d0_5_nf; +extern cpuop_func op_c0d0_5_ff; +extern cpuop_func op_c0d8_5_nf; +extern cpuop_func op_c0d8_5_ff; +extern cpuop_func op_c0e0_5_nf; +extern cpuop_func op_c0e0_5_ff; +extern cpuop_func op_c0e8_5_nf; +extern cpuop_func op_c0e8_5_ff; +extern cpuop_func op_c0f0_5_nf; +extern cpuop_func op_c0f0_5_ff; +extern cpuop_func op_c0f8_5_nf; +extern cpuop_func op_c0f8_5_ff; +extern cpuop_func op_c0f9_5_nf; +extern cpuop_func op_c0f9_5_ff; +extern cpuop_func op_c0fa_5_nf; +extern cpuop_func op_c0fa_5_ff; +extern cpuop_func op_c0fb_5_nf; +extern cpuop_func op_c0fb_5_ff; +extern cpuop_func op_c0fc_5_nf; +extern cpuop_func op_c0fc_5_ff; +extern cpuop_func op_c100_5_nf; +extern cpuop_func op_c100_5_ff; +extern cpuop_func op_c108_5_nf; +extern cpuop_func op_c108_5_ff; +extern cpuop_func op_c110_5_nf; +extern cpuop_func op_c110_5_ff; +extern cpuop_func op_c118_5_nf; +extern cpuop_func op_c118_5_ff; +extern cpuop_func op_c120_5_nf; +extern cpuop_func op_c120_5_ff; +extern cpuop_func op_c128_5_nf; +extern cpuop_func op_c128_5_ff; +extern cpuop_func op_c130_5_nf; +extern cpuop_func op_c130_5_ff; +extern cpuop_func op_c138_5_nf; +extern cpuop_func op_c138_5_ff; +extern cpuop_func op_c139_5_nf; +extern cpuop_func op_c139_5_ff; +extern cpuop_func op_c140_5_nf; +extern cpuop_func op_c140_5_ff; +extern cpuop_func op_c148_5_nf; +extern cpuop_func op_c148_5_ff; +extern cpuop_func op_c150_5_nf; +extern cpuop_func op_c150_5_ff; +extern cpuop_func op_c158_5_nf; +extern cpuop_func op_c158_5_ff; +extern cpuop_func op_c160_5_nf; +extern cpuop_func op_c160_5_ff; +extern cpuop_func op_c168_5_nf; +extern cpuop_func op_c168_5_ff; +extern cpuop_func op_c170_5_nf; +extern cpuop_func op_c170_5_ff; +extern cpuop_func op_c178_5_nf; +extern cpuop_func op_c178_5_ff; +extern cpuop_func op_c179_5_nf; +extern cpuop_func op_c179_5_ff; +extern cpuop_func op_c188_5_nf; +extern cpuop_func op_c188_5_ff; +extern cpuop_func op_c190_5_nf; +extern cpuop_func op_c190_5_ff; +extern cpuop_func op_c198_5_nf; +extern cpuop_func op_c198_5_ff; +extern cpuop_func op_c1a0_5_nf; +extern cpuop_func op_c1a0_5_ff; +extern cpuop_func op_c1a8_5_nf; +extern cpuop_func op_c1a8_5_ff; +extern cpuop_func op_c1b0_5_nf; +extern cpuop_func op_c1b0_5_ff; +extern cpuop_func op_c1b8_5_nf; +extern cpuop_func op_c1b8_5_ff; +extern cpuop_func op_c1b9_5_nf; +extern cpuop_func op_c1b9_5_ff; +extern cpuop_func op_c1c0_5_nf; +extern cpuop_func op_c1c0_5_ff; +extern cpuop_func op_c1d0_5_nf; +extern cpuop_func op_c1d0_5_ff; +extern cpuop_func op_c1d8_5_nf; +extern cpuop_func op_c1d8_5_ff; +extern cpuop_func op_c1e0_5_nf; +extern cpuop_func op_c1e0_5_ff; +extern cpuop_func op_c1e8_5_nf; +extern cpuop_func op_c1e8_5_ff; +extern cpuop_func op_c1f0_5_nf; +extern cpuop_func op_c1f0_5_ff; +extern cpuop_func op_c1f8_5_nf; +extern cpuop_func op_c1f8_5_ff; +extern cpuop_func op_c1f9_5_nf; +extern cpuop_func op_c1f9_5_ff; +extern cpuop_func op_c1fa_5_nf; +extern cpuop_func op_c1fa_5_ff; +extern cpuop_func op_c1fb_5_nf; +extern cpuop_func op_c1fb_5_ff; +extern cpuop_func op_c1fc_5_nf; +extern cpuop_func op_c1fc_5_ff; +extern cpuop_func op_d000_5_nf; +extern cpuop_func op_d000_5_ff; +extern cpuop_func op_d010_5_nf; +extern cpuop_func op_d010_5_ff; +extern cpuop_func op_d018_5_nf; +extern cpuop_func op_d018_5_ff; +extern cpuop_func op_d020_5_nf; +extern cpuop_func op_d020_5_ff; +extern cpuop_func op_d028_5_nf; +extern cpuop_func op_d028_5_ff; +extern cpuop_func op_d030_5_nf; +extern cpuop_func op_d030_5_ff; +extern cpuop_func op_d038_5_nf; +extern cpuop_func op_d038_5_ff; +extern cpuop_func op_d039_5_nf; +extern cpuop_func op_d039_5_ff; +extern cpuop_func op_d03a_5_nf; +extern cpuop_func op_d03a_5_ff; +extern cpuop_func op_d03b_5_nf; +extern cpuop_func op_d03b_5_ff; +extern cpuop_func op_d03c_5_nf; +extern cpuop_func op_d03c_5_ff; +extern cpuop_func op_d040_5_nf; +extern cpuop_func op_d040_5_ff; +extern cpuop_func op_d048_5_nf; +extern cpuop_func op_d048_5_ff; +extern cpuop_func op_d050_5_nf; +extern cpuop_func op_d050_5_ff; +extern cpuop_func op_d058_5_nf; +extern cpuop_func op_d058_5_ff; +extern cpuop_func op_d060_5_nf; +extern cpuop_func op_d060_5_ff; +extern cpuop_func op_d068_5_nf; +extern cpuop_func op_d068_5_ff; +extern cpuop_func op_d070_5_nf; +extern cpuop_func op_d070_5_ff; +extern cpuop_func op_d078_5_nf; +extern cpuop_func op_d078_5_ff; +extern cpuop_func op_d079_5_nf; +extern cpuop_func op_d079_5_ff; +extern cpuop_func op_d07a_5_nf; +extern cpuop_func op_d07a_5_ff; +extern cpuop_func op_d07b_5_nf; +extern cpuop_func op_d07b_5_ff; +extern cpuop_func op_d07c_5_nf; +extern cpuop_func op_d07c_5_ff; +extern cpuop_func op_d080_5_nf; +extern cpuop_func op_d080_5_ff; +extern cpuop_func op_d088_5_nf; +extern cpuop_func op_d088_5_ff; +extern cpuop_func op_d090_5_nf; +extern cpuop_func op_d090_5_ff; +extern cpuop_func op_d098_5_nf; +extern cpuop_func op_d098_5_ff; +extern cpuop_func op_d0a0_5_nf; +extern cpuop_func op_d0a0_5_ff; +extern cpuop_func op_d0a8_5_nf; +extern cpuop_func op_d0a8_5_ff; +extern cpuop_func op_d0b0_5_nf; +extern cpuop_func op_d0b0_5_ff; +extern cpuop_func op_d0b8_5_nf; +extern cpuop_func op_d0b8_5_ff; +extern cpuop_func op_d0b9_5_nf; +extern cpuop_func op_d0b9_5_ff; +extern cpuop_func op_d0ba_5_nf; +extern cpuop_func op_d0ba_5_ff; +extern cpuop_func op_d0bb_5_nf; +extern cpuop_func op_d0bb_5_ff; +extern cpuop_func op_d0bc_5_nf; +extern cpuop_func op_d0bc_5_ff; +extern cpuop_func op_d0c0_5_nf; +extern cpuop_func op_d0c0_5_ff; +extern cpuop_func op_d0c8_5_nf; +extern cpuop_func op_d0c8_5_ff; +extern cpuop_func op_d0d0_5_nf; +extern cpuop_func op_d0d0_5_ff; +extern cpuop_func op_d0d8_5_nf; +extern cpuop_func op_d0d8_5_ff; +extern cpuop_func op_d0e0_5_nf; +extern cpuop_func op_d0e0_5_ff; +extern cpuop_func op_d0e8_5_nf; +extern cpuop_func op_d0e8_5_ff; +extern cpuop_func op_d0f0_5_nf; +extern cpuop_func op_d0f0_5_ff; +extern cpuop_func op_d0f8_5_nf; +extern cpuop_func op_d0f8_5_ff; +extern cpuop_func op_d0f9_5_nf; +extern cpuop_func op_d0f9_5_ff; +extern cpuop_func op_d0fa_5_nf; +extern cpuop_func op_d0fa_5_ff; +extern cpuop_func op_d0fb_5_nf; +extern cpuop_func op_d0fb_5_ff; +extern cpuop_func op_d0fc_5_nf; +extern cpuop_func op_d0fc_5_ff; +extern cpuop_func op_d100_5_nf; +extern cpuop_func op_d100_5_ff; +extern cpuop_func op_d108_5_nf; +extern cpuop_func op_d108_5_ff; +extern cpuop_func op_d110_5_nf; +extern cpuop_func op_d110_5_ff; +extern cpuop_func op_d118_5_nf; +extern cpuop_func op_d118_5_ff; +extern cpuop_func op_d120_5_nf; +extern cpuop_func op_d120_5_ff; +extern cpuop_func op_d128_5_nf; +extern cpuop_func op_d128_5_ff; +extern cpuop_func op_d130_5_nf; +extern cpuop_func op_d130_5_ff; +extern cpuop_func op_d138_5_nf; +extern cpuop_func op_d138_5_ff; +extern cpuop_func op_d139_5_nf; +extern cpuop_func op_d139_5_ff; +extern cpuop_func op_d140_5_nf; +extern cpuop_func op_d140_5_ff; +extern cpuop_func op_d148_5_nf; +extern cpuop_func op_d148_5_ff; +extern cpuop_func op_d150_5_nf; +extern cpuop_func op_d150_5_ff; +extern cpuop_func op_d158_5_nf; +extern cpuop_func op_d158_5_ff; +extern cpuop_func op_d160_5_nf; +extern cpuop_func op_d160_5_ff; +extern cpuop_func op_d168_5_nf; +extern cpuop_func op_d168_5_ff; +extern cpuop_func op_d170_5_nf; +extern cpuop_func op_d170_5_ff; +extern cpuop_func op_d178_5_nf; +extern cpuop_func op_d178_5_ff; +extern cpuop_func op_d179_5_nf; +extern cpuop_func op_d179_5_ff; +extern cpuop_func op_d180_5_nf; +extern cpuop_func op_d180_5_ff; +extern cpuop_func op_d188_5_nf; +extern cpuop_func op_d188_5_ff; +extern cpuop_func op_d190_5_nf; +extern cpuop_func op_d190_5_ff; +extern cpuop_func op_d198_5_nf; +extern cpuop_func op_d198_5_ff; +extern cpuop_func op_d1a0_5_nf; +extern cpuop_func op_d1a0_5_ff; +extern cpuop_func op_d1a8_5_nf; +extern cpuop_func op_d1a8_5_ff; +extern cpuop_func op_d1b0_5_nf; +extern cpuop_func op_d1b0_5_ff; +extern cpuop_func op_d1b8_5_nf; +extern cpuop_func op_d1b8_5_ff; +extern cpuop_func op_d1b9_5_nf; +extern cpuop_func op_d1b9_5_ff; +extern cpuop_func op_d1c0_5_nf; +extern cpuop_func op_d1c0_5_ff; +extern cpuop_func op_d1c8_5_nf; +extern cpuop_func op_d1c8_5_ff; +extern cpuop_func op_d1d0_5_nf; +extern cpuop_func op_d1d0_5_ff; +extern cpuop_func op_d1d8_5_nf; +extern cpuop_func op_d1d8_5_ff; +extern cpuop_func op_d1e0_5_nf; +extern cpuop_func op_d1e0_5_ff; +extern cpuop_func op_d1e8_5_nf; +extern cpuop_func op_d1e8_5_ff; +extern cpuop_func op_d1f0_5_nf; +extern cpuop_func op_d1f0_5_ff; +extern cpuop_func op_d1f8_5_nf; +extern cpuop_func op_d1f8_5_ff; +extern cpuop_func op_d1f9_5_nf; +extern cpuop_func op_d1f9_5_ff; +extern cpuop_func op_d1fa_5_nf; +extern cpuop_func op_d1fa_5_ff; +extern cpuop_func op_d1fb_5_nf; +extern cpuop_func op_d1fb_5_ff; +extern cpuop_func op_d1fc_5_nf; +extern cpuop_func op_d1fc_5_ff; +extern cpuop_func op_e000_5_nf; +extern cpuop_func op_e000_5_ff; +extern cpuop_func op_e008_5_nf; +extern cpuop_func op_e008_5_ff; +extern cpuop_func op_e010_5_nf; +extern cpuop_func op_e010_5_ff; +extern cpuop_func op_e018_5_nf; +extern cpuop_func op_e018_5_ff; +extern cpuop_func op_e020_5_nf; +extern cpuop_func op_e020_5_ff; +extern cpuop_func op_e028_5_nf; +extern cpuop_func op_e028_5_ff; +extern cpuop_func op_e030_5_nf; +extern cpuop_func op_e030_5_ff; +extern cpuop_func op_e038_5_nf; +extern cpuop_func op_e038_5_ff; +extern cpuop_func op_e040_5_nf; +extern cpuop_func op_e040_5_ff; +extern cpuop_func op_e048_5_nf; +extern cpuop_func op_e048_5_ff; +extern cpuop_func op_e050_5_nf; +extern cpuop_func op_e050_5_ff; +extern cpuop_func op_e058_5_nf; +extern cpuop_func op_e058_5_ff; +extern cpuop_func op_e060_5_nf; +extern cpuop_func op_e060_5_ff; +extern cpuop_func op_e068_5_nf; +extern cpuop_func op_e068_5_ff; +extern cpuop_func op_e070_5_nf; +extern cpuop_func op_e070_5_ff; +extern cpuop_func op_e078_5_nf; +extern cpuop_func op_e078_5_ff; +extern cpuop_func op_e080_5_nf; +extern cpuop_func op_e080_5_ff; +extern cpuop_func op_e088_5_nf; +extern cpuop_func op_e088_5_ff; +extern cpuop_func op_e090_5_nf; +extern cpuop_func op_e090_5_ff; +extern cpuop_func op_e098_5_nf; +extern cpuop_func op_e098_5_ff; +extern cpuop_func op_e0a0_5_nf; +extern cpuop_func op_e0a0_5_ff; +extern cpuop_func op_e0a8_5_nf; +extern cpuop_func op_e0a8_5_ff; +extern cpuop_func op_e0b0_5_nf; +extern cpuop_func op_e0b0_5_ff; +extern cpuop_func op_e0b8_5_nf; +extern cpuop_func op_e0b8_5_ff; +extern cpuop_func op_e0d0_5_nf; +extern cpuop_func op_e0d0_5_ff; +extern cpuop_func op_e0d8_5_nf; +extern cpuop_func op_e0d8_5_ff; +extern cpuop_func op_e0e0_5_nf; +extern cpuop_func op_e0e0_5_ff; +extern cpuop_func op_e0e8_5_nf; +extern cpuop_func op_e0e8_5_ff; +extern cpuop_func op_e0f0_5_nf; +extern cpuop_func op_e0f0_5_ff; +extern cpuop_func op_e0f8_5_nf; +extern cpuop_func op_e0f8_5_ff; +extern cpuop_func op_e0f9_5_nf; +extern cpuop_func op_e0f9_5_ff; +extern cpuop_func op_e100_5_nf; +extern cpuop_func op_e100_5_ff; +extern cpuop_func op_e108_5_nf; +extern cpuop_func op_e108_5_ff; +extern cpuop_func op_e110_5_nf; +extern cpuop_func op_e110_5_ff; +extern cpuop_func op_e118_5_nf; +extern cpuop_func op_e118_5_ff; +extern cpuop_func op_e120_5_nf; +extern cpuop_func op_e120_5_ff; +extern cpuop_func op_e128_5_nf; +extern cpuop_func op_e128_5_ff; +extern cpuop_func op_e130_5_nf; +extern cpuop_func op_e130_5_ff; +extern cpuop_func op_e138_5_nf; +extern cpuop_func op_e138_5_ff; +extern cpuop_func op_e140_5_nf; +extern cpuop_func op_e140_5_ff; +extern cpuop_func op_e148_5_nf; +extern cpuop_func op_e148_5_ff; +extern cpuop_func op_e150_5_nf; +extern cpuop_func op_e150_5_ff; +extern cpuop_func op_e158_5_nf; +extern cpuop_func op_e158_5_ff; +extern cpuop_func op_e160_5_nf; +extern cpuop_func op_e160_5_ff; +extern cpuop_func op_e168_5_nf; +extern cpuop_func op_e168_5_ff; +extern cpuop_func op_e170_5_nf; +extern cpuop_func op_e170_5_ff; +extern cpuop_func op_e178_5_nf; +extern cpuop_func op_e178_5_ff; +extern cpuop_func op_e180_5_nf; +extern cpuop_func op_e180_5_ff; +extern cpuop_func op_e188_5_nf; +extern cpuop_func op_e188_5_ff; +extern cpuop_func op_e190_5_nf; +extern cpuop_func op_e190_5_ff; +extern cpuop_func op_e198_5_nf; +extern cpuop_func op_e198_5_ff; +extern cpuop_func op_e1a0_5_nf; +extern cpuop_func op_e1a0_5_ff; +extern cpuop_func op_e1a8_5_nf; +extern cpuop_func op_e1a8_5_ff; +extern cpuop_func op_e1b0_5_nf; +extern cpuop_func op_e1b0_5_ff; +extern cpuop_func op_e1b8_5_nf; +extern cpuop_func op_e1b8_5_ff; +extern cpuop_func op_e1d0_5_nf; +extern cpuop_func op_e1d0_5_ff; +extern cpuop_func op_e1d8_5_nf; +extern cpuop_func op_e1d8_5_ff; +extern cpuop_func op_e1e0_5_nf; +extern cpuop_func op_e1e0_5_ff; +extern cpuop_func op_e1e8_5_nf; +extern cpuop_func op_e1e8_5_ff; +extern cpuop_func op_e1f0_5_nf; +extern cpuop_func op_e1f0_5_ff; +extern cpuop_func op_e1f8_5_nf; +extern cpuop_func op_e1f8_5_ff; +extern cpuop_func op_e1f9_5_nf; +extern cpuop_func op_e1f9_5_ff; +extern cpuop_func op_e2d0_5_nf; +extern cpuop_func op_e2d0_5_ff; +extern cpuop_func op_e2d8_5_nf; +extern cpuop_func op_e2d8_5_ff; +extern cpuop_func op_e2e0_5_nf; +extern cpuop_func op_e2e0_5_ff; +extern cpuop_func op_e2e8_5_nf; +extern cpuop_func op_e2e8_5_ff; +extern cpuop_func op_e2f0_5_nf; +extern cpuop_func op_e2f0_5_ff; +extern cpuop_func op_e2f8_5_nf; +extern cpuop_func op_e2f8_5_ff; +extern cpuop_func op_e2f9_5_nf; +extern cpuop_func op_e2f9_5_ff; +extern cpuop_func op_e3d0_5_nf; +extern cpuop_func op_e3d0_5_ff; +extern cpuop_func op_e3d8_5_nf; +extern cpuop_func op_e3d8_5_ff; +extern cpuop_func op_e3e0_5_nf; +extern cpuop_func op_e3e0_5_ff; +extern cpuop_func op_e3e8_5_nf; +extern cpuop_func op_e3e8_5_ff; +extern cpuop_func op_e3f0_5_nf; +extern cpuop_func op_e3f0_5_ff; +extern cpuop_func op_e3f8_5_nf; +extern cpuop_func op_e3f8_5_ff; +extern cpuop_func op_e3f9_5_nf; +extern cpuop_func op_e3f9_5_ff; +extern cpuop_func op_e4d0_5_nf; +extern cpuop_func op_e4d0_5_ff; +extern cpuop_func op_e4d8_5_nf; +extern cpuop_func op_e4d8_5_ff; +extern cpuop_func op_e4e0_5_nf; +extern cpuop_func op_e4e0_5_ff; +extern cpuop_func op_e4e8_5_nf; +extern cpuop_func op_e4e8_5_ff; +extern cpuop_func op_e4f0_5_nf; +extern cpuop_func op_e4f0_5_ff; +extern cpuop_func op_e4f8_5_nf; +extern cpuop_func op_e4f8_5_ff; +extern cpuop_func op_e4f9_5_nf; +extern cpuop_func op_e4f9_5_ff; +extern cpuop_func op_e5d0_5_nf; +extern cpuop_func op_e5d0_5_ff; +extern cpuop_func op_e5d8_5_nf; +extern cpuop_func op_e5d8_5_ff; +extern cpuop_func op_e5e0_5_nf; +extern cpuop_func op_e5e0_5_ff; +extern cpuop_func op_e5e8_5_nf; +extern cpuop_func op_e5e8_5_ff; +extern cpuop_func op_e5f0_5_nf; +extern cpuop_func op_e5f0_5_ff; +extern cpuop_func op_e5f8_5_nf; +extern cpuop_func op_e5f8_5_ff; +extern cpuop_func op_e5f9_5_nf; +extern cpuop_func op_e5f9_5_ff; +extern cpuop_func op_e6d0_5_nf; +extern cpuop_func op_e6d0_5_ff; +extern cpuop_func op_e6d8_5_nf; +extern cpuop_func op_e6d8_5_ff; +extern cpuop_func op_e6e0_5_nf; +extern cpuop_func op_e6e0_5_ff; +extern cpuop_func op_e6e8_5_nf; +extern cpuop_func op_e6e8_5_ff; +extern cpuop_func op_e6f0_5_nf; +extern cpuop_func op_e6f0_5_ff; +extern cpuop_func op_e6f8_5_nf; +extern cpuop_func op_e6f8_5_ff; +extern cpuop_func op_e6f9_5_nf; +extern cpuop_func op_e6f9_5_ff; +extern cpuop_func op_e7d0_5_nf; +extern cpuop_func op_e7d0_5_ff; +extern cpuop_func op_e7d8_5_nf; +extern cpuop_func op_e7d8_5_ff; +extern cpuop_func op_e7e0_5_nf; +extern cpuop_func op_e7e0_5_ff; +extern cpuop_func op_e7e8_5_nf; +extern cpuop_func op_e7e8_5_ff; +extern cpuop_func op_e7f0_5_nf; +extern cpuop_func op_e7f0_5_ff; +extern cpuop_func op_e7f8_5_nf; +extern cpuop_func op_e7f8_5_ff; +extern cpuop_func op_e7f9_5_nf; +extern cpuop_func op_e7f9_5_ff; +extern cpuop_func_ce op_0000_6_nf; +extern cpuop_func_ce op_0000_6_ff; +extern cpuop_func_ce op_0010_6_nf; +extern cpuop_func_ce op_0010_6_ff; +extern cpuop_func_ce op_0018_6_nf; +extern cpuop_func_ce op_0018_6_ff; +extern cpuop_func_ce op_0020_6_nf; +extern cpuop_func_ce op_0020_6_ff; +extern cpuop_func_ce op_0028_6_nf; +extern cpuop_func_ce op_0028_6_ff; +extern cpuop_func_ce op_0030_6_nf; +extern cpuop_func_ce op_0030_6_ff; +extern cpuop_func_ce op_0038_6_nf; +extern cpuop_func_ce op_0038_6_ff; +extern cpuop_func_ce op_0039_6_nf; +extern cpuop_func_ce op_0039_6_ff; +extern cpuop_func_ce op_003c_6_nf; +extern cpuop_func_ce op_003c_6_ff; +extern cpuop_func_ce op_0040_6_nf; +extern cpuop_func_ce op_0040_6_ff; +extern cpuop_func_ce op_0050_6_nf; +extern cpuop_func_ce op_0050_6_ff; +extern cpuop_func_ce op_0058_6_nf; +extern cpuop_func_ce op_0058_6_ff; +extern cpuop_func_ce op_0060_6_nf; +extern cpuop_func_ce op_0060_6_ff; +extern cpuop_func_ce op_0068_6_nf; +extern cpuop_func_ce op_0068_6_ff; +extern cpuop_func_ce op_0070_6_nf; +extern cpuop_func_ce op_0070_6_ff; +extern cpuop_func_ce op_0078_6_nf; +extern cpuop_func_ce op_0078_6_ff; +extern cpuop_func_ce op_0079_6_nf; +extern cpuop_func_ce op_0079_6_ff; +extern cpuop_func_ce op_007c_6_nf; +extern cpuop_func_ce op_007c_6_ff; +extern cpuop_func_ce op_0080_6_nf; +extern cpuop_func_ce op_0080_6_ff; +extern cpuop_func_ce op_0090_6_nf; +extern cpuop_func_ce op_0090_6_ff; +extern cpuop_func_ce op_0098_6_nf; +extern cpuop_func_ce op_0098_6_ff; +extern cpuop_func_ce op_00a0_6_nf; +extern cpuop_func_ce op_00a0_6_ff; +extern cpuop_func_ce op_00a8_6_nf; +extern cpuop_func_ce op_00a8_6_ff; +extern cpuop_func_ce op_00b0_6_nf; +extern cpuop_func_ce op_00b0_6_ff; +extern cpuop_func_ce op_00b8_6_nf; +extern cpuop_func_ce op_00b8_6_ff; +extern cpuop_func_ce op_00b9_6_nf; +extern cpuop_func_ce op_00b9_6_ff; +extern cpuop_func_ce op_0100_6_nf; +extern cpuop_func_ce op_0100_6_ff; +extern cpuop_func_ce op_0108_6_nf; +extern cpuop_func_ce op_0108_6_ff; +extern cpuop_func_ce op_0110_6_nf; +extern cpuop_func_ce op_0110_6_ff; +extern cpuop_func_ce op_0118_6_nf; +extern cpuop_func_ce op_0118_6_ff; +extern cpuop_func_ce op_0120_6_nf; +extern cpuop_func_ce op_0120_6_ff; +extern cpuop_func_ce op_0128_6_nf; +extern cpuop_func_ce op_0128_6_ff; +extern cpuop_func_ce op_0130_6_nf; +extern cpuop_func_ce op_0130_6_ff; +extern cpuop_func_ce op_0138_6_nf; +extern cpuop_func_ce op_0138_6_ff; +extern cpuop_func_ce op_0139_6_nf; +extern cpuop_func_ce op_0139_6_ff; +extern cpuop_func_ce op_013a_6_nf; +extern cpuop_func_ce op_013a_6_ff; +extern cpuop_func_ce op_013b_6_nf; +extern cpuop_func_ce op_013b_6_ff; +extern cpuop_func_ce op_013c_6_nf; +extern cpuop_func_ce op_013c_6_ff; +extern cpuop_func_ce op_0140_6_nf; +extern cpuop_func_ce op_0140_6_ff; +extern cpuop_func_ce op_0148_6_nf; +extern cpuop_func_ce op_0148_6_ff; +extern cpuop_func_ce op_0150_6_nf; +extern cpuop_func_ce op_0150_6_ff; +extern cpuop_func_ce op_0158_6_nf; +extern cpuop_func_ce op_0158_6_ff; +extern cpuop_func_ce op_0160_6_nf; +extern cpuop_func_ce op_0160_6_ff; +extern cpuop_func_ce op_0168_6_nf; +extern cpuop_func_ce op_0168_6_ff; +extern cpuop_func_ce op_0170_6_nf; +extern cpuop_func_ce op_0170_6_ff; +extern cpuop_func_ce op_0178_6_nf; +extern cpuop_func_ce op_0178_6_ff; +extern cpuop_func_ce op_0179_6_nf; +extern cpuop_func_ce op_0179_6_ff; +extern cpuop_func_ce op_017a_6_nf; +extern cpuop_func_ce op_017a_6_ff; +extern cpuop_func_ce op_017b_6_nf; +extern cpuop_func_ce op_017b_6_ff; +extern cpuop_func_ce op_0180_6_nf; +extern cpuop_func_ce op_0180_6_ff; +extern cpuop_func_ce op_0188_6_nf; +extern cpuop_func_ce op_0188_6_ff; +extern cpuop_func_ce op_0190_6_nf; +extern cpuop_func_ce op_0190_6_ff; +extern cpuop_func_ce op_0198_6_nf; +extern cpuop_func_ce op_0198_6_ff; +extern cpuop_func_ce op_01a0_6_nf; +extern cpuop_func_ce op_01a0_6_ff; +extern cpuop_func_ce op_01a8_6_nf; +extern cpuop_func_ce op_01a8_6_ff; +extern cpuop_func_ce op_01b0_6_nf; +extern cpuop_func_ce op_01b0_6_ff; +extern cpuop_func_ce op_01b8_6_nf; +extern cpuop_func_ce op_01b8_6_ff; +extern cpuop_func_ce op_01b9_6_nf; +extern cpuop_func_ce op_01b9_6_ff; +extern cpuop_func_ce op_01ba_6_nf; +extern cpuop_func_ce op_01ba_6_ff; +extern cpuop_func_ce op_01bb_6_nf; +extern cpuop_func_ce op_01bb_6_ff; +extern cpuop_func_ce op_01c0_6_nf; +extern cpuop_func_ce op_01c0_6_ff; +extern cpuop_func_ce op_01c8_6_nf; +extern cpuop_func_ce op_01c8_6_ff; +extern cpuop_func_ce op_01d0_6_nf; +extern cpuop_func_ce op_01d0_6_ff; +extern cpuop_func_ce op_01d8_6_nf; +extern cpuop_func_ce op_01d8_6_ff; +extern cpuop_func_ce op_01e0_6_nf; +extern cpuop_func_ce op_01e0_6_ff; +extern cpuop_func_ce op_01e8_6_nf; +extern cpuop_func_ce op_01e8_6_ff; +extern cpuop_func_ce op_01f0_6_nf; +extern cpuop_func_ce op_01f0_6_ff; +extern cpuop_func_ce op_01f8_6_nf; +extern cpuop_func_ce op_01f8_6_ff; +extern cpuop_func_ce op_01f9_6_nf; +extern cpuop_func_ce op_01f9_6_ff; +extern cpuop_func_ce op_01fa_6_nf; +extern cpuop_func_ce op_01fa_6_ff; +extern cpuop_func_ce op_01fb_6_nf; +extern cpuop_func_ce op_01fb_6_ff; +extern cpuop_func_ce op_0200_6_nf; +extern cpuop_func_ce op_0200_6_ff; +extern cpuop_func_ce op_0210_6_nf; +extern cpuop_func_ce op_0210_6_ff; +extern cpuop_func_ce op_0218_6_nf; +extern cpuop_func_ce op_0218_6_ff; +extern cpuop_func_ce op_0220_6_nf; +extern cpuop_func_ce op_0220_6_ff; +extern cpuop_func_ce op_0228_6_nf; +extern cpuop_func_ce op_0228_6_ff; +extern cpuop_func_ce op_0230_6_nf; +extern cpuop_func_ce op_0230_6_ff; +extern cpuop_func_ce op_0238_6_nf; +extern cpuop_func_ce op_0238_6_ff; +extern cpuop_func_ce op_0239_6_nf; +extern cpuop_func_ce op_0239_6_ff; +extern cpuop_func_ce op_023c_6_nf; +extern cpuop_func_ce op_023c_6_ff; +extern cpuop_func_ce op_0240_6_nf; +extern cpuop_func_ce op_0240_6_ff; +extern cpuop_func_ce op_0250_6_nf; +extern cpuop_func_ce op_0250_6_ff; +extern cpuop_func_ce op_0258_6_nf; +extern cpuop_func_ce op_0258_6_ff; +extern cpuop_func_ce op_0260_6_nf; +extern cpuop_func_ce op_0260_6_ff; +extern cpuop_func_ce op_0268_6_nf; +extern cpuop_func_ce op_0268_6_ff; +extern cpuop_func_ce op_0270_6_nf; +extern cpuop_func_ce op_0270_6_ff; +extern cpuop_func_ce op_0278_6_nf; +extern cpuop_func_ce op_0278_6_ff; +extern cpuop_func_ce op_0279_6_nf; +extern cpuop_func_ce op_0279_6_ff; +extern cpuop_func_ce op_027c_6_nf; +extern cpuop_func_ce op_027c_6_ff; +extern cpuop_func_ce op_0280_6_nf; +extern cpuop_func_ce op_0280_6_ff; +extern cpuop_func_ce op_0290_6_nf; +extern cpuop_func_ce op_0290_6_ff; +extern cpuop_func_ce op_0298_6_nf; +extern cpuop_func_ce op_0298_6_ff; +extern cpuop_func_ce op_02a0_6_nf; +extern cpuop_func_ce op_02a0_6_ff; +extern cpuop_func_ce op_02a8_6_nf; +extern cpuop_func_ce op_02a8_6_ff; +extern cpuop_func_ce op_02b0_6_nf; +extern cpuop_func_ce op_02b0_6_ff; +extern cpuop_func_ce op_02b8_6_nf; +extern cpuop_func_ce op_02b8_6_ff; +extern cpuop_func_ce op_02b9_6_nf; +extern cpuop_func_ce op_02b9_6_ff; +extern cpuop_func_ce op_0400_6_nf; +extern cpuop_func_ce op_0400_6_ff; +extern cpuop_func_ce op_0410_6_nf; +extern cpuop_func_ce op_0410_6_ff; +extern cpuop_func_ce op_0418_6_nf; +extern cpuop_func_ce op_0418_6_ff; +extern cpuop_func_ce op_0420_6_nf; +extern cpuop_func_ce op_0420_6_ff; +extern cpuop_func_ce op_0428_6_nf; +extern cpuop_func_ce op_0428_6_ff; +extern cpuop_func_ce op_0430_6_nf; +extern cpuop_func_ce op_0430_6_ff; +extern cpuop_func_ce op_0438_6_nf; +extern cpuop_func_ce op_0438_6_ff; +extern cpuop_func_ce op_0439_6_nf; +extern cpuop_func_ce op_0439_6_ff; +extern cpuop_func_ce op_0440_6_nf; +extern cpuop_func_ce op_0440_6_ff; +extern cpuop_func_ce op_0450_6_nf; +extern cpuop_func_ce op_0450_6_ff; +extern cpuop_func_ce op_0458_6_nf; +extern cpuop_func_ce op_0458_6_ff; +extern cpuop_func_ce op_0460_6_nf; +extern cpuop_func_ce op_0460_6_ff; +extern cpuop_func_ce op_0468_6_nf; +extern cpuop_func_ce op_0468_6_ff; +extern cpuop_func_ce op_0470_6_nf; +extern cpuop_func_ce op_0470_6_ff; +extern cpuop_func_ce op_0478_6_nf; +extern cpuop_func_ce op_0478_6_ff; +extern cpuop_func_ce op_0479_6_nf; +extern cpuop_func_ce op_0479_6_ff; +extern cpuop_func_ce op_0480_6_nf; +extern cpuop_func_ce op_0480_6_ff; +extern cpuop_func_ce op_0490_6_nf; +extern cpuop_func_ce op_0490_6_ff; +extern cpuop_func_ce op_0498_6_nf; +extern cpuop_func_ce op_0498_6_ff; +extern cpuop_func_ce op_04a0_6_nf; +extern cpuop_func_ce op_04a0_6_ff; +extern cpuop_func_ce op_04a8_6_nf; +extern cpuop_func_ce op_04a8_6_ff; +extern cpuop_func_ce op_04b0_6_nf; +extern cpuop_func_ce op_04b0_6_ff; +extern cpuop_func_ce op_04b8_6_nf; +extern cpuop_func_ce op_04b8_6_ff; +extern cpuop_func_ce op_04b9_6_nf; +extern cpuop_func_ce op_04b9_6_ff; +extern cpuop_func_ce op_0600_6_nf; +extern cpuop_func_ce op_0600_6_ff; +extern cpuop_func_ce op_0610_6_nf; +extern cpuop_func_ce op_0610_6_ff; +extern cpuop_func_ce op_0618_6_nf; +extern cpuop_func_ce op_0618_6_ff; +extern cpuop_func_ce op_0620_6_nf; +extern cpuop_func_ce op_0620_6_ff; +extern cpuop_func_ce op_0628_6_nf; +extern cpuop_func_ce op_0628_6_ff; +extern cpuop_func_ce op_0630_6_nf; +extern cpuop_func_ce op_0630_6_ff; +extern cpuop_func_ce op_0638_6_nf; +extern cpuop_func_ce op_0638_6_ff; +extern cpuop_func_ce op_0639_6_nf; +extern cpuop_func_ce op_0639_6_ff; +extern cpuop_func_ce op_0640_6_nf; +extern cpuop_func_ce op_0640_6_ff; +extern cpuop_func_ce op_0650_6_nf; +extern cpuop_func_ce op_0650_6_ff; +extern cpuop_func_ce op_0658_6_nf; +extern cpuop_func_ce op_0658_6_ff; +extern cpuop_func_ce op_0660_6_nf; +extern cpuop_func_ce op_0660_6_ff; +extern cpuop_func_ce op_0668_6_nf; +extern cpuop_func_ce op_0668_6_ff; +extern cpuop_func_ce op_0670_6_nf; +extern cpuop_func_ce op_0670_6_ff; +extern cpuop_func_ce op_0678_6_nf; +extern cpuop_func_ce op_0678_6_ff; +extern cpuop_func_ce op_0679_6_nf; +extern cpuop_func_ce op_0679_6_ff; +extern cpuop_func_ce op_0680_6_nf; +extern cpuop_func_ce op_0680_6_ff; +extern cpuop_func_ce op_0690_6_nf; +extern cpuop_func_ce op_0690_6_ff; +extern cpuop_func_ce op_0698_6_nf; +extern cpuop_func_ce op_0698_6_ff; +extern cpuop_func_ce op_06a0_6_nf; +extern cpuop_func_ce op_06a0_6_ff; +extern cpuop_func_ce op_06a8_6_nf; +extern cpuop_func_ce op_06a8_6_ff; +extern cpuop_func_ce op_06b0_6_nf; +extern cpuop_func_ce op_06b0_6_ff; +extern cpuop_func_ce op_06b8_6_nf; +extern cpuop_func_ce op_06b8_6_ff; +extern cpuop_func_ce op_06b9_6_nf; +extern cpuop_func_ce op_06b9_6_ff; +extern cpuop_func_ce op_0800_6_nf; +extern cpuop_func_ce op_0800_6_ff; +extern cpuop_func_ce op_0810_6_nf; +extern cpuop_func_ce op_0810_6_ff; +extern cpuop_func_ce op_0818_6_nf; +extern cpuop_func_ce op_0818_6_ff; +extern cpuop_func_ce op_0820_6_nf; +extern cpuop_func_ce op_0820_6_ff; +extern cpuop_func_ce op_0828_6_nf; +extern cpuop_func_ce op_0828_6_ff; +extern cpuop_func_ce op_0830_6_nf; +extern cpuop_func_ce op_0830_6_ff; +extern cpuop_func_ce op_0838_6_nf; +extern cpuop_func_ce op_0838_6_ff; +extern cpuop_func_ce op_0839_6_nf; +extern cpuop_func_ce op_0839_6_ff; +extern cpuop_func_ce op_083a_6_nf; +extern cpuop_func_ce op_083a_6_ff; +extern cpuop_func_ce op_083b_6_nf; +extern cpuop_func_ce op_083b_6_ff; +extern cpuop_func_ce op_083c_6_nf; +extern cpuop_func_ce op_083c_6_ff; +extern cpuop_func_ce op_0840_6_nf; +extern cpuop_func_ce op_0840_6_ff; +extern cpuop_func_ce op_0850_6_nf; +extern cpuop_func_ce op_0850_6_ff; +extern cpuop_func_ce op_0858_6_nf; +extern cpuop_func_ce op_0858_6_ff; +extern cpuop_func_ce op_0860_6_nf; +extern cpuop_func_ce op_0860_6_ff; +extern cpuop_func_ce op_0868_6_nf; +extern cpuop_func_ce op_0868_6_ff; +extern cpuop_func_ce op_0870_6_nf; +extern cpuop_func_ce op_0870_6_ff; +extern cpuop_func_ce op_0878_6_nf; +extern cpuop_func_ce op_0878_6_ff; +extern cpuop_func_ce op_0879_6_nf; +extern cpuop_func_ce op_0879_6_ff; +extern cpuop_func_ce op_087a_6_nf; +extern cpuop_func_ce op_087a_6_ff; +extern cpuop_func_ce op_087b_6_nf; +extern cpuop_func_ce op_087b_6_ff; +extern cpuop_func_ce op_0880_6_nf; +extern cpuop_func_ce op_0880_6_ff; +extern cpuop_func_ce op_0890_6_nf; +extern cpuop_func_ce op_0890_6_ff; +extern cpuop_func_ce op_0898_6_nf; +extern cpuop_func_ce op_0898_6_ff; +extern cpuop_func_ce op_08a0_6_nf; +extern cpuop_func_ce op_08a0_6_ff; +extern cpuop_func_ce op_08a8_6_nf; +extern cpuop_func_ce op_08a8_6_ff; +extern cpuop_func_ce op_08b0_6_nf; +extern cpuop_func_ce op_08b0_6_ff; +extern cpuop_func_ce op_08b8_6_nf; +extern cpuop_func_ce op_08b8_6_ff; +extern cpuop_func_ce op_08b9_6_nf; +extern cpuop_func_ce op_08b9_6_ff; +extern cpuop_func_ce op_08ba_6_nf; +extern cpuop_func_ce op_08ba_6_ff; +extern cpuop_func_ce op_08bb_6_nf; +extern cpuop_func_ce op_08bb_6_ff; +extern cpuop_func_ce op_08c0_6_nf; +extern cpuop_func_ce op_08c0_6_ff; +extern cpuop_func_ce op_08d0_6_nf; +extern cpuop_func_ce op_08d0_6_ff; +extern cpuop_func_ce op_08d8_6_nf; +extern cpuop_func_ce op_08d8_6_ff; +extern cpuop_func_ce op_08e0_6_nf; +extern cpuop_func_ce op_08e0_6_ff; +extern cpuop_func_ce op_08e8_6_nf; +extern cpuop_func_ce op_08e8_6_ff; +extern cpuop_func_ce op_08f0_6_nf; +extern cpuop_func_ce op_08f0_6_ff; +extern cpuop_func_ce op_08f8_6_nf; +extern cpuop_func_ce op_08f8_6_ff; +extern cpuop_func_ce op_08f9_6_nf; +extern cpuop_func_ce op_08f9_6_ff; +extern cpuop_func_ce op_08fa_6_nf; +extern cpuop_func_ce op_08fa_6_ff; +extern cpuop_func_ce op_08fb_6_nf; +extern cpuop_func_ce op_08fb_6_ff; +extern cpuop_func_ce op_0a00_6_nf; +extern cpuop_func_ce op_0a00_6_ff; +extern cpuop_func_ce op_0a10_6_nf; +extern cpuop_func_ce op_0a10_6_ff; +extern cpuop_func_ce op_0a18_6_nf; +extern cpuop_func_ce op_0a18_6_ff; +extern cpuop_func_ce op_0a20_6_nf; +extern cpuop_func_ce op_0a20_6_ff; +extern cpuop_func_ce op_0a28_6_nf; +extern cpuop_func_ce op_0a28_6_ff; +extern cpuop_func_ce op_0a30_6_nf; +extern cpuop_func_ce op_0a30_6_ff; +extern cpuop_func_ce op_0a38_6_nf; +extern cpuop_func_ce op_0a38_6_ff; +extern cpuop_func_ce op_0a39_6_nf; +extern cpuop_func_ce op_0a39_6_ff; +extern cpuop_func_ce op_0a3c_6_nf; +extern cpuop_func_ce op_0a3c_6_ff; +extern cpuop_func_ce op_0a40_6_nf; +extern cpuop_func_ce op_0a40_6_ff; +extern cpuop_func_ce op_0a50_6_nf; +extern cpuop_func_ce op_0a50_6_ff; +extern cpuop_func_ce op_0a58_6_nf; +extern cpuop_func_ce op_0a58_6_ff; +extern cpuop_func_ce op_0a60_6_nf; +extern cpuop_func_ce op_0a60_6_ff; +extern cpuop_func_ce op_0a68_6_nf; +extern cpuop_func_ce op_0a68_6_ff; +extern cpuop_func_ce op_0a70_6_nf; +extern cpuop_func_ce op_0a70_6_ff; +extern cpuop_func_ce op_0a78_6_nf; +extern cpuop_func_ce op_0a78_6_ff; +extern cpuop_func_ce op_0a79_6_nf; +extern cpuop_func_ce op_0a79_6_ff; +extern cpuop_func_ce op_0a7c_6_nf; +extern cpuop_func_ce op_0a7c_6_ff; +extern cpuop_func_ce op_0a80_6_nf; +extern cpuop_func_ce op_0a80_6_ff; +extern cpuop_func_ce op_0a90_6_nf; +extern cpuop_func_ce op_0a90_6_ff; +extern cpuop_func_ce op_0a98_6_nf; +extern cpuop_func_ce op_0a98_6_ff; +extern cpuop_func_ce op_0aa0_6_nf; +extern cpuop_func_ce op_0aa0_6_ff; +extern cpuop_func_ce op_0aa8_6_nf; +extern cpuop_func_ce op_0aa8_6_ff; +extern cpuop_func_ce op_0ab0_6_nf; +extern cpuop_func_ce op_0ab0_6_ff; +extern cpuop_func_ce op_0ab8_6_nf; +extern cpuop_func_ce op_0ab8_6_ff; +extern cpuop_func_ce op_0ab9_6_nf; +extern cpuop_func_ce op_0ab9_6_ff; +extern cpuop_func_ce op_0c00_6_nf; +extern cpuop_func_ce op_0c00_6_ff; +extern cpuop_func_ce op_0c10_6_nf; +extern cpuop_func_ce op_0c10_6_ff; +extern cpuop_func_ce op_0c18_6_nf; +extern cpuop_func_ce op_0c18_6_ff; +extern cpuop_func_ce op_0c20_6_nf; +extern cpuop_func_ce op_0c20_6_ff; +extern cpuop_func_ce op_0c28_6_nf; +extern cpuop_func_ce op_0c28_6_ff; +extern cpuop_func_ce op_0c30_6_nf; +extern cpuop_func_ce op_0c30_6_ff; +extern cpuop_func_ce op_0c38_6_nf; +extern cpuop_func_ce op_0c38_6_ff; +extern cpuop_func_ce op_0c39_6_nf; +extern cpuop_func_ce op_0c39_6_ff; +extern cpuop_func_ce op_0c40_6_nf; +extern cpuop_func_ce op_0c40_6_ff; +extern cpuop_func_ce op_0c50_6_nf; +extern cpuop_func_ce op_0c50_6_ff; +extern cpuop_func_ce op_0c58_6_nf; +extern cpuop_func_ce op_0c58_6_ff; +extern cpuop_func_ce op_0c60_6_nf; +extern cpuop_func_ce op_0c60_6_ff; +extern cpuop_func_ce op_0c68_6_nf; +extern cpuop_func_ce op_0c68_6_ff; +extern cpuop_func_ce op_0c70_6_nf; +extern cpuop_func_ce op_0c70_6_ff; +extern cpuop_func_ce op_0c78_6_nf; +extern cpuop_func_ce op_0c78_6_ff; +extern cpuop_func_ce op_0c79_6_nf; +extern cpuop_func_ce op_0c79_6_ff; +extern cpuop_func_ce op_0c80_6_nf; +extern cpuop_func_ce op_0c80_6_ff; +extern cpuop_func_ce op_0c90_6_nf; +extern cpuop_func_ce op_0c90_6_ff; +extern cpuop_func_ce op_0c98_6_nf; +extern cpuop_func_ce op_0c98_6_ff; +extern cpuop_func_ce op_0ca0_6_nf; +extern cpuop_func_ce op_0ca0_6_ff; +extern cpuop_func_ce op_0ca8_6_nf; +extern cpuop_func_ce op_0ca8_6_ff; +extern cpuop_func_ce op_0cb0_6_nf; +extern cpuop_func_ce op_0cb0_6_ff; +extern cpuop_func_ce op_0cb8_6_nf; +extern cpuop_func_ce op_0cb8_6_ff; +extern cpuop_func_ce op_0cb9_6_nf; +extern cpuop_func_ce op_0cb9_6_ff; +extern cpuop_func_ce op_1000_6_nf; +extern cpuop_func_ce op_1000_6_ff; +extern cpuop_func_ce op_1010_6_nf; +extern cpuop_func_ce op_1010_6_ff; +extern cpuop_func_ce op_1018_6_nf; +extern cpuop_func_ce op_1018_6_ff; +extern cpuop_func_ce op_1020_6_nf; +extern cpuop_func_ce op_1020_6_ff; +extern cpuop_func_ce op_1028_6_nf; +extern cpuop_func_ce op_1028_6_ff; +extern cpuop_func_ce op_1030_6_nf; +extern cpuop_func_ce op_1030_6_ff; +extern cpuop_func_ce op_1038_6_nf; +extern cpuop_func_ce op_1038_6_ff; +extern cpuop_func_ce op_1039_6_nf; +extern cpuop_func_ce op_1039_6_ff; +extern cpuop_func_ce op_103a_6_nf; +extern cpuop_func_ce op_103a_6_ff; +extern cpuop_func_ce op_103b_6_nf; +extern cpuop_func_ce op_103b_6_ff; +extern cpuop_func_ce op_103c_6_nf; +extern cpuop_func_ce op_103c_6_ff; +extern cpuop_func_ce op_1080_6_nf; +extern cpuop_func_ce op_1080_6_ff; +extern cpuop_func_ce op_1090_6_nf; +extern cpuop_func_ce op_1090_6_ff; +extern cpuop_func_ce op_1098_6_nf; +extern cpuop_func_ce op_1098_6_ff; +extern cpuop_func_ce op_10a0_6_nf; +extern cpuop_func_ce op_10a0_6_ff; +extern cpuop_func_ce op_10a8_6_nf; +extern cpuop_func_ce op_10a8_6_ff; +extern cpuop_func_ce op_10b0_6_nf; +extern cpuop_func_ce op_10b0_6_ff; +extern cpuop_func_ce op_10b8_6_nf; +extern cpuop_func_ce op_10b8_6_ff; +extern cpuop_func_ce op_10b9_6_nf; +extern cpuop_func_ce op_10b9_6_ff; +extern cpuop_func_ce op_10ba_6_nf; +extern cpuop_func_ce op_10ba_6_ff; +extern cpuop_func_ce op_10bb_6_nf; +extern cpuop_func_ce op_10bb_6_ff; +extern cpuop_func_ce op_10bc_6_nf; +extern cpuop_func_ce op_10bc_6_ff; +extern cpuop_func_ce op_10c0_6_nf; +extern cpuop_func_ce op_10c0_6_ff; +extern cpuop_func_ce op_10d0_6_nf; +extern cpuop_func_ce op_10d0_6_ff; +extern cpuop_func_ce op_10d8_6_nf; +extern cpuop_func_ce op_10d8_6_ff; +extern cpuop_func_ce op_10e0_6_nf; +extern cpuop_func_ce op_10e0_6_ff; +extern cpuop_func_ce op_10e8_6_nf; +extern cpuop_func_ce op_10e8_6_ff; +extern cpuop_func_ce op_10f0_6_nf; +extern cpuop_func_ce op_10f0_6_ff; +extern cpuop_func_ce op_10f8_6_nf; +extern cpuop_func_ce op_10f8_6_ff; +extern cpuop_func_ce op_10f9_6_nf; +extern cpuop_func_ce op_10f9_6_ff; +extern cpuop_func_ce op_10fa_6_nf; +extern cpuop_func_ce op_10fa_6_ff; +extern cpuop_func_ce op_10fb_6_nf; +extern cpuop_func_ce op_10fb_6_ff; +extern cpuop_func_ce op_10fc_6_nf; +extern cpuop_func_ce op_10fc_6_ff; +extern cpuop_func_ce op_1100_6_nf; +extern cpuop_func_ce op_1100_6_ff; +extern cpuop_func_ce op_1110_6_nf; +extern cpuop_func_ce op_1110_6_ff; +extern cpuop_func_ce op_1118_6_nf; +extern cpuop_func_ce op_1118_6_ff; +extern cpuop_func_ce op_1120_6_nf; +extern cpuop_func_ce op_1120_6_ff; +extern cpuop_func_ce op_1128_6_nf; +extern cpuop_func_ce op_1128_6_ff; +extern cpuop_func_ce op_1130_6_nf; +extern cpuop_func_ce op_1130_6_ff; +extern cpuop_func_ce op_1138_6_nf; +extern cpuop_func_ce op_1138_6_ff; +extern cpuop_func_ce op_1139_6_nf; +extern cpuop_func_ce op_1139_6_ff; +extern cpuop_func_ce op_113a_6_nf; +extern cpuop_func_ce op_113a_6_ff; +extern cpuop_func_ce op_113b_6_nf; +extern cpuop_func_ce op_113b_6_ff; +extern cpuop_func_ce op_113c_6_nf; +extern cpuop_func_ce op_113c_6_ff; +extern cpuop_func_ce op_1140_6_nf; +extern cpuop_func_ce op_1140_6_ff; +extern cpuop_func_ce op_1150_6_nf; +extern cpuop_func_ce op_1150_6_ff; +extern cpuop_func_ce op_1158_6_nf; +extern cpuop_func_ce op_1158_6_ff; +extern cpuop_func_ce op_1160_6_nf; +extern cpuop_func_ce op_1160_6_ff; +extern cpuop_func_ce op_1168_6_nf; +extern cpuop_func_ce op_1168_6_ff; +extern cpuop_func_ce op_1170_6_nf; +extern cpuop_func_ce op_1170_6_ff; +extern cpuop_func_ce op_1178_6_nf; +extern cpuop_func_ce op_1178_6_ff; +extern cpuop_func_ce op_1179_6_nf; +extern cpuop_func_ce op_1179_6_ff; +extern cpuop_func_ce op_117a_6_nf; +extern cpuop_func_ce op_117a_6_ff; +extern cpuop_func_ce op_117b_6_nf; +extern cpuop_func_ce op_117b_6_ff; +extern cpuop_func_ce op_117c_6_nf; +extern cpuop_func_ce op_117c_6_ff; +extern cpuop_func_ce op_1180_6_nf; +extern cpuop_func_ce op_1180_6_ff; +extern cpuop_func_ce op_1190_6_nf; +extern cpuop_func_ce op_1190_6_ff; +extern cpuop_func_ce op_1198_6_nf; +extern cpuop_func_ce op_1198_6_ff; +extern cpuop_func_ce op_11a0_6_nf; +extern cpuop_func_ce op_11a0_6_ff; +extern cpuop_func_ce op_11a8_6_nf; +extern cpuop_func_ce op_11a8_6_ff; +extern cpuop_func_ce op_11b0_6_nf; +extern cpuop_func_ce op_11b0_6_ff; +extern cpuop_func_ce op_11b8_6_nf; +extern cpuop_func_ce op_11b8_6_ff; +extern cpuop_func_ce op_11b9_6_nf; +extern cpuop_func_ce op_11b9_6_ff; +extern cpuop_func_ce op_11ba_6_nf; +extern cpuop_func_ce op_11ba_6_ff; +extern cpuop_func_ce op_11bb_6_nf; +extern cpuop_func_ce op_11bb_6_ff; +extern cpuop_func_ce op_11bc_6_nf; +extern cpuop_func_ce op_11bc_6_ff; +extern cpuop_func_ce op_11c0_6_nf; +extern cpuop_func_ce op_11c0_6_ff; +extern cpuop_func_ce op_11d0_6_nf; +extern cpuop_func_ce op_11d0_6_ff; +extern cpuop_func_ce op_11d8_6_nf; +extern cpuop_func_ce op_11d8_6_ff; +extern cpuop_func_ce op_11e0_6_nf; +extern cpuop_func_ce op_11e0_6_ff; +extern cpuop_func_ce op_11e8_6_nf; +extern cpuop_func_ce op_11e8_6_ff; +extern cpuop_func_ce op_11f0_6_nf; +extern cpuop_func_ce op_11f0_6_ff; +extern cpuop_func_ce op_11f8_6_nf; +extern cpuop_func_ce op_11f8_6_ff; +extern cpuop_func_ce op_11f9_6_nf; +extern cpuop_func_ce op_11f9_6_ff; +extern cpuop_func_ce op_11fa_6_nf; +extern cpuop_func_ce op_11fa_6_ff; +extern cpuop_func_ce op_11fb_6_nf; +extern cpuop_func_ce op_11fb_6_ff; +extern cpuop_func_ce op_11fc_6_nf; +extern cpuop_func_ce op_11fc_6_ff; +extern cpuop_func_ce op_13c0_6_nf; +extern cpuop_func_ce op_13c0_6_ff; +extern cpuop_func_ce op_13d0_6_nf; +extern cpuop_func_ce op_13d0_6_ff; +extern cpuop_func_ce op_13d8_6_nf; +extern cpuop_func_ce op_13d8_6_ff; +extern cpuop_func_ce op_13e0_6_nf; +extern cpuop_func_ce op_13e0_6_ff; +extern cpuop_func_ce op_13e8_6_nf; +extern cpuop_func_ce op_13e8_6_ff; +extern cpuop_func_ce op_13f0_6_nf; +extern cpuop_func_ce op_13f0_6_ff; +extern cpuop_func_ce op_13f8_6_nf; +extern cpuop_func_ce op_13f8_6_ff; +extern cpuop_func_ce op_13f9_6_nf; +extern cpuop_func_ce op_13f9_6_ff; +extern cpuop_func_ce op_13fa_6_nf; +extern cpuop_func_ce op_13fa_6_ff; +extern cpuop_func_ce op_13fb_6_nf; +extern cpuop_func_ce op_13fb_6_ff; +extern cpuop_func_ce op_13fc_6_nf; +extern cpuop_func_ce op_13fc_6_ff; +extern cpuop_func_ce op_2000_6_nf; +extern cpuop_func_ce op_2000_6_ff; +extern cpuop_func_ce op_2008_6_nf; +extern cpuop_func_ce op_2008_6_ff; +extern cpuop_func_ce op_2010_6_nf; +extern cpuop_func_ce op_2010_6_ff; +extern cpuop_func_ce op_2018_6_nf; +extern cpuop_func_ce op_2018_6_ff; +extern cpuop_func_ce op_2020_6_nf; +extern cpuop_func_ce op_2020_6_ff; +extern cpuop_func_ce op_2028_6_nf; +extern cpuop_func_ce op_2028_6_ff; +extern cpuop_func_ce op_2030_6_nf; +extern cpuop_func_ce op_2030_6_ff; +extern cpuop_func_ce op_2038_6_nf; +extern cpuop_func_ce op_2038_6_ff; +extern cpuop_func_ce op_2039_6_nf; +extern cpuop_func_ce op_2039_6_ff; +extern cpuop_func_ce op_203a_6_nf; +extern cpuop_func_ce op_203a_6_ff; +extern cpuop_func_ce op_203b_6_nf; +extern cpuop_func_ce op_203b_6_ff; +extern cpuop_func_ce op_203c_6_nf; +extern cpuop_func_ce op_203c_6_ff; +extern cpuop_func_ce op_2040_6_nf; +extern cpuop_func_ce op_2040_6_ff; +extern cpuop_func_ce op_2048_6_nf; +extern cpuop_func_ce op_2048_6_ff; +extern cpuop_func_ce op_2050_6_nf; +extern cpuop_func_ce op_2050_6_ff; +extern cpuop_func_ce op_2058_6_nf; +extern cpuop_func_ce op_2058_6_ff; +extern cpuop_func_ce op_2060_6_nf; +extern cpuop_func_ce op_2060_6_ff; +extern cpuop_func_ce op_2068_6_nf; +extern cpuop_func_ce op_2068_6_ff; +extern cpuop_func_ce op_2070_6_nf; +extern cpuop_func_ce op_2070_6_ff; +extern cpuop_func_ce op_2078_6_nf; +extern cpuop_func_ce op_2078_6_ff; +extern cpuop_func_ce op_2079_6_nf; +extern cpuop_func_ce op_2079_6_ff; +extern cpuop_func_ce op_207a_6_nf; +extern cpuop_func_ce op_207a_6_ff; +extern cpuop_func_ce op_207b_6_nf; +extern cpuop_func_ce op_207b_6_ff; +extern cpuop_func_ce op_207c_6_nf; +extern cpuop_func_ce op_207c_6_ff; +extern cpuop_func_ce op_2080_6_nf; +extern cpuop_func_ce op_2080_6_ff; +extern cpuop_func_ce op_2088_6_nf; +extern cpuop_func_ce op_2088_6_ff; +extern cpuop_func_ce op_2090_6_nf; +extern cpuop_func_ce op_2090_6_ff; +extern cpuop_func_ce op_2098_6_nf; +extern cpuop_func_ce op_2098_6_ff; +extern cpuop_func_ce op_20a0_6_nf; +extern cpuop_func_ce op_20a0_6_ff; +extern cpuop_func_ce op_20a8_6_nf; +extern cpuop_func_ce op_20a8_6_ff; +extern cpuop_func_ce op_20b0_6_nf; +extern cpuop_func_ce op_20b0_6_ff; +extern cpuop_func_ce op_20b8_6_nf; +extern cpuop_func_ce op_20b8_6_ff; +extern cpuop_func_ce op_20b9_6_nf; +extern cpuop_func_ce op_20b9_6_ff; +extern cpuop_func_ce op_20ba_6_nf; +extern cpuop_func_ce op_20ba_6_ff; +extern cpuop_func_ce op_20bb_6_nf; +extern cpuop_func_ce op_20bb_6_ff; +extern cpuop_func_ce op_20bc_6_nf; +extern cpuop_func_ce op_20bc_6_ff; +extern cpuop_func_ce op_20c0_6_nf; +extern cpuop_func_ce op_20c0_6_ff; +extern cpuop_func_ce op_20c8_6_nf; +extern cpuop_func_ce op_20c8_6_ff; +extern cpuop_func_ce op_20d0_6_nf; +extern cpuop_func_ce op_20d0_6_ff; +extern cpuop_func_ce op_20d8_6_nf; +extern cpuop_func_ce op_20d8_6_ff; +extern cpuop_func_ce op_20e0_6_nf; +extern cpuop_func_ce op_20e0_6_ff; +extern cpuop_func_ce op_20e8_6_nf; +extern cpuop_func_ce op_20e8_6_ff; +extern cpuop_func_ce op_20f0_6_nf; +extern cpuop_func_ce op_20f0_6_ff; +extern cpuop_func_ce op_20f8_6_nf; +extern cpuop_func_ce op_20f8_6_ff; +extern cpuop_func_ce op_20f9_6_nf; +extern cpuop_func_ce op_20f9_6_ff; +extern cpuop_func_ce op_20fa_6_nf; +extern cpuop_func_ce op_20fa_6_ff; +extern cpuop_func_ce op_20fb_6_nf; +extern cpuop_func_ce op_20fb_6_ff; +extern cpuop_func_ce op_20fc_6_nf; +extern cpuop_func_ce op_20fc_6_ff; +extern cpuop_func_ce op_2100_6_nf; +extern cpuop_func_ce op_2100_6_ff; +extern cpuop_func_ce op_2108_6_nf; +extern cpuop_func_ce op_2108_6_ff; +extern cpuop_func_ce op_2110_6_nf; +extern cpuop_func_ce op_2110_6_ff; +extern cpuop_func_ce op_2118_6_nf; +extern cpuop_func_ce op_2118_6_ff; +extern cpuop_func_ce op_2120_6_nf; +extern cpuop_func_ce op_2120_6_ff; +extern cpuop_func_ce op_2128_6_nf; +extern cpuop_func_ce op_2128_6_ff; +extern cpuop_func_ce op_2130_6_nf; +extern cpuop_func_ce op_2130_6_ff; +extern cpuop_func_ce op_2138_6_nf; +extern cpuop_func_ce op_2138_6_ff; +extern cpuop_func_ce op_2139_6_nf; +extern cpuop_func_ce op_2139_6_ff; +extern cpuop_func_ce op_213a_6_nf; +extern cpuop_func_ce op_213a_6_ff; +extern cpuop_func_ce op_213b_6_nf; +extern cpuop_func_ce op_213b_6_ff; +extern cpuop_func_ce op_213c_6_nf; +extern cpuop_func_ce op_213c_6_ff; +extern cpuop_func_ce op_2140_6_nf; +extern cpuop_func_ce op_2140_6_ff; +extern cpuop_func_ce op_2148_6_nf; +extern cpuop_func_ce op_2148_6_ff; +extern cpuop_func_ce op_2150_6_nf; +extern cpuop_func_ce op_2150_6_ff; +extern cpuop_func_ce op_2158_6_nf; +extern cpuop_func_ce op_2158_6_ff; +extern cpuop_func_ce op_2160_6_nf; +extern cpuop_func_ce op_2160_6_ff; +extern cpuop_func_ce op_2168_6_nf; +extern cpuop_func_ce op_2168_6_ff; +extern cpuop_func_ce op_2170_6_nf; +extern cpuop_func_ce op_2170_6_ff; +extern cpuop_func_ce op_2178_6_nf; +extern cpuop_func_ce op_2178_6_ff; +extern cpuop_func_ce op_2179_6_nf; +extern cpuop_func_ce op_2179_6_ff; +extern cpuop_func_ce op_217a_6_nf; +extern cpuop_func_ce op_217a_6_ff; +extern cpuop_func_ce op_217b_6_nf; +extern cpuop_func_ce op_217b_6_ff; +extern cpuop_func_ce op_217c_6_nf; +extern cpuop_func_ce op_217c_6_ff; +extern cpuop_func_ce op_2180_6_nf; +extern cpuop_func_ce op_2180_6_ff; +extern cpuop_func_ce op_2188_6_nf; +extern cpuop_func_ce op_2188_6_ff; +extern cpuop_func_ce op_2190_6_nf; +extern cpuop_func_ce op_2190_6_ff; +extern cpuop_func_ce op_2198_6_nf; +extern cpuop_func_ce op_2198_6_ff; +extern cpuop_func_ce op_21a0_6_nf; +extern cpuop_func_ce op_21a0_6_ff; +extern cpuop_func_ce op_21a8_6_nf; +extern cpuop_func_ce op_21a8_6_ff; +extern cpuop_func_ce op_21b0_6_nf; +extern cpuop_func_ce op_21b0_6_ff; +extern cpuop_func_ce op_21b8_6_nf; +extern cpuop_func_ce op_21b8_6_ff; +extern cpuop_func_ce op_21b9_6_nf; +extern cpuop_func_ce op_21b9_6_ff; +extern cpuop_func_ce op_21ba_6_nf; +extern cpuop_func_ce op_21ba_6_ff; +extern cpuop_func_ce op_21bb_6_nf; +extern cpuop_func_ce op_21bb_6_ff; +extern cpuop_func_ce op_21bc_6_nf; +extern cpuop_func_ce op_21bc_6_ff; +extern cpuop_func_ce op_21c0_6_nf; +extern cpuop_func_ce op_21c0_6_ff; +extern cpuop_func_ce op_21c8_6_nf; +extern cpuop_func_ce op_21c8_6_ff; +extern cpuop_func_ce op_21d0_6_nf; +extern cpuop_func_ce op_21d0_6_ff; +extern cpuop_func_ce op_21d8_6_nf; +extern cpuop_func_ce op_21d8_6_ff; +extern cpuop_func_ce op_21e0_6_nf; +extern cpuop_func_ce op_21e0_6_ff; +extern cpuop_func_ce op_21e8_6_nf; +extern cpuop_func_ce op_21e8_6_ff; +extern cpuop_func_ce op_21f0_6_nf; +extern cpuop_func_ce op_21f0_6_ff; +extern cpuop_func_ce op_21f8_6_nf; +extern cpuop_func_ce op_21f8_6_ff; +extern cpuop_func_ce op_21f9_6_nf; +extern cpuop_func_ce op_21f9_6_ff; +extern cpuop_func_ce op_21fa_6_nf; +extern cpuop_func_ce op_21fa_6_ff; +extern cpuop_func_ce op_21fb_6_nf; +extern cpuop_func_ce op_21fb_6_ff; +extern cpuop_func_ce op_21fc_6_nf; +extern cpuop_func_ce op_21fc_6_ff; +extern cpuop_func_ce op_23c0_6_nf; +extern cpuop_func_ce op_23c0_6_ff; +extern cpuop_func_ce op_23c8_6_nf; +extern cpuop_func_ce op_23c8_6_ff; +extern cpuop_func_ce op_23d0_6_nf; +extern cpuop_func_ce op_23d0_6_ff; +extern cpuop_func_ce op_23d8_6_nf; +extern cpuop_func_ce op_23d8_6_ff; +extern cpuop_func_ce op_23e0_6_nf; +extern cpuop_func_ce op_23e0_6_ff; +extern cpuop_func_ce op_23e8_6_nf; +extern cpuop_func_ce op_23e8_6_ff; +extern cpuop_func_ce op_23f0_6_nf; +extern cpuop_func_ce op_23f0_6_ff; +extern cpuop_func_ce op_23f8_6_nf; +extern cpuop_func_ce op_23f8_6_ff; +extern cpuop_func_ce op_23f9_6_nf; +extern cpuop_func_ce op_23f9_6_ff; +extern cpuop_func_ce op_23fa_6_nf; +extern cpuop_func_ce op_23fa_6_ff; +extern cpuop_func_ce op_23fb_6_nf; +extern cpuop_func_ce op_23fb_6_ff; +extern cpuop_func_ce op_23fc_6_nf; +extern cpuop_func_ce op_23fc_6_ff; +extern cpuop_func_ce op_3000_6_nf; +extern cpuop_func_ce op_3000_6_ff; +extern cpuop_func_ce op_3008_6_nf; +extern cpuop_func_ce op_3008_6_ff; +extern cpuop_func_ce op_3010_6_nf; +extern cpuop_func_ce op_3010_6_ff; +extern cpuop_func_ce op_3018_6_nf; +extern cpuop_func_ce op_3018_6_ff; +extern cpuop_func_ce op_3020_6_nf; +extern cpuop_func_ce op_3020_6_ff; +extern cpuop_func_ce op_3028_6_nf; +extern cpuop_func_ce op_3028_6_ff; +extern cpuop_func_ce op_3030_6_nf; +extern cpuop_func_ce op_3030_6_ff; +extern cpuop_func_ce op_3038_6_nf; +extern cpuop_func_ce op_3038_6_ff; +extern cpuop_func_ce op_3039_6_nf; +extern cpuop_func_ce op_3039_6_ff; +extern cpuop_func_ce op_303a_6_nf; +extern cpuop_func_ce op_303a_6_ff; +extern cpuop_func_ce op_303b_6_nf; +extern cpuop_func_ce op_303b_6_ff; +extern cpuop_func_ce op_303c_6_nf; +extern cpuop_func_ce op_303c_6_ff; +extern cpuop_func_ce op_3040_6_nf; +extern cpuop_func_ce op_3040_6_ff; +extern cpuop_func_ce op_3048_6_nf; +extern cpuop_func_ce op_3048_6_ff; +extern cpuop_func_ce op_3050_6_nf; +extern cpuop_func_ce op_3050_6_ff; +extern cpuop_func_ce op_3058_6_nf; +extern cpuop_func_ce op_3058_6_ff; +extern cpuop_func_ce op_3060_6_nf; +extern cpuop_func_ce op_3060_6_ff; +extern cpuop_func_ce op_3068_6_nf; +extern cpuop_func_ce op_3068_6_ff; +extern cpuop_func_ce op_3070_6_nf; +extern cpuop_func_ce op_3070_6_ff; +extern cpuop_func_ce op_3078_6_nf; +extern cpuop_func_ce op_3078_6_ff; +extern cpuop_func_ce op_3079_6_nf; +extern cpuop_func_ce op_3079_6_ff; +extern cpuop_func_ce op_307a_6_nf; +extern cpuop_func_ce op_307a_6_ff; +extern cpuop_func_ce op_307b_6_nf; +extern cpuop_func_ce op_307b_6_ff; +extern cpuop_func_ce op_307c_6_nf; +extern cpuop_func_ce op_307c_6_ff; +extern cpuop_func_ce op_3080_6_nf; +extern cpuop_func_ce op_3080_6_ff; +extern cpuop_func_ce op_3088_6_nf; +extern cpuop_func_ce op_3088_6_ff; +extern cpuop_func_ce op_3090_6_nf; +extern cpuop_func_ce op_3090_6_ff; +extern cpuop_func_ce op_3098_6_nf; +extern cpuop_func_ce op_3098_6_ff; +extern cpuop_func_ce op_30a0_6_nf; +extern cpuop_func_ce op_30a0_6_ff; +extern cpuop_func_ce op_30a8_6_nf; +extern cpuop_func_ce op_30a8_6_ff; +extern cpuop_func_ce op_30b0_6_nf; +extern cpuop_func_ce op_30b0_6_ff; +extern cpuop_func_ce op_30b8_6_nf; +extern cpuop_func_ce op_30b8_6_ff; +extern cpuop_func_ce op_30b9_6_nf; +extern cpuop_func_ce op_30b9_6_ff; +extern cpuop_func_ce op_30ba_6_nf; +extern cpuop_func_ce op_30ba_6_ff; +extern cpuop_func_ce op_30bb_6_nf; +extern cpuop_func_ce op_30bb_6_ff; +extern cpuop_func_ce op_30bc_6_nf; +extern cpuop_func_ce op_30bc_6_ff; +extern cpuop_func_ce op_30c0_6_nf; +extern cpuop_func_ce op_30c0_6_ff; +extern cpuop_func_ce op_30c8_6_nf; +extern cpuop_func_ce op_30c8_6_ff; +extern cpuop_func_ce op_30d0_6_nf; +extern cpuop_func_ce op_30d0_6_ff; +extern cpuop_func_ce op_30d8_6_nf; +extern cpuop_func_ce op_30d8_6_ff; +extern cpuop_func_ce op_30e0_6_nf; +extern cpuop_func_ce op_30e0_6_ff; +extern cpuop_func_ce op_30e8_6_nf; +extern cpuop_func_ce op_30e8_6_ff; +extern cpuop_func_ce op_30f0_6_nf; +extern cpuop_func_ce op_30f0_6_ff; +extern cpuop_func_ce op_30f8_6_nf; +extern cpuop_func_ce op_30f8_6_ff; +extern cpuop_func_ce op_30f9_6_nf; +extern cpuop_func_ce op_30f9_6_ff; +extern cpuop_func_ce op_30fa_6_nf; +extern cpuop_func_ce op_30fa_6_ff; +extern cpuop_func_ce op_30fb_6_nf; +extern cpuop_func_ce op_30fb_6_ff; +extern cpuop_func_ce op_30fc_6_nf; +extern cpuop_func_ce op_30fc_6_ff; +extern cpuop_func_ce op_3100_6_nf; +extern cpuop_func_ce op_3100_6_ff; +extern cpuop_func_ce op_3108_6_nf; +extern cpuop_func_ce op_3108_6_ff; +extern cpuop_func_ce op_3110_6_nf; +extern cpuop_func_ce op_3110_6_ff; +extern cpuop_func_ce op_3118_6_nf; +extern cpuop_func_ce op_3118_6_ff; +extern cpuop_func_ce op_3120_6_nf; +extern cpuop_func_ce op_3120_6_ff; +extern cpuop_func_ce op_3128_6_nf; +extern cpuop_func_ce op_3128_6_ff; +extern cpuop_func_ce op_3130_6_nf; +extern cpuop_func_ce op_3130_6_ff; +extern cpuop_func_ce op_3138_6_nf; +extern cpuop_func_ce op_3138_6_ff; +extern cpuop_func_ce op_3139_6_nf; +extern cpuop_func_ce op_3139_6_ff; +extern cpuop_func_ce op_313a_6_nf; +extern cpuop_func_ce op_313a_6_ff; +extern cpuop_func_ce op_313b_6_nf; +extern cpuop_func_ce op_313b_6_ff; +extern cpuop_func_ce op_313c_6_nf; +extern cpuop_func_ce op_313c_6_ff; +extern cpuop_func_ce op_3140_6_nf; +extern cpuop_func_ce op_3140_6_ff; +extern cpuop_func_ce op_3148_6_nf; +extern cpuop_func_ce op_3148_6_ff; +extern cpuop_func_ce op_3150_6_nf; +extern cpuop_func_ce op_3150_6_ff; +extern cpuop_func_ce op_3158_6_nf; +extern cpuop_func_ce op_3158_6_ff; +extern cpuop_func_ce op_3160_6_nf; +extern cpuop_func_ce op_3160_6_ff; +extern cpuop_func_ce op_3168_6_nf; +extern cpuop_func_ce op_3168_6_ff; +extern cpuop_func_ce op_3170_6_nf; +extern cpuop_func_ce op_3170_6_ff; +extern cpuop_func_ce op_3178_6_nf; +extern cpuop_func_ce op_3178_6_ff; +extern cpuop_func_ce op_3179_6_nf; +extern cpuop_func_ce op_3179_6_ff; +extern cpuop_func_ce op_317a_6_nf; +extern cpuop_func_ce op_317a_6_ff; +extern cpuop_func_ce op_317b_6_nf; +extern cpuop_func_ce op_317b_6_ff; +extern cpuop_func_ce op_317c_6_nf; +extern cpuop_func_ce op_317c_6_ff; +extern cpuop_func_ce op_3180_6_nf; +extern cpuop_func_ce op_3180_6_ff; +extern cpuop_func_ce op_3188_6_nf; +extern cpuop_func_ce op_3188_6_ff; +extern cpuop_func_ce op_3190_6_nf; +extern cpuop_func_ce op_3190_6_ff; +extern cpuop_func_ce op_3198_6_nf; +extern cpuop_func_ce op_3198_6_ff; +extern cpuop_func_ce op_31a0_6_nf; +extern cpuop_func_ce op_31a0_6_ff; +extern cpuop_func_ce op_31a8_6_nf; +extern cpuop_func_ce op_31a8_6_ff; +extern cpuop_func_ce op_31b0_6_nf; +extern cpuop_func_ce op_31b0_6_ff; +extern cpuop_func_ce op_31b8_6_nf; +extern cpuop_func_ce op_31b8_6_ff; +extern cpuop_func_ce op_31b9_6_nf; +extern cpuop_func_ce op_31b9_6_ff; +extern cpuop_func_ce op_31ba_6_nf; +extern cpuop_func_ce op_31ba_6_ff; +extern cpuop_func_ce op_31bb_6_nf; +extern cpuop_func_ce op_31bb_6_ff; +extern cpuop_func_ce op_31bc_6_nf; +extern cpuop_func_ce op_31bc_6_ff; +extern cpuop_func_ce op_31c0_6_nf; +extern cpuop_func_ce op_31c0_6_ff; +extern cpuop_func_ce op_31c8_6_nf; +extern cpuop_func_ce op_31c8_6_ff; +extern cpuop_func_ce op_31d0_6_nf; +extern cpuop_func_ce op_31d0_6_ff; +extern cpuop_func_ce op_31d8_6_nf; +extern cpuop_func_ce op_31d8_6_ff; +extern cpuop_func_ce op_31e0_6_nf; +extern cpuop_func_ce op_31e0_6_ff; +extern cpuop_func_ce op_31e8_6_nf; +extern cpuop_func_ce op_31e8_6_ff; +extern cpuop_func_ce op_31f0_6_nf; +extern cpuop_func_ce op_31f0_6_ff; +extern cpuop_func_ce op_31f8_6_nf; +extern cpuop_func_ce op_31f8_6_ff; +extern cpuop_func_ce op_31f9_6_nf; +extern cpuop_func_ce op_31f9_6_ff; +extern cpuop_func_ce op_31fa_6_nf; +extern cpuop_func_ce op_31fa_6_ff; +extern cpuop_func_ce op_31fb_6_nf; +extern cpuop_func_ce op_31fb_6_ff; +extern cpuop_func_ce op_31fc_6_nf; +extern cpuop_func_ce op_31fc_6_ff; +extern cpuop_func_ce op_33c0_6_nf; +extern cpuop_func_ce op_33c0_6_ff; +extern cpuop_func_ce op_33c8_6_nf; +extern cpuop_func_ce op_33c8_6_ff; +extern cpuop_func_ce op_33d0_6_nf; +extern cpuop_func_ce op_33d0_6_ff; +extern cpuop_func_ce op_33d8_6_nf; +extern cpuop_func_ce op_33d8_6_ff; +extern cpuop_func_ce op_33e0_6_nf; +extern cpuop_func_ce op_33e0_6_ff; +extern cpuop_func_ce op_33e8_6_nf; +extern cpuop_func_ce op_33e8_6_ff; +extern cpuop_func_ce op_33f0_6_nf; +extern cpuop_func_ce op_33f0_6_ff; +extern cpuop_func_ce op_33f8_6_nf; +extern cpuop_func_ce op_33f8_6_ff; +extern cpuop_func_ce op_33f9_6_nf; +extern cpuop_func_ce op_33f9_6_ff; +extern cpuop_func_ce op_33fa_6_nf; +extern cpuop_func_ce op_33fa_6_ff; +extern cpuop_func_ce op_33fb_6_nf; +extern cpuop_func_ce op_33fb_6_ff; +extern cpuop_func_ce op_33fc_6_nf; +extern cpuop_func_ce op_33fc_6_ff; +extern cpuop_func_ce op_4000_6_nf; +extern cpuop_func_ce op_4000_6_ff; +extern cpuop_func_ce op_4010_6_nf; +extern cpuop_func_ce op_4010_6_ff; +extern cpuop_func_ce op_4018_6_nf; +extern cpuop_func_ce op_4018_6_ff; +extern cpuop_func_ce op_4020_6_nf; +extern cpuop_func_ce op_4020_6_ff; +extern cpuop_func_ce op_4028_6_nf; +extern cpuop_func_ce op_4028_6_ff; +extern cpuop_func_ce op_4030_6_nf; +extern cpuop_func_ce op_4030_6_ff; +extern cpuop_func_ce op_4038_6_nf; +extern cpuop_func_ce op_4038_6_ff; +extern cpuop_func_ce op_4039_6_nf; +extern cpuop_func_ce op_4039_6_ff; +extern cpuop_func_ce op_4040_6_nf; +extern cpuop_func_ce op_4040_6_ff; +extern cpuop_func_ce op_4050_6_nf; +extern cpuop_func_ce op_4050_6_ff; +extern cpuop_func_ce op_4058_6_nf; +extern cpuop_func_ce op_4058_6_ff; +extern cpuop_func_ce op_4060_6_nf; +extern cpuop_func_ce op_4060_6_ff; +extern cpuop_func_ce op_4068_6_nf; +extern cpuop_func_ce op_4068_6_ff; +extern cpuop_func_ce op_4070_6_nf; +extern cpuop_func_ce op_4070_6_ff; +extern cpuop_func_ce op_4078_6_nf; +extern cpuop_func_ce op_4078_6_ff; +extern cpuop_func_ce op_4079_6_nf; +extern cpuop_func_ce op_4079_6_ff; +extern cpuop_func_ce op_4080_6_nf; +extern cpuop_func_ce op_4080_6_ff; +extern cpuop_func_ce op_4090_6_nf; +extern cpuop_func_ce op_4090_6_ff; +extern cpuop_func_ce op_4098_6_nf; +extern cpuop_func_ce op_4098_6_ff; +extern cpuop_func_ce op_40a0_6_nf; +extern cpuop_func_ce op_40a0_6_ff; +extern cpuop_func_ce op_40a8_6_nf; +extern cpuop_func_ce op_40a8_6_ff; +extern cpuop_func_ce op_40b0_6_nf; +extern cpuop_func_ce op_40b0_6_ff; +extern cpuop_func_ce op_40b8_6_nf; +extern cpuop_func_ce op_40b8_6_ff; +extern cpuop_func_ce op_40b9_6_nf; +extern cpuop_func_ce op_40b9_6_ff; +extern cpuop_func_ce op_40c0_6_nf; +extern cpuop_func_ce op_40c0_6_ff; +extern cpuop_func_ce op_40d0_6_nf; +extern cpuop_func_ce op_40d0_6_ff; +extern cpuop_func_ce op_40d8_6_nf; +extern cpuop_func_ce op_40d8_6_ff; +extern cpuop_func_ce op_40e0_6_nf; +extern cpuop_func_ce op_40e0_6_ff; +extern cpuop_func_ce op_40e8_6_nf; +extern cpuop_func_ce op_40e8_6_ff; +extern cpuop_func_ce op_40f0_6_nf; +extern cpuop_func_ce op_40f0_6_ff; +extern cpuop_func_ce op_40f8_6_nf; +extern cpuop_func_ce op_40f8_6_ff; +extern cpuop_func_ce op_40f9_6_nf; +extern cpuop_func_ce op_40f9_6_ff; +extern cpuop_func_ce op_4100_6_nf; +extern cpuop_func_ce op_4100_6_ff; +extern cpuop_func_ce op_4110_6_nf; +extern cpuop_func_ce op_4110_6_ff; +extern cpuop_func_ce op_4118_6_nf; +extern cpuop_func_ce op_4118_6_ff; +extern cpuop_func_ce op_4120_6_nf; +extern cpuop_func_ce op_4120_6_ff; +extern cpuop_func_ce op_4128_6_nf; +extern cpuop_func_ce op_4128_6_ff; +extern cpuop_func_ce op_4130_6_nf; +extern cpuop_func_ce op_4130_6_ff; +extern cpuop_func_ce op_4138_6_nf; +extern cpuop_func_ce op_4138_6_ff; +extern cpuop_func_ce op_4139_6_nf; +extern cpuop_func_ce op_4139_6_ff; +extern cpuop_func_ce op_413a_6_nf; +extern cpuop_func_ce op_413a_6_ff; +extern cpuop_func_ce op_413b_6_nf; +extern cpuop_func_ce op_413b_6_ff; +extern cpuop_func_ce op_413c_6_nf; +extern cpuop_func_ce op_413c_6_ff; +extern cpuop_func_ce op_4180_6_nf; +extern cpuop_func_ce op_4180_6_ff; +extern cpuop_func_ce op_4190_6_nf; +extern cpuop_func_ce op_4190_6_ff; +extern cpuop_func_ce op_4198_6_nf; +extern cpuop_func_ce op_4198_6_ff; +extern cpuop_func_ce op_41a0_6_nf; +extern cpuop_func_ce op_41a0_6_ff; +extern cpuop_func_ce op_41a8_6_nf; +extern cpuop_func_ce op_41a8_6_ff; +extern cpuop_func_ce op_41b0_6_nf; +extern cpuop_func_ce op_41b0_6_ff; +extern cpuop_func_ce op_41b8_6_nf; +extern cpuop_func_ce op_41b8_6_ff; +extern cpuop_func_ce op_41b9_6_nf; +extern cpuop_func_ce op_41b9_6_ff; +extern cpuop_func_ce op_41ba_6_nf; +extern cpuop_func_ce op_41ba_6_ff; +extern cpuop_func_ce op_41bb_6_nf; +extern cpuop_func_ce op_41bb_6_ff; +extern cpuop_func_ce op_41bc_6_nf; +extern cpuop_func_ce op_41bc_6_ff; +extern cpuop_func_ce op_41d0_6_nf; +extern cpuop_func_ce op_41d0_6_ff; +extern cpuop_func_ce op_41e8_6_nf; +extern cpuop_func_ce op_41e8_6_ff; +extern cpuop_func_ce op_41f0_6_nf; +extern cpuop_func_ce op_41f0_6_ff; +extern cpuop_func_ce op_41f8_6_nf; +extern cpuop_func_ce op_41f8_6_ff; +extern cpuop_func_ce op_41f9_6_nf; +extern cpuop_func_ce op_41f9_6_ff; +extern cpuop_func_ce op_41fa_6_nf; +extern cpuop_func_ce op_41fa_6_ff; +extern cpuop_func_ce op_41fb_6_nf; +extern cpuop_func_ce op_41fb_6_ff; +extern cpuop_func_ce op_4200_6_nf; +extern cpuop_func_ce op_4200_6_ff; +extern cpuop_func_ce op_4210_6_nf; +extern cpuop_func_ce op_4210_6_ff; +extern cpuop_func_ce op_4218_6_nf; +extern cpuop_func_ce op_4218_6_ff; +extern cpuop_func_ce op_4220_6_nf; +extern cpuop_func_ce op_4220_6_ff; +extern cpuop_func_ce op_4228_6_nf; +extern cpuop_func_ce op_4228_6_ff; +extern cpuop_func_ce op_4230_6_nf; +extern cpuop_func_ce op_4230_6_ff; +extern cpuop_func_ce op_4238_6_nf; +extern cpuop_func_ce op_4238_6_ff; +extern cpuop_func_ce op_4239_6_nf; +extern cpuop_func_ce op_4239_6_ff; +extern cpuop_func_ce op_4240_6_nf; +extern cpuop_func_ce op_4240_6_ff; +extern cpuop_func_ce op_4250_6_nf; +extern cpuop_func_ce op_4250_6_ff; +extern cpuop_func_ce op_4258_6_nf; +extern cpuop_func_ce op_4258_6_ff; +extern cpuop_func_ce op_4260_6_nf; +extern cpuop_func_ce op_4260_6_ff; +extern cpuop_func_ce op_4268_6_nf; +extern cpuop_func_ce op_4268_6_ff; +extern cpuop_func_ce op_4270_6_nf; +extern cpuop_func_ce op_4270_6_ff; +extern cpuop_func_ce op_4278_6_nf; +extern cpuop_func_ce op_4278_6_ff; +extern cpuop_func_ce op_4279_6_nf; +extern cpuop_func_ce op_4279_6_ff; +extern cpuop_func_ce op_4280_6_nf; +extern cpuop_func_ce op_4280_6_ff; +extern cpuop_func_ce op_4290_6_nf; +extern cpuop_func_ce op_4290_6_ff; +extern cpuop_func_ce op_4298_6_nf; +extern cpuop_func_ce op_4298_6_ff; +extern cpuop_func_ce op_42a0_6_nf; +extern cpuop_func_ce op_42a0_6_ff; +extern cpuop_func_ce op_42a8_6_nf; +extern cpuop_func_ce op_42a8_6_ff; +extern cpuop_func_ce op_42b0_6_nf; +extern cpuop_func_ce op_42b0_6_ff; +extern cpuop_func_ce op_42b8_6_nf; +extern cpuop_func_ce op_42b8_6_ff; +extern cpuop_func_ce op_42b9_6_nf; +extern cpuop_func_ce op_42b9_6_ff; +extern cpuop_func_ce op_4400_6_nf; +extern cpuop_func_ce op_4400_6_ff; +extern cpuop_func_ce op_4410_6_nf; +extern cpuop_func_ce op_4410_6_ff; +extern cpuop_func_ce op_4418_6_nf; +extern cpuop_func_ce op_4418_6_ff; +extern cpuop_func_ce op_4420_6_nf; +extern cpuop_func_ce op_4420_6_ff; +extern cpuop_func_ce op_4428_6_nf; +extern cpuop_func_ce op_4428_6_ff; +extern cpuop_func_ce op_4430_6_nf; +extern cpuop_func_ce op_4430_6_ff; +extern cpuop_func_ce op_4438_6_nf; +extern cpuop_func_ce op_4438_6_ff; +extern cpuop_func_ce op_4439_6_nf; +extern cpuop_func_ce op_4439_6_ff; +extern cpuop_func_ce op_4440_6_nf; +extern cpuop_func_ce op_4440_6_ff; +extern cpuop_func_ce op_4450_6_nf; +extern cpuop_func_ce op_4450_6_ff; +extern cpuop_func_ce op_4458_6_nf; +extern cpuop_func_ce op_4458_6_ff; +extern cpuop_func_ce op_4460_6_nf; +extern cpuop_func_ce op_4460_6_ff; +extern cpuop_func_ce op_4468_6_nf; +extern cpuop_func_ce op_4468_6_ff; +extern cpuop_func_ce op_4470_6_nf; +extern cpuop_func_ce op_4470_6_ff; +extern cpuop_func_ce op_4478_6_nf; +extern cpuop_func_ce op_4478_6_ff; +extern cpuop_func_ce op_4479_6_nf; +extern cpuop_func_ce op_4479_6_ff; +extern cpuop_func_ce op_4480_6_nf; +extern cpuop_func_ce op_4480_6_ff; +extern cpuop_func_ce op_4490_6_nf; +extern cpuop_func_ce op_4490_6_ff; +extern cpuop_func_ce op_4498_6_nf; +extern cpuop_func_ce op_4498_6_ff; +extern cpuop_func_ce op_44a0_6_nf; +extern cpuop_func_ce op_44a0_6_ff; +extern cpuop_func_ce op_44a8_6_nf; +extern cpuop_func_ce op_44a8_6_ff; +extern cpuop_func_ce op_44b0_6_nf; +extern cpuop_func_ce op_44b0_6_ff; +extern cpuop_func_ce op_44b8_6_nf; +extern cpuop_func_ce op_44b8_6_ff; +extern cpuop_func_ce op_44b9_6_nf; +extern cpuop_func_ce op_44b9_6_ff; +extern cpuop_func_ce op_44c0_6_nf; +extern cpuop_func_ce op_44c0_6_ff; +extern cpuop_func_ce op_44d0_6_nf; +extern cpuop_func_ce op_44d0_6_ff; +extern cpuop_func_ce op_44d8_6_nf; +extern cpuop_func_ce op_44d8_6_ff; +extern cpuop_func_ce op_44e0_6_nf; +extern cpuop_func_ce op_44e0_6_ff; +extern cpuop_func_ce op_44e8_6_nf; +extern cpuop_func_ce op_44e8_6_ff; +extern cpuop_func_ce op_44f0_6_nf; +extern cpuop_func_ce op_44f0_6_ff; +extern cpuop_func_ce op_44f8_6_nf; +extern cpuop_func_ce op_44f8_6_ff; +extern cpuop_func_ce op_44f9_6_nf; +extern cpuop_func_ce op_44f9_6_ff; +extern cpuop_func_ce op_44fa_6_nf; +extern cpuop_func_ce op_44fa_6_ff; +extern cpuop_func_ce op_44fb_6_nf; +extern cpuop_func_ce op_44fb_6_ff; +extern cpuop_func_ce op_44fc_6_nf; +extern cpuop_func_ce op_44fc_6_ff; +extern cpuop_func_ce op_4600_6_nf; +extern cpuop_func_ce op_4600_6_ff; +extern cpuop_func_ce op_4610_6_nf; +extern cpuop_func_ce op_4610_6_ff; +extern cpuop_func_ce op_4618_6_nf; +extern cpuop_func_ce op_4618_6_ff; +extern cpuop_func_ce op_4620_6_nf; +extern cpuop_func_ce op_4620_6_ff; +extern cpuop_func_ce op_4628_6_nf; +extern cpuop_func_ce op_4628_6_ff; +extern cpuop_func_ce op_4630_6_nf; +extern cpuop_func_ce op_4630_6_ff; +extern cpuop_func_ce op_4638_6_nf; +extern cpuop_func_ce op_4638_6_ff; +extern cpuop_func_ce op_4639_6_nf; +extern cpuop_func_ce op_4639_6_ff; +extern cpuop_func_ce op_4640_6_nf; +extern cpuop_func_ce op_4640_6_ff; +extern cpuop_func_ce op_4650_6_nf; +extern cpuop_func_ce op_4650_6_ff; +extern cpuop_func_ce op_4658_6_nf; +extern cpuop_func_ce op_4658_6_ff; +extern cpuop_func_ce op_4660_6_nf; +extern cpuop_func_ce op_4660_6_ff; +extern cpuop_func_ce op_4668_6_nf; +extern cpuop_func_ce op_4668_6_ff; +extern cpuop_func_ce op_4670_6_nf; +extern cpuop_func_ce op_4670_6_ff; +extern cpuop_func_ce op_4678_6_nf; +extern cpuop_func_ce op_4678_6_ff; +extern cpuop_func_ce op_4679_6_nf; +extern cpuop_func_ce op_4679_6_ff; +extern cpuop_func_ce op_4680_6_nf; +extern cpuop_func_ce op_4680_6_ff; +extern cpuop_func_ce op_4690_6_nf; +extern cpuop_func_ce op_4690_6_ff; +extern cpuop_func_ce op_4698_6_nf; +extern cpuop_func_ce op_4698_6_ff; +extern cpuop_func_ce op_46a0_6_nf; +extern cpuop_func_ce op_46a0_6_ff; +extern cpuop_func_ce op_46a8_6_nf; +extern cpuop_func_ce op_46a8_6_ff; +extern cpuop_func_ce op_46b0_6_nf; +extern cpuop_func_ce op_46b0_6_ff; +extern cpuop_func_ce op_46b8_6_nf; +extern cpuop_func_ce op_46b8_6_ff; +extern cpuop_func_ce op_46b9_6_nf; +extern cpuop_func_ce op_46b9_6_ff; +extern cpuop_func_ce op_46c0_6_nf; +extern cpuop_func_ce op_46c0_6_ff; +extern cpuop_func_ce op_46d0_6_nf; +extern cpuop_func_ce op_46d0_6_ff; +extern cpuop_func_ce op_46d8_6_nf; +extern cpuop_func_ce op_46d8_6_ff; +extern cpuop_func_ce op_46e0_6_nf; +extern cpuop_func_ce op_46e0_6_ff; +extern cpuop_func_ce op_46e8_6_nf; +extern cpuop_func_ce op_46e8_6_ff; +extern cpuop_func_ce op_46f0_6_nf; +extern cpuop_func_ce op_46f0_6_ff; +extern cpuop_func_ce op_46f8_6_nf; +extern cpuop_func_ce op_46f8_6_ff; +extern cpuop_func_ce op_46f9_6_nf; +extern cpuop_func_ce op_46f9_6_ff; +extern cpuop_func_ce op_46fa_6_nf; +extern cpuop_func_ce op_46fa_6_ff; +extern cpuop_func_ce op_46fb_6_nf; +extern cpuop_func_ce op_46fb_6_ff; +extern cpuop_func_ce op_46fc_6_nf; +extern cpuop_func_ce op_46fc_6_ff; +extern cpuop_func_ce op_4800_6_nf; +extern cpuop_func_ce op_4800_6_ff; +extern cpuop_func_ce op_4810_6_nf; +extern cpuop_func_ce op_4810_6_ff; +extern cpuop_func_ce op_4818_6_nf; +extern cpuop_func_ce op_4818_6_ff; +extern cpuop_func_ce op_4820_6_nf; +extern cpuop_func_ce op_4820_6_ff; +extern cpuop_func_ce op_4828_6_nf; +extern cpuop_func_ce op_4828_6_ff; +extern cpuop_func_ce op_4830_6_nf; +extern cpuop_func_ce op_4830_6_ff; +extern cpuop_func_ce op_4838_6_nf; +extern cpuop_func_ce op_4838_6_ff; +extern cpuop_func_ce op_4839_6_nf; +extern cpuop_func_ce op_4839_6_ff; +extern cpuop_func_ce op_4840_6_nf; +extern cpuop_func_ce op_4840_6_ff; +extern cpuop_func_ce op_4850_6_nf; +extern cpuop_func_ce op_4850_6_ff; +extern cpuop_func_ce op_4868_6_nf; +extern cpuop_func_ce op_4868_6_ff; +extern cpuop_func_ce op_4870_6_nf; +extern cpuop_func_ce op_4870_6_ff; +extern cpuop_func_ce op_4878_6_nf; +extern cpuop_func_ce op_4878_6_ff; +extern cpuop_func_ce op_4879_6_nf; +extern cpuop_func_ce op_4879_6_ff; +extern cpuop_func_ce op_487a_6_nf; +extern cpuop_func_ce op_487a_6_ff; +extern cpuop_func_ce op_487b_6_nf; +extern cpuop_func_ce op_487b_6_ff; +extern cpuop_func_ce op_4880_6_nf; +extern cpuop_func_ce op_4880_6_ff; +extern cpuop_func_ce op_4890_6_nf; +extern cpuop_func_ce op_4890_6_ff; +extern cpuop_func_ce op_48a0_6_nf; +extern cpuop_func_ce op_48a0_6_ff; +extern cpuop_func_ce op_48a8_6_nf; +extern cpuop_func_ce op_48a8_6_ff; +extern cpuop_func_ce op_48b0_6_nf; +extern cpuop_func_ce op_48b0_6_ff; +extern cpuop_func_ce op_48b8_6_nf; +extern cpuop_func_ce op_48b8_6_ff; +extern cpuop_func_ce op_48b9_6_nf; +extern cpuop_func_ce op_48b9_6_ff; +extern cpuop_func_ce op_48c0_6_nf; +extern cpuop_func_ce op_48c0_6_ff; +extern cpuop_func_ce op_48d0_6_nf; +extern cpuop_func_ce op_48d0_6_ff; +extern cpuop_func_ce op_48e0_6_nf; +extern cpuop_func_ce op_48e0_6_ff; +extern cpuop_func_ce op_48e8_6_nf; +extern cpuop_func_ce op_48e8_6_ff; +extern cpuop_func_ce op_48f0_6_nf; +extern cpuop_func_ce op_48f0_6_ff; +extern cpuop_func_ce op_48f8_6_nf; +extern cpuop_func_ce op_48f8_6_ff; +extern cpuop_func_ce op_48f9_6_nf; +extern cpuop_func_ce op_48f9_6_ff; +extern cpuop_func_ce op_49c0_6_nf; +extern cpuop_func_ce op_49c0_6_ff; +extern cpuop_func_ce op_4a00_6_nf; +extern cpuop_func_ce op_4a00_6_ff; +extern cpuop_func_ce op_4a10_6_nf; +extern cpuop_func_ce op_4a10_6_ff; +extern cpuop_func_ce op_4a18_6_nf; +extern cpuop_func_ce op_4a18_6_ff; +extern cpuop_func_ce op_4a20_6_nf; +extern cpuop_func_ce op_4a20_6_ff; +extern cpuop_func_ce op_4a28_6_nf; +extern cpuop_func_ce op_4a28_6_ff; +extern cpuop_func_ce op_4a30_6_nf; +extern cpuop_func_ce op_4a30_6_ff; +extern cpuop_func_ce op_4a38_6_nf; +extern cpuop_func_ce op_4a38_6_ff; +extern cpuop_func_ce op_4a39_6_nf; +extern cpuop_func_ce op_4a39_6_ff; +extern cpuop_func_ce op_4a40_6_nf; +extern cpuop_func_ce op_4a40_6_ff; +extern cpuop_func_ce op_4a50_6_nf; +extern cpuop_func_ce op_4a50_6_ff; +extern cpuop_func_ce op_4a58_6_nf; +extern cpuop_func_ce op_4a58_6_ff; +extern cpuop_func_ce op_4a60_6_nf; +extern cpuop_func_ce op_4a60_6_ff; +extern cpuop_func_ce op_4a68_6_nf; +extern cpuop_func_ce op_4a68_6_ff; +extern cpuop_func_ce op_4a70_6_nf; +extern cpuop_func_ce op_4a70_6_ff; +extern cpuop_func_ce op_4a78_6_nf; +extern cpuop_func_ce op_4a78_6_ff; +extern cpuop_func_ce op_4a79_6_nf; +extern cpuop_func_ce op_4a79_6_ff; +extern cpuop_func_ce op_4a80_6_nf; +extern cpuop_func_ce op_4a80_6_ff; +extern cpuop_func_ce op_4a90_6_nf; +extern cpuop_func_ce op_4a90_6_ff; +extern cpuop_func_ce op_4a98_6_nf; +extern cpuop_func_ce op_4a98_6_ff; +extern cpuop_func_ce op_4aa0_6_nf; +extern cpuop_func_ce op_4aa0_6_ff; +extern cpuop_func_ce op_4aa8_6_nf; +extern cpuop_func_ce op_4aa8_6_ff; +extern cpuop_func_ce op_4ab0_6_nf; +extern cpuop_func_ce op_4ab0_6_ff; +extern cpuop_func_ce op_4ab8_6_nf; +extern cpuop_func_ce op_4ab8_6_ff; +extern cpuop_func_ce op_4ab9_6_nf; +extern cpuop_func_ce op_4ab9_6_ff; +extern cpuop_func_ce op_4ac0_6_nf; +extern cpuop_func_ce op_4ac0_6_ff; +extern cpuop_func_ce op_4ad0_6_nf; +extern cpuop_func_ce op_4ad0_6_ff; +extern cpuop_func_ce op_4ad8_6_nf; +extern cpuop_func_ce op_4ad8_6_ff; +extern cpuop_func_ce op_4ae0_6_nf; +extern cpuop_func_ce op_4ae0_6_ff; +extern cpuop_func_ce op_4ae8_6_nf; +extern cpuop_func_ce op_4ae8_6_ff; +extern cpuop_func_ce op_4af0_6_nf; +extern cpuop_func_ce op_4af0_6_ff; +extern cpuop_func_ce op_4af8_6_nf; +extern cpuop_func_ce op_4af8_6_ff; +extern cpuop_func_ce op_4af9_6_nf; +extern cpuop_func_ce op_4af9_6_ff; +extern cpuop_func_ce op_4c90_6_nf; +extern cpuop_func_ce op_4c90_6_ff; +extern cpuop_func_ce op_4c98_6_nf; +extern cpuop_func_ce op_4c98_6_ff; +extern cpuop_func_ce op_4ca8_6_nf; +extern cpuop_func_ce op_4ca8_6_ff; +extern cpuop_func_ce op_4cb0_6_nf; +extern cpuop_func_ce op_4cb0_6_ff; +extern cpuop_func_ce op_4cb8_6_nf; +extern cpuop_func_ce op_4cb8_6_ff; +extern cpuop_func_ce op_4cb9_6_nf; +extern cpuop_func_ce op_4cb9_6_ff; +extern cpuop_func_ce op_4cba_6_nf; +extern cpuop_func_ce op_4cba_6_ff; +extern cpuop_func_ce op_4cbb_6_nf; +extern cpuop_func_ce op_4cbb_6_ff; +extern cpuop_func_ce op_4cd0_6_nf; +extern cpuop_func_ce op_4cd0_6_ff; +extern cpuop_func_ce op_4cd8_6_nf; +extern cpuop_func_ce op_4cd8_6_ff; +extern cpuop_func_ce op_4ce8_6_nf; +extern cpuop_func_ce op_4ce8_6_ff; +extern cpuop_func_ce op_4cf0_6_nf; +extern cpuop_func_ce op_4cf0_6_ff; +extern cpuop_func_ce op_4cf8_6_nf; +extern cpuop_func_ce op_4cf8_6_ff; +extern cpuop_func_ce op_4cf9_6_nf; +extern cpuop_func_ce op_4cf9_6_ff; +extern cpuop_func_ce op_4cfa_6_nf; +extern cpuop_func_ce op_4cfa_6_ff; +extern cpuop_func_ce op_4cfb_6_nf; +extern cpuop_func_ce op_4cfb_6_ff; +extern cpuop_func_ce op_4e40_6_nf; +extern cpuop_func_ce op_4e40_6_ff; +extern cpuop_func_ce op_4e50_6_nf; +extern cpuop_func_ce op_4e50_6_ff; +extern cpuop_func_ce op_4e58_6_nf; +extern cpuop_func_ce op_4e58_6_ff; +extern cpuop_func_ce op_4e60_6_nf; +extern cpuop_func_ce op_4e60_6_ff; +extern cpuop_func_ce op_4e68_6_nf; +extern cpuop_func_ce op_4e68_6_ff; +extern cpuop_func_ce op_4e70_6_nf; +extern cpuop_func_ce op_4e70_6_ff; +extern cpuop_func_ce op_4e71_6_nf; +extern cpuop_func_ce op_4e71_6_ff; +extern cpuop_func_ce op_4e72_6_nf; +extern cpuop_func_ce op_4e72_6_ff; +extern cpuop_func_ce op_4e73_6_nf; +extern cpuop_func_ce op_4e73_6_ff; +extern cpuop_func_ce op_4e74_6_nf; +extern cpuop_func_ce op_4e74_6_ff; +extern cpuop_func_ce op_4e75_6_nf; +extern cpuop_func_ce op_4e75_6_ff; +extern cpuop_func_ce op_4e76_6_nf; +extern cpuop_func_ce op_4e76_6_ff; +extern cpuop_func_ce op_4e77_6_nf; +extern cpuop_func_ce op_4e77_6_ff; +extern cpuop_func_ce op_4e90_6_nf; +extern cpuop_func_ce op_4e90_6_ff; +extern cpuop_func_ce op_4ea8_6_nf; +extern cpuop_func_ce op_4ea8_6_ff; +extern cpuop_func_ce op_4eb0_6_nf; +extern cpuop_func_ce op_4eb0_6_ff; +extern cpuop_func_ce op_4eb8_6_nf; +extern cpuop_func_ce op_4eb8_6_ff; +extern cpuop_func_ce op_4eb9_6_nf; +extern cpuop_func_ce op_4eb9_6_ff; +extern cpuop_func_ce op_4eba_6_nf; +extern cpuop_func_ce op_4eba_6_ff; +extern cpuop_func_ce op_4ebb_6_nf; +extern cpuop_func_ce op_4ebb_6_ff; +extern cpuop_func_ce op_4ed0_6_nf; +extern cpuop_func_ce op_4ed0_6_ff; +extern cpuop_func_ce op_4ee8_6_nf; +extern cpuop_func_ce op_4ee8_6_ff; +extern cpuop_func_ce op_4ef0_6_nf; +extern cpuop_func_ce op_4ef0_6_ff; +extern cpuop_func_ce op_4ef8_6_nf; +extern cpuop_func_ce op_4ef8_6_ff; +extern cpuop_func_ce op_4ef9_6_nf; +extern cpuop_func_ce op_4ef9_6_ff; +extern cpuop_func_ce op_4efa_6_nf; +extern cpuop_func_ce op_4efa_6_ff; +extern cpuop_func_ce op_4efb_6_nf; +extern cpuop_func_ce op_4efb_6_ff; +extern cpuop_func_ce op_5000_6_nf; +extern cpuop_func_ce op_5000_6_ff; +extern cpuop_func_ce op_5010_6_nf; +extern cpuop_func_ce op_5010_6_ff; +extern cpuop_func_ce op_5018_6_nf; +extern cpuop_func_ce op_5018_6_ff; +extern cpuop_func_ce op_5020_6_nf; +extern cpuop_func_ce op_5020_6_ff; +extern cpuop_func_ce op_5028_6_nf; +extern cpuop_func_ce op_5028_6_ff; +extern cpuop_func_ce op_5030_6_nf; +extern cpuop_func_ce op_5030_6_ff; +extern cpuop_func_ce op_5038_6_nf; +extern cpuop_func_ce op_5038_6_ff; +extern cpuop_func_ce op_5039_6_nf; +extern cpuop_func_ce op_5039_6_ff; +extern cpuop_func_ce op_5040_6_nf; +extern cpuop_func_ce op_5040_6_ff; +extern cpuop_func_ce op_5048_6_nf; +extern cpuop_func_ce op_5048_6_ff; +extern cpuop_func_ce op_5050_6_nf; +extern cpuop_func_ce op_5050_6_ff; +extern cpuop_func_ce op_5058_6_nf; +extern cpuop_func_ce op_5058_6_ff; +extern cpuop_func_ce op_5060_6_nf; +extern cpuop_func_ce op_5060_6_ff; +extern cpuop_func_ce op_5068_6_nf; +extern cpuop_func_ce op_5068_6_ff; +extern cpuop_func_ce op_5070_6_nf; +extern cpuop_func_ce op_5070_6_ff; +extern cpuop_func_ce op_5078_6_nf; +extern cpuop_func_ce op_5078_6_ff; +extern cpuop_func_ce op_5079_6_nf; +extern cpuop_func_ce op_5079_6_ff; +extern cpuop_func_ce op_5080_6_nf; +extern cpuop_func_ce op_5080_6_ff; +extern cpuop_func_ce op_5088_6_nf; +extern cpuop_func_ce op_5088_6_ff; +extern cpuop_func_ce op_5090_6_nf; +extern cpuop_func_ce op_5090_6_ff; +extern cpuop_func_ce op_5098_6_nf; +extern cpuop_func_ce op_5098_6_ff; +extern cpuop_func_ce op_50a0_6_nf; +extern cpuop_func_ce op_50a0_6_ff; +extern cpuop_func_ce op_50a8_6_nf; +extern cpuop_func_ce op_50a8_6_ff; +extern cpuop_func_ce op_50b0_6_nf; +extern cpuop_func_ce op_50b0_6_ff; +extern cpuop_func_ce op_50b8_6_nf; +extern cpuop_func_ce op_50b8_6_ff; +extern cpuop_func_ce op_50b9_6_nf; +extern cpuop_func_ce op_50b9_6_ff; +extern cpuop_func_ce op_50c0_6_nf; +extern cpuop_func_ce op_50c0_6_ff; +extern cpuop_func_ce op_50c8_6_nf; +extern cpuop_func_ce op_50c8_6_ff; +extern cpuop_func_ce op_50d0_6_nf; +extern cpuop_func_ce op_50d0_6_ff; +extern cpuop_func_ce op_50d8_6_nf; +extern cpuop_func_ce op_50d8_6_ff; +extern cpuop_func_ce op_50e0_6_nf; +extern cpuop_func_ce op_50e0_6_ff; +extern cpuop_func_ce op_50e8_6_nf; +extern cpuop_func_ce op_50e8_6_ff; +extern cpuop_func_ce op_50f0_6_nf; +extern cpuop_func_ce op_50f0_6_ff; +extern cpuop_func_ce op_50f8_6_nf; +extern cpuop_func_ce op_50f8_6_ff; +extern cpuop_func_ce op_50f9_6_nf; +extern cpuop_func_ce op_50f9_6_ff; +extern cpuop_func_ce op_5100_6_nf; +extern cpuop_func_ce op_5100_6_ff; +extern cpuop_func_ce op_5110_6_nf; +extern cpuop_func_ce op_5110_6_ff; +extern cpuop_func_ce op_5118_6_nf; +extern cpuop_func_ce op_5118_6_ff; +extern cpuop_func_ce op_5120_6_nf; +extern cpuop_func_ce op_5120_6_ff; +extern cpuop_func_ce op_5128_6_nf; +extern cpuop_func_ce op_5128_6_ff; +extern cpuop_func_ce op_5130_6_nf; +extern cpuop_func_ce op_5130_6_ff; +extern cpuop_func_ce op_5138_6_nf; +extern cpuop_func_ce op_5138_6_ff; +extern cpuop_func_ce op_5139_6_nf; +extern cpuop_func_ce op_5139_6_ff; +extern cpuop_func_ce op_5140_6_nf; +extern cpuop_func_ce op_5140_6_ff; +extern cpuop_func_ce op_5148_6_nf; +extern cpuop_func_ce op_5148_6_ff; +extern cpuop_func_ce op_5150_6_nf; +extern cpuop_func_ce op_5150_6_ff; +extern cpuop_func_ce op_5158_6_nf; +extern cpuop_func_ce op_5158_6_ff; +extern cpuop_func_ce op_5160_6_nf; +extern cpuop_func_ce op_5160_6_ff; +extern cpuop_func_ce op_5168_6_nf; +extern cpuop_func_ce op_5168_6_ff; +extern cpuop_func_ce op_5170_6_nf; +extern cpuop_func_ce op_5170_6_ff; +extern cpuop_func_ce op_5178_6_nf; +extern cpuop_func_ce op_5178_6_ff; +extern cpuop_func_ce op_5179_6_nf; +extern cpuop_func_ce op_5179_6_ff; +extern cpuop_func_ce op_5180_6_nf; +extern cpuop_func_ce op_5180_6_ff; +extern cpuop_func_ce op_5188_6_nf; +extern cpuop_func_ce op_5188_6_ff; +extern cpuop_func_ce op_5190_6_nf; +extern cpuop_func_ce op_5190_6_ff; +extern cpuop_func_ce op_5198_6_nf; +extern cpuop_func_ce op_5198_6_ff; +extern cpuop_func_ce op_51a0_6_nf; +extern cpuop_func_ce op_51a0_6_ff; +extern cpuop_func_ce op_51a8_6_nf; +extern cpuop_func_ce op_51a8_6_ff; +extern cpuop_func_ce op_51b0_6_nf; +extern cpuop_func_ce op_51b0_6_ff; +extern cpuop_func_ce op_51b8_6_nf; +extern cpuop_func_ce op_51b8_6_ff; +extern cpuop_func_ce op_51b9_6_nf; +extern cpuop_func_ce op_51b9_6_ff; +extern cpuop_func_ce op_51c0_6_nf; +extern cpuop_func_ce op_51c0_6_ff; +extern cpuop_func_ce op_51c8_6_nf; +extern cpuop_func_ce op_51c8_6_ff; +extern cpuop_func_ce op_51d0_6_nf; +extern cpuop_func_ce op_51d0_6_ff; +extern cpuop_func_ce op_51d8_6_nf; +extern cpuop_func_ce op_51d8_6_ff; +extern cpuop_func_ce op_51e0_6_nf; +extern cpuop_func_ce op_51e0_6_ff; +extern cpuop_func_ce op_51e8_6_nf; +extern cpuop_func_ce op_51e8_6_ff; +extern cpuop_func_ce op_51f0_6_nf; +extern cpuop_func_ce op_51f0_6_ff; +extern cpuop_func_ce op_51f8_6_nf; +extern cpuop_func_ce op_51f8_6_ff; +extern cpuop_func_ce op_51f9_6_nf; +extern cpuop_func_ce op_51f9_6_ff; +extern cpuop_func_ce op_52c0_6_nf; +extern cpuop_func_ce op_52c0_6_ff; +extern cpuop_func_ce op_52c8_6_nf; +extern cpuop_func_ce op_52c8_6_ff; +extern cpuop_func_ce op_52d0_6_nf; +extern cpuop_func_ce op_52d0_6_ff; +extern cpuop_func_ce op_52d8_6_nf; +extern cpuop_func_ce op_52d8_6_ff; +extern cpuop_func_ce op_52e0_6_nf; +extern cpuop_func_ce op_52e0_6_ff; +extern cpuop_func_ce op_52e8_6_nf; +extern cpuop_func_ce op_52e8_6_ff; +extern cpuop_func_ce op_52f0_6_nf; +extern cpuop_func_ce op_52f0_6_ff; +extern cpuop_func_ce op_52f8_6_nf; +extern cpuop_func_ce op_52f8_6_ff; +extern cpuop_func_ce op_52f9_6_nf; +extern cpuop_func_ce op_52f9_6_ff; +extern cpuop_func_ce op_53c0_6_nf; +extern cpuop_func_ce op_53c0_6_ff; +extern cpuop_func_ce op_53c8_6_nf; +extern cpuop_func_ce op_53c8_6_ff; +extern cpuop_func_ce op_53d0_6_nf; +extern cpuop_func_ce op_53d0_6_ff; +extern cpuop_func_ce op_53d8_6_nf; +extern cpuop_func_ce op_53d8_6_ff; +extern cpuop_func_ce op_53e0_6_nf; +extern cpuop_func_ce op_53e0_6_ff; +extern cpuop_func_ce op_53e8_6_nf; +extern cpuop_func_ce op_53e8_6_ff; +extern cpuop_func_ce op_53f0_6_nf; +extern cpuop_func_ce op_53f0_6_ff; +extern cpuop_func_ce op_53f8_6_nf; +extern cpuop_func_ce op_53f8_6_ff; +extern cpuop_func_ce op_53f9_6_nf; +extern cpuop_func_ce op_53f9_6_ff; +extern cpuop_func_ce op_54c0_6_nf; +extern cpuop_func_ce op_54c0_6_ff; +extern cpuop_func_ce op_54c8_6_nf; +extern cpuop_func_ce op_54c8_6_ff; +extern cpuop_func_ce op_54d0_6_nf; +extern cpuop_func_ce op_54d0_6_ff; +extern cpuop_func_ce op_54d8_6_nf; +extern cpuop_func_ce op_54d8_6_ff; +extern cpuop_func_ce op_54e0_6_nf; +extern cpuop_func_ce op_54e0_6_ff; +extern cpuop_func_ce op_54e8_6_nf; +extern cpuop_func_ce op_54e8_6_ff; +extern cpuop_func_ce op_54f0_6_nf; +extern cpuop_func_ce op_54f0_6_ff; +extern cpuop_func_ce op_54f8_6_nf; +extern cpuop_func_ce op_54f8_6_ff; +extern cpuop_func_ce op_54f9_6_nf; +extern cpuop_func_ce op_54f9_6_ff; +extern cpuop_func_ce op_55c0_6_nf; +extern cpuop_func_ce op_55c0_6_ff; +extern cpuop_func_ce op_55c8_6_nf; +extern cpuop_func_ce op_55c8_6_ff; +extern cpuop_func_ce op_55d0_6_nf; +extern cpuop_func_ce op_55d0_6_ff; +extern cpuop_func_ce op_55d8_6_nf; +extern cpuop_func_ce op_55d8_6_ff; +extern cpuop_func_ce op_55e0_6_nf; +extern cpuop_func_ce op_55e0_6_ff; +extern cpuop_func_ce op_55e8_6_nf; +extern cpuop_func_ce op_55e8_6_ff; +extern cpuop_func_ce op_55f0_6_nf; +extern cpuop_func_ce op_55f0_6_ff; +extern cpuop_func_ce op_55f8_6_nf; +extern cpuop_func_ce op_55f8_6_ff; +extern cpuop_func_ce op_55f9_6_nf; +extern cpuop_func_ce op_55f9_6_ff; +extern cpuop_func_ce op_56c0_6_nf; +extern cpuop_func_ce op_56c0_6_ff; +extern cpuop_func_ce op_56c8_6_nf; +extern cpuop_func_ce op_56c8_6_ff; +extern cpuop_func_ce op_56d0_6_nf; +extern cpuop_func_ce op_56d0_6_ff; +extern cpuop_func_ce op_56d8_6_nf; +extern cpuop_func_ce op_56d8_6_ff; +extern cpuop_func_ce op_56e0_6_nf; +extern cpuop_func_ce op_56e0_6_ff; +extern cpuop_func_ce op_56e8_6_nf; +extern cpuop_func_ce op_56e8_6_ff; +extern cpuop_func_ce op_56f0_6_nf; +extern cpuop_func_ce op_56f0_6_ff; +extern cpuop_func_ce op_56f8_6_nf; +extern cpuop_func_ce op_56f8_6_ff; +extern cpuop_func_ce op_56f9_6_nf; +extern cpuop_func_ce op_56f9_6_ff; +extern cpuop_func_ce op_57c0_6_nf; +extern cpuop_func_ce op_57c0_6_ff; +extern cpuop_func_ce op_57c8_6_nf; +extern cpuop_func_ce op_57c8_6_ff; +extern cpuop_func_ce op_57d0_6_nf; +extern cpuop_func_ce op_57d0_6_ff; +extern cpuop_func_ce op_57d8_6_nf; +extern cpuop_func_ce op_57d8_6_ff; +extern cpuop_func_ce op_57e0_6_nf; +extern cpuop_func_ce op_57e0_6_ff; +extern cpuop_func_ce op_57e8_6_nf; +extern cpuop_func_ce op_57e8_6_ff; +extern cpuop_func_ce op_57f0_6_nf; +extern cpuop_func_ce op_57f0_6_ff; +extern cpuop_func_ce op_57f8_6_nf; +extern cpuop_func_ce op_57f8_6_ff; +extern cpuop_func_ce op_57f9_6_nf; +extern cpuop_func_ce op_57f9_6_ff; +extern cpuop_func_ce op_58c0_6_nf; +extern cpuop_func_ce op_58c0_6_ff; +extern cpuop_func_ce op_58c8_6_nf; +extern cpuop_func_ce op_58c8_6_ff; +extern cpuop_func_ce op_58d0_6_nf; +extern cpuop_func_ce op_58d0_6_ff; +extern cpuop_func_ce op_58d8_6_nf; +extern cpuop_func_ce op_58d8_6_ff; +extern cpuop_func_ce op_58e0_6_nf; +extern cpuop_func_ce op_58e0_6_ff; +extern cpuop_func_ce op_58e8_6_nf; +extern cpuop_func_ce op_58e8_6_ff; +extern cpuop_func_ce op_58f0_6_nf; +extern cpuop_func_ce op_58f0_6_ff; +extern cpuop_func_ce op_58f8_6_nf; +extern cpuop_func_ce op_58f8_6_ff; +extern cpuop_func_ce op_58f9_6_nf; +extern cpuop_func_ce op_58f9_6_ff; +extern cpuop_func_ce op_59c0_6_nf; +extern cpuop_func_ce op_59c0_6_ff; +extern cpuop_func_ce op_59c8_6_nf; +extern cpuop_func_ce op_59c8_6_ff; +extern cpuop_func_ce op_59d0_6_nf; +extern cpuop_func_ce op_59d0_6_ff; +extern cpuop_func_ce op_59d8_6_nf; +extern cpuop_func_ce op_59d8_6_ff; +extern cpuop_func_ce op_59e0_6_nf; +extern cpuop_func_ce op_59e0_6_ff; +extern cpuop_func_ce op_59e8_6_nf; +extern cpuop_func_ce op_59e8_6_ff; +extern cpuop_func_ce op_59f0_6_nf; +extern cpuop_func_ce op_59f0_6_ff; +extern cpuop_func_ce op_59f8_6_nf; +extern cpuop_func_ce op_59f8_6_ff; +extern cpuop_func_ce op_59f9_6_nf; +extern cpuop_func_ce op_59f9_6_ff; +extern cpuop_func_ce op_5ac0_6_nf; +extern cpuop_func_ce op_5ac0_6_ff; +extern cpuop_func_ce op_5ac8_6_nf; +extern cpuop_func_ce op_5ac8_6_ff; +extern cpuop_func_ce op_5ad0_6_nf; +extern cpuop_func_ce op_5ad0_6_ff; +extern cpuop_func_ce op_5ad8_6_nf; +extern cpuop_func_ce op_5ad8_6_ff; +extern cpuop_func_ce op_5ae0_6_nf; +extern cpuop_func_ce op_5ae0_6_ff; +extern cpuop_func_ce op_5ae8_6_nf; +extern cpuop_func_ce op_5ae8_6_ff; +extern cpuop_func_ce op_5af0_6_nf; +extern cpuop_func_ce op_5af0_6_ff; +extern cpuop_func_ce op_5af8_6_nf; +extern cpuop_func_ce op_5af8_6_ff; +extern cpuop_func_ce op_5af9_6_nf; +extern cpuop_func_ce op_5af9_6_ff; +extern cpuop_func_ce op_5bc0_6_nf; +extern cpuop_func_ce op_5bc0_6_ff; +extern cpuop_func_ce op_5bc8_6_nf; +extern cpuop_func_ce op_5bc8_6_ff; +extern cpuop_func_ce op_5bd0_6_nf; +extern cpuop_func_ce op_5bd0_6_ff; +extern cpuop_func_ce op_5bd8_6_nf; +extern cpuop_func_ce op_5bd8_6_ff; +extern cpuop_func_ce op_5be0_6_nf; +extern cpuop_func_ce op_5be0_6_ff; +extern cpuop_func_ce op_5be8_6_nf; +extern cpuop_func_ce op_5be8_6_ff; +extern cpuop_func_ce op_5bf0_6_nf; +extern cpuop_func_ce op_5bf0_6_ff; +extern cpuop_func_ce op_5bf8_6_nf; +extern cpuop_func_ce op_5bf8_6_ff; +extern cpuop_func_ce op_5bf9_6_nf; +extern cpuop_func_ce op_5bf9_6_ff; +extern cpuop_func_ce op_5cc0_6_nf; +extern cpuop_func_ce op_5cc0_6_ff; +extern cpuop_func_ce op_5cc8_6_nf; +extern cpuop_func_ce op_5cc8_6_ff; +extern cpuop_func_ce op_5cd0_6_nf; +extern cpuop_func_ce op_5cd0_6_ff; +extern cpuop_func_ce op_5cd8_6_nf; +extern cpuop_func_ce op_5cd8_6_ff; +extern cpuop_func_ce op_5ce0_6_nf; +extern cpuop_func_ce op_5ce0_6_ff; +extern cpuop_func_ce op_5ce8_6_nf; +extern cpuop_func_ce op_5ce8_6_ff; +extern cpuop_func_ce op_5cf0_6_nf; +extern cpuop_func_ce op_5cf0_6_ff; +extern cpuop_func_ce op_5cf8_6_nf; +extern cpuop_func_ce op_5cf8_6_ff; +extern cpuop_func_ce op_5cf9_6_nf; +extern cpuop_func_ce op_5cf9_6_ff; +extern cpuop_func_ce op_5dc0_6_nf; +extern cpuop_func_ce op_5dc0_6_ff; +extern cpuop_func_ce op_5dc8_6_nf; +extern cpuop_func_ce op_5dc8_6_ff; +extern cpuop_func_ce op_5dd0_6_nf; +extern cpuop_func_ce op_5dd0_6_ff; +extern cpuop_func_ce op_5dd8_6_nf; +extern cpuop_func_ce op_5dd8_6_ff; +extern cpuop_func_ce op_5de0_6_nf; +extern cpuop_func_ce op_5de0_6_ff; +extern cpuop_func_ce op_5de8_6_nf; +extern cpuop_func_ce op_5de8_6_ff; +extern cpuop_func_ce op_5df0_6_nf; +extern cpuop_func_ce op_5df0_6_ff; +extern cpuop_func_ce op_5df8_6_nf; +extern cpuop_func_ce op_5df8_6_ff; +extern cpuop_func_ce op_5df9_6_nf; +extern cpuop_func_ce op_5df9_6_ff; +extern cpuop_func_ce op_5ec0_6_nf; +extern cpuop_func_ce op_5ec0_6_ff; +extern cpuop_func_ce op_5ec8_6_nf; +extern cpuop_func_ce op_5ec8_6_ff; +extern cpuop_func_ce op_5ed0_6_nf; +extern cpuop_func_ce op_5ed0_6_ff; +extern cpuop_func_ce op_5ed8_6_nf; +extern cpuop_func_ce op_5ed8_6_ff; +extern cpuop_func_ce op_5ee0_6_nf; +extern cpuop_func_ce op_5ee0_6_ff; +extern cpuop_func_ce op_5ee8_6_nf; +extern cpuop_func_ce op_5ee8_6_ff; +extern cpuop_func_ce op_5ef0_6_nf; +extern cpuop_func_ce op_5ef0_6_ff; +extern cpuop_func_ce op_5ef8_6_nf; +extern cpuop_func_ce op_5ef8_6_ff; +extern cpuop_func_ce op_5ef9_6_nf; +extern cpuop_func_ce op_5ef9_6_ff; +extern cpuop_func_ce op_5fc0_6_nf; +extern cpuop_func_ce op_5fc0_6_ff; +extern cpuop_func_ce op_5fc8_6_nf; +extern cpuop_func_ce op_5fc8_6_ff; +extern cpuop_func_ce op_5fd0_6_nf; +extern cpuop_func_ce op_5fd0_6_ff; +extern cpuop_func_ce op_5fd8_6_nf; +extern cpuop_func_ce op_5fd8_6_ff; +extern cpuop_func_ce op_5fe0_6_nf; +extern cpuop_func_ce op_5fe0_6_ff; +extern cpuop_func_ce op_5fe8_6_nf; +extern cpuop_func_ce op_5fe8_6_ff; +extern cpuop_func_ce op_5ff0_6_nf; +extern cpuop_func_ce op_5ff0_6_ff; +extern cpuop_func_ce op_5ff8_6_nf; +extern cpuop_func_ce op_5ff8_6_ff; +extern cpuop_func_ce op_5ff9_6_nf; +extern cpuop_func_ce op_5ff9_6_ff; +extern cpuop_func_ce op_6000_6_nf; +extern cpuop_func_ce op_6000_6_ff; +extern cpuop_func_ce op_6001_6_nf; +extern cpuop_func_ce op_6001_6_ff; +extern cpuop_func_ce op_60ff_6_nf; +extern cpuop_func_ce op_60ff_6_ff; +extern cpuop_func_ce op_6100_6_nf; +extern cpuop_func_ce op_6100_6_ff; +extern cpuop_func_ce op_6101_6_nf; +extern cpuop_func_ce op_6101_6_ff; +extern cpuop_func_ce op_61ff_6_nf; +extern cpuop_func_ce op_61ff_6_ff; +extern cpuop_func_ce op_6200_6_nf; +extern cpuop_func_ce op_6200_6_ff; +extern cpuop_func_ce op_6201_6_nf; +extern cpuop_func_ce op_6201_6_ff; +extern cpuop_func_ce op_62ff_6_nf; +extern cpuop_func_ce op_62ff_6_ff; +extern cpuop_func_ce op_6300_6_nf; +extern cpuop_func_ce op_6300_6_ff; +extern cpuop_func_ce op_6301_6_nf; +extern cpuop_func_ce op_6301_6_ff; +extern cpuop_func_ce op_63ff_6_nf; +extern cpuop_func_ce op_63ff_6_ff; +extern cpuop_func_ce op_6400_6_nf; +extern cpuop_func_ce op_6400_6_ff; +extern cpuop_func_ce op_6401_6_nf; +extern cpuop_func_ce op_6401_6_ff; +extern cpuop_func_ce op_64ff_6_nf; +extern cpuop_func_ce op_64ff_6_ff; +extern cpuop_func_ce op_6500_6_nf; +extern cpuop_func_ce op_6500_6_ff; +extern cpuop_func_ce op_6501_6_nf; +extern cpuop_func_ce op_6501_6_ff; +extern cpuop_func_ce op_65ff_6_nf; +extern cpuop_func_ce op_65ff_6_ff; +extern cpuop_func_ce op_6600_6_nf; +extern cpuop_func_ce op_6600_6_ff; +extern cpuop_func_ce op_6601_6_nf; +extern cpuop_func_ce op_6601_6_ff; +extern cpuop_func_ce op_66ff_6_nf; +extern cpuop_func_ce op_66ff_6_ff; +extern cpuop_func_ce op_6700_6_nf; +extern cpuop_func_ce op_6700_6_ff; +extern cpuop_func_ce op_6701_6_nf; +extern cpuop_func_ce op_6701_6_ff; +extern cpuop_func_ce op_67ff_6_nf; +extern cpuop_func_ce op_67ff_6_ff; +extern cpuop_func_ce op_6800_6_nf; +extern cpuop_func_ce op_6800_6_ff; +extern cpuop_func_ce op_6801_6_nf; +extern cpuop_func_ce op_6801_6_ff; +extern cpuop_func_ce op_68ff_6_nf; +extern cpuop_func_ce op_68ff_6_ff; +extern cpuop_func_ce op_6900_6_nf; +extern cpuop_func_ce op_6900_6_ff; +extern cpuop_func_ce op_6901_6_nf; +extern cpuop_func_ce op_6901_6_ff; +extern cpuop_func_ce op_69ff_6_nf; +extern cpuop_func_ce op_69ff_6_ff; +extern cpuop_func_ce op_6a00_6_nf; +extern cpuop_func_ce op_6a00_6_ff; +extern cpuop_func_ce op_6a01_6_nf; +extern cpuop_func_ce op_6a01_6_ff; +extern cpuop_func_ce op_6aff_6_nf; +extern cpuop_func_ce op_6aff_6_ff; +extern cpuop_func_ce op_6b00_6_nf; +extern cpuop_func_ce op_6b00_6_ff; +extern cpuop_func_ce op_6b01_6_nf; +extern cpuop_func_ce op_6b01_6_ff; +extern cpuop_func_ce op_6bff_6_nf; +extern cpuop_func_ce op_6bff_6_ff; +extern cpuop_func_ce op_6c00_6_nf; +extern cpuop_func_ce op_6c00_6_ff; +extern cpuop_func_ce op_6c01_6_nf; +extern cpuop_func_ce op_6c01_6_ff; +extern cpuop_func_ce op_6cff_6_nf; +extern cpuop_func_ce op_6cff_6_ff; +extern cpuop_func_ce op_6d00_6_nf; +extern cpuop_func_ce op_6d00_6_ff; +extern cpuop_func_ce op_6d01_6_nf; +extern cpuop_func_ce op_6d01_6_ff; +extern cpuop_func_ce op_6dff_6_nf; +extern cpuop_func_ce op_6dff_6_ff; +extern cpuop_func_ce op_6e00_6_nf; +extern cpuop_func_ce op_6e00_6_ff; +extern cpuop_func_ce op_6e01_6_nf; +extern cpuop_func_ce op_6e01_6_ff; +extern cpuop_func_ce op_6eff_6_nf; +extern cpuop_func_ce op_6eff_6_ff; +extern cpuop_func_ce op_6f00_6_nf; +extern cpuop_func_ce op_6f00_6_ff; +extern cpuop_func_ce op_6f01_6_nf; +extern cpuop_func_ce op_6f01_6_ff; +extern cpuop_func_ce op_6fff_6_nf; +extern cpuop_func_ce op_6fff_6_ff; +extern cpuop_func_ce op_7000_6_nf; +extern cpuop_func_ce op_7000_6_ff; +extern cpuop_func_ce op_8000_6_nf; +extern cpuop_func_ce op_8000_6_ff; +extern cpuop_func_ce op_8010_6_nf; +extern cpuop_func_ce op_8010_6_ff; +extern cpuop_func_ce op_8018_6_nf; +extern cpuop_func_ce op_8018_6_ff; +extern cpuop_func_ce op_8020_6_nf; +extern cpuop_func_ce op_8020_6_ff; +extern cpuop_func_ce op_8028_6_nf; +extern cpuop_func_ce op_8028_6_ff; +extern cpuop_func_ce op_8030_6_nf; +extern cpuop_func_ce op_8030_6_ff; +extern cpuop_func_ce op_8038_6_nf; +extern cpuop_func_ce op_8038_6_ff; +extern cpuop_func_ce op_8039_6_nf; +extern cpuop_func_ce op_8039_6_ff; +extern cpuop_func_ce op_803a_6_nf; +extern cpuop_func_ce op_803a_6_ff; +extern cpuop_func_ce op_803b_6_nf; +extern cpuop_func_ce op_803b_6_ff; +extern cpuop_func_ce op_803c_6_nf; +extern cpuop_func_ce op_803c_6_ff; +extern cpuop_func_ce op_8040_6_nf; +extern cpuop_func_ce op_8040_6_ff; +extern cpuop_func_ce op_8050_6_nf; +extern cpuop_func_ce op_8050_6_ff; +extern cpuop_func_ce op_8058_6_nf; +extern cpuop_func_ce op_8058_6_ff; +extern cpuop_func_ce op_8060_6_nf; +extern cpuop_func_ce op_8060_6_ff; +extern cpuop_func_ce op_8068_6_nf; +extern cpuop_func_ce op_8068_6_ff; +extern cpuop_func_ce op_8070_6_nf; +extern cpuop_func_ce op_8070_6_ff; +extern cpuop_func_ce op_8078_6_nf; +extern cpuop_func_ce op_8078_6_ff; +extern cpuop_func_ce op_8079_6_nf; +extern cpuop_func_ce op_8079_6_ff; +extern cpuop_func_ce op_807a_6_nf; +extern cpuop_func_ce op_807a_6_ff; +extern cpuop_func_ce op_807b_6_nf; +extern cpuop_func_ce op_807b_6_ff; +extern cpuop_func_ce op_807c_6_nf; +extern cpuop_func_ce op_807c_6_ff; +extern cpuop_func_ce op_8080_6_nf; +extern cpuop_func_ce op_8080_6_ff; +extern cpuop_func_ce op_8090_6_nf; +extern cpuop_func_ce op_8090_6_ff; +extern cpuop_func_ce op_8098_6_nf; +extern cpuop_func_ce op_8098_6_ff; +extern cpuop_func_ce op_80a0_6_nf; +extern cpuop_func_ce op_80a0_6_ff; +extern cpuop_func_ce op_80a8_6_nf; +extern cpuop_func_ce op_80a8_6_ff; +extern cpuop_func_ce op_80b0_6_nf; +extern cpuop_func_ce op_80b0_6_ff; +extern cpuop_func_ce op_80b8_6_nf; +extern cpuop_func_ce op_80b8_6_ff; +extern cpuop_func_ce op_80b9_6_nf; +extern cpuop_func_ce op_80b9_6_ff; +extern cpuop_func_ce op_80ba_6_nf; +extern cpuop_func_ce op_80ba_6_ff; +extern cpuop_func_ce op_80bb_6_nf; +extern cpuop_func_ce op_80bb_6_ff; +extern cpuop_func_ce op_80bc_6_nf; +extern cpuop_func_ce op_80bc_6_ff; +extern cpuop_func_ce op_80c0_6_nf; +extern cpuop_func_ce op_80c0_6_ff; +extern cpuop_func_ce op_80d0_6_nf; +extern cpuop_func_ce op_80d0_6_ff; +extern cpuop_func_ce op_80d8_6_nf; +extern cpuop_func_ce op_80d8_6_ff; +extern cpuop_func_ce op_80e0_6_nf; +extern cpuop_func_ce op_80e0_6_ff; +extern cpuop_func_ce op_80e8_6_nf; +extern cpuop_func_ce op_80e8_6_ff; +extern cpuop_func_ce op_80f0_6_nf; +extern cpuop_func_ce op_80f0_6_ff; +extern cpuop_func_ce op_80f8_6_nf; +extern cpuop_func_ce op_80f8_6_ff; +extern cpuop_func_ce op_80f9_6_nf; +extern cpuop_func_ce op_80f9_6_ff; +extern cpuop_func_ce op_80fa_6_nf; +extern cpuop_func_ce op_80fa_6_ff; +extern cpuop_func_ce op_80fb_6_nf; +extern cpuop_func_ce op_80fb_6_ff; +extern cpuop_func_ce op_80fc_6_nf; +extern cpuop_func_ce op_80fc_6_ff; +extern cpuop_func_ce op_8100_6_nf; +extern cpuop_func_ce op_8100_6_ff; +extern cpuop_func_ce op_8108_6_nf; +extern cpuop_func_ce op_8108_6_ff; +extern cpuop_func_ce op_8110_6_nf; +extern cpuop_func_ce op_8110_6_ff; +extern cpuop_func_ce op_8118_6_nf; +extern cpuop_func_ce op_8118_6_ff; +extern cpuop_func_ce op_8120_6_nf; +extern cpuop_func_ce op_8120_6_ff; +extern cpuop_func_ce op_8128_6_nf; +extern cpuop_func_ce op_8128_6_ff; +extern cpuop_func_ce op_8130_6_nf; +extern cpuop_func_ce op_8130_6_ff; +extern cpuop_func_ce op_8138_6_nf; +extern cpuop_func_ce op_8138_6_ff; +extern cpuop_func_ce op_8139_6_nf; +extern cpuop_func_ce op_8139_6_ff; +extern cpuop_func_ce op_8150_6_nf; +extern cpuop_func_ce op_8150_6_ff; +extern cpuop_func_ce op_8158_6_nf; +extern cpuop_func_ce op_8158_6_ff; +extern cpuop_func_ce op_8160_6_nf; +extern cpuop_func_ce op_8160_6_ff; +extern cpuop_func_ce op_8168_6_nf; +extern cpuop_func_ce op_8168_6_ff; +extern cpuop_func_ce op_8170_6_nf; +extern cpuop_func_ce op_8170_6_ff; +extern cpuop_func_ce op_8178_6_nf; +extern cpuop_func_ce op_8178_6_ff; +extern cpuop_func_ce op_8179_6_nf; +extern cpuop_func_ce op_8179_6_ff; +extern cpuop_func_ce op_8190_6_nf; +extern cpuop_func_ce op_8190_6_ff; +extern cpuop_func_ce op_8198_6_nf; +extern cpuop_func_ce op_8198_6_ff; +extern cpuop_func_ce op_81a0_6_nf; +extern cpuop_func_ce op_81a0_6_ff; +extern cpuop_func_ce op_81a8_6_nf; +extern cpuop_func_ce op_81a8_6_ff; +extern cpuop_func_ce op_81b0_6_nf; +extern cpuop_func_ce op_81b0_6_ff; +extern cpuop_func_ce op_81b8_6_nf; +extern cpuop_func_ce op_81b8_6_ff; +extern cpuop_func_ce op_81b9_6_nf; +extern cpuop_func_ce op_81b9_6_ff; +extern cpuop_func_ce op_81c0_6_nf; +extern cpuop_func_ce op_81c0_6_ff; +extern cpuop_func_ce op_81d0_6_nf; +extern cpuop_func_ce op_81d0_6_ff; +extern cpuop_func_ce op_81d8_6_nf; +extern cpuop_func_ce op_81d8_6_ff; +extern cpuop_func_ce op_81e0_6_nf; +extern cpuop_func_ce op_81e0_6_ff; +extern cpuop_func_ce op_81e8_6_nf; +extern cpuop_func_ce op_81e8_6_ff; +extern cpuop_func_ce op_81f0_6_nf; +extern cpuop_func_ce op_81f0_6_ff; +extern cpuop_func_ce op_81f8_6_nf; +extern cpuop_func_ce op_81f8_6_ff; +extern cpuop_func_ce op_81f9_6_nf; +extern cpuop_func_ce op_81f9_6_ff; +extern cpuop_func_ce op_81fa_6_nf; +extern cpuop_func_ce op_81fa_6_ff; +extern cpuop_func_ce op_81fb_6_nf; +extern cpuop_func_ce op_81fb_6_ff; +extern cpuop_func_ce op_81fc_6_nf; +extern cpuop_func_ce op_81fc_6_ff; +extern cpuop_func_ce op_9000_6_nf; +extern cpuop_func_ce op_9000_6_ff; +extern cpuop_func_ce op_9010_6_nf; +extern cpuop_func_ce op_9010_6_ff; +extern cpuop_func_ce op_9018_6_nf; +extern cpuop_func_ce op_9018_6_ff; +extern cpuop_func_ce op_9020_6_nf; +extern cpuop_func_ce op_9020_6_ff; +extern cpuop_func_ce op_9028_6_nf; +extern cpuop_func_ce op_9028_6_ff; +extern cpuop_func_ce op_9030_6_nf; +extern cpuop_func_ce op_9030_6_ff; +extern cpuop_func_ce op_9038_6_nf; +extern cpuop_func_ce op_9038_6_ff; +extern cpuop_func_ce op_9039_6_nf; +extern cpuop_func_ce op_9039_6_ff; +extern cpuop_func_ce op_903a_6_nf; +extern cpuop_func_ce op_903a_6_ff; +extern cpuop_func_ce op_903b_6_nf; +extern cpuop_func_ce op_903b_6_ff; +extern cpuop_func_ce op_903c_6_nf; +extern cpuop_func_ce op_903c_6_ff; +extern cpuop_func_ce op_9040_6_nf; +extern cpuop_func_ce op_9040_6_ff; +extern cpuop_func_ce op_9048_6_nf; +extern cpuop_func_ce op_9048_6_ff; +extern cpuop_func_ce op_9050_6_nf; +extern cpuop_func_ce op_9050_6_ff; +extern cpuop_func_ce op_9058_6_nf; +extern cpuop_func_ce op_9058_6_ff; +extern cpuop_func_ce op_9060_6_nf; +extern cpuop_func_ce op_9060_6_ff; +extern cpuop_func_ce op_9068_6_nf; +extern cpuop_func_ce op_9068_6_ff; +extern cpuop_func_ce op_9070_6_nf; +extern cpuop_func_ce op_9070_6_ff; +extern cpuop_func_ce op_9078_6_nf; +extern cpuop_func_ce op_9078_6_ff; +extern cpuop_func_ce op_9079_6_nf; +extern cpuop_func_ce op_9079_6_ff; +extern cpuop_func_ce op_907a_6_nf; +extern cpuop_func_ce op_907a_6_ff; +extern cpuop_func_ce op_907b_6_nf; +extern cpuop_func_ce op_907b_6_ff; +extern cpuop_func_ce op_907c_6_nf; +extern cpuop_func_ce op_907c_6_ff; +extern cpuop_func_ce op_9080_6_nf; +extern cpuop_func_ce op_9080_6_ff; +extern cpuop_func_ce op_9088_6_nf; +extern cpuop_func_ce op_9088_6_ff; +extern cpuop_func_ce op_9090_6_nf; +extern cpuop_func_ce op_9090_6_ff; +extern cpuop_func_ce op_9098_6_nf; +extern cpuop_func_ce op_9098_6_ff; +extern cpuop_func_ce op_90a0_6_nf; +extern cpuop_func_ce op_90a0_6_ff; +extern cpuop_func_ce op_90a8_6_nf; +extern cpuop_func_ce op_90a8_6_ff; +extern cpuop_func_ce op_90b0_6_nf; +extern cpuop_func_ce op_90b0_6_ff; +extern cpuop_func_ce op_90b8_6_nf; +extern cpuop_func_ce op_90b8_6_ff; +extern cpuop_func_ce op_90b9_6_nf; +extern cpuop_func_ce op_90b9_6_ff; +extern cpuop_func_ce op_90ba_6_nf; +extern cpuop_func_ce op_90ba_6_ff; +extern cpuop_func_ce op_90bb_6_nf; +extern cpuop_func_ce op_90bb_6_ff; +extern cpuop_func_ce op_90bc_6_nf; +extern cpuop_func_ce op_90bc_6_ff; +extern cpuop_func_ce op_90c0_6_nf; +extern cpuop_func_ce op_90c0_6_ff; +extern cpuop_func_ce op_90c8_6_nf; +extern cpuop_func_ce op_90c8_6_ff; +extern cpuop_func_ce op_90d0_6_nf; +extern cpuop_func_ce op_90d0_6_ff; +extern cpuop_func_ce op_90d8_6_nf; +extern cpuop_func_ce op_90d8_6_ff; +extern cpuop_func_ce op_90e0_6_nf; +extern cpuop_func_ce op_90e0_6_ff; +extern cpuop_func_ce op_90e8_6_nf; +extern cpuop_func_ce op_90e8_6_ff; +extern cpuop_func_ce op_90f0_6_nf; +extern cpuop_func_ce op_90f0_6_ff; +extern cpuop_func_ce op_90f8_6_nf; +extern cpuop_func_ce op_90f8_6_ff; +extern cpuop_func_ce op_90f9_6_nf; +extern cpuop_func_ce op_90f9_6_ff; +extern cpuop_func_ce op_90fa_6_nf; +extern cpuop_func_ce op_90fa_6_ff; +extern cpuop_func_ce op_90fb_6_nf; +extern cpuop_func_ce op_90fb_6_ff; +extern cpuop_func_ce op_90fc_6_nf; +extern cpuop_func_ce op_90fc_6_ff; +extern cpuop_func_ce op_9100_6_nf; +extern cpuop_func_ce op_9100_6_ff; +extern cpuop_func_ce op_9108_6_nf; +extern cpuop_func_ce op_9108_6_ff; +extern cpuop_func_ce op_9110_6_nf; +extern cpuop_func_ce op_9110_6_ff; +extern cpuop_func_ce op_9118_6_nf; +extern cpuop_func_ce op_9118_6_ff; +extern cpuop_func_ce op_9120_6_nf; +extern cpuop_func_ce op_9120_6_ff; +extern cpuop_func_ce op_9128_6_nf; +extern cpuop_func_ce op_9128_6_ff; +extern cpuop_func_ce op_9130_6_nf; +extern cpuop_func_ce op_9130_6_ff; +extern cpuop_func_ce op_9138_6_nf; +extern cpuop_func_ce op_9138_6_ff; +extern cpuop_func_ce op_9139_6_nf; +extern cpuop_func_ce op_9139_6_ff; +extern cpuop_func_ce op_9140_6_nf; +extern cpuop_func_ce op_9140_6_ff; +extern cpuop_func_ce op_9148_6_nf; +extern cpuop_func_ce op_9148_6_ff; +extern cpuop_func_ce op_9150_6_nf; +extern cpuop_func_ce op_9150_6_ff; +extern cpuop_func_ce op_9158_6_nf; +extern cpuop_func_ce op_9158_6_ff; +extern cpuop_func_ce op_9160_6_nf; +extern cpuop_func_ce op_9160_6_ff; +extern cpuop_func_ce op_9168_6_nf; +extern cpuop_func_ce op_9168_6_ff; +extern cpuop_func_ce op_9170_6_nf; +extern cpuop_func_ce op_9170_6_ff; +extern cpuop_func_ce op_9178_6_nf; +extern cpuop_func_ce op_9178_6_ff; +extern cpuop_func_ce op_9179_6_nf; +extern cpuop_func_ce op_9179_6_ff; +extern cpuop_func_ce op_9180_6_nf; +extern cpuop_func_ce op_9180_6_ff; +extern cpuop_func_ce op_9188_6_nf; +extern cpuop_func_ce op_9188_6_ff; +extern cpuop_func_ce op_9190_6_nf; +extern cpuop_func_ce op_9190_6_ff; +extern cpuop_func_ce op_9198_6_nf; +extern cpuop_func_ce op_9198_6_ff; +extern cpuop_func_ce op_91a0_6_nf; +extern cpuop_func_ce op_91a0_6_ff; +extern cpuop_func_ce op_91a8_6_nf; +extern cpuop_func_ce op_91a8_6_ff; +extern cpuop_func_ce op_91b0_6_nf; +extern cpuop_func_ce op_91b0_6_ff; +extern cpuop_func_ce op_91b8_6_nf; +extern cpuop_func_ce op_91b8_6_ff; +extern cpuop_func_ce op_91b9_6_nf; +extern cpuop_func_ce op_91b9_6_ff; +extern cpuop_func_ce op_91c0_6_nf; +extern cpuop_func_ce op_91c0_6_ff; +extern cpuop_func_ce op_91c8_6_nf; +extern cpuop_func_ce op_91c8_6_ff; +extern cpuop_func_ce op_91d0_6_nf; +extern cpuop_func_ce op_91d0_6_ff; +extern cpuop_func_ce op_91d8_6_nf; +extern cpuop_func_ce op_91d8_6_ff; +extern cpuop_func_ce op_91e0_6_nf; +extern cpuop_func_ce op_91e0_6_ff; +extern cpuop_func_ce op_91e8_6_nf; +extern cpuop_func_ce op_91e8_6_ff; +extern cpuop_func_ce op_91f0_6_nf; +extern cpuop_func_ce op_91f0_6_ff; +extern cpuop_func_ce op_91f8_6_nf; +extern cpuop_func_ce op_91f8_6_ff; +extern cpuop_func_ce op_91f9_6_nf; +extern cpuop_func_ce op_91f9_6_ff; +extern cpuop_func_ce op_91fa_6_nf; +extern cpuop_func_ce op_91fa_6_ff; +extern cpuop_func_ce op_91fb_6_nf; +extern cpuop_func_ce op_91fb_6_ff; +extern cpuop_func_ce op_91fc_6_nf; +extern cpuop_func_ce op_91fc_6_ff; +extern cpuop_func_ce op_b000_6_nf; +extern cpuop_func_ce op_b000_6_ff; +extern cpuop_func_ce op_b010_6_nf; +extern cpuop_func_ce op_b010_6_ff; +extern cpuop_func_ce op_b018_6_nf; +extern cpuop_func_ce op_b018_6_ff; +extern cpuop_func_ce op_b020_6_nf; +extern cpuop_func_ce op_b020_6_ff; +extern cpuop_func_ce op_b028_6_nf; +extern cpuop_func_ce op_b028_6_ff; +extern cpuop_func_ce op_b030_6_nf; +extern cpuop_func_ce op_b030_6_ff; +extern cpuop_func_ce op_b038_6_nf; +extern cpuop_func_ce op_b038_6_ff; +extern cpuop_func_ce op_b039_6_nf; +extern cpuop_func_ce op_b039_6_ff; +extern cpuop_func_ce op_b03a_6_nf; +extern cpuop_func_ce op_b03a_6_ff; +extern cpuop_func_ce op_b03b_6_nf; +extern cpuop_func_ce op_b03b_6_ff; +extern cpuop_func_ce op_b03c_6_nf; +extern cpuop_func_ce op_b03c_6_ff; +extern cpuop_func_ce op_b040_6_nf; +extern cpuop_func_ce op_b040_6_ff; +extern cpuop_func_ce op_b048_6_nf; +extern cpuop_func_ce op_b048_6_ff; +extern cpuop_func_ce op_b050_6_nf; +extern cpuop_func_ce op_b050_6_ff; +extern cpuop_func_ce op_b058_6_nf; +extern cpuop_func_ce op_b058_6_ff; +extern cpuop_func_ce op_b060_6_nf; +extern cpuop_func_ce op_b060_6_ff; +extern cpuop_func_ce op_b068_6_nf; +extern cpuop_func_ce op_b068_6_ff; +extern cpuop_func_ce op_b070_6_nf; +extern cpuop_func_ce op_b070_6_ff; +extern cpuop_func_ce op_b078_6_nf; +extern cpuop_func_ce op_b078_6_ff; +extern cpuop_func_ce op_b079_6_nf; +extern cpuop_func_ce op_b079_6_ff; +extern cpuop_func_ce op_b07a_6_nf; +extern cpuop_func_ce op_b07a_6_ff; +extern cpuop_func_ce op_b07b_6_nf; +extern cpuop_func_ce op_b07b_6_ff; +extern cpuop_func_ce op_b07c_6_nf; +extern cpuop_func_ce op_b07c_6_ff; +extern cpuop_func_ce op_b080_6_nf; +extern cpuop_func_ce op_b080_6_ff; +extern cpuop_func_ce op_b088_6_nf; +extern cpuop_func_ce op_b088_6_ff; +extern cpuop_func_ce op_b090_6_nf; +extern cpuop_func_ce op_b090_6_ff; +extern cpuop_func_ce op_b098_6_nf; +extern cpuop_func_ce op_b098_6_ff; +extern cpuop_func_ce op_b0a0_6_nf; +extern cpuop_func_ce op_b0a0_6_ff; +extern cpuop_func_ce op_b0a8_6_nf; +extern cpuop_func_ce op_b0a8_6_ff; +extern cpuop_func_ce op_b0b0_6_nf; +extern cpuop_func_ce op_b0b0_6_ff; +extern cpuop_func_ce op_b0b8_6_nf; +extern cpuop_func_ce op_b0b8_6_ff; +extern cpuop_func_ce op_b0b9_6_nf; +extern cpuop_func_ce op_b0b9_6_ff; +extern cpuop_func_ce op_b0ba_6_nf; +extern cpuop_func_ce op_b0ba_6_ff; +extern cpuop_func_ce op_b0bb_6_nf; +extern cpuop_func_ce op_b0bb_6_ff; +extern cpuop_func_ce op_b0bc_6_nf; +extern cpuop_func_ce op_b0bc_6_ff; +extern cpuop_func_ce op_b0c0_6_nf; +extern cpuop_func_ce op_b0c0_6_ff; +extern cpuop_func_ce op_b0c8_6_nf; +extern cpuop_func_ce op_b0c8_6_ff; +extern cpuop_func_ce op_b0d0_6_nf; +extern cpuop_func_ce op_b0d0_6_ff; +extern cpuop_func_ce op_b0d8_6_nf; +extern cpuop_func_ce op_b0d8_6_ff; +extern cpuop_func_ce op_b0e0_6_nf; +extern cpuop_func_ce op_b0e0_6_ff; +extern cpuop_func_ce op_b0e8_6_nf; +extern cpuop_func_ce op_b0e8_6_ff; +extern cpuop_func_ce op_b0f0_6_nf; +extern cpuop_func_ce op_b0f0_6_ff; +extern cpuop_func_ce op_b0f8_6_nf; +extern cpuop_func_ce op_b0f8_6_ff; +extern cpuop_func_ce op_b0f9_6_nf; +extern cpuop_func_ce op_b0f9_6_ff; +extern cpuop_func_ce op_b0fa_6_nf; +extern cpuop_func_ce op_b0fa_6_ff; +extern cpuop_func_ce op_b0fb_6_nf; +extern cpuop_func_ce op_b0fb_6_ff; +extern cpuop_func_ce op_b0fc_6_nf; +extern cpuop_func_ce op_b0fc_6_ff; +extern cpuop_func_ce op_b100_6_nf; +extern cpuop_func_ce op_b100_6_ff; +extern cpuop_func_ce op_b108_6_nf; +extern cpuop_func_ce op_b108_6_ff; +extern cpuop_func_ce op_b110_6_nf; +extern cpuop_func_ce op_b110_6_ff; +extern cpuop_func_ce op_b118_6_nf; +extern cpuop_func_ce op_b118_6_ff; +extern cpuop_func_ce op_b120_6_nf; +extern cpuop_func_ce op_b120_6_ff; +extern cpuop_func_ce op_b128_6_nf; +extern cpuop_func_ce op_b128_6_ff; +extern cpuop_func_ce op_b130_6_nf; +extern cpuop_func_ce op_b130_6_ff; +extern cpuop_func_ce op_b138_6_nf; +extern cpuop_func_ce op_b138_6_ff; +extern cpuop_func_ce op_b139_6_nf; +extern cpuop_func_ce op_b139_6_ff; +extern cpuop_func_ce op_b140_6_nf; +extern cpuop_func_ce op_b140_6_ff; +extern cpuop_func_ce op_b148_6_nf; +extern cpuop_func_ce op_b148_6_ff; +extern cpuop_func_ce op_b150_6_nf; +extern cpuop_func_ce op_b150_6_ff; +extern cpuop_func_ce op_b158_6_nf; +extern cpuop_func_ce op_b158_6_ff; +extern cpuop_func_ce op_b160_6_nf; +extern cpuop_func_ce op_b160_6_ff; +extern cpuop_func_ce op_b168_6_nf; +extern cpuop_func_ce op_b168_6_ff; +extern cpuop_func_ce op_b170_6_nf; +extern cpuop_func_ce op_b170_6_ff; +extern cpuop_func_ce op_b178_6_nf; +extern cpuop_func_ce op_b178_6_ff; +extern cpuop_func_ce op_b179_6_nf; +extern cpuop_func_ce op_b179_6_ff; +extern cpuop_func_ce op_b180_6_nf; +extern cpuop_func_ce op_b180_6_ff; +extern cpuop_func_ce op_b188_6_nf; +extern cpuop_func_ce op_b188_6_ff; +extern cpuop_func_ce op_b190_6_nf; +extern cpuop_func_ce op_b190_6_ff; +extern cpuop_func_ce op_b198_6_nf; +extern cpuop_func_ce op_b198_6_ff; +extern cpuop_func_ce op_b1a0_6_nf; +extern cpuop_func_ce op_b1a0_6_ff; +extern cpuop_func_ce op_b1a8_6_nf; +extern cpuop_func_ce op_b1a8_6_ff; +extern cpuop_func_ce op_b1b0_6_nf; +extern cpuop_func_ce op_b1b0_6_ff; +extern cpuop_func_ce op_b1b8_6_nf; +extern cpuop_func_ce op_b1b8_6_ff; +extern cpuop_func_ce op_b1b9_6_nf; +extern cpuop_func_ce op_b1b9_6_ff; +extern cpuop_func_ce op_b1c0_6_nf; +extern cpuop_func_ce op_b1c0_6_ff; +extern cpuop_func_ce op_b1c8_6_nf; +extern cpuop_func_ce op_b1c8_6_ff; +extern cpuop_func_ce op_b1d0_6_nf; +extern cpuop_func_ce op_b1d0_6_ff; +extern cpuop_func_ce op_b1d8_6_nf; +extern cpuop_func_ce op_b1d8_6_ff; +extern cpuop_func_ce op_b1e0_6_nf; +extern cpuop_func_ce op_b1e0_6_ff; +extern cpuop_func_ce op_b1e8_6_nf; +extern cpuop_func_ce op_b1e8_6_ff; +extern cpuop_func_ce op_b1f0_6_nf; +extern cpuop_func_ce op_b1f0_6_ff; +extern cpuop_func_ce op_b1f8_6_nf; +extern cpuop_func_ce op_b1f8_6_ff; +extern cpuop_func_ce op_b1f9_6_nf; +extern cpuop_func_ce op_b1f9_6_ff; +extern cpuop_func_ce op_b1fa_6_nf; +extern cpuop_func_ce op_b1fa_6_ff; +extern cpuop_func_ce op_b1fb_6_nf; +extern cpuop_func_ce op_b1fb_6_ff; +extern cpuop_func_ce op_b1fc_6_nf; +extern cpuop_func_ce op_b1fc_6_ff; +extern cpuop_func_ce op_c000_6_nf; +extern cpuop_func_ce op_c000_6_ff; +extern cpuop_func_ce op_c010_6_nf; +extern cpuop_func_ce op_c010_6_ff; +extern cpuop_func_ce op_c018_6_nf; +extern cpuop_func_ce op_c018_6_ff; +extern cpuop_func_ce op_c020_6_nf; +extern cpuop_func_ce op_c020_6_ff; +extern cpuop_func_ce op_c028_6_nf; +extern cpuop_func_ce op_c028_6_ff; +extern cpuop_func_ce op_c030_6_nf; +extern cpuop_func_ce op_c030_6_ff; +extern cpuop_func_ce op_c038_6_nf; +extern cpuop_func_ce op_c038_6_ff; +extern cpuop_func_ce op_c039_6_nf; +extern cpuop_func_ce op_c039_6_ff; +extern cpuop_func_ce op_c03a_6_nf; +extern cpuop_func_ce op_c03a_6_ff; +extern cpuop_func_ce op_c03b_6_nf; +extern cpuop_func_ce op_c03b_6_ff; +extern cpuop_func_ce op_c03c_6_nf; +extern cpuop_func_ce op_c03c_6_ff; +extern cpuop_func_ce op_c040_6_nf; +extern cpuop_func_ce op_c040_6_ff; +extern cpuop_func_ce op_c050_6_nf; +extern cpuop_func_ce op_c050_6_ff; +extern cpuop_func_ce op_c058_6_nf; +extern cpuop_func_ce op_c058_6_ff; +extern cpuop_func_ce op_c060_6_nf; +extern cpuop_func_ce op_c060_6_ff; +extern cpuop_func_ce op_c068_6_nf; +extern cpuop_func_ce op_c068_6_ff; +extern cpuop_func_ce op_c070_6_nf; +extern cpuop_func_ce op_c070_6_ff; +extern cpuop_func_ce op_c078_6_nf; +extern cpuop_func_ce op_c078_6_ff; +extern cpuop_func_ce op_c079_6_nf; +extern cpuop_func_ce op_c079_6_ff; +extern cpuop_func_ce op_c07a_6_nf; +extern cpuop_func_ce op_c07a_6_ff; +extern cpuop_func_ce op_c07b_6_nf; +extern cpuop_func_ce op_c07b_6_ff; +extern cpuop_func_ce op_c07c_6_nf; +extern cpuop_func_ce op_c07c_6_ff; +extern cpuop_func_ce op_c080_6_nf; +extern cpuop_func_ce op_c080_6_ff; +extern cpuop_func_ce op_c090_6_nf; +extern cpuop_func_ce op_c090_6_ff; +extern cpuop_func_ce op_c098_6_nf; +extern cpuop_func_ce op_c098_6_ff; +extern cpuop_func_ce op_c0a0_6_nf; +extern cpuop_func_ce op_c0a0_6_ff; +extern cpuop_func_ce op_c0a8_6_nf; +extern cpuop_func_ce op_c0a8_6_ff; +extern cpuop_func_ce op_c0b0_6_nf; +extern cpuop_func_ce op_c0b0_6_ff; +extern cpuop_func_ce op_c0b8_6_nf; +extern cpuop_func_ce op_c0b8_6_ff; +extern cpuop_func_ce op_c0b9_6_nf; +extern cpuop_func_ce op_c0b9_6_ff; +extern cpuop_func_ce op_c0ba_6_nf; +extern cpuop_func_ce op_c0ba_6_ff; +extern cpuop_func_ce op_c0bb_6_nf; +extern cpuop_func_ce op_c0bb_6_ff; +extern cpuop_func_ce op_c0bc_6_nf; +extern cpuop_func_ce op_c0bc_6_ff; +extern cpuop_func_ce op_c0c0_6_nf; +extern cpuop_func_ce op_c0c0_6_ff; +extern cpuop_func_ce op_c0d0_6_nf; +extern cpuop_func_ce op_c0d0_6_ff; +extern cpuop_func_ce op_c0d8_6_nf; +extern cpuop_func_ce op_c0d8_6_ff; +extern cpuop_func_ce op_c0e0_6_nf; +extern cpuop_func_ce op_c0e0_6_ff; +extern cpuop_func_ce op_c0e8_6_nf; +extern cpuop_func_ce op_c0e8_6_ff; +extern cpuop_func_ce op_c0f0_6_nf; +extern cpuop_func_ce op_c0f0_6_ff; +extern cpuop_func_ce op_c0f8_6_nf; +extern cpuop_func_ce op_c0f8_6_ff; +extern cpuop_func_ce op_c0f9_6_nf; +extern cpuop_func_ce op_c0f9_6_ff; +extern cpuop_func_ce op_c0fa_6_nf; +extern cpuop_func_ce op_c0fa_6_ff; +extern cpuop_func_ce op_c0fb_6_nf; +extern cpuop_func_ce op_c0fb_6_ff; +extern cpuop_func_ce op_c0fc_6_nf; +extern cpuop_func_ce op_c0fc_6_ff; +extern cpuop_func_ce op_c100_6_nf; +extern cpuop_func_ce op_c100_6_ff; +extern cpuop_func_ce op_c108_6_nf; +extern cpuop_func_ce op_c108_6_ff; +extern cpuop_func_ce op_c110_6_nf; +extern cpuop_func_ce op_c110_6_ff; +extern cpuop_func_ce op_c118_6_nf; +extern cpuop_func_ce op_c118_6_ff; +extern cpuop_func_ce op_c120_6_nf; +extern cpuop_func_ce op_c120_6_ff; +extern cpuop_func_ce op_c128_6_nf; +extern cpuop_func_ce op_c128_6_ff; +extern cpuop_func_ce op_c130_6_nf; +extern cpuop_func_ce op_c130_6_ff; +extern cpuop_func_ce op_c138_6_nf; +extern cpuop_func_ce op_c138_6_ff; +extern cpuop_func_ce op_c139_6_nf; +extern cpuop_func_ce op_c139_6_ff; +extern cpuop_func_ce op_c140_6_nf; +extern cpuop_func_ce op_c140_6_ff; +extern cpuop_func_ce op_c148_6_nf; +extern cpuop_func_ce op_c148_6_ff; +extern cpuop_func_ce op_c150_6_nf; +extern cpuop_func_ce op_c150_6_ff; +extern cpuop_func_ce op_c158_6_nf; +extern cpuop_func_ce op_c158_6_ff; +extern cpuop_func_ce op_c160_6_nf; +extern cpuop_func_ce op_c160_6_ff; +extern cpuop_func_ce op_c168_6_nf; +extern cpuop_func_ce op_c168_6_ff; +extern cpuop_func_ce op_c170_6_nf; +extern cpuop_func_ce op_c170_6_ff; +extern cpuop_func_ce op_c178_6_nf; +extern cpuop_func_ce op_c178_6_ff; +extern cpuop_func_ce op_c179_6_nf; +extern cpuop_func_ce op_c179_6_ff; +extern cpuop_func_ce op_c188_6_nf; +extern cpuop_func_ce op_c188_6_ff; +extern cpuop_func_ce op_c190_6_nf; +extern cpuop_func_ce op_c190_6_ff; +extern cpuop_func_ce op_c198_6_nf; +extern cpuop_func_ce op_c198_6_ff; +extern cpuop_func_ce op_c1a0_6_nf; +extern cpuop_func_ce op_c1a0_6_ff; +extern cpuop_func_ce op_c1a8_6_nf; +extern cpuop_func_ce op_c1a8_6_ff; +extern cpuop_func_ce op_c1b0_6_nf; +extern cpuop_func_ce op_c1b0_6_ff; +extern cpuop_func_ce op_c1b8_6_nf; +extern cpuop_func_ce op_c1b8_6_ff; +extern cpuop_func_ce op_c1b9_6_nf; +extern cpuop_func_ce op_c1b9_6_ff; +extern cpuop_func_ce op_c1c0_6_nf; +extern cpuop_func_ce op_c1c0_6_ff; +extern cpuop_func_ce op_c1d0_6_nf; +extern cpuop_func_ce op_c1d0_6_ff; +extern cpuop_func_ce op_c1d8_6_nf; +extern cpuop_func_ce op_c1d8_6_ff; +extern cpuop_func_ce op_c1e0_6_nf; +extern cpuop_func_ce op_c1e0_6_ff; +extern cpuop_func_ce op_c1e8_6_nf; +extern cpuop_func_ce op_c1e8_6_ff; +extern cpuop_func_ce op_c1f0_6_nf; +extern cpuop_func_ce op_c1f0_6_ff; +extern cpuop_func_ce op_c1f8_6_nf; +extern cpuop_func_ce op_c1f8_6_ff; +extern cpuop_func_ce op_c1f9_6_nf; +extern cpuop_func_ce op_c1f9_6_ff; +extern cpuop_func_ce op_c1fa_6_nf; +extern cpuop_func_ce op_c1fa_6_ff; +extern cpuop_func_ce op_c1fb_6_nf; +extern cpuop_func_ce op_c1fb_6_ff; +extern cpuop_func_ce op_c1fc_6_nf; +extern cpuop_func_ce op_c1fc_6_ff; +extern cpuop_func_ce op_d000_6_nf; +extern cpuop_func_ce op_d000_6_ff; +extern cpuop_func_ce op_d010_6_nf; +extern cpuop_func_ce op_d010_6_ff; +extern cpuop_func_ce op_d018_6_nf; +extern cpuop_func_ce op_d018_6_ff; +extern cpuop_func_ce op_d020_6_nf; +extern cpuop_func_ce op_d020_6_ff; +extern cpuop_func_ce op_d028_6_nf; +extern cpuop_func_ce op_d028_6_ff; +extern cpuop_func_ce op_d030_6_nf; +extern cpuop_func_ce op_d030_6_ff; +extern cpuop_func_ce op_d038_6_nf; +extern cpuop_func_ce op_d038_6_ff; +extern cpuop_func_ce op_d039_6_nf; +extern cpuop_func_ce op_d039_6_ff; +extern cpuop_func_ce op_d03a_6_nf; +extern cpuop_func_ce op_d03a_6_ff; +extern cpuop_func_ce op_d03b_6_nf; +extern cpuop_func_ce op_d03b_6_ff; +extern cpuop_func_ce op_d03c_6_nf; +extern cpuop_func_ce op_d03c_6_ff; +extern cpuop_func_ce op_d040_6_nf; +extern cpuop_func_ce op_d040_6_ff; +extern cpuop_func_ce op_d048_6_nf; +extern cpuop_func_ce op_d048_6_ff; +extern cpuop_func_ce op_d050_6_nf; +extern cpuop_func_ce op_d050_6_ff; +extern cpuop_func_ce op_d058_6_nf; +extern cpuop_func_ce op_d058_6_ff; +extern cpuop_func_ce op_d060_6_nf; +extern cpuop_func_ce op_d060_6_ff; +extern cpuop_func_ce op_d068_6_nf; +extern cpuop_func_ce op_d068_6_ff; +extern cpuop_func_ce op_d070_6_nf; +extern cpuop_func_ce op_d070_6_ff; +extern cpuop_func_ce op_d078_6_nf; +extern cpuop_func_ce op_d078_6_ff; +extern cpuop_func_ce op_d079_6_nf; +extern cpuop_func_ce op_d079_6_ff; +extern cpuop_func_ce op_d07a_6_nf; +extern cpuop_func_ce op_d07a_6_ff; +extern cpuop_func_ce op_d07b_6_nf; +extern cpuop_func_ce op_d07b_6_ff; +extern cpuop_func_ce op_d07c_6_nf; +extern cpuop_func_ce op_d07c_6_ff; +extern cpuop_func_ce op_d080_6_nf; +extern cpuop_func_ce op_d080_6_ff; +extern cpuop_func_ce op_d088_6_nf; +extern cpuop_func_ce op_d088_6_ff; +extern cpuop_func_ce op_d090_6_nf; +extern cpuop_func_ce op_d090_6_ff; +extern cpuop_func_ce op_d098_6_nf; +extern cpuop_func_ce op_d098_6_ff; +extern cpuop_func_ce op_d0a0_6_nf; +extern cpuop_func_ce op_d0a0_6_ff; +extern cpuop_func_ce op_d0a8_6_nf; +extern cpuop_func_ce op_d0a8_6_ff; +extern cpuop_func_ce op_d0b0_6_nf; +extern cpuop_func_ce op_d0b0_6_ff; +extern cpuop_func_ce op_d0b8_6_nf; +extern cpuop_func_ce op_d0b8_6_ff; +extern cpuop_func_ce op_d0b9_6_nf; +extern cpuop_func_ce op_d0b9_6_ff; +extern cpuop_func_ce op_d0ba_6_nf; +extern cpuop_func_ce op_d0ba_6_ff; +extern cpuop_func_ce op_d0bb_6_nf; +extern cpuop_func_ce op_d0bb_6_ff; +extern cpuop_func_ce op_d0bc_6_nf; +extern cpuop_func_ce op_d0bc_6_ff; +extern cpuop_func_ce op_d0c0_6_nf; +extern cpuop_func_ce op_d0c0_6_ff; +extern cpuop_func_ce op_d0c8_6_nf; +extern cpuop_func_ce op_d0c8_6_ff; +extern cpuop_func_ce op_d0d0_6_nf; +extern cpuop_func_ce op_d0d0_6_ff; +extern cpuop_func_ce op_d0d8_6_nf; +extern cpuop_func_ce op_d0d8_6_ff; +extern cpuop_func_ce op_d0e0_6_nf; +extern cpuop_func_ce op_d0e0_6_ff; +extern cpuop_func_ce op_d0e8_6_nf; +extern cpuop_func_ce op_d0e8_6_ff; +extern cpuop_func_ce op_d0f0_6_nf; +extern cpuop_func_ce op_d0f0_6_ff; +extern cpuop_func_ce op_d0f8_6_nf; +extern cpuop_func_ce op_d0f8_6_ff; +extern cpuop_func_ce op_d0f9_6_nf; +extern cpuop_func_ce op_d0f9_6_ff; +extern cpuop_func_ce op_d0fa_6_nf; +extern cpuop_func_ce op_d0fa_6_ff; +extern cpuop_func_ce op_d0fb_6_nf; +extern cpuop_func_ce op_d0fb_6_ff; +extern cpuop_func_ce op_d0fc_6_nf; +extern cpuop_func_ce op_d0fc_6_ff; +extern cpuop_func_ce op_d100_6_nf; +extern cpuop_func_ce op_d100_6_ff; +extern cpuop_func_ce op_d108_6_nf; +extern cpuop_func_ce op_d108_6_ff; +extern cpuop_func_ce op_d110_6_nf; +extern cpuop_func_ce op_d110_6_ff; +extern cpuop_func_ce op_d118_6_nf; +extern cpuop_func_ce op_d118_6_ff; +extern cpuop_func_ce op_d120_6_nf; +extern cpuop_func_ce op_d120_6_ff; +extern cpuop_func_ce op_d128_6_nf; +extern cpuop_func_ce op_d128_6_ff; +extern cpuop_func_ce op_d130_6_nf; +extern cpuop_func_ce op_d130_6_ff; +extern cpuop_func_ce op_d138_6_nf; +extern cpuop_func_ce op_d138_6_ff; +extern cpuop_func_ce op_d139_6_nf; +extern cpuop_func_ce op_d139_6_ff; +extern cpuop_func_ce op_d140_6_nf; +extern cpuop_func_ce op_d140_6_ff; +extern cpuop_func_ce op_d148_6_nf; +extern cpuop_func_ce op_d148_6_ff; +extern cpuop_func_ce op_d150_6_nf; +extern cpuop_func_ce op_d150_6_ff; +extern cpuop_func_ce op_d158_6_nf; +extern cpuop_func_ce op_d158_6_ff; +extern cpuop_func_ce op_d160_6_nf; +extern cpuop_func_ce op_d160_6_ff; +extern cpuop_func_ce op_d168_6_nf; +extern cpuop_func_ce op_d168_6_ff; +extern cpuop_func_ce op_d170_6_nf; +extern cpuop_func_ce op_d170_6_ff; +extern cpuop_func_ce op_d178_6_nf; +extern cpuop_func_ce op_d178_6_ff; +extern cpuop_func_ce op_d179_6_nf; +extern cpuop_func_ce op_d179_6_ff; +extern cpuop_func_ce op_d180_6_nf; +extern cpuop_func_ce op_d180_6_ff; +extern cpuop_func_ce op_d188_6_nf; +extern cpuop_func_ce op_d188_6_ff; +extern cpuop_func_ce op_d190_6_nf; +extern cpuop_func_ce op_d190_6_ff; +extern cpuop_func_ce op_d198_6_nf; +extern cpuop_func_ce op_d198_6_ff; +extern cpuop_func_ce op_d1a0_6_nf; +extern cpuop_func_ce op_d1a0_6_ff; +extern cpuop_func_ce op_d1a8_6_nf; +extern cpuop_func_ce op_d1a8_6_ff; +extern cpuop_func_ce op_d1b0_6_nf; +extern cpuop_func_ce op_d1b0_6_ff; +extern cpuop_func_ce op_d1b8_6_nf; +extern cpuop_func_ce op_d1b8_6_ff; +extern cpuop_func_ce op_d1b9_6_nf; +extern cpuop_func_ce op_d1b9_6_ff; +extern cpuop_func_ce op_d1c0_6_nf; +extern cpuop_func_ce op_d1c0_6_ff; +extern cpuop_func_ce op_d1c8_6_nf; +extern cpuop_func_ce op_d1c8_6_ff; +extern cpuop_func_ce op_d1d0_6_nf; +extern cpuop_func_ce op_d1d0_6_ff; +extern cpuop_func_ce op_d1d8_6_nf; +extern cpuop_func_ce op_d1d8_6_ff; +extern cpuop_func_ce op_d1e0_6_nf; +extern cpuop_func_ce op_d1e0_6_ff; +extern cpuop_func_ce op_d1e8_6_nf; +extern cpuop_func_ce op_d1e8_6_ff; +extern cpuop_func_ce op_d1f0_6_nf; +extern cpuop_func_ce op_d1f0_6_ff; +extern cpuop_func_ce op_d1f8_6_nf; +extern cpuop_func_ce op_d1f8_6_ff; +extern cpuop_func_ce op_d1f9_6_nf; +extern cpuop_func_ce op_d1f9_6_ff; +extern cpuop_func_ce op_d1fa_6_nf; +extern cpuop_func_ce op_d1fa_6_ff; +extern cpuop_func_ce op_d1fb_6_nf; +extern cpuop_func_ce op_d1fb_6_ff; +extern cpuop_func_ce op_d1fc_6_nf; +extern cpuop_func_ce op_d1fc_6_ff; +extern cpuop_func_ce op_e000_6_nf; +extern cpuop_func_ce op_e000_6_ff; +extern cpuop_func_ce op_e008_6_nf; +extern cpuop_func_ce op_e008_6_ff; +extern cpuop_func_ce op_e010_6_nf; +extern cpuop_func_ce op_e010_6_ff; +extern cpuop_func_ce op_e018_6_nf; +extern cpuop_func_ce op_e018_6_ff; +extern cpuop_func_ce op_e020_6_nf; +extern cpuop_func_ce op_e020_6_ff; +extern cpuop_func_ce op_e028_6_nf; +extern cpuop_func_ce op_e028_6_ff; +extern cpuop_func_ce op_e030_6_nf; +extern cpuop_func_ce op_e030_6_ff; +extern cpuop_func_ce op_e038_6_nf; +extern cpuop_func_ce op_e038_6_ff; +extern cpuop_func_ce op_e040_6_nf; +extern cpuop_func_ce op_e040_6_ff; +extern cpuop_func_ce op_e048_6_nf; +extern cpuop_func_ce op_e048_6_ff; +extern cpuop_func_ce op_e050_6_nf; +extern cpuop_func_ce op_e050_6_ff; +extern cpuop_func_ce op_e058_6_nf; +extern cpuop_func_ce op_e058_6_ff; +extern cpuop_func_ce op_e060_6_nf; +extern cpuop_func_ce op_e060_6_ff; +extern cpuop_func_ce op_e068_6_nf; +extern cpuop_func_ce op_e068_6_ff; +extern cpuop_func_ce op_e070_6_nf; +extern cpuop_func_ce op_e070_6_ff; +extern cpuop_func_ce op_e078_6_nf; +extern cpuop_func_ce op_e078_6_ff; +extern cpuop_func_ce op_e080_6_nf; +extern cpuop_func_ce op_e080_6_ff; +extern cpuop_func_ce op_e088_6_nf; +extern cpuop_func_ce op_e088_6_ff; +extern cpuop_func_ce op_e090_6_nf; +extern cpuop_func_ce op_e090_6_ff; +extern cpuop_func_ce op_e098_6_nf; +extern cpuop_func_ce op_e098_6_ff; +extern cpuop_func_ce op_e0a0_6_nf; +extern cpuop_func_ce op_e0a0_6_ff; +extern cpuop_func_ce op_e0a8_6_nf; +extern cpuop_func_ce op_e0a8_6_ff; +extern cpuop_func_ce op_e0b0_6_nf; +extern cpuop_func_ce op_e0b0_6_ff; +extern cpuop_func_ce op_e0b8_6_nf; +extern cpuop_func_ce op_e0b8_6_ff; +extern cpuop_func_ce op_e0d0_6_nf; +extern cpuop_func_ce op_e0d0_6_ff; +extern cpuop_func_ce op_e0d8_6_nf; +extern cpuop_func_ce op_e0d8_6_ff; +extern cpuop_func_ce op_e0e0_6_nf; +extern cpuop_func_ce op_e0e0_6_ff; +extern cpuop_func_ce op_e0e8_6_nf; +extern cpuop_func_ce op_e0e8_6_ff; +extern cpuop_func_ce op_e0f0_6_nf; +extern cpuop_func_ce op_e0f0_6_ff; +extern cpuop_func_ce op_e0f8_6_nf; +extern cpuop_func_ce op_e0f8_6_ff; +extern cpuop_func_ce op_e0f9_6_nf; +extern cpuop_func_ce op_e0f9_6_ff; +extern cpuop_func_ce op_e100_6_nf; +extern cpuop_func_ce op_e100_6_ff; +extern cpuop_func_ce op_e108_6_nf; +extern cpuop_func_ce op_e108_6_ff; +extern cpuop_func_ce op_e110_6_nf; +extern cpuop_func_ce op_e110_6_ff; +extern cpuop_func_ce op_e118_6_nf; +extern cpuop_func_ce op_e118_6_ff; +extern cpuop_func_ce op_e120_6_nf; +extern cpuop_func_ce op_e120_6_ff; +extern cpuop_func_ce op_e128_6_nf; +extern cpuop_func_ce op_e128_6_ff; +extern cpuop_func_ce op_e130_6_nf; +extern cpuop_func_ce op_e130_6_ff; +extern cpuop_func_ce op_e138_6_nf; +extern cpuop_func_ce op_e138_6_ff; +extern cpuop_func_ce op_e140_6_nf; +extern cpuop_func_ce op_e140_6_ff; +extern cpuop_func_ce op_e148_6_nf; +extern cpuop_func_ce op_e148_6_ff; +extern cpuop_func_ce op_e150_6_nf; +extern cpuop_func_ce op_e150_6_ff; +extern cpuop_func_ce op_e158_6_nf; +extern cpuop_func_ce op_e158_6_ff; +extern cpuop_func_ce op_e160_6_nf; +extern cpuop_func_ce op_e160_6_ff; +extern cpuop_func_ce op_e168_6_nf; +extern cpuop_func_ce op_e168_6_ff; +extern cpuop_func_ce op_e170_6_nf; +extern cpuop_func_ce op_e170_6_ff; +extern cpuop_func_ce op_e178_6_nf; +extern cpuop_func_ce op_e178_6_ff; +extern cpuop_func_ce op_e180_6_nf; +extern cpuop_func_ce op_e180_6_ff; +extern cpuop_func_ce op_e188_6_nf; +extern cpuop_func_ce op_e188_6_ff; +extern cpuop_func_ce op_e190_6_nf; +extern cpuop_func_ce op_e190_6_ff; +extern cpuop_func_ce op_e198_6_nf; +extern cpuop_func_ce op_e198_6_ff; +extern cpuop_func_ce op_e1a0_6_nf; +extern cpuop_func_ce op_e1a0_6_ff; +extern cpuop_func_ce op_e1a8_6_nf; +extern cpuop_func_ce op_e1a8_6_ff; +extern cpuop_func_ce op_e1b0_6_nf; +extern cpuop_func_ce op_e1b0_6_ff; +extern cpuop_func_ce op_e1b8_6_nf; +extern cpuop_func_ce op_e1b8_6_ff; +extern cpuop_func_ce op_e1d0_6_nf; +extern cpuop_func_ce op_e1d0_6_ff; +extern cpuop_func_ce op_e1d8_6_nf; +extern cpuop_func_ce op_e1d8_6_ff; +extern cpuop_func_ce op_e1e0_6_nf; +extern cpuop_func_ce op_e1e0_6_ff; +extern cpuop_func_ce op_e1e8_6_nf; +extern cpuop_func_ce op_e1e8_6_ff; +extern cpuop_func_ce op_e1f0_6_nf; +extern cpuop_func_ce op_e1f0_6_ff; +extern cpuop_func_ce op_e1f8_6_nf; +extern cpuop_func_ce op_e1f8_6_ff; +extern cpuop_func_ce op_e1f9_6_nf; +extern cpuop_func_ce op_e1f9_6_ff; +extern cpuop_func_ce op_e2d0_6_nf; +extern cpuop_func_ce op_e2d0_6_ff; +extern cpuop_func_ce op_e2d8_6_nf; +extern cpuop_func_ce op_e2d8_6_ff; +extern cpuop_func_ce op_e2e0_6_nf; +extern cpuop_func_ce op_e2e0_6_ff; +extern cpuop_func_ce op_e2e8_6_nf; +extern cpuop_func_ce op_e2e8_6_ff; +extern cpuop_func_ce op_e2f0_6_nf; +extern cpuop_func_ce op_e2f0_6_ff; +extern cpuop_func_ce op_e2f8_6_nf; +extern cpuop_func_ce op_e2f8_6_ff; +extern cpuop_func_ce op_e2f9_6_nf; +extern cpuop_func_ce op_e2f9_6_ff; +extern cpuop_func_ce op_e3d0_6_nf; +extern cpuop_func_ce op_e3d0_6_ff; +extern cpuop_func_ce op_e3d8_6_nf; +extern cpuop_func_ce op_e3d8_6_ff; +extern cpuop_func_ce op_e3e0_6_nf; +extern cpuop_func_ce op_e3e0_6_ff; +extern cpuop_func_ce op_e3e8_6_nf; +extern cpuop_func_ce op_e3e8_6_ff; +extern cpuop_func_ce op_e3f0_6_nf; +extern cpuop_func_ce op_e3f0_6_ff; +extern cpuop_func_ce op_e3f8_6_nf; +extern cpuop_func_ce op_e3f8_6_ff; +extern cpuop_func_ce op_e3f9_6_nf; +extern cpuop_func_ce op_e3f9_6_ff; +extern cpuop_func_ce op_e4d0_6_nf; +extern cpuop_func_ce op_e4d0_6_ff; +extern cpuop_func_ce op_e4d8_6_nf; +extern cpuop_func_ce op_e4d8_6_ff; +extern cpuop_func_ce op_e4e0_6_nf; +extern cpuop_func_ce op_e4e0_6_ff; +extern cpuop_func_ce op_e4e8_6_nf; +extern cpuop_func_ce op_e4e8_6_ff; +extern cpuop_func_ce op_e4f0_6_nf; +extern cpuop_func_ce op_e4f0_6_ff; +extern cpuop_func_ce op_e4f8_6_nf; +extern cpuop_func_ce op_e4f8_6_ff; +extern cpuop_func_ce op_e4f9_6_nf; +extern cpuop_func_ce op_e4f9_6_ff; +extern cpuop_func_ce op_e5d0_6_nf; +extern cpuop_func_ce op_e5d0_6_ff; +extern cpuop_func_ce op_e5d8_6_nf; +extern cpuop_func_ce op_e5d8_6_ff; +extern cpuop_func_ce op_e5e0_6_nf; +extern cpuop_func_ce op_e5e0_6_ff; +extern cpuop_func_ce op_e5e8_6_nf; +extern cpuop_func_ce op_e5e8_6_ff; +extern cpuop_func_ce op_e5f0_6_nf; +extern cpuop_func_ce op_e5f0_6_ff; +extern cpuop_func_ce op_e5f8_6_nf; +extern cpuop_func_ce op_e5f8_6_ff; +extern cpuop_func_ce op_e5f9_6_nf; +extern cpuop_func_ce op_e5f9_6_ff; +extern cpuop_func_ce op_e6d0_6_nf; +extern cpuop_func_ce op_e6d0_6_ff; +extern cpuop_func_ce op_e6d8_6_nf; +extern cpuop_func_ce op_e6d8_6_ff; +extern cpuop_func_ce op_e6e0_6_nf; +extern cpuop_func_ce op_e6e0_6_ff; +extern cpuop_func_ce op_e6e8_6_nf; +extern cpuop_func_ce op_e6e8_6_ff; +extern cpuop_func_ce op_e6f0_6_nf; +extern cpuop_func_ce op_e6f0_6_ff; +extern cpuop_func_ce op_e6f8_6_nf; +extern cpuop_func_ce op_e6f8_6_ff; +extern cpuop_func_ce op_e6f9_6_nf; +extern cpuop_func_ce op_e6f9_6_ff; +extern cpuop_func_ce op_e7d0_6_nf; +extern cpuop_func_ce op_e7d0_6_ff; +extern cpuop_func_ce op_e7d8_6_nf; +extern cpuop_func_ce op_e7d8_6_ff; +extern cpuop_func_ce op_e7e0_6_nf; +extern cpuop_func_ce op_e7e0_6_ff; +extern cpuop_func_ce op_e7e8_6_nf; +extern cpuop_func_ce op_e7e8_6_ff; +extern cpuop_func_ce op_e7f0_6_nf; +extern cpuop_func_ce op_e7f0_6_ff; +extern cpuop_func_ce op_e7f8_6_nf; +extern cpuop_func_ce op_e7f8_6_ff; +extern cpuop_func_ce op_e7f9_6_nf; +extern cpuop_func_ce op_e7f9_6_ff; diff --git a/src/gfxdep b/src/gfxdep new file mode 120000 index 0000000..c4d4987 --- /dev/null +++ b/src/gfxdep @@ -0,0 +1 @@ +.././src/gfx-sdl \ No newline at end of file diff --git a/src/guidep b/src/guidep new file mode 120000 index 0000000..a9ca2d8 --- /dev/null +++ b/src/guidep @@ -0,0 +1 @@ +gui-none/ \ No newline at end of file diff --git a/src/joydep b/src/joydep new file mode 120000 index 0000000..e8a14e2 --- /dev/null +++ b/src/joydep @@ -0,0 +1 @@ +.././src/jd-sdl \ No newline at end of file diff --git a/src/linetoscr.c b/src/linetoscr.c new file mode 100644 index 0000000..ae44980 --- /dev/null +++ b/src/linetoscr.c @@ -0,0 +1,1767 @@ +/* + * E-UAE - The portable Amiga emulator. + * + * This file was generated by genlinetoscr. Don't edit. + */ + +static int NOINLINE linetoscr_8 (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} + +static int NOINLINE linetoscr_8_stretch1 (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } + + return spix; +} + +static int NOINLINE linetoscr_8_shrink1 (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} + +#ifdef AGA +static int NOINLINE linetoscr_8_aga (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_8_stretch1_aga (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u16 *)&buf[dpix]) = (uae_u16) out_val; + dpix += 2; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_8_shrink1_aga (int spix, int dpix, int stoppos) +{ + uae_u8 *buf = (uae_u8 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +static int NOINLINE linetoscr_16 (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + buf[dpix++] = dpix_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + } else if (bplehb) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + } else { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch1 (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1 (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + out_val = dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + buf[dpix++] = dpix_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + } else if (bplehb) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + } else { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + + return spix; +} + +#ifdef AGA +static int NOINLINE linetoscr_16_aga (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + buf[dpix++] = dpix_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + } else if (bplehb) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } else { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga (int spix, int dpix, int stoppos) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + buf[dpix++] = dpix_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + } else if (bplehb) { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } else { + int rem; + if (((long)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= stoppos) + return spix; + rem = (((long)&buf[stoppos]) & 2); + if (rem) + stoppos--; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + + return spix; +} +#endif + +static int NOINLINE linetoscr_32 (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch1 (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1 (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + dpix_val = xcolors[ham_linebuf[spix]]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = colors_for_drawing.acolors[spix_val]; + else + dpix_val = xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} + +#ifdef AGA +static int NOINLINE linetoscr_32_aga (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga (int spix, int dpix, int stoppos) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = (uae_u8)(dp_for_drawing->bplcon4 >> 8); + + if (dp_for_drawing->ham_seen) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = CONVERT_RGB (ham_linebuf[spix]); + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bpldualpf) { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spriteagadpfpixels[spix]) { + dpix_val = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; + spriteagadpfpixels[spix] = 0; + } else { + unsigned int val = lookup[spix_val]; + if (lookup_no[spix_val] == 2) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = colors_for_drawing.acolors[val]; + } + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else if (bplehb) { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + if (spix_val >= 32 && spix_val < 64) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val - 32] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } else { + while (dpix < stoppos) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix] ^ xor_val; + dpix_val = colors_for_drawing.acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + diff --git a/src/machdep b/src/machdep new file mode 120000 index 0000000..caba96e --- /dev/null +++ b/src/machdep @@ -0,0 +1 @@ +.././src/md-ppc-gcc \ No newline at end of file diff --git a/src/md-fpp.h b/src/md-fpp.h new file mode 120000 index 0000000..3060c9d --- /dev/null +++ b/src/md-fpp.h @@ -0,0 +1 @@ +.././src/include/fpp-ieee.h \ No newline at end of file diff --git a/src/osdep b/src/osdep new file mode 120000 index 0000000..d290dca --- /dev/null +++ b/src/osdep @@ -0,0 +1 @@ +.././src/od-generic \ No newline at end of file diff --git a/src/sounddep b/src/sounddep new file mode 120000 index 0000000..21df6ee --- /dev/null +++ b/src/sounddep @@ -0,0 +1 @@ +.././src/sd-sdl \ No newline at end of file diff --git a/src/sysconfig.h.wii b/src/sysconfig.h.wii new file mode 100644 index 0000000..bd5bf1b --- /dev/null +++ b/src/sysconfig.h.wii @@ -0,0 +1,425 @@ +/* src/sysconfig.h. Generated from sysconfig.h.in by configure. */ +/* src/sysconfig.h.in. Generated from configure.in by autoheader. */ + +/* Define to 1 if you have the `alarm' function. */ +#define HAVE_ALARM 1 + +/* Define to 1 if you have the 'bswap_16' function. */ +/*#define HAVE_BSWAP_16 1 */ +#undef HAVE_BSWAP_16 + +/* Define to 1 if you have the 'bswap_32' function. */ +/*#define HAVE_BSWAP_32 1*/ +#undef HAVE_BSWAP_32 + +/* Define to 1 if you have the header file. */ +/*#define HAVE_BYTESWAP_H 1*/ +#undef HAVE_BYTESWAP_H + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_CAPS_CAPSIMAGE_H */ + +/* Define to 1 if you have the `cfmakeraw' function. */ +#define HAVE_CFMAKERAW 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_CURSES_H 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_CYBERGRAPHX_CYBERGRAPHICS_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_DEVICES_AHI_H */ + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +#define HAVE_DIRENT_H 1 + +/* "Define to 1 if you have 'dlopen' function */ +#define HAVE_DLOPEN 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_DUSTAT_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_FCNTL_H 1 + +/* Define to 1 if you have the `getcwd' function. */ +#define HAVE_GETCWD 1 + +/* Define to 1 if you have the `getopt' function. */ +#define HAVE_GETOPT 1 + +/* Define to 1 if you have the `gettimeofday' function. */ +#define HAVE_GETTIMEOFDAY 1 + +/* Define to 1 if you have the `gmtime_r' function. */ +#define HAVE_GMTIME_R 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_INTTYPES_H 1 + +/* Define if exists, doesn't clash with , and + declares uintmax_t. */ +#define HAVE_INTTYPES_H_WITH_UINTMAX 1 + +/* Define to 1 if you have the `isinf' function. */ +#define HAVE_ISINF 1 + +/* Define to 1 if you have the `isnan' function. */ +#define HAVE_ISNAN 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_LIBRARIES_CYBERGRAPHICS_H */ + +/* Define to 1 if you have the `z' library (-lz). */ +#define HAVE_LIBZ 1 + +/* Define to 1 if you have the `localtime_r' function. */ +#define HAVE_LOCALTIME_R 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MACHINE_JOYSTICK_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_MACHINE_SOUNDCARD_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_MEMORY_H 1 + +/* Define to 1 if you have the `mkdir' function. */ +#define HAVE_MKDIR 1 + +/* Define to 1 if you have the `nanosleep' function. */ +#define HAVE_NANOSLEEP 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_NCURSES_H 1 + +/* Define to 1 if you have the header file, and it defines `DIR'. */ +/* #undef HAVE_NDIR_H */ + +/* Define if you have POSIX threads libraries and header files. */ +/* #undef HAVE_PTHREAD */ + +/* Define to 1 if you have the `readdir_r' function. */ +#define HAVE_READDIR_R 1 + +/* Define to 1 if you have the `rmdir' function. */ +#define HAVE_RMDIR 1 + +/* Define to 1 if you have the `select' function. */ +#define HAVE_SELECT 1 + +/* Define to 1 if you have the `setitimer' function. */ +#define HAVE_SETITIMER 1 + +/* Define to 1 if you have the `sigaction' function. */ +#define HAVE_SIGACTION 1 + +/* Define to 1 if you have the `sleep' function. */ +#define HAVE_SLEEP 1 + +/* Define to 1 if stdbool.h conforms to C99. */ +#define HAVE_STDBOOL_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDINT_H 1 + +/* Define if exists, doesn't clash with , and declares + uintmax_t. */ +#define HAVE_STDINT_H_WITH_UINTMAX 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the `strcasecmp' function. */ +#define HAVE_STRCASECMP 1 + +/* Define to 1 if you have the `strcmpi' function. */ +/* #undef HAVE_STRCMPI */ + +/* Define to 1 if you have the `strdup' function. */ +#define HAVE_STRDUP 1 + +/* Define to 1 if you have the `strerror' function. */ +#define HAVE_STRERROR 1 + +/* Define to 1 if you have the `stricmp' function. */ +/* #undef HAVE_STRICMP */ + +/* Define to 1 if you have the header file. */ +/*#define HAVE_STRINGS_H 1*/ +#undef HAVE_STRINGS_H + + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the `strstr' function. */ +#define HAVE_STRSTR 1 + +/* Define to 1 if `st_blocks' is member of `struct stat'. */ +#define HAVE_STRUCT_STAT_ST_BLOCKS 1 + +/* Define to 1 if your `struct stat' has `st_blocks'. Deprecated, use + `HAVE_STRUCT_STAT_ST_BLOCKS' instead. */ +#define HAVE_ST_BLOCKS 1 + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SUN_AUDIOIO_H */ + +/* Define to 1 if you have the `sync' function. */ +/*#define HAVE_SYNC 1*/ +#undef HAVE_SYNC + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_AUDIOIO_H */ + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +/* #undef HAVE_SYS_DIR_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_FILIO_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_FILSYS_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_FS_S5PARAM_H */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_SYS_FS_TYPES_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_IOCTL_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_IPC_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_MMAN_H 1 + +/* Define to 1 if you have the header file. */ +/*#define HAVE_SYS_MOUNT_H 1 */ +#undef HAVE_SYS_MOUNT_H + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +/* #undef HAVE_SYS_NDIR_H */ + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_PARAM_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_SHM_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_SOUNDCARD_H 1 + +/* Define to 1 if you have the header file. */ +/*#define HAVE_SYS_STATFS_H 1*/ +#undef HAVE_SYS_STATFS_H + +/* Define to 1 if you have the header file. */ +/*#define HAVE_SYS_STATVFS_H 1*/ +#undef HAVE_SYS_STATVFS_H + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TERMIOS_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TIME_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* Define to 1 if you have the header file. */ +/* #define HAVE_SYS_VFS_H 1 */ +#undef HAVE_SYS_VFS_H + +/* Define to 1 if you have the `tcgetattr' function. */ +#define HAVE_TCGETATTR 1 + +/* Define to 1 if you have the `timegm' function. */ +#define HAVE_TIMEGM 1 + +/* Define if you have the 'uintmax_t' type in or . */ +#define HAVE_UINTMAX_T 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UNISTD_H 1 + +/* Define if you have the 'unsigned long long' type. */ +#define HAVE_UNSIGNED_LONG_LONG 1 + +/* Define to 1 if you have the `usleep' function. */ +#define HAVE_USLEEP 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UTIME_H 1 + +/* Define to 1 if `utime(file, NULL)' sets file's timestamp to the present. */ +#define HAVE_UTIME_NULL 1 + +/* Define to 1 if you have the header file. */ +/*#define HAVE_VALUES_H 1 */ +#undef HAVE_VALUES_H + +/* Define to 1 if you have the `vfprintf' function. */ +#define HAVE_VFPRINTF 1 + +/* Define to 1 if you have the `vprintf' function. */ +#define HAVE_VPRINTF 1 + +/* Define to 1 if you have the `vsprintf' function. */ +#define HAVE_VSPRINTF 1 + +/* Define to 1 if the system has the type `_Bool'. */ +#define HAVE__BOOL 1 + +/* Define to 1 if your CPU profitably supports multiplication. */ +#define MULTIPLICATION_PROFITABLE 1 + +/* Name of package */ +#define PACKAGE "e-uae" + +/* Define to the address where bug reports for this package should be sent. */ +#define PACKAGE_BUGREPORT "" + +/* Define to the full name of this package. */ +#define PACKAGE_NAME "E-UAE" + +/* Define to the full name and version of this package. */ +#define PACKAGE_STRING "E-UAE 0.8.29-WIP4" + +/* Define to the one symbol short name of this package. */ +#define PACKAGE_TARNAME "e-uae" + +/* Define to the version of this package. */ +#define PACKAGE_VERSION "0.8.29-WIP4" + +/* Define to the necessary symbol if this constant uses a non-standard name on + your system. */ +/* #undef PTHREAD_CREATE_JOINABLE */ + +/* Define as the return type of signal handlers (`int' or `void'). */ +#define RETSIGTYPE void + +/* The size of `char', as computed by sizeof. */ +#define SIZEOF_CHAR 1 + +/* The size of `int', as computed by sizeof. */ +#define SIZEOF_INT 4 + +/* The size of `long', as computed by sizeof. */ +#define SIZEOF_LONG 4 + +/* The size of `long long', as computed by sizeof. */ +#define SIZEOF_LONG_LONG 8 + +/* The size of `short', as computed by sizeof. */ +#define SIZEOF_SHORT 2 + +/* The size of `void *', as computed by sizeof. */ +#define SIZEOF_VOID_P 4 + +/* The size of `__int64', as computed by sizeof. */ +#define SIZEOF___INT64 0 + +/* Define if the block counts reported by statfs may be truncated to 2GB and + the correct values may be stored in the f_spare array. (SunOS 4.1.2, 4.1.3, + and 4.1.3_U1 are reported to have this problem. SunOS 4.1.1 seems not to be + affected.) */ +/* #undef STATFS_TRUNCATES_BLOCK_COUNTS */ + +/* Define if there is no specific function for reading filesystems usage + information and you have the header file. (SVR2) */ +/* #undef STAT_READ_FILSYS */ + +/* Define if statfs takes 2 args and struct statfs has a field named f_bsize. + (4.3BSD, SunOS 4, HP-UX, AIX PS/2) */ +/*#define STAT_STATFS2_BSIZE 1*/ +#undef STAT_STATFS2_BSIZE + +/* Define if statfs takes 2 args and struct statfs has a field named f_fsize. + (4.4BSD, NetBSD) */ +/* #undef STAT_STATFS2_FSIZE */ + +/* Define if statfs takes 2 args and the second argument has type struct + fs_data. (Ultrix) */ +/* #undef STAT_STATFS2_FS_DATA */ + +/* Define if statfs takes 3 args. (DEC Alpha running OSF/1) */ +/* #undef STAT_STATFS3_OSF1 */ + +/* Define if statfs takes 4 args. (SVR3, Dynix, Irix, Dolphin) */ +/* #undef STAT_STATFS4 */ + +/* Define if there is a function named statvfs. (SVR4) */ +/* #undef STAT_STATVFS */ + +/* Define to 1 if you have the ANSI C header files. */ +#define STDC_HEADERS 1 + +/* Define to 1 if you can safely include both and . */ +#define TIME_WITH_SYS_TIME 1 + +/* Define to 1 if your declares `struct tm'. */ +/* #undef TM_IN_SYS_TIME */ + +/* Version number of package */ +#define VERSION "0.8.29-WIP4" + +/* Define to 1 if your processor stores words with the most significant byte + first (like Motorola and SPARC, unlike Intel and VAX). */ +#define WORDS_BIGENDIAN 1 + +/* Define to 1 if the X Window System is missing or not being used. */ +/* #undef X_DISPLAY_MISSING */ + +/* Define to 1 if on AIX 3. + System headers sometimes define this. + We just want to avoid a redefinition error message. */ +#ifndef _ALL_SOURCE +/* # undef _ALL_SOURCE */ +#endif + +/* Number of bits in a file offset, on hosts where this is settable. */ +#define _FILE_OFFSET_BITS 64 + +/* Define for large files, on AIX-style hosts. */ +/* #undef _LARGE_FILES */ + +/* Define to empty if `const' does not conform to ANSI C. */ +/* #undef const */ + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +/* #undef inline */ +#endif + +/* Define to `int' if does not define. */ +/* #undef mode_t */ + +/* Define to `long int' if does not define. */ +/* #undef off_t */ + +/* Define to `unsigned int' if does not define. */ +/* #undef size_t */ + +/* Substitute for socklen_t */ +/* #undef socklen_t */ + +/* Define to unsigned long or unsigned long long if and + don't define. */ +/* #undef uintmax_t */ + +/* Define to empty if the keyword `volatile' does not work. Warning: valid + code using `volatile' can become incorrect without. Disable with care. */ +/* #undef volatile */ diff --git a/src/target.h b/src/target.h new file mode 120000 index 0000000..2e66b63 --- /dev/null +++ b/src/target.h @@ -0,0 +1 @@ +.././src/targets/t-unix.h \ No newline at end of file diff --git a/src/threaddep b/src/threaddep new file mode 120000 index 0000000..be55c9a --- /dev/null +++ b/src/threaddep @@ -0,0 +1 @@ +.././src/td-sdl \ No newline at end of file diff --git a/src/tools/blitops.c b/src/tools/blitops.c new file mode 120000 index 0000000..d408889 --- /dev/null +++ b/src/tools/blitops.c @@ -0,0 +1 @@ +./../blitops.c \ No newline at end of file diff --git a/src/tools/build68k.c b/src/tools/build68k.c new file mode 120000 index 0000000..46115c0 --- /dev/null +++ b/src/tools/build68k.c @@ -0,0 +1 @@ +./../build68k.c \ No newline at end of file diff --git a/src/tools/config.log b/src/tools/config.log new file mode 100644 index 0000000..39e50d2 --- /dev/null +++ b/src/tools/config.log @@ -0,0 +1,883 @@ +This file contains any messages produced by compilers while +running configure, to aid debugging if configure makes a mistake. + +It was created by configure, which was +generated by GNU Autoconf 2.61. Invocation command line was + + $ ../.././src/tools/configure --cache-file=/dev/null --host=i686-pc-linux-gnu --target=powerpc-gekko-elf + +## --------- ## +## Platform. ## +## --------- ## + +hostname = lska2 +uname -m = i686 +uname -r = 2.6.24-24-generic +uname -s = Linux +uname -v = #1 SMP Wed Apr 15 15:54:25 UTC 2009 + +/usr/bin/uname -p = unknown +/bin/uname -X = unknown + +/bin/arch = unknown +/usr/bin/arch -k = unknown +/usr/convex/getsysinfo = unknown +/usr/bin/hostinfo = unknown +/bin/machine = unknown +/usr/bin/oslevel = unknown +/bin/universe = unknown + +PATH: NONE/bin +PATH: NONE/usr/bin +PATH: /home/ska/bin +PATH: /usr/local/mips/bin +PATH: /home/ska/j2me/sun/bin/ +PATH: /opt/eldk/bin +PATH: /opt/eldk/usr/bin +PATH: /home/ska/j2me/midpath/bin/ +PATH: /home/ska/projects/openmoko/bitbake/bin +PATH: /home/ska/bin +PATH: /usr/local/sbin +PATH: /usr/local/bin +PATH: /usr/sbin +PATH: /usr/bin +PATH: /sbin +PATH: /bin +PATH: /usr/games +PATH: /opt/devkitpro//devkitPPC/bin + + +## ----------- ## +## Core tests. ## +## ----------- ## + +configure:1735: checking build system type +configure:1753: result: i686-pc-linux-gnu +configure:1775: checking host system type +configure:1790: result: i686-pc-linux-gnu +configure:1812: checking target system type +configure:1827: result: powerpc-gekko-elf +configure:1864: checking for i686-pc-linux-gnu-gcc +configure:1894: result: no +configure:1904: checking for gcc +configure:1920: found /usr/bin/gcc +configure:1931: result: gcc +configure:2169: checking for C compiler version +configure:2176: gcc --version >&5 +gcc (GCC) 4.2.4 (Ubuntu 4.2.4-1ubuntu3) +Copyright (C) 2007 Free Software Foundation, Inc. +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + +configure:2179: $? = 0 +configure:2186: gcc -v >&5 +Using built-in specs. +Target: i486-linux-gnu +Configured with: ../src/configure -v --enable-languages=c,c++,fortran,objc,obj-c++,treelang --prefix=/usr --enable-shared --with-system-zlib --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --enable-nls --with-gxx-include-dir=/usr/include/c++/4.2 --program-suffix=-4.2 --enable-clocale=gnu --enable-libstdcxx-debug --enable-objc-gc --enable-mpfr --enable-targets=all --enable-checking=release --build=i486-linux-gnu --host=i486-linux-gnu --target=i486-linux-gnu +Thread model: posix +gcc version 4.2.4 (Ubuntu 4.2.4-1ubuntu3) +configure:2189: $? = 0 +configure:2196: gcc -V >&5 +gcc: '-V' option must have argument +configure:2199: $? = 1 +configure:2222: checking for C compiler default output file name +configure:2249: gcc conftest.c >&5 +configure:2252: $? = 0 +configure:2290: result: a.out +configure:2307: checking whether the C compiler works +configure:2317: ./a.out +configure:2320: $? = 0 +configure:2337: result: yes +configure:2344: checking whether we are cross compiling +configure:2346: result: no +configure:2349: checking for suffix of executables +configure:2356: gcc -o conftest conftest.c >&5 +configure:2359: $? = 0 +configure:2383: result: +configure:2389: checking for suffix of object files +configure:2415: gcc -c conftest.c >&5 +configure:2418: $? = 0 +configure:2441: result: o +configure:2445: checking whether we are using the GNU C compiler +configure:2474: gcc -c conftest.c >&5 +configure:2480: $? = 0 +configure:2497: result: yes +configure:2502: checking whether gcc accepts -g +configure:2532: gcc -c -g conftest.c >&5 +configure:2538: $? = 0 +configure:2637: result: yes +configure:2654: checking for gcc option to accept ISO C89 +configure:2728: gcc -c conftest.c >&5 +configure:2734: $? = 0 +configure:2757: result: none needed +configure:2780: checking how to run the C preprocessor +configure:2820: gcc -E conftest.c +configure:2826: $? = 0 +configure:2857: gcc -E conftest.c +conftest.c:8:28: error: ac_nonexistent.h: No such file or directory +configure:2863: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| /* end confdefs.h. */ +| #include +configure:2896: result: gcc -E +configure:2925: gcc -E conftest.c +configure:2931: $? = 0 +configure:2962: gcc -E conftest.c +conftest.c:8:28: error: ac_nonexistent.h: No such file or directory +configure:2968: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| /* end confdefs.h. */ +| #include +configure:3005: checking whether make sets $(MAKE) +configure:3026: result: yes +configure:3048: checking for a BSD-compatible install +configure:3104: result: /usr/bin/install -c +configure:3118: checking for grep that handles long lines and -e +configure:3192: result: /bin/grep +configure:3197: checking for egrep +configure:3275: result: /bin/grep -E +configure:3281: checking for AIX +configure:3303: result: no +configure:3309: checking for library containing strerror +configure:3350: gcc -o conftest conftest.c >&5 +configure:3356: $? = 0 +configure:3384: result: none required +configure:3393: checking for ANSI C header files +configure:3423: gcc -c conftest.c >&5 +configure:3429: $? = 0 +configure:3528: gcc -o conftest conftest.c >&5 +configure:3531: $? = 0 +configure:3537: ./conftest +configure:3540: $? = 0 +configure:3557: result: yes +configure:3568: checking for an ANSI C-conforming const +configure:3643: gcc -c conftest.c >&5 +configure:3649: $? = 0 +configure:3664: result: yes +configure:3674: checking for inline +configure:3700: gcc -c conftest.c >&5 +configure:3706: $? = 0 +configure:3724: result: inline +configure:3758: checking for sys/types.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for sys/stat.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for stdlib.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for string.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for memory.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for strings.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for inttypes.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for stdint.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3758: checking for unistd.h +configure:3779: gcc -c conftest.c >&5 +configure:3785: $? = 0 +configure:3801: result: yes +configure:3813: checking for char +configure:3843: gcc -c conftest.c >&5 +configure:3849: $? = 0 +configure:3864: result: yes +configure:3871: checking size of char +configure:4173: gcc -o conftest conftest.c >&5 +configure:4176: $? = 0 +configure:4182: ./conftest +configure:4185: $? = 0 +configure:4208: result: 1 +configure:4218: checking for short +configure:4248: gcc -c conftest.c >&5 +configure:4254: $? = 0 +configure:4269: result: yes +configure:4276: checking size of short +configure:4578: gcc -o conftest conftest.c >&5 +configure:4581: $? = 0 +configure:4587: ./conftest +configure:4590: $? = 0 +configure:4613: result: 2 +configure:4623: checking for int +configure:4653: gcc -c conftest.c >&5 +configure:4659: $? = 0 +configure:4674: result: yes +configure:4681: checking size of int +configure:4983: gcc -o conftest conftest.c >&5 +configure:4986: $? = 0 +configure:4992: ./conftest +configure:4995: $? = 0 +configure:5018: result: 4 +configure:5028: checking for long +configure:5058: gcc -c conftest.c >&5 +configure:5064: $? = 0 +configure:5079: result: yes +configure:5086: checking size of long +configure:5388: gcc -o conftest conftest.c >&5 +configure:5391: $? = 0 +configure:5397: ./conftest +configure:5400: $? = 0 +configure:5423: result: 4 +configure:5433: checking for long long +configure:5463: gcc -c conftest.c >&5 +configure:5469: $? = 0 +configure:5484: result: yes +configure:5491: checking size of long long +configure:5793: gcc -o conftest conftest.c >&5 +configure:5796: $? = 0 +configure:5802: ./conftest +configure:5805: $? = 0 +configure:5828: result: 8 +configure:5838: checking for __int64 +configure:5868: gcc -c conftest.c >&5 +conftest.c:56: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'ac__type_new_' +conftest.c: In function 'main': +conftest.c:60: error: 'ac__type_new_' undeclared (first use in this function) +conftest.c:60: error: (Each undeclared identifier is reported only once +conftest.c:60: error: for each function it appears in.) +conftest.c:60: error: expected expression before ')' token +configure:5874: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| #define STDC_HEADERS 1 +| #define HAVE_SYS_TYPES_H 1 +| #define HAVE_SYS_STAT_H 1 +| #define HAVE_STDLIB_H 1 +| #define HAVE_STRING_H 1 +| #define HAVE_MEMORY_H 1 +| #define HAVE_STRINGS_H 1 +| #define HAVE_INTTYPES_H 1 +| #define HAVE_STDINT_H 1 +| #define HAVE_UNISTD_H 1 +| #define SIZEOF_CHAR 1 +| #define SIZEOF_SHORT 2 +| #define SIZEOF_INT 4 +| #define SIZEOF_LONG 4 +| #define SIZEOF_LONG_LONG 8 +| /* end confdefs.h. */ +| #include +| #ifdef HAVE_SYS_TYPES_H +| # include +| #endif +| #ifdef HAVE_SYS_STAT_H +| # include +| #endif +| #ifdef STDC_HEADERS +| # include +| # include +| #else +| # ifdef HAVE_STDLIB_H +| # include +| # endif +| #endif +| #ifdef HAVE_STRING_H +| # if !defined STDC_HEADERS && defined HAVE_MEMORY_H +| # include +| # endif +| # include +| #endif +| #ifdef HAVE_STRINGS_H +| # include +| #endif +| #ifdef HAVE_INTTYPES_H +| # include +| #endif +| #ifdef HAVE_STDINT_H +| # include +| #endif +| #ifdef HAVE_UNISTD_H +| # include +| #endif +| typedef __int64 ac__type_new_; +| int +| main () +| { +| if ((ac__type_new_ *) 0) +| return 0; +| if (sizeof (ac__type_new_)) +| return 0; +| ; +| return 0; +| } +configure:5889: result: no +configure:5896: checking size of __int64 +configure:6198: gcc -o conftest conftest.c >&5 +conftest.c:56: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'ac__type_sizeof_' +conftest.c: In function 'longval': +conftest.c:57: error: 'ac__type_sizeof_' undeclared (first use in this function) +conftest.c:57: error: (Each undeclared identifier is reported only once +conftest.c:57: error: for each function it appears in.) +conftest.c: In function 'ulongval': +conftest.c:58: error: 'ac__type_sizeof_' undeclared (first use in this function) +conftest.c: In function 'main': +conftest.c:68: error: 'ac__type_sizeof_' undeclared (first use in this function) +configure:6201: $? = 1 +configure: program exited with status 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| #define STDC_HEADERS 1 +| #define HAVE_SYS_TYPES_H 1 +| #define HAVE_SYS_STAT_H 1 +| #define HAVE_STDLIB_H 1 +| #define HAVE_STRING_H 1 +| #define HAVE_MEMORY_H 1 +| #define HAVE_STRINGS_H 1 +| #define HAVE_INTTYPES_H 1 +| #define HAVE_STDINT_H 1 +| #define HAVE_UNISTD_H 1 +| #define SIZEOF_CHAR 1 +| #define SIZEOF_SHORT 2 +| #define SIZEOF_INT 4 +| #define SIZEOF_LONG 4 +| #define SIZEOF_LONG_LONG 8 +| /* end confdefs.h. */ +| #include +| #ifdef HAVE_SYS_TYPES_H +| # include +| #endif +| #ifdef HAVE_SYS_STAT_H +| # include +| #endif +| #ifdef STDC_HEADERS +| # include +| # include +| #else +| # ifdef HAVE_STDLIB_H +| # include +| # endif +| #endif +| #ifdef HAVE_STRING_H +| # if !defined STDC_HEADERS && defined HAVE_MEMORY_H +| # include +| # endif +| # include +| #endif +| #ifdef HAVE_STRINGS_H +| # include +| #endif +| #ifdef HAVE_INTTYPES_H +| # include +| #endif +| #ifdef HAVE_STDINT_H +| # include +| #endif +| #ifdef HAVE_UNISTD_H +| # include +| #endif +| typedef __int64 ac__type_sizeof_; +| static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +| static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +| #include +| #include +| int +| main () +| { +| +| FILE *f = fopen ("conftest.val", "w"); +| if (! f) +| return 1; +| if (((long int) (sizeof (ac__type_sizeof_))) < 0) +| { +| long int i = longval (); +| if (i != ((long int) (sizeof (ac__type_sizeof_)))) +| return 1; +| fprintf (f, "%ld\n", i); +| } +| else +| { +| unsigned long int i = ulongval (); +| if (i != ((long int) (sizeof (ac__type_sizeof_)))) +| return 1; +| fprintf (f, "%lu\n", i); +| } +| return ferror (f) || fclose (f) != 0; +| +| ; +| return 0; +| } +configure:6233: result: 0 +configure:6243: checking for void * +configure:6273: gcc -c conftest.c >&5 +configure:6279: $? = 0 +configure:6294: result: yes +configure:6301: checking size of void * +configure:6603: gcc -o conftest conftest.c >&5 +configure:6606: $? = 0 +configure:6612: ./conftest +configure:6615: $? = 0 +configure:6638: result: 4 +configure:6654: checking whether gcc needs -traditional +configure:6696: result: no +configure:6707: checking for vprintf +configure:6763: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +conftest.c:48: warning: conflicting types for built-in function 'vprintf' +configure:6769: $? = 0 +configure:6787: result: yes +configure:6794: checking for _doprnt +configure:6850: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +/tmp/cckuCfkd.o: In function `main': +conftest.c:(.text+0x12): undefined reference to `_doprnt' +collect2: ld returned 1 exit status +configure:6856: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| #define STDC_HEADERS 1 +| #define HAVE_SYS_TYPES_H 1 +| #define HAVE_SYS_STAT_H 1 +| #define HAVE_STDLIB_H 1 +| #define HAVE_STRING_H 1 +| #define HAVE_MEMORY_H 1 +| #define HAVE_STRINGS_H 1 +| #define HAVE_INTTYPES_H 1 +| #define HAVE_STDINT_H 1 +| #define HAVE_UNISTD_H 1 +| #define SIZEOF_CHAR 1 +| #define SIZEOF_SHORT 2 +| #define SIZEOF_INT 4 +| #define SIZEOF_LONG 4 +| #define SIZEOF_LONG_LONG 8 +| #define SIZEOF___INT64 0 +| #define SIZEOF_VOID_P 4 +| #define HAVE_VPRINTF 1 +| /* end confdefs.h. */ +| /* Define _doprnt to an innocuous variant, in case declares _doprnt. +| For example, HP-UX 11i declares gettimeofday. */ +| #define _doprnt innocuous__doprnt +| +| /* System header to define __stub macros and hopefully few prototypes, +| which can conflict with char _doprnt (); below. +| Prefer to if __STDC__ is defined, since +| exists even on freestanding compilers. */ +| +| #ifdef __STDC__ +| # include +| #else +| # include +| #endif +| +| #undef _doprnt +| +| /* Override any GCC internal prototype to avoid an error. +| Use char because int might match the return type of a GCC +| builtin and then its argument prototype would still apply. */ +| #ifdef __cplusplus +| extern "C" +| #endif +| char _doprnt (); +| /* The GNU C library defines this for functions which it implements +| to always fail with ENOSYS. Some functions are actually named +| something starting with __ and the normal name is an alias. */ +| #if defined __stub__doprnt || defined __stub____doprnt +| choke me +| #endif +| +| int +| main () +| { +| return _doprnt (); +| ; +| return 0; +| } +configure:6873: result: no +configure:6894: checking for strdup +configure:6950: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +conftest.c:49: warning: conflicting types for built-in function 'strdup' +configure:6956: $? = 0 +configure:6974: result: yes +configure:6894: checking for strcasecmp +configure:6950: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +conftest.c:50: warning: conflicting types for built-in function 'strcasecmp' +configure:6956: $? = 0 +configure:6974: result: yes +configure:6894: checking for strcmpi +configure:6950: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +/tmp/ccO0NzIU.o: In function `main': +conftest.c:(.text+0x12): undefined reference to `strcmpi' +collect2: ld returned 1 exit status +configure:6956: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| #define STDC_HEADERS 1 +| #define HAVE_SYS_TYPES_H 1 +| #define HAVE_SYS_STAT_H 1 +| #define HAVE_STDLIB_H 1 +| #define HAVE_STRING_H 1 +| #define HAVE_MEMORY_H 1 +| #define HAVE_STRINGS_H 1 +| #define HAVE_INTTYPES_H 1 +| #define HAVE_STDINT_H 1 +| #define HAVE_UNISTD_H 1 +| #define SIZEOF_CHAR 1 +| #define SIZEOF_SHORT 2 +| #define SIZEOF_INT 4 +| #define SIZEOF_LONG 4 +| #define SIZEOF_LONG_LONG 8 +| #define SIZEOF___INT64 0 +| #define SIZEOF_VOID_P 4 +| #define HAVE_VPRINTF 1 +| #define HAVE_STRDUP 1 +| #define HAVE_STRCASECMP 1 +| /* end confdefs.h. */ +| /* Define strcmpi to an innocuous variant, in case declares strcmpi. +| For example, HP-UX 11i declares gettimeofday. */ +| #define strcmpi innocuous_strcmpi +| +| /* System header to define __stub macros and hopefully few prototypes, +| which can conflict with char strcmpi (); below. +| Prefer to if __STDC__ is defined, since +| exists even on freestanding compilers. */ +| +| #ifdef __STDC__ +| # include +| #else +| # include +| #endif +| +| #undef strcmpi +| +| /* Override any GCC internal prototype to avoid an error. +| Use char because int might match the return type of a GCC +| builtin and then its argument prototype would still apply. */ +| #ifdef __cplusplus +| extern "C" +| #endif +| char strcmpi (); +| /* The GNU C library defines this for functions which it implements +| to always fail with ENOSYS. Some functions are actually named +| something starting with __ and the normal name is an alias. */ +| #if defined __stub_strcmpi || defined __stub___strcmpi +| choke me +| #endif +| +| int +| main () +| { +| return strcmpi (); +| ; +| return 0; +| } +configure:6974: result: no +configure:6894: checking for stricmp +configure:6950: gcc -o conftest -Wall -W -Wno-unused conftest.c >&5 +/tmp/cc8z7A04.o: In function `main': +conftest.c:(.text+0x12): undefined reference to `stricmp' +collect2: ld returned 1 exit status +configure:6956: $? = 1 +configure: failed program was: +| /* confdefs.h. */ +| #define PACKAGE_NAME "" +| #define PACKAGE_TARNAME "" +| #define PACKAGE_VERSION "" +| #define PACKAGE_STRING "" +| #define PACKAGE_BUGREPORT "" +| #define STDC_HEADERS 1 +| #define HAVE_SYS_TYPES_H 1 +| #define HAVE_SYS_STAT_H 1 +| #define HAVE_STDLIB_H 1 +| #define HAVE_STRING_H 1 +| #define HAVE_MEMORY_H 1 +| #define HAVE_STRINGS_H 1 +| #define HAVE_INTTYPES_H 1 +| #define HAVE_STDINT_H 1 +| #define HAVE_UNISTD_H 1 +| #define SIZEOF_CHAR 1 +| #define SIZEOF_SHORT 2 +| #define SIZEOF_INT 4 +| #define SIZEOF_LONG 4 +| #define SIZEOF_LONG_LONG 8 +| #define SIZEOF___INT64 0 +| #define SIZEOF_VOID_P 4 +| #define HAVE_VPRINTF 1 +| #define HAVE_STRDUP 1 +| #define HAVE_STRCASECMP 1 +| /* end confdefs.h. */ +| /* Define stricmp to an innocuous variant, in case declares stricmp. +| For example, HP-UX 11i declares gettimeofday. */ +| #define stricmp innocuous_stricmp +| +| /* System header to define __stub macros and hopefully few prototypes, +| which can conflict with char stricmp (); below. +| Prefer to if __STDC__ is defined, since +| exists even on freestanding compilers. */ +| +| #ifdef __STDC__ +| # include +| #else +| # include +| #endif +| +| #undef stricmp +| +| /* Override any GCC internal prototype to avoid an error. +| Use char because int might match the return type of a GCC +| builtin and then its argument prototype would still apply. */ +| #ifdef __cplusplus +| extern "C" +| #endif +| char stricmp (); +| /* The GNU C library defines this for functions which it implements +| to always fail with ENOSYS. Some functions are actually named +| something starting with __ and the normal name is an alias. */ +| #if defined __stub_stricmp || defined __stub___stricmp +| choke me +| #endif +| +| int +| main () +| { +| return stricmp (); +| ; +| return 0; +| } +configure:6974: result: no +configure:7104: creating ./config.status + +## ---------------------- ## +## Running config.status. ## +## ---------------------- ## + +This file was extended by config.status, which was +generated by GNU Autoconf 2.61. Invocation command line was + + CONFIG_FILES = + CONFIG_HEADERS = + CONFIG_LINKS = + CONFIG_COMMANDS = + $ ./config.status + +on lska2 + +config.status:7811: creating Makefile +config.status:7811: creating sysconfig.h +config.status:8086: sysconfig.h is unchanged +config.status:8103: linking ./../missing.c to missing.c +config.status:8103: linking ./../writelog.c to writelog.c +config.status:8103: linking ./../readcpu.c to readcpu.c +config.status:8103: linking ./../build68k.c to build68k.c +config.status:8103: linking ./../gencpu.c to gencpu.c +config.status:8103: linking ./../gencomp.c to gencomp.c +config.status:8103: linking ./../genblitter.c to genblitter.c +config.status:8103: linking ./../blitops.c to blitops.c +config.status:8103: linking ./../genlinetoscr.c to genlinetoscr.c + +## ---------------- ## +## Cache variables. ## +## ---------------- ## + +ac_cv_build='i686-pc-linux-gnu' +ac_cv_c_compiler_gnu='yes' +ac_cv_c_const='yes' +ac_cv_c_inline='inline' +ac_cv_env_CC_set='set' +ac_cv_env_CC_value='' +ac_cv_env_CFLAGS_set='set' +ac_cv_env_CFLAGS_value='' +ac_cv_env_CPPFLAGS_set='' +ac_cv_env_CPPFLAGS_value='' +ac_cv_env_CPP_set='' +ac_cv_env_CPP_value='' +ac_cv_env_LDFLAGS_set='set' +ac_cv_env_LDFLAGS_value='' +ac_cv_env_LIBS_set='set' +ac_cv_env_LIBS_value='' +ac_cv_env_build_alias_set='' +ac_cv_env_build_alias_value='' +ac_cv_env_host_alias_set='set' +ac_cv_env_host_alias_value='i686-pc-linux-gnu' +ac_cv_env_target_alias_set='set' +ac_cv_env_target_alias_value='powerpc-gekko-elf' +ac_cv_func__doprnt='no' +ac_cv_func_strcasecmp='yes' +ac_cv_func_strcmpi='no' +ac_cv_func_strdup='yes' +ac_cv_func_stricmp='no' +ac_cv_func_vprintf='yes' +ac_cv_header_inttypes_h='yes' +ac_cv_header_memory_h='yes' +ac_cv_header_stdc='yes' +ac_cv_header_stdint_h='yes' +ac_cv_header_stdlib_h='yes' +ac_cv_header_string_h='yes' +ac_cv_header_strings_h='yes' +ac_cv_header_sys_stat_h='yes' +ac_cv_header_sys_types_h='yes' +ac_cv_header_unistd_h='yes' +ac_cv_host='i686-pc-linux-gnu' +ac_cv_objext='o' +ac_cv_path_EGREP='/bin/grep -E' +ac_cv_path_GREP='/bin/grep' +ac_cv_path_install='/usr/bin/install -c' +ac_cv_prog_CPP='gcc -E' +ac_cv_prog_ac_ct_CC='gcc' +ac_cv_prog_cc_c89='' +ac_cv_prog_cc_g='yes' +ac_cv_prog_gcc_traditional='no' +ac_cv_prog_make_make_set='yes' +ac_cv_search_strerror='none required' +ac_cv_sizeof___int64='0' +ac_cv_sizeof_char='1' +ac_cv_sizeof_int='4' +ac_cv_sizeof_long='4' +ac_cv_sizeof_long_long='8' +ac_cv_sizeof_short='2' +ac_cv_sizeof_void_p='4' +ac_cv_target='powerpc-gekko-elf' +ac_cv_type___int64='no' +ac_cv_type_char='yes' +ac_cv_type_int='yes' +ac_cv_type_long='yes' +ac_cv_type_long_long='yes' +ac_cv_type_short='yes' +ac_cv_type_void_p='yes' + +## ----------------- ## +## Output variables. ## +## ----------------- ## + +CC='gcc' +CFLAGS=' -Wall -W -Wno-unused' +CPP='gcc -E' +CPPFLAGS='' +DEFS='-DHAVE_CONFIG_H' +ECHO_C='' +ECHO_N='-n' +ECHO_T='' +EGREP='/bin/grep -E' +EXEEXT='' +GREP='/bin/grep' +INSTALL_DATA='${INSTALL} -m 644' +INSTALL_PROGRAM='${INSTALL}' +INSTALL_SCRIPT='${INSTALL}' +LDFLAGS='' +LIBOBJS='' +LIBS='' +LTLIBOBJS='' +OBJEXT='o' +PACKAGE_BUGREPORT='' +PACKAGE_NAME='' +PACKAGE_STRING='' +PACKAGE_TARNAME='' +PACKAGE_VERSION='' +PATH_SEPARATOR=':' +SET_MAKE='' +SHELL='/bin/bash' +ac_ct_CC='gcc' +ac_cv_c_inline='inline' +bindir='${exec_prefix}/bin' +build='i686-pc-linux-gnu' +build_alias='' +build_cpu='i686' +build_os='linux-gnu' +build_vendor='pc' +datadir='${datarootdir}' +datarootdir='${prefix}/share' +docdir='${datarootdir}/doc/${PACKAGE}' +dvidir='${docdir}' +exec_prefix='${prefix}' +host='i686-pc-linux-gnu' +host_alias='i686-pc-linux-gnu' +host_cpu='i686' +host_os='linux-gnu' +host_vendor='pc' +htmldir='${docdir}' +includedir='${prefix}/include' +infodir='${datarootdir}/info' +libdir='${exec_prefix}/lib' +libexecdir='${exec_prefix}/libexec' +localedir='${datarootdir}/locale' +localstatedir='${prefix}/var' +mandir='${datarootdir}/man' +oldincludedir='/usr/include' +pdfdir='${docdir}' +prefix='/usr/local' +program_transform_name='s,x,x,' +psdir='${docdir}' +sbindir='${exec_prefix}/sbin' +sharedstatedir='${prefix}/com' +sysconfdir='${prefix}/etc' +target='powerpc-gekko-elf' +target_alias='powerpc-gekko-elf' +target_cpu='powerpc' +target_os='elf' +target_vendor='gekko' +top_srcdir='' + +## ----------- ## +## confdefs.h. ## +## ----------- ## + +#define PACKAGE_NAME "" +#define PACKAGE_TARNAME "" +#define PACKAGE_VERSION "" +#define PACKAGE_STRING "" +#define PACKAGE_BUGREPORT "" +#define STDC_HEADERS 1 +#define HAVE_SYS_TYPES_H 1 +#define HAVE_SYS_STAT_H 1 +#define HAVE_STDLIB_H 1 +#define HAVE_STRING_H 1 +#define HAVE_MEMORY_H 1 +#define HAVE_STRINGS_H 1 +#define HAVE_INTTYPES_H 1 +#define HAVE_STDINT_H 1 +#define HAVE_UNISTD_H 1 +#define SIZEOF_CHAR 1 +#define SIZEOF_SHORT 2 +#define SIZEOF_INT 4 +#define SIZEOF_LONG 4 +#define SIZEOF_LONG_LONG 8 +#define SIZEOF___INT64 0 +#define SIZEOF_VOID_P 4 +#define HAVE_VPRINTF 1 +#define HAVE_STRDUP 1 +#define HAVE_STRCASECMP 1 + +configure: exit 0 diff --git a/src/tools/config.status b/src/tools/config.status new file mode 100755 index 0000000..847c823 --- /dev/null +++ b/src/tools/config.status @@ -0,0 +1,897 @@ +#! /bin/bash +# Generated by configure. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=${CONFIG_SHELL-/bin/bash} +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + + + as_lineno_1=7266 + as_lineno_2=7267 + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with 7271 + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using 7273; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing 7275, and appends + # trailing '-' during substitution so that 7276 is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. McMahon (1931-1989) for sed's syntax. :-) + sed -n ' + p + /[$]LINENO/= + ' <$as_myself | + sed ' + s/[$]LINENO.*/&-/ + t lineno + b + :lineno + N + :loop + s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/ + t loop + s/-\n.*// + ' >$as_me.lineno && + chmod +x "$as_me.lineno" || + { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2 + { (exit 1); exit 1; }; } + + # Don't try to exec as it changes $[0], causing all sort of problems + # (the dirname of $[0] is not the place where we might find the + # original and so on. Autoconf is especially sensitive to this). + . "./$as_me.lineno" + # Exit status is that of the last command. + exit +} + + +if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then + as_dirname=dirname +else + as_dirname=false +fi + +ECHO_C= ECHO_N= ECHO_T= +case `echo -n x` in +-n*) + case `echo 'x\c'` in + *c*) ECHO_T=' ';; # ECHO_T is single tab character. + *) ECHO_C='\c';; + esac;; +*) + ECHO_N='-n';; +esac + +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +rm -f conf$$ conf$$.exe conf$$.file +if test -d conf$$.dir; then + rm -f conf$$.dir/conf$$.file +else + rm -f conf$$.dir + mkdir conf$$.dir +fi +echo >conf$$.file +if ln -s conf$$.file conf$$ 2>/dev/null; then + as_ln_s='ln -s' + # ... but there are two gotchas: + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -p'. + ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || + as_ln_s='cp -p' +elif ln conf$$.file conf$$ 2>/dev/null; then + as_ln_s=ln +else + as_ln_s='cp -p' +fi +rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file +rmdir conf$$.dir 2>/dev/null + +if mkdir -p . 2>/dev/null; then + as_mkdir_p=: +else + test -d ./-p && rmdir ./-p + as_mkdir_p=false +fi + +if test -x / >/dev/null 2>&1; then + as_test_x='test -x' +else + if ls -dL / >/dev/null 2>&1; then + as_ls_L_option=L + else + as_ls_L_option= + fi + as_test_x=' + eval sh -c '\'' + if test -d "$1"; then + test -d "$1/."; + else + case $1 in + -*)set "./$1";; + esac; + case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in + ???[sx]*):;;*)false;;esac;fi + '\'' sh + ' +fi +as_executable_p=$as_test_x + +# Sed expression to map a string onto a valid CPP name. +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" + +# Sed expression to map a string onto a valid variable name. +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" + + +exec 6>&1 + +# Save the log message, to keep $[0] and so on meaningful, and to +# report actual input values of CONFIG_FILES etc. instead of their +# values after options handling. +ac_log=" +This file was extended by $as_me, which was +generated by GNU Autoconf 2.61. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +# Files that config.status was made for. +config_files=" Makefile" +config_headers=" sysconfig.h" +config_links=" missing.c:../missing.c writelog.c:../writelog.c readcpu.c:../readcpu.c build68k.c:../build68k.c gencpu.c:../gencpu.c gencomp.c:../gencomp.c genblitter.c:../genblitter.c blitops.c:../blitops.c genlinetoscr.c:../genlinetoscr.c" + +ac_cs_usage="\ +\`$as_me' instantiates files from templates according to the +current configuration. + +Usage: $0 [OPTIONS] [FILE]... + + -h, --help print this help, then exit + -V, --version print version number and configuration settings, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + --header=FILE[:TEMPLATE] + instantiate the configuration header FILE + +Configuration files: +$config_files + +Configuration headers: +$config_headers + +Configuration links: +$config_links + +Report bugs to ." + +ac_cs_version="\ +config.status +configured by ../.././src/tools/configure, generated by GNU Autoconf 2.61, + with options \"'--cache-file=/dev/null' '--host=i686-pc-linux-gnu' '--target=powerpc-gekko-elf' 'host_alias=i686-pc-linux-gnu' 'target_alias=powerpc-gekko-elf' 'CC=' 'CFLAGS=' 'LDFLAGS=' 'LIBS='\" + +Copyright (C) 2006 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='/home/ska/projects/wii/uae-wii/trunk/src/tools' +srcdir='.' +INSTALL='/usr/bin/install -c' +# If no file are specified by the user, then we need to provide default +# value. By we need to know if files were specified by the user. +ac_need_defaults=: +while test $# != 0 +do + case $1 in + --*=*) + ac_option=`expr "X$1" : 'X\([^=]*\)='` + ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'` + ac_shift=: + ;; + *) + ac_option=$1 + ac_optarg=$2 + ac_shift=shift + ;; + esac + + case $ac_option in + # Handling of the options. + -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) + ac_cs_recheck=: ;; + --version | --versio | --versi | --vers | --ver | --ve | --v | -V ) + echo "$ac_cs_version"; exit ;; + --debug | --debu | --deb | --de | --d | -d ) + debug=: ;; + --file | --fil | --fi | --f ) + $ac_shift + CONFIG_FILES="$CONFIG_FILES $ac_optarg" + ac_need_defaults=false;; + --header | --heade | --head | --hea ) + $ac_shift + CONFIG_HEADERS="$CONFIG_HEADERS $ac_optarg" + ac_need_defaults=false;; + --he | --h) + # Conflict between --help and --header + { echo "$as_me: error: ambiguous option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; };; + --help | --hel | -h ) + echo "$ac_cs_usage"; exit ;; + -q | -quiet | --quiet | --quie | --qui | --qu | --q \ + | -silent | --silent | --silen | --sile | --sil | --si | --s) + ac_cs_silent=: ;; + + # This is an error. + -*) { echo "$as_me: error: unrecognized option: $1 +Try \`$0 --help' for more information." >&2 + { (exit 1); exit 1; }; } ;; + + *) ac_config_targets="$ac_config_targets $1" + ac_need_defaults=false ;; + + esac + shift +done + +ac_configure_extra_args= + +if $ac_cs_silent; then + exec 6>/dev/null + ac_configure_extra_args="$ac_configure_extra_args --silent" +fi + +if $ac_cs_recheck; then + echo "running CONFIG_SHELL=/bin/bash /bin/bash ../.././src/tools/configure " '--cache-file=/dev/null' '--host=i686-pc-linux-gnu' '--target=powerpc-gekko-elf' 'host_alias=i686-pc-linux-gnu' 'target_alias=powerpc-gekko-elf' 'CC=' 'CFLAGS=' 'LDFLAGS=' 'LIBS=' $ac_configure_extra_args " --no-create --no-recursion" >&6 + CONFIG_SHELL=/bin/bash + export CONFIG_SHELL + exec /bin/bash "../.././src/tools/configure" '--cache-file=/dev/null' '--host=i686-pc-linux-gnu' '--target=powerpc-gekko-elf' 'host_alias=i686-pc-linux-gnu' 'target_alias=powerpc-gekko-elf' 'CC=' 'CFLAGS=' 'LDFLAGS=' 'LIBS=' $ac_configure_extra_args --no-create --no-recursion +fi + +exec 5>>config.log +{ + echo + sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX +## Running $as_me. ## +_ASBOX + echo "$ac_log" +} >&5 + + +# Handling of arguments. +for ac_config_target in $ac_config_targets +do + case $ac_config_target in + "sysconfig.h") CONFIG_HEADERS="$CONFIG_HEADERS sysconfig.h" ;; + "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; + "missing.c") CONFIG_LINKS="$CONFIG_LINKS missing.c:../missing.c" ;; + "writelog.c") CONFIG_LINKS="$CONFIG_LINKS writelog.c:../writelog.c" ;; + "readcpu.c") CONFIG_LINKS="$CONFIG_LINKS readcpu.c:../readcpu.c" ;; + "build68k.c") CONFIG_LINKS="$CONFIG_LINKS build68k.c:../build68k.c" ;; + "gencpu.c") CONFIG_LINKS="$CONFIG_LINKS gencpu.c:../gencpu.c" ;; + "gencomp.c") CONFIG_LINKS="$CONFIG_LINKS gencomp.c:../gencomp.c" ;; + "genblitter.c") CONFIG_LINKS="$CONFIG_LINKS genblitter.c:../genblitter.c" ;; + "blitops.c") CONFIG_LINKS="$CONFIG_LINKS blitops.c:../blitops.c" ;; + "genlinetoscr.c") CONFIG_LINKS="$CONFIG_LINKS genlinetoscr.c:../genlinetoscr.c" ;; + + *) { { echo "$as_me:7573: error: invalid argument: $ac_config_target" >&5 +echo "$as_me: error: invalid argument: $ac_config_target" >&2;} + { (exit 1); exit 1; }; };; + esac +done + + +# If the user did not use the arguments to specify the items to instantiate, +# then the envvar interface is used. Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_LINKS+set}" = set || CONFIG_LINKS=$config_links +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + echo "$me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# +# Set up the sed scripts for CONFIG_FILES section. +# + +# No need to generate the scripts if there are no CONFIG_FILES. +# This happens for instance when ./config.status config.h +if test -n "$CONFIG_FILES"; then + +cat >"$tmp/subs-1.sed" <<\CEOF +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b end +s,@SHELL@,|#_!!_#|/bin/bash,g +s,@PATH_SEPARATOR@,|#_!!_#|:,g +s,@PACKAGE_NAME@,|#_!!_#|,g +s,@PACKAGE_TARNAME@,|#_!!_#|,g +s,@PACKAGE_VERSION@,|#_!!_#|,g +s,@PACKAGE_STRING@,|#_!!_#|,g +s,@PACKAGE_BUGREPORT@,|#_!!_#|,g +s,@exec_prefix@,|#_!!_#|${prefix},g +s,@prefix@,|#_!!_#|/usr/local,g +s,@program_transform_name@,|#_!!_#|s\,x\,x\,,g +s,@bindir@,|#_!!_#|${exec_prefix}/bin,g +s,@sbindir@,|#_!!_#|${exec_prefix}/sbin,g +s,@libexecdir@,|#_!!_#|${exec_prefix}/libexec,g +s,@datarootdir@,|#_!!_#|${prefix}/share,g +s,@datadir@,|#_!!_#|${datarootdir},g +s,@sysconfdir@,|#_!!_#|${prefix}/etc,g +s,@sharedstatedir@,|#_!!_#|${prefix}/com,g +s,@localstatedir@,|#_!!_#|${prefix}/var,g +s,@includedir@,|#_!!_#|${prefix}/include,g +s,@oldincludedir@,|#_!!_#|/usr/include,g +s,@docdir@,|#_!!_#|${datarootdir}/doc/${PACKAGE},g +s,@infodir@,|#_!!_#|${datarootdir}/info,g +s,@htmldir@,|#_!!_#|${docdir},g +s,@dvidir@,|#_!!_#|${docdir},g +s,@pdfdir@,|#_!!_#|${docdir},g +s,@psdir@,|#_!!_#|${docdir},g +s,@libdir@,|#_!!_#|${exec_prefix}/lib,g +s,@localedir@,|#_!!_#|${datarootdir}/locale,g +s,@mandir@,|#_!!_#|${datarootdir}/man,g +s,@DEFS@,|#_!!_#|-DHAVE_CONFIG_H,g +s,@ECHO_C@,|#_!!_#|,g +s,@ECHO_N@,|#_!!_#|-n,g +s,@ECHO_T@,|#_!!_#|,g +s,@LIBS@,|#_!!_#|,g +s,@build_alias@,|#_!!_#|,g +s,@host_alias@,|#_!!_#|i686-pc-linux-gnu,g +s,@target_alias@,|#_!!_#|powerpc-gekko-elf,g +s,@build@,|#_!!_#|i686-pc-linux-gnu,g +s,@build_cpu@,|#_!!_#|i686,g +s,@build_vendor@,|#_!!_#|pc,g +s,@build_os@,|#_!!_#|linux-gnu,g +s,@host@,|#_!!_#|i686-pc-linux-gnu,g +s,@host_cpu@,|#_!!_#|i686,g +s,@host_vendor@,|#_!!_#|pc,g +s,@host_os@,|#_!!_#|linux-gnu,g +s,@target@,|#_!!_#|powerpc-gekko-elf,g +s,@target_cpu@,|#_!!_#|powerpc,g +s,@target_vendor@,|#_!!_#|gekko,g +s,@target_os@,|#_!!_#|elf,g +s,@CC@,|#_!!_#|gcc,g +s,@CFLAGS@,|#_!!_#| -Wall -W -Wno-unused,g +s,@LDFLAGS@,|#_!!_#|,g +s,@CPPFLAGS@,|#_!!_#|,g +s,@ac_ct_CC@,|#_!!_#|gcc,g +s,@EXEEXT@,|#_!!_#|,g +s,@OBJEXT@,|#_!!_#|o,g +s,@CPP@,|#_!!_#|gcc -E,g +s,@SET_MAKE@,|#_!!_#|,g +s,@INSTALL_PROGRAM@,|#_!!_#|${INSTALL},g +s,@INSTALL_SCRIPT@,|#_!!_#|${INSTALL},g +s,@INSTALL_DATA@,|#_!!_#|${INSTALL} -m 644,g +s,@GREP@,|#_!!_#|/bin/grep,g +s,@EGREP@,|#_!!_#|/bin/grep -E,g +s,@ac_cv_c_inline@,|#_!!_#|inline,g +s,@top_srcdir@,|#_!!_#|,g +s,@LIBOBJS@,|#_!!_#|,g +s,@LTLIBOBJS@,|#_!!_#|,g +:end +s/|#_!!_#|//g +CEOF +fi # test -n "$CONFIG_FILES" + + +for ac_tag in :F $CONFIG_FILES :H $CONFIG_HEADERS :L $CONFIG_LINKS +do + case $ac_tag in + :[FHLC]) ac_mode=$ac_tag; continue;; + esac + case $ac_mode$ac_tag in + :[FHL]*:*);; + :L* | :C*:*) { { echo "$as_me:7767: error: Invalid tag $ac_tag." >&5 +echo "$as_me: error: Invalid tag $ac_tag." >&2;} + { (exit 1); exit 1; }; };; + :[FH]-) ac_tag=-:-;; + :[FH]*) ac_tag=$ac_tag:$ac_tag.in;; + esac + ac_save_IFS=$IFS + IFS=: + set x $ac_tag + IFS=$ac_save_IFS + shift + ac_file=$1 + shift + + case $ac_mode in + :L) ac_source=$1;; + :[FH]) + ac_file_inputs= + for ac_f + do + case $ac_f in + -) ac_f="$tmp/stdin";; + *) # Look for the file first in the build tree, then in the source tree + # (if the path is not absolute). The absolute path cannot be DOS-style, + # because $ac_f cannot contain `:'. + test -f "$ac_f" || + case $ac_f in + [\\/$]*) false;; + *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";; + esac || + { { echo "$as_me:7797: error: cannot find input file: $ac_f" >&5 +echo "$as_me: error: cannot find input file: $ac_f" >&2;} + { (exit 1); exit 1; }; };; + esac + ac_file_inputs="$ac_file_inputs $ac_f" + done + + # Let's still pretend it is `configure' which instantiates (i.e., don't + # use $as_me), people would be surprised to read: + # /* config.h. Generated by config.status. */ + configure_input="Generated from "`IFS=: + echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure." + if test x"$ac_file" != x-; then + configure_input="$ac_file. $configure_input" + { echo "$as_me:7811: creating $ac_file" >&5 +echo "$as_me: creating $ac_file" >&6;} + fi + + case $ac_tag in + *:-:* | *:-) cat >"$tmp/stdin";; + esac + ;; + esac + + ac_dir=`$as_dirname -- "$ac_file" || +$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$ac_file" : 'X\(//\)[^/]' \| \ + X"$ac_file" : 'X\(//\)$' \| \ + X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || +echo X"$ac_file" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + { as_dir="$ac_dir" + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || { { echo "$as_me:7882: error: cannot create directory $as_dir" >&5 +echo "$as_me: error: cannot create directory $as_dir" >&2;} + { (exit 1); exit 1; }; }; } + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + + case $ac_mode in + :F) + # + # CONFIG_FILE + # + + case $INSTALL in + [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;; + *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;; + esac +# If the template does not know about datarootdir, expand it. +# FIXME: This hack should be removed a few years after 2.60. +ac_datarootdir_hack=; ac_datarootdir_seen= + +case `sed -n '/datarootdir/ { + p + q +} +/@datadir@/p +/@docdir@/p +/@infodir@/p +/@localedir@/p +/@mandir@/p +' $ac_file_inputs` in +*datarootdir*) ac_datarootdir_seen=yes;; +*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) + { echo "$as_me:7949: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 +echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} + ac_datarootdir_hack=' + s&@datadir@&${datarootdir}&g + s&@docdir@&${datarootdir}/doc/${PACKAGE}&g + s&@infodir@&${datarootdir}/info&g + s&@localedir@&${datarootdir}/locale&g + s&@mandir@&${datarootdir}/man&g + s&\${datarootdir}&${prefix}/share&g' ;; +esac + sed "/^[ ]*VPATH[ ]*=/{ +s/:*\$(srcdir):*/:/ +s/:*\${srcdir}:*/:/ +s/:*@srcdir@:*/:/ +s/^\([^=]*=[ ]*\):*/\1/ +s/:*$// +s/^[^=]*=[ ]*$// +} + +:t +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b +s&@configure_input@&$configure_input&;t t +s&@top_builddir@&$ac_top_builddir_sub&;t t +s&@srcdir@&$ac_srcdir&;t t +s&@abs_srcdir@&$ac_abs_srcdir&;t t +s&@top_srcdir@&$ac_top_srcdir&;t t +s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t +s&@builddir@&$ac_builddir&;t t +s&@abs_builddir@&$ac_abs_builddir&;t t +s&@abs_top_builddir@&$ac_abs_top_builddir&;t t +s&@INSTALL@&$ac_INSTALL&;t t +$ac_datarootdir_hack +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" >$tmp/out + +test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && + { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && + { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } && + { echo "$as_me:7989: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # + # First, check the format of the line: + cat >"$tmp/defines.sed" <<\CEOF +/^[ ]*#[ ]*undef[ ][ ]*[_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ][_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789]*[ ]*$/b def +/^[ ]*#[ ]*define[ ][ ]*[_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ][_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789]*[( ]/b def +b +:def +s/$/ / +s,^\([ #]*\)[^ ]*\([ ]*PACKAGE_NAME\)[ (].*,\1define\2 "" , +s,^\([ #]*\)[^ ]*\([ ]*PACKAGE_TARNAME\)[ (].*,\1define\2 "" , +s,^\([ #]*\)[^ ]*\([ ]*PACKAGE_VERSION\)[ (].*,\1define\2 "" , +s,^\([ #]*\)[^ ]*\([ ]*PACKAGE_STRING\)[ (].*,\1define\2 "" , +s,^\([ #]*\)[^ ]*\([ ]*PACKAGE_BUGREPORT\)[ (].*,\1define\2 "" , +s,^\([ #]*\)[^ ]*\([ ]*STDC_HEADERS\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_SYS_TYPES_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_SYS_STAT_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STDLIB_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STRING_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_MEMORY_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STRINGS_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_INTTYPES_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STDINT_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_UNISTD_H\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_CHAR\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_SHORT\)[ (].*,\1define\2 2 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_INT\)[ (].*,\1define\2 4 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_LONG\)[ (].*,\1define\2 4 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_LONG_LONG\)[ (].*,\1define\2 8 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF___INT64\)[ (].*,\1define\2 0 , +s,^\([ #]*\)[^ ]*\([ ]*SIZEOF_VOID_P\)[ (].*,\1define\2 4 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_VPRINTF\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STRDUP\)[ (].*,\1define\2 1 , +s,^\([ #]*\)[^ ]*\([ ]*HAVE_STRCASECMP\)[ (].*,\1define\2 1 , +s/ $// +s,^[ #]*u.*,/* & */, +CEOF + sed -f "$tmp/defines.sed" $ac_file_inputs >"$tmp/out1" +ac_result="$tmp/out1" + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:8086: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + :L) + # + # CONFIG_LINK + # + + { echo "$as_me:8103: linking $srcdir/$ac_source to $ac_file" >&5 +echo "$as_me: linking $srcdir/$ac_source to $ac_file" >&6;} + + if test ! -r "$srcdir/$ac_source"; then + { { echo "$as_me:8107: error: $srcdir/$ac_source: file not found" >&5 +echo "$as_me: error: $srcdir/$ac_source: file not found" >&2;} + { (exit 1); exit 1; }; } + fi + rm -f "$ac_file" + + # Try a relative symlink, then a hard link, then a copy. + case $srcdir in + [\\/$]* | ?:[\\/]* ) ac_rel_source=$srcdir/$ac_source ;; + *) ac_rel_source=$ac_top_build_prefix$srcdir/$ac_source ;; + esac + ln -s "$ac_rel_source" "$ac_file" 2>/dev/null || + ln "$srcdir/$ac_source" "$ac_file" 2>/dev/null || + cp -p "$srcdir/$ac_source" "$ac_file" || + { { echo "$as_me:8121: error: cannot link or copy $srcdir/$ac_source to $ac_file" >&5 +echo "$as_me: error: cannot link or copy $srcdir/$ac_source to $ac_file" >&2;} + { (exit 1); exit 1; }; } + ;; + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } diff --git a/src/tools/configure.lineno b/src/tools/configure.lineno new file mode 100755 index 0000000..4afcf59 --- /dev/null +++ b/src/tools/configure.lineno @@ -0,0 +1,8157 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.61. +# +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, +# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. 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exit 1; }; };; +esac +host=$ac_cv_host +ac_save_IFS=$IFS; IFS='-' +set x $ac_cv_host +shift +host_cpu=$1 +host_vendor=$2 +shift; shift +# Remember, the first character of IFS is used to create $*, +# except with old shells: +host_os=$* +IFS=$ac_save_IFS +case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac + + +{ echo "$as_me:1812: checking target system type" >&5 +echo $ECHO_N "checking target system type... $ECHO_C" >&6; } +if test "${ac_cv_target+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "x$target_alias" = x; then + ac_cv_target=$ac_cv_host +else + ac_cv_target=`$SHELL "$ac_aux_dir/config.sub" $target_alias` || + { { echo "$as_me:1821: error: $SHELL $ac_aux_dir/config.sub $target_alias failed" >&5 +echo "$as_me: error: $SHELL $ac_aux_dir/config.sub $target_alias failed" >&2;} + { (exit 1); exit 1; }; } +fi + +fi +{ echo "$as_me:1827: result: $ac_cv_target" >&5 +echo "${ECHO_T}$ac_cv_target" >&6; } +case $ac_cv_target in +*-*-*) ;; +*) { { echo "$as_me:1831: error: invalid value of canonical target" >&5 +echo "$as_me: error: invalid value of canonical target" >&2;} + { (exit 1); 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} +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + echo "$as_me:1880: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:1891: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:1894: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ echo "$as_me:1904: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="gcc" + echo "$as_me:1920: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:1931: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:1934: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:1943: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ echo "$as_me:1961: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + echo "$as_me:1977: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:1988: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:1991: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ echo "$as_me:2001: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + echo "$as_me:2022: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:2045: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:2048: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ echo "$as_me:2060: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + echo "$as_me:2076: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { echo "$as_me:2087: result: $CC" >&5 +echo "${ECHO_T}$CC" >&6; } +else + { echo "$as_me:2090: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ echo "$as_me:2104: checking for $ac_word" >&5 +echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +if test "${ac_cv_prog_ac_ct_CC+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_ac_ct_CC="$ac_prog" + echo "$as_me:2120: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done +done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { echo "$as_me:2131: result: $ac_ct_CC" >&5 +echo "${ECHO_T}$ac_ct_CC" >&6; } +else + { echo "$as_me:2134: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ echo "$as_me:2147: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&5 +echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools +whose name does not start with the host triplet. If you think this +configuration is useful to you, please write to autoconf@gnu.org." >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { echo "$as_me:2162: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&5 +echo "$as_me: error: no acceptable C compiler found in \$PATH +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + +# Provide some information about the compiler. +echo "$as_me:2169: checking for C compiler version" >&5 +ac_compiler=`set X $ac_compile; echo $2` +{ (ac_try="$ac_compiler --version >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2176: $ac_try_echo\"") >&5 + (eval "$ac_compiler --version >&5") 2>&5 + ac_status=$? + echo "$as_me:2179: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -v >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2186: $ac_try_echo\"") >&5 + (eval "$ac_compiler -v >&5") 2>&5 + ac_status=$? + echo "$as_me:2189: \$? = $ac_status" >&5 + (exit $ac_status); } +{ (ac_try="$ac_compiler -V >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2196: $ac_try_echo\"") >&5 + (eval "$ac_compiler -V >&5") 2>&5 + ac_status=$? + echo "$as_me:2199: \$? = $ac_status" >&5 + (exit $ac_status); } + +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files a.out a.exe b.out" +# Try to create an executable without -o first, disregard a.out. +# It will help us diagnose broken compilers, and finding out an intuition +# of exeext. +{ echo "$as_me:2222: checking for C compiler default output file name" >&5 +echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6; } +ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` +# +# List of possible output files, starting from the most likely. +# The algorithm is not robust to junk in `.', hence go to wildcards (a.*) +# only as a last resort. b.out is created by i960 compilers. +ac_files='a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out' +# +# The IRIX 6 linker writes into existing files which may not be +# executable, retaining their permissions. Remove them first so a +# subsequent execution test works. +ac_rmfiles= +for ac_file in $ac_files +do + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + * ) ac_rmfiles="$ac_rmfiles $ac_file";; + esac +done +rm -f $ac_rmfiles + +if { (ac_try="$ac_link_default" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2249: $ac_try_echo\"") >&5 + (eval "$ac_link_default") 2>&5 + ac_status=$? + echo "$as_me:2252: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' +# in a Makefile. We should not override ac_cv_exeext if it was cached, +# so that the user can short-circuit this test for compilers unknown to +# Autoconf. +for ac_file in $ac_files '' +do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) + ;; + [ab].out ) + # We found the default executable, but exeext='' is most + # certainly right. + break;; + *.* ) + if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; + then :; else + ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + fi + # We set ac_cv_exeext here because the later test for it is not + # safe: cross compilers may not add the suffix if given an `-o' + # argument, so we may need to know it at that point already. + # Even if this section looks crufty: it has the advantage of + # actually working. + break;; + * ) + break;; + esac +done +test "$ac_cv_exeext" = no && ac_cv_exeext= + +else + ac_file='' +fi + +{ echo "$as_me:2290: result: $ac_file" >&5 +echo "${ECHO_T}$ac_file" >&6; } +if test -z "$ac_file"; then + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:2296: error: C compiler cannot create executables +See \`config.log' for more details." >&5 +echo "$as_me: error: C compiler cannot create executables +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } +fi + +ac_exeext=$ac_cv_exeext + +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:2307: checking whether the C compiler works" >&5 +echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6; } +# FIXME: These cross compiler hacks should be removed for Autoconf 3.0 +# If not cross compiling, check that we can run a simple program. +if test "$cross_compiling" != yes; then + if { ac_try='./$ac_file' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2317: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:2320: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + cross_compiling=no + else + if test "$cross_compiling" = maybe; then + cross_compiling=yes + else + { { echo "$as_me:2327: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot run C compiled programs. +If you meant to cross compile, use \`--host'. +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } + fi + fi +fi +{ echo "$as_me:2337: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + +rm -f a.out a.exe conftest$ac_cv_exeext b.out +ac_clean_files=$ac_clean_files_save +# Check that the compiler produces executables we can run. If not, either +# the compiler is broken, or we cross compile. +{ echo "$as_me:2344: checking whether we are cross compiling" >&5 +echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6; } +{ echo "$as_me:2346: result: $cross_compiling" >&5 +echo "${ECHO_T}$cross_compiling" >&6; } + +{ echo "$as_me:2349: checking for suffix of executables" >&5 +echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6; } +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2356: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:2359: \$? = $ac_status" >&5 + (exit $ac_status); }; then + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. +for ac_file in conftest.exe conftest conftest.*; do + test -f "$ac_file" || continue + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;; + *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` + break;; + * ) break;; + esac +done +else + { { echo "$as_me:2375: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of executables: cannot compile and link +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest$ac_cv_exeext +{ echo "$as_me:2383: result: $ac_cv_exeext" >&5 +echo "${ECHO_T}$ac_cv_exeext" >&6; } + +rm -f conftest.$ac_ext +EXEEXT=$ac_cv_exeext +ac_exeext=$EXEEXT +{ echo "$as_me:2389: checking for suffix of object files" >&5 +echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6; } +if test "${ac_cv_objext+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.o conftest.obj +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2415: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>&5 + ac_status=$? + echo "$as_me:2418: \$? = $ac_status" >&5 + (exit $ac_status); }; then + for ac_file in conftest.o conftest.obj conftest.*; do + test -f "$ac_file" || continue; + case $ac_file in + *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf ) ;; + *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'` + break;; + esac +done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +{ { echo "$as_me:2432: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute suffix of object files: cannot compile +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +rm -f conftest.$ac_cv_objext conftest.$ac_ext +fi +{ echo "$as_me:2441: result: $ac_cv_objext" >&5 +echo "${ECHO_T}$ac_cv_objext" >&6; } +OBJEXT=$ac_cv_objext +ac_objext=$OBJEXT +{ echo "$as_me:2445: checking whether we are using the GNU C compiler" >&5 +echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; } +if test "${ac_cv_c_compiler_gnu+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2474: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2480: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_compiler_gnu=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_compiler_gnu=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ echo "$as_me:2497: result: $ac_cv_c_compiler_gnu" >&5 +echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; } +GCC=`test $ac_compiler_gnu = yes && echo yes` +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ echo "$as_me:2502: checking whether $CC accepts -g" >&5 +echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_g+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2532: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2538: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + CFLAGS="" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2570: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2576: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2609: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2615: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_g=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ echo "$as_me:2637: result: $ac_cv_prog_cc_g" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ echo "$as_me:2654: checking for $CC option to accept ISO C89" >&5 +echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; } +if test "${ac_cv_prog_cc_c89+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2728: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2734: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_prog_cc_c89=$ac_arg +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { echo "$as_me:2757: result: none needed" >&5 +echo "${ECHO_T}none needed" >&6; } ;; + xno) + { echo "$as_me:2760: result: unsupported" >&5 +echo "${ECHO_T}unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { echo "$as_me:2764: result: $ac_cv_prog_cc_c89" >&5 +echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;; +esac + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ echo "$as_me:2780: checking how to run the C preprocessor" >&5 +echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if test "${ac_cv_prog_CPP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2820: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2826: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2857: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2863: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ echo "$as_me:2896: result: $CPP" >&5 +echo "${ECHO_T}$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2925: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2931: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + : +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Broken: fails on valid input. +continue +fi + +rm -f conftest.err conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +_ACEOF +if { (ac_try="$ac_cpp conftest.$ac_ext" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:2962: $ac_try_echo\"") >&5 + (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:2968: \$? = $ac_status" >&5 + (exit $ac_status); } >/dev/null && { + test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || + test ! -s conftest.err + }; then + # Broken: success on invalid input. +continue +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + # Passes both tests. +ac_preproc_ok=: +break +fi + +rm -f conftest.err conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.err conftest.$ac_ext +if $ac_preproc_ok; then + : +else + { { echo "$as_me:2992: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&5 +echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +{ echo "$as_me:3005: checking whether ${MAKE-make} sets \$(MAKE)" >&5 +echo $ECHO_N "checking whether ${MAKE-make} sets \$(MAKE)... $ECHO_C" >&6; } +set x ${MAKE-make}; ac_make=`echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` +if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.make <<\_ACEOF +SHELL = /bin/sh +all: + @echo '@@@%%%=$(MAKE)=@@@%%%' +_ACEOF +# GNU make sometimes prints "make[1]: Entering...", which would confuse us. +case `${MAKE-make} -f conftest.make 2>/dev/null` in + *@@@%%%=?*=@@@%%%*) + eval ac_cv_prog_make_${ac_make}_set=yes;; + *) + eval ac_cv_prog_make_${ac_make}_set=no;; +esac +rm -f conftest.make +fi +if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then + { echo "$as_me:3026: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } + SET_MAKE= +else + { echo "$as_me:3030: result: no" >&5 +echo "${ECHO_T}no" >&6; } + SET_MAKE="MAKE=${MAKE-make}" +fi + +# Find a good install program. We prefer a C program (faster), +# so one script is as good as another. But avoid the broken or +# incompatible versions: +# SysV /etc/install, /usr/sbin/install +# SunOS /usr/etc/install +# IRIX /sbin/install +# AIX /bin/install +# AmigaOS /C/install, which installs bootblocks on floppy discs +# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag +# AFS /usr/afsws/bin/install, which mishandles nonexistent args +# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" +# OS/2's system install, which has a completely different semantic +# ./install, which can be erroneously created by make from ./install.sh. +{ echo "$as_me:3048: checking for a BSD-compatible install" >&5 +echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6; } +if test -z "$INSTALL"; then +if test "${ac_cv_path_install+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + # Account for people who put trailing slashes in PATH elements. +case $as_dir/ in + ./ | .// | /cC/* | \ + /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ + ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \ + /usr/ucb/* ) ;; + *) + # OSF1 and SCO ODT 3.0 have their own names for install. + # Don't use installbsd from OSF since it installs stuff as root + # by default. + for ac_prog in ginstall scoinst install; do + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then + if test $ac_prog = install && + grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # AIX install. It has an incompatible calling convention. + : + elif test $ac_prog = install && + grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then + # program-specific install script used by HP pwplus--don't use. + : + else + ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" + break 3 + fi + fi + done + done + ;; +esac +done +IFS=$as_save_IFS + + +fi + if test "${ac_cv_path_install+set}" = set; then + INSTALL=$ac_cv_path_install + else + # As a last resort, use the slow shell script. Don't cache a + # value for INSTALL within a source directory, because that will + # break other packages using the cache if that directory is + # removed, or if the value is a relative name. + INSTALL=$ac_install_sh + fi +fi +{ echo "$as_me:3104: result: $INSTALL" >&5 +echo "${ECHO_T}$INSTALL" >&6; } + +# Use test -z because SunOS4 sh mishandles braces in ${var-val}. +# It thinks the first close brace ends the variable substitution. +test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' + +test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' + +test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' + + + + +{ echo "$as_me:3118: checking for grep that handles long lines and -e" >&5 +echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; } +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + # Extract the first word of "grep ggrep" to use in msg output +if test -z "$GREP"; then +set dummy grep ggrep; ac_prog_name=$2 +if test "${ac_cv_path_GREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_GREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue + # Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_GREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +GREP="$ac_cv_path_GREP" +if test -z "$GREP"; then + { { echo "$as_me:3181: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_GREP=$GREP +fi + + +fi +{ echo "$as_me:3192: result: $ac_cv_path_GREP" >&5 +echo "${ECHO_T}$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ echo "$as_me:3197: checking for egrep" >&5 +echo $ECHO_N "checking for egrep... $ECHO_C" >&6; } +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + # Extract the first word of "egrep" to use in msg output +if test -z "$EGREP"; then +set dummy egrep; ac_prog_name=$2 +if test "${ac_cv_path_EGREP+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_path_EGREP_found=false +# Loop through the user's path and test for each of PROGNAME-LIST +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue + # Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + ac_count=`expr $ac_count + 1` + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + + $ac_path_EGREP_found && break 3 + done +done + +done +IFS=$as_save_IFS + + +fi + +EGREP="$ac_cv_path_EGREP" +if test -z "$EGREP"; then + { { echo "$as_me:3263: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5 +echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;} + { (exit 1); exit 1; }; } +fi + +else + ac_cv_path_EGREP=$EGREP +fi + + + fi +fi +{ echo "$as_me:3275: result: $ac_cv_path_EGREP" >&5 +echo "${ECHO_T}$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + + +{ echo "$as_me:3281: checking for AIX" >&5 +echo $ECHO_N "checking for AIX... $ECHO_C" >&6; } +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifdef _AIX + yes +#endif + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1; then + { echo "$as_me:3296: result: yes" >&5 +echo "${ECHO_T}yes" >&6; } +cat >>confdefs.h <<\_ACEOF +#define _ALL_SOURCE 1 +_ACEOF + +else + { echo "$as_me:3303: result: no" >&5 +echo "${ECHO_T}no" >&6; } +fi +rm -f conftest* + + +{ echo "$as_me:3309: checking for library containing strerror" >&5 +echo $ECHO_N "checking for library containing strerror... $ECHO_C" >&6; } +if test "${ac_cv_search_strerror+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_func_search_save_LIBS=$LIBS +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char strerror (); +int +main () +{ +return strerror (); + ; + return 0; +} +_ACEOF +for ac_lib in '' cposix; do + if test -z "$ac_lib"; then + ac_res="none required" + else + ac_res=-l$ac_lib + LIBS="-l$ac_lib $ac_func_search_save_LIBS" + fi + rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3350: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3356: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_search_strerror=$ac_res +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext + if test "${ac_cv_search_strerror+set}" = set; then + break +fi +done +if test "${ac_cv_search_strerror+set}" = set; then + : +else + ac_cv_search_strerror=no +fi +rm conftest.$ac_ext +LIBS=$ac_func_search_save_LIBS +fi +{ echo "$as_me:3384: result: $ac_cv_search_strerror" >&5 +echo "${ECHO_T}$ac_cv_search_strerror" >&6; } +ac_res=$ac_cv_search_strerror +if test "$ac_res" != no; then + test "$ac_res" = "none required" || LIBS="$ac_res $LIBS" + +fi + + +{ echo "$as_me:3393: checking for ANSI C header files" >&5 +echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; } +if test "${ac_cv_header_stdc+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3423: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3429: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_header_stdc=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_header_stdc=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then + : +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then + : +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3528: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:3531: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3537: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:3540: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + : +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + + +fi +fi +{ echo "$as_me:3557: result: $ac_cv_header_stdc" >&5 +echo "${ECHO_T}$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +cat >>confdefs.h <<\_ACEOF +#define STDC_HEADERS 1 +_ACEOF + +fi + + +{ echo "$as_me:3568: checking for an ANSI C-conforming const" >&5 +echo $ECHO_N "checking for an ANSI C-conforming const... $ECHO_C" >&6; } +if test "${ac_cv_c_const+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +int +main () +{ +/* FIXME: Include the comments suggested by Paul. */ +#ifndef __cplusplus + /* Ultrix mips cc rejects this. */ + typedef int charset[2]; + const charset cs; + /* SunOS 4.1.1 cc rejects this. */ + char const *const *pcpcc; + char **ppc; + /* NEC SVR4.0.2 mips cc rejects this. */ + struct point {int x, y;}; + static struct point const zero = {0,0}; + /* AIX XL C 1.02.0.0 rejects this. + It does not let you subtract one const X* pointer from another in + an arm of an if-expression whose if-part is not a constant + expression */ + const char *g = "string"; + pcpcc = &g + (g ? g-g : 0); + /* HPUX 7.0 cc rejects these. */ + ++pcpcc; + ppc = (char**) pcpcc; + pcpcc = (char const *const *) ppc; + { /* SCO 3.2v4 cc rejects this. */ + char *t; + char const *s = 0 ? (char *) 0 : (char const *) 0; + + *t++ = 0; + if (s) return 0; + } + { /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */ + int x[] = {25, 17}; + const int *foo = &x[0]; + ++foo; + } + { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ + typedef const int *iptr; + iptr p = 0; + ++p; + } + { /* AIX XL C 1.02.0.0 rejects this saying + "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */ + struct s { int j; const int *ap[3]; }; + struct s *b; b->j = 5; + } + { /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */ + const int foo = 10; + if (!foo) return 0; + } + return !cs[0] && !zero.x; +#endif + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3643: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3649: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_c_const=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_c_const=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:3664: result: $ac_cv_c_const" >&5 +echo "${ECHO_T}$ac_cv_c_const" >&6; } +if test $ac_cv_c_const = no; then + +cat >>confdefs.h <<\_ACEOF +#define const +_ACEOF + +fi + +{ echo "$as_me:3674: checking for inline" >&5 +echo $ECHO_N "checking for inline... $ECHO_C" >&6; } +if test "${ac_cv_c_inline+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_cv_c_inline=no +for ac_kw in inline __inline__ __inline; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#ifndef __cplusplus +typedef int foo_t; +static $ac_kw foo_t static_foo () {return 0; } +$ac_kw foo_t foo () {return 0; } +#endif + +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3700: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3706: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_c_inline=$ac_kw +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + test "$ac_cv_c_inline" != no && break +done + +fi +{ echo "$as_me:3724: result: $ac_cv_c_inline" >&5 +echo "${ECHO_T}$ac_cv_c_inline" >&6; } + + +case $ac_cv_c_inline in + inline | yes) ;; + *) + case $ac_cv_c_inline in + no) ac_val=;; + *) ac_val=$ac_cv_c_inline;; + esac + cat >>confdefs.h <<_ACEOF +#ifndef __cplusplus +#define inline $ac_val +#endif +_ACEOF + ;; +esac + + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. + + + + + + + + + +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do +as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` +{ echo "$as_me:3758: checking for $ac_header" >&5 +echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } +if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + +#include <$ac_header> +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3779: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3785: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + eval "$as_ac_Header=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_Header=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_Header'}'` + { echo "$as_me:3801: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_Header'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +{ echo "$as_me:3813: checking for char" >&5 +echo $ECHO_N "checking for char... $ECHO_C" >&6; } +if test "${ac_cv_type_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef char ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3843: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3849: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_char=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_char=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:3864: result: $ac_cv_type_char" >&5 +echo "${ECHO_T}$ac_cv_type_char" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:3871: checking size of char" >&5 +echo $ECHO_N "checking size of char... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_char+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3902: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3908: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3939: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3945: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:3993: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:3999: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4030: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4036: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4094: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4100: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_char=$ac_lo;; +'') if test "$ac_cv_type_char" = yes; then + { { echo "$as_me:4118: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_char=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef char ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4173: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:4176: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4182: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:4185: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_char=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_char" = yes; then + { { echo "$as_me:4195: error: cannot compute sizeof (char) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (char) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_char=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:4208: result: $ac_cv_sizeof_char" >&5 +echo "${ECHO_T}$ac_cv_sizeof_char" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_CHAR $ac_cv_sizeof_char +_ACEOF + + +{ echo "$as_me:4218: checking for short" >&5 +echo $ECHO_N "checking for short... $ECHO_C" >&6; } +if test "${ac_cv_type_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef short ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4248: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4254: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_short=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_short=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:4269: result: $ac_cv_type_short" >&5 +echo "${ECHO_T}$ac_cv_type_short" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:4276: checking size of short" >&5 +echo $ECHO_N "checking size of short... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_short+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4307: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4313: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4344: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4350: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4398: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4404: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4435: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4441: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4499: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4505: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_short=$ac_lo;; +'') if test "$ac_cv_type_short" = yes; then + { { echo "$as_me:4523: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_short=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef short ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4578: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:4581: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4587: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:4590: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_short=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_short" = yes; then + { { echo "$as_me:4600: error: cannot compute sizeof (short) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (short) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_short=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:4613: result: $ac_cv_sizeof_short" >&5 +echo "${ECHO_T}$ac_cv_sizeof_short" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_SHORT $ac_cv_sizeof_short +_ACEOF + + +{ echo "$as_me:4623: checking for int" >&5 +echo $ECHO_N "checking for int... $ECHO_C" >&6; } +if test "${ac_cv_type_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef int ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4653: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4659: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_int=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_int=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:4674: result: $ac_cv_type_int" >&5 +echo "${ECHO_T}$ac_cv_type_int" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:4681: checking size of int" >&5 +echo $ECHO_N "checking size of int... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_int+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4712: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4718: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4749: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4755: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4803: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4809: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4840: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4846: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4904: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:4910: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_int=$ac_lo;; +'') if test "$ac_cv_type_int" = yes; then + { { echo "$as_me:4928: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_int=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef int ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4983: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:4986: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:4992: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:4995: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_int=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_int" = yes; then + { { echo "$as_me:5005: error: cannot compute sizeof (int) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (int) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_int=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:5018: result: $ac_cv_sizeof_int" >&5 +echo "${ECHO_T}$ac_cv_sizeof_int" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_INT $ac_cv_sizeof_int +_ACEOF + + +{ echo "$as_me:5028: checking for long" >&5 +echo $ECHO_N "checking for long... $ECHO_C" >&6; } +if test "${ac_cv_type_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5058: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5064: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:5079: result: $ac_cv_type_long" >&5 +echo "${ECHO_T}$ac_cv_type_long" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:5086: checking size of long" >&5 +echo $ECHO_N "checking size of long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5117: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5123: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5154: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5160: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5208: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5214: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5245: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5251: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5309: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5315: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long=$ac_lo;; +'') if test "$ac_cv_type_long" = yes; then + { { echo "$as_me:5333: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5388: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:5391: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5397: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:5400: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_long" = yes; then + { { echo "$as_me:5410: error: cannot compute sizeof (long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:5423: result: $ac_cv_sizeof_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG $ac_cv_sizeof_long +_ACEOF + + +{ echo "$as_me:5433: checking for long long" >&5 +echo $ECHO_N "checking for long long... $ECHO_C" >&6; } +if test "${ac_cv_type_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef long long ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5463: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5469: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_long_long=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_long_long=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:5484: result: $ac_cv_type_long_long" >&5 +echo "${ECHO_T}$ac_cv_type_long_long" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:5491: checking size of long long" >&5 +echo $ECHO_N "checking size of long long... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_long_long+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5522: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5528: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5559: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5565: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5613: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5619: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5650: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5656: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5714: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5720: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_long_long=$ac_lo;; +'') if test "$ac_cv_type_long_long" = yes; then + { { echo "$as_me:5738: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long_long=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef long long ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5793: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:5796: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5802: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:5805: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_long_long=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_long_long" = yes; then + { { echo "$as_me:5815: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (long long) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_long_long=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:5828: result: $ac_cv_sizeof_long_long" >&5 +echo "${ECHO_T}$ac_cv_sizeof_long_long" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_LONG_LONG $ac_cv_sizeof_long_long +_ACEOF + + +{ echo "$as_me:5838: checking for __int64" >&5 +echo $ECHO_N "checking for __int64... $ECHO_C" >&6; } +if test "${ac_cv_type___int64+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef __int64 ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5868: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5874: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type___int64=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type___int64=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:5889: result: $ac_cv_type___int64" >&5 +echo "${ECHO_T}$ac_cv_type___int64" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:5896: checking size of __int64" >&5 +echo $ECHO_N "checking size of __int64... $ECHO_C" >&6; } +if test "${ac_cv_sizeof___int64+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5927: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5933: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:5964: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:5970: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6018: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6024: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6055: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6061: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6119: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6125: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof___int64=$ac_lo;; +'') if test "$ac_cv_type___int64" = yes; then + { { echo "$as_me:6143: error: cannot compute sizeof (__int64) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (__int64) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof___int64=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef __int64 ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6198: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:6201: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6207: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:6210: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof___int64=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type___int64" = yes; then + { { echo "$as_me:6220: error: cannot compute sizeof (__int64) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (__int64) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof___int64=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:6233: result: $ac_cv_sizeof___int64" >&5 +echo "${ECHO_T}$ac_cv_sizeof___int64" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF___INT64 $ac_cv_sizeof___int64 +_ACEOF + + +{ echo "$as_me:6243: checking for void *" >&5 +echo $ECHO_N "checking for void *... $ECHO_C" >&6; } +if test "${ac_cv_type_void_p+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default +typedef void * ac__type_new_; +int +main () +{ +if ((ac__type_new_ *) 0) + return 0; +if (sizeof (ac__type_new_)) + return 0; + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6273: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6279: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_cv_type_void_p=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_type_void_p=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +{ echo "$as_me:6294: result: $ac_cv_type_void_p" >&5 +echo "${ECHO_T}$ac_cv_type_void_p" >&6; } + +# The cast to long int works around a bug in the HP C Compiler +# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects +# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. +# This bug is HP SR number 8606223364. +{ echo "$as_me:6301: checking size of void *" >&5 +echo $ECHO_N "checking size of void *... $ECHO_C" >&6; } +if test "${ac_cv_sizeof_void_p+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + if test "$cross_compiling" = yes; then + # Depending upon the size, compute the lo and hi bounds. +cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6332: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6338: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=0 ac_mid=0 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6369: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6375: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr $ac_mid + 1` + if test $ac_lo -le $ac_mid; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) < 0)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6423: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6429: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=-1 ac_mid=-1 + while :; do + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) >= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6460: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6466: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_lo=$ac_mid; break +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_hi=`expr '(' $ac_mid ')' - 1` + if test $ac_mid -le $ac_hi; then + ac_lo= ac_hi= + break + fi + ac_mid=`expr 2 '*' $ac_mid` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + done +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo= ac_hi= +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +# Binary search between lo and hi bounds. +while test "x$ac_lo" != "x$ac_hi"; do + ac_mid=`expr '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo` + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +int +main () +{ +static int test_array [1 - 2 * !(((long int) (sizeof (ac__type_sizeof_))) <= $ac_mid)]; +test_array [0] = 0 + + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext +if { (ac_try="$ac_compile" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6524: $ac_try_echo\"") >&5 + (eval "$ac_compile") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6530: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest.$ac_objext; then + ac_hi=$ac_mid +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_lo=`expr '(' $ac_mid ')' + 1` +fi + +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +done +case $ac_lo in +?*) ac_cv_sizeof_void_p=$ac_lo;; +'') if test "$ac_cv_type_void_p" = yes; then + { { echo "$as_me:6548: error: cannot compute sizeof (void *) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (void *) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_void_p=0 + fi ;; +esac +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +$ac_includes_default + typedef void * ac__type_sizeof_; +static long int longval () { return (long int) (sizeof (ac__type_sizeof_)); } +static unsigned long int ulongval () { return (long int) (sizeof (ac__type_sizeof_)); } +#include +#include +int +main () +{ + + FILE *f = fopen ("conftest.val", "w"); + if (! f) + return 1; + if (((long int) (sizeof (ac__type_sizeof_))) < 0) + { + long int i = longval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%ld\n", i); + } + else + { + unsigned long int i = ulongval (); + if (i != ((long int) (sizeof (ac__type_sizeof_)))) + return 1; + fprintf (f, "%lu\n", i); + } + return ferror (f) || fclose (f) != 0; + + ; + return 0; +} +_ACEOF +rm -f conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6603: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>&5 + ac_status=$? + echo "$as_me:6606: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6612: $ac_try_echo\"") >&5 + (eval "$ac_try") 2>&5 + ac_status=$? + echo "$as_me:6615: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + ac_cv_sizeof_void_p=`cat conftest.val` +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +if test "$ac_cv_type_void_p" = yes; then + { { echo "$as_me:6625: error: cannot compute sizeof (void *) +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot compute sizeof (void *) +See \`config.log' for more details." >&2;} + { (exit 77); exit 77; }; } + else + ac_cv_sizeof_void_p=0 + fi +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi +rm -f conftest.val +fi +{ echo "$as_me:6638: result: $ac_cv_sizeof_void_p" >&5 +echo "${ECHO_T}$ac_cv_sizeof_void_p" >&6; } + + + +cat >>confdefs.h <<_ACEOF +#define SIZEOF_VOID_P $ac_cv_sizeof_void_p +_ACEOF + + + +if test $ac_cv_c_compiler_gnu = yes; then + CFLAGS="$CFLAGS -Wall -W -Wno-unused" +fi + +if test $ac_cv_c_compiler_gnu = yes; then + { echo "$as_me:6654: checking whether $CC needs -traditional" >&5 +echo $ECHO_N "checking whether $CC needs -traditional... $ECHO_C" >&6; } +if test "${ac_cv_prog_gcc_traditional+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + ac_pattern="Autoconf.*'x'" + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +Autoconf TIOCGETP +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "$ac_pattern" >/dev/null 2>&1; then + ac_cv_prog_gcc_traditional=yes +else + ac_cv_prog_gcc_traditional=no +fi +rm -f conftest* + + + if test $ac_cv_prog_gcc_traditional = no; then + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +#include +Autoconf TCGETA +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "$ac_pattern" >/dev/null 2>&1; then + ac_cv_prog_gcc_traditional=yes +fi +rm -f conftest* + + fi +fi +{ echo "$as_me:6696: result: $ac_cv_prog_gcc_traditional" >&5 +echo "${ECHO_T}$ac_cv_prog_gcc_traditional" >&6; } + if test $ac_cv_prog_gcc_traditional = yes; then + CC="$CC -traditional" + fi +fi + + +for ac_func in vprintf +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:6707: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6763: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6769: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:6787: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +{ echo "$as_me:6794: checking for _doprnt" >&5 +echo $ECHO_N "checking for _doprnt... $ECHO_C" >&6; } +if test "${ac_cv_func__doprnt+set}" = set; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define _doprnt to an innocuous variant, in case declares _doprnt. + For example, HP-UX 11i declares gettimeofday. */ +#define _doprnt innocuous__doprnt + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char _doprnt (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef _doprnt + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char _doprnt (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub__doprnt || defined __stub____doprnt +choke me +#endif + +int +main () +{ +return _doprnt (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6850: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6856: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + ac_cv_func__doprnt=yes +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_cv_func__doprnt=no +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +{ echo "$as_me:6873: result: $ac_cv_func__doprnt" >&5 +echo "${ECHO_T}$ac_cv_func__doprnt" >&6; } +if test $ac_cv_func__doprnt = yes; then + +cat >>confdefs.h <<\_ACEOF +#define HAVE_DOPRNT 1 +_ACEOF + +fi + +fi +done + + + + + + +for ac_func in strdup strcasecmp strcmpi stricmp +do +as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh` +{ echo "$as_me:6894: checking for $ac_func" >&5 +echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; } +if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then + echo $ECHO_N "(cached) $ECHO_C" >&6 +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ +/* Define $ac_func to an innocuous variant, in case declares $ac_func. + For example, HP-UX 11i declares gettimeofday. */ +#define $ac_func innocuous_$ac_func + +/* System header to define __stub macros and hopefully few prototypes, + which can conflict with char $ac_func (); below. + Prefer to if __STDC__ is defined, since + exists even on freestanding compilers. */ + +#ifdef __STDC__ +# include +#else +# include +#endif + +#undef $ac_func + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char $ac_func (); +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined __stub_$ac_func || defined __stub___$ac_func +choke me +#endif + +int +main () +{ +return $ac_func (); + ; + return 0; +} +_ACEOF +rm -f conftest.$ac_objext conftest$ac_exeext +if { (ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval "echo \"\$as_me:6950: $ac_try_echo\"") >&5 + (eval "$ac_link") 2>conftest.er1 + ac_status=$? + grep -v '^ *+' conftest.er1 >conftest.err + rm -f conftest.er1 + cat conftest.err >&5 + echo "$as_me:6956: \$? = $ac_status" >&5 + (exit $ac_status); } && { + test -z "$ac_c_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && + $as_test_x conftest$ac_exeext; then + eval "$as_ac_var=yes" +else + echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + eval "$as_ac_var=no" +fi + +rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ + conftest$ac_exeext conftest.$ac_ext +fi +ac_res=`eval echo '${'$as_ac_var'}'` + { echo "$as_me:6974: result: $ac_res" >&5 +echo "${ECHO_T}$ac_res" >&6; } +if test `eval echo '${'$as_ac_var'}'` = yes; then + cat >>confdefs.h <<_ACEOF +#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1 +_ACEOF + +fi +done + + + + + + + +if [ "$target_cpu" = "powerpc" ]; then + case $target_os in + darwin*) + CFLAGS="$CFLAGS -DUSE_DUBIOUS_BIGENDIAN_OPTIMIZATION" + ;; + esac +fi + +ac_config_files="$ac_config_files Makefile" + + +ac_config_links="$ac_config_links missing.c:../missing.c writelog.c:../writelog.c readcpu.c:../readcpu.c build68k.c:../build68k.c gencpu.c:../gencpu.c gencomp.c:../gencomp.c genblitter.c:../genblitter.c blitops.c:../blitops.c genlinetoscr.c:../genlinetoscr.c" + + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { echo "$as_me:7031: WARNING: Cache variable $ac_var contains a newline." >&5 +echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + *) $as_unset $ac_var ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes (double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \). + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + test "x$cache_file" != "x/dev/null" && + { echo "$as_me:7068: updating cache $cache_file" >&5 +echo "$as_me: updating cache $cache_file" >&6;} + cat confcache >$cache_file + else + { echo "$as_me:7072: not updating unwritable cache $cache_file" >&5 +echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. Remove the extension, and $U if already installed. + ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' + ac_i=`echo "$ac_i" | sed "$ac_script"` + # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext" + ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + + +: ${CONFIG_STATUS=./config.status} +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ echo "$as_me:7104: creating $CONFIG_STATUS" >&5 +echo "$as_me: creating $CONFIG_STATUS" >&6;} +cat >$CONFIG_STATUS <<_ACEOF +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false +SHELL=\${CONFIG_SHELL-$SHELL} +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +## --------------------- ## +## M4sh Initialization. ## +## --------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in + *posix*) set -o posix ;; +esac + +fi + + + + +# PATH needs CR +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + echo "#! /bin/sh" >conf$$.sh + echo "exit 0" >>conf$$.sh + chmod +x conf$$.sh + if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then + PATH_SEPARATOR=';' + else + PATH_SEPARATOR=: + fi + rm -f conf$$.sh +fi + +# Support unset when possible. +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + as_unset=unset +else + as_unset=false +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +as_nl=' +' +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +case $0 in + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break +done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + { (exit 1); exit 1; } +fi + +# Work around bugs in pre-3.0 UWIN ksh. +for as_var in ENV MAIL MAILPATH +do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ + LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \ + LC_TELEPHONE LC_TIME +do + if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then + eval $as_var=C; export $as_var + else + ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var + fi +done + +# Required to use basename. +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + + +# Name of the executable. +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# CDPATH. +$as_unset CDPATH + + + + as_lineno_1=7266 + as_lineno_2=7267 + test "x$as_lineno_1" != "x$as_lineno_2" && + test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || { + + # Create $as_me.lineno as a copy of $as_myself, but with 7271 + # uniformly replaced by the line number. The first 'sed' inserts a + # line-number line after each line using 7273; the second 'sed' + # does the real work. The second script uses 'N' to pair each + # line-number line with the line containing 7275, and appends + # trailing '-' during substitution so that 7276 is not a special + # case at line end. + # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the + # scripts with optimization help from Paolo Bonzini. Blame Lee + # E. McMahon (1931-1989) for sed's syntax. :-) + sed -n ' + p + /[$]LINENO/= + ' <$as_myself | + sed ' + s/[$]LINENO.*/&-/ + t lineno + b + :lineno + N + :loop + s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/ + t loop + s/-\n.*// + ' >$as_me.lineno && + chmod +x "$as_me.lineno" || + { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2 + { (exit 1); exit 1; }; } + + # Don't try to exec as it changes $[0], causing all sort of problems + # (the dirname of $[0] is not the place where we might find the + # original and so on. Autoconf is especially sensitive to this). + . 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Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +_ACEOF + +cat >>$CONFIG_STATUS <<_ACEOF +# Files that config.status was made for. +config_files="$ac_config_files" +config_headers="$ac_config_headers" +config_links="$ac_config_links" + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +ac_cs_usage="\ +\`$as_me' instantiates files from templates according to the +current configuration. + +Usage: $0 [OPTIONS] [FILE]... + + -h, --help print this help, then exit + -V, --version print version number and configuration settings, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + --header=FILE[:TEMPLATE] + instantiate the configuration header FILE + +Configuration files: +$config_files + +Configuration headers: +$config_headers + +Configuration links: +$config_links + +Report bugs to ." + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF +ac_cs_version="\\ +config.status +configured by $0, generated by GNU Autoconf 2.61, + with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" + +Copyright (C) 2006 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='$ac_pwd' +srcdir='$srcdir' +INSTALL='$INSTALL' +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If no file are specified by the user, then we need to provide default +# value. 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Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_LINKS+set}" = set || CONFIG_LINKS=$config_links +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= + trap 'exit_status=$? + { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status +' 0 + trap '{ (exit 1); exit 1; }' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -n "$tmp" && test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || +{ + echo "$me: cannot create a temporary directory in ." >&2 + { (exit 1); exit 1; } +} + +# +# Set up the sed scripts for CONFIG_FILES section. +# + +# No need to generate the scripts if there are no CONFIG_FILES. +# This happens for instance when ./config.status config.h +if test -n "$CONFIG_FILES"; then + +_ACEOF + + + +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + cat >conf$$subs.sed <<_ACEOF +SHELL!$SHELL$ac_delim +PATH_SEPARATOR!$PATH_SEPARATOR$ac_delim +PACKAGE_NAME!$PACKAGE_NAME$ac_delim +PACKAGE_TARNAME!$PACKAGE_TARNAME$ac_delim +PACKAGE_VERSION!$PACKAGE_VERSION$ac_delim +PACKAGE_STRING!$PACKAGE_STRING$ac_delim +PACKAGE_BUGREPORT!$PACKAGE_BUGREPORT$ac_delim +exec_prefix!$exec_prefix$ac_delim +prefix!$prefix$ac_delim +program_transform_name!$program_transform_name$ac_delim +bindir!$bindir$ac_delim +sbindir!$sbindir$ac_delim +libexecdir!$libexecdir$ac_delim +datarootdir!$datarootdir$ac_delim +datadir!$datadir$ac_delim +sysconfdir!$sysconfdir$ac_delim +sharedstatedir!$sharedstatedir$ac_delim +localstatedir!$localstatedir$ac_delim +includedir!$includedir$ac_delim +oldincludedir!$oldincludedir$ac_delim +docdir!$docdir$ac_delim +infodir!$infodir$ac_delim +htmldir!$htmldir$ac_delim +dvidir!$dvidir$ac_delim +pdfdir!$pdfdir$ac_delim +psdir!$psdir$ac_delim +libdir!$libdir$ac_delim +localedir!$localedir$ac_delim +mandir!$mandir$ac_delim +DEFS!$DEFS$ac_delim +ECHO_C!$ECHO_C$ac_delim +ECHO_N!$ECHO_N$ac_delim +ECHO_T!$ECHO_T$ac_delim +LIBS!$LIBS$ac_delim +build_alias!$build_alias$ac_delim +host_alias!$host_alias$ac_delim +target_alias!$target_alias$ac_delim +build!$build$ac_delim +build_cpu!$build_cpu$ac_delim +build_vendor!$build_vendor$ac_delim +build_os!$build_os$ac_delim +host!$host$ac_delim +host_cpu!$host_cpu$ac_delim +host_vendor!$host_vendor$ac_delim +host_os!$host_os$ac_delim +target!$target$ac_delim +target_cpu!$target_cpu$ac_delim +target_vendor!$target_vendor$ac_delim +target_os!$target_os$ac_delim +CC!$CC$ac_delim +CFLAGS!$CFLAGS$ac_delim +LDFLAGS!$LDFLAGS$ac_delim +CPPFLAGS!$CPPFLAGS$ac_delim +ac_ct_CC!$ac_ct_CC$ac_delim +EXEEXT!$EXEEXT$ac_delim +OBJEXT!$OBJEXT$ac_delim +CPP!$CPP$ac_delim +SET_MAKE!$SET_MAKE$ac_delim +INSTALL_PROGRAM!$INSTALL_PROGRAM$ac_delim +INSTALL_SCRIPT!$INSTALL_SCRIPT$ac_delim +INSTALL_DATA!$INSTALL_DATA$ac_delim +GREP!$GREP$ac_delim +EGREP!$EGREP$ac_delim +ac_cv_c_inline!$ac_cv_c_inline$ac_delim +top_srcdir!$top_srcdir$ac_delim +LIBOBJS!$LIBOBJS$ac_delim +LTLIBOBJS!$LTLIBOBJS$ac_delim +_ACEOF + + if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 67; then + break + elif $ac_last_try; then + { { echo "$as_me:7706: error: could not make $CONFIG_STATUS" >&5 +echo "$as_me: error: could not make $CONFIG_STATUS" >&2;} + { (exit 1); exit 1; }; } + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! 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Generated by config.status. */ + configure_input="Generated from "`IFS=: + echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure." + if test x"$ac_file" != x-; then + configure_input="$ac_file. $configure_input" + { echo "$as_me:7811: creating $ac_file" >&5 +echo "$as_me: creating $ac_file" >&6;} + fi + + case $ac_tag in + *:-:* | *:-) cat >"$tmp/stdin";; + esac + ;; + esac + + ac_dir=`$as_dirname -- "$ac_file" || +$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$ac_file" : 'X\(//\)[^/]' \| \ + X"$ac_file" : 'X\(//\)$' \| \ + X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || +echo X"$ac_file" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + { as_dir="$ac_dir" + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || { { echo "$as_me:7882: error: cannot create directory $as_dir" >&5 +echo "$as_me: error: cannot create directory $as_dir" >&2;} + { (exit 1); exit 1; }; }; } + ac_builddir=. + +case "$ac_dir" in +.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; +*) + ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'` + # A ".." for each directory in $ac_dir_suffix. + ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'` + case $ac_top_builddir_sub in + "") ac_top_builddir_sub=. ac_top_build_prefix= ;; + *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; + esac ;; +esac +ac_abs_top_builddir=$ac_pwd +ac_abs_builddir=$ac_pwd$ac_dir_suffix +# for backward compatibility: +ac_top_builddir=$ac_top_build_prefix + +case $srcdir in + .) # We are building in place. + ac_srcdir=. + ac_top_srcdir=$ac_top_builddir_sub + ac_abs_top_srcdir=$ac_pwd ;; + [\\/]* | ?:[\\/]* ) # Absolute name. + ac_srcdir=$srcdir$ac_dir_suffix; + ac_top_srcdir=$srcdir + ac_abs_top_srcdir=$srcdir ;; + *) # Relative name. + ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix + ac_top_srcdir=$ac_top_build_prefix$srcdir + ac_abs_top_srcdir=$ac_pwd/$srcdir ;; +esac +ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix + + + case $ac_mode in + :F) + # + # CONFIG_FILE + # + + case $INSTALL in + [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;; + *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;; + esac +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF +# If the template does not know about datarootdir, expand it. +# FIXME: This hack should be removed a few years after 2.60. +ac_datarootdir_hack=; ac_datarootdir_seen= + +case `sed -n '/datarootdir/ { + p + q +} +/@datadir@/p +/@docdir@/p +/@infodir@/p +/@localedir@/p +/@mandir@/p +' $ac_file_inputs` in +*datarootdir*) ac_datarootdir_seen=yes;; +*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) + { echo "$as_me:7949: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 +echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF + ac_datarootdir_hack=' + s&@datadir@&$datadir&g + s&@docdir@&$docdir&g + s&@infodir@&$infodir&g + s&@localedir@&$localedir&g + s&@mandir@&$mandir&g + s&\\\${datarootdir}&$datarootdir&g' ;; +esac +_ACEOF + +# Neutralize VPATH when `$srcdir' = `.'. +# Shell code in configure.ac might set extrasub. +# FIXME: do we really want to maintain this feature? +cat >>$CONFIG_STATUS <<_ACEOF + sed "$ac_vpsub +$extrasub +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF +:t +/@[a-zA-Z_][a-zA-Z_0-9]*@/!b +s&@configure_input@&$configure_input&;t t +s&@top_builddir@&$ac_top_builddir_sub&;t t +s&@srcdir@&$ac_srcdir&;t t +s&@abs_srcdir@&$ac_abs_srcdir&;t t +s&@top_srcdir@&$ac_top_srcdir&;t t +s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t +s&@builddir@&$ac_builddir&;t t +s&@abs_builddir@&$ac_abs_builddir&;t t +s&@abs_top_builddir@&$ac_abs_top_builddir&;t t +s&@INSTALL@&$ac_INSTALL&;t t +$ac_datarootdir_hack +" $ac_file_inputs | sed -f "$tmp/subs-1.sed" >$tmp/out + +test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && + { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } && + { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } && + { echo "$as_me:7989: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&5 +echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' +which seems to be undefined. Please make sure it is defined." >&2;} + + rm -f "$tmp/stdin" + case $ac_file in + -) cat "$tmp/out"; rm -f "$tmp/out";; + *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;; + esac + ;; + :H) + # + # CONFIG_HEADER + # +_ACEOF + +# Transform confdefs.h into a sed script `conftest.defines', that +# substitutes the proper values into config.h.in to produce config.h. +rm -f conftest.defines conftest.tail +# First, append a space to every undef/define line, to ease matching. +echo 's/$/ /' >conftest.defines +# Then, protect against being on the right side of a sed subst, or in +# an unquoted here document, in config.status. If some macros were +# called several times there might be several #defines for the same +# symbol, which is useless. But do not sort them, since the last +# AC_DEFINE must be honored. +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where +# NAME is the cpp macro being defined, VALUE is the value it is being given. +# PARAMS is the parameter list in the macro definition--in most cases, it's +# just an empty string. +ac_dA='s,^\\([ #]*\\)[^ ]*\\([ ]*' +ac_dB='\\)[ (].*,\\1define\\2' +ac_dC=' ' +ac_dD=' ,' + +uniq confdefs.h | + sed -n ' + t rset + :rset + s/^[ ]*#[ ]*define[ ][ ]*// + t ok + d + :ok + s/[\\&,]/\\&/g + s/^\('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p + s/^\('"$ac_word_re"'\)[ ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p + ' >>conftest.defines + +# Remove the space that was appended to ease matching. +# Then replace #undef with comments. This is necessary, for +# example, in the case of _POSIX_SOURCE, which is predefined and required +# on some systems where configure will not decide to define it. +# (The regexp can be short, since the line contains either #define or #undef.) +echo 's/ $// +s,^[ #]*u.*,/* & */,' >>conftest.defines + +# Break up conftest.defines: +ac_max_sed_lines=50 + +# First sed command is: sed -f defines.sed $ac_file_inputs >"$tmp/out1" +# Second one is: sed -f defines.sed "$tmp/out1" >"$tmp/out2" +# Third one will be: sed -f defines.sed "$tmp/out2" >"$tmp/out1" +# et cetera. +ac_in='$ac_file_inputs' +ac_out='"$tmp/out1"' +ac_nxt='"$tmp/out2"' + +while : +do + # Write a here document: + cat >>$CONFIG_STATUS <<_ACEOF + # First, check the format of the line: + cat >"\$tmp/defines.sed" <<\\CEOF +/^[ ]*#[ ]*undef[ ][ ]*$ac_word_re[ ]*\$/b def +/^[ ]*#[ ]*define[ ][ ]*$ac_word_re[( ]/b def +b +:def +_ACEOF + sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS + echo 'CEOF + sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS + ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in + sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail + grep . conftest.tail >/dev/null || break + rm -f conftest.defines + mv conftest.tail conftest.defines +done +rm -f conftest.defines conftest.tail + +echo "ac_result=$ac_in" >>$CONFIG_STATUS +cat >>$CONFIG_STATUS <<\_ACEOF + if test x"$ac_file" != x-; then + echo "/* $configure_input */" >"$tmp/config.h" + cat "$ac_result" >>"$tmp/config.h" + if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then + { echo "$as_me:8086: $ac_file is unchanged" >&5 +echo "$as_me: $ac_file is unchanged" >&6;} + else + rm -f $ac_file + mv "$tmp/config.h" $ac_file + fi + else + echo "/* $configure_input */" + cat "$ac_result" + fi + rm -f "$tmp/out12" + ;; + :L) + # + # CONFIG_LINK + # + + { echo "$as_me:8103: linking $srcdir/$ac_source to $ac_file" >&5 +echo "$as_me: linking $srcdir/$ac_source to $ac_file" >&6;} + + if test ! -r "$srcdir/$ac_source"; then + { { echo "$as_me:8107: error: $srcdir/$ac_source: file not found" >&5 +echo "$as_me: error: $srcdir/$ac_source: file not found" >&2;} + { (exit 1); exit 1; }; } + fi + rm -f "$ac_file" + + # Try a relative symlink, then a hard link, then a copy. + case $srcdir in + [\\/$]* | ?:[\\/]* ) ac_rel_source=$srcdir/$ac_source ;; + *) ac_rel_source=$ac_top_build_prefix$srcdir/$ac_source ;; + esac + ln -s "$ac_rel_source" "$ac_file" 2>/dev/null || + ln "$srcdir/$ac_source" "$ac_file" 2>/dev/null || + cp -p "$srcdir/$ac_source" "$ac_file" || + { { echo "$as_me:8121: error: cannot link or copy $srcdir/$ac_source to $ac_file" >&5 +echo "$as_me: error: cannot link or copy $srcdir/$ac_source to $ac_file" >&2;} + { (exit 1); exit 1; }; } + ;; + + esac + +done # for ac_tag + + +{ (exit 0); exit 0; } +_ACEOF +chmod +x $CONFIG_STATUS +ac_clean_files=$ac_clean_files_save + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || { (exit 1); exit 1; } +fi + diff --git a/src/tools/cpudefs.c b/src/tools/cpudefs.c new file mode 100644 index 0000000..b1870cf --- /dev/null +++ b/src/tools/cpudefs.c @@ -0,0 +1,184 @@ +#include "sysconfig.h" +#include "uae_types.h" +#include "readcpu.h" +struct instr_def defs68k[] = { +{ 60, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "ORSR.B #1"}, +{ 124, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "ORSR.W #1"}, +{ 192, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 63936, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 0, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "OR.z #z,d[!Areg]"}, +{ 572, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "ANDSR.B #1"}, +{ 636, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "ANDSR.W #1"}, +{ 512, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "AND.z #z,d[!Areg]"}, +{ 1024, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "SUB.z #z,d[!Areg]"}, +{ 1536, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADD.z #z,d[!Areg]"}, +{ 1728, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]"}, +{ 1728, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "RTM s[Dreg,Areg]"}, +{ 2048, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 17, "BTST #1,s[!Areg]"}, +{ 2112, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCHG #1,s[!Areg,Immd]"}, +{ 2176, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BCLR #1,s[!Areg,Immd]"}, +{ 2240, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 0 }, { 1, 1 }, { 1, 1 } }, 19, "BSET #1,s[!Areg,Immd]"}, +{ 2620, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 0, { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }, 16, "EORSR.B #1"}, +{ 2684, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 0, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "EORSR.W #1"}, +{ 2560, 8, {17,17,13,13,13,14,14,14,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "EOR.z #z,d[!Areg]"}, +{ 3072, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 65280, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMP.z #z,s[!Areg,Immd]"}, +{ 2752, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3264, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3324, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CAS2.W #2"}, +{ 3584, 8, {17,17,11,11,11,12,12,12,0,0,0,0,0,0,0,0}, 65280, 2, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3776, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]"}, +{ 3836, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "CAS2.L #2"}, +{ 256, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPMR.W d[Areg-Ad16],Dr"}, +{ 320, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPMR.L d[Areg-Ad16],Dr"}, +{ 384, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MVPRM.W Dr,d[Areg-Ad16]"}, +{ 448, 9, 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61888, 0, 0, { { 0, 0 }, { 1, 4 }, { 0, 0 }, { 1, 4 }, { 1, 0 } }, 19, "SBCD.B d[Areg-Apdi],Arp"}, +{ 33024, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "OR.z Dr,d[!Areg,Dreg]"}, +{ 33088, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 18, "PACK d[Dreg],Dr"}, +{ 33088, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 18, "PACK d[Areg-Apdi],Arp"}, +{ 33152, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 18, "UNPK d[Dreg],Dr"}, +{ 33152, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 18, "UNPK d[Areg-Apdi],Arp"}, +{ 33216, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "DIVS.W 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}, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMP.z s,Dr"}, +{ 45248, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMPA.W s,Ar"}, +{ 45504, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMPA.L s,Ar"}, +{ 45312, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 17, "CMPM.z d[Areg-Aipi],ArP"}, +{ 45312, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "EOR.z Dr,d[!Areg]"}, +{ 49152, 11, {15,15,15,17,17,11,11,11,12,12,12,0,0,0,0,0}, 61696, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "AND.z s[!Areg],Dr"}, +{ 49344, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "MULU.W s[!Areg],Dr"}, +{ 49408, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 0, 0 }, { 1, 4 }, { 0, 0 }, { 1, 4 }, { 1, 0 } }, 19, "ABCD.B d[Dreg],Dr"}, +{ 49408, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 0, 0 }, { 1, 4 }, { 0, 0 }, { 1, 4 }, { 1, 0 } }, 19, "ABCD.B d[Areg-Apdi],Arp"}, +{ 49408, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "AND.z Dr,d[!Areg,Dreg]"}, +{ 49472, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 51, "EXG.L Dr,d[Dreg]"}, +{ 49472, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 51, "EXG.L Ar,d[Areg]"}, +{ 49536, 9, {15,15,15,13,13,13,14,14,14,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 51, "EXG.L Dr,d[Areg]"}, +{ 49600, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 2 } }, 19, "MULS.W s[!Areg],Dr"}, +{ 53248, 11, {15,15,15,17,17,11,11,11,12,12,12,0,0,0,0,0}, 61696, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADD.z s,Dr"}, +{ 53440, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 19, "ADDA.W s,Ar"}, +{ 53504, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 0, 0 }, { 1, 0 }, { 0, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADDX.z d[Dreg],Dr"}, +{ 53504, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 0, 0 }, { 1, 0 }, { 0, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADDX.z d[Areg-Apdi],Arp"}, +{ 53504, 11, {15,15,15,17,17,13,13,13,14,14,14,0,0,0,0,0}, 61696, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ADD.z Dr,d[!Areg,Dreg]"}, +{ 53696, 9, {15,15,15,11,11,11,12,12,12,0,0,0,0,0,0,0}, 61888, 0, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 19, "ADDA.L s,Ar"}, +{ 57344, 9, {7,7,7,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ASf.z #j,DR"}, +{ 57352, 9, {7,7,7,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "LSf.z #j,DR"}, +{ 57360, 9, {7,7,7,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROXf.z #j,DR"}, +{ 57368, 9, {7,7,7,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROf.z #j,DR"}, +{ 57376, 9, {15,15,15,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ASf.z Dr,DR"}, +{ 57384, 9, {15,15,15,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "LSf.z Dr,DR"}, +{ 57392, 9, {15,15,15,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROXf.z Dr,DR"}, +{ 57400, 9, {15,15,15,4,17,17,16,16,16,0,0,0,0,0,0,0}, 61496, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROf.z Dr,DR"}, +{ 57536, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 0 } }, 19, "ASfW.W d[!Dreg,Areg]"}, +{ 58048, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "LSfW.W d[!Dreg,Areg]"}, +{ 58560, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 0, 0 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROXfW.W d[!Dreg,Areg]"}, +{ 59072, 7, {4,13,13,13,14,14,14,0,0,0,0,0,0,0,0,0}, 65216, 0, 0, { { 1, 1 }, { 1, 0 }, { 1, 0 }, { 1, 2 }, { 1, 0 } }, 19, "ROfW.W d[!Dreg,Areg]"}, +{ 59584, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFTST #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 59840, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 60096, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 60352, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 60608, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 60864, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "BFFFO #1,s[!Areg,Apdi,Aipi,Immd]"}, +{ 61120, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 61376, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 2, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 19, "BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, +{ 61952, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FPP #1,s"}, +{ 62016, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FDBcc #1,s[Areg-Dreg]"}, +{ 62016, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FScc #1,s[!Areg,Immd,PC8r,PC16]"}, +{ 62074, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FTRAPcc #1"}, +{ 62075, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FTRAPcc #2"}, +{ 62076, 0, {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65535, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 0, "FTRAPcc"}, +{ 62080, 6, {10,10,10,10,10,10,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FBcc #K,#1"}, +{ 62144, 6, {10,10,10,10,10,10,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "FBcc #K,#2"}, +{ 62208, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 32, "FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"}, +{ 62272, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 3, 2, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 16, "FRESTORE s[!Dreg,Areg,Apdi,Immd]"}, +{ 62720, 8, {5,5,5,5,5,12,12,12,0,0,0,0,0,0,0,0}, 65280, 4, 0, { { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 }, { 3, 5 } }, 17, "MMUOP #i,s"}, +{ 62472, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CINVL #p,Ar"}, +{ 62480, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CINVP #p,Ar"}, +{ 62488, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "CINVA #p"}, +{ 62504, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CPUSHL #p,Ar"}, +{ 62512, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 2, "CPUSHP #p,Ar"}, +{ 62520, 5, {18,18,15,15,15,0,0,0,0,0,0,0,0,0,0,0}, 65336, 4, 2, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 0, "CPUSHA #p"}, +{ 63008, 3, {15,15,15,0,0,0,0,0,0,0,0,0,0,0,0,0}, 65528, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 ArP,AxP"}, +{ 62976, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 s[Dreg-Aipi],L"}, +{ 62976, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 L,d[Areg-Aipi]"}, +{ 62976, 6, {11,11,11,12,12,12,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 s[Aind],L"}, +{ 62976, 6, {13,13,13,14,14,14,0,0,0,0,0,0,0,0,0,0}, 65472, 4, 0, { { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 }, { 1, 1 } }, 18, "MOVE16 L,d[Aipi-Aind]"}}; +int n_defs68k = 179; diff --git a/src/tools/genblitter.c b/src/tools/genblitter.c new file mode 120000 index 0000000..8a3acf6 --- /dev/null +++ b/src/tools/genblitter.c @@ -0,0 +1 @@ +./../genblitter.c \ No newline at end of file diff --git a/src/tools/gencomp.c b/src/tools/gencomp.c new file mode 120000 index 0000000..40db33c --- /dev/null +++ b/src/tools/gencomp.c @@ -0,0 +1 @@ +./../gencomp.c \ No newline at end of file diff --git a/src/tools/gencpu.c b/src/tools/gencpu.c new file mode 120000 index 0000000..66bfe5f --- /dev/null +++ b/src/tools/gencpu.c @@ -0,0 +1 @@ +./../gencpu.c \ No newline at end of file diff --git a/src/tools/genlinetoscr.c b/src/tools/genlinetoscr.c new file mode 120000 index 0000000..00d2b3a --- /dev/null +++ b/src/tools/genlinetoscr.c @@ -0,0 +1 @@ +./../genlinetoscr.c \ No newline at end of file diff --git a/src/tools/missing.c b/src/tools/missing.c new file mode 120000 index 0000000..43b47a3 --- /dev/null +++ b/src/tools/missing.c @@ -0,0 +1 @@ +./../missing.c \ No newline at end of file diff --git a/src/tools/readcpu.c b/src/tools/readcpu.c new file mode 120000 index 0000000..f0f2fc4 --- /dev/null +++ b/src/tools/readcpu.c @@ -0,0 +1 @@ +./../readcpu.c \ No newline at end of file diff --git a/src/tools/sysconfig.h b/src/tools/sysconfig.h new file mode 100644 index 0000000..21aeed4 --- /dev/null +++ b/src/tools/sysconfig.h @@ -0,0 +1,102 @@ +/* sysconfig.h. Generated from sysconfig.h.in by configure. */ +/* sysconfig.h.in. Generated from configure.in by autoheader. */ + +/* Define to 1 if you don't have `vprintf' but do have `_doprnt.' */ +/* #undef HAVE_DOPRNT */ + +/* Define to 1 if you have the header file. */ +#define HAVE_INTTYPES_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_MEMORY_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDINT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the `strcasecmp' function. */ +#define HAVE_STRCASECMP 1 + +/* Define to 1 if you have the `strcmpi' function. */ +/* #undef HAVE_STRCMPI */ + +/* Define to 1 if you have the `strdup' function. */ +#define HAVE_STRDUP 1 + +/* Define to 1 if you have the `stricmp' function. */ +/* #undef HAVE_STRICMP */ + +/* Define to 1 if you have the header file. */ +#define HAVE_STRINGS_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UNISTD_H 1 + +/* Define to 1 if you have the `vprintf' function. */ +#define HAVE_VPRINTF 1 + +/* Define to the address where bug reports for this package should be sent. */ +#define PACKAGE_BUGREPORT "" + +/* Define to the full name of this package. */ +#define PACKAGE_NAME "" + +/* Define to the full name and version of this package. */ +#define PACKAGE_STRING "" + +/* Define to the one symbol short name of this package. */ +#define PACKAGE_TARNAME "" + +/* Define to the version of this package. */ +#define PACKAGE_VERSION "" + +/* The size of `char', as computed by sizeof. */ +#define SIZEOF_CHAR 1 + +/* The size of `int', as computed by sizeof. */ +#define SIZEOF_INT 4 + +/* The size of `long', as computed by sizeof. */ +#define SIZEOF_LONG 4 + +/* The size of `long long', as computed by sizeof. */ +#define SIZEOF_LONG_LONG 8 + +/* The size of `short', as computed by sizeof. */ +#define SIZEOF_SHORT 2 + +/* The size of `void *', as computed by sizeof. */ +#define SIZEOF_VOID_P 4 + +/* The size of `__int64', as computed by sizeof. */ +#define SIZEOF___INT64 0 + +/* Define to 1 if you have the ANSI C header files. */ +#define STDC_HEADERS 1 + +/* Define to 1 if on AIX 3. + System headers sometimes define this. + We just want to avoid a redefinition error message. */ +#ifndef _ALL_SOURCE +/* # undef _ALL_SOURCE */ +#endif + +/* Define to empty if `const' does not conform to ANSI C. */ +/* #undef const */ + +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +/* #undef inline */ +#endif diff --git a/src/tools/writelog.c b/src/tools/writelog.c new file mode 120000 index 0000000..398a074 --- /dev/null +++ b/src/tools/writelog.c @@ -0,0 +1 @@ +./../writelog.c \ No newline at end of file