mirror of
https://github.com/Oibaf66/uae-wii.git
synced 2024-06-03 00:58:47 +02:00
527 lines
15 KiB
C
527 lines
15 KiB
C
#define USE_ALIAS 1
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#define USE_F_ALIAS 1
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#define USE_SOFT_FLUSH 1
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#define USE_OFFSET 1
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#define COMP_DEBUG 1
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#if COMP_DEBUG
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#define Dif(x) if (x)
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#else
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#define Dif(x) if (0)
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#endif
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#define SCALE 2
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#define MAXCYCLES (1000 * CYCLE_UNIT)
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#define MAXREGOPT 65536
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#define BYTES_PER_INST 10240 /* paranoid ;-) */
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#define LONGEST_68K_INST 16 /* The number of bytes the longest possible
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68k instruction takes */
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#define MAX_CHECKSUM_LEN 2048 /* The maximum size we calculate checksums
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for. Anything larger will be flushed
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unconditionally even with SOFT_FLUSH */
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#define MAX_HOLD_BI 3 /* One for the current block, and up to two
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for jump targets */
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#define INDIVIDUAL_INST 0
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#define FLAG_C 0x0010
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#define FLAG_V 0x0008
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#define FLAG_Z 0x0004
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#define FLAG_N 0x0002
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#define FLAG_X 0x0001
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#define FLAG_CZNV (FLAG_C | FLAG_Z | FLAG_N | FLAG_V)
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#define FLAG_ZNV (FLAG_Z | FLAG_N | FLAG_V)
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#define KILLTHERAT 1 /* Set to 1 to avoid some partial_rat_stalls */
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/* Whether to preserve registers across calls to JIT compiled routines */
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#if defined X86_ASSEMBLY
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#define USE_PUSH_POP 0
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#else
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#define USE_PUSH_POP 1
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#endif
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#define N_REGS 8 /* really only 7, but they are numbered 0,1,2,3,5,6,7 */
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#define N_FREGS 6 /* That leaves us two positions on the stack to play with */
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/* Functions exposed to newcpu, or to what was moved from newcpu.c to
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* compemu_support.c */
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extern void init_comp(void);
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extern void flush(int save_regs);
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extern void small_flush(int save_regs);
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extern void set_target(uae_u8* t);
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extern void freescratch(void);
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extern void build_comp(void);
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extern void set_cache_state(int enabled);
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#ifdef JIT
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extern void flush_icache(int n);
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#endif
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extern void compile_block (const cpu_history *pc_hist, int blocklen, int totcyles);
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extern int check_for_cache_miss(void);
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#define scaled_cycles(x) (currprefs.m68k_speed==-1?(((x)/SCALE)?(((x)/SCALE<MAXCYCLES?((x)/SCALE):MAXCYCLES)):1):(x))
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extern uae_u32 needed_flags;
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extern cacheline cache_tags[];
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extern uae_u8* comp_pc_p;
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extern void* pushall_call_handler;
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#define VREGS 32
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#define VFREGS 16
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#define INMEM 1
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#define CLEAN 2
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#define DIRTY 3
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#define UNDEF 4
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#define ISCONST 5
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typedef struct {
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uae_u32* mem;
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uae_u32 val;
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uae_u8 is_swapped;
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uae_u8 status;
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uae_u8 realreg;
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uae_u8 realind; /* The index in the holds[] array */
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uae_u8 needflush;
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uae_u8 validsize;
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uae_u8 dirtysize;
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uae_u8 dummy;
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} reg_status;
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typedef struct {
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uae_u32* mem;
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double val;
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uae_u8 status;
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uae_u8 realreg;
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uae_u8 realind;
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uae_u8 needflush;
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} freg_status;
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typedef struct {
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uae_u8 use_flags;
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uae_u8 set_flags;
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uae_u8 is_jump;
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uae_u8 is_addx;
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uae_u8 is_const_jump;
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} op_properties;
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extern op_properties prop[65536];
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STATIC_INLINE int end_block(uae_u16 opcode)
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{
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return prop[opcode].is_jump ||
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(prop[opcode].is_const_jump && !currprefs.comp_constjump);
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}
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#define PC_P 16
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#define FLAGX 17
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#define FLAGTMP 18
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#define NEXT_HANDLER 19
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#define S1 20
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#define S2 21
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#define S3 22
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#define S4 23
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#define S5 24
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#define S6 25
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#define S7 26
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#define S8 27
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#define S9 28
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#define S10 29
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#define S11 30
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#define S12 31
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#define FP_RESULT 8
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#define FS1 9
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#define FS2 10
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#define FS3 11
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typedef struct {
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uae_u32 touched;
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uae_s8 holds[VREGS];
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uae_u8 nholds;
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uae_u8 canbyte;
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uae_u8 canword;
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uae_u8 locked;
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} n_status;
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typedef struct {
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uae_s8 holds;
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uae_u8 validsize;
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uae_u8 dirtysize;
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} n_smallstatus;
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typedef struct {
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uae_u32 touched;
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uae_s8 holds[VFREGS];
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uae_u8 nholds;
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uae_u8 locked;
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} fn_status;
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/* For flag handling */
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#define NADA 1
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#define TRASH 2
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#define VALID 3
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/* needflush values */
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#define NF_SCRATCH 0
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#define NF_TOMEM 1
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#define NF_HANDLER 2
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typedef struct {
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/* Integer part */
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reg_status state[VREGS];
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n_status nat[N_REGS];
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uae_u32 flags_on_stack;
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uae_u32 flags_in_flags;
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uae_u32 flags_are_important;
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/* FPU part */
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freg_status fate[VFREGS];
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fn_status fat[N_FREGS];
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/* x86 FPU part */
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uae_s8 spos[N_FREGS];
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uae_s8 onstack[6];
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uae_s8 tos;
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} bigstate;
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typedef struct {
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/* Integer part */
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n_smallstatus nat[N_REGS];
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} smallstate;
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extern bigstate live;
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#define IMM uae_u32
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#define R1 uae_u32
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#define R2 uae_u32
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#define R4 uae_u32
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#define W1 uae_u32
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#define W2 uae_u32
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#define W4 uae_u32
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#define RW1 uae_u32
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#define RW2 uae_u32
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#define RW4 uae_u32
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#define MEMR uae_u32
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#define MEMW uae_u32
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#define MEMRW uae_u32
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#define FW uae_u32
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#define FR uae_u32
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#define FRW uae_u32
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#define MIDFUNC(nargs,func,args) void func args
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#define MENDFUNC(nargs,func,args)
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#define COMPCALL(func) func
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#define LOWFUNC(flags,mem,nargs,func,args) STATIC_INLINE void func args
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#define LENDFUNC(flags,mem,nargs,func,args)
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#define DECLARE(func) extern void func
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/* What we expose to the outside */
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DECLARE(bt_l_ri(R4 r, IMM i));
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DECLARE(bt_l_rr(R4 r, R4 b));
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DECLARE(btc_l_ri(RW4 r, IMM i));
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DECLARE(btc_l_rr(RW4 r, R4 b));
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DECLARE(bts_l_ri(RW4 r, IMM i));
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DECLARE(bts_l_rr(RW4 r, R4 b));
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DECLARE(btr_l_ri(RW4 r, IMM i));
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DECLARE(btr_l_rr(RW4 r, R4 b));
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DECLARE(mov_l_rm(W4 d, IMM s));
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DECLARE(call_r(R4 r));
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DECLARE(sub_l_mi(IMM d, IMM s));
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DECLARE(mov_l_mi(IMM d, IMM s));
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DECLARE(mov_w_mi(IMM d, IMM s));
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DECLARE(mov_b_mi(IMM d, IMM s));
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DECLARE(rol_b_ri(RW1 r, IMM i));
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DECLARE(rol_w_ri(RW2 r, IMM i));
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DECLARE(rol_l_ri(RW4 r, IMM i));
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DECLARE(rol_l_rr(RW4 d, R1 r));
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DECLARE(rol_w_rr(RW2 d, R1 r));
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DECLARE(rol_b_rr(RW1 d, R1 r));
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DECLARE(shll_l_rr(RW4 d, R1 r));
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DECLARE(shll_w_rr(RW2 d, R1 r));
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DECLARE(shll_b_rr(RW1 d, R1 r));
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DECLARE(ror_b_ri(R1 r, IMM i));
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DECLARE(ror_w_ri(R2 r, IMM i));
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DECLARE(ror_l_ri(R4 r, IMM i));
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DECLARE(ror_l_rr(R4 d, R1 r));
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DECLARE(ror_w_rr(R2 d, R1 r));
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DECLARE(ror_b_rr(R1 d, R1 r));
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DECLARE(shrl_l_rr(RW4 d, R1 r));
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DECLARE(shrl_w_rr(RW2 d, R1 r));
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DECLARE(shrl_b_rr(RW1 d, R1 r));
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DECLARE(shra_l_rr(RW4 d, R1 r));
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DECLARE(shra_w_rr(RW2 d, R1 r));
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DECLARE(shra_b_rr(RW1 d, R1 r));
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DECLARE(shll_l_ri(RW4 r, IMM i));
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DECLARE(shll_w_ri(RW2 r, IMM i));
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DECLARE(shll_b_ri(RW1 r, IMM i));
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DECLARE(shrl_l_ri(RW4 r, IMM i));
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DECLARE(shrl_w_ri(RW2 r, IMM i));
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DECLARE(shrl_b_ri(RW1 r, IMM i));
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DECLARE(shra_l_ri(RW4 r, IMM i));
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DECLARE(shra_w_ri(RW2 r, IMM i));
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DECLARE(shra_b_ri(RW1 r, IMM i));
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DECLARE(setcc(W1 d, IMM cc));
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DECLARE(setcc_m(IMM d, IMM cc));
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DECLARE(cmov_l_rr(RW4 d, R4 s, IMM cc));
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DECLARE(cmov_l_rm(RW4 d, IMM s, IMM cc));
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DECLARE(bsf_l_rr(W4 d, R4 s));
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DECLARE(pop_m(IMM d));
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DECLARE(push_m(IMM d));
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DECLARE(pop_l(W4 d));
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DECLARE(push_l_i(IMM i));
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DECLARE(push_l(R4 s));
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DECLARE(clear_16(RW4 r));
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DECLARE(clear_8(RW4 r));
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DECLARE(sign_extend_16_rr(W4 d, R2 s));
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DECLARE(sign_extend_8_rr(W4 d, R1 s));
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DECLARE(zero_extend_16_rr(W4 d, R2 s));
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DECLARE(zero_extend_8_rr(W4 d, R1 s));
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DECLARE(imul_64_32(RW4 d, RW4 s));
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DECLARE(mul_64_32(RW4 d, RW4 s));
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DECLARE(imul_32_32(RW4 d, R4 s));
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DECLARE(mul_32_32(RW4 d, R4 s));
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DECLARE(mov_b_rr(W1 d, R1 s));
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DECLARE(mov_w_rr(W2 d, R2 s));
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DECLARE(mov_l_rrm_indexed(W4 d,R4 baser, R4 index, IMM factor));
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DECLARE(mov_w_rrm_indexed(W2 d, R4 baser, R4 index, IMM factor));
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DECLARE(mov_b_rrm_indexed(W1 d, R4 baser, R4 index, IMM factor));
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DECLARE(mov_l_mrr_indexed(R4 baser, R4 index, IMM factor, R4 s));
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DECLARE(mov_w_mrr_indexed(R4 baser, R4 index, IMM factor, R2 s));
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DECLARE(mov_b_mrr_indexed(R4 baser, R4 index, IMM factor, R1 s));
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DECLARE(mov_l_bmrr_indexed(IMM base, R4 baser, R4 index, IMM factor, R4 s));
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DECLARE(mov_w_bmrr_indexed(IMM base, R4 baser, R4 index, IMM factor, R2 s));
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DECLARE(mov_b_bmrr_indexed(IMM base, R4 baser, R4 index, IMM factor, R1 s));
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DECLARE(mov_l_brrm_indexed(W4 d, IMM base, R4 baser, R4 index, IMM factor));
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DECLARE(mov_w_brrm_indexed(W2 d, IMM base, R4 baser, R4 index, IMM factor));
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DECLARE(mov_b_brrm_indexed(W1 d, IMM base, R4 baser, R4 index, IMM factor));
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DECLARE(mov_l_rm_indexed(W4 d, IMM base, R4 index, IMM factor));
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DECLARE(mov_l_rR(W4 d, R4 s, IMM offset));
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DECLARE(mov_w_rR(W2 d, R4 s, IMM offset));
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DECLARE(mov_b_rR(W1 d, R4 s, IMM offset));
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DECLARE(mov_l_brR(W4 d, R4 s, IMM offset));
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DECLARE(mov_w_brR(W2 d, R4 s, IMM offset));
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DECLARE(mov_b_brR(W1 d, R4 s, IMM offset));
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DECLARE(mov_l_Ri(R4 d, IMM i, IMM offset));
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DECLARE(mov_w_Ri(R4 d, IMM i, IMM offset));
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DECLARE(mov_b_Ri(R4 d, IMM i, IMM offset));
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DECLARE(mov_l_Rr(R4 d, R4 s, IMM offset));
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DECLARE(mov_w_Rr(R4 d, R2 s, IMM offset));
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DECLARE(mov_b_Rr(R4 d, R1 s, IMM offset));
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DECLARE(lea_l_brr(W4 d, R4 s, IMM offset));
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DECLARE(lea_l_brr_indexed(W4 d, R4 s, R4 index, IMM factor, IMM offset));
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DECLARE(lea_l_rr_indexed(W4 d, R4 s, R4 index, IMM factor));
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DECLARE(mov_l_bRr(R4 d, R4 s, IMM offset));
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DECLARE(mov_w_bRr(R4 d, R2 s, IMM offset));
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DECLARE(mov_b_bRr(R4 d, R1 s, IMM offset));
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DECLARE(gen_bswap_32(RW4 r));
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DECLARE(gen_bswap_16(RW2 r));
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DECLARE(mov_l_rr(W4 d, R4 s));
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DECLARE(mov_l_mr(IMM d, R4 s));
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DECLARE(mov_w_mr(IMM d, R2 s));
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DECLARE(mov_w_rm(W2 d, IMM s));
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DECLARE(mov_b_mr(IMM d, R1 s));
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DECLARE(mov_b_rm(W1 d, IMM s));
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DECLARE(mov_l_ri(W4 d, IMM s));
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DECLARE(mov_w_ri(W2 d, IMM s));
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DECLARE(mov_b_ri(W1 d, IMM s));
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DECLARE(add_l_mi(IMM d, IMM s) );
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DECLARE(add_w_mi(IMM d, IMM s) );
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DECLARE(add_b_mi(IMM d, IMM s) );
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DECLARE(test_l_ri(R4 d, IMM i));
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DECLARE(test_l_rr(R4 d, R4 s));
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DECLARE(test_w_rr(R2 d, R2 s));
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DECLARE(test_b_rr(R1 d, R1 s));
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DECLARE(and_l_ri(RW4 d, IMM i));
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DECLARE(and_l(RW4 d, R4 s));
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DECLARE(and_w(RW2 d, R2 s));
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DECLARE(and_b(RW1 d, R1 s));
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DECLARE(or_l_ri(RW4 d, IMM i));
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DECLARE(or_l(RW4 d, R4 s));
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DECLARE(or_w(RW2 d, R2 s));
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DECLARE(or_b(RW1 d, R1 s));
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DECLARE(adc_l(RW4 d, R4 s));
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DECLARE(adc_w(RW2 d, R2 s));
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DECLARE(adc_b(RW1 d, R1 s));
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DECLARE(add_l(RW4 d, R4 s));
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DECLARE(add_w(RW2 d, R2 s));
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DECLARE(add_b(RW1 d, R1 s));
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DECLARE(sub_l_ri(RW4 d, IMM i));
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DECLARE(sub_w_ri(RW2 d, IMM i));
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DECLARE(sub_b_ri(RW1 d, IMM i));
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DECLARE(add_l_ri(RW4 d, IMM i));
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DECLARE(add_w_ri(RW2 d, IMM i));
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DECLARE(add_b_ri(RW1 d, IMM i));
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DECLARE(sbb_l(RW4 d, R4 s));
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DECLARE(sbb_w(RW2 d, R2 s));
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DECLARE(sbb_b(RW1 d, R1 s));
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DECLARE(sub_l(RW4 d, R4 s));
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DECLARE(sub_w(RW2 d, R2 s));
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DECLARE(sub_b(RW1 d, R1 s));
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DECLARE(cmp_l(R4 d, R4 s));
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DECLARE(cmp_l_ri(R4 r, IMM i));
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DECLARE(cmp_w(R2 d, R2 s));
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DECLARE(cmp_b(R1 d, R1 s));
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DECLARE(xor_l(RW4 d, R4 s));
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DECLARE(xor_w(RW2 d, R2 s));
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DECLARE(xor_b(RW1 d, R1 s));
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DECLARE(live_flags(void));
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DECLARE(dont_care_flags(void));
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DECLARE(duplicate_carry(void));
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DECLARE(restore_carry(void));
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DECLARE(start_needflags(void));
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DECLARE(end_needflags(void));
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DECLARE(make_flags_live(void));
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DECLARE(call_r_11(R4 r, W4 out1, R4 in1, IMM osize, IMM isize));
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DECLARE(call_r_02(R4 r, R4 in1, R4 in2, IMM isize1, IMM isize2));
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DECLARE(readmem_new(R4 address, W4 dest, IMM offset, IMM size, W4 tmp));
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DECLARE(writemem_new(R4 address, R4 source, IMM offset, IMM size, W4 tmp));
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DECLARE(forget_about(W4 r));
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DECLARE(nop(void));
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DECLARE(f_forget_about(FW r));
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DECLARE(fmov_pi(FW r));
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DECLARE(fmov_log10_2(FW r));
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DECLARE(fmov_log2_e(FW r));
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DECLARE(fmov_loge_2(FW r));
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DECLARE(fmov_1(FW r));
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DECLARE(fmov_0(FW r));
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DECLARE(fmov_rm(FW r, MEMR m));
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DECLARE(fmovi_rm(FW r, MEMR m));
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DECLARE(fmovi_mr(MEMW m, FR r));
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DECLARE(fmovs_rm(FW r, MEMR m));
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DECLARE(fmovs_mr(MEMW m, FR r));
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DECLARE(fmov_mr(MEMW m, FR r));
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DECLARE(fmov_ext_mr(MEMW m, FR r));
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DECLARE(fmov_ext_rm(FW r, MEMR m));
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DECLARE(fmov_rr(FW d, FR s));
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DECLARE(fldcw_m_indexed(R4 index, IMM base));
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DECLARE(ftst_r(FR r));
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DECLARE(dont_care_fflags(void));
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DECLARE(fsqrt_rr(FW d, FR s));
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DECLARE(fabs_rr(FW d, FR s));
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DECLARE(frndint_rr(FW d, FR s));
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DECLARE(fsin_rr(FW d, FR s));
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DECLARE(fcos_rr(FW d, FR s));
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DECLARE(ftwotox_rr(FW d, FR s));
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DECLARE(fetox_rr(FW d, FR s));
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DECLARE(flog2_rr(FW d, FR s));
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DECLARE(fneg_rr(FW d, FR s));
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DECLARE(fadd_rr(FRW d, FR s));
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DECLARE(fsub_rr(FRW d, FR s));
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DECLARE(fmul_rr(FRW d, FR s));
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DECLARE(frem_rr(FRW d, FR s));
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DECLARE(frem1_rr(FRW d, FR s));
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DECLARE(fdiv_rr(FRW d, FR s));
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DECLARE(fcmp_rr(FR d, FR s));
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DECLARE(fflags_into_flags(W2 tmp));
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|
|
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extern int failure;
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#define FAIL(x) do { failure|=x; } while (0)
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|
|
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/* Convenience functions exposed to gencomp */
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extern uae_u32 m68k_pc_offset;
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|
|
|
extern void readbyte(int address, int dest, int tmp);
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extern void readword(int address, int dest, int tmp);
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extern void readlong(int address, int dest, int tmp);
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|
|
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extern void writebyte (int address, int source, int tmp);
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extern void writeword_general (int address, int source, int tmp, int clobber);
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extern void writelong_general (int address, int source, int tmp, int clobber);
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|
|
|
#define writeword(address, source, tmp) writeword_general (address, source, tmp, 0)
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|
#define writelong(address, source, tmp) writelong_general (address, source, tmp, 0)
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|
#define writeword_clobber(address, source, tmp) writeword_general (address, source, tmp, 1)
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|
#define writelong_clobber(address, source, tmp) writelong_general (address, source, tmp, 1)
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|
|
|
extern void get_n_addr(int address, int dest, int tmp);
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|
extern void get_n_addr_jmp(int address, int dest, int tmp);
|
|
extern void calc_disp_ea_020(int base, uae_u32 dp, int target, int tmp);
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|
extern int kill_rodent(int r);
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|
extern void sync_m68k_pc(void);
|
|
extern uae_u32 get_const(int r);
|
|
extern int is_const(int r);
|
|
extern void register_branch(uae_u32 not_taken, uae_u32 taken, uae_u8 cond);
|
|
extern void empty_optimizer(void);
|
|
|
|
#define comp_get_ibyte(o) do_get_mem_byte((uae_u8 *)(comp_pc_p + (o) + 1))
|
|
#define comp_get_iword(o) do_get_mem_word((uae_u16 *)(comp_pc_p + (o)))
|
|
#define comp_get_ilong(o) do_get_mem_long((uae_u32 *)(comp_pc_p + (o)))
|
|
|
|
/* Preferences handling */
|
|
void check_prefs_changed_comp (void);
|
|
|
|
struct blockinfo_t;
|
|
|
|
typedef struct dep_t {
|
|
uae_u32* jmp_off;
|
|
struct blockinfo_t* target;
|
|
struct dep_t** prev_p;
|
|
struct dep_t* next;
|
|
} dependency;
|
|
|
|
typedef struct blockinfo_t {
|
|
uae_s32 count;
|
|
cpuop_func* direct_handler_to_use;
|
|
cpuop_func* handler_to_use;
|
|
/* The direct handler does not check for the correct address */
|
|
|
|
cpuop_func* handler;
|
|
cpuop_func* direct_handler;
|
|
|
|
cpuop_func* direct_pen;
|
|
cpuop_func* direct_pcc;
|
|
|
|
uae_u8* nexthandler;
|
|
uae_u8* pc_p;
|
|
|
|
uae_u32 c1;
|
|
uae_u32 c2;
|
|
uae_u32 len;
|
|
|
|
struct blockinfo_t* next_same_cl;
|
|
struct blockinfo_t** prev_same_cl_p;
|
|
struct blockinfo_t* next;
|
|
struct blockinfo_t** prev_p;
|
|
|
|
uae_u32 min_pcp;
|
|
uae_u8 optlevel;
|
|
uae_u8 needed_flags;
|
|
uae_u8 status;
|
|
uae_u8 havestate;
|
|
|
|
dependency dep[2]; /* Holds things we depend on */
|
|
dependency* deplist; /* List of things that depend on this */
|
|
smallstate env;
|
|
} blockinfo;
|
|
|
|
#define BI_NEW 0
|
|
#define BI_COUNTING 1
|
|
#define BI_TARGETTED 2
|
|
|
|
typedef struct {
|
|
uae_u8 type;
|
|
uae_u8 reg;
|
|
uae_u32 next;
|
|
} regacc;
|
|
|
|
void execute_normal(void);
|
|
void exec_nostats(void);
|
|
void do_nothing(void);
|
|
MIDFUNC(1,setzflg_l,(RW4 r));
|
|
|
|
void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra);
|
|
void comp_fscc_opp (uae_u32 opcode, uae_u16 extra);
|
|
void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc);
|
|
void comp_fbcc_opp (uae_u32 opcode);
|
|
void comp_fsave_opp (uae_u32 opcode);
|
|
void comp_frestore_opp (uae_u32 opcode);
|
|
void comp_fpp_opp (uae_u32 opcode, uae_u16 extra);
|