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231 lines
7.7 KiB
C
231 lines
7.7 KiB
C
/* stm32.h
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*
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* Copyright (C) 2006-2025 wolfSSL Inc.
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*
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* This file is part of wolfSSL.
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*
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* wolfSSL is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfSSL is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifndef _WOLFPORT_STM32_H_
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#define _WOLFPORT_STM32_H_
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/* Generic STM32 Hashing and Crypto Functions */
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/* Supports CubeMX HAL or Standard Peripheral Library */
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#include <wolfssl/wolfcrypt/settings.h>
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#include <wolfssl/wolfcrypt/types.h> /* for MATH_INT_T */
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#ifdef STM32_HASH
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#define WOLFSSL_NO_HASH_RAW
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#ifdef HASH_DIGEST
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/* The HASH_DIGEST register indicates SHA224/SHA256 support */
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#define STM32_HASH_SHA2
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#if defined(WOLFSSL_STM32H5) || defined(WOLFSSL_STM32MP13)
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#define HASH_CR_SIZE 103
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#define HASH_MAX_DIGEST 64 /* Up to SHA512 */
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#else
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#define HASH_CR_SIZE 54
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#define HASH_MAX_DIGEST 32
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#endif
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#if defined(WOLFSSL_STM32MP13) || defined(WOLFSSL_STM32H7S)
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#define STM32_HASH_SHA512
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#define STM32_HASH_SHA512_224
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#define STM32_HASH_SHA512_256
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#define STM32_HASH_SHA384
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#endif
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#if defined(WOLFSSL_STM32MP13)
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#define STM32_HASH_SHA3
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#endif
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#else
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#define HASH_CR_SIZE 50
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#define HASH_MAX_DIGEST 20
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#endif
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/* Handle hash differences between CubeMX and StdPeriLib */
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#if !defined(HASH_ALGOMODE_HASH) && defined(HASH_AlgoMode_HASH)
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#define HASH_ALGOMODE_HASH HASH_AlgoMode_HASH
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#endif
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#if !defined(HASH_DATATYPE_8B)
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#if defined(HASH_DataType_8b)
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#define HASH_DATATYPE_8B HASH_DataType_8b
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#elif defined(HASH_BYTE_SWAP)
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#define HASH_DATATYPE_8B HASH_BYTE_SWAP
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#endif
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#endif
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#ifndef HASH_STR_NBW
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#define HASH_STR_NBW HASH_STR_NBLW
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#endif
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#ifndef STM32_HASH_TIMEOUT
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#define STM32_HASH_TIMEOUT 0xFFFF
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#endif
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/* STM32 register size in bytes */
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#define STM32_HASH_REG_SIZE 4
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/* Maximum FIFO buffer is 64 bits for SHA256, 128 bits for SHA512 and 144 bits
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* for SHA3 */
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#if defined(STM32_HASH_SHA3)
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#define STM32_HASH_FIFO_SIZE 36
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#elif defined(STM32_HASH_SHA512) || defined(STM32_HASH_SHA384)
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#define STM32_HASH_FIFO_SIZE 32
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#else
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#define STM32_HASH_FIFO_SIZE 16
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#endif
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/* STM32 Hash Context */
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typedef struct {
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/* Context switching registers */
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uint32_t HASH_IMR;
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uint32_t HASH_STR;
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uint32_t HASH_CR;
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uint32_t HASH_CSR[HASH_CR_SIZE];
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#ifdef STM32_HASH_SHA3
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uint32_t SHA3CFGR;
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#endif
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/* Hash state / buffers */
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word32 buffer[STM32_HASH_FIFO_SIZE+1]; /* partial word buffer */
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word32 buffLen; /* partial word remain */
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word32 loLen; /* total update bytes
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(only lsb 6-bits is used for nbr valid bytes in last word) */
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word32 fifoBytes; /* number of currently filled FIFO bytes */
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} STM32_HASH_Context;
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/* API's */
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void wc_Stm32_Hash_Init(STM32_HASH_Context* stmCtx);
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int wc_Stm32_Hash_Update(STM32_HASH_Context* stmCtx, word32 algo,
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const byte* data, word32 len, word32 blockSize);
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int wc_Stm32_Hash_Final(STM32_HASH_Context* stmCtx, word32 algo,
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byte* hash, word32 digestSize);
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#endif /* STM32_HASH */
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#ifdef STM32_CRYPTO
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#if defined(WOLFSSL_STM32MP13)
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#define RNG RNG1
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#define CRYP CRYP1
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#define hcryp hcryp1
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#define FORMAT_BIN RTC_FORMAT_BIN
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#define __HAL_RCC_RNG_CLK_ENABLE __HAL_RCC_RNG1_CLK_ENABLE
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#define __HAL_RCC_HASH_CLK_ENABLE __HAL_RCC_HASH1_CLK_ENABLE
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#define __HAL_RCC_HASH_CLK_DISABLE __HAL_RCC_HASH1_CLK_DISABLE
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/* From stm32_hal_legacy.h, but that header has a bug in it */
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#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
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#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
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#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
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#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
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#define STM32_NOMD5 /* The HASH HAL has no MD5 implementation */
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#endif
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#ifndef NO_AES
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#if !defined(STM32_CRYPTO_AES_GCM) && (defined(WOLFSSL_STM32F4) || \
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defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L4) || \
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defined(WOLFSSL_STM32L5) || defined(WOLFSSL_STM32H7) || \
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defined(WOLFSSL_STM32U5) || defined(WOLFSSL_STM32H5) || \
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defined(WOLFSSL_STM32MP13) || defined(WOLFSSL_STM32H7S))
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/* Hardware supports AES GCM acceleration */
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#define STM32_CRYPTO_AES_GCM
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#endif
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#if defined(WOLFSSL_STM32WB) || defined(WOLFSSL_STM32WL) || \
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defined(WOLFSSL_STM32WBA)
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#define STM32_CRYPTO_AES_ONLY /* crypto engine only supports AES */
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#ifdef WOLFSSL_STM32WB
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#define CRYP AES1
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#else
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#define CRYP AES
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#endif
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#define STM32_HAL_V2
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#endif
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#if defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) || \
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defined(WOLFSSL_STM32U5) || defined(WOLFSSL_STM32H5)
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#if defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32U5)
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#define STM32_CRYPTO_AES_ONLY /* crypto engine only supports AES */
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#endif
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#if defined(WOLFSSL_STM32H5)
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#define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
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#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
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#endif
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#define CRYP AES
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#ifndef CRYP_AES_GCM
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#define CRYP_AES_GCM CRYP_AES_GCM_GMAC
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#endif
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#endif
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/* Detect newer CubeMX crypto HAL (HAL_CRYP_Encrypt / HAL_CRYP_Decrypt) */
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#if !defined(STM32_HAL_V2) && defined(CRYP_AES_GCM) && \
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(defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L5) || \
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defined(WOLFSSL_STM32H7) || defined(WOLFSSL_STM32U5) || \
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defined(WOLFSSL_STM32H5) || defined(WOLFSSL_STM32MP13) || \
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defined(WOLFSSL_STM32H7S))
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#define STM32_HAL_V2
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#endif
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/* The datatype for STM32 CubeMX HAL Crypt calls */
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#ifdef STM32_HAL_V2
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#define STM_CRYPT_TYPE uint32_t
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#else
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#define STM_CRYPT_TYPE uint8_t
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#endif
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/* Determine minimum AES GCM alignment supported */
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#ifndef STM_CRYPT_HEADER_WIDTH
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/* newer crypt HAL requires auth header size as 4 bytes (word) */
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#if defined(CRYP_HEADERWIDTHUNIT_BYTE) && \
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!defined(WOLFSSL_STM32MP13) && !defined(WOLFSSL_STM32H7S)
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#define STM_CRYPT_HEADER_WIDTH 1
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#else
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#define STM_CRYPT_HEADER_WIDTH 4
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#endif
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#endif
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/* CRYPT_AES_GCM starts the IV with 2 */
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#define STM32_GCM_IV_START 2
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struct Aes;
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#ifdef WOLFSSL_STM32_CUBEMX
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int wc_Stm32_Aes_Init(struct Aes* aes, CRYP_HandleTypeDef* hcryp);
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void wc_Stm32_Aes_Cleanup(void);
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#else /* Standard Peripheral Library */
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int wc_Stm32_Aes_Init(struct Aes* aes, CRYP_InitTypeDef* cryptInit,
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CRYP_KeyInitTypeDef* keyInit);
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void wc_Stm32_Aes_Cleanup(void);
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#endif /* WOLFSSL_STM32_CUBEMX */
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#endif /* !NO_AES */
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#endif /* STM32_CRYPTO */
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#if defined(WOLFSSL_STM32_PKA) && defined(HAVE_ECC)
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struct ecc_key;
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struct WC_RNG;
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int stm32_ecc_verify_hash_ex(MATH_INT_T *r, MATH_INT_T *s, const byte* hash,
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word32 hashlen, int* res, struct ecc_key* key);
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int stm32_ecc_sign_hash_ex(const byte* hash, word32 hashlen, struct WC_RNG* rng,
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struct ecc_key* key, MATH_INT_T *r, MATH_INT_T *s);
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#endif /* WOLFSSL_STM32_PKA && HAVE_ECC */
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#endif /* _WOLFPORT_STM32_H_ */
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