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Silence build warnings (#454)

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bladeoner 2023-03-22 20:12:50 +01:00 committed by GitHub
parent d0f39ffe6b
commit 1124f2be32
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11 changed files with 66 additions and 66 deletions
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4
.github/workflows/build.yml vendored
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@ -20,7 +20,7 @@ jobs:
- name: Build Wii
if: ${{ matrix.image == 'Wii' }}
run: |
make -f Makefile.wii -j2
make -f Makefile.wii -j1
- name: Copy Wii artifacts
if: ${{ matrix.image == 'Wii' }}
@ -44,7 +44,7 @@ jobs:
- name: Build GameCube
if: ${{ matrix.image == 'GameCube' }}
run: |
make -f Makefile.gc -j2
make -f Makefile.gc -j1
- name: Copy GameCube artifact
if: ${{ matrix.image == 'GameCube' }}

2
Makefile.gc
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@ -38,7 +38,7 @@ CFLAGS = -g -O3 -Wall $(MACHDEP) $(INCLUDE) `freetype-config --cflags` \
-Wno-unused-parameter -Wno-strict-aliasing -Wno-parentheses -Wno-format -Wno-stringop-truncation \
-Wno-maybe-uninitialized -Wno-unused-but-set-variable -Wno-stringop-overflow -Wno-narrowing \
-Wno-misleading-indentation -Wno-unused-function -Wno-sign-compare -Wno-unused-variable \
-Wno-memset-elt-size -Wno-attributes -Wno-tautological-compare
-Wno-memset-elt-size -Wno-attributes -Wno-tautological-compare -Wno-infinite-recursion
CXXFLAGS = $(CFLAGS) -Wno-reorder
LDFLAGS = -g $(MACHDEP) -Wl,-Map,$(notdir $@).map
LDFLAGS += -L../buildtools

2
Makefile.wii
View File

@ -38,7 +38,7 @@ CFLAGS = -g -O3 -Wall $(MACHDEP) $(INCLUDE) `freetype-config --cflags` \
-Wno-unused-parameter -Wno-strict-aliasing -Wno-parentheses -Wno-format -Wno-stringop-truncation \
-Wno-maybe-uninitialized -Wno-unused-but-set-variable -Wno-stringop-overflow -Wno-narrowing \
-Wno-misleading-indentation -Wno-unused-function -Wno-sign-compare -Wno-unused-variable \
-Wno-memset-elt-size -Wno-attributes -Wno-tautological-compare
-Wno-memset-elt-size -Wno-attributes -Wno-tautological-compare -Wno-infinite-recursion
CXXFLAGS = $(CFLAGS) -Wno-reorder
LDFLAGS = -g $(MACHDEP) -Wl,-Map,$(notdir $@).map
LDFLAGS += -L../buildtools

4
source/gameinput.h
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@ -119,8 +119,8 @@
#define MARBLEMADNESS 0xFF000A
u8 gbReadMemory(register u16 address);
void gbWriteMemory(register u16 address, register u8 value);
u8 gbReadMemory(u16 address);
void gbWriteMemory(u16 address, u8 value);
u32 StandardDPad(unsigned short pad);
u32 StandardMovement(unsigned short pad);

22
source/goomba/minilzo-2.06/minilzo.cpp
View File

@ -3168,7 +3168,7 @@ do_compress ( const lzo_bytep in , lzo_uint in_len,
lzo_bytep out, lzo_uintp out_len,
lzo_uint ti, lzo_voidp wrkmem)
{
register const lzo_bytep ip;
const lzo_bytep ip;
lzo_bytep op;
const lzo_bytep const in_end = in + in_len;
const lzo_bytep const ip_end = in + in_len - 20;
@ -3241,7 +3241,7 @@ next:
ii -= ti; ti = 0;
{
register lzo_uint t = pd(ip,ii);
lzo_uint t = pd(ip,ii);
if (t != 0)
{
if (t <= 3)
@ -3276,7 +3276,7 @@ next:
*op++ = LZO_BYTE(t - 3);
else
{
register lzo_uint tt = t - 18;
lzo_uint tt = t - 18;
*op++ = 0;
while __lzo_unlikely(tt > 255)
{
@ -3623,14 +3623,14 @@ DO_DECOMPRESS ( const lzo_bytep in , lzo_uint in_len,
lzo_voidp wrkmem )
#endif
{
register lzo_bytep op;
register const lzo_bytep ip;
register lzo_uint t;
lzo_bytep op;
const lzo_bytep ip;
lzo_uint t;
#if defined(COPY_DICT)
lzo_uint m_off;
const lzo_bytep dict_end;
#else
register const lzo_bytep m_pos;
const lzo_bytep m_pos;
#endif
const lzo_bytep const ip_end = in + in_len;
@ -4149,14 +4149,14 @@ DO_DECOMPRESS ( const lzo_bytep in , lzo_uint in_len,
lzo_voidp wrkmem )
#endif
{
register lzo_bytep op;
register const lzo_bytep ip;
register lzo_uint t;
lzo_bytep op;
const lzo_bytep ip;
lzo_uint t;
#if defined(COPY_DICT)
lzo_uint m_off;
const lzo_bytep dict_end;
#else
register const lzo_bytep m_pos;
const lzo_bytep m_pos;
#endif
const lzo_bytep const ip_end = in + in_len;

8
source/vba/gb/GB.cpp
View File

@ -704,7 +704,7 @@ void gbCompareLYToLYC()
}
}
void gbWriteMemory(register u16 address, register u8 value)
void gbWriteMemory(u16 address, u8 value)
{
if(address < 0x8000) {
@ -1563,7 +1563,7 @@ void gbWriteMemory(register u16 address, register u8 value)
gbMemory[address] = value;
}
u8 gbReadOpcode(register u16 address)
u8 gbReadOpcode(u16 address)
{
if(gbCheatMap[address])
return gbCheatRead(address);
@ -1728,7 +1728,7 @@ u8 gbReadOpcode(register u16 address)
return gbMemoryMap[address>>12][address & 0x0fff];
}
u8 gbReadMemory(register u16 address)
u8 gbReadMemory(u16 address)
{
if(gbCheatMap[address])
return gbCheatRead(address);
@ -4500,7 +4500,7 @@ void gbEmulate(int ticksToStop)
clockTicks = 0;
gbDmaTicks = 0;
register int opcode = 0;
int opcode = 0;
int opcode1 = 0;
int opcode2 = 0;

2
source/vba/gb/gb.h
View File

@ -24,7 +24,7 @@ int gbDis(char *, u16);
bool gbLoadRom(const char *);
bool gbUpdateSizes();
void gbEmulate(int);
void gbWriteMemory(register u16, register u8);
void gbWriteMemory(u16, u8);
void gbDrawLine();
bool gbIsGameboyRom(const char *);
void gbGetHardwareType();

6
source/vba/gb/gbSGB.cpp
View File

@ -117,7 +117,7 @@ void gbSgbFillScreen(u16 color)
int yLine = (y+gbBorderRowSkip+1)*(gbBorderLineSkip+2) +
gbBorderColumnSkip;
u16 *dest = (u16*)pix + yLine;
for(register int x = 0; x < 160; x++)
for(int x = 0; x < 160; x++)
gbSgbDraw16Bit(dest++, color);
}
}
@ -127,7 +127,7 @@ void gbSgbFillScreen(u16 color)
for(int y = 0; y < 144; y++) {
int yLine = (y+gbBorderRowSkip)*gbBorderLineSkip + gbBorderColumnSkip;
u8 *dest = (u8 *)pix + yLine*3;
for(register int x = 0; x < 160; x++) {
for(int x = 0; x < 160; x++) {
gbSgbDraw24Bit(dest, color);
dest += 3;
}
@ -139,7 +139,7 @@ void gbSgbFillScreen(u16 color)
for(int y = 0; y < 144; y++) {
int yLine = (y+gbBorderRowSkip+1)*(gbBorderLineSkip+1) + gbBorderColumnSkip;
u32 *dest = (u32 *)pix + yLine;
for(register int x = 0; x < 160; x++) {
for(int x = 0; x < 160; x++) {
gbSgbDraw32Bit(dest++, color);
}
}

2
source/vba/gb/gbSound.cpp
View File

@ -37,7 +37,7 @@ u8 gbSoundRead( u16 address )
return gbMemory[address];
}
void gbSoundEvent(register u16 address, register int data)
void gbSoundEvent(u16 address, int data)
{
gbMemory[address] = data;

32
source/vba/gba/GBA-arm.cpp
View File

@ -139,8 +139,8 @@ static void count(u32 opcode, int cond_res)
//#ifdef __POWERPC__
#define OP_SUBS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -157,8 +157,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_RSBS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subfco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -175,8 +175,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_ADDS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -193,8 +193,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_ADCS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("mtspr xer, %4\n" \
"addeo. %0, %2, %3\n" \
"mcrxr cr1\n" \
@ -213,8 +213,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_SBCS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("mtspr xer, %4\n" \
"subfeo. %0, %3, %2\n" \
"mcrxr cr1\n" \
@ -233,8 +233,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_RSCS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("mtspr xer, %4\n" \
"subfeo. %0, %2, %3\n" \
"mcrxr cr1\n" \
@ -253,8 +253,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_CMP \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -270,8 +270,8 @@ static void count(u32 opcode, int cond_res)
}
#define OP_CMN \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \

48
source/vba/gba/GBA-thumb.cpp
View File

@ -80,8 +80,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
#ifdef __POWERPC__
#define ADD_RD_RS_RN(N) \
{ \
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -98,8 +98,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define ADD_RD_RS_O3(N) \
{ \
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -117,8 +117,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
#define ADD_RD_RS_O3_0 ADD_RD_RS_O3
#define ADD_RN_O8(d) \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -135,8 +135,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define CMN_RD_RS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("addco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -152,8 +152,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define ADC_RD_RS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("mtspr 1, %4\n" \ /* reg 1 is xer */
"addeo. %0, %2, %3\n" \
"mcrxr cr1\n" \
@ -172,8 +172,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define SUB_RD_RS_RN(N) \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -190,8 +190,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define SUB_RD_RS_O3(N) \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -209,8 +209,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
#define SUB_RD_RS_O3_0 SUB_RD_RS_O3
#define SUB_RN_O8(d) \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -227,8 +227,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define CMP_RN_O8(d) \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -244,8 +244,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define SBC_RD_RS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("mtspr 1, %4\n" \ /* reg 1 is xer */
"subfeo. %0, %3, %2\n" \
"mcrxr cr1\n" \
@ -264,8 +264,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define NEG_RD_RS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subfco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \
@ -282,8 +282,8 @@ static INSN_REGPARM void thumbBreakpoint(u32 opcode)
}
#define CMP_RD_RS \
{\
register int Flags; \
register int Result; \
int Flags; \
int Result; \
asm volatile("subco. %0, %2, %3\n" \
"mcrxr cr1\n" \
"mfcr %1\n" \