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203 lines
6.2 KiB
C
203 lines
6.2 KiB
C
#pragma once
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#include <wut.h>
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/**
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* \defgroup coreinit_cache Cache
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* \ingroup coreinit
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*
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* Interface to the low-level caching system of the PowerPC processor.
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*
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* The cache acts as a middleman between main
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* memory and the processor, speeding up access to frequently-used data.
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* However, the Wii U is not cache-coherent - written data may be cached
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* without updating main memory, and data read from the cache may be out of date
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* with respect to memory. While this isn't a problem for most code, certain
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* hardware accesses may require manual synchronisation of the cache. This is
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* achieved with coreinit's Cache group of functions.
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*
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* Since the PowerPC has a seperate cache for data and instructions, any data
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* written with the intent of executing it as instructions requires manual
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* flushing and invalidation of the data and instruction caches.
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* @{
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Invalidates a range of cached data, in blocks. Equivalent to a loop of
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* PowerPC \c dcbi instructions.
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*
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* This function forces the next reads from the given address to bypass the
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* the cache and go straight to memory, resulting in slower reads that are
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* guaranteed to reflect main memory.
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*
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* \param addr
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* The effective address of the data to invalidate.
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*
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* \param size
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* The size of the range to invalidate. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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DCInvalidateRange(void *addr,
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uint32_t size);
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/**
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* Flushes a range of cached data, in blocks. Equivalent to a loop of PowerPC
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* \c dcbf instructions, followed by a \c sync and \c eieio.
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*
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* This function flushes any recently cached data into main memory.
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* This allows other hardware in the console to read the data without worry
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* of main memory being outdated. It will also invalidate cached data.
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*
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* \param addr
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* The effective address of the data to flush.
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*
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* \param size
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* The size of the range to flush. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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DCFlushRange(void *addr,
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uint32_t size);
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/**
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* Stores a range of cached data, in blocks. Equivalent to a loop of PowerPC
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* \c dcbst instructions, followed by a \c sync and \c eieio.
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*
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* This function writes any recently cached data into main memory.
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* This allows other hardware in the console to read the data without worry
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* of main memory being outdated. This function does <em>not</em> invalidate
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* the cached data.
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*
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* \param addr
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* The effective address of the data to store.
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*
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* \param size
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* The size of the range to store. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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DCStoreRange(void *addr,
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uint32_t size);
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/**
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* Similar to \link DCFlushRange \endlink, though this function will
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* <em>not</em> run PowerPC \c sync and \c eieio instructions after flushing.
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*
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* \param addr
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* The effective address of the data to flush.
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*
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* \param size
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* The size of the range to flush. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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DCFlushRangeNoSync(void *addr,
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uint32_t size);
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/**
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* Similar to \link DCStoreRange \endlink, though this function will
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* <em>not</em> run PowerPC \c sync and \c eieio instructions after storing.
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*
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* \param addr
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* The effective address of the data to store.
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*
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* \param size
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* The size of the range to store. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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DCStoreRangeNoSync(void *addr,
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uint32_t size);
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/**
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* Zeroes the given area of the data cache (to the nearest block) with a loop of
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* PowerPC \c dcbz instructions.
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* This will not affect main memory immediately, though it will eventually
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* trickle down. Can be combined with \link DCFlushRange \endlink or
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* \link DCStoreRange \endlink to efficiently set memory to 0.
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*
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* \warning
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* The size of the range passed into this function will be internally rounded up
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* to the next multiple of 0x20. Failing to account for this could result in
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* delayed, hard-to-diagnose memory corruption.
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*
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* \param addr
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* The effective address of the data to zero.
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*
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* \param size
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* The size of the range to zero. Will be rounded up to the next 0x20.
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*/
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void
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DCZeroRange(void *addr,
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uint32_t size);
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/**
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* Gives the processor a hint that the given range of memory is likely to be
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* accessed soon, and that performance would be improved if it were cached.
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* The processor does not have to cache the requested area, but it may do so in
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* response to this function. This function is equvalent to a loop of PowerPC
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* \c dcbt instructions.
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*
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* \param addr
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* The effective address of the data to cache.
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*
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* \param size
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* The size of the range to cache. Will be rounded up to the next 0x20.
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*/
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void
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DCTouchRange(void *addr,
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uint32_t size);
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/**
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* Invalidates a range of cached instructions, in blocks. Equivalent to a loop
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* of PowerPC \c icbi instructions.
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*
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* This function forces the next instruction fetches from the given address to
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* bypass the the cache and go straight to memory, resulting in slower fetches
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* that are guaranteed to reflect main memory.
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*
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* \param addr
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* The effective address of the instructions to invalidate.
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*
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* \param size
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* The size of the range to invalidate. Will be rounded up to the next 0x20.
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*
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* \note
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* Unnecessary use of caching functions can have an adverse performance impact.
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* They should only be used when needed while interfacing with hardware.
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*/
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void
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ICInvalidateRange(void *addr,
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uint32_t size);
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void
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OSMemoryBarrier();
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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