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Merge pull request #49 from splash5/master

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Add WonderSwan adapter PCB and schematics
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sanni 2019-10-29 13:58:03 +01:00 committed by GitHub
commit 20fc59f89b
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4 changed files with 11 additions and 28 deletions
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35
Cart_Reader/WS.ino
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@ -21,22 +21,6 @@
// C45 : /CART? (L when accessing cartridge (ROM/SRAM/PORT)) // C45 : /CART? (L when accessing cartridge (ROM/SRAM/PORT))
// C46 : INT (for RTC alarm interrupt) // C46 : INT (for RTC alarm interrupt)
// C47 : CLK (384KHz on WS) // C47 : CLK (384KHz on WS)
// ------------------------------------------
// how to connect to CartReader
// ------------------------------------------
// /RST : PH0
// /CART? : PH3
// /MMC : PH4
// /WE : PH5
// /OE : PH6
// CLK : PE3
// /IO? : PE4
// INT : PG5
// A(-1)-A6: PF0-PF7
// A7-A14: PK0-PK7
// A15-A18: PL0-PL3
// D0-D7 : PC0-PC7
// D8-D15 : PA0-PA7
/****************************************** /******************************************
Menu Menu
@ -58,11 +42,11 @@ static boolean wsWitch = false;
void setup_WS() void setup_WS()
{ {
// A0 - A7 // A-1 - A6
DDRF = 0xff; DDRF = 0xff;
// A8 - A15 // A7 - A14
DDRK = 0xff; DDRK = 0xff;
// A16 - A23 // A15 - A22
DDRL = 0xff; DDRL = 0xff;
// D0 - D15 // D0 - D15
@ -1159,8 +1143,6 @@ void generateEepromInstruction_WS(uint8_t *instruction, uint8_t opcode, uint16_t
// All signals' timing are analyzed by using LogicAnalyzer // All signals' timing are analyzed by using LogicAnalyzer
boolean unlockMMC2003_WS() boolean unlockMMC2003_WS()
{ {
dataOut_WS();
// initialize all control pin state // initialize all control pin state
// RST(PH0) and CLK(PE3) to LOW // RST(PH0) and CLK(PE3) to LOW
// CART(PH3) MMC(PH4) WE(PH5) OE(PH6) to HIGH // CART(PH3) MMC(PH4) WE(PH5) OE(PH6) to HIGH
@ -1171,24 +1153,21 @@ boolean unlockMMC2003_WS()
// switch RST(PH0) to HIGH // switch RST(PH0) to HIGH
PORTH |= (1 << 0); PORTH |= (1 << 0);
// data = 0x00ff
PORTC = 0xff;
PORTA = 0x00;
PORTF = 0x0a; PORTF = 0x0a;
PORTL = 0x05; PORTL = 0x05;
pulseCLK_WS(5); pulseCLK_WS(3);
PORTF = 0x05; PORTF = 0x05;
PORTL = 0x0a; PORTL = 0x0a;
pulseCLK_WS(4); pulseCLK_WS(4);
// MMC is outputing something on IO? pin synchronized with CLK // MMC is outputing something on IO? pin synchronized with CLK
// so still need to pulse CLK until everything is ok // so still need to pulse CLK until MMC is ok to work
pulseCLK_WS(19); pulseCLK_WS(18);
// unlock procedure finished // unlock procedure finished
// see if we can set bank number to MMC // see if we can set bank number to MMC
dataOut_WS();
writeByte_WSPort(0xc2, 0xaa); writeByte_WSPort(0xc2, 0xaa);
writeByte_WSPort(0xc3, 0x55); writeByte_WSPort(0xc3, 0x55);

4
pcb/README.md
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@ -14,6 +14,10 @@
![image](https://dl.dropboxusercontent.com/s/r6lavgoaccjtrz7/sms_adapter.png?dl=1) ![image](https://dl.dropboxusercontent.com/s/r6lavgoaccjtrz7/sms_adapter.png?dl=1)
#### wonderswan_adapter.zip is an add-on for reading WonderSwan carts. [PCB thickness needs to be changed to 1.2mm](https://dl.dropboxusercontent.com/s/755249v8smcuoft/wonderswan_adapter.png?dl=1), this is very important or else it won't fit into the SNES slot. (Optional) Install C1 and C2 with 10uF/16v 1210 package tantalum capacitor.
![image](https://dl.dropboxusercontent.com/s/755249v8smcuoft/wonderswan_adapter.png?dl=1)
#### flash_adapter.zip is an add-on for writing flashroms like the 29F032, 29L3211, 29LV160, [PCB thickness needs to be changed to 1.2mm](https://dl.dropboxusercontent.com/s/va1c72073cqfy90/pcb12.jpg?dl=1), this is very important or else it won't fit into the SNES slot. #### flash_adapter.zip is an add-on for writing flashroms like the 29F032, 29L3211, 29LV160, [PCB thickness needs to be changed to 1.2mm](https://dl.dropboxusercontent.com/s/va1c72073cqfy90/pcb12.jpg?dl=1), this is very important or else it won't fit into the SNES slot.
![image](https://dl.dropboxusercontent.com/s/afrfmiuwvmvg9px/flash_adapter.png?dl=1) ![image](https://dl.dropboxusercontent.com/s/afrfmiuwvmvg9px/flash_adapter.png?dl=1)

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pcb/wonderswan_adapter.zip Executable file
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pcb/wonderswan_adapter_schematics.png Normal file
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