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133 lines
4.5 KiB
Markdown
133 lines
4.5 KiB
Markdown
#### Copy these files to the root of your SD card.
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#### gba.txt
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This file stores the GBA database which is needed because the save type and rom size are not stored inside the rom.
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Example:
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A22J,08,3
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game id, size in MByte, savetype
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Savetypes:
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0 = Unknown or no save
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1 = 4k Eeprom
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2 = 64K Eeprom
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3 = 256K Sram
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4 = 512K Flash
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5 = 1024K Flash
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6 = 512K Sram
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#### n64.txt
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This file stores the N64 database which is needed because the save type and rom size are not stored inside the rom.
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The CRC32 checksum is used to verify a good dump.
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Example:
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002c3b2a,NO7P,32,0
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CRC32, game id, size in MByte, savetype
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Savetypes:
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0 = no save chip
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1 = SRAM
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4 = Flashram
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5 = 4K Eeprom
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6 = 16K Eeprom
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#### snes.txt
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This file is needed for odd sized SNES games like Final Fantasy (JAP), Super Metroid(US/JAP) or Tales of Symphonia. Without this file you will get overdumps and the checksum calculation will fail. This list was generated by a simple script and might contain many errors.
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Example:
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A172,24,48
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checksum, size in Mbit, number of banks (lorom needs twice as many banks as hirom for the same rom size, lorom: 32kb banks, hirom: 64kb banks)
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#### PCE_CRC_LIST.txt
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Placing this file into the root of the SD card will enable verify and automatic game name identifier.
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#### hirom64.map
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This is a Nintendo Power SF Memory mapping file that changes the mapping to a single 4MB HiRom game with 64Kbit/8KByte save. The first byte is used to specify the mapping.
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Bit0-1 SRAM Size (0=2K, 1=8K, 2=32K, 3=None) ;ie. 2K SHL (N*2)
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Bit2-4 ROM Size (0=512K, 2=1.5M, 5=3M, 7=4M) ;ie. 512K*(N+1)
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Bit5 Zero (maybe MSB of ROM Size for carts with three FLASH chips) (set for HIROM:ALL)
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Bit6-7 Mode (0=Lorom, 1=Hirom, 2=Forced HIROM:MENU, 3=Forced HIROM:ALL)
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More info: http://problemkaputt.de/fullsnes.htm#snescartnintendopowerflashcard
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Example:
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0x5d = 0b 01 0 111 01
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01 -> Hirom
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0
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111 -> 4M
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01 -> 8K
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#### lorom256.map
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This is a Nintendo Power SF Memory mapping file that changes the mapping to a single 4MB LoRom game with 256Kbit/32 KByte save.
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Example:
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0x1e = 0b 00 0 111 10
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00 -> Lorom
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0
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0b111 -> 7 -> 4M
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0x10 -> 2 ->32k
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#### mbc5.map
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This is a Nintendo Power GB Memory mapping file that changes the mapping to a single 1MB MBC5 game with 32 KByte save.
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GB Mapping Info (by skaman)
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Entries start at 0x0 divided into 3 Byte segments
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For example, let's look at the start of the mapping for a multi-game cart:
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A8 00 00 71 04 00 48 94 04 separates into
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A8 00 00 MENU
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71 04 00 GAME 1
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48 94 04 GAME 2
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Byte 00 of each entry contains the MBC Type, ROM Size, and SRAM Size (start).
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SRAM Size is 3 bits across Byte 00 and Byte 01.
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MBC SZE SRAM
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A8 = 101 010 00 0 MBC5, size 2 = 128KB
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71 = 011 100 01 0 MBC3, size 4 = 512KB, SRAM 8KB
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48 = 010 010 00 1 MBC2, size 2 = 128KB, SRAM MBC2
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Byte 00: 1st 3 Bits = MBC Type
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000 = MBC0
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001 = MBC1
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010 = MBC2
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011 = MBC3
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101 = MBC5
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Byte 00: 2nd 3 Bits = ROM Size (minimum size is 128KB due to block size)
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010 = Size 2 - 128KB
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011 = Size 3 - 256KB
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100 = Size 4 - 512KB
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101 = Size 5 - 1MB
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Byte 00: Last 2 Bits (bit1..bit0) + Byte 01: 1st Bit (bit7) = SRAM Size
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00 0 = NONE
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00 1 = SRAM MBC2
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01 0 = SRAM 8KB
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01 1 = SRAM 32KB
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Byte 01 contains the SRAM Size (end) and ROM Block in the Flash.
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ROM Blocks are 128KB (8 total)
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Byte 01: Last 7 Bits (bit6..bit0) = ROM Block
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00 = ROM Block 0 start offset 0KB
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04 = ROM Block 1 start offset 128KB
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08 = ROM Block 2 start offset 256KB
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0C = ROM Block 3 start offset 384KB
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10 = ROM Block 4 start offset 512KB
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14 = ROM Block 5 start offset 640KB
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18 = ROM Block 6 start offset 768KB
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1C = ROM Block 7 start offset 896KB
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Byte 02 contains the RAM Block in the SRAM.
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RAM Blocks are 8KB (16 total)
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Byte 02: RAM Block:
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00 = RAM Block 0 start offset 0KB
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04 = RAM Block 1 start offset 8KB
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08 = RAM Block 2 start offset 16KB
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0C = RAM Block 3 start offset 24KB
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and so on until RAM Block 15.
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Going back to our example cart:
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A8 00 00 MENU: MBC5, size 2 = 128KB, ROM Block 0, RAM Block 0 (Ignored since SRAM is 000)
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71 04 00 GAME 1: MBC3, size 4 = 512KB, SRAM 8KB, ROM Block 1, RAM Block 0
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48 94 04 GAME 2: MBC2, size 2 = 128KB, SRAM MBC2, ROM Block 5, RAM Block 1
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