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459 lines
17 KiB
Plaintext
459 lines
17 KiB
Plaintext
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******************************************************
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* Sega Genesis Technical Notes by Bart Trzynadlowski *
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* and many others! *
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******************************************************
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Second Edition: February 7, 2000
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- Current
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- Made a table of contents
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- Added tile information and Scroll layer name table information
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- Added info on Genesis security system and "do nots" courtesy of
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Flavio. He also found a mistake in the joypad notes.
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- Added SMD ROM stuff
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First Edition: February 3, 2000
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- Initial release
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This document is intended to be used as a reference alongside sega2.doc or any
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other complete Sega Genesis technical documentation, it is not intended as a
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standalone resource for learning about the Sega Genesis game console.
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There is also some information here pertaining to specific situations
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such as using the Starscream 68000 CPU core in an emulator project.
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I wrote this document while working on a Genesis emulator. I felt some
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things needed more description than was available. This document is intended
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for emulator developers and Genesis programmers.
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Feel free to pass this document around freely. If you use any parts of
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it that were contributed by people other than me, it would be a good idea to
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give them credit.
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Any useful feedback is very much appreciated, especially corrections
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and new entries. Do not ask about ROMs or anything stupid. trzy@powernet.net
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Check my page at: http://www.powernet.net/~trzy as well.
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Much thanks to Joe Groff, Steve Snake, nyef, ATani, and Flavio for
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the invaluable help.
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-- Table of Contents --
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0. Control Port Write Modes
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1. Auto-Increment
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2. VRAM Address Decoding (for Writing)
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3. Tiles
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4. Scroll Layer Name Tables
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5. Scroll Layers and Video Resolution
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6. Joypads
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7. Crash Course on the Genesis Security System and Common Don'ts
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8. Emulating RAM and ROM w/ Starscream
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9. SMD ROM Format
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-- 0. Control Port Write Modes --
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The VDP control port, 0xC00004, has two write modes: "Register Set" (write1)
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and "Address Set" (write2). The VDP is able to distinguish between which mode
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you want to use by looking at bits 15 and 14 of the word you write to the
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control port.
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10: Write1 Otherwise: Write2
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For write2, bits 15 and 14 are CD1 and CD0 so the concern of conflict arises.
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If you look at the possible access modes which are specified by the 6 CD bits
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you will not find any that have 10 in CD1 and CD0.
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-- 1. Auto-Increment --
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The auto-increment value (in register #15) is apparently set to 2 by default.
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-- 2. VRAM Address Decoding (for Writing) --
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For words and longwords, the VRAM address decoding process is not as
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straightforward as some would have you believe. The A0 address bit is not used
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in decoding, what this apparently means is that it is treated as 0 (thus
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preventing misaligned word writes).
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A0 is used to test wether or not the bytes in a word should be swapped
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or not. If A0 = 1, they are swapped, if it is 0, then bytes are not swapped.
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A0 is also used when adding the auto-increment value to the VRAM address after
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some data is written.
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C example of emulating this:
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if (addr & 1)
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data = ByteSwap(data);
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*((unsigned short int *) (vram + (addr & 0xfffe))) = data;
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addr += auto_inc;
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-- 3. Tiles --
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The Genesis tile format is quite simple. Each pixel is represented by 4 bits
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thus allowing 16 colors per every tile. Tiles are 8x8. The Genesis allows for
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up to 64 colors to be displayed: 16 per palette, with 4 palettes. Palettes are
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not specified in the tile bitmap, that information is elsewhere and beyond the
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scope of this note.
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Example of a bitmap for the letter "A". We use the color 0xa for each
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of the pixels. Remember, color 0 is _always_ transparent in any
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palette:
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dc.l $00077000
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dc.l $07700770
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dc.l $07700770
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dc.l $07777770
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dc.l $07700770
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dc.l $07700770
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dc.l $00000000
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dc.l $00000000
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-- 4. Scroll Layer Name Tables --
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Scroll layers (who's addresses and sizes are specified in VDP registers) are
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"name tables" where each entry contains an index to a specific 8x8 tile. These
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entries are arranged in a linear fashion.
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Each entry is a word in size. Here is the format for an entry:
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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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|PRI|PL1|PL0|VFP|HFP|I10|I9 |I8 |I7 |I6 |I5 |I4 |I3 |I2 |I1 |I0 |
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+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
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PRI Priority (1 = highest, on top; 0 = lowest, on bottom)
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PL1-PL0 Palette (0, 1, 2, or 3)
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VFP Vertical flipping (1 = true)
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HFP Horizontal flipping (1 = true)
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I10-I0 Index of 8x8 tile in pattern area (VRAM $0000).
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Multiply this by 32 to get offset in VRAM of the tile
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bitmap
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The information here applies to both Scroll A and Scroll B, please refer to
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more complete documentation for information on how to set Scroll layer
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addresses and what-not.
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-- 5. Scroll Layers and Video Resolution --
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The Genesis supports two video modes: 32x28 cell and 40x28 cell (which in
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pixels are 256x224 and 320x224.) The video resolution is how many 8x8 tiles
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are displayed on-screen. The vertical portion differs with PAL I believe, but
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it that is not relevant.
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Scroll A and Scroll B can have a number of different sizes which
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obviously often cannot be all shown on-screen: 32x32, 32x64, 32x128, 64x32,
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64x64, and 128x32. The Sega Programming FAQ says that 128x128 is possible, but
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I don't think it is since that would take up 32KB of VRAM which would not
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leave room for the other Scroll layer, the Window, or the patterns.
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Only a portion of the Scroll layer is visible on the screen. How it is
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displayed can be represented by the following diagram:
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** Assuming the Scroll size is 64x64 and the screen 40x28, everything is
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addressed in cell units (obviously not to scale) **
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- = Scroll layer
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* = Visible portion
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H0 H39 H63
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+****************************************--------------------+
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V0 |* V0 * |
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|* * |
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|* * |
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|* * |
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|* * |
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|* V27 * |
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|**************************************** |
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V63 | |
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+------------------------------------------------------------+
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Thus you can see that there are tiles beyond the right limit of the visible
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screen, and below as well. This method of having the layer larger than can be
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displayed is for scrolling. The above is what would occur if one set the
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Scroll size to 64x64 and the resolution to 40x28 without scrolling the screen
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or anything.
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If you are having problems emulating Scroll layers because everything
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is shifted over you are probably forgetting to render the invisible parts of
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the Scroll or to skip over them and on to the next visible row. I hope that
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made sense.
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-- 6. Joypads --
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** Begin Email **
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From: Joe Groff
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To: Bart Trzynadlowski
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Date: Sat, 15 Jan 2000 23:06:49 -0800 (PST)
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Subject: Re: DGen/SDL
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> is there any good info anywhere on control pad interfacing?
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As far as I can tell, this is how the controller works. There are two one-byte
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data sets:
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v & 0x40: always set
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v & 0x20: C
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v & 0x10: B
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v & 0x08: right
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v & 0x04: left
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v & 0x02: down
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v & 0x01: up
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and:
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v & 0x40: always clear
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v & 0x20: START
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v & 0x10: A
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v & 0x08: right
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v & 0x04: left
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v & 0x02: down
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v & 0x01: up
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By reading a word from 0xA10002 (for first controller) or 0xA10004 (for
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second), the word will have one of the above bitmasks written to both bytes.
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If you write a byte to 0xA10003(for 1st) or 0xA10005(for 2nd) with the 0x40
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bit set, you'll get the first set, otherwise you'll get the second.
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Example:
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Player 1 is pressing left and the A and B buttons simultaneously. Player 2
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is pressing B, C, and START. As the game, in order to probe controller 1:
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- I send byte 0x00 to 0xA10003 (or word 0x0000 to 0xA10002 :)
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- I read a word from 0xA10002, which gives me 0x1414. From the lower table,
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I see A and left are being pressed.
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- I send byte 0x40 to 0xA10003.
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- I read another word from 0xA10002. This time I get 0x5454, which from the
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upper table means B and left are being pressed.
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Similarly, to probe controller 2:
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- I send byte 0x00 to 0xA10005.
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- I read from 0xA10004, and get 0x2020. So START is being depressed.
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of the controller!
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- I send byte 0x40 to 0xA10005.
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- I read from 0xA10004 again, get 0x7070, so B and C are being pressed.
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There's also a lot of odd code to handle 6-button controllers in DGen, but
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as it's getting a bit late, I can't quite understand it. Hopefully this is
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accurate and clear enough to at least get you started.
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** End Email **
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** Begin Email **
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From: ATani
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To: Bart Trzynadlowski
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Date: Sat, 15 Jan 2000 23:06:43 -0800
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Subject: Re: genesis tech question post
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Ok, Well on the genesis the joysticks are read in by the z80 and passed to
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the 68000 chip via memory addresses: A10003 & A10005.
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If bit 6 of the Stored Controller 1 information is set then you return the
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following information when reading Address: A10003 (Byte mode):
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Bit: Description:
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0 Up
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1 Down
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2 Left
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3 Right
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4 B
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5 C
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If Bit 6 is not set return the following:
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Bit: Description:
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4 A
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5 Start
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Address A10005 is the same except values returned are for joystick port 2.
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The Stored data are in reference to the byte values written to A10003 and
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A10005 (joystick port 1 and joystick port 2)
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** End Email **
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Flavio points out the information from ATani's email may be somewhat faulty:
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"The Z80 has nothing to do with joypad reading. Actually, I believe the Z80
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banker thingy will go wacko, should you attempt such a stunt. Gotta test
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that."
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-- 7. Crash Course on the Genesis Security System and Common Don'ts --
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** The following information is courtesy of Flavio **
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Crash course in Genesis security:
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1) There must be either 'SEGA' or ' SEGA' in ASCII at offset 0x100 (256
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decimal.)
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2) If the four least significant bits of 0xA10001 are higher than zero, the
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poor programmer must write 'SEGA' to 0xA14000.
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Example:
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MOVE.B $A10001, D0
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ANDI.B #$F, D0
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BEQ.S NO_VDP_LOCK
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MOVE.L #'SEGA', $A14000.
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NO_VDP_LOCK:
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[Yer code here]
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Yes, I know many of you can't read 68K ASM yet, but I don't know how to do
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this on Paul Lee's C compiler (or any other for that matter.) :/
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A list of common Caveat Gennyptor's follows:
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- Be careful not to access forbidden addresses (see SEGA2.DOC), as the Genny
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locks up instantly if you dare to touch them.
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- Don't read from the VDP data port (C00000) if you have sent a
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"VRAM/CRAM/VSRAM write" command (and vice versa.)
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- The FM doesn't work if the Z80 is reset (their reset lines are wired
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together.)
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- Always have the Z80 busreq'ed before reading the joyports.
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- Never attempt to read PSG ports.
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- DMA transfers should be controlled by code placed at the Genny's work RAM
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(0xFF0000-0xFFFFFF.)
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- Don't attempt to transfer data to/from the VDP if a DMA is in progress.
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- Z80 RAM _must_ be accessed in byte units.
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- Don't toggle the joystick's select line more than four times per vertical
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refresh, to ensure 6-button joypad compatibility.
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- It takes at least 16 68K clock ticks for the joyport readouts to become
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really stable, after you have toggled the aforementioned select line.
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Flavio has also pointed out one more important thing not to attempt:
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CLR, ST, and TAS cannot be used to access the C000xx range. (It's a
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derivative of the "don't read with the VDP set to write" commandment.)
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-- 8. Emulating RAM and ROM w/ Starscream --
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Often times, Genesis games do some odd tricks that can be buggers to emulate.
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One of these is jumping backwards (which causes the 24-bit address to wrap
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around to 0xFFFFFF) into work RAM to execute code. Since Starscream uses
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32-bit data to handle addresses, this sort of maneuver would wrap around to
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0xFFFFFFFF (32-bit) which is out of the Genesis address space.
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Below is part of a Starscream context for emulating the Genesis work
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RAM and ROM. I have also included the code for the handlers (Joe Groff helped
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with this -- thanks Joe!) The dummy handlers are for regions of the address
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space where accesses are ignored (I have removed all references to VDP and I/O
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stuff since it would just clutter the example.) In reality, the data items
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rom and ram would be dynamically allocated and would have to be added to these
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structures during initialization time. They would be seen here as (unsigned)
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NULL or (void *) NULL.
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struct STARSCREAM_PROGRAMREGION fetch_instructions[] =
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{
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{ 0x000000, 0x3fffff, (unsigned) rom },
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{ 0xff0000, 0xffffff, (unsigned) ram - 0xff0000 },
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{ 0xff000000, 0xff3fffff, (unsigned) ram - 0xff000000 },
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{ 0xfff00000, 0xffffffff, (unsigned) ram - 0xfff00000 },
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{ -1, -1, NULL }
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};
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struct STARSCREAM_DATAREGION read_data_byte[] =
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{
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{ 0x000000, 0x3fffff, NULL, (void *) rom },
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{ 0x400000, 0xffffff, StarscreamReadRAMByte, NULL },
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{ -1, -1, NULL, NULL }
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};
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struct STARSCREAM_DATAREGION read_data_word[] =
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{
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{ 0x000000, 0x3fffff, NULL, (void *) rom },
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{ 0x400000, 0xdfffff, StarscreamFakeRead, NULL },
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{ 0xe00000, 0xffffff, StarscreamReadRAMWord, NULL },
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{ -1, -1, NULL, NULL }
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};
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struct STARSCREAM_DATAREGION write_data_byte[] =
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{
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{ 0x000000, 0xdfffff, StarscreamFakeWrite, NULL },
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{ 0xe00000, 0xffffff, StarscreamWriteRAMByte, NULL },
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{ -1, -1, NULL, NULL }
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};
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struct STARSCREAM_DATAREGION write_data_word[] =
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{
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{ 0x000000, 0xdfffff, StarscreamFakeWrite, NULL },
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{ 0xe00000, 0xffffff, StarscreamWriteRAMWord, NULL },
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{ -1, -1, NULL, NULL }
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};
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unsigned StarscreamReadRAMByte(unsigned address)
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{
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return ram[(address ^ 1) & 0xffff];
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}
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unsigned StarscreamReadRAMWord(unsigned address)
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{
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return *((unsigned short *) (ram + (address & 0xfffe)));
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}
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void StarscreamWriteRAMByte(unsigned address, unsigned data)
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{
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ram[(address ^ 1) & 0xffff] = data;
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}
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void StarscreamWriteRAMWord(unsigned address, unsigned data)
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{
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*((unsigned short *) (ram + (address & 0xfffe))) = data;
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}
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unsigned StarscreamFakeRead(unsigned address)
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{
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return 0;
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}
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void StarscreamFakeWrite(unsigned address, unsigned data)
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{
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}
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RAM is at 0xff0000-0xffffff and is mirrored every 64KB at 0xe00000-0xfeffff.
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Please see the Starscream documentation for information on how the core works.
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At the time of this writing, Neill Corlett's page is at:
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http://www4.ncsu.edu/~nscorlet/
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-- 9. SMD ROM Format --
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The SMD ROM format consists of a 512 byte header and the actual ROM image in
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16KB chunks with the odd bytes at the beginning, and the even bytes at the
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end.
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Header offsets:
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0x00: Number of 16KB blocks. This number is often incorrect and it
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|
is wise to calculate it manually: (sizeof(file) - 512) / 16384
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|
0x02: If 0, the ROM is standalone or the last part of a series.
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|
Otherwise it is part of a split ROM set.
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||
|
0x08: 0xaa
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||
|
0x09: 0xbb
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||
|
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|
Note: Most ROMs have 0xaa and 0xbb at 0x08 and 0x09 but a very small percentage
|
||
|
(about 1.28% by my calculations) do not conform to this. Those offsets are
|
||
|
useful for checking wether a ROM is in SMD format but be aware that they are
|
||
|
not always correct.
|
||
|
|
||
|
Decoding a 16KB SMD blocke: (thanks to XnaK and Kuwanger)
|
||
|
1. If the byte offset in the block is less than 8192, copy the byte
|
||
|
from the SMD block to the first unused odd offset in the decode
|
||
|
buffer.
|
||
|
2. Otherwise, put it in the first unused even offset in the decode
|
||
|
buffer.
|
||
|
|
||
|
Example block-decoding C function: (from my own GROM v0.75)
|
||
|
|
||
|
void smd_bin(unsigned char *bin_block, unsigned char *smd_block)
|
||
|
{
|
||
|
int i, o = 1, e = 0;
|
||
|
|
||
|
/* convert 16KB of SMD to BIN */
|
||
|
for (i = 0; i < 8192; i++)
|
||
|
{
|
||
|
bin_block[o] = smd_block[i];
|
||
|
bin_block[e] = smd_block[i + 8192];
|
||
|
o += 2;
|
||
|
e += 2;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
Get GROM at:
|
||
|
http://www.powernet.net/~trzy
|
||
|
http://www.zophar.net
|
||
|
http://eidolon.psp.net
|
||
|
http://www.vintagegaming.com
|
||
|
...or...
|
||
|
If all else fails, email me.
|
||
|
|
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