mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
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244 lines
6.4 KiB
C
244 lines
6.4 KiB
C
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/********************************************************************
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* *
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* THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. *
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* *
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* USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS *
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* GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
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* IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. *
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* *
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* THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 *
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* BY THE Xiph.Org FOUNDATION http://www.xiph.org/ *
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* *
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********************************************************************
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function: arm7 and later wide math functions
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********************************************************************/
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#ifdef _ARM_ASSEM_
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#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_)
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#define _V_WIDE_MATH
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static inline ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) {
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int lo,hi;
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asm volatile("smull\t%0, %1, %2, %3"
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: "=&r"(lo),"=&r"(hi)
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: "%r"(x),"r"(y)
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: "cc");
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return(hi);
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}
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static inline ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) {
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return MULT32(x,y)<<1;
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}
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static inline ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) {
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int lo,hi;
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asm volatile("smull %0, %1, %2, %3\n\t"
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"movs %0, %0, lsr #15\n\t"
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"adc %1, %0, %1, lsl #17\n\t"
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: "=&r"(lo),"=&r"(hi)
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: "%r"(x),"r"(y)
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: "cc");
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return(hi);
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}
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#define MB() asm volatile ("" : : : "memory")
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static inline void XPROD32(ogg_int32_t a, ogg_int32_t b,
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ogg_int32_t t, ogg_int32_t v,
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ogg_int32_t *x, ogg_int32_t *y)
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{
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int x1, y1, l;
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asm( "smull %0, %1, %4, %6\n\t"
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"smlal %0, %1, %5, %7\n\t"
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"rsb %3, %4, #0\n\t"
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"smull %0, %2, %5, %6\n\t"
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"smlal %0, %2, %3, %7"
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: "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a)
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: "3" (a), "r" (b), "r" (t), "r" (v)
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: "cc" );
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*x = x1;
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MB();
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*y = y1;
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}
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static inline void XPROD31(ogg_int32_t a, ogg_int32_t b,
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ogg_int32_t t, ogg_int32_t v,
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ogg_int32_t *x, ogg_int32_t *y)
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{
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int x1, y1, l;
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asm( "smull %0, %1, %4, %6\n\t"
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"smlal %0, %1, %5, %7\n\t"
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"rsb %3, %4, #0\n\t"
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"smull %0, %2, %5, %6\n\t"
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"smlal %0, %2, %3, %7"
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: "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a)
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: "3" (a), "r" (b), "r" (t), "r" (v)
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: "cc" );
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*x = x1 << 1;
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MB();
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*y = y1 << 1;
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}
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static inline void XNPROD31(ogg_int32_t a, ogg_int32_t b,
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ogg_int32_t t, ogg_int32_t v,
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ogg_int32_t *x, ogg_int32_t *y)
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{
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int x1, y1, l;
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asm( "rsb %2, %4, #0\n\t"
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"smull %0, %1, %3, %5\n\t"
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"smlal %0, %1, %2, %6\n\t"
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"smull %0, %2, %4, %5\n\t"
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"smlal %0, %2, %3, %6"
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: "=&r" (l), "=&r" (x1), "=&r" (y1)
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: "r" (a), "r" (b), "r" (t), "r" (v)
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: "cc" );
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*x = x1 << 1;
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MB();
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*y = y1 << 1;
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}
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#endif
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#ifndef _V_CLIP_MATH
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#define _V_CLIP_MATH
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static inline ogg_int32_t CLIP_TO_15(ogg_int32_t x) {
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int tmp;
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asm volatile("subs %1, %0, #32768\n\t"
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"movpl %0, #0x7f00\n\t"
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"orrpl %0, %0, #0xff\n"
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"adds %1, %0, #32768\n\t"
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"movmi %0, #0x8000"
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: "+r"(x),"=r"(tmp)
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:
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: "cc");
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return(x);
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}
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#endif
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#ifndef _V_LSP_MATH_ASM
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#define _V_LSP_MATH_ASM
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static inline void lsp_loop_asm(ogg_uint32_t *qip,ogg_uint32_t *pip,
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ogg_int32_t *qexpp,
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ogg_int32_t *ilsp,ogg_int32_t wi,
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ogg_int32_t m){
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ogg_uint32_t qi=*qip,pi=*pip;
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ogg_int32_t qexp=*qexpp;
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asm("mov r0,%3;"
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"mov r1,%5,asr#1;"
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"add r0,r0,r1,lsl#3;"
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"1:"
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"ldmdb r0!,{r1,r3};"
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"subs r1,r1,%4;" //ilsp[j]-wi
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"rsbmi r1,r1,#0;" //labs(ilsp[j]-wi)
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"umull %0,r2,r1,%0;" //qi*=labs(ilsp[j]-wi)
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"subs r1,r3,%4;" //ilsp[j+1]-wi
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"rsbmi r1,r1,#0;" //labs(ilsp[j+1]-wi)
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"umull %1,r3,r1,%1;" //pi*=labs(ilsp[j+1]-wi)
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"cmn r2,r3;" // shift down 16?
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"beq 0f;"
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"add %2,%2,#16;"
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"mov %0,%0,lsr #16;"
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"orr %0,%0,r2,lsl #16;"
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"mov %1,%1,lsr #16;"
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"orr %1,%1,r3,lsl #16;"
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"0:"
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"cmp r0,%3;\n"
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"bhi 1b;\n"
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// odd filter assymetry
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"ands r0,%5,#1;\n"
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"beq 2f;\n"
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"add r0,%3,%5,lsl#2;\n"
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"ldr r1,[r0,#-4];\n"
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"mov r0,#0x4000;\n"
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"subs r1,r1,%4;\n" //ilsp[j]-wi
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"rsbmi r1,r1,#0;\n" //labs(ilsp[j]-wi)
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"umull %0,r2,r1,%0;\n" //qi*=labs(ilsp[j]-wi)
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"umull %1,r3,r0,%1;\n" //pi*=labs(ilsp[j+1]-wi)
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"cmn r2,r3;\n" // shift down 16?
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"beq 2f;\n"
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"add %2,%2,#16;\n"
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"mov %0,%0,lsr #16;\n"
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"orr %0,%0,r2,lsl #16;\n"
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"mov %1,%1,lsr #16;\n"
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"orr %1,%1,r3,lsl #16;\n"
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//qi=(pi>>shift)*labs(ilsp[j]-wi);
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//pi=(qi>>shift)*labs(ilsp[j+1]-wi);
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//qexp+=shift;
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//}
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/* normalize to max 16 sig figs */
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"2:"
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"mov r2,#0;"
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"orr r1,%0,%1;"
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"tst r1,#0xff000000;"
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"addne r2,r2,#8;"
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"movne r1,r1,lsr #8;"
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"tst r1,#0x00f00000;"
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"addne r2,r2,#4;"
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"movne r1,r1,lsr #4;"
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"tst r1,#0x000c0000;"
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"addne r2,r2,#2;"
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"movne r1,r1,lsr #2;"
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"tst r1,#0x00020000;"
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"addne r2,r2,#1;"
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"movne r1,r1,lsr #1;"
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"tst r1,#0x00010000;"
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"addne r2,r2,#1;"
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"mov %0,%0,lsr r2;"
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"mov %1,%1,lsr r2;"
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"add %2,%2,r2;"
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: "+r"(qi),"+r"(pi),"+r"(qexp)
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: "r"(ilsp),"r"(wi),"r"(m)
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: "r0","r1","r2","r3","cc");
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*qip=qi;
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*pip=pi;
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*qexpp=qexp;
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}
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static inline void lsp_norm_asm(ogg_uint32_t *qip,ogg_int32_t *qexpp){
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ogg_uint32_t qi=*qip;
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ogg_int32_t qexp=*qexpp;
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asm("tst %0,#0x0000ff00;"
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"moveq %0,%0,lsl #8;"
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"subeq %1,%1,#8;"
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"tst %0,#0x0000f000;"
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"moveq %0,%0,lsl #4;"
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"subeq %1,%1,#4;"
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"tst %0,#0x0000c000;"
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"moveq %0,%0,lsl #2;"
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"subeq %1,%1,#2;"
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"tst %0,#0x00008000;"
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"moveq %0,%0,lsl #1;"
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"subeq %1,%1,#1;"
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: "+r"(qi),"+r"(qexp)
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:
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: "cc");
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*qip=qi;
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*qexpp=qexp;
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}
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#endif
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#endif
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