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[Core/CD] improved accuracy of CDC transfer to Main-CPU (resp. Sub-CPU) when destination is set to Sub-CPU (resp. Main-CPU) (verified on real hardware, cf. Krikzz's mcd-verificator)

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This commit is contained in:
ekeeke 2024-01-19 00:01:02 +01:00
parent b35a602bb3
commit 16589b558f
4 changed files with 11 additions and 8 deletions
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8
core/cd_hw/cdc.c
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@ -2,7 +2,7 @@
* Genesis Plus * Genesis Plus
* CD data controller (LC8951x compatible) * CD data controller (LC8951x compatible)
* *
* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX) * Copyright (C) 2012-2024 Eke-Eke (Genesis Plus GX)
* *
* Redistribution and use of this code or any derivative works are permitted * Redistribution and use of this code or any derivative works are permitted
* provided that the following conditions are met: * provided that the following conditions are met:
@ -769,13 +769,13 @@ unsigned char cdc_reg_r(void)
return data; return data;
} }
unsigned short cdc_host_r(void) unsigned short cdc_host_r(uint8 cpu_access)
{ {
/* read CDC buffered data (gate-array register $08) */ /* read CDC buffered data (gate-array register $08) */
uint16 data = scd.regs[0x08>>1].w; uint16 data = scd.regs[0x08>>1].w;
/* check if host data transfer is enabled */ /* check if host data transfer is started for selected CPU */
if (scd.regs[0x04>>1].byte.h & 0x40) if ((scd.regs[0x04>>1].byte.h & 0x47) == cpu_access)
{ {
/* check if EDT bit (gate-array register $04) is set (host data transfer is finished) */ /* check if EDT bit (gate-array register $04) is set (host data transfer is finished) */
if (scd.regs[0x04>>1].byte.h & 0x80) if (scd.regs[0x04>>1].byte.h & 0x80)

7
core/cd_hw/cdc.h
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@ -2,7 +2,7 @@
* Genesis Plus * Genesis Plus
* CD data controller (LC8951x compatible) * CD data controller (LC8951x compatible)
* *
* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX) * Copyright (C) 2012-2024 Eke-Eke (Genesis Plus GX)
* *
* Redistribution and use of this code or any derivative works are permitted * Redistribution and use of this code or any derivative works are permitted
* provided that the following conditions are met: * provided that the following conditions are met:
@ -40,6 +40,9 @@
#define cdc scd.cdc_hw #define cdc scd.cdc_hw
#define CDC_MAIN_CPU_ACCESS 0x42
#define CDC_SUB_CPU_ACCESS 0x43
/* CDC hardware */ /* CDC hardware */
typedef struct typedef struct
{ {
@ -67,6 +70,6 @@ extern void cdc_dma_update(void);
extern void cdc_decoder_update(uint32 header); extern void cdc_decoder_update(uint32 header);
extern void cdc_reg_w(unsigned char data); extern void cdc_reg_w(unsigned char data);
extern unsigned char cdc_reg_r(void); extern unsigned char cdc_reg_r(void);
extern unsigned short cdc_host_r(void); extern unsigned short cdc_host_r(uint8 cpu_access);
#endif #endif

2
core/cd_hw/scd.c
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@ -680,7 +680,7 @@ static unsigned int scd_read_word(unsigned int address)
/* CDC host data (word access only ?) */ /* CDC host data (word access only ?) */
if (address == 0x08) if (address == 0x08)
{ {
return cdc_host_r(); return cdc_host_r(CDC_SUB_CPU_ACCESS);
} }
/* LED & RESET status */ /* LED & RESET status */

2
core/mem68k.c
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@ -537,7 +537,7 @@ unsigned int ctrl_io_read_word(unsigned int address)
{ {
s68k_sync(); s68k_sync();
} }
return cdc_host_r(); return cdc_host_r(CDC_MAIN_CPU_ACCESS);
} }
/* H-INT vector (word access only ?) */ /* H-INT vector (word access only ?) */