mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-09-10 16:53:15 +02:00
.fixed optimization of memory handlers (better branch prediction ?)
.fixed savestate snaphot when 16:9 correction is used .fixed overscan support (separated H & V border emulation)
This commit is contained in:
ekeeke31
parent
682dd53a38
commit
3434f89e3b
@ -134,7 +134,9 @@ void gen_hardreset(void)
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/* TMSS + OS ROM support */
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memset(tmss, 0x00, sizeof(tmss));
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if (config.tmss == 3)
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{
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m68k_memory_map[0].base = bios_rom;
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}
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/* Reset CPU cycles (check EA logo corruption, no glitches for Skitchin/Budokan on PAL 60hz MD2 with TMSS) */
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mcycles_68k = mcycles_z80 = (rand() % lines_per_frame) * MCYCLES_PER_LINE;
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@ -268,10 +270,11 @@ void gen_zbusreq_w(unsigned int state, unsigned int cycles)
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/* enable 68k access */
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if (zstate & 1)
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{
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m68k_memory_map[0xa0].read8 = z80_read_byte;
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m68k_memory_map[0xa0].read16 = z80_read_word;
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m68k_memory_map[0xa0].write8 = z80_write_byte;
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m68k_memory_map[0xa0].write16 = z80_write_word;
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_m68k_memory_map *base = &m68k_memory_map[0xa0];
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base->read8 = z80_read_byte;
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base->read16 = z80_read_word;
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base->write8 = z80_write_byte;
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base->write16 = z80_write_word;
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}
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}
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else /* Z80 Bus Released */
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@ -284,10 +287,11 @@ void gen_zbusreq_w(unsigned int state, unsigned int cycles)
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zstate &= 1;
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/* disable 68k access */
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m68k_memory_map[0xa0].read8 = m68k_read_bus_8;
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m68k_memory_map[0xa0].read16 = m68k_read_bus_16;
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m68k_memory_map[0xa0].write8 = m68k_unused_8_w;
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m68k_memory_map[0xa0].write16 = m68k_unused_16_w;
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_m68k_memory_map *base = &m68k_memory_map[0xa0];
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base->read8 = m68k_read_bus_8;
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base->read16 = m68k_read_bus_16;
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base->write8 = m68k_unused_8_w;
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base->write16 = m68k_unused_16_w;
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}
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}
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@ -312,10 +316,11 @@ void gen_zreset_w(unsigned int state, unsigned int cycles)
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/* enable 68k access */
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if (zstate & 1)
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{
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m68k_memory_map[0xa0].read8 = z80_read_byte;
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m68k_memory_map[0xa0].read16 = z80_read_word;
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m68k_memory_map[0xa0].write8 = z80_write_byte;
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m68k_memory_map[0xa0].write16 = z80_write_word;
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_m68k_memory_map *base = &m68k_memory_map[0xa0];
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base->read8 = z80_read_byte;
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base->read16 = z80_read_word;
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base->write8 = z80_write_byte;
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base->write16 = z80_write_word;
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}
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}
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else /* !ZRESET active */
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@ -328,10 +333,11 @@ void gen_zreset_w(unsigned int state, unsigned int cycles)
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zstate &= 2;
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/* disable 68k access */
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m68k_memory_map[0xa0].read8 = m68k_read_bus_8;
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m68k_memory_map[0xa0].read16 = m68k_read_bus_16;
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m68k_memory_map[0xa0].write8 = m68k_unused_8_w;
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m68k_memory_map[0xa0].write16 = m68k_unused_16_w;
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_m68k_memory_map *base = &m68k_memory_map[0xa0];
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base->read8 = m68k_read_bus_8;
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base->read16 = m68k_read_bus_16;
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base->write8 = m68k_unused_8_w;
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base->write16 = m68k_unused_16_w;
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}
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/* reset YM2612 */
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@ -1088,8 +1088,8 @@ static void systemmenu ()
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hctab = (reg[12] & 1) ? cycle2hc40 : cycle2hc32;
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/* reinitialize overscan area */
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bitmap.viewport.x = config.overscan ? 14 : 0;
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bitmap.viewport.y = config.overscan ? (((reg[1] & 8) ? 0 : 8) + (vdp_pal ? 24 : 0)) : 0;
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bitmap.viewport.x = (config.overscan & 2) ? ((reg[12] & 1) ? 16 : 12) : 0;
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bitmap.viewport.y = (config.overscan & 1) ? (((reg[1] & 8) ? 0 : 8) + (vdp_pal ? 24 : 0)) : 0;
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}
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break;
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@ -2367,6 +2367,7 @@ static int savemenu(void)
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{
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/* set menu background */
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bg_saves[0].w = bg_saves[0].texture->width * 2;
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if (config.aspect & 2) bg_saves[0].w = (bg_saves[0].w * 3) / 4;
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bg_saves[0].h = bg_saves[0].texture->height * 2;
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bg_saves[0].x = (vmode->fbWidth - bg_saves[0].w) / 2;
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bg_saves[0].y = (vmode->efbHeight - bg_saves[0].h) / 2;
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@ -454,21 +454,24 @@ static void gxSetAspectRatio(int *xscale, int *yscale)
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/* the following values have been deducted from comparison with a real 50/60hz Mega Drive */
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if (config.aspect)
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{
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if (config.overscan)
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{
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/* borders are emulated */
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*xscale = 358 + ((reg[12] & 1)*2) - gc_pal;
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/* vertical borders */
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if (config.overscan & 1)
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*yscale = vdp_pal + ((gc_pal && !config.render) ? 143 : 120);
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}
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else
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{
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/* borders are simulated (black) */
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*xscale = 325 + ((reg[12] & 1)*2) - gc_pal;
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*yscale = bitmap.viewport.h / 2;
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if (vdp_pal && (!gc_pal || config.render)) *yscale = *yscale * 240 / 288;
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else if (!vdp_pal && gc_pal && !config.render) *yscale = *yscale * 288 / 240;
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if (vdp_pal && (!gc_pal || config.render))
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*yscale = *yscale * 240 / 288;
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else if (!vdp_pal && gc_pal && !config.render)
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*yscale = *yscale * 288 / 240;
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}
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/* horizontal borders */
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if (config.overscan & 2)
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*xscale = 358 + ((reg[12] & 1)*2) - gc_pal;
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else
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*xscale = 325 + ((reg[12] & 1)*2) - gc_pal;
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/* 16/9 correction */
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if (config.aspect & 2)
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*xscale = (*xscale * 3) / 4;
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@ -477,18 +480,17 @@ static void gxSetAspectRatio(int *xscale, int *yscale)
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/* manual aspect ratio (default is fullscreen) */
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else
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{
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if (config.overscan)
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{
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/* borders are emulated */
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*xscale = 352;
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/* vertical borders */
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if (config.overscan & 1)
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*yscale = (gc_pal && !config.render) ? (vdp_pal ? (268*144 / bitmap.viewport.h):143) : (vdp_pal ? (224*144 / bitmap.viewport.h):120);
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}
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else
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{
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/* borders are simulated (black) */
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*xscale = 320;
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*yscale = (gc_pal && !config.render) ? 134 : 112;
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}
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/* horizontal borders */
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if (config.overscan & 2)
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*xscale = 352;
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else
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*xscale = 320;
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/* add user scaling */
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*xscale += config.xscale;
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165
source/mem68k.c
165
source/mem68k.c
@ -115,40 +115,40 @@ unsigned int m68k_lockup_r_16 (unsigned int address)
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/*--------------------------------------------------------------------------*/
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unsigned int eeprom_read_byte(unsigned int address)
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{
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if (address != eeprom.type.sda_out_adr)
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if (address == eeprom.type.sda_out_adr)
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{
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return READ_BYTE(cart.rom, address);
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return eeprom_read(address, 0);
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}
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return eeprom_read(address, 0);
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return READ_BYTE(cart.rom, address);
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}
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unsigned int eeprom_read_word(unsigned int address)
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{
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if (address != (eeprom.type.sda_out_adr & 0xfffffe))
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if (address == (eeprom.type.sda_out_adr & 0xfffffe))
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{
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return *(uint16 *)(cart.rom + address);
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return eeprom_read(address, 1);
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}
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return eeprom_read(address, 1);
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return *(uint16 *)(cart.rom + address);
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}
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void eeprom_write_byte(unsigned int address, unsigned int data)
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{
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if ((address != eeprom.type.sda_in_adr) && (address != eeprom.type.scl_adr))
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if ((address == eeprom.type.sda_in_adr) || (address == eeprom.type.scl_adr))
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{
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m68k_unused_8_w(address, data);
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eeprom_write(address, data, 0);
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return;
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}
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eeprom_write(address, data, 0);
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m68k_unused_8_w(address, data);
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}
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void eeprom_write_word(unsigned int address, unsigned int data)
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{
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if ((address != (eeprom.type.sda_in_adr & 0xfffffe)) && (address != (eeprom.type.scl_adr & 0xfffffe)))
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if ((address == (eeprom.type.sda_in_adr & 0xfffffe)) || (address == (eeprom.type.scl_adr & 0xfffffe)))
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{
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m68k_unused_16_w (address, data);
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eeprom_write(address, data, 1);
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return;
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}
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eeprom_write(address, data, 1);
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m68k_unused_16_w (address, data);
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}
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@ -245,49 +245,49 @@ unsigned int ctrl_io_read_byte(unsigned int address)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0)
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if (!(address & 0xe0))
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{
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return m68k_read_bus_8(address);
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return io_read((address >> 1) & 0x0f);
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}
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return io_read((address >> 1) & 0x0f);
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return m68k_read_bus_8(address);
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}
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case 0x11: /* BUSACK */
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{
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if (address & 1)
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{
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return m68k_read_bus_8(address);
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}
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xfe;
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if (zstate ^ 3)
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if (!(address & 1))
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{
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xfe;
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if (zstate == 3)
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{
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return data;
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}
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return (data | 0x01);
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}
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return data;
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return m68k_read_bus_8(address);
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}
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case 0x30: /* TIME */
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{
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if (!cart.hw.time_r)
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if (cart.hw.time_r)
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{
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return m68k_read_bus_8(address);
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unsigned int data = cart.hw.time_r(address);
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if (address & 1)
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{
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return (data & 0xff);
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}
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return (data >> 8);
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}
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unsigned int data = cart.hw.time_r(address);
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if (address & 1)
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{
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return (data & 0xff);
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}
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return (data >> 8);
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return m68k_read_bus_8(address);
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}
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case 0x41: /* OS ROM */
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{
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if (!(address & 1))
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if (address & 1)
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{
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return m68k_read_bus_8(address);
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xfe;
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return (gen_bankswitch_r() | data);
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}
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unsigned int data = m68k_read_pcrelative_8(REG_PC) & 0xfe;
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return (gen_bankswitch_r() | data);
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return m68k_read_bus_8(address);
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}
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case 0x10: /* MEMORY MODE */
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@ -313,55 +313,48 @@ unsigned int ctrl_io_read_word(unsigned int address)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0)
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if (!(address & 0xe0))
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{
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return m68k_read_bus_16(address);
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unsigned int data = io_read((address >> 1) & 0x0f);
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return (data << 8 | data);
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}
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unsigned int data = io_read((address >> 1) & 0x0f);
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return (data << 8 | data);
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}
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return m68k_read_bus_16(address);
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}
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case 0x11: /* BUSACK */
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{
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unsigned int data = m68k_read_pcrelative_16(REG_PC) & 0xfeff;
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if (zstate ^ 3)
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if (zstate == 3)
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{
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return data | 0x0100;
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return data;
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}
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return data;
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return (data | 0x0100);
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}
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case 0x30: /* TIME */
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{
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if (!cart.hw.time_r)
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if (cart.hw.time_r)
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{
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return m68k_read_bus_16(address);
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return cart.hw.time_r(address);
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}
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return cart.hw.time_r(address);
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return m68k_read_bus_16(address);
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}
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case 0x50: /* SVP */
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{
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switch (address & 0xfe)
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if ((address & 0xfd) == 0)
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{
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case 0:
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case 2:
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{
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return svp->ssp1601.gr[SSP_XST].h;
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}
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case 4:
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{
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unsigned int temp = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return temp;
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}
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default:
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{
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return m68k_read_bus_16(address);
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}
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return svp->ssp1601.gr[SSP_XST].h;
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}
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if ((address & 0xff) == 4)
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{
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unsigned int data = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return data;
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}
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return m68k_read_bus_16(address);
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}
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case 0x10: /* MEMORY MODE */
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@ -387,35 +380,35 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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{
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case 0x00: /* I/O chip */
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{
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if ((address & 0xe1) != 0x01)
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if ((address & 0xe1) == 0x01)
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{
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/* get /LWR only */
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m68k_unused_8_w(address, data);
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io_write((address >> 1) & 0x0f, data);
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return;
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}
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io_write((address >> 1) & 0x0f, data);
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x11: /* BUSREQ */
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{
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if (address & 1)
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if (!(address & 1))
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{
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m68k_unused_8_w(address, data);
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gen_zbusreq_w(data & 1, mcycles_68k);
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return;
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}
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gen_zbusreq_w(data & 1, mcycles_68k);
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m68k_unused_8_w(address, data);
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return;
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}
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case 0x12: /* RESET */
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{
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if (address & 1)
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if (!(address & 1))
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{
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m68k_unused_8_w(address, data);
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gen_zreset_w(data & 1, mcycles_68k);
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return;
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}
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gen_zreset_w(data & 1, mcycles_68k);
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m68k_unused_8_w(address, data);
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return;
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}
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@ -427,12 +420,12 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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case 0x41: /* OS ROM */
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{
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if (!(address & 1))
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if (address & 1)
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{
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m68k_unused_8_w(address, data);
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gen_bankswitch_w(data & 1);
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return;
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}
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gen_bankswitch_w(data & 1);
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m68k_unused_8_w(address, data);
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return;
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}
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@ -460,12 +453,12 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0)
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if (!(address & 0xe0))
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{
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m68k_unused_16_w(address, data);
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io_write((address >> 1) & 0x0f, data & 0xff);
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return;
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}
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io_write((address >> 1) & 0x0f, data & 0xff);
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m68k_unused_16_w(address, data);
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return;
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}
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@ -496,14 +489,14 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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case 0x50: /* SVP REGISTERS */
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{
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if (address & 0xfd)
|
||||
if (!(address & 0xfd))
|
||||
{
|
||||
m68k_unused_16_w(address, data);
|
||||
svp->ssp1601.gr[SSP_XST].h = data;
|
||||
svp->ssp1601.gr[SSP_PM0].h |= 2;
|
||||
svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
|
||||
return;
|
||||
}
|
||||
svp->ssp1601.gr[SSP_XST].h = data;
|
||||
svp->ssp1601.gr[SSP_PM0].h |= 2;
|
||||
svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
|
||||
m68k_unused_16_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -631,12 +624,12 @@ void vdp_write_byte(unsigned int address, unsigned int data)
|
||||
case 0x10: /* PSG */
|
||||
case 0x14:
|
||||
{
|
||||
if (!(address & 1))
|
||||
if (address & 1)
|
||||
{
|
||||
m68k_unused_8_w(address, data);
|
||||
psg_write(mcycles_68k, data);
|
||||
return;
|
||||
}
|
||||
psg_write(mcycles_68k, data);
|
||||
m68k_unused_8_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -74,11 +74,11 @@ unsigned int zbank_read_ctrl_io(unsigned int address)
|
||||
{
|
||||
case 0x00: /* I/O chip */
|
||||
{
|
||||
if (address & 0xe0)
|
||||
if (!(address & 0xe0))
|
||||
{
|
||||
return zbank_unused_r(address);
|
||||
return (io_read((address >> 1) & 0x0f));
|
||||
}
|
||||
return (io_read((address >> 1) & 0x0f));
|
||||
return zbank_unused_r(address);
|
||||
}
|
||||
|
||||
case 0x11: /* BUSACK */
|
||||
@ -92,25 +92,25 @@ unsigned int zbank_read_ctrl_io(unsigned int address)
|
||||
|
||||
case 0x30: /* TIME */
|
||||
{
|
||||
if (!cart.hw.time_r)
|
||||
if (cart.hw.time_r)
|
||||
{
|
||||
return zbank_unused_r(address);
|
||||
unsigned int data = cart.hw.time_r(address);
|
||||
if (address & 1)
|
||||
{
|
||||
return (data & 0xff);
|
||||
}
|
||||
return (data >> 8);
|
||||
}
|
||||
unsigned int data = cart.hw.time_r(address);
|
||||
if (address & 1)
|
||||
{
|
||||
return (data & 0xff);
|
||||
}
|
||||
return (data >> 8);
|
||||
return zbank_unused_r(address);
|
||||
}
|
||||
|
||||
case 0x41: /* OS ROM */
|
||||
{
|
||||
if (!(address & 1))
|
||||
if (address & 1)
|
||||
{
|
||||
return zbank_unused_r(address);
|
||||
return (gen_bankswitch_r() | 0xfe);
|
||||
}
|
||||
return (gen_bankswitch_r() | 0xfe);
|
||||
return zbank_unused_r(address);
|
||||
}
|
||||
|
||||
case 0x10: /* MEMORY MODE */
|
||||
@ -137,34 +137,34 @@ void zbank_write_ctrl_io(unsigned int address, unsigned int data)
|
||||
case 0x00: /* I/O chip */
|
||||
{
|
||||
/* get /LWR only */
|
||||
if ((address & 0xe1) != 0x01)
|
||||
if ((address & 0xe1) == 0x01)
|
||||
{
|
||||
zbank_unused_w(address, data);
|
||||
io_write((address >> 1) & 0x0f, data);
|
||||
return;
|
||||
}
|
||||
io_write((address >> 1) & 0x0f, data);
|
||||
zbank_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
case 0x11: /* BUSREQ */
|
||||
{
|
||||
if (address & 1)
|
||||
if (!(address & 1))
|
||||
{
|
||||
zbank_unused_w(address, data);
|
||||
gen_zbusreq_w(data & 1, mcycles_z80);
|
||||
return;
|
||||
}
|
||||
gen_zbusreq_w(data & 1, mcycles_z80);
|
||||
zbank_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
case 0x12: /* RESET */
|
||||
{
|
||||
if (address & 1)
|
||||
if (!(address & 1))
|
||||
{
|
||||
zbank_unused_w(address, data);
|
||||
gen_zreset_w(data & 1, mcycles_z80);
|
||||
return;
|
||||
}
|
||||
gen_zreset_w(data & 1, mcycles_z80);
|
||||
zbank_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -176,12 +176,12 @@ void zbank_write_ctrl_io(unsigned int address, unsigned int data)
|
||||
|
||||
case 0x41: /* OS ROM */
|
||||
{
|
||||
if (!(address & 1))
|
||||
if (address & 1)
|
||||
{
|
||||
zbank_unused_w(address, data);
|
||||
gen_bankswitch_w(data & 1);
|
||||
return;
|
||||
}
|
||||
gen_bankswitch_w(data & 1);
|
||||
zbank_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -275,12 +275,12 @@ void zbank_write_vdp(unsigned int address, unsigned int data)
|
||||
case 0x10: /* PSG */
|
||||
case 0x14:
|
||||
{
|
||||
if (!(address & 1))
|
||||
if (address & 1)
|
||||
{
|
||||
zbank_unused_w(address, data);
|
||||
psg_write(mcycles_z80, data);
|
||||
return;
|
||||
}
|
||||
psg_write(mcycles_z80, data);
|
||||
zbank_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -65,6 +65,8 @@ static inline unsigned int z80_lockup_r(unsigned int address)
|
||||
}
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Z80 memory handlers
|
||||
*/
|
||||
@ -85,11 +87,11 @@ unsigned int cpu_readmem16(unsigned int address)
|
||||
|
||||
case 3: /* VDP */
|
||||
{
|
||||
if ((address >> 8) != 0x7f)
|
||||
if ((address >> 8) == 0x7f)
|
||||
{
|
||||
return z80_unused_r(address);
|
||||
return (*zbank_memory_map[0xc0].read)(address);
|
||||
}
|
||||
return (*zbank_memory_map[0xc0].read)(address);
|
||||
return z80_unused_r(address);
|
||||
}
|
||||
|
||||
default: /* V-bus bank */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user