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[Core/VDP] improved DMA timing accuracy during blanking (verified on real hardware by Mask of Destiny)

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EkeEke 2017-06-24 15:59:44 +02:00
parent 38ffc317cb
commit 4017d379e6
5 changed files with 11 additions and 10 deletions
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1
HISTORY.txt
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@ -105,6 +105,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
* improved FIFO timings accuracy (fixes "Overdrive" Demo) * improved FIFO timings accuracy (fixes "Overdrive" Demo)
* improved H-Counter accuracy in H32 mode * improved H-Counter accuracy in H32 mode
* improved VDP status timing accuracy * improved VDP status timing accuracy
* improved DMA timing accuracy during blanking (verified on real hardware by Mask of Destiny)
* improved accuracy of Master System color palette brightness range (verified against real hardware) * improved accuracy of Master System color palette brightness range (verified against real hardware)
* fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is used * fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is used
* fixed alpha channel for 15-bit (RGB555) and 32-bit (RGB888) color support * fixed alpha channel for 15-bit (RGB555) and 32-bit (RGB888) color support

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builds/genesis_plus_gx_libretro.dll
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20
core/vdp_ctrl.c
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@ -161,7 +161,7 @@ static const uint8 dma_timing[2][2] =
{ {
/* H32, H40 */ /* H32, H40 */
{16 , 18}, /* active display */ {16 , 18}, /* active display */
{167, 205} /* blank display */ {166, 204} /* blank display */
}; };
/* DMA processing functions (set by VDP register 23 high nibble) */ /* DMA processing functions (set by VDP register 23 high nibble) */
@ -560,19 +560,16 @@ void vdp_dma_update(unsigned int cycles)
/* DMA transfer rate (bytes per line) /* DMA transfer rate (bytes per line)
According to the manual, here's a table that describes the transfer
rates of each of the three DMA types:
DMA Mode Width Display Transfer Count DMA Mode Width Display Transfer Count
----------------------------------------------------- -----------------------------------------------------
68K > VDP 32-cell Active 16 68K > VDP 32-cell Active 16
Blanking 167
40-cell Active 18
Blanking 205
VRAM Fill 32-cell Active 15
Blanking 166 Blanking 166
40-cell Active 17 40-cell Active 18
Blanking 204 Blanking 204
VRAM Fill 32-cell Active 15
Blanking 165
40-cell Active 17
Blanking 203
VRAM Copy 32-cell Active 8 VRAM Copy 32-cell Active 8
Blanking 83 Blanking 83
40-cell Active 9 40-cell Active 9
@ -897,7 +894,10 @@ void vdp_z80_ctrl_w(unsigned int data)
{ {
case 2: case 2:
{ {
/* DMA Fill will be triggered by next write to DATA port */ /* DMA Fill */
dma_type = 2;
/* DMA is pending until next DATA port write */
dmafill = 1; dmafill = 1;
/* Set DMA Busy flag */ /* Set DMA Busy flag */