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[Core/VDP] fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is required
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@ -1481,7 +1481,7 @@ void render_bg_m4(int line)
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src = (uint32 *)&bg_pattern_cache[((attr & 0x7FF) << 6) | (v_line)];
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/* Copy left & right half, adding the attribute bits in */
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#ifdef ALIGN_DWORD
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#ifdef ALIGN_LONG
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WRITE_LONG(dst, src[0] | atex);
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dst++;
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WRITE_LONG(dst, src[1] | atex);
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@ -4,8 +4,8 @@
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*
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* Support for all TMS99xx modes, Mode 4 & Mode 5 rendering
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*
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* Copyright (C) 1998-2007 Charles Mac Donald (original code)
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* Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2014 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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