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[Core/VDP] fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is required

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EkeEke 2014-10-29 00:24:00 +01:00
parent bd8589f4b8
commit 453583886a
2 changed files with 3 additions and 3 deletions
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2
core/vdp_render.c
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@ -1481,7 +1481,7 @@ void render_bg_m4(int line)
src = (uint32 *)&bg_pattern_cache[((attr & 0x7FF) << 6) | (v_line)]; src = (uint32 *)&bg_pattern_cache[((attr & 0x7FF) << 6) | (v_line)];
/* Copy left & right half, adding the attribute bits in */ /* Copy left & right half, adding the attribute bits in */
#ifdef ALIGN_DWORD #ifdef ALIGN_LONG
WRITE_LONG(dst, src[0] | atex); WRITE_LONG(dst, src[0] | atex);
dst++; dst++;
WRITE_LONG(dst, src[1] | atex); WRITE_LONG(dst, src[1] | atex);

4
core/vdp_render.h
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@ -4,8 +4,8 @@
* *
* Support for all TMS99xx modes, Mode 4 & Mode 5 rendering * Support for all TMS99xx modes, Mode 4 & Mode 5 rendering
* *
* Copyright (C) 1998-2007 Charles Mac Donald (original code) * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
* Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) * Copyright (C) 2007-2014 Eke-Eke (Genesis Plus GX)
* *
* Redistribution and use of this code or any derivative works are permitted * Redistribution and use of this code or any derivative works are permitted
* provided that the following conditions are met: * provided that the following conditions are met: