[Core/CD] fixed byte access to word-only registers (verified on real hardware, cf. Krikzz's mcd-verificator)

This commit is contained in:
ekeeke 2024-02-22 14:14:27 +01:00
parent f09c97336e
commit 49a289df89
5 changed files with 19 additions and 5 deletions

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@ -53,6 +53,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
* fixed BOOT ROM level 4 interrupt vector upper word value (verified on real hardware, cf. Krikzz's mcd-verificator) * fixed BOOT ROM level 4 interrupt vector upper word value (verified on real hardware, cf. Krikzz's mcd-verificator)
* fixed access to "write-only" communication flags (verified on real hardware by Notaz) * fixed access to "write-only" communication flags (verified on real hardware by Notaz)
* fixed access to Sub-CPU "read-only" communication registers (fixes Round 5 Boss freeze in Streets of Rage / Sega Classics Arcade Collection) * fixed access to Sub-CPU "read-only" communication registers (fixes Round 5 Boss freeze in Streets of Rage / Sega Classics Arcade Collection)
* fixed byte access to word-only registers (verified on real hardware, cf. Krikzz's mcd-verificator)
* fixed byte access to memory mode, timer and font color registers at even address (verified on real hardware, cf. Krikzz's mcd-verificator) * fixed byte access to memory mode, timer and font color registers at even address (verified on real hardware, cf. Krikzz's mcd-verificator)
* fixed byte access to font data registers * fixed byte access to font data registers
* fixed memory mode register bits masking when read from MAIN-CPU and SUB-CPU (verified on real hardware, cf. Krikzz's mcd-verificator) * fixed memory mode register bits masking when read from MAIN-CPU and SUB-CPU (verified on real hardware, cf. Krikzz's mcd-verificator)

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@ -802,6 +802,8 @@ INLINE void word_ram_switch(uint8 mode)
} }
} }
static void scd_write_word(unsigned int address, unsigned int data);
static void scd_write_byte(unsigned int address, unsigned int data) static void scd_write_byte(unsigned int address, unsigned int data)
{ {
/* PCM area (8K) mirrored into $xF0000-$xF7FFF */ /* PCM area (8K) mirrored into $xF0000-$xF7FFF */
@ -1123,29 +1125,40 @@ static void scd_write_byte(unsigned int address, unsigned int data)
default: default:
{ {
uint16 reg_16 = address & 0x1fe;
/* SUB-CPU communication words */ /* SUB-CPU communication words */
if ((address & 0x1f0) == 0x20) if ((reg_16 >= 0x20) && (reg_16 <= 0x2f))
{ {
s68k_poll_sync(1 << ((address - 0x10) & 0x1f)); s68k_poll_sync(1 << ((address - 0x10) & 0x1f));
} }
/* MAIN-CPU communication words */ /* MAIN-CPU communication words */
else if ((address & 0x1f0) == 0x10) else if ((reg_16 >= 0x10) && (reg_16 <= 0x1f))
{ {
/* read-only (Sega Classic Arcade Collection) */ /* read-only (Sega Classic Arcade Collection) */
return; return;
} }
/* word-only registers */
else if (((reg_16 >= 0x08) && (reg_16 <= 0x0d)) ||
((reg_16 >= 0x34) && (reg_16 <= 0x35)) ||
((reg_16 >= 0x5a) && (reg_16 <= 0x67)))
{
scd_write_word(address, (data << 8) | (data & 0xff));
return;
}
/* default registers */ /* default registers */
if (address & 1) if (address & 1)
{ {
/* register LSB */ /* register LSB */
scd.regs[(address >> 1) & 0xff].byte.l = data; scd.regs[reg_16 >> 1].byte.l = data;
return; return;
} }
/* register MSB */ /* register MSB */
scd.regs[(address >> 1) & 0xff].byte.h = data; scd.regs[reg_16 >> 1].byte.h = data;
return; return;
} }
} }
@ -1412,7 +1425,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
return; return;
} }
case 0x0c: /* Stopwatch (word access only) */ case 0x0c: /* Stopwatch */
{ {
/* synchronize the counter with SUB-CPU */ /* synchronize the counter with SUB-CPU */
int ticks = (s68k.cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO; int ticks = (s68k.cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO;