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[Core/MCD] fixed PRG-RAM access from MAIN-CPU side on system reset

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This commit is contained in:
EkeEke 2015-04-26 18:25:21 +02:00
parent 72ddc6e985
commit 4a41e0cca7
2 changed files with 15 additions and 1 deletions
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14
core/cd_hw/scd.c
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@ -1519,6 +1519,20 @@ void scd_reset(int hard)
m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram;
m68k.memory_map[scd.cartridge.boot + 0x03].base = scd.prg_ram + 0x10000;
/* allow access to PRG-RAM from MAIN-CPU */
m68k.memory_map[scd.cartridge.boot + 0x02].read8 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x03].read8 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x02].read16 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x03].read16 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x02].write8 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x03].write8 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x02].write16 = NULL;
m68k.memory_map[scd.cartridge.boot + 0x03].write16 = NULL;
zbank_memory_map[scd.cartridge.boot + 0x02].read = NULL;
zbank_memory_map[scd.cartridge.boot + 0x03].read = NULL;
zbank_memory_map[scd.cartridge.boot + 0x02].write = NULL;
zbank_memory_map[scd.cartridge.boot + 0x03].write = NULL;
/* reset & halt SUB-CPU */
s68k.cycles = 0;
s68k_pulse_reset();

2
core/memz80.c
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@ -331,7 +331,7 @@ void z80_gg_port_w(unsigned int port, unsigned char data)
}
}
/* full address range is decoded by Game Gear I/O chip (fixes G-Loc) */
/* full address range is decoded by Game Gear I/O chip (fixes G-LOC Air Battle) */
else if ((port == 0x3E) || (port == 0x3F))
{
io_z80_write(port & 1, data, Z80.cycles + SMS_CYCLE_OFFSET);