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[Core/VDP] improved VINT timing accuracy in H32 mode (verified on real hardware by Nemesis)
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@ -160,6 +160,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
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* improved H-Counter accuracy in H32 mode
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* improved H-Counter accuracy in H32 mode
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* improved VDP status timing accuracy
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* improved VDP status timing accuracy
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* improved HBLANK flag timing accuracy (verified on real hardware by Nemesis)
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* improved HBLANK flag timing accuracy (verified on real hardware by Nemesis)
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* improved VINT timing accuracy in H32 mode (verified on real hardware by Nemesis)
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* improved DMA timing accuracy during blanking (verified on real hardware by Mask of Destiny)
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* improved DMA timing accuracy during blanking (verified on real hardware by Mask of Destiny)
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* improved accuracy of Master System color palette brightness range (verified against real hardware)
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* improved accuracy of Master System color palette brightness range (verified against real hardware)
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* fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is used
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* fixed misaligned buffer writes in Mode 4 when -DALIGN_LONG option is used
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@ -462,10 +462,10 @@ void system_frame_gen(int do_skip)
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v_counter = bitmap.viewport.h;
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v_counter = bitmap.viewport.h;
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/* delay between VBLANK flag & Vertical Interrupt (Dracula, OutRunners, VR Troopers) */
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/* delay between VBLANK flag & Vertical Interrupt (Dracula, OutRunners, VR Troopers) */
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m68k_run(788);
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m68k_run(vint_cycle);
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if (zstate == 1)
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if (zstate == 1)
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{
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{
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z80_run(788);
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z80_run(vint_cycle);
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}
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}
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/* set VINT flag */
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/* set VINT flag */
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@ -802,10 +802,10 @@ void system_frame_scd(int do_skip)
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v_counter = bitmap.viewport.h;
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v_counter = bitmap.viewport.h;
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/* delay between VBLANK flag & Vertical Interrupt (Dracula, OutRunners, VR Troopers) */
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/* delay between VBLANK flag & Vertical Interrupt (Dracula, OutRunners, VR Troopers) */
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m68k_run(788);
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m68k_run(vint_cycle);
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if (zstate == 1)
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if (zstate == 1)
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{
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{
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z80_run(788);
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z80_run(vint_cycle);
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}
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}
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/* set VINT flag */
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/* set VINT flag */
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@ -52,6 +52,9 @@
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} \
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} \
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bg_name_dirty[name] |= (1 << ((addr >> 2) & 7)); \
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bg_name_dirty[name] |= (1 << ((addr >> 2) & 7)); \
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}
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}
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/* VINT timings */
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#define VINT_H32_MCYCLE (770)
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#define VINT_H40_MCYCLE (788)
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/* HBLANK flag timings */
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/* HBLANK flag timings */
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#define HBLANK_H32_START_MCYCLE (280)
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#define HBLANK_H32_START_MCYCLE (280)
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@ -96,6 +99,7 @@ uint16 max_sprite_pixels; /* Max. sprites pixels per line (parsing & ren
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int32 fifo_write_cnt; /* VDP FIFO write count */
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int32 fifo_write_cnt; /* VDP FIFO write count */
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uint32 fifo_slots; /* VDP FIFO access slot count */
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uint32 fifo_slots; /* VDP FIFO access slot count */
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uint32 hvc_latch; /* latched HV counter */
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uint32 hvc_latch; /* latched HV counter */
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uint32 vint_cycle; /* VINT occurence cycle */
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const uint8 *hctab; /* pointer to H Counter table */
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const uint8 *hctab; /* pointer to H Counter table */
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/* Function pointers */
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/* Function pointers */
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@ -331,6 +335,9 @@ void vdp_reset(void)
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/* default FIFO access slots timings */
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/* default FIFO access slots timings */
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fifo_timing = (int *)fifo_timing_h32;
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fifo_timing = (int *)fifo_timing_h32;
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/* default VINT timing */
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vint_cycle = VINT_H32_MCYCLE;
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/* default HBLANK flag timings */
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/* default HBLANK flag timings */
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hblank_start_cycle = HBLANK_H32_START_MCYCLE;
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hblank_start_cycle = HBLANK_H32_START_MCYCLE;
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hblank_end_cycle = HBLANK_H32_END_MCYCLE;
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hblank_end_cycle = HBLANK_H32_END_MCYCLE;
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@ -1196,9 +1203,9 @@ unsigned int vdp_68k_ctrl_r(unsigned int cycles)
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/* Adjust cycle count relatively to start of line */
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/* Adjust cycle count relatively to start of line */
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cycles -= mcycles_vdp;
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cycles -= mcycles_vdp;
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/* Cycle-accurate VINT flag (Ex-Mutants, Tyrant / Mega-Lo-Mania, Marvel Land) */
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/* Cycle-accurate VINT flag (Ex-Mutants, Tyrant / Mega-Lo-Mania, Marvel Land, Pacman 2 - New Adventures / Pac-Jr minigame) */
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/* this allows VINT flag to be read just before vertical interrupt is being triggered */
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/* this allows VINT flag to be read just before vertical interrupt is being triggered */
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if ((v_counter == bitmap.viewport.h) && (cycles >= 788))
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if ((v_counter == bitmap.viewport.h) && (cycles >= vint_cycle))
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{
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{
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/* check Z80 interrupt state to assure VINT has not already been triggered (and flag cleared) */
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/* check Z80 interrupt state to assure VINT has not already been triggered (and flag cleared) */
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if (Z80.irq_state != ASSERT_LINE)
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if (Z80.irq_state != ASSERT_LINE)
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@ -1985,6 +1992,9 @@ static void vdp_reg_w(unsigned int r, unsigned int d, unsigned int cycles)
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/* FIFO access slots timings */
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/* FIFO access slots timings */
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fifo_timing = (int *)fifo_timing_h40;
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fifo_timing = (int *)fifo_timing_h40;
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/* VINT timing */
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vint_cycle = VINT_H40_MCYCLE;
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/* HBLANK flag timings */
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/* HBLANK flag timings */
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hblank_start_cycle = HBLANK_H40_START_MCYCLE;
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hblank_start_cycle = HBLANK_H40_START_MCYCLE;
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hblank_end_cycle = HBLANK_H40_END_MCYCLE;
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hblank_end_cycle = HBLANK_H40_END_MCYCLE;
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@ -2009,6 +2019,9 @@ static void vdp_reg_w(unsigned int r, unsigned int d, unsigned int cycles)
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/* FIFO access slots timings */
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/* FIFO access slots timings */
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fifo_timing = (int *)fifo_timing_h32;
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fifo_timing = (int *)fifo_timing_h32;
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/* VINT timing */
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vint_cycle = VINT_H32_MCYCLE;
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/* HBLANK flag timings */
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/* HBLANK flag timings */
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hblank_start_cycle = HBLANK_H32_START_MCYCLE;
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hblank_start_cycle = HBLANK_H32_START_MCYCLE;
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hblank_end_cycle = HBLANK_H32_END_MCYCLE;
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hblank_end_cycle = HBLANK_H32_END_MCYCLE;
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@ -79,6 +79,7 @@ extern uint16 max_sprite_pixels;
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extern int32 fifo_write_cnt;
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extern int32 fifo_write_cnt;
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extern uint32 fifo_slots;
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extern uint32 fifo_slots;
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extern uint32 hvc_latch;
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extern uint32 hvc_latch;
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extern uint32 vint_cycle;
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extern const uint8 *hctab;
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extern const uint8 *hctab;
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/* Function pointers */
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/* Function pointers */
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