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ekeeke31 2007-08-09 20:13:54 +00:00
parent bde714fa01
commit 622d308d3b
174 changed files with 106299 additions and 0 deletions
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174
genplus-gx/Makefile Normal file
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#---------------------------------------------------------------------------------
# Generic makefile for Gamecube projects
#
# Tab stops set to 4
# | | | |
# 0 1 2 3
#---------------------------------------------------------------------------------
# Clear the implicit built in rules
#---------------------------------------------------------------------------------
.SUFFIXES:
#---------------------------------------------------------------------------------
# TARGET is the name of the output
# BUILD is the directory where object files & intermediate files will be placed
# SOURCES is a list of directories containing source code
# INCLUDES is a list of directories containing extra header files
#---------------------------------------------------------------------------------
TARGET := genplus
BUILD := build
SOURCES := source source/m68k source/cpu source/sound \
source/ngc source/ngc/gui source/ngc/vfat
INCLUDES := source source/m68k source/cpu source/sound \
source/ngc source/ngc/gui source/ngc/vfat
#---------------------------------------------------------------------------------
# options for code generation
#---------------------------------------------------------------------------------
MACHDEP = -DGEKKO -mcpu=750 -meabi -mhard-float
CFLAGS = -g -O2 -Wall $(MACHDEP) $(INCLUDE) -DWORDS_BIGENDIAN \
-DNGC="1" -DGENESIS_HACKS="1" \
LDFLAGS = $(MACHDEP) -mogc -Wl,-Map,$(notdir $@).map -Wl,--cref
PREFIX := powerpc-gekko-
#export PATH:=/c/devkitPPC_r11/bin:/bin
#---------------------------------------------------------------------------------
# list of directories containing libraries, this must be the top level containing
# include and lib
#---------------------------------------------------------------------------------
LIBDIRS := /c/devkitPro/devkitPPC
#---------------------------------------------------------------------------------
# any extra libraries we wish to link with
#---------------------------------------------------------------------------------
LIBS := -logc -lm -lz -logcsys -lsdcard
#---------------------------------------------------------------------------------
# no real need to edit anything past this point unless you need to add additional
# rules for different file extensions
#---------------------------------------------------------------------------------
ifneq ($(BUILD),$(notdir $(CURDIR)))
#---------------------------------------------------------------------------------
export OUTPUT := $(CURDIR)/$(TARGET)
export VPATH := $(foreach dir,$(SOURCES),$(CURDIR)/$(dir))
export CC := $(PREFIX)gcc
export CXX := $(PREFIX)g++
export AR := $(PREFIX)ar
export OBJCOPY := $(PREFIX)objcopy
#---------------------------------------------------------------------------------
# automatically build a list of object files for our project
#---------------------------------------------------------------------------------
CFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.c)))
CPPFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.cpp)))
sFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.s)))
SFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.S)))
#---------------------------------------------------------------------------------
# use CXX for linking C++ projects, CC for standard C
#---------------------------------------------------------------------------------
ifeq ($(strip $(CPPFILES)),)
export LD := $(CC)
else
export LD := $(CXX)
endif
export OFILES := $(CPPFILES:.cpp=.o) $(CFILES:.c=.o) $(sFILES:.s=.o) $(SFILES:.S=.o)
#---------------------------------------------------------------------------------
# build a list of include paths
#---------------------------------------------------------------------------------
export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \
$(foreach dir,$(LIBDIRS),-I$(dir)/include) \
-I$(CURDIR)/$(BUILD)
#---------------------------------------------------------------------------------
# build a list of library paths
#---------------------------------------------------------------------------------
export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib)
export OUTPUT := $(CURDIR)/$(TARGET)
.PHONY: $(BUILD) clean
#---------------------------------------------------------------------------------
$(BUILD):
@[ -d $@ ] || mkdir $@
@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
#---------------------------------------------------------------------------------
clean:
@echo clean ...
@rm -fr $(BUILD) *.elf
#---------------------------------------------------------------------------------
run:
psoload $(TARGET).dol
#---------------------------------------------------------------------------------
reload:
psoload -r $(TARGET).dol
#---------------------------------------------------------------------------------
else
DEPENDS := $(OFILES:.o=.d)
#---------------------------------------------------------------------------------
# main targets
#---------------------------------------------------------------------------------
$(OUTPUT).dol: $(OUTPUT).elf
@echo output ... $(notdir $@)
@$(OBJCOPY) -O binary $< $@
#---------------------------------------------------------------------------------
$(OUTPUT).elf: $(OFILES)
@echo linking ... $(notdir $@)
@$(LD) $^ $(LDFLAGS) $(LIBPATHS) $(LIBS) -o $@
#---------------------------------------------------------------------------------
# Compile Targets for C/C++
#---------------------------------------------------------------------------------
#---------------------------------------------------------------------------------
%.o : %.cpp
@echo Compiling ... $(notdir $<)
@$(CXX) -MMD $(CFLAGS) -o $@ -c $<
#---------------------------------------------------------------------------------
%.o : %.c
@echo Compiling ... $(notdir $<)
@$(CC) -MMD $(CFLAGS) -o $@ -c $<
#---------------------------------------------------------------------------------
%.o : %.S
@echo Compiling ... $(notdir $<)
@$(CC) -MMD $(CFLAGS) -D_LANGUAGE_ASSEMBLY -c $< -o $@
#---------------------------------------------------------------------------------
%.o : %.s
@echo Compiling ... $(notdir $<)
@$(CC) -MMD $(CFLAGS) -D_LANGUAGE_ASSEMBLY -c $< -o $@
#---------------------------------------------------------------------------------
# canned command sequence for binary data
#---------------------------------------------------------------------------------
define bin2o
cp $(<) $(*).tmp
$(OBJCOPY) -I binary -O elf32-powerpc -B powerpc \
--rename-section .data=.rodata,readonly,data,contents,alloc \
--redefine-sym _binary_$*_tmp_start=$*\
--redefine-sym _binary_$*_tmp_end=$*_end\
--redefine-sym _binary_$*_tmp_size=$*_size\
$(*).tmp $(@)
echo "extern const u8" $(*)"[];" > $(*).h
echo "extern const u32" $(*)_size[]";" >> $(*).h
rm $(*).tmp
endef
-include $(DEPENDS)
#---------------------------------------------------------------------------------
endif
#---------------------------------------------------------------------------------

30
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confjoy.o: c:/Devkitpro/examples/genplus/source/ngc/gui/confjoy.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

2
genplus-gx/build/diskio.d Normal file
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diskio.o: c:/Devkitpro/examples/genplus/source/ngc/vfat/diskio.c \
c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.h

31
genplus-gx/build/dvd.d Normal file
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dvd.o: c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

33
genplus-gx/build/eeprom.d Normal file
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eeprom.o: c:/Devkitpro/examples/genplus/source/eeprom.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h \
c:/Devkitpro/examples/genplus/source/shared.h

37
genplus-gx/build/filesel.d Normal file
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filesel.o: c:/Devkitpro/examples/genplus/source/ngc/gui/filesel.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/iso9660.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/unzip.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/diskio.h

31
genplus-gx/build/fm.d Normal file
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fm.o: c:/Devkitpro/examples/genplus/source/sound/fm.c \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

33
genplus-gx/build/font.d Normal file
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font.o: c:/Devkitpro/examples/genplus/source/ngc/gui/font.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/gpback.h

31
genplus-gx/build/gcaram.d Normal file
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gcaram.o: c:/Devkitpro/examples/genplus/source/ngc/gcaram.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

31
genplus-gx/build/genesis.d Normal file
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genesis.o: c:/Devkitpro/examples/genplus/source/genesis.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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genplus-gx/build/ggentry.d Normal file
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ggentry.o: c:/Devkitpro/examples/genplus/source/ngc/gui/ggentry.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h

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input.o: c:/Devkitpro/examples/genplus/source/input.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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io.o: c:/Devkitpro/examples/genplus/source/io.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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iso9660.o: c:/Devkitpro/examples/genplus/source/ngc/gui/iso9660.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/iso9660.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.h

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legal.o: c:/Devkitpro/examples/genplus/source/ngc/gui/legal.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dkpro.h

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loadrom.o: c:/Devkitpro/examples/genplus/source/ngc/loadrom.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h \
c:/Devkitpro/examples/genplus/source/shared.h

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m68kcpu.o: c:/Devkitpro/examples/genplus/source/m68k/m68kcpu.c \
c:/Devkitpro/examples/genplus/source/m68k/m68kops.h \
c:/Devkitpro/examples/genplus/source/m68k/m68kcpu.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h

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m68kopac.o: c:/Devkitpro/examples/genplus/source/m68k/m68kopac.c \
c:/Devkitpro/examples/genplus/source/m68k/m68kcpu.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h

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m68kopdm.o: c:/Devkitpro/examples/genplus/source/m68k/m68kopdm.c \
c:/Devkitpro/examples/genplus/source/m68k/m68kcpu.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h

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m68kopnz.o: c:/Devkitpro/examples/genplus/source/m68k/m68kopnz.c \
c:/Devkitpro/examples/genplus/source/m68k/m68kcpu.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h

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m68kops.o: c:/Devkitpro/examples/genplus/source/m68k/m68kops.c \
c:/Devkitpro/examples/genplus/source/m68k/m68kops.h

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mcard.o: c:/Devkitpro/examples/genplus/source/ngc/gui/mcard.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/saveicon.h

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mem68k.o: c:/Devkitpro/examples/genplus/source/mem68k.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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membnk.o: c:/Devkitpro/examples/genplus/source/membnk.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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memvdp.o: c:/Devkitpro/examples/genplus/source/memvdp.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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memz80.o: c:/Devkitpro/examples/genplus/source/memz80.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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menu.o: c:/Devkitpro/examples/genplus/source/ngc/gui/menu.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h

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ngc.o: c:/Devkitpro/examples/genplus/source/ngc/ngc.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h

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render.o: c:/Devkitpro/examples/genplus/source/render.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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rominfo.o: c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/rominfo.h

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sn76489.o: c:/Devkitpro/examples/genplus/source/sound/sn76489.c \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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sn76496.o: c:/Devkitpro/examples/genplus/source/sound/sn76496.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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sound.o: c:/Devkitpro/examples/genplus/source/sound/sound.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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sram.o: c:/Devkitpro/examples/genplus/source/sram.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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ssf2tnc.o: c:/Devkitpro/examples/genplus/source/ssf2tnc.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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state.o: c:/Devkitpro/examples/genplus/source/state.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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system.o: c:/Devkitpro/examples/genplus/source/system.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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unzip.o: c:/Devkitpro/examples/genplus/source/ngc/unzip.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/dvd.h \
c:/Devkitpro/examples/genplus/source/ngc/gui/font.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/diskio.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.h

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vdp.o: c:/Devkitpro/examples/genplus/source/vdp.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/hvc.h

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vfat.o: c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.c \
c:/Devkitpro/examples/genplus/source/ngc/vfat/vfat.h \
c:/Devkitpro/examples/genplus/source/ngc/vfat/diskio.h

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ym2612.o: c:/Devkitpro/examples/genplus/source/sound/ym2612.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h

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z80.o: c:/Devkitpro/examples/genplus/source/cpu/z80.c \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/types.h \
c:/Devkitpro/examples/genplus/source/macros.h \
c:/Devkitpro/examples/genplus/source/cpu/m68k.h \
c:/Devkitpro/examples/genplus/source/cpu/m68kconf.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/cpuintrf.h \
c:/Devkitpro/examples/genplus/source/cpu/osd_cpu.h \
c:/Devkitpro/examples/genplus/source/genesis.h \
c:/Devkitpro/examples/genplus/source/vdp.h \
c:/Devkitpro/examples/genplus/source/render.h \
c:/Devkitpro/examples/genplus/source/mem68k.h \
c:/Devkitpro/examples/genplus/source/memz80.h \
c:/Devkitpro/examples/genplus/source/membnk.h \
c:/Devkitpro/examples/genplus/source/memvdp.h \
c:/Devkitpro/examples/genplus/source/system.h \
c:/Devkitpro/examples/genplus/source/io.h \
c:/Devkitpro/examples/genplus/source/input.h \
c:/Devkitpro/examples/genplus/source/sound/sound.h \
c:/Devkitpro/examples/genplus/source/sound/fm.h \
c:/Devkitpro/examples/genplus/source/shared.h \
c:/Devkitpro/examples/genplus/source/sound/sn76496.h \
c:/Devkitpro/examples/genplus/source/ngc/osd.h \
c:/Devkitpro/examples/genplus/source/ngc/gcaram.h \
c:/Devkitpro/examples/genplus/source/state.h \
c:/Devkitpro/examples/genplus/source/sram.h \
c:/Devkitpro/examples/genplus/source/eeprom.h \
c:/Devkitpro/examples/genplus/source/ssf2tnc.h \
c:/Devkitpro/examples/genplus/source/sound/sn76489.h \
c:/Devkitpro/examples/genplus/source/sound/ym2612.h \
c:/Devkitpro/examples/genplus/source/cpu/z80.h \
c:/Devkitpro/examples/genplus/source/cpu/z80daa.h

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The Genesis Plus Project
------------------------------
CHANGELOG:
[Genesis]
- improved big endian support in render.c and vdp.c
- fixed leftmost window/nta column renderer and implemented window bug (documented in genvdp.txt)
- fixed border color update
- fixed VDP address register latch
- corrected VRAM access timing so that it does not interfere with DMA timing anymore
- fixed READ_xxx and WRITE_xxx macros for portability
- added internal game database to detect games using serial EEPROM as backup RAM
- completely rewrote EEPROM emulation to support each known EEPROM types (24C01-24C65) and mappers (Sega, EA, Acclaim, Codemasters).
This should fix SRAM support in the following games:
. Rings of Power, NHLPA Hockey 93 (EA mapper)
. NBA Jam (alternate Acclaim mapper)
. College Slam, Frank Thomas Big Hurt Baseball (24C65)
. Micro Machines serie (Codemasters mapper)
20/07/2007:
[Genesis]
- corrected TeamPlayer support: fix multiplayer in Gauntlet 4 (Sept. version), Pengo and a lot of others
- added J-Cart support: enable multiplayer in Codemasters games (Pete Sampras, Micromachines games, Super Skidmarks)
- added serial EEPROM autodetection: fix games with bad SRAM informations in header (NBA Jam TE)
- added SVP faking: display 2D graphics in Virtua Racing (the game is however still unplayable)
- added support for more internal IO registers: fixe some unlicensed games (Wisdom Tree games...)
- added preliminary support for unmapped protection device: fix some unlicensed games with special built-in hardware (Squirell King, Lion King 2...)
- added "Soft Reset" combo (in game, use L+Z triggers): this should be like pressing the RESET button on a real Genesis and this is required
in some games to enable special features or even complete the game (ex: X-Men).
[NGC]
- added separate configuration for PortA/PortB inputs (GAMEPAD, MULTITAP or NONE, see Joypad Config): this let you setting
PORTB as unplugged, which is needed in some games to access special modes or enable cheat codes (Alien Storm, X-Men...)
- Freezestate & SRAM files are now compressed (using zlib)
- FreezeState & SRAM files can now be saved/loaded to/from SDCARD: located in /genplus/saves/ from the root of your SDCARD
- changed initial ROMS directory for SDCARD user: now looking for /genplus/roms/ from the root of your SDCARD
- added user-transparent SRAM autoload (detection order is MCARD then SDCARD, SLOTA then SLOTB)
- "System reboot" is now used for console reboot and SD/PSO reload (if detected)
- added new font: now use original IPL font, extracted from Bootrom
- modified controls when going into the rom selection menu (DVD or SDCARD):
. use B button to go up one directory
. use Z button to quit the file selection menu
. use L/R triggers to go down/up one full page
. use Left/Right buttons or Analog stick to scroll the selected entry's filename when it can't be full displayed
- various menu rearrangment, minor bugfixes & sourcecode cleanup
21/06/2007:
- added 4.7GB DVD support for WII drives (the maximal allowed size for Gamecube DVD is still 1.35GB)
- removed MPAL video timings, always use 60Hz NTSC: fix display problems for PAL wii users (no more PAL50 version needed)
- added Console Reboot option in main menu (IPL Reboot)
- added Multitap support (EA 4-Way Play and Sega Teamplayer): allowed up to four players in games supporting those peripherals
- added partial Sega Menacer lightgun support (use Analog Stick): automatically set when detecting the 6-in-1 Menacer game
18/05/2007:
- you can now switch between FM cores without reseting the game. FM registers value are automatically restored when switching.
- modified PAL framesync a little bit: the 20ms period is now applied between the start of 2 consecutive frames,
no more between the end of the previous and the start of the next one, which seems more correct to me
- removed the previous VINT timings modification because it brokes some games (Rocket Knight, Thunderforce III,...)
- added automatic Timing configuration (VDP latency, VINT timing & alternate Line Timing) at game loading, based upon specific romname detection.
This means you can still modify some of these options afterwards but they are now automatically set/unset when loading a game which need
special timing fixes. These fixes are also automatically desactivated when the current game doesn't need them.
For your information, games that are actually detected and need special timings to run properly are:
.Legend of Galahad & Road Rash series (single line not rendered properly)
.Sesame Street Counting Cafe (don't boot)
.Chaos Engine/Soldiers of Fortune (graphic glitches on scrolling)
08/05/2007:
- corrected L & R buttons assignment: fixes Genesis X & Z buttons being inverted
- VINT timings are now a little more accurate: fixes Sesame's Street Counting Cafe
- SN76496 MAX_OUTPUT back to normal
- modified FB_WNOISE value in SN76496 core according to John Kortink's last informations
- added support for Maxim's PSG core, same as used in SMSPLUS (it becomes the default PSG core)
- updated FM core to the latest MAME version
- corrected DAC output level (fixes voices and some special FX being too low)
- added support for Gens YM2612 (FM) core (MAME's one still remains default FM core)
- added configurable preamplification for each sound cores (see Emulator Options)
- added some other configurable sound options (boost overall volume, FM improvment for Gens YM2612)
11/04/2007:
- corrected MAX_OUTPUT value in SN76496 core: fix PSG sound (SFX) volume
- removed unused sound buffer allocation
26/03/2007:
- added DVD automount: automatically call libogc DVD_Mount function if ISO PVD reading failed (idea taken from softdev's last neocdredux release). This may be useful for loading roms from a DVD after booting from SDLOAD or after stopping DVD motor.
- added "DVD motor off" feature, like in others emulators
- corrected Memory Card mounting function: EXI_ProbeReset() function was never called if the first mounting attempt failed. Should fix some of the "Unable to mount memory card" errors.
22/03/2007:
- added SDCARD subdirectory browsing and LFN (255 char. max) support
17/03/2007:
- remove some rendering unused code (only used by DOS version of genesis plus) for little speedup
- added an option to enable alternate line rendering timing (fix single line error in Road Rash series and Legend of Galahad's Intro)
- Color RAM update now always reset color 0 to border color (fix color glitches in Mortal Kombat,...) (thanks to Noop's for the idea)
- added last Softdev's modifications (normalised memory access and ASM GU functions used intead of 'C' ones) for some speedup
- updated gcaram.c to be compatible with last libogc version
09/03/2007:
- little rendering code speedups
- modified HV counter tables (fix graphic glitches in Skitchin's sky, Lotus 2 Recs, Panorama Cotton, Dashin Desperados & maybe more)
- completely rewrote DMA timings emulation so that it works for all games (no more cpu freezing)
- added all DMA tranfer rates handling for each three DMA modes and added dma busy flag emulation
- modified interrupts handling on VDP register #0 and #1 writes (fix Lemmings status bar)
- added VDP RAM write latency (fix Chaos Engine/Soldier of Fortune gfx glitches)
- modified FM timers handling a bit (fix Vectorman2 music)
- corrected Sprite Limit rendering (fix Sonic 1 & Micromachines 2 title screens)
- corrected IO Registers writes (fix Decap' Attack controls, no more need for alternate input)
- corrected 6 Buttons Pad emulation (fix 6buttons detection in Mortal Kombat 3, Comix Zone and other 6-buttons compatible games)
- modified sound mixing a bit according to Generator sourcecode (FM and PSG ratios seems more correct)
- added separate CPU Region (USA, Europe, Japan,...) & Speed (PAL or NTSC) choice in menu options
- modified main frame synchro in PAL mode (fix sound glitch in this mode), thanks to Softdev for the solution
- added savestates support (go to SRAM menu, memory card supports only)
07/02/2007: (Eke-Eke)
- fm timers fixed (fix missing music in Castle of Illusion, Quackshot, Undead Line, Wonderboy in Monster Lair, Cal 50, Turbo Outrun, Thundeforce 4 and maybe more)
- added complete EEPROM emulation (save support now works fine in Wonderboy5, Megaman Willy Wars, NBA Jam...) (credits to Notaz, adapted from Picodrive code)
- added preliminar dma timing emulation (fix bottom screen in Legend of Galahad) (credits to Notaz, adapted from Picodrive code)
- hack: clear Vint pending after Hint (INT level 4) acknowledge (fix Fatal Rewind)
- hack: modify read_bus16 to return a random value (fake fetch) (fix Time Killers)
- modified cpu execution timings, with more correct hblank and interrupts timing (fix ISS Deluxe, Double Dragon 2 and certainly more) (Based on Gens code)
- modified busreq mechanism: better synchro between z80 & 68k (no need to dejitter anymore) (Based on Gens code)
- added sprite collision detection (fix Strider 2)
- modified dma fill operation for big endian platform (fix Contra Hardcorps gfx garbage)
Based on Softdev's initial releases
WIP1.2 unzip.c
Added partial zip support
WIP1.1 sio.c added
Added six button pad support from x86 Gens
Additional changes based on Charles MacDonald's gen-hw.txt
WIP1 07 March 2006
Updated SN76496 driver
Added GX Hardware Scaling

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make clean

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make

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In order to compile genesis plus with actual libogc, you need to:
1/ download last libogc source (04-02-2007)
2/ replace gu_psasm.S in /LIBBOGC directory located in root libogc source directory by the one included with this release
3/ recompile and reinstall libogc in your devkitPP environment (type 'make' then 'make install')
4/ compile genplus source (type 'make' in genplus folder)

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×××-–—————————————————————————————————-———————————————————————————————————-×××
·gGGgø
—————— ·gg• gGee• gGGg ×× ———————————
þg þ¨ þ¨ g ×
——— þg øg þEeeø þgggg gge·e• ggg•· þ ggg•· ———
þgG gg þe þ¨ Ng þ· g¨ þi gg¨
— ·gG ggg þg· þ gg þg g××Sg þg gSggg —
—————— ¨þggg¨ ¨gggg• þ g ¨g×××× ¨g þ× ¨gg ———
·•ggg ·•gg
————————P —— L — U S ———————
softdev.tehskeen.com
ø°º–––————————————————————————————————————————————————————————————————————×·.
°Ø¨–; -×× description ××-
·/ –––––———— –––––––––– ––—————––––––—— ——–––––– –––––—————
Genesis Plus emulates the Sega's Genesis/Mega Drive system. It was
originally created by Charles MacDonald and ported to the Nintendo GameCube
by The "Genesis Plus" Team. It is an open source emulator and a community
project which aims to bring you blast processing into the past.
Using this "emulator" you will be able to enjoy all of your classic 16bit
games in all of their glory. GenesisPlus has been converted from a PC
based platform to run on the GameCube's proprietary PPC Gekko processor
and features customized code to give you the best gaming experience
possible.
This port is based on Genesis Plus 1.2 sourcecode but it's also featuring a lot of
modifications & additions to improve games compatibility, emulation accuracy
and various peripheral supports. See changelog.txt for the whole history.
... Features ...
• accurate & full speed Sega Genesis emulation
• Stereo Sound (@48 kHz)
• PAL Megadrive (50Hz) timings support
• 1~4 Players support
• 6-Buttons Joypad support
• Sega TeamPlayer & EA 4-Way Play support
• J-Cart support (autodetected)
• partial Sega Menacer support (autodetected for Menacer 6-in-1 game)
• Freeze State support
• SRAM support
• serial EEPROM support (Megaman Willy Wars, NBA JAM, Wonderboy in Monsterworld...)
• Banked ROM support (Super Street Fighter 2)
• Banked SRAM support (Phantasy Star 4)
• Game Genie Codes support
• ROM Information Screen
• Zipped Roms support
• Interleaved (.smd) Roms support
• Load game from SDCARD or DVD (4.7GB DVD support for Wii users)
• Load/Save SRAM and FreezeState files (compressed) from/to Memory Card & SDCARD
• SRAM autoload
• SDLOAD or IPL reboot option
ø°º–––————————————————————————————————————————————————————————————————————×·.
°Ø¨–; ×-× installation ×-×
·/ –––––———— –––––––––– ––—————––––––—— ——–––––– –––––—————
The emulator is provided as a .dol which is a Gamecube Executable. You only need to load and run
the DOL on your GC or WII (Gamecube controller is needed) using various methods (Bootable DVD, SDLOAD,...)
If you have no idea on how to load&run a DOL, please go here on follow the available guides:
http://modyawii.tehskeen.com/ (Booting Homebrew Section)
SDCARD users should create a directory named "genplus" at the root of the SDCARD.
Inside this directory, you have to create then a subdirectory named "roms" to put all your roms.
You should also create a subdirectory named "saves" where SRAM and FreezeState files will be saved.
If using a DVD to load the roms, the format of the image you burned must be ISO9960
or you won't be able to read from it. The maximal readable size is 1.35GB for Gamecube users
and 4.7GB for Wii users.
IMPORTANT: When putting roms either on DVD or SDCARD, it is recommended to use subdirectories as there is
a limit of 1000 files per directory.
ø°º–––————————————————————————————————————————————————————————————————————×·.
°Ø¨–; -×× usage -××
·/ –––––———— –––––––––– ––—————––––––—— ——–––––– –––––—————
You'll start off with the main introduction screen and after pressing "A"
you will be at the main menu. Note that at anytime during gameplay you can
return to the main menu by tapping on that little Z button (you know, the
one on your controller).
Pressing 'L + Z' Triggers during Gameplay will execute a "Soft Reset".
This should be like pressing the RESET button on a real Genesis.
This is needed by some games to unlock special features and by the X-Men
game to complete the "Mojo's Crunch" level.
Pressing 'B' in any menu will get you back to the previous screen.
Of course it's a menu so you have yourself a few things to choose from.
So here's a list and what they do.
PLAY GAME: Takes you into or back to the game.
-----------------------------------------------------------------------------------
GAME INFOS: Shows basic ROM information
-----------------------------------------------------------------------------------
This screen shows some basic information for the loaded ROM.
Of note is the supports area at the bottom of the list.
Use Up/Down buttons or Analog Stick to scrolldown the screen.
If the ROM supports 6-button gamepads, they are automatically selected for you.
Otherwise, the standard 3-button pad is used. (This can also be forced in Joypad Config menu)
RESET GAME: Performs a soft-reset on the genesis virtual console
-----------------------------------------------------------------------------------
LOAD NEW GAME: Let you load a new game from DVD or SDCARD
-----------------------------------------------------------------------------------
When entering the rom selection menu (DVD or SDCARD), following controls are used:
. A button : load the selected file
. B button : go up one directory
. Z button : quit the file selection menu
. L/R triggers : go down/up one full page
. Left/Right buttons or Analog stick : scroll the selected entry's filename when it can't be full displayed
. Up/Down buttons or Analog stick : select previous/next file
* Load from DVD:
****************
A DVD browser is displayed. Navigate and select your ROM from here.
IMPORTANT: Your DVD must be in ISO9660 format
* Load from SDCARD:
*******************
A SDCARD browser is displayed. Navigate and select your ROM from here.
IMPORTANT: To load roms from SDCARD, you have to use a SDCARD adapter in MC SlotA
On the SDCARD, roms must be initially placed in /genplus/roms subdirectory
In both cases, the maximum number of files per directory (DVD or SDCARD) is 1000.
It is *recommended* to use subdirectories.
EMULATOR OPTIONS: Let you configure various options
-----------------------------------------------------------------------------------
Misc Options:
*************
X and Y are to try to compensate for TVs with high overscan, or if
you just want to play on a smaller area.
VDP Latency is used to be more accurate in term of VRAM write timing,
it is required by some games (Chaos Engine...) to be displayed properly
(OFF by default, automatically set when specific roms are detected)
DMA Timing is used to be more accurate in term of DMA copy to V-RAM timing,
it is required by some games (Legend of Galahad...) to be displayed properly
(ON by default)
ALT. timing let you modify the line rendering timing. This is used in some games
(Road Rash series, Legend of Galahad) which have single line display glitch
(OFF by default, automatically set when specific roms are detected)
NOTE: These options are now automatically set when loading a game which need special timing fixes.
These fixes are also now automatically desactivated when the current game doesn't need them.
For your information, games that actually need special timings to run properly are:
.Legend of Galahad & Road Rash series (single line not rendered properly)
.Sesame Street Counting Cafe (don't boot)
.Chaos Engine/Soldiers of Fortune (graphic glitches when scrolling)
CPU Mode let you force the CPU speed for the game:
* AUTO: orignal CPU speed is automatically detected
* NTSC: 60hz Genesis display
* PAL: 50Hz Genesis display
The game will automatically be be reloaded after you change this setting.
REGION let you force the region setting for the game:
when changing region setting, some games may display different things but also may not load
if they have some internal region detection code.
* AUTO: orignal game region is automatically detected
* EUR (europe 50Hz), USA (usa 60Hz), JAPAN (japan 60Hz) or JAPAN_PAL (japan 50Hz)
The game will automatically be be reloaded after you change this setting.
SRAM AUTOLOAD let you enable/disable automatic SRAM loading when starting a new game.
The detection order is: MCARD (SLOTA) > MCARD (SLOTB) > SDCARD (SLOTA) > SDCARD (SLOTB)
Sound Options:
**************
PSG VOLUME let you adjust the global volume level for the PSG output (0~200%)
FM Volume let you adjust the global volume level for the FM output (0~200%)
Default values depends on the current FM & PSG core and are automatically set when switching between cores.
BOOST VOLUME let you modify the overall sound level (0~4x).
This could be useful when adjusting FM and PSG relative levels.
Setting those values too high may produce some bad effects.
HQ YM2612 is only useful when selecting Gens FM core, in order to have the most accurate YM2612 emulation.
FM CORE let you choose which YM2612 emulation core to use, both have specific issues with some games:
* GENS is the core used in Gens, a famous Genesis emulator for PC platforms
* MAME is the one used in MAME (DEFAULT)
PSG CORE let you choose which PSG emulation core to use:
* MAME is the one used in MAME
* SMSP is the one developped by Maxim from smspower.org (DEFAULT)
Configure Joypads:
******************
Allows you to configure the joypads.
Here you can remap all 6 buttons, and adjust the Analog stick
sensitivity. A lower value is more sensitive.
IMPORTANT: the Analog Stick is also used when emulating the Sega Menacer lightgun,
so you may want to reduce the sensibility when playing the Menacer 6-in-1 game
TYPE let you choose the type of the emulated Genesis gamepads (3-Buttons or 6-Buttons)
Genesis Plus automatically detects and set this option if the current game supports 6-Buttons but
you can also force use of 3-Buttons gamepads if you prefer.
* 3BUTTONS: use classic Genesis controllers
* 6BUTTONS: use 6-Buttons Genesis controllers
PORTA and PORTB let you choose which type of device to be plugged in each two Genesis input ports:
* GAMEPAD: single gamepad (3 or 6-buttons, see above)
* MULTITAP: multiplayer adapter (Sega Teamplayer or EA 4-Way Play)
* NONE: unplugged
IMPORTANT:
1/ MULTITAP should only be plugged if the game is supporting one of the multiplayer adapter.
Actually, both Sega Teamplayer and EA 4-Way Play adapters are supported.
Games are usually supporting only one of the above adapters but Genesis Plus automatically detect
which one should be used.
3/ Most multiplayer games will work with MULTITAP plugged in PORTA but some of them require
a GAMEPAD to be plugged in PORTA and the MULTITAP to be plugged in PORTB.
4/ MULTITAP shouldn't be plugged in both ports since only games supporting more than 4 players
can take advantage of this configuration. As we only have 4 controllers max. on the Gamecube,
only the 4 first gamepads will effectively been seen as plugged.
5/ J-Cart games (Micromachines games, Pete Sampras games, Super Skidmarks) use a built-in adapter
to enable 2 additional gamepads to be plugged and are not compatible with any of the above adapters.
So, do not activate MULTITAP with those games, they are automatically detected by the system which
configure itself to enable up to 4 players support.
6/ Be sure that all controllers are correctly plugged when you switch on the console, otherwise,
they won't be detected. Also don't unplug any controllers or you will need to reboot the system.
7/ Changing Controller Type or Port settings will reset the current game.
8/ When the 6-in-1 Menacer game is detected, PORTA is forced to NONE and PORTB forced to MENACER, you
can not change those settings as long as you don't load another rom (previous settings will be restored)
Game Genie Cheats:
******************
Code entry for those of you into cheating :)
This screen lets you enter up to eight Game Genie codes.
Use the A key to select/release an entry
Use the B key to exit.
MEMORY MANAGER: Let you managed SRAM and FreezeState files
-----------------------------------------------------------------------------------
. SRAM Manager: Let you load/save SRAM data from/to the selected device
. STATE Manager: Let you load/save FreezeState data from/to the selected device
For each submenu, you can now choose the device type and location.
Be sure to set this according to your system configuration before saving/loading files.
. Device: Let you choose the device to use: SDCARD or MCARD
. SLOT: Let you choose which MC slot to use for the device
IMPORTANT:
1/ when using NGC Memory Card in SLOTA, some mounting errors may occur. In this case,
remove and insert the Memory Card again before trying to save/load anything.
2/ when using SDCARD, the directory /genplus/saves must exist
3/ for Wii users, please note that the SD slot can *NOT* be acceeded so use a SD-Adapter in a MC SLot
STOP DVD MOTOR: Stop the DVD motor and the disc from spinning during playtime
-----------------------------------------------------------------------------------
SYSTEM REBOOT:
-----------------------------------------------------------------------------------
For users of SDLoad or PSOLoad, you can call this to go back.
For others, this will reboot the system
ø°º–––————————————————————————————————————————————————————————————————————×·.
°Ø¨–; ××- develloper notes ××-
·/ –––––———— –––––––––– ––—————––––––—— ——–––––– –––––—————
According to the GNU status of this project, the sourcecode MUST be included in any binary releases you made.
To recompile the sourcecode, you will need to have installed:
. DevkitPPC environment
. libOGC last sources
You also need to replace the gu_psasm.S file which is located in the /LIBBOGC directory (from the root of libogc source directory)
with the one included in this release and then recompile/reinstall libogc.
If you have no idea on how to compile DOLs , please refer to this thread:
http://www.tehskeen.com/forums/showthread.php?t=2968.
ø°º–––————————————————————————————————————————————————————————————————————×·.
°Ø¨–; ××- credits ××-
·/ –––––———— –––––––––– ––—————––––––—— ——–––––– –––––—————
coding - the "genesis plus team"
softdev
honkeykong
markcube
additionnal code and support - eke-eke
graphics - brakken
documentation - softdev (chm)
brakken (user d0x)
eke-eke (rewrite and changelog updates)
additional credits:
• Stephane Dallongeville for the YM2612 core from his GENS project (http://gens.consolemul.com/) and
for making Gens opensource, which has been an unvaluable help while upgrading this emulator
• Maxim for his SN76489 core (http://www.smspower.org), already use ins SMSPlus
• People at SMSPower's and SpritesMind's forums (http://www.spritesmind.net) for their technical help
• Notaz for Picodrive's (Sega Genesis/MegaCD Emulator for GP2X) sourcecode from which
unlicensed games support and Virtua racing SVP faking has been taken.
(see /doc for original credits)
×××-–—————————————————————————————————-———————————————————————————————————-×××

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genplus-gx/gu_psasm.S Normal file
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#include <asm.h>
#define A00_A01 fr0
#define A02_A03 fr1
#define A10_A11 fr2
#define A12_A13 fr3
#define A20_A21 fr4
#define A22_A23 fr5
#define B00_B01 fr6
#define B02_B03 fr7
#define B10_B11 fr8
#define B12_B13 fr9
#define B20_B21 fr10
#define B22_B23 fr11
#define D00_D01 fr12
#define D02_D03 fr13
#define D10_D11 fr14
#define D12_D13 fr15
#define D20_D21 fr2
#define D22_D23 fr0
#define UNIT01 fr31
#define RET_REG fr1
#define V1_XY fr2
#define V1_Z fr3
#define V2_XY fr4
#define V2_Z fr5
#define D1_XY fr6
#define D1_Z fr7
#define D2_XY fr8
#define D2_Z fr9
#define W1_XY fr10
#define W1_Z fr11
#define W2_XY fr12
#define W2_Z fr13
.globl ps_guMtxConcat
//r3 = mtxA, r4 = mtxB, r5 = mtxAB
ps_guMtxConcat:
stwu r1,-64(r1)
psq_l A00_A01,0(r3),0,0
stfd fr14,8(r1)
psq_l B00_B01,0(r4),0,0
lis r6,Unit01@ha
psq_l B02_B03,8(r4),0,0
stfd fr15,16(r1)
addi 6,6,Unit01@l
stfd fr31,40(r1)
psq_l B10_B11,16(r4),0,0
ps_muls0 D00_D01,B00_B01,A00_A01
psq_l A10_A11,16(r3),0,0
ps_muls0 D02_D03,B02_B03,A00_A01
psq_l UNIT01,0(r6),0,0
ps_muls0 D10_D11,B00_B01,A10_A11
psq_l B12_B13,24(r4),0,0
ps_muls0 D12_D13,B02_B03,A10_A11
psq_l A02_A03,8(r3),0,0
ps_madds1 D00_D01,B10_B11,A00_A01,D00_D01
psq_l A12_A13,24(r3),0,0
ps_madds1 D10_D11,B10_B11,A10_A11,D10_D11
psq_l B20_B21,32(r4),0,0
ps_madds1 D02_D03,B12_B13,A00_A01,D02_D03
psq_l B22_B23,40(r4),0,0
ps_madds1 D12_D13,B12_B13,A10_A11,D12_D13
psq_l A20_A21,32(r3),0,0
psq_l A22_A23,40(r3),0,0
ps_madds0 D00_D01,B20_B21,A02_A03,D00_D01
ps_madds0 D02_D03,B22_B23,A02_A03,D02_D03
ps_madds0 D10_D11,B20_B21,A12_A13,D10_D11
ps_madds0 D12_D13,B22_B23,A12_A13,D12_D13
psq_st D00_D01,0(r5),0,0
ps_muls0 D20_D21,B00_B01,A20_A21
ps_madds1 D02_D03,UNIT01,A02_A03,D02_D03
ps_muls0 D22_D23,B02_B03,A20_A21
psq_st D10_D11,16(r5),0,0
ps_madds1 D12_D13,UNIT01,A12_A13,D12_D13
psq_st D02_D03,8(r5),0,0
ps_madds1 D20_D21,B10_B11,A20_A21,D20_D21
ps_madds1 D22_D23,B12_B13,A20_A21,D22_D23
ps_madds0 D20_D21,B20_B21,A22_A23,D20_D21
lfd fr14,8(r1)
psq_st D12_D13,24(r5),0,0
ps_madds0 D22_D23,B22_B23,A22_A23,D22_D23
psq_st D20_D21,32(r5),0,0
ps_madds1 D22_D23,UNIT01,A22_A23,D22_D23
lfd fr15,16(r1)
psq_st D22_D23,40(r5),0,0
lfd fr31,40(r1)
addi r1,r1,64
blr
.globl ps_guMtxIdentity
//r3 == mtx
ps_guMtxIdentity:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr0,0(r9)
lfs fr1,4(r9)
psq_st fr0,8(r3),0,0
ps_merge01 fr2,fr0,fr1
psq_st fr0,24(r3),0,0
ps_merge10 fr3,fr1,fr0
psq_st fr0,32(r3),0,0
psq_st fr2,16(r3),0,0
psq_st fr3,0(r3),0,0
psq_st fr3,40(r3),0,0
blr
.globl ps_guMtxCopy
//r3 = src, r4 = dst
ps_guMtxCopy:
psq_l fr0,0(r3),0,0
psq_st fr0,0(r4),0,0
psq_l fr1,8(r3),0,0
psq_st fr1,8(r4),0,0
psq_l fr2,16(r3),0,0
psq_st fr2,16(r4),0,0
psq_l fr3,24(r3),0,0
psq_st fr3,24(r4),0,0
psq_l fr4,32(r3),0,0
psq_st fr4,32(r4),0,0
psq_l fr5,40(r3),0,0
psq_st fr5,40(r4),0,0
blr
.globl ps_guMtxTranspose
//r3 = src, r4 = xpose
ps_guMtxTranspose:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr0,0(r9)
psq_l fr1,0(r3),0,0
stfs fr0,44(r4)
psq_l fr2,16(r3),0,0
ps_merge00 fr5,fr1,fr2
psq_l fr3,8(r3),1,0
ps_merge11 fr6,fr1,fr2
psq_l fr4,24(r3),1,0
psq_st fr5,0(r4),0,0
psq_l fr1,32(r3),0,0
ps_merge00 fr7,fr3,fr4
psq_st fr6,16(r4),0,0
ps_merge00 fr5,fr1,fr0
psq_st fr7,32(r4),0,0
ps_merge10 fr6,fr1,fr0
psq_st fr5,8(r4),0,0
lfs fr3,40(r3)
psq_st fr6,24(r4),0,0
stfs fr3,40(r4)
blr
.globl ps_guMtxInverse
//r3 = src, r4 = inv
ps_guMtxInverse:
psq_l fr0,0(r3),1,0
psq_l fr1,4(r3),0,0
psq_l fr2,16(r3),1,0
ps_merge10 fr6,fr1,fr0
psq_l fr3,20(r3),0,0
psq_l fr4,32(r3),1,0
ps_merge10 fr7,fr3,fr2
psq_l fr5,36(r3),0,0
ps_mul fr11,fr3,fr6
ps_mul fr13,fr5,fr7
ps_merge10 fr8,fr5,fr4
ps_msub fr11,fr1,fr7,fr11
ps_mul fr12,fr1,fr8
ps_msub fr13,fr3,fr8,fr13
ps_mul fr10,fr3,fr4
ps_msub fr12,fr5,fr6,fr12
ps_mul fr9,fr0,fr5
ps_mul fr8,fr1,fr2
ps_sub fr6,fr6,fr6
ps_msub fr10,fr2,fr5,fr10
ps_mul fr7,fr0,fr13
ps_msub fr9,fr1,fr4,fr9
ps_madd fr7,fr2,fr12,fr7
ps_msub fr8,fr0,fr3,fr8
ps_madd fr7,fr4,fr11,fr7
ps_cmpo0 cr0,fr7,fr6
bne 0f
li r3,0
blr
0: fres fr0,fr7
ps_add fr6,fr0,fr0
ps_mul fr5,fr0,fr0
ps_nmsub fr0,fr7,fr5,fr6
lfs fr1,12(r3)
ps_muls0 fr13,fr13,fr0
lfs fr2,28(r3)
ps_muls0 fr12,fr12,fr0
lfs fr3,44(r3)
ps_muls0 fr11,fr11,fr0
ps_merge00 fr5,fr13,fr12
ps_muls0 fr10,fr10,fr0
ps_merge11 fr4,fr13,fr12
ps_muls0 fr9,fr9,fr0
psq_st fr5,0(r4),0,0
ps_mul fr6,fr13,fr1
psq_st fr4,16(r4),0,0
ps_muls0 fr8,fr8,fr0
ps_madd fr6,fr12,fr2,fr6
psq_st fr10,32(r4),1,0
ps_nmadd fr6,fr11,fr3,fr6
psq_st fr9,36(r4),1,0
ps_mul fr7,fr10,fr1
ps_merge00 fr5,fr11,fr6
psq_st fr8,40(r4),1,0
ps_merge11 fr4,fr11,fr6
psq_st fr5,8(r4),0,0
ps_madd fr7,fr9,fr2,fr7
psq_st fr4,24(r4),0,0
ps_nmadd fr7,fr8,fr3,fr7
li r3,1
psq_st fr7,44(r4),1,0
blr
.globl ps_guMtxInvXpos
//r3 = src, r4 = invx
ps_guMtxInvXpos:
psq_l fr0, 0(r3), 1, 0
psq_l fr1, 4(r3), 0, 0
psq_l fr2, 16(r3), 1, 0
ps_merge10 fr6, fr1, fr0
psq_l fr3, 20(r3), 0, 0
psq_l fr4, 32(r3), 1, 0
ps_merge10 fr7, fr3, fr2
psq_l fr5, 36(r3), 0, 0
ps_mul fr11, fr3, fr6
ps_merge10 fr8, fr5, fr4
ps_mul fr13, fr5, fr7
ps_msub fr11, fr1, fr7, fr11
ps_mul fr12, fr1, fr8
ps_msub fr13, fr3, fr8, fr13
ps_msub fr12, fr5, fr6, fr12
ps_mul fr10, fr3, fr4
ps_mul fr9, fr0, fr5
ps_mul fr8, fr1, fr2
ps_msub fr10, fr2, fr5, fr10
ps_msub fr9, fr1, fr4, fr9
ps_msub fr8, fr0, fr3, fr8
ps_mul fr7, fr0, fr13
ps_sub fr1, fr1, fr1
ps_madd fr7, fr2, fr12, fr7
ps_madd fr7, fr4, fr11, fr7
ps_cmpo0 cr0, fr7, fr1
bne 0f
addi r3, 0, 0
blr
0: fres fr0, fr7
psq_st fr1, 12(r4), 1, 0
ps_add fr6, fr0, fr0
ps_mul fr5, fr0, fr0
psq_st fr1, 28(r4), 1, 0
ps_nmsub fr0, fr7, fr5, fr6
psq_st fr1, 44(r4), 1, 0
ps_muls0 fr13, fr13, fr0
ps_muls0 fr12, fr12, fr0
ps_muls0 fr11, fr11, fr0
psq_st fr13, 0(r4), 0, 0
psq_st fr12, 16(r4), 0, 0
ps_muls0 fr10, fr10, fr0
ps_muls0 fr9, fr9, fr0
psq_st fr11, 32(r4), 0, 0
psq_st fr10, 8(r4), 1, 0
ps_muls0 fr8, fr8, fr0
addi r3, 0, 1
psq_st fr9, 24(r4), 1, 0
psq_st fr8, 40(r4), 1, 0
blr
.globl ps_guMtxScale
//r3 = mtx,fr1 = xS,fr2 = yS,fr3 = zS
ps_guMtxScale:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr0,0(r9)
stfs fr1,0(r3)
psq_st fr0,4(r3),0,0
psq_st fr0,12(r3),0,0
stfs fr2,20(r3)
psq_st fr0,24(r3),0,0
psq_st fr0,32(r3),0,0
stfs fr3,40(r3)
stfs fr0,44(r3)
blr
.globl ps_guMtxScaleApply
//r3 = src,r4 = dst,fr1 = xS,fr2 = yS,fr3 = zS
ps_guMtxScaleApply:
psq_l fr4,0(r3),0,0
psq_l fr5,8(r3),0,0
ps_muls0 fr4,fr4,fr1
psq_l fr6,16(r3),0,0
ps_muls0 fr5,fr5,fr1
psq_l fr7,24(r3),0,0
ps_muls0 fr6,fr6,fr2
psq_l fr8,32(r3),0,0
psq_st fr4,0(r4),0,0
ps_muls0 fr7,fr7,fr2
psq_l fr2,40(r3),0,0
psq_st fr5,8(r4),0,0
ps_muls0 fr8,fr8,fr3
psq_st fr6,16(r4),0,0
ps_muls0 fr2,fr2,fr3
psq_st fr7,24(r4),0,0
psq_st fr8,32(r4),0,0
psq_st fr2,40(r4),0,0
blr
.globl ps_guMtxTrans
//r3 = mtx,fr1 = xT,fr2 = yT,fr3 = zT
ps_guMtxTrans:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr4,0(r9)
lfs fr5,4(r9)
stfs fr1,12(r3)
stfs fr2,28(r3)
psq_st fr4,4(r3),0,0
psq_st fr4,32(r3),0,0
stfs fr5,20(r3)
stfs fr4,24(r3)
stfs fr5,40(r3)
stfs fr3,44(r3)
stfs fr5,0(r3)
blr
.globl ps_guMtxTransApply
//r3 = src,r4 = dst,fr1 = xT,fr2 = yT,fr3 = zT
ps_guMtxTransApply:
psq_l fr4,0(r3),0,0
psq_l fr5,8(r3),0,0
psq_l fr7,24(r3),0,0
psq_l fr8,40(r3),0,0
ps_sum1 fr5,fr1,fr5,fr5
psq_l fr6,16(r3),0,0
ps_sum1 fr7,fr2,fr7,fr7
psq_l fr9,32(r3),0,0
ps_sum1 fr8,fr3,fr8,fr8
psq_st fr4,0(r4),0,0
psq_st fr5,8(r4),0,0
psq_st fr6,16(r4),0,0
psq_st fr7,24(r4),0,0
psq_st fr9,32(r4),0,0
psq_st fr8,40(r4),0,0
blr
.globl ps_guMtxRotTrig
//r3 = mt,r4 = axis,fr1 = sinA,fr2 = cosA
ps_guMtxRotTrig:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr3,0(r9)
lfs fr4,4(r9)
ori r4,r4,0x20
ps_neg fr5,fr1
cmplwi r4,'x'
beq 0f
cmplwi r4,'y'
beq 1f
cmplwi r4,'z'
beq 2f
b 3f
0:
psq_st fr4,0(r3),1,0
psq_st fr3,4(r3),0,0
ps_merge00 fr6,fr1,fr2
psq_st fr3,12(r3),0,0
ps_merge00 fr7,fr2,fr5
psq_st fr3,28(r3),0,0
psq_st fr3,44(r3),1,0
psq_st fr6,36(r3),0,0
psq_st fr7,20(r3),0,0
b 3f
1:
ps_merge00 fr6,fr2,fr3
ps_merge00 fr7,fr3,fr4
psq_st fr3,24(r3),0,0
psq_st fr6,0(r3),0,0
ps_merge00 fr8,fr5,fr3
ps_merge00 fr9,fr1,fr3
psq_st fr6,40(r3),0,0
psq_st fr7,16(r3),0,0
psq_st fr9,8(r3),0,0
psq_st fr8,32(r3),0,0
b 3f
2:
psq_st fr3,8(r3),0,0
ps_merge00 fr6,fr1,fr2
ps_merge00 fr8,fr2,fr5
psq_st fr3,24(r3),0,0
psq_st fr3,32(r3),0,0
ps_merge00 fr7,fr4,fr3
psq_st fr6,16(r3),0,0
psq_st fr8,0(r3),0,0
psq_st fr7,40(r3),0,0
3:
blr
.globl ps_guMtxReflect
//r3 = mtx,r4 = vec1,r5 = vec2
ps_guMtxReflect:
lis r9,Unit01@ha
addi r9,r9,Unit01@l
lfs fr0,4(r9)
psq_l fr1,8(r5),1,0
psq_l fr2,0(r5),0,0
psq_l fr3,0(r4),0,0
ps_nmadd fr5,fr1,fr0,fr1
psq_l fr4,8(r4),1,0
ps_nmadd fr6,fr2,fr0,fr2
ps_muls0 fr7,fr2,fr5
ps_mul fr8,fr6,fr3
ps_muls0 fr9,fr2,fr6
ps_sum0 fr8,fr8,fr8,fr8
ps_muls1 fr10,fr2,fr6
psq_st fr7,32(r3),0,0
ps_sum0 fr2,fr2,fr2,fr0
ps_nmadd fr8,fr5,fr4,fr8
ps_sum1 fr10,fr0,fr10,fr10
psq_st fr9,0(r3),0,0
ps_muls0 fr11,fr2,fr8
ps_merge00 fr12,fr5,fr8
psq_st fr10,16(r3),0,0
ps_merge00 fr13,fr7,fr11
ps_muls0 fr12,fr12,fr1
ps_merge11 fr11,fr7,fr11
psq_st fr13,8(r3),0,0
ps_sum0 fr12,fr12,fr12,fr0
psq_st fr11,24(r3),0,0
psq_st fr12,40(r3),0,0
blr
.globl ps_guVecAdd
//r3 = v1,r4 = v2,r5 = dst
ps_guVecAdd:
psq_l V1_XY,0(r3),0,0
psq_l V2_XY,0(r4),0,0
ps_add D1_XY,V1_XY,V2_XY
psq_st D1_XY,0(r5),0,0
psq_l V1_Z,8(r3),1,0
psq_l V2_Z,8(r4),1,0
ps_add D1_Z,V1_Z,V2_Z
psq_st D1_Z,8(r5),1,0
blr
.globl ps_guVecSub
//r3 = v1,r4 = v2,r5 = dst
ps_guVecSub:
psq_l V1_XY,0(r3),0,0
psq_l V2_XY,0(r4),0,0
ps_sub D1_XY,V1_XY,V2_XY
psq_st D1_XY,0(r5),0,0
psq_l V1_Z,8(r3),1,0
psq_l V2_Z,8(r4),1,0
ps_sub D1_Z,V1_Z,V2_Z
psq_st D1_Z,8(r5),1,0
blr
.globl ps_guVecScale
//r3 = src,r4 = dst,fr1 = S
ps_guVecScale:
psq_l fr2,0(r3),0,0
psq_l fr3,8(r3),1,0
ps_muls0 fr4,fr2,fr1
psq_st fr4,0(r4),0,0
ps_muls0 fr4,fr3,fr1
psq_st fr4,8(r4),1,0
blr
.globl ps_guVecNormalize
//r3 = v
ps_guVecNormalize:
lis r9,NrmData@ha
addi r9,r9,NrmData@l
lfs fr0,0(r9)
lfs fr1,4(r9)
psq_l fr2,0(r3),0,0
ps_mul fr4,fr2,fr2
psq_l fr3,8(r3),1,0
ps_madd fr5,fr3,fr3,fr4
ps_sum0 fr6,fr5,fr3,fr4
frsqrte fr7,fr6
fmuls fr8,fr7,fr7
fmuls fr9,fr7,fr0
fnmsubs fr8,fr8,fr6,fr1
fmuls fr7,fr8,fr9
ps_muls0 fr2,fr2,fr7
psq_st fr2,0(r3),0,0
ps_muls0 fr3,fr3,fr7
psq_st fr3,8(r3),1,0
blr
.globl ps_guVecCross
//r3 = v1,r4 = v2,r5 = v12
ps_guVecCross:
psq_l fr1,0(r4),0,0
lfs fr2,8(r3)
psq_l fr0,0(r3),0,0
ps_merge10 fr6,fr1,fr1
lfs fr3,8(r4)
ps_mul fr4,fr1,fr2
ps_muls0 fr7,fr1,fr0
ps_msub fr5,fr0,fr3,fr4
ps_msub fr8,fr0,fr6,fr7
ps_merge11 fr9,fr5,fr5
ps_merge01 fr10,fr5,fr8
psq_st fr9,0(r5),1,0
ps_neg fr10,fr10
psq_st fr10,4(r5),0,0
blr
.globl ps_guVecDotProduct
//r3 = vec1,r4 = vec2
ps_guVecDotProduct:
psq_l fr2,4(r3),0,0
psq_l fr3,4(r4),0,0
ps_mul fr2,fr2,fr3
psq_l fr5,0(r3),0,0
psq_l fr4,0(r4),0,0
ps_madd fr3,fr5,fr4,fr2
ps_sum0 fr1,fr3,fr2,fr2
blr
.globl ps_guVecMultiply
ps_guVecMultiply:
psq_l fr0,0(r4),0,0
psq_l fr2,0(r3),0,0
psq_l fr1,8(r4),1,0
ps_mul fr4,fr2,fr0
psq_l fr3,8(r3),0,0
ps_madd fr5,fr3,fr1,fr4
psq_l fr8,16(r3),0,0
ps_sum0 fr6,fr5,fr6,fr5
psq_l fr9,24(r3),0,0
ps_mul fr10,fr8,fr0
psq_st fr6,0(r5),1,0
ps_madd fr11,fr9,fr1,fr10
psq_l fr2,32(r3),0,0
ps_sum0 fr12,fr11,fr12,fr11
psq_l fr3,40(r3),0,0
ps_mul fr4,fr2,fr0
psq_st fr12,4(r5),1,0
ps_madd fr5,fr3,fr1,fr4
ps_sum0 fr6,fr5,fr6,fr5
psq_st fr6,8(r5),1,0
blr
.globl ps_guVecMultiplySR
// r3 = mt, r4 = src, r5 = dst
ps_guVecMultiplySR:
psq_l fr0,0(r3),0,0 // m[0][0], m[0][1] GQR0 = 0
// fp6 - x y
psq_l fr6,0(r4),0,0
psq_l fr2,16(r3),0,0 // m[1][0], m[1][1]
// fp8 = m00x m01y // next X
ps_mul fr8,fr0,fr6
psq_l fr4,32(r3),0,0 // m[2][0], m[2][1]
// fp10 = m10x m11y // next Y
ps_mul fr10,fr2,fr6
psq_l fr7,8(r4),1,0 // fp7 - z,1.0
// fp12 = m20x m21y // next Z
ps_mul fr12,fr4,fr6 // YYY last FP6 usage
psq_l fr3,24(r3),0,0 // m[1][2], m[1][3]
ps_sum0 fr8,fr8,fr8,fr8
psq_l fr5,40(r3),0,0 // m[2][2], m[2][3]
ps_sum0 fr10,fr10,fr10,fr10
psq_l fr1,8(r3),0,0 // m[0][2], m[0][3]
ps_sum0 fr12,fr12,fr12,fr12
ps_madd fr9,fr1,fr7,fr8
psq_st fr9,0(r5),1,0 // store X
ps_madd fr11,fr3,fr7,fr10
psq_st fr11,4(r5),1,0 // store Y
ps_madd fr13,fr5,fr7,fr12
psq_st fr13,8(r5),1,0 // sore Z
blr
.globl ps_guQuatAdd
//r3 = a, r4 = b, r5 = ab
ps_guQuatAdd:
psq_l fr0,0(r3),0,0
psq_l fr1,0(r4),0,0
ps_add fr1,fr0,fr1
psq_st fr1,0(r5),0,0
psq_l fr0,8(r3),0,0
psq_l fr1,8(r4),0,0
ps_add fr1,fr0,fr1
psq_st fr1,8(r5),0,0
blr
.globl ps_guQuatSub
//r3 = a, r4 = b, r5 = ab
ps_guQuatSub:
psq_l fr0,0(r3),0,0
psq_l fr1,0(r4),0,0
ps_sub fr1,fr0,fr1
psq_st fr1,0(r5),0,0
psq_l fr0,8(r3),0,0
psq_l fr1,8(r4),0,0
ps_sub fr1,fr0,fr1
psq_st fr1,8(r5),0,0
blr
.globl ps_guQuatMultiply
//r3 = a, r4 = b, r5 = ab
ps_guQuatMultiply:
psq_l fr0,0(r3),0,0
psq_l fr1,8(r3),0,0
psq_l fr2,0(r4),0,0
ps_neg fr4,fr0
psq_l fr3,8(r4),0,0
ps_neg fr5,fr1
ps_merge01 fr6,fr4,fr0
ps_muls0 fr8,fr1,fr2
ps_muls0 fr9,fr4,fr2
ps_merge01 fr7,fr5,fr1
ps_muls1 fr11,fr6,fr2
ps_madds0 fr8,fr6,fr3,fr8
ps_muls1 fr10,fr7,fr2
ps_madds0 fr9,fr7,fr3,fr9
ps_madds1 fr11,fr5,fr3,fr11
ps_merge10 fr8,fr8,fr8
ps_madds1 fr10,fr0,fr3,fr10
ps_merge10 fr9,fr9,fr9
ps_add fr8,fr8,fr8
psq_st fr8,0(r5),0,0
ps_sub fr9,fr9,fr9
psq_st fr9,8(r5),0,0
blr
.globl ps_quQuatScale
//r3 = q,r4 = r, fr1 = scale
ps_guQuatScale:
psq_l fr4,0(r3),0,0
psq_l fr5,8(r3),0,0
ps_muls0 fr4,fr4,fr1
psq_st fr4,0(r4),0,0
ps_muls0 fr5,fr5,fr1
psq_st fr5,8(r4),0,0
blr
.globl ps_guQuatDotProduct
//r3 = p, r4 = q ; fr1 = res
ps_guQuatDotProduct:
psq_l fr2,0(r3),0,0
psq_l fr4,0(r4),0,0
ps_mul fr1,fr2,fr4
psq_l fr3,8(r3),0,0
psq_l fr5,8(r4),0,0
ps_madd fr1,fr3,fr5,fr1
ps_sum0 fr1,fr1,fr1,fr1
blr
.globl ps_guQuatNormalize
//r3 = src, r4 = unit
ps_guQuatNormalize:
lis r9,NrmData@ha
addi r9,r9,NrmData@l
lfs fr9,0(r9)
lfs fr10,4(r9)
lis r9,QuatEpsilon@ha
lfs fr8,QuatEpsilon@l(r9)
psq_l fr0,0(r3),0,0
ps_mul fr2,fr0,fr0
psq_l fr1,8(r3),0,0
ps_sub fr5,fr8,fr8
ps_madd fr2,fr2,fr2,fr2
frsqrte fr3,fr2
ps_sub fr4,fr2,fr8
fmul fr6,fr3,fr3
fmul fr7,fr3,fr9
fnmsub fr6,fr6,fr2,fr10
fmul fr3,fr6,fr7
ps_sel fr3,fr4,fr3,fr5
ps_muls0 fr0,fr0,fr3
ps_muls0 fr1,fr1,fr3
psq_st fr0,0(r4),0,0
psq_st fr1,8(r4),0,0
blr
.section .data
.balign 4
QuatEpsilon:
.float 0.00001
Unit01:
.float 0.0, 1.0
NrmData:
.float 0.5, 3.0

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inject: inject.c
@gcc -O2 -Wall inject.c -o inject
@strip inject

154
genplus-gx/pcutil/inject.c Normal file
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/****************************************************************************
* Genesis Plus 1.04
*
* Developer ROM injector.
*
* You should set ROMOFFSET to match ngc.c, as this will change as the
* binary expands and/or contracts.
****************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define DOLHEADERLENGTH 256 // GC DOL Header Length
#define MAXTEXT 7 // Maximum 7 Text Sections
#define MAXDATA 11 // Maximum 11 Data Sections
struct DOLHEADER{
unsigned int textOffsets[MAXTEXT];
unsigned int dataOffsets[MAXDATA];
unsigned int textAddress[MAXTEXT];
unsigned int dataAddress[MAXDATA];
unsigned int textLength[MAXTEXT];
unsigned int dataLength[MAXDATA];
unsigned int bssAddress;
unsigned int bssLength;
unsigned int entryPoint;
unsigned int unused[MAXTEXT];
} dolheader;
unsigned int FLIP32(unsigned int b)
{
unsigned int c;
c = ( b & 0xff000000 ) >> 24;
c |= ( b & 0xff0000 ) >> 8;
c |= ( b & 0xff00 ) << 8;
c |= ( b & 0xff ) << 24;
return c;
}
#define ROMOFFSET 0x80600000
int main( int argc, char *argv[] )
{
FILE *infile, *outfile;
char *dol;
char *rom;
int dollen, romlen, outlen;
char *sig = "GENPLUSR";
if ( argc != 4 )
{
printf("Usage : %s genplus.dol genesisrom.smd output.dol\n", argv[0]);
return 1;
}
/*** Try to open all three handles ***/
infile = fopen(argv[1], "rb");
if ( infile == NULL )
{
printf("Unable to open %s for reading\n", argv[1]);
return 1;
}
/*** Allocate and load ***/
fseek(infile, 0, SEEK_END);
dollen=ftell(infile);
fseek(infile, 0, SEEK_SET);
dol = calloc(sizeof(char), dollen + 32);
if ( fread(dol, 1, dollen, infile ) != dollen )
{
free(dol);
printf("Error reading %s\n", argv[1]);
fclose(infile);
return 1;
}
fclose(infile);
infile = fopen(argv[2], "rb");
if ( infile == NULL )
{
printf("Unable to open %s for reading\n", argv[2]);
free(dol);
return 1;
}
/*** Allocate and load ***/
fseek( infile, 0, SEEK_END);
romlen = ftell(infile);
fseek( infile, 0, SEEK_SET);
rom = calloc( sizeof(char), romlen + 48 );
if ( fread(rom, 1, romlen, infile) != romlen )
{
printf("Error reading %s\n", argv[2]);
fclose(infile);
free(rom);
free(dol);
return 1;
}
fclose(infile);
/*** Ok, now have both in memory - so update the dol header and get this file done -;) ***/
memcpy(&dolheader, dol, DOLHEADERLENGTH);
/*** Align to 32 bytes - no real reason, I just like it -;) ***/
if ( dollen & 0x1f )
dollen = ( dollen & ~0x1f ) + 0x20;
dolheader.dataOffsets[1] = FLIP32(dollen);
dolheader.dataAddress[1] = FLIP32(ROMOFFSET);
dolheader.dataLength[1] = FLIP32(romlen + 32);
/*** Move the updated header back ***/
memcpy(dol, &dolheader, DOLHEADERLENGTH);
outfile = fopen(argv[3], "wb");
if ( outfile == NULL )
{
printf("Unable to open %s for writing!\n", argv[3]);
free(rom);
free(dol);
}
/*** Now simply update the files ***/
fwrite(dol, 1, dollen, outfile);
fwrite(sig, 1, 8, outfile);
outlen = FLIP32(romlen);
fwrite(&outlen, 1, 4, outfile);
char align[32];
memset(align, 0, 32);
fwrite(align, 1, 20, outfile);
fwrite(rom, 1, romlen, outfile);
fclose(outfile);
free(dol);
free(rom);
printf("Output file %s created successfully\n", argv[3]);
return 0;
}

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genplus-gx/source/cpu/cpuintrf.h Normal file
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#ifndef CPUINTRF_H
#define CPUINTRF_H
#include "osd_cpu.h"
#define CPU_16BIT_PORT 0x4000
#define CPU_FLAGS_MASK 0xff00
#define CLEAR_LINE 0
#define ASSERT_LINE 1
#define REG_PREVIOUSPC -1
#define REG_SP_CONTENTS -2
/* daisy-chain link */
typedef struct {
void (*reset)(int); /* reset callback */
int (*interrupt_entry)(int); /* entry callback */
void (*interrupt_reti)(int); /* reti callback */
int irq_param; /* callback paramater */
} Z80_DaisyChain;
#define Z80_MAXDAISY 4 /* maximum of daisy chan device */
#define Z80_INT_REQ 0x01 /* interrupt request mask */
#define Z80_INT_IEO 0x02 /* interrupt disable mask(IEO) */
#define Z80_VECTOR(device,state) (((device)<<8)|(state))
#endif /* CPUINTRF_H */

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#ifndef M68K__HEADER
#define M68K__HEADER
/* ======================================================================== */
/* ========================= LICENSING & COPYRIGHT ======================== */
/* ======================================================================== */
/*
* MUSASHI
* Version 3.3
*
* A portable Motorola M680x0 processor emulation engine.
* Copyright 1998-2001 Karl Stenerud. All rights reserved.
*
* This code may be freely used for non-commercial purposes as long as this
* copyright notice remains unaltered in the source code and any binary files
* containing this code in compiled form.
*
* All other lisencing terms must be negotiated with the author
* (Karl Stenerud).
*
* The latest version of this code can be obtained at:
* http://kstenerud.cjb.net
*/
/* ======================================================================== */
/* ============================ GENERAL DEFINES =========================== */
/* ======================================================================== */
/* There are 7 levels of interrupt to the 68K.
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
*/
#define M68K_IRQ_NONE 0
#define M68K_IRQ_1 1
#define M68K_IRQ_2 2
#define M68K_IRQ_3 3
#define M68K_IRQ_4 4
#define M68K_IRQ_5 5
#define M68K_IRQ_6 6
#define M68K_IRQ_7 7
/* Special interrupt acknowledge values.
* Use these as special returns from the interrupt acknowledge callback
* (specified later in this header).
*/
/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
* acknowledge cycle instead of DTACK.
*/
#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
/* Causes the spurious interrupt vector (0x18) to be taken
* This happens in a real 68K if BERR is asserted during the interrupt
* acknowledge cycle (i.e. no devices responded to the acknowledge).
*/
#define M68K_INT_ACK_SPURIOUS 0xfffffffe
/* CPU types for use in m68k_set_cpu_type() */
enum
{
M68K_CPU_TYPE_INVALID,
M68K_CPU_TYPE_68000,
M68K_CPU_TYPE_68010,
M68K_CPU_TYPE_68EC020,
M68K_CPU_TYPE_68020,
M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */
M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */
};
/* Registers used by m68k_get_reg() and m68k_set_reg() */
typedef enum
{
/* Real registers */
M68K_REG_D0, /* Data registers */
M68K_REG_D1,
M68K_REG_D2,
M68K_REG_D3,
M68K_REG_D4,
M68K_REG_D5,
M68K_REG_D6,
M68K_REG_D7,
M68K_REG_A0, /* Address registers */
M68K_REG_A1,
M68K_REG_A2,
M68K_REG_A3,
M68K_REG_A4,
M68K_REG_A5,
M68K_REG_A6,
M68K_REG_A7,
M68K_REG_PC, /* Program Counter */
M68K_REG_SR, /* Status Register */
M68K_REG_SP, /* The current Stack Pointer (located in A7) */
M68K_REG_USP, /* User Stack Pointer */
M68K_REG_ISP, /* Interrupt Stack Pointer */
M68K_REG_MSP, /* Master Stack Pointer */
M68K_REG_SFC, /* Source Function Code */
M68K_REG_DFC, /* Destination Function Code */
M68K_REG_VBR, /* Vector Base Register */
M68K_REG_CACR, /* Cache Control Register */
M68K_REG_CAAR, /* Cache Address Register */
/* Assumed registers */
/* These are cheat registers which emulate the 1-longword prefetch
* present in the 68000 and 68010.
*/
M68K_REG_PREF_ADDR, /* Last prefetch address */
M68K_REG_PREF_DATA, /* Last prefetch data */
/* Convenience registers */
M68K_REG_PPC, /* Previous value in the program counter */
M68K_REG_IR, /* Instruction register */
M68K_REG_CPU_TYPE /* Type of CPU being run */
} m68k_register_t;
/* ======================================================================== */
/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
/* ======================================================================== */
/* You will have to implement these functions */
/* read/write functions called by the CPU to access memory.
* while values used are 32 bits, only the appropriate number
* of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
* of value should be written to memory).
*
* NOTE: I have separated the immediate and PC-relative memory fetches
* from the other memory fetches because some systems require
* differentiation between PROGRAM and DATA fetches (usually
* for security setups such as encryption).
* This separation can either be achieved by setting
* M68K_SEPARATE_READS in m68kconf.h and defining
* the read functions, or by setting M68K_EMULATE_FC and
* making a function code callback function.
* Using the callback offers better emulation coverage
* because you can also monitor whether the CPU is in SYSTEM or
* USER mode, but it is also slower.
*/
/* Read from anywhere */
unsigned int m68k_read_memory_8(unsigned int address);
unsigned int m68k_read_memory_16(unsigned int address);
unsigned int m68k_read_memory_32(unsigned int address);
/* Read data immediately following the PC */
unsigned int m68k_read_immediate_16(unsigned int address);
unsigned int m68k_read_immediate_32(unsigned int address);
/* Read data relative to the PC */
unsigned int m68k_read_pcrelative_8(unsigned int address);
unsigned int m68k_read_pcrelative_16(unsigned int address);
unsigned int m68k_read_pcrelative_32(unsigned int address);
/* Memory access for the disassembler */
unsigned int m68k_read_disassembler_8 (unsigned int address);
unsigned int m68k_read_disassembler_16 (unsigned int address);
unsigned int m68k_read_disassembler_32 (unsigned int address);
/* Write to anywhere */
void m68k_write_memory_8(unsigned int address, unsigned int value);
void m68k_write_memory_16(unsigned int address, unsigned int value);
void m68k_write_memory_32(unsigned int address, unsigned int value);
/* ======================================================================== */
/* ============================== CALLBACKS =============================== */
/* ======================================================================== */
/* These functions allow you to set callbacks to the host when specific events
* occur. Note that you must enable the corresponding value in m68kconf.h
* in order for these to do anything useful.
* Note: I have defined default callbacks which are used if you have enabled
* the corresponding #define in m68kconf.h but either haven't assigned a
* callback or have assigned a callback of NULL.
*/
/* Set the callback for an interrupt acknowledge.
* You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
* The CPU will call the callback with the interrupt level being acknowledged.
* The host program must return either a vector from 0x02-0xff, or one of the
* special interrupt acknowledge values specified earlier in this header.
* If this is not implemented, the CPU will always assume an autovectored
* interrupt, and will automatically clear the interrupt request when it
* services the interrupt.
* Default behavior: return M68K_INT_ACK_AUTOVECTOR.
*/
void m68k_set_int_ack_callback(int (*callback)(int int_level));
/* Set the callback for a breakpoint acknowledge (68010+).
* You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h.
* The CPU will call the callback with whatever was in the data field of the
* BKPT instruction for 68020+, or 0 for 68010.
* Default behavior: do nothing.
*/
void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data));
/* Set the callback for the RESET instruction.
* You must enable M68K_EMULATE_RESET in m68kconf.h.
* The CPU calls this callback every time it encounters a RESET instruction.
* Default behavior: do nothing.
*/
void m68k_set_reset_instr_callback(void (*callback)(void));
/* Set the callback for informing of a large PC change.
* You must enable M68K_MONITOR_PC in m68kconf.h.
* The CPU calls this callback with the new PC value every time the PC changes
* by a large value (currently set for changes by longwords).
* Default behavior: do nothing.
*/
void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc));
/* Set the callback for CPU function code changes.
* You must enable M68K_EMULATE_FC in m68kconf.h.
* The CPU calls this callback with the function code before every memory
* access to set the CPU's function code according to what kind of memory
* access it is (supervisor/user, program/data and such).
* Default behavior: do nothing.
*/
void m68k_set_fc_callback(void (*callback)(unsigned int new_fc));
/* Set a callback for the instruction cycle of the CPU.
* You must enable M68K_INSTRUCTION_HOOK in m68kconf.h.
* The CPU calls this callback just before fetching the opcode in the
* instruction cycle.
* Default behavior: do nothing.
*/
void m68k_set_instr_hook_callback(void (*callback)(void));
/* ======================================================================== */
/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
/* ======================================================================== */
/* Use this function to set the CPU type you want to emulate.
* Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68010,
* M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020.
*/
void m68k_set_cpu_type(unsigned int cpu_type);
/* Pulse the RESET pin on the CPU.
* You *MUST* reset the CPU at least once to initialize the emulation
* Note: If you didn't call m68k_set_cpu_type() before resetting
* the CPU for the first time, the CPU will be set to
* M68K_CPU_TYPE_68000.
*/
void m68k_pulse_reset(void);
/* execute num_cycles worth of instructions. returns number of cycles used */
int m68k_execute(int num_cycles);
/* These functions let you read/write/modify the number of cycles left to run
* while m68k_execute() is running.
* These are useful if the 68k accesses a memory-mapped port on another device
* that requires immediate processing by another CPU.
*/
int m68k_cycles_run(void); /* Number of cycles run so far */
int m68k_cycles_remaining(void); /* Number of cycles left */
void m68k_modify_timeslice(int cycles); /* Modify cycles left */
void m68k_end_timeslice(void); /* End timeslice now */
/* Set the IPL0-IPL2 pins on the CPU (IRQ).
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
* Setting IRQ to 0 will clear an interrupt request.
*/
void m68k_set_irq(unsigned int int_level);
/* Halt the CPU as if you pulsed the HALT pin. */
void m68k_pulse_halt(void);
/* Context switching to allow multiple CPUs */
/* Get the size of the cpu context in bytes */
unsigned int m68k_context_size(void);
/* Get a cpu context */
unsigned int m68k_get_context(void* dst);
/* set the current cpu context */
void m68k_set_context(void* dst);
/* Save the current cpu context to disk.
* You must provide a function pointer of the form:
* void save_value(char* identifier, unsigned int value)
*/
void m68k_save_context( void (*save_value)(char* identifier, unsigned int value));
/* Load a cpu context from disk.
* You must provide a function pointer of the form:
* unsigned int load_value(char* identifier)
*/
void m68k_load_context(unsigned int (*load_value)(char* identifier));
/* Peek at the internals of a CPU context. This can either be a context
* retrieved using m68k_get_context() or the currently running context.
* If context is NULL, the currently running CPU context will be used.
*/
unsigned int m68k_get_reg(void* context, m68k_register_t reg);
/* Poke values into the internals of the currently running CPU context */
void m68k_set_reg(m68k_register_t reg, unsigned int value);
/* Check if an instruction is valid for the specified CPU type */
unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
/* Disassemble 1 instruction using the epecified CPU type at pc. Stores
* disassembly in str_buff and returns the size of the instruction in bytes.
*/
unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);
/* ======================================================================== */
/* ============================= CONFIGURATION ============================ */
/* ======================================================================== */
/* Import the configuration for this build */
#include "m68kconf.h"
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */
#endif /* M68K__HEADER */
/*** Not really required, but makes for clean compile under DevkitPPC ***/
extern int vdp_int_ack_callback(int int_level);

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/* ======================================================================== */
/* ========================= LICENSING & COPYRIGHT ======================== */
/* ======================================================================== */
/*
* MUSASHI
* Version 3.3
*
* A portable Motorola M680x0 processor emulation engine.
* Copyright 1998-2001 Karl Stenerud. All rights reserved.
*
* This code may be freely used for non-commercial purposes as long as this
* copyright notice remains unaltered in the source code and any binary files
* containing this code in compiled form.
*
* All other lisencing terms must be negotiated with the author
* (Karl Stenerud).
*
* The latest version of this code can be obtained at:
* http://kstenerud.cjb.net
*/
#ifndef M68KCONF__HEADER
#define M68KCONF__HEADER
/* Configuration switches.
* Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks.
* OPT_SPECIFY_HANDLER causes the core to link directly to the function
* or macro you specify, rather than using callback functions whose pointer
* must be passed in using m68k_set_xxx_callback().
*/
#define OPT_OFF 0
#define OPT_ON 1
#define OPT_SPECIFY_HANDLER 2
/* ======================================================================== */
/* ============================== MAME STUFF ============================== */
/* ======================================================================== */
/* If you're compiling this for MAME, only change M68K_COMPILE_FOR_MAME
* to OPT_ON and use m68kmame.h to configure the 68k core.
*/
#ifndef M68K_COMPILE_FOR_MAME
#define M68K_COMPILE_FOR_MAME OPT_OFF
#endif /* M68K_COMPILE_FOR_MAME */
#if M68K_COMPILE_FOR_MAME == OPT_ON
#include "m68kmame.h"
#else
/* ======================================================================== */
/* ============================= CONFIGURATION ============================ */
/* ======================================================================== */
/* Turn on if you want to use the following M68K variants */
#define M68K_EMULATE_010 OPT_ON
#define M68K_EMULATE_EC020 OPT_ON
#define M68K_EMULATE_020 OPT_ON
/* If on, the CPU will call m68k_read_immediate_xx() for immediate addressing
* and m68k_read_pcrelative_xx() for PC-relative addressing.
* If off, all read requests from the CPU will be redirected to m68k_read_xx()
*/
#define M68K_SEPARATE_READS OPT_OFF
/* If on, CPU will call the interrupt acknowledge callback when it services an
* interrupt.
* If off, all interrupts will be autovectored and all interrupt requests will
* auto-clear when the interrupt is serviced.
*/
#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER
#define M68K_INT_ACK_CALLBACK(A) vdp_int_ack_callback(A)
/* If on, CPU will call the breakpoint acknowledge callback when it encounters
* a breakpoint instruction and it is running a 68010+.
*/
#define M68K_EMULATE_BKPT_ACK OPT_OFF
#define M68K_BKPT_ACK_CALLBACK() your_bkpt_ack_handler_function()
/* If on, the CPU will monitor the trace flags and take trace exceptions
*/
#define M68K_EMULATE_TRACE OPT_OFF
/* If on, CPU will call the output reset callback when it encounters a reset
* instruction.
*/
#define M68K_EMULATE_RESET OPT_OFF
#define M68K_RESET_CALLBACK() your_reset_handler_function()
/* If on, CPU will call the set fc callback on every memory access to
* differentiate between user/supervisor, program/data access like a real
* 68000 would. This should be enabled and the callback should be set if you
* want to properly emulate the m68010 or higher. (moves uses function codes
* to read/write data from different address spaces)
*/
#define M68K_EMULATE_FC OPT_OFF
#define M68K_SET_FC_CALLBACK(A) your_set_fc_handler_function(A)
/* If on, CPU will call the pc changed callback when it changes the PC by a
* large value. This allows host programs to be nicer when it comes to
* fetching immediate data and instructions on a banked memory system.
*/
#define M68K_MONITOR_PC OPT_OFF
#define M68K_SET_PC_CALLBACK(A) your_pc_changed_handler_function(A)
/* If on, CPU will call the instruction hook callback before every
* instruction.
*/
#define M68K_INSTRUCTION_HOOK OPT_OFF
#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function()
/* If on, the CPU will emulate the 4-byte prefetch queue of a real 68000 */
#define M68K_EMULATE_PREFETCH OPT_OFF
/* If on, the CPU will generate address error exceptions if it tries to
* access a word or longword at an odd address.
* NOTE: Do not enable this! It is not working!
*/
#define M68K_EMULATE_ADDRESS_ERROR OPT_OFF
/* Turn on to enable logging of illegal instruction calls.
* M68K_LOG_FILEHANDLE must be #defined to a stdio file stream.
* Turn on M68K_LOG_1010_1111 to log all 1010 and 1111 calls.
*/
#define M68K_LOG_ENABLE OPT_OFF
#define M68K_LOG_1010_1111 OPT_OFF
#define M68K_LOG_FILEHANDLE some_file_handle
/* ----------------------------- COMPATIBILITY ---------------------------- */
/* The following options set optimizations that violate the current ANSI
* standard, but will be compliant under the forthcoming C9X standard.
*/
/* If on, the enulation core will use 64-bit integers to speed up some
* operations.
*/
#define M68K_USE_64_BIT OPT_OFF
/* Set to your compiler's static inline keyword to enable it, or
* set it to blank to disable it.
* If you define INLINE in the makefile, it will override this value.
* NOTE: not enabling inline functions will SEVERELY slow down emulation.
*/
#ifndef INLINE
#define INLINE static __inline__
#endif /* INLINE */
/* If your environment requires special prefixes for system callback functions
* such as the argument to qsort(), then set them here or in the makefile.
*/
#ifndef DECL_SPEC
#define DECL_SPEC
#endif
#endif /* M68K_COMPILE_FOR_MAME */
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */
#endif /* M68KCONF__HEADER */

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/*******************************************************************************
* *
* Define size independent data types and operations. *
* *
* The following types must be supported by all platforms: *
* *
* UINT8 - Unsigned 8-bit Integer INT8 - Signed 8-bit integer *
* UINT16 - Unsigned 16-bit Integer INT16 - Signed 16-bit integer *
* UINT32 - Unsigned 32-bit Integer INT32 - Signed 32-bit integer *
* UINT64 - Unsigned 64-bit Integer INT64 - Signed 64-bit integer *
* *
* *
* The macro names for the artithmatic operations are composed as follows: *
* *
* XXX_R_A_B, where XXX - 3 letter operation code (ADD, SUB, etc.) *
* R - The type of the result *
* A - The type of operand 1 *
* B - The type of operand 2 (if binary operation) *
* *
* Each type is one of: U8,8,U16,16,U32,32,U64,64 *
* *
*******************************************************************************/
#ifndef OSD_CPU_H
#define OSD_CPU_H
typedef unsigned char UINT8;
typedef unsigned short UINT16;
typedef unsigned int UINT32;
__extension__ typedef unsigned long long UINT64;
typedef signed char INT8;
typedef signed short INT16;
typedef signed int INT32;
__extension__ typedef signed long long INT64;
/* Combine two 32-bit integers into a 64-bit integer */
#define COMBINE_64_32_32(A,B) ((((UINT64)(A))<<32) | (UINT32)(B))
#define COMBINE_U64_U32_U32(A,B) COMBINE_64_32_32(A,B)
/* Return upper 32 bits of a 64-bit integer */
#define HI32_32_64(A) (((UINT64)(A)) >> 32)
#define HI32_U32_U64(A) HI32_32_64(A)
/* Return lower 32 bits of a 64-bit integer */
#define LO32_32_64(A) ((A) & 0xffffffff)
#define LO32_U32_U64(A) LO32_32_64(A)
#define DIV_64_64_32(A,B) ((A)/(B))
#define DIV_U64_U64_U32(A,B) ((A)/(UINT32)(B))
#define MOD_32_64_32(A,B) ((A)%(B))
#define MOD_U32_U64_U32(A,B) ((A)%(UINT32)(B))
#define MUL_64_32_32(A,B) ((A)*(INT64)(B))
#define MUL_U64_U32_U32(A,B) ((A)*(UINT64)(UINT32)(B))
/******************************************************************************
* Union of UINT8, UINT16 and UINT32 in native endianess of the target
* This is used to access bytes and words in a machine independent manner.
* The upper bytes h2 and h3 normally contain zero (16 bit CPU cores)
* thus PAIR.d can be used to pass arguments to the memory system
* which expects 'int' really.
******************************************************************************/
typedef union {
#ifdef LSB_FIRST
struct { UINT8 l,h,h2,h3; } b;
struct { UINT16 l,h; } w;
#else
struct { UINT8 h3,h2,h,l; } b;
struct { UINT16 h,l; } w;
#endif
UINT32 d;
} PAIR;
#endif /* defined OSD_CPU_H */

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#ifndef Z80_H
#define Z80_H
#include "cpuintrf.h"
#include "osd_cpu.h"
enum {
Z80_PC=1, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL,
Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2,
Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT,
Z80_NMI_STATE, Z80_IRQ_STATE, Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3
};
enum {
Z80_TABLE_op,
Z80_TABLE_cb,
Z80_TABLE_ed,
Z80_TABLE_xy,
Z80_TABLE_xycb,
Z80_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */
};
extern int z80_ICount; /* T-state count */
#define Z80_IGNORE_INT -1 /* Ignore interrupt */
#define Z80_NMI_INT -2 /* Execute NMI */
#define Z80_IRQ_INT -1000 /* Execute IRQ */
extern void z80_reset (void *param);
extern void z80_exit (void);
extern void z80_end_timeslice(void);
extern int z80_execute(int cycles);
extern void z80_burn(int cycles);
extern unsigned z80_get_context (void *dst);
extern void z80_set_context (void *src);
extern void *z80_get_cycle_table (int which);
extern void z80_set_cycle_table (int which, void *new_tbl);
extern unsigned z80_get_pc (void);
extern void z80_set_pc (unsigned val);
extern unsigned z80_get_sp (void);
extern void z80_set_sp (unsigned val);
extern unsigned z80_get_reg (int regnum);
extern void z80_set_reg (int regnum, unsigned val);
extern void z80_set_nmi_line(int state);
extern void z80_set_irq_line(int irqline, int state);
extern void z80_set_irq_callback(int (*irq_callback)(int));
extern void z80_state_save(void *file);
extern void z80_state_load(void *file);
extern const char *z80_info(void *context, int regnum);
extern unsigned z80_dasm(char *buffer, unsigned pc);
#ifdef MAME_DEBUG
extern unsigned DasmZ80(char *buffer, unsigned pc);
#endif
unsigned int cpu_readport16(unsigned int port);
void cpu_writeport16(unsigned int port, unsigned int data);
unsigned int cpu_readmem16(unsigned int address);
void cpu_writemem16(unsigned int address, unsigned int data);
#endif

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THE COMPLETE DOCUMENTATION ABOUT
GENESIS ROM FORMAT
Version 1.1
Release history
^^^^^^^^^^^^^^^
Version 1.0 (December, 1997)
- Initial Release
Version 1.1 (January, 1998)
- Splitted rom format explained!
- New company codes
- New errors in copyright interpreting found <sigh>
- Month interpreting (in copyright)
In this document you will find everything you need to know about
the information embedded within a Genesis ROM. You will also find
how to read all this information from the different ROM formats
(BIN, SMD and MD).
The information in this document was hacked by Volker Oth (dOnut)
and by me with help from technical documents found on internet.
The primary document from the internet that we used was gentech.txt.
If you want to change this document to add any important info about
the Genesis ROMs, do it freely but I would like to receive a copy of
the updated document. Then, I'll add your name in it and post it on my
homepage. Don't be a lamer and keep all names mentioned here!
Note that all numbers with a "H" in the left are in hexadecimal, and
the first byte of a file is the ZERO position. All information is
provided based on the BIN file-format because of the nature of this
format(see sections about each rom format).
*This document should be downloaded from my homepage. Any other site
may contain outdated material!*
If you use this information for anything, please give the proper
credits to the all these names listed below! I would thank you if you
include a link to our homepages and emails, too!
Felipe XnaK:
http://www.classicgaming.com/launchtool
felipe@ComPorts.com
Volker Oth (dOnut):
http://members.aol.com/~volkeroth
volkeroth@aol.com
THE BASIC INFORMATION:
^^^^^^^^^^^^^^^^^^^^^
H100: 'SEGA MEGA DRIVE' 1
H110: '(C)SEGA 1988.JUL' 2
H120: GAME NAME (DOMESTIC) 3
H150: GAME NAME (OVERSEAS) 4
H180: 'XX' 5
H182: 'XXXXXXX-XX' 6
H18E: XXXX 7
H190: 'XXXXXXXXXXXXXXXX' 8
H1A0: 00000000, XXXXXXXX 9
H1A8: RAM 10
H1BC: MODEM DATA 11
H1C8: MEMO 12
H1F0: Country in which the product 13
can be released.
1: This is just the console name. It can be 'SEGA MEGA DRIVE' or
'SEGA GENESIS' depending on the console's country of origin.
2: Copyright notice. There SHOULD be 4 characters for the company
code, a space and then the date in yyyy.mmm format; however, there are
variations.
For a listing of company codes, see "TABLE OF COMPANY CODES".
For a listing of month abbreviations, se "TABLE OF MONTH ABBREVIATIONS".
When the company uses a number as a company code, the copyright has
(in most cases!) this format: '(C)T-XX 1988.JUL', where XX is the
company code. If the company code has three digits, it should use the
space between the code and the date.
Some wrong copyrights i've found:
* The year is written as '199X' or '19XX', or doen't include the
millenium and the century.
* The company name is '00' or 'XX'
* Some companies that use a number for company code overwrite the
hiphen, not the space.
* Some companies doesn't include the '(C)' in the beginning and
others include just their name; some just include the the year
* Some copyrights have the year and month separated by ',','/', '-',
space or null character (H00). I'd found one that hasn't any separator
at all!
-- Good luck! --
3: This is the so-called "Domestic game name". Is the name the game has
in its country of origin. This field is 48 bytes long...
4: ... and this is the so-called "Overseas game name". This is the name
the game has worldwide. 48 bytes long too.
5: Type of product. This is 2 bytes long. Known values:
GM = Game
Al = Education
6: Product code and Version number:
* The first 7 characters are the product code
* The 2 characters after the hiphen is the version number. This will
vary depending on the the type of ROM or software version
7: Check sum, a two-bytes value (see "Calculating the Checksum")
8: I/0 support: (this is 16 bytes long)
J = Joypad 4 = Team Play
6 = 6-button Joypad 0 = Joystick for MS
K = Keyboard R = Serial RS232C
P = Printer T = Tablet
B = Control Ball V = Paddle Controller
F = Floppy Disk Drive C = CD-ROM
L = Activator M = Mega Mouse
9: ROM capacity. Here you will find the start and end address of the rom,
respectively. The start address in most cases is 0 and the end address is
the size of rom in BYTES. Note that these values don't include the headers
that some rom images have (discussed later). Each address is 4-bytes long.
10: There is a lot of information here that I can't help you with. What
I can say is that you can get the start and end positions of the backup
RAM at offset H1B4. Like in ROM addresses, you first acquire the start,
then the end address. Remember, these addresses are four bytes each.
11: If the rom has no support for MODEM, fill this with spaces. If it has
support for MODEM, then fill in this format: 'MOxxxxyy.z', where:
xxxx Firm name the same as in 2
yy MODEM NO.
z Version
12: I don't know what the heck it is! But by it's name and considering
all roms that I investigated, it seems that you can write whatever you want
in this field...
13: Countries where the game can be released. What is most interesting
here is that changing this info in some games has different behaviour.
Streets of Rage, for example, automatically changes it's name for Bare
Knuckle if you set the game for Japan. The "official" codes are:
E = Europe
J = Japan
U = USA
I've found some others as well(I do not guarantee this is correct!)
A = Asia
B = Brazil
4 = Brazil
F = France
8 = Hong Kong
This field can only contain three countries. This isn't really a
problem because all "unofficial" codes run as Europe! Don't forget to
set spaces to fill the bytes you don't use in this field.
TABLE OF COMPANY CODES:
^^^^^^^^^^^^^^^^^^^^^^
This table was compiled by myself by just getting the company code
in the ROM and writing the license that appears on the tittle screen.
In other words, it probably contains errors and is missing a lot of
companies.
When two comp1anies use the same code and are different companies
(at least to my knownledge) the names are separeted by an "or". If the
companies are the same (like Acclain and Flying Edge), they're separated
by a backslash (/).
CODE COMPANY
ACLD Ballistic
ASCI Asciiware
RSI Razorsoft
SEGA SEGA
TREC Treco
VRGN Virgin Games
WSTN Westone
10 Takara
11 Taito or Accolade
12 Capcom
13 Data East
14 Namco or Tengen
15 Sunsoft
16 Bandai
17 Dempa
18 Technosoft
19 Technosoft
20 Asmik
22 Micronet
23 Vic Tokai
24 American Sammy
29 Kyugo
32 Wolfteam
33 Kaneko
35 Toaplan
36 Tecmo
40 Toaplan
42 UFL Company Limited
43 Human
45 Game Arts
47 Sage's Creation
48 Tengen
49 Renovation or Telenet
50 Eletronic Arts
56 Razorsoft
58 Mentrix
60 Victor Musical Industries
69 Arena
70 Virgin
73 Soft Vision
74 Palsoft
76 Koei
79 U.S. Gold
81 Acclaim/Flying Edge
83 Gametek
86 Absolute
93 Sony
95 Konami
97 Tradewest
100 T*HQ Software
101 Tecmagik
112 Designer Software
113 Psygnosis
119 Accolade
120 Code Masters
125 Interplay
130 Activision
132 Shiny & Playmates
144 Atlus
151 Infogrames
161 Fox Interactive
239 Disney Interactive
- SPECIAL CASES:
In "Smurfs II" the copyright is just '(C) INFOGRAMES'
In "Baby's day out" rom, the copyright is: '(C) T-SNK 95-FEB',
but the company name is "HI-TECH entertainment" <sigh>
TABLE OF MONTH ABBREVIATIONS:
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
ABBREVIATIONS MONTH
JAN January
FEB February
MAR March
APR or APL April
MAY May
JUN June
JUL July
AUG or 08 August
SEP or SEPT September
OCT October
NOV November
DEC December
CALCULATING THE CHECKSUM:
^^^^^^^^^^^^^^^^^^^^^^^^
Genesis checksum is simple enough... All you need to do is:
1) Checksum starts as zero
2) Skip the first 512 bytes of the ROM
3) Read a byte from the rom and multiply its ascii value by 256, then sum
it to the checksum
4) Read the next byte from the rom and just sum it to the checksum
5) If you're not in the end of file, goto step 3
6) Get the first 16 bits from the resulting checksum and discard the higher
bits
7) That's your checksum!
Super Magic Drive Binary file-format (.BIN):
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This rom file-format is a simple rom dump. Nothing more to add!
Super Magic Drive Interleaved file-format (.SMD):
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This is a much more complex file-format. It have a 512 bytes header
and is interleaved in 16KB blocks. These blocks have their even bytes
at the beginning and the odd bytes at the end of them.
WHAT YOU FIND IN THE 512 BYTES HEADER:
0: Number of blocks 1
1: H03 *
2: SPLIT? 2
8: HAA *
9: HBB *
ALL OTHER BYTES: H00
1: This first byte should have the number of 16KB blocks the rom has.
The header isn't part of the formula, so this number is:
[size of rom-512]/16386
If the size is more than 255, the value should be H00.
2: This byte indicates if the ROM is a part of a splitted rom series. If
the rom is the last part of the series (or isn't a splitted rom at all),
this byte should be H00. In other cases should be H40. See "CREATING
SPLITTED ROMS" for details on this format.
*: Fixed values
THE DE-INTERLEAVING CODE (how to convert a SMD to a BIN):
1) Skip the 512 bytes header
2) Get 16KB from the ROM (16384 bytes)
3) Decode the block
4) Write the decoded block to the BIN file
DECODING A SMD BLOCK (stating byte is 0):
1) Get Middlepoint (8192)
2) Get a byte from the block
3) If the byte position is equal or smaller than middlepoint, put it
in the first unused EVEN position of the decoded buffer
4) If the byte position is greater than middlepoint, put it in the
first unused ODD position of the decoded buffer
To convert a BIN to a SMD, just create a header (as explained before) and
then do the reverse process!
Multi Game Doctor file-format (.MD):
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The MD file format also doesn't have a header. The interleaving it uses
is equal to the SMD, but without the division in blocks! (Even bytes in
the end of file, odd bytes in the beginning).
THE DECODING A MD (how to convert a MD to a BIN):
1) Get middlepoint ([size of rom]/2)
2) Get a byte from the ROM
3) If the byte position is equal or smaller than the middlepoint put the
byte in [byte position]*2 of the destination buffer
4) If the byte position is greater than the middlepoint, put the byte in
([byte position]*2) - [size of rom] -1
CREATING SPLITTED ROMS:
^^^^^^^^^^^^^^^^^^^^^^^
Splitted ROMs are a SMD divided into pieces. Knowing this, you may
guess that you first need to convert your ROM to a SMD! :)
To have a splitted ROM created all you need is divide your SMD in
several pieces, usually all with the same size (with the exception of
the last one). After doing that, you need to add a SMD header to all
these pieces. About these SMD headers:
1) The number of blocks embedded in them should be relative to the
piece, not to the joined ROM.
2) As stated before, with the exception of the last piece, all roms
should have their SPLIT byte set.
HOW YOU CAN HELP ME WITH THIS DOCUMENT:
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- Telling me the intricacies of a MGD ROM image. I never found one, but
I do believe it's equal to MD format.
- I'm trying to find out how the sprites are saved in Genesis ROMs. If
you have this info, I would like to have it!
- I never had a rom with modem support. If you have one, please test if
the information about it is correct in this documentation (I got it from
gentech). If you find it's correct, please explain me!!!
If you have any of this information, send it with your addresses (e-mail,
homepage, etc) so I can add this to the document!

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[04/20/03]
- Modified 68000 emulator to prevent 'tas.b $mem' from writing data back
after a read (fixes Gargoyles).
- Fixed bug in 68000 emulator to swap order of words written for address
register indirect pre-decremented writes (fixes Jim Power graphics).
- Added support for 240-line displays (for Super Skidmarks).
- Rewrote part of the interrupt handling (fixes some raster effects).
- Removed sprite collision detection code (never really worked).
- Optimized sprite rendering inner loop.
[04/13/03]
- Finished up memory map for VDP DMA V-bus reads.
- Fixed handling of 68000 writes to I/O chip at even addresses.
- Fixed bit 7 handling of control register in I/O chip.
- Finished up Z80 memory map.
- Added code to handle Genesis hardware lock-ups.
- Removed some faulty code from the 68000 memory map handlers.
[03/22/03]
- Completed implementation of Z80 banked memory handlers.

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This is the result of testing EEPROM support under Genesis Plus.
Following games use custom external RAM (serial EEPROM) for backup.
It seems that different EEPROM Mapper have been used, depending upon companies.
Eke~Eke - July 2007
-------------------------------------------------------
ACCLAIM (81)
-------------------------------------------------------
NBA Jam (UE)
NBA Jam (J)
------------
T-081326
T-81033
header OK ($200001-$200001)
TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0xFF (24C02)
PAGE_MASK: 0x03
SDA_IN : 0x200000 (0)
SDA_OUT: 0x200000 (1)
SCL : 0x200000 (1)
Note: this game uses a different EEPROM mapper than other Accolade games.
Blockbuster World Video Game Championship II (U)
NBA Jam Tournament Edition (JUE)
------------------------------------------------
T-81406
header KO
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0xFF (24C02)
PAGE_MASK: 0x03
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200000 (0)
Note: Rev 00 of the game has buggy eeprom support (incorrect data written), game backup only work with Rev01 version (released apparently in 2002, eight years later !)
NFL Quarterback Club (JUE)
-----------------------------
T-081276
header OK ($200000-$200001)
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0xFF (24C02)
PAGE_MASK: 0x03
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200000 (0)
NFL Quarterback Club 96 (UE)
-----------------------------
T-081586
header OK ($200000-$200001)
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0x7FF (24C16)
PAGE_MASK: 0x07
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200000 (0)
College Slam (U)
----------------
T-81576
header OK ($200001-$200001)
TYPE: 16BITS WORD ADDRESS
SIZE_MASK: 0x1FFF (24C64)
PAGE_MASK: 0x07
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200000 (0)
Frank Thomas Big Hurt Baseball (UE)
----------------
T-81476
header OK ($200000-$200001)
TYPE: 16BITS WORD ADDRESS
SIZE_MASK: 0x1FFF (24C64)
PAGE_MASK: 0x07
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200000 (0)
-------------------------------------------------------
CAPCOM (12)
-------------------------------------------------------
Megaman - The Wily Wars (E)
Rockman Mega World (J) [alt]
----------------
T-12046
T-12053 (checksum = 0xEA80)
header OK ($200001-$200001)
TYPE: 7BITS WORD ADDRESS
SIZE_MASK: 0x7F (24C01)
PAGE_MASK: 0x03
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200001 (1)
NOTE: the original version of Rockman Mega World (J) uses traditional SRAM, header gives $200000-$203FFF range
the alternate version uses a 128bytes serial EEPROM (X24C01)
the two versions share the same GAME NAME and PRODUCT ID
-------------------------------------------------------
Electronic Arts (50)
-------------------------------------------------------
NHLPA Hockey 93 (UE)
----------------
T-50396
header KO
TYPE: 7BITS WORD ADDRESS
SIZE_MASK: 0x7F (24C01)
PAGE_MASK: 0x03
SDA_IN : 0x200000 (7)
SDA_OUT: 0x200000 (7)
SCL : 0x200000 (6)
Rings of Power (UE)
----------------
T-50176
header KO
TYPE: 7BITS WORD ADDRESS
SIZE_MASK: 0x7F (24C01)
PAGE_MASK: 0x03
SDA_IN : 0x200000 (7)
SDA_OUT: 0x200000 (7)
SCL : 0x200000 (6)
-------------------------------------------------------
SEGA
-------------------------------------------------------
Greatest Heavyweights of the Ring (U)
Greatest Heavyweights of the Ring (J)
Greatest Heavyweights of the Ring (E)
-----------------------------
MK-1228
G-5538
PR-1993
header OK ($200001-$200001)
TYPE: 7BITS WORD ADDRESS
SIZE_MASK: 0x7F (24C01)
PAGE_MASK: 0x03
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200001 (1)
Wonder Boy in Monster World (UE)
Wonder Boy V - Monster World III (J)
----------------
G-4060
header OK ($200001-$200001)
TYPE: 7BITS WORD ADDRESS
SIZE_MASK: 0x7F (24C01)
PAGE_MASK: 0x03
SDA_IN : 0x200001 (0)
SDA_OUT: 0x200001 (0)
SCL : 0x200001 (1)
-------------------------------------------------------
CODEMASTERS
-------------------------------------------------------
Micro Machines 2 - Turbo Tournament (E) (J-Cart)
------------------------------------------------
T-120096-50
header KO
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0x3FF (24C08)
PAGE_MASK: 0x0F
SDA_IN : 0x300000 (0)
SDA_OUT: 0x380001 (7)
SCL : 0x300000 (1)
Note: this game needs the EEPROM to be initially fullfilled with the string
"PETETEST01234567" otherwise it won't initialize memory with correct data.
Micro Machines Military (E) (J-Cart)
------------------------------------
00000000-00 (checksum = 0x168B or 0xCEE0)
header KO
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0x3FF (24C08)
PAGE_MASK: 0x0F
SDA_IN : 0x300000 (0)
SDA_OUT: 0x380001 (7)
SCL : 0x300000 (1)
Micro Machines Turbo Tournament 96 (E) (J-Cart)
------------------------------------------------
00000000-00 (checksum = 0x165E or 0x2C41)
header KO
TYPE: TYPE: 8BITS WORD ADDRESS
SIZE_MASK: 0x7FF (24C16)
PAGE_MASK: 0xF
SDA_IN : 0x300000 (0)
SDA_OUT: 0x380001 (7)
SCL : 0x300000 (1)

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<HTML>
<HEAD>
<TITLE>GameGenie patches</TITLE>
</HEAD>
<BODY TEXT="#000000" BGCOLOR="#FEFEF4">
<BASEFONT FACE="MS Sans Serif" SIZE="-1">
<BR>
<CENTER><H1>GameGenie Patching</H1></CENTER>
<BR>
<P>&nbsp;&nbsp;GameGenie was a device created by codemasters and galoob that
let you make cheats for games. It was plugged in the console like a normal
cartridge, and in its top the desired cartridge was plugged. These cheats are
possible because what GameGenie do is edit the RAM that stores values used by
the ROMs, setting these values to a constant that can be, for example, the
number of lifes you have!</P>
<P>&nbsp;&nbsp;Genecyst was the first Genesis emulator to have support
for GameGenie then, with Kgen98, Steve Snake started to use this neat feature
in his great emulator. No ROM image of a GameGenie is necessary, as some may
imagine, to use them with console emulators, these programs themselves have a
built-in feature that acts like a GameGenie, writing the codes in the emulated
RAM.</P>
<P>&nbsp;&nbsp;The GameGenie code consists of a eight-bytes long string, and
the valid characters are A, B, C, D, E, F, G, H, J, K, L, M, N, P, R, S, T, V,
W, X, Y, Z, 0, 1, 2, 3, 4, 5, 6, 7, 8 and 9, all in uppercase. Each character
have a binary repressentation, which is 5-bits long.</P>
<TABLE WIDTH="70%" BORDER="0" ALIGN="CENTER">
<TR>
<TD>
<TABLE BORDER="1" ALIGN="CENTER">
<TR>
<TH>Char</TH>
<TH>Value</TH>
</TR>
<TR>
<TD ALIGN="CENTER">A</TD><TD>00000</TD>
</TR>
<TR>
<TD ALIGN="CENTER">B</TD><TD>00001</TD>
</TR>
<TR>
<TD ALIGN="CENTER">C</TD><TD>00010</TD>
</TR>
<TR>
<TD ALIGN="CENTER">D</TD><TD>00011</TD>
</TR>
<TR>
<TD ALIGN="CENTER">E</TD><TD>00100</TD>
</TR>
<TR>
<TD ALIGN="CENTER">F</TD><TD>00101</TD>
</TR>
<TR>
<TD ALIGN="CENTER">G</TD><TD>00110</TD>
</TR>
<TR>
<TD ALIGN="CENTER">H</TD><TD>00111</TD>
</TR>
<TR>
<TD ALIGN="CENTER">J</TD><TD>01000</TD>
</TR>
<TR>
<TD ALIGN="CENTER">K</TD><TD>01001</TD>
</TR>
<TR>
<TD ALIGN="CENTER">L</TD><TD>01010</TD>
</TR>
</TABLE>
</TD>
<TD VALIGN="TOP">
<TABLE BORDER="1" ALIGN="CENTER">
<TR>
<TH>Char</TH>
<TH>Value</TH>
</TR>
<TR>
<TD ALIGN="CENTER">M</TD><TD>01011</TD>
</TR>
<TR>
<TD ALIGN="CENTER">N</TD><TD>01100</TD>
</TR>
<TR>
<TD ALIGN="CENTER">P</TD><TD>01101</TD>
</TR>
<TR>
<TD ALIGN="CENTER">R</TD><TD>01110</TD>
</TR>
<TR>
<TD ALIGN="CENTER">S</TD><TD>01111</TD>
</TR>
<TR>
<TD ALIGN="CENTER">T</TD><TD>10000</TD>
</TR>
<TR>
<TD ALIGN="CENTER">V</TD><TD>10001</TD>
</TR>
<TR>
<TD ALIGN="CENTER">W</TD><TD>10010</TD>
</TR>
<TR>
<TD ALIGN="CENTER">X</TD><TD>10011</TD>
</TR>
<TR>
<TD ALIGN="CENTER">Y</TD><TD>10100</TD>
</TR>
<TR>
<TD ALIGN="CENTER">Z</TD><TD>10101</TD>
</TR>
</TABLE>
</TD>
<TD VALIGN="TOP">
<TABLE BORDER="1" ALIGN="CENTER">
<TR>
<TH>Char</TH>
<TH>Value</TH>
</TR>
<TR>
<TD ALIGN="CENTER">0</TD><TD>10110</TD>
</TR>
<TR>
<TD ALIGN="CENTER">1</TD><TD>10111</TD>
</TR>
<TR>
<TD ALIGN="CENTER">2</TD><TD>11000</TD>
</TR>
<TR>
<TD ALIGN="CENTER">3</TD><TD>11001</TD>
</TR>
<TR>
<TD ALIGN="CENTER">4</TD><TD>11010</TD>
</TR>
<TR>
<TD ALIGN="CENTER">5</TD><TD>11011</TD>
</TR>
<TR>
<TD ALIGN="CENTER">6</TD><TD>11100</TD>
</TR>
<TR>
<TD ALIGN="CENTER">7</TD><TD>11101</TD>
</TR>
<TR>
<TD ALIGN="CENTER">8</TD><TD>11110</TD>
</TR>
<TR>
<TD ALIGN="CENTER">9</TD><TD>11111</TD>
</TR>
</TABLE>
</TD>
</TR>
</TABLE>
<BR>
<P>&nbsp;&nbsp;The cheat code should be firstly converted directly using the
table above, and then the bits should be reordered. For example, the GameGenie
code SCRA-BJX0 is translated to:</P>
<FONT FACE="Courier">
<TABLE BORDER="0" ALIGN="CENTER">
<TR>
<TD>
<TABLE BORDER="0" ALIGN="CENTER">
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">Code:</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">Bits:</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">Id:</TD></TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="1" ALIGN="CENTER">
<TR ALIGN="CENTER">
<TD>S</TD><TD>C</TD><TD>R</TD><TD>A</TD>
</TR>
<TR ALIGN="CENTER">
<TD>01111</TD><TD>00010</TD><TD>01110</TD><TD>00000</TD>
</TR>
<TR ALIGN="CENTER">
<TD>ijklm</TD><TD>nopIJ</TD><TD>KLMNO</TD><TD>PABCD</TD>
</TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="0" ALIGN="CENTER">
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">-</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">-</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">-</TD></TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="1" ALIGN="CENTER">
<TR ALIGN="CENTER"><TD>B</TD><TD>J</TD><TD>X</TD><TD>0</TD></TR>
<TR ALIGN="CENTER"><TD>00001</TD><TD>01000</TD><TD>10011</TD><TD>10110</TD></TR>
<TR ALIGN="CENTER"><TD>EFGHd</TD><TD>efgha</TD><TD>bcQRS</TD><TD>TUVWX</TD></TR>
</TABLE>
</TD>
</TR>
</TABLE>
</FONT>
<P>&nbsp;&nbsp;Then rearrange (using the id) as...</P>
<FONT FACE="Courier">
<TABLE BORDER="0" ALIGN="CENTER">
<TR>
<TD>
<TABLE BORDER="0" ALIGN="CENTER">
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">Bits:</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">Id:</TD></TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="1" ALIGN="CENTER">
<TR>
<TD>00000000</TD><TD>10011100</TD><TD>01110110</TD>
</TR>
<TR ALIGN="CENTER">
<TD>ABCDEFGH</TD><TD>IJKLMNOP</TD><TD>QRSTUVWX</TD>
</TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="0" ALIGN="CENTER">
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">:</TD></TR>
<TR><TD ALIGN="RIGHT" VALIGN="MIDDLE">:</TD></TR>
</TABLE>
</TD>
<TD>
<TABLE BORDER="1">
<TR ALIGN="CENTER"><TD>01010100</TD> <TD>01111000</TD></TR>
<TR ALIGN="CENTER"><TD>abcdefgh</TD><TD>ijklmnop</TD></TR>
</TABLE>
</TD>
</TR>
</TABLE>
</FONT>
<BR>
<P>&nbsp;&nbsp;Which give us, in hexa, <B>009C76:5478</B>. This means that
<B>H5478</B> will be written at <B>H009C76</B> memory offset.</P>
</BODY>
</HTML>

715
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Sega Genesis hardware notes
Version 0.8 (03/02/01)
by Charles MacDonald
WWW: http://cgfm2.emuviews.com
Unpublished work Copyright 2000, 2001 Charles MacDonald
Here is a compilation of some notes I've written up on the Sega Genesis
hardware. Everything described herein has been checked on the real thing,
though that doesn't necessarily mean my testing methods were flawless. :)
Version history
---------------
[0.8]
- Added information on the SVP chip used in Virtua Racing. (section 4.2)
- Added information on EEPROM storage. (section 4.1)
- Changed miscellaneous section around.
[0.7]
- Added more information about access to the Z80 bus. (section 2.2)
- Updated the VDP register information, and removed some things
that were specific to VDP programming. (section 1.1)
- Added some background about the PSG. (section 4)
[0.6]
- Rewrote the 68000 memory map description. (section 1)
- Rewrote the Z80 memory map description. (section 2.1)
- Added memory access section. (section 1.2)
- Added a few miscellaneous topics. (section 4)
[0.5]
- Added more Z80 banking information.
- Added unused VDP address return values from the Z80 side.
- Added example of how to start up the Z80 on power-up.
- Added information on Phantasy Star 4 from Jeff Quinn.
- Added list of consoles that support Mark-III compatibility mode.
- Fixed a few typos.
[0.4]
- Added more details on 68000 and Z80 memory map.
- Added more information on VDP addresses.
- Added some thoughts on Phantasy Star 4.
[0.3]
- Added more information on I/O registers. (section 3)
- Fixed a few typos pointed out by Tim Meekins.
[0.2]
- Added section on I/O port programming and gamepads
[0.1]
- Initial release
Table of Contents
1.) 68000 memory map
1.1) VDP registers
1.2) Memory access quirks
1.3) Clock speeds
2.) Sound hardware overview
2.1) Z80 memory map
2.2) RESET and BUSREQ registers
2.3) Banking
2.4) Interrupts
3.) Input and Output
3.1) Programming I/O ports
3.2) Gamepad specifics
4.) Miscellaneous
4.1) EEPROM
4.2) Virtua Racing
4.3) Phantasy Star 4
4.4) Other topics
5.) Credits
6.) Disclaimer
1.) 68000 memory map
000000-3FFFFFh : ROM
400000-7FFFFFh : Unused (1)
800000-9FFFFFh : Unused (2)
A00000-A0FFFFh : Z80 address space (3)
A10000-A1001Fh : I/O
A10020-BFFFFFh : Internal registers and expansion (4)
C00000-DFFFFFh : VDP (5)
E00000-FFFFFFh : RAM (6)
1. Reads return the MSB of the next instruction to be fetched, with the
LSB set to zero. Writes do nothing.
2. Reading or writing any address will lock up the machine.
This area is used for the 32X adapter.
3. Addresses A08000-A0FFFFh mirror A00000-A07FFFh, so the 68000 cannot
access it's own banked memory. All addresses are valid except for
the VDP which is at A07F00-A07FFFh and A0FF00-A0FFFFh, writing or
reading those addresses will lock up the machine.
4. Reading some addresses lock up the machine, others return the MSB
of the next instruction to be fetched with the LSB is set to zero.
The latter applies when reading A11100h (except for bit 0 reflects
the state of the bus request) and A11200h.
Valid addresses in this area change depending on the peripherals
and cartridges being used; the 32X, Sega CD, and games like Super
Street Fighter II and Phantasy Star 4 use addresses within this range.
5. The VDP is mirrored at certain locations from C00000h to DFFFFFh. In
order to explain what addresses are valid, here is a layout of each
address bit:
MSB LSB
110n n000 nnnn nnnn 000m mmmm
'1' - This bit must be 1.
'0' - This bit must be 0.
'n' - This bit can have any value.
'm' - VDP addresses (00-1Fh)
For example, you could read the status port at D8FF04h or C0A508h,
but not D00084h or CF00008h. Accessing invalid addresses will
lock up the machine.
6. The RAM is 64K in size and is repeatedly mirrored throughout the entire
range it appears in. Most games only access it at FF0000-FFFFFFh.
1.1) VDP registers
The lower five bits of the address specify what memory mapped VDP register
to access:
00h : Data port
02h : Data port
04h : Control port (1)
06h : Control port
08h : HV counter (2)
0Ah : HV counter
0Ch : HV counter
0Eh : HV counter
11h : SN76489 PSG (3)
13h : SN76489 PSG
15h : SN76489 PSG
17h : SN76489 PSG
18h : Unused (4)
1Ah : Unused
1Ch : Unused
1Eh : Unused
1. For reads, the upper six bits of the status flags are set to the
value of the next instruction to be fetched. Bit 6 is always zero.
For example:
move.w $C00004, d0 ; Next word is $4E71
nop ; d0 = -1-- 11?? ?0?? ????
When reading the status flags through the Z80's banked memory area,
the upper six bits are set to one.
2. Writing to the HV counter will cause the machine to lock up.
3. Reading the PSG addresses will cause the machine to lock up.
Doing byte-wide writes to even PSG addresses has no effect.
If you want to write to the PSG via word-wide writes, the data
must be in the LSB. For instance:
move.b (a4)+, d0 ; PSG data in LSB
move.w d0, $C00010 ; Write to PSG
4. Reading the unused addresses returns the next instruction to be fetched.
For example:
move.w $C00018, d0 ; Next word is $4E71
nop ; d0 = $4E71
When reading these addresses through the Z80's banked memory area,
the value returned is always FFh.
Writing to C00018h and C0001Ah has no effect.
Writing to C0001Ch and C0001Eh seem to corrupt the internal state
of the VDP. Here's what each bit does: (assuming word-wide writes)
8E9Fh : These bits cause brief flicker in the current 8 pixels
being drawn when the write occurs.
5040h : These bits blank the display like bit 6 of register #1 when set.
2000h : This bit makes every line show the same random garbage data.
0100h : This bit makes random pattern data appear in the upper eight
and lower ten lines of the display, with the normal 224 lines
in the middle untouched. For those of you interested, the
display is built up like so:
224 lines for the active display
10 lines unused (can show pattern data here with above bit)
3 lines vertical blank (no border color shown)
3 lines vertical retrace (no picture shown at all)
13 lines vertical blank (no border color shown)
8 lines unused (can show pattern data here with above bit)
I know that comes up to 261 lines and not 262. But that's
all my monitor shows.
Turning the display off makes the screen roll vertically,
and random pattern data is displayed in all lines when
this bit is set.
0020h : This bit causes the name table and pattern data shown to
become corrupt. Not sure if the VRAM is bad or the VDP is
just showing the wrong data.
1.2) Memory access quirks
Byte-wide writes
Writing to the VDP control or data ports is interpreted as a 16-bit
write, with the LSB duplicated in the MSB. This is regardless of writing
to an even or odd address:
move.w #$A5, $C00003 ; Same as 'move.w #$A5A5, $C00002'
move.w #$87, $C00004 ; Same as 'move.w #$8787, $C00004'
Byte-wide reads
Reading from even VDP addresses returns the MSB of the 16-bit data,
and reading from odd address returns the LSB:
move.b $C00008, d0 ; D0 = V counter
move.b $C00001, d0 ; D0 = LSB of current VDP data word
move.b $C0001F, d0 ; D0 = $71
nop
move.b $C00004, d0 ; D0 = MSB of status flags
Word-wide writes
When doing word-wide writes to Z80 RAM, only the MSB is written, and
the LSB is ignored:
0000: AA BB CC DD ; Z80 memory
move.w #$1234, $A00000 ; do a word-wide write
0000: 12 BB CC DD ; result
Word-wide reads
A word-wide read from Z80 RAM has the LSB of the data duplicated in the MSB.
0000: AA BB CC DD ; Z80 memory
move.w $A00000, d0 ; do a word-wide read
d0 = $AAAA ; result
1.3) Clock speeds
These are for an NTSC Sega Genesis console.
680000 = 7.67 MHz
YM2612 = 7.67 MHz
Z80 = 3.58 MHz
SN76489 = 3.58 MHz
If anyone has information about timing for PAL consoles, please let me know.
2) Sound hardware overview
The following components used for sound generation:
- Zilog Z80 CPU
- 8k static RAM
- Yamaha YM2612 FM sound generator
- SN76489 PSG
2.1) Z80 memory map
0000-1FFFh : RAM
2000-3FFFh : RAM (mirror)
4000-5FFFh : YM2612 (1)
6000-60FFh : Bank address register (2)
6100-7EFFh : Unused (3)
7F00-7FFFh : VDP (4)
8000-FFFFh : Bank area
1. The YM2612 has two address lines, so it is available at 4000-4003h and
is mirrored repeatedly up to 5FFFh.
2. Writes go to the bank address register, reads return FFh.
The value returned applies to both the 68000 and Z80.
3. Writes are ignored, reads return FFh.
The value returned applies to both the 68000 and Z80.
4. Only addresses 7F00-7F1Fh are valid, writes to 7F20-7FFFh will
lock up the machine.
Z80 access to the VDP has the same results as doing byte-wide reads
and writes as described in section 1.2. So only the HV counter and
PSG can be used effectively.
All I/O ports return FFh, and writing to them has no effect. The Thunder
Force games read port BFh in the IRQ subroutine, this would appear to be
a misunderstanding on the programmer's behalf.
The 68000 can write to A06000h to set up the bank address.
2.2) RESET and BUSREQ registers
Bit 0 of A11100h (byte access) or bit 8 of A11100h (word access) controls
the Z80's /BUSREQ line.
Writing 1 to this bit will request the Z80 bus. You can then release
the bus later on by writing 0.
Reading this bit will return 0 if the bus can be accessed by the 68000,
or 1 if the Z80 is still busy.
If the Z80 is reset, or if it is running (meaning the 68000 does not
have the bus) it will also return 1. The only time it will switch from
1 to 0 is right after the bus is requested, and if the Z80 is still
busy accessing memory or not.
Bit 0 of A11200h (byte access) or bit 8 of A11200h (word access) controls
the Z80's /RESET line.
Writing 0 to this bit will start the reset process. The Z80 manual says you
have to assert the /RESET line for three Z80 clock cycles as a reset does
not happen instantly.
Writing 1 to this bit will stop the reset process. At this point, the Z80
will start executing from address 0000h onwards.
The /RESET line is shared with the YM2612. For as long as the Z80 is reset,
the YM2612 cannot be used.
The Z80 bus can only be accessed by the 68000 when the Z80 is running
and the 68000 has the bus. (as opposed to the Z80 being reset, and/or
having the bus itself)
Otherwise, reading $A00000-A0FFFF will return the MSB of the next
instruction to be fetched, and the LSB will be set to zero. Writes
are ignored. This even applies to the VDP area that would normally
lock up the machine.
Interestingly enough, you can still access $A10000-A1001F during this
time, which seems to be contradictory to some documentation which says
you can only access the I/O region when the 68000 has the bus.
On power-up, the Z80 will be reset and will have the bus.
If you want to load a Z80 program and run it, do the following:
- Stop the reset process
- Request bus
- Load Z80 program
- Start the reset process
- Release bus
- Stop the reset process
2.3) Banking
The Z80 can access the 68000's address space through a banking mechanism
which maps 32k pages to 8000-FFFFh on the Z80 side.
Most games do this to get at large data chunks like YM2612 DAC samples.
However, you can access anything else the 68000 can. (I've tried reading
the version register and setting the VDP border color this way with
success - in fact some 32X sample code shows the PWM sound generator
programmed by the Z80 through banking)
To specify which 32k section you want to access, write the upper nine
bits of the complete 24-bit address into bit 0 of the bank address
register, which is at 6000h (Z80) or A06000h (68000), starting with
bit 15 and ending with bit 23.
For example:
ld ix, $6000 ;
xor a ;
ld (ix), a ; Bit 15 = 0
ld (ix), a ; Bit 16 = 0
ld (ix), a ; Bit 17 = 0
ld (ix), a ; Bit 18 = 0
ld (ix), a ; Bit 19 = 0
ld (ix), a ; Bit 20 = 0
ld (ix), a ; Bit 21 = 0
inc a ;
ld (ix), a ; Bit 22 = 1
ld (ix), a ; Bit 23 = 1
After this routine executes, Z80 addresses 8000-FFFFh now correspond
to 68000 addresses C00000-C07FFFh.
In my own tests, I've been unable to do the following:
- Read banked 68000 RAM. (returns FFh)
- Find result of partial writes to the bank address register.
- Have the Z80 read A00000-A0FFFF through the banked memory area.
(locks up the machine)
Steve Snake informed me that reading 68000 RAM is possible, but is not
a recommended practice by Sega. Perhaps only some models of the Genesis
allow for it.
2.4) Interrupts
The Z80 runs in interrupt mode 1, where an interrupt causes a RST 38h.
However, interrupt mode 0 can be used as well, since FFh will be read
off the bus.
The Z80 will recieve an IRQ from the VDP on scanline E0h. This happens
once per frame, every frame, regardless of frame interrupts being
disabled by the 68000.
If the Z80 has interrupts disabled when the frame interrupt is supposed
to occur, it will be missed, rather than made pending.
There is no way to trigger an NMI unless the Genesis has been switched
into Mark 3 compatability mode, and this only means the NMI line is
mapped to the cartridge port, it's not controllable through software.
3.0) Input and Output
The Genesis has three general purpose I/O ports. Devices like gamepads,
modems, light guns, etc. can be used with them.
Here's a read-out of the I/O registers in their default state. Each
one can be read at an even address (e.g. A1000Dh == A1000Ch) as well.
A10001h = A0 Version register
A10003h = 7F Data register for port A
A10005h = 7F Data register for port B
A10007h = 7F Data register for port C
A10009h = 00 Ctrl register for port A
A1000Bh = 00 Ctrl register for port B
A1000Dh = 00 Ctrl register for port C
A1000Fh = FF TxData register for port A
A10011h = 00 RxData register for port A
A10013h = 00 S-Ctrl register for port A
A10015h = FF TxData register for port B
A10017h = 00 RxData register for port B
A10019h = 00 S-Ctrl register for port B
A1001Bh = FF TxData register for port C
A1001Dh = 00 RxData register for port C
A1001Fh = 00 S-Ctrl register for port C
Bit 7 of the Data registers can be read or written.
Any bit that is set as an input will return '1'.
Any bit that is set as an output will return the value last written.
Bits 7-0 of the Ctrl registers can be read or written.
Bits 7-0 of the TxData registers can be read or written.
The RxData register will always return zero.
Bits 7-4 of the S-Ctrl registers can be read or written.
3.1) Programming I/O ports
In the context of this description, I'll assume the device plugged in is a
gamepad. However, other periperhals like multi-taps, modems, mice, light
guns, etc, exist.
Here's a pin-out of the connector:
Pin 1 - UP
Pin 2 - DOWN
Pin 3 - LEFT
Pin 4 - RIGHT
Pin 5 - Vcc
Pin 6 - TL
Pin 7 - TH
Pin 8 - GND
Pin 9 - TR
Each I/O port has several associated registers. I'll only cover the
data and control registers, as the others are used for serial and
parallel communication.
The data register corresponds to the I/O port pins like so:
Bit 7 - (Not connected)
Bit 6 - TH
Bit 5 - TL
Bit 4 - TR
Bit 3 - RIGHT
Bit 2 - LEFT
Bit 1 - DOWN
Bit 0 - UP
A '0' means a button has been pressed, and '1' means a button has been
released.
Bit 7 isn't connected to any pin on the I/O port. It will latch a value
written to it, as shown:
move.b $A10003, d0 ; D0 = $7F
move.b #$80, $A10003 ; Bit 7 = 1
move.b $A10003, d0 ; D0 = $FF
move.b #$00, $A10003 ; Bit 7 = 0
move.b $A10003, d0 ; D0 = $7F
Bits 6-0 of the control register define what bits of the data register
are inputs or outputs. Gamepads use TH as an output and the remaining
pins as input, so a value of $40 would be written to the control register.
3.2) Gamepad specifics
A gamepad maps the directional pad to the pins mentioned earlier
(left, right, up, down), and multiplexes the four buttons (A, B, C, Start)
through the TL and TR pins.
The TH pin controls which pairs of buttons (either A, Start or C, B) are
output through TL and TR by the multiplexer chip.
In order to read all the buttons, A program will set TH = 1, read the data
port, set TH = 0, and read the port again. The data returned is as follows:
TH = 0 : ?0SA00DU
TH = 1 : ?1CBRLDU
? = Whatever was last written to bit 7.
S = Start
A = Button A
B = Button B
C = Button C
U = Up
D = Down
L = Left
R = Right
A 6-button gamepad allows the extra buttons to be read based on how
many times TH is switched from 1 to 0 (and not 0 to 1). Observe the
following sequence:
TH = 1 : ?1CBRLDU 3-button pad return value
TH = 0 : ?0SA00DU 3-button pad return value
TH = 1 : ?1CBRLDU 3-button pad return value
TH = 0 : ?0SA0000 D3-0 are forced to '0'
TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0
TH = 0 : ?0SA1111 D3-0 are forced to '1'
M = Mode
X = Button X
Y = Button Y
Z = Button Z
From this point on, the standard 3-button pad values will be returned
if any further TH transitions are done.
If TH isn't modified in about 8192 (probably less than that) 68000 CPU
cycles, a 'time-out' will occur and the sequence to read 6-button values
can be done again. Games usually poll the gamepad once per frame,
which is always enough for the time-out to occur.
I believe checking if D3-D0 are all set or clear (as shown in the list
above) would be another method to verify if 6-button or 3-button pad data
was being returned.
Some games may access the gamepad in a way that causes 6-button values
to be returned when 3-button values are expected. To get around this,
the MODE button can be held down when powering-up the console, and
the 6-button gamepad will respond like a 3-button one.
4.) Miscellaneous
The following are miscellaneous topics.
4.1) EEPROM
Some cartridges use a Xicor X24C01 EEPROM chip. The chip is programmed
in a serial fashion (it has only two wires), and has 128 8-bit bytes
of storage.
Games using EEPROM have the backup data string at offset $1B0 in the
cartridge header area formatted like so:
0001B0: 52 41 E8 40 00 20 00 01 00 20 00 01
The Sega manual describes how the above data should be interpreted.
In this case, it corresponds to a device mapped to odd memory addresses,
occupying the byte at $200001.
The only games I know of which use an EEPROM chip are:
- Wonderboy 3 / Monster World IV
- Rockman Megaworld
- Megaman: The Wily Wars
4.2) Virtua Racing
The Virtua Racing cartridge has 2MB ROM, 128K RAM, and a custom DSP chip
called the 'Sega Virtua Processor' (SVP), which is manufactured by Sega.
To the best of my knowledge, the SVP chip has internal ROM and possibly
internal RAM.
The main purpose of the SVP is to render polygons as 8x8 patterns, which
the game program transfers to VRAM from the 128K RAM area using DMA.
The VR cartridge has the following memory map:
000000-1FFFFFh : Program ROM (2MB)
200000-2FFFFFh : Unused
300000-31FFFFh : On-cart RAM (128K)
320000-3FFFFFh : (?)
390000-39FFFFh : (?)
3A0000-3AFFFFh : (?)
The SVP chip has registers mapped in the I/O space:
A15000.w - Can read and write commands
A15005.b - Reading bit 0 acts like a status flag (SVP busy?)
A15006.w - Unknown ($0000, $0001, $000A written)
A15008.w - Unknown ($0000, $0001, $0000 written)
Commands are two bytes in size, and are read and written to A15000h.
FFFFh - Command reset (?) (done before any access)
'SV' - Command init (?) (written before SVP communication)
'OK' - Command OK (?) (written after 'SV')
'Tx' - Where 'x' equals the following value based on the command
selected in the test menu:
0 - "DSP ROM RD" and
"DSP RAM OVER WRITE"
1 - "DSP DRAM R/W"
2 - "DSP IRAM R/W"
4 - "DSP POINTER"
To emulate the SVP chip, somebody needs to figure out how to dump the
internal ROM (the test menu shows that it has a DSP ROM reading option,
perhaps sending a certain command to the SVP makes it map it's internal
ROM within the $300000-$3FFFFF area) and figure out how the DSP works.
All of the above information came from physically examining a VR cartridge,
and from disassembling the test menu code. (found at $1B000 for those
of you who are interested)
4.3) Phantasy Star 4
Phantasy Star 4 is a 24 megabit game with 16k of battery backed RAM
mapped to $200001-$203FFF. (odd addresses used) It has ROM in the same
area where the RAM is. I've observed that the game will always write
$01 to $A130F1 before accessing the RAM, and then write $00 when
done. It could be that bit 0 of $A130F1 controls ROM/RAM banking at
that location.
Jeff Quinn has tested this and confirmed it to work, and also reported
an area of the game where supporting banked SRAM is important; when
your characters encounter a GEROTLUX below the town of Tyler on Dezolis,
the game will try to access the ROM data that is obscured by SRAM.
4.4) Other topics
- The 68000 RESET instruction has no effect.
- If the VDP is not accessed often enough, it will (appear) to lock up.
I'm not sure what the cause is, but any control port access is enough
to keep it going. Maybe some of the internal VDP memory is composed
of DRAM cells that lose their data after a while. This happens in
the Mark III compatability mode as well as mode 4 and mode 5.
- The status of the YM2612 can be read at any of it's four addresses.
Since only address zero is documented as valid, it could be that the
other addresses may return an incorrect result in some situations.
- The PSG is compatible with the Texas Instruments SN76489. It is actually
on the same physical chip as the VDP, and it's output comes directly
out of the VDP to be mixed with the YM2612. Sega did the same thing
with the System C2 (possibly System 18) and SMS VDPs as well.
Can anyone contribute some information about the Genesis security
and operating system ROM features? I know of a few:
- Games must write the text 'SEGA' to A14000h if the lower four
bits of the version register return 01h.
- Writing 01h to A14101h disables the OS ROM and swaps in the cart ROM.
- The OS ROM checks for 'SEGA' or ' SEGA' at offset 100h in the cart ROM.
Here's a list of consoles that support the Mark III compatability mode.
- Sega Mega Drive
- Sega Mega Drive 2
- Sega Genesis
- Sega Genesis 2
And ones that do not:
- Genesis 3 (Majesco)
If anyone has tested this with the Nomad, CDX, MegaJet, etc., please
let me know.
5.) Credits
I would like to thank the following people for contributing information:
Bart Trzynadlowski, Christian Schiller, Flavio Morsoletto, Jeff Quinn,
Mike Gordon, Naflign, Omar Cornut, Steve Snake, and Tim Meekins.
Contributors to the Sega Programming FAQ.
Gringoz for the Genesis schematics.
6.) Disclaimer
If you use any information from this document, please credit me
(Charles MacDonald) and optionally provide a link to my webpage
(http://cgfm2.emuviews.com/) so interested parties can access it.
The credit text should be present in the accompanying documentation of
whatever project which used the information, or even in the program
itself (e.g. an about box)
Regarding distribution, you cannot put this document on another
website, nor link directly to it.

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<html><head><title>Sega Genesis I/O Chip and Peripherals</title></head><body>
<h2>Sega Genesis I/O Chip and Peripherals</h2>
By Charles MacDonald<br>
<a href="http://cgfm2.emuviews.com/">http://cgfm2.emuviews.com</a>
<hr>
<h4>Contents</h4>
<ul>
<li><a href="#ovr">Overview</a>
</li><li><a href="#con">Connector details</a>
</li><li><a href="#cpu">CPU interface</a>
</li><li><a href="#reg">Register list</a>
</li><li><a href="#ver">Version register</a>
</li><li><a href="#dat">Data register</a>
</li><li><a href="#dir">Control register</a>
</li><li><a href="#scr">Serial control register</a>
</li><li><a href="#txd">TxData register</a>
</li><li><a href="#rxd">RxData register</a>
</li><li><a href="#ser">Using serial communication</a>
</li><li><a href="#per">Peripheral devices</a>
<ul>
<li><a href="#md2">2-button Mark-III gamepad</a>
</li><li><a href="#md3">3-button standard gamepad</a>
</li><li><a href="#md6">Fighting Pad 6B</a><i>(incomplete)</i>
</li><li><a href="#gun">Lightguns (Sega Menacer, Konami Justifier)</a><i>(incomplete)</i>
</li><li><a href="#eat">EA 4-Way Play</a>
</li><li><a href="#mul">Sega Team Player</a><i>(incomplete)</i>
</li><li><a href="#mmo">Sega Mega Mouse</a>
</li></ul>
</li><li><a href="#msc">Miscellaneous</a>
</li><li><a href="#dis">Disclaimer</a>
</li></ul>
<a name="ovr">
</a><h4><a name="ovr">Overview</a></h4>
<p>
<a name="ovr"> The I/O chip manages three 7-bit I/O ports. It also
provides an way for the CPU to read the state of several jumpers in the
system. Later versions of the Genesis hardware have the I/O chip
integrated into some of the other custom hardware, but they all
function identically.
</a></p>
<a name="con">
</a><h4><a name="con">Connector details</a></h4>
<p>
<a name="con"> Ports A and B are male DB-9 connectors, while port C is
female. In the Genesis 2 and 3, there is no physical connector for port
C, but it can still be programmed and will respond like any other port.
(as if no gamepad was connected) Here are the pin assignments:
</a></p>
<pre><a name="con"> Pin 1 : D0
Pin 2 : D1
Pin 3 : D2
Pin 4 : D3
Pin 5 : +5V
Pin 6 : TL
Pin 7 : TH
Pin 8 : Ground
Pin 9 : TR
</a></pre>
<a name="cpu">
</a><h4><a name="cpu">CPU interface</a></h4>
<p>
<a name="cpu"> The I/O chip is connected to the 68000 and Z80. When in
Mark-III compatibility mode, the I/O chip has a different set of
registers which mimic those of the SMS, which will not be discussed
here.
<br><br>
The I/O chip is mapped to $A10000-$A1001F in the 68000/VDP/Z80 banked address space.
It is normally read and written in byte units at odd addresses.
The chip gets /LWR only, so writing to even addresses has no effect.
Reading even addresses returns the same data you'd get from an odd address.
If a word-sized write is done, the LSB is sent to the I/O chip and the MSB is ignored.
Here are some examples to illustrate these points:
</a></p><pre><a name="cpu"> ; Does nothing, byte writes to even addresses are ignored
move.b #$40, $A10002
; Returns contents of version register, reading even addresses is the same as reading odd ones
move.b $A10000, d0
; Same as writing #$40 to $A10007, the MSB is ignored
move.w #$C040, $A10006
</a></pre>
<p></p>
<a name="reg">
</a><h4><a name="reg">Register list</a></h4>
<table bgcolor="#f0f0f0" border="0" cellpadding="4">
<tbody><tr bgcolor="#cccccc">
<td>Address</td>
<td>Description</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10001</td>
<td>Version</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10003</td>
<td>Port A data</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10005</td>
<td>Port B data</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10007</td>
<td>Port C data</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10009</td>
<td>Port A control</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1000B</td>
<td>Port B control</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1000D</td>
<td>Port C control</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1000F</td>
<td>Port A TxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10011</td>
<td>Port A RxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10013</td>
<td>Port A serial control</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10015</td>
<td>Port B TxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10017</td>
<td>Port B RxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A10019</td>
<td>Port B serial control</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1001B</td>
<td>Port C TxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1001D</td>
<td>Port C RxData</td>
</tr>
<tr bgcolor="#dddddd">
<td>$A1001F</td>
<td>Port C serial control</td>
</tr>
</tbody></table>
<a name="ver">
</a><h4><a name="ver">Version register</a></h4>
<p>
<a name="ver"> The version register returns several types of
information, such as a hard-coded version number, settings of the
domestic/export and PAL/NTSC jumpers, and the state of a sense pin
which the Sega CD uses. </a></p><pre><a name="ver"> D7 : Console is 1= Export (USA, Europe, etc.) 0= Domestic (Japan)
D6 : Video type is 1= PAL, 0= NTSC
D5 : Sega CD unit is 1= not present, 0= connected.
D4 : Unused (always returns zero)
D3 : Bit 3 of version number
D2 : Bit 2 of version number
D1 : Bit 1 of version number
D0 : Bit 0 of version number
</a></pre>
<a name="ver"> Bit 5 is used by the Sega CD, returning '0' when it is attached and '1' when it is not.
<br><br>
The version number is zero for the original model Genesis and MegaDrive.
All later versions of the hardware are version 1, and have additional security hardware.
<br><br>
Bits 7,6 are used in country protection checks. Some early games used
them to display English or Japanese text, so the same game program could
be used in both regions. Here's a list of settings:
</a><p></p>
<table bgcolor="#f0f0f0" border="0" cellpadding="4">
<tbody><tr bgcolor="#cccccc">
<td>Bit 7</td>
<td>Bit 6</td>
<td>TV type</td>
<td>Region</td>
<td>Comments</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>0</td>
<td>NTSC</td>
<td>Japan, Korea, Taiwan</td>
<td>262 lines, 60 FPS</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>1</td>
<td>PAL</td>
<td>Japan</td>
<td>No hardware actually uses this setting</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>0</td>
<td>NTSC</td>
<td>USA, Canada</td>
<td>262 lines, 60 FPS</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>0</td>
<td>PAL-M</td>
<td>Brazil</td>
<td>262 lines, 60 FPS</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>1</td>
<td>PAL</td>
<td>Europe, Hong Kong</td>
<td>313 lines, 50 FPS</td>
</tr>
</tbody></table>
<p>
<a name="ver"> Early games stored a region compatibility code in their
header at offset $0001F1. This value could be the ASCII text J, U, or E
for Japan, USA or Europe. During game initialization, bits 7,6 could be
sampled and compared to the region type stored in the header. If there
is a mismatch, many games will fill the screen with a single color lock
up intentionally, or sometimes display an error message. <br><br>
Later games have a slightly more complex code.
Here's the table Sega uses to determine valid codes to use:
</a></p>
<table bgcolor="#f0f0f0" border="0" cellpadding="4">
<tbody><tr bgcolor="#cccccc">
<td colspan="2">$A10001</td>
<td>&nbsp;</td>
<td rowspan="2">Main Sales Territories</td>
<td colspan="16">Hardware Enable Code (numbers from 0 to F below)</td>
</tr>
<tr bgcolor="#cccccc">
<td>Bit 7</td>
<td>Bit 6</td>
<td>Hardware Type</td>
<td>0</td>
<td>1</td>
<td>2</td>
<td>3</td>
<td>4</td>
<td>5</td>
<td>6</td>
<td>7</td>
<td>8</td>
<td>9</td>
<td>A</td>
<td>B</td>
<td>C</td>
<td>D</td>
<td>E</td>
<td>F</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>0</td>
<td>Japan, NTSC</td>
<td>Japan, S. Korea, Taiwan</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
<td>X</td>
<td>O</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>1</td>
<td>Japan, PAL</td>
<td>&nbsp;</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>0</td>
<td>Overseas, NTSC</td>
<td>N. America, Brazil</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>1</td>
<td>Overseas, PAL</td>
<td>Europe, Hong Kong</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>X</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
<td>O</td>
</tr>
</tbody></table>
<p>
<a name="ver"> Common uses of the new code type are ASCII values '4' for N.America, 'A' for UK, and 'B' for UK and Japan.
</a></p>
<a name="dat">
</a><h4><a name="dat">Data register</a></h4>
<p>
<a name="dat"> Writing to the data register sets the logic level of
pins configured as outputs (0= 0V, 1= +5V), and does nothing to pins
configured as inputs. Reading from the data register returns the state
of each pin. Here's a list of which bits in the data register
correspond to pins on the I/O port.
</a></p><pre><a name="dat"> D7 : Unused. This bit will return any value written to it
D6 : TH pin
D5 : TR pin
D4 : TL pin
D3 : D3 pin
D2 : D2 pin
D1 : D1 pin
D0 : D0 pin
</a></pre>
<a name="dat"> If a pin is configured as an input, reading it returns
the true logic state of whatever the pin is connected to (e.g. 0 for
ground, 1 for +5V). If nothing is connected to it, the pin returns '1',
maybe due to internal pull-up resistors.
<br><br>
If a pin is configured as an output, reading it returns the last value written to this register.
</a><p></p>
<a name="dir">
</a><h4><a name="dir">Control register</a></h4>
<p>
<a name="dir"> The control register determines which pins are inputs and outputs.
</a></p><pre><a name="dir"> D7 : /HL output control (see description)
D6 : TH pin is 1=output, 0=input
D5 : TR pin is 1=output, 0=input
D4 : TL pin is 1=output, 0=input
D3 : D3 pin is 1=output, 0=input
D2 : D2 pin is 1=output, 0=input
D1 : D1 pin is 1=output, 0=input
D0 : D0 pin is 1=output, 0=input
</a></pre>
<a name="dir"> If bit 7 of this register is set, and TH is configured as an input,
then whenever external hardware makes high to low transition on TH
the I/O chip will strobe it's /HL output pin low. This pin connects to
the VDP, which can be set up to latch the HV counter and/or cause a level 2
interrupt upon /HL going low.
</a><p></p>
<a name="scr">
</a><h4><a name="scr">Serial control register</a></h4>
<p>
<a name="scr"> The serial control register defines how a port is used for serial
communications and provides status flags to indicate the current state
of sending or receiving data.
</a></p><pre><a name="scr"> D7 : Serial baud rate bit 1
D6 : Serial baud rate bit 0
D5 : TR pin functions as 1= serial input pin, 0= normal
D4 : TL pin functions as 1= serial output pin, 0= normal
D3 : 1= Make I/O chip strobe /HL low when a byte has been received, 0= Do nothing
D2 : 1= Error receiving current byte, 0= No error
D1 : 1= Rxd buffer is ready to read, 0= Rxd buffer isn't ready
D0 : 1= Txd buffer is full, 0= Can write to Txd buffer
</a></pre>
<a name="scr"> The available baud rates are:
</a><p></p>
<table bgcolor="#f0f0f0" border="0" cellpadding="4">
<tbody><tr bgcolor="#cccccc">
<td>D7</td>
<td>D6</td>
<td>Baud rate</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>0</td>
<td>4800 bps</td>
</tr>
<tr bgcolor="#dddddd">
<td>0</td>
<td>1</td>
<td>2400 bps</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>0</td>
<td>1200 bps</td>
</tr>
<tr bgcolor="#dddddd">
<td>1</td>
<td>1</td>
<td>300 bps</td>
</tr>
</tbody></table>
<p>
<a name="scr"> When doing serial communication, TL and/or TR can be used for sending
and receiving data. During this time the data and control registers
have no effect for whichever pin(s) are in serial mode. The rest of the
pins in the same port function normally.
<br><br> The intended use of bit 3 is to also have the VDP set up to
enable level 2 interrupts when /HL goes low. This way, when the I/O
chip receives a byte through the TR pin, if this bit is set then it
will strobe /HL low and cause an interrupt. So receiving data serially
can either be accomplished through manual polling or be interrupt
driven.
<br><br>
Bits 2-0 are read-only status flags, the rest of the bits in this register can be read and written.
</a></p>
<a name="txd">
</a><h4><a name="txd">TxData register</a></h4>
<p>
<a name="txd"> Writing a byte to this register will make the I/O chip
output the data serially through the TL pin, providing it was
configured for serial mode. You should poll bit 0 of the serial control
register until the bit returns 0 to ensure the previously written byte
has been sent and the TxData buffer is empty.
</a></p>
<a name="rxd">
</a><h4><a name="rxd">RxData register</a></h4>
<p>
<a name="rxd"> Reading from this register returns the last byte
received serially through the TR pin. You should check bits 3,2 of the
serial control register to ensure that the RxData input buffer is full
and that there were no errors in receiving the byte (which would then
be invalid).
</a></p>
<a name="ser">
</a><h4><a name="ser">Using serial communication</a></h4>
<p>
<a name="ser"> When in serial mode, the I/O ports output TTL-level
signals. You need something like a MAX232 line driver to convert these
to RS-232 compatible signals for interfacing with (for example) a PC.
<br><br> If you just want to do experiments on the serial ports
themselves, you can use a null modem cable with the TL/TR wires
switched around to connect port A to B. I used this for testing the
serial capabilities while writing this document. Be sure to disconnect
the +5V line as well.
</a></p>
<a name="per">
</a><h2><a name="per">Peripheral devices</a><hr></h2>
<ul>
<li><a href="#md2">2-button Mark-III gamepad</a>
</li><li><a href="#md3">3-button standard gamepad</a>
</li><li><a href="#md6">Fighting Pad 6B</a>
</li><li><a href="#gun">Lightguns (Sega Menacer, Konami Justifier)</a>
</li><li><a href="#eat">EA 4-Way Play</a>
</li><li><a href="#mul">Sega Team Player</a>
</li><li><a href="#mmo">Sega Mega Mouse</a>
</li></ul>
<a name="md2">
</a><h4><a name="md2">2-button Mark-III gamepad</a></h4>
<p>
<a name="md2"> This controller has a 4-way direction pad, and two buttons (2 and 1).
Here's a description of how the controller interfaces with an I/O port:
</a></p><pre><a name="md2"> D6 : (TH) Not used
D5 : (TR) Button 2
D4 : (TL) Button 1
D3 : (D3) D-pad Right
D2 : (D2) D-pad Left
D1 : (D1) D-pad Down
D0 : (D0) D-pad Up
</a></pre>
<a name="md2"> All buttons are active-low logic, so they return '0' when pressed and '1' when released.
</a><p></p>
<a name="md3">
</a><h4><a name="md3">3-button standard gamepad</a></h4>
<p>
<a name="md3"> This controller has a 4-way direction pad, and four buttons (Start, A, B, C).
It uses a multiplexer that selects 1 of 2 inputs using TH, and routes buttons Start or C to TR, and B or A to TL.
<br><br>
Here's a description of how the controller interfaces with an I/O port:
</a></p><pre><a name="md3"> When TH=0 When TH=1
D6 : (TH) 0 1
D5 : (TR) Start button Button C
D4 : (TL) Button A Button B
D3 : (D3) 0 D-pad Right
D2 : (D2) 0 D-pad Left
D1 : (D1) D-pad Down D-pad Down
D0 : (D0) D-pad Up D-pad Up
</a></pre>
<a name="md3"> All buttons are active-low logic, so they return '0' when pressed and '1' when released.
<br><br> You need a small delay between changing TH and reading the
button state back, as the multiplexer takes some time in switching
inputs. I've found about four NOPs provides a reasonable delay.
<br><br>
Here's some example code to read a 3-button gamepad:
</a><p></p>
<table bgcolor="#e0e0e0" width="70%"><tbody><tr><td><pre>; Returns D0 with the button states: 'SACBRLDU'
_read_joypad:
move.l d1, -(a7)
move.b #$40, $A10003
nop
nop
move.b $A10003, d0
andi.b #$3F, d0
move.b #$00, $A10003
nop
nop
move.b $A10003, d1
lsl.b #2, d1
andi.b #$C0, d1
or.b d1, d0
eori.b #$FF, d0
move.l (a7)+, d1
rts
</pre></td></tr></tbody></table>
<a name="md6">
</a><h4><a name="md6">Fighting Pad 6B</a></h4>
<p>
<a name="md6"> Information coming soon.
</a></p>
<a name="gun">
</a><h4><a name="gun">Lightguns (Sega Menacer, Konami Justifier)</a></h4>
<p>
<a name="gun"> Information coming soon.
</a></p>
<a name="eat">
</a><h4><a name="eat">EA 4-Way Play</a></h4>
<p>
<a name="eat"> The EA 4-Way Play plugs into ports A and B, and allows up to four standard Genesis controllers to be connected at once.
<br><br> I've determined how the multitap works by examining the
joystick reading code from NHL '95 and trying the same routine on a
new-style Sega Team Player in 'EXTRA' mode. That said, the actual EA
4-Way Play could have some differences that Sega's compatibility mode
doesn't take care of.
<br><br> To detect the multitap, set CTRL1 to 0x40, CTRL2 to 0x7F and
DATA2 to $7C. Reading the lower 2 bits of DATA1 will return zero if the
multitap is present. Usually these bits return 0x03 if there is no tap,
no controller, or the Sega Team Player isn't in EXTRA mode, but this
could be a behavior specific to the Team Player.
<br><br>
To read the pads, write 0x0C, 0x1C, 0x2C, or 0x3C to DATA2 to select the controller in port A, B, C, or D.
You can then use DATA1/CTRL1 to read the pad state just like polling a regular 3-button pad in port A.
<br><br>
Here's some example code to use the EA 4-Way Play:
</a></p>
<table bgcolor="#e0e0e0" width="70%"><tbody><tr><td><pre>; Returns D0 == 0 if the multitap is present, or D0 != 0 if it isn't
_detect_4wayplay:
move.b #$40, $A10009
nop
move.b #$7F, $A1000B
nop
move.b #$7C, $A10005
nop
moveq #0, d0
move.b $A10003, d0
andi.b #$03, d0
rts
; Returns the state of all four 3-button gamepads in D0
_read_4wayplay:
move.l d1-d3/a0, -(a7)
lea $A10000, a0
move.l #$0C1C2C3C, d2
moveq #$03, d3
poll: move.b d2, $05(a0)
nop
nop
move.b #$40, $03(a0)
nop
nop
move.b $A10003, d0
andi.b #$3F, d0
move.b #$00, $03(a0)
nop
nop
move.b $03(a0), d1
lsl.b #2, d1
andi.b #$C0, d1
or.b d1, d0
lsl.l #8, d0
lsr.l #8, d2
dbra d3, poll
eori.l #-1, d0
move.l (a7)+, d2-d3/a0
rts
</pre></td></tr></tbody></table>
<a name="mul">
</a><h4><a name="mul">Sega Team Player</a></h4>
<p>
<a name="mul"> The Team Player is a multitap device that allows four peripherals to be connected to the Genesis at one time.
It has a mode select switch with several settings:
</a></p><pre><a name="mul"> EXTRA - All four ports are enabled. This is the setting used by
EA 4-Way Play compatible games.
A - Routes the peripheral in port A to port A of the Genesis.
B - Routes the peripheral in port B to port A of the Genesis.
C - Routes the peripheral in port C to port A of the Genesis.
D - Routes the peripheral in port D to port A of the Genesis.
MULTI - All four ports are enabled. This is the setting used by
Team Player compatible games.
</a></pre>
<a name="mul"> Sega made two versions of the Team Player. The first one
was not compatible with the EA 4-Way Play and only had one cable to
connect it to port A. The second one added the "EXTRA" setting for EA
4-Way Play compatibility and provides a second cable to connect it to
port B as well. Both seem to function identically with the exception of
EXTRA mode.
<br><br>
I don't have any programming information for this device.
</a><p></p>
<a name="mmo">
</a><h4><a name="mmo">Sega Mega Mouse</a></h4>
<p>
<a name="mmo"> This is a three button mouse (left, middle, right) with an extra button
(Start) located near the thumb position. It uses a PIC16C54 microcontroller
which manages the buttons and position tracking.
<br><br>
The Sega Mega Mouse that is distributed in North America is incompatible with the European version of Populous 2.
The mouse functions normally but has Y axis inverted so up is down and vice-versa.
It may have been designed for the Japanese Mega Drive mouse, which is a <b>different</b> product with 2 buttons and unique physical appearance.
<br><br>
The protocol works as follows:
TH and TR are outputs which tell the microcontroller to stop or start a data transfer, and to acknowledge received data.
TL is an input which returns a busy flag for the microcontroller.
D3-D0 are inputs that return the data.
Here's a table showing the communication process:
</a></p>
<table bgcolor="#f0f0f0" border="0" cellpadding="4">
<tbody><tr bgcolor="#cccccc">
<td>Write</td>
<td>TH</td>
<td>TR</td>
<td>TL</td>
<td>D3</td>
<td>D2</td>
<td>D1</td>
<td>D0</td>
<td>Description</td>
</tr>
<tr bgcolor="#dddddd">
<td>$60</td>
<td bgcolor="#bbbbbb">1</td>
<td bgcolor="#bbbbbb">1</td>
<td>1</td>
<td>0</td>
<td>0</td>
<td>0</td>
<td>0</td>
<td>Request data</td>
</tr>
<tr bgcolor="#dddddd">
<td>$20</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">1</td>
<td>1</td>
<td>0</td>
<td>0</td>
<td>0</td>
<td>0</td>
<td>ID #0 ($0)</td>
</tr>
<tr bgcolor="#dddddd">
<td>$00</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">0</td>
<td>1</td>
<td>1</td>
<td>0</td>
<td>1</td>
<td>1</td>
<td>ID #1 ($B)</td>
</tr>
<tr bgcolor="#dddddd">
<td>$20</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">1</td>
<td>0</td>
<td>1</td>
<td>1</td>
<td>1</td>
<td>1</td>
<td>ID #2 ($F)</td>
</tr>
<tr bgcolor="#dddddd">
<td>$00</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">0</td>
<td>1</td>
<td>1</td>
<td>1</td>
<td>1</td>
<td>1</td>
<td>ID #3 ($F)</td>
</tr>
<tr bgcolor="#dddddd">
<td>$20</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">1</td>
<td>0</td>
<td>Y Over</td>
<td>X Over</td>
<td>Y Sign</td>
<td>X Sign</td>
<td>Axis sign and overflow</td>
</tr>
<tr bgcolor="#dddddd">
<td>$00</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">0</td>
<td>1</td>
<td>Start</td>
<td>Middle</td>
<td>Right</td>
<td>Left</td>
<td>Button state</td>
</tr>
<tr bgcolor="#dddddd">
<td>$20</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">1</td>
<td>0</td>
<td>X7</td>
<td>X6</td>
<td>X5</td>
<td>X4</td>
<td>X axis MSN</td>
</tr>
<tr bgcolor="#dddddd">
<td>$00</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">0</td>
<td>1</td>
<td>X3</td>
<td>X2</td>
<td>X1</td>
<td>X0</td>
<td>X axis LSN</td>
</tr>
<tr bgcolor="#dddddd">
<td>$20</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">1</td>
<td>0</td>
<td>Y7</td>
<td>Y6</td>
<td>Y5</td>
<td>Y4</td>
<td>Y axis MSN</td>
</tr>
<tr bgcolor="#dddddd">
<td>$00</td>
<td bgcolor="#bbbbbb">0</td>
<td bgcolor="#bbbbbb">0</td>
<td>1</td>
<td>Y3</td>
<td>Y2</td>
<td>Y1</td>
<td>Y0</td>
<td>Y axis LSN</td>
</tr>
</tbody></table>
<p>
<a name="mmo"> Write #$60 when you are done polling to stop the data
transfer. If you continue to poll the mouse after collecting all the
data by writing $20 / $00, the Y axis LSN will always be returned. Sega
advises polling beyond this point will make the mouse behave
abnormally. It's possible that the PIC code in some versions of the
Mega Mouse may have problems if the poll sequence is too long.
<br><br>
The X/Y overflow flags are supposed to be set if the mouse is moved over a distance greater than can be measured.
I can't get them to become set, maybe the mouse supports a fairly wide range of movement.
<br><br> You need a considerable delay between writing new values to
TH/TR. I think the intention is to poll TL until the microcontroller
returns 'not busy', but I can't get this to work reliably. Sega's mouse
reading code also has a timeout when checking TL which would indicate
it may get stuck in a certain state.
<br><br>
All buttons (start, left, middle, right) are active-high logic, so they return '1' when pressed and '0' when released.
</a></p>
<a name="msc">
</a><h4><a name="msc">Miscellaneous</a></h4>
<p>
<a name="msc"> After power-up, the default state of the I/O chip are as follows:
</a></p><pre><a name="msc"> $A10001 = $80 (Bits 7,6,5 depend on the domestic/export, PAL/NTSC jumpers and having a Sega CD or not)
$A10003 = $7F
$A10005 = $7F
$A10007 = $7F
$A10009 = $00
$A1000B = $00
$A1000D = $00
$A1000F = $FF
$A10011 = $00
$A10013 = $00
$A10015 = $FF
$A10017 = $00
$A10019 = $00
$A1001B = $FB
$A1001D = $00
$A1001F = $00
</a></pre>
<p></p>
<a name="dis">
</a><h4><a name="dis">Disclaimer</a></h4>
<pre><a name="dis"> If you use any information from this document, please credit me
(Charles MacDonald) and optionally provide a link to my webpage
(http://cgfm2.emuviews.com/) so interested parties can access it.
The credit text should be present in the accompanying documentation of
whatever project which used the information, or even in the program
itself (e.g. an about box)
Regarding distribution, you cannot put this document on another
website, nor link directly to it.
</a></pre>
<hr>
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convey the exclusion of warranty; and each file should have at least
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<one line to give the program's name and a brief idea of what it does.>
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) 19yy name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.

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VDP timing for an NTSC Genesis in display mode 5.
Version 0.4 (11/29/00)
by Charles MacDonald
WWW: http://cgfm2.emuviews.com
Unpublished work Copyright 2000 Charles MacDonald
Description 32-cell 40-cell
----------------------------------------------------------------------------
Range 00-93, E9-FF 00-B6, E4-FF
Display area 00-7F 00-9F
V counter increment 84, 85 A4, A5
V-blanking in 86, 87 A7, A8
V-blanking out 86, 87 A7, A8
H-blanking in 93, E9 B2, E4
H-blanking out 06, 07 06, 07
Comma seperated values show the H counter value before an event occurs,
and then the H counter value immediately after.
These values shouldn't be considered 100% accurate, they are probably
off by one or two.
Each H counter unit is equivalent to two pixels.
The gaps at 93-E9 and B6-E4 are where the H counter 'jumps' ahead.
The H counter will never actually be set to the values 94-E8 or B7-E3.
Perhaps this is the horizontal retrace period.
Interestingly enough, the timing values for the 32-cell display mode
are identical to that of the SMS.
It would appear that in 40-cell mode, the horizontal blanking period
is shorter as the active display period takes more time.
The V-blanking flag can also be forcibly set by disabling the display
through bit 6 of register #1.

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Introduction
Genesis Plus has reasonable speed, and very fast rendering. Here are some
details about porting it to another platform
Porting rules
- This program is released under the GPL, so please release the source
code for your derivative ports. Let me know if you need an alternative
to this.
- Do not change the name of the emulator. Something like 'Genesis Plus / MacOS'
is fine as it keeps the original name.
- Configure the CPU emulators for little or big-endian CPUs, and use the
ALIGN_LONG option to handle unaligned memory accesses if needed. E.g. if
the emulator crashes when a game scrolls horizontally, you need to enable
it.
Requirements
- At this time the 16-bit rendering code has been well tested and should
be used. There is code to support 8 through 32-bit displays, but I
haven't checked if it still works.
- Audio output, if enabled, uses stereo 16-bit samples.
Functions to use:
int load_rom(char *filename);
Loads a game which can be in BIN, SMD or ZIP formats. It returns zero if
an error has occured.
void system_init(void);
Initializes the virtual Genesis console. Call this once during startup.
void audio_init(int rate);
Initialize the sound emulation part of the emulator. Pass zero or don't
call the function to disable sound. Call this after running system_init().
void system_reset(void);
Resets the virtual Genesis console. Call this once during setup, and later
as needed.
int system_frame(int skip);
Updates the emulation for a frame. Pass 1 to prevent rendering (which can
be used for frame skipping) and 0 to render the current display.
This function returns 0 if the virtual Genesis console has locked up.
You can do what you'd like with this information, such as notify the user,
reset the machine, etc.
If audio is enabled, the snd.buffer[] array will hold the current audio
data for this frame.
void system_shutdown(void);
Shuts down the emulator.
Variables:
The 'bitmap' structure needs to be filled out prior to calling system_init().
This provides the rendering code with information about the type of bitmap
it is rendering to. I would advise sticking with a 1024x512 16-bit bitmap:
memset(&bitmap, 0, sizeof(t_bitmap));
bitmap.width = 1024;
bitmap.height = 512;
bitmap.depth = 16;
bitmap.granularity = 2; /* Bytes per pixel */
bitmap.pitch = (bitmap.width * bitmap.granularity);
bitmap.data = (unsigned char *)bmp->pixels; /* Pointer to your bitmap */
bitmap.viewport.w = 256; /* Initial size of display on power-up (do not change) */
bitmap.viewport.h = 224;
bitmap.viewport.x = 0x20; /* Offset used for rendering (do not change) */
bitmap.viewport.y = 0x00;
bitmap.remap = 1;
The variable 'input.pad[0]' holds the button states for the first player
gamepad. Update this prior to calling system_frame(), and use the bitmasks
defined in system.h such as 'INPUT_UP', etc.
See the Windows/SDL and DOS drivers for examples.

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----------------------------------------------------------------------------
Genesis Plus
----------------------------------------------------------------------------
Version 1.2a
by Charles Mac Donald
WWW: http://cgfm2.emuviews.com
What's New
----------
[06/22/03]
- Modified rendering code for portability
- Modified memory handling to fix banked PSG access
[05/13/03]
- Initial release
Usage
-----
The Windows version runs windowed in a 16-bit desktop with NO sound or
joystick support.
The DOS version has most of the functionality from SMS Plus, such
as audio, joysticks, etc.
Windows/DOS controls:
Arrow Keys - Directional pad
A,S,D,F - 1P gamepad, buttons A, B, C, Start
Tab - Reset
Esc - Exit program
DOS only:
End - Exit program
F1-F4 - Set frameskip level (F1 = no skip ... F4 = skip 3 frames)
F8 - Make PCX screen snapshot
F9 - Toggle VSync
F10 - Toggle speed throttling
F11 - Toggle FPS meter
DOS details:
You can only support a second player if you are using a joystick driver
that supports more than one joystick. (e.g. Sidewinder, dual pads, etc.)
Type 'gen -help' on the command line for a list of useful options.
-res <x> <y> set the display resolution.
-vdriver <n> specify video driver.
-depth <n> specify color depth. (8, 16)
-scanlines use scanlines effect.
-scale scale display to full resolution. (slow)
-vsync wait for vertical sync before blitting.
-sound enable sound. (force speed throttling)
-sndrate <n> specify sound rate. (8000, 11025, 22050, 44100)
-sndcard <n> specify sound card. (0-7)
-swap swap left and right stereo output.
-joy <s> specify joystick type.
Here is a list of all the video drivers you can pass as a parameter
to the '-vdriver' option:
auto, safe, vga, modex, vesa2l, vesa3, vbeaf
Here is a list of all the joystick drivers you can pass as a parameter
to the '-joy' option:
auto, none, standard, 2pads, 4button, 6button, 8button, fspro, wingex,
sidewinder, gamepadpro, grip, grip4, sneslpt1, sneslpt2, sneslpt3,
psxlpt1, psxlpt2, psxlpt3, n64lpt1, n64lpt2, n64lpt3, db9lpt1, db9lpt2,
db9lpt3, tglpt1, tglpt2, tglpt3, wingwar, segaisa, segapci, segapci2
You can put any commandline option into a plain text file which should
be called "gen.cfg". Put one option per line, please. Command line options
will override anything in the configuration file.
Currently the zip loading code can manage a zipfile where the game
image is the first thing in it. If you try to open a huge archive of
games, only the first will be played.
Credits and Acknowlegements
---------------------------
I would like to thank Omar Cornut, Christian Schiller, and Chris MacDonald
for their invaluable help and support with this project.
Richard Bannister for the Macintosh port and all of the code fixes and
suggestions that have made Genesis Plus a better program.
(http://www.bannister.org)
The Genesis emulator authors: Bart Trzynadlowski, Quintesson, Steve Snake,
James Ponder, Stef, Gerrie, Sardu.
The regular people and many lurkers at segadev.
The MAME team for the CPU and sound chip emulators.
Everyone who has contributed, donated, and submitted information to help
out Genesis Plus and my efforts documenting the Genesis hardware.
Contact
-------
Charles MacDonald
E-mail: cgfm2@hotmail.com
WWW: http://cgfm2.emuviews.com
Legal
-----
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
The source code is distributed under the terms of the GNU General Public
License.
The Z80 CPU emulator, 68K CPU emulator, and the PSG, YM2612 emulation code
are taken from the MAME project, and terms of their use are covered under
the MAME license.
(http://www.mame.net)

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---------------------------------------
SSFII GENESIS TECHNICAL INFORMATION
Second Edition (July 26, 2000)
Bart Trzynadlowski
---------------------------------------
The purpose of this document is to discuss the workings of the Genesis port of
Capcom's "Super Street Fighter II The New Challengers". Virtually all of this
information was originally found by others' efforts.
Please credit "those who contributed information" rather than me if
you use any of this information. You may pass this document around freely, but
please keep it unaltered. If you see any errors or have more info, contact me.
I can be reached at trzy@powernet.net.
Second Edition: July 26, 2000
- Major update with correct information thanks to Tim Meekins
First Edition: July 21, 2000
- Initial release
0. THE SSFII CHALLENGE
The challenge behind getting "Super Street Fighter II The New Challengers"
(SSFII) to work on a Genesis emulator lies primarily in the fact that the game
is stored on a 40 megabit (5 megabyte) cartridge.
The Sega Genesis maps ROM from 0x000000 to 0x3FFFFF which means that
the CPU can only see 4 megabytes of cartridge ROM. SSFII needed more space for
the backgrounds and thus Capcom opted for a special 5 megabyte cartridge with
bankswitching in order to access the area of ROM outside of normal range.
1. THE BANKSWITCHING MECHANISM
The bankswitching mechanism probably resides on the cartridge. I'm 99% sure of
this. Sega documentation does offer a description of the mechanism, though,
which led me to suspect for a moment that perhaps the mechanism was on the
Genesis itself.
The idea is unlikely though, as that range of registers is used by the
32X for an entirely different purpose. I have been informed that that range
(which is marked as "SEGA RESERVED" in the Genesis developer's manual) can be
used for extra devices which may be present on the cartridge.
The bankswitching mechanism is very simple. It views the addressable 4 mega-
bytes of ROM as 8 512KB regions. The first area, 0x000000-0x07FFFF is fixed
and cannot be remapped because that is where the vector table resides.
The banking registers on the cartridge work by allocating the 512KB
chunk to a given part of the addressable 4MB ROM space. Below are the
registers and what range they correspond to. The value written to a register
will cause the specified 512KB page to be mapped to that region. A page is
specified with 6 bits (bits 7 and 6 are always 0) thus allowing a possible 64
pages (SSFII only has 10, though.)
0xA130F3: 0x080000 - 0x0FFFFF
0xA130F5: 0x100000 - 0x17FFFF
0xA130F7: 0x180000 - 0x1FFFFF
0xA130F9: 0x200000 - 0x27FFFF
0xA130FB: 0x280000 - 0x2FFFFF
0xA130FD: 0x300000 - 0x37FFFF
0xA130FF: 0x380000 - 0x3FFFFF
The registers are accessed through byte writes. I haven't seen SSFII try to
read any of the registers, so I don't know if it's possible or not. I don't
emulate anything besides byte writes in my emulator.
There is also a register 0xA130F1. Apparently the regions specified by
0xA130F9-0xA130FF (0x200000-0x3FFFFF) can be either ROM or RAM and can be
write-protected. Here is the layout of the register as far as I know:
7 6 5 4 3 2 1 0
+-----------------------+
|??|??|??|??|??|??|WP|MD|
+-----------------------+
MD: Mode -- 0 = ROM, 1 = RAM
WP: Write protect -- 0 = writable, 1 = not writable
Emulation of the 0xA130F1 register is not necessary, SSFII initializes it at
start-up by writing 0 I believe, which signifies ROM and no write protection
to the regions at 0x200000-0x3FFFFF (ROM isn't writable anyway, there isn't a
need for protection.)
Examples:
If 0x01 is written to register 0xA130FF, 0x080000-0x0FFFFF is visible
at 0x380000-0x3FFFFF.
If 0x08 is written to register 0xA130F9, the first 512KB of the
normally invisible upper 1MB of ROM is now visible at 0x200000-
0x27FFFF.
The registers simply represent address ranges in the 4MB ROM area and you can
page in data to these ranges by specifying the bank # -- it's that simple!
2. CHECKSUM
SSFII contains a checksum routine which calculates the checksum of the first
4MB of the ROM; it then pages in the last 1MB of ROM to 0x300000-0x3FFFFF.
It does this by writing to the bank registers. The following code is taken
directly from the US ROM dumped by Genesis Power:
... Checksum first 4MB of ROM (0x000000-0x3FFFFF) ...
0x003BEC: move.b #$08, ($A130FD)
0x003BF4: move.b #$09, ($A130FF)
0x003BFC: lea ($300000), a0
... Checksum uppper 1MB of ROM now mapped at 0x300000-0x3FFFFF ...
The bankswitching hardware must be properly emulated before the game starts
working. If it is not, the checksum will fail and the game will hang with a
red screen.
In the Genesis Power US dump, you can jump to 0x003C3C to avoid the
checksum routine, this is where program flow transfers to if the checksum was
found to be valid. The game doesn't do anything important before the checksum
code as far as emulation is concerned. It writes the SEGA message to the
Trademark Security System register and does some joypad init stuff.
3. EMULATING SSFII
SSFII is fairly straightforward to emulate. All you need to do is detect the
game, load up all 5MB, and emulate the banking registers. The easiest way to
do it, in my opinion, is to keep a second copy of the ROM and do memcpy()s
from that second copy to the ROM being emulated.
For example, here is how Genital does it... I've got genesis.rom which is the
buffer where ROMs are loaded and executed. There is also genesis.rom_ssf2
which is another 5MB buffer where I load the SSFII ROM to as well.
The bankswitching register emulation is done in my IOWriteByte()
function (which handles byte writes to the 0xA00000-0xBFFFFF range). The
following is the code I use:
if (addr >= 0xa130f3 && config.ssf2_emu)
{
switch (addr & 0xf)
{
case 0x3: /* 080000-0FFFFF */
memcpy((genesis.rom + 0x080000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0x5: /* 100000-17FFFF */
memcpy((genesis.rom + 0x100000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0x7: /* 180000-1FFFFF */
memcpy((genesis.rom + 0x180000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0x9: /* 200000-27FFFF */
memcpy((genesis.rom + 0x200000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0xb: /* 280000-2FFFFF */
memcpy((genesis.rom + 0x280000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0xd: /* 300000-37FFFF */
memcpy((genesis.rom + 0x300000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
case 0xf: /* 380000-3FFFFF */
memcpy((genesis.rom + 0x380000), (genesis.rom_ssf2 + (data * 0x80000)), 0x80000);
break;
default:
break;
}
return;
}
Pardon the bad formatting, it just wouldn't fit correctly in the 80 columns
that the rest of the document sticks to.
The first line checks whether the address is 0xA130F3 or above (notice
how 0xA130F1 is ignored, SSFII doesn't really use it) and if SSFII emulation
is enabled (in Genital, I have a flag -- config.ssf2_emu -- which is set to 1
to indicate SSFII emulation should occur.) The remainder of the code is a
switch () statement which handles the register emulation.
Since 0x80000 = 512KB, and the data variable holds the byte written to
the register, data * 0x80000 yields the offset into the ROM that has been
requested to be mapped.
At first glance, memcpy()s may seem inefficient and slow. Although it
is true, this doesn't apply to emulating SSFII since the game doesn't do much
(if any) bankswitching during gameplay. No slowdown due to the memcpy()s is
noticable.
If you are using an emulator like Starscream which requires the ROMs to be
byteswapped, make certain both ROM images are byteswapped. If you don't use
2 copies of the ROM, you will find the game will still have several glitches
because the memcpy()s will be destroying the data they write over.
4. CONCLUSION
That's all there is to it. This should be sufficient information for anyone
wishing to implement SSFII support in their Sega Genesis emulator. If you have
any questions at all (I'm not great at making things clear) feel free to email
me at trzy@powernet.net.

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Here are some technical details about things that need to be fixed or
added to Genesis Plus.
Missing features:
- Support for 6-button controllers
- SRAM management
- Game Genie / PAR patch codes
The VDP code could use a lot of cleaning up.
The rendering code is missing a few bits:
- Sprite collision
- Window bug
I think the "C" 68000 emulator either has some bugs or I'm not using it
correctly. Older DOS-only versions used Turbo68K, which had ran games
much better, especially with regards to interrupt handling.
Things that need to be fixed:
- Raster garbage on third road in Thunder Blade.
- Added country codes for Dragon Slayer, but game locks up after
passing country check.
- No inputs in Samurai Shodown.
(This game doesn't initialize the port direction registers, at least not
directly. Emulation bug or problem with the game?)
- Palette and raster problems in Mortal Kombat.
- Bad raster effects and VRAM corruption in Super Skidmarks.
(Needs PAL timing)
- Palette problems in Sonic 2 title screen.
- Masked half of Sonic sprite visible on Sonic title screen.
- Sprite masking doesn't work in Micro Machines subscreen.
- Music has slow tempo in Batman & Robin. (doesn't seem to be a problem
with the YM2612 timers - Wonderboy 3 is normal)
- Music has jerky playback in Sonic 2, 3, 3D Blast. If you run the Z80
emulation for one scanline after requesting an interrupt, it runs fine.
- DAC and PSG output are too loud, both are divided by two for now
(though the PSG should be a bit quieter and the DAC a bit louder)
- Undead Line locks after selecting a stage, also the Z80 sound halts
after the first note is played.
This game single steps the Z80 with the following code:
MOVEM.L D0,-(A7) ; 009C7C 48 E7 80 00
ORI #$0200,SR ; 009C80 00 7C 02 00
; Get control of the Z-bus
MOVE.W #$0100,$00A11100 ; 009C84 33 FC 01 00 00 A1 11 00
BTST #$00,$00A11100 ; 009C8C 08 39 00 00 00 A1 11 00
BNE.S *-$08 [00009C8C] ; 009C94 66 F6
; Check driver status byte. If zero, release bus and exit.
TST.B $00A00008 ; 009C96 4A 39 00 A0 00 08
BEQ *+$0016 [00009CB2] ; 009C9C 67 00 00 14
; Release bus and wait for Z80 to resume control. Then restart the loop
; and immediately get the bus back again, assuming the Z80 ran at least
; one instruction in the meantime.
CLR.W $00A11100 ; 009CA0 42 79 00 A1 11 00
BTST #$00,$00A11100 ; 009CA6 08 39 00 00 00 A1 11 00
BEQ.S *-$08 [00009CA6] ; 009CAE 67 F6
BRA.S *-$2C [00009C84] ; 009CB0 60 D2
; Release bus and exit.
CLR.W $00A11100 ; 009CB2 42 79 00 A1 11 00
ANDI #$FDFF,SR ; 009CB8 02 7C FD FF
MOVEM.L (A7)+,D0 ; 009CBC 4C DF 00 01
RTS ; 009CC0 4E 75

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#include "shared.h"
#include "rominfo.h"
#define GAME_COUNT 21
typedef struct
{
char game_id[14];
uint16 chk;
T_EEPROM_TYPE type;
} T_GAME_ENTRY;
T_GAME_ENTRY database[GAME_COUNT] =
{
/* ACCLAIM mappers */
/* 24C02 (old mapper) */
{{"T-081326" }, 0, {8, 0xFF, 0xFF, 0x200000, 0x200000, 0x200000, 0, 1, 1}}, /* NBA Jam (UE) */
{{"T-81033" }, 0, {8, 0xFF, 0xFF, 0x200000, 0x200000, 0x200000, 0, 1, 1}}, /* NBA Jam (J) */
/* 24C02 */
{{"T-81406" }, 0, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NBA Jam TE */
{{"T-081276" }, 0, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NFL Quarterback Club */
/* 24C16 */
{{"T-081586" }, 0, {8, 0x7FF, 0x7FF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NFL Quarterback Club '96 */
/* 24C65 */
{{"T-81576" }, 0, {16, 0x1FFF, 0x1FFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* College Slam */
{{"T-81476" }, 0, {16, 0x1FFF, 0x1FFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* Frank Thomas Big Hurt Baseball */
/* EA mapper (24C01 only) */
{{"T-50396" }, 0, {7, 0x7F, 0x7F, 0x200000, 0x200000, 0x200000, 7, 7, 6}}, /* NHLPA Hockey 93 (UE) */
{{"T-50176" }, 0, {7, 0x7F, 0x7F, 0x200000, 0x200000, 0x200000, 7, 7, 6}}, /* Rings of Power */
/* SEGA mapper (24C01 only) */
{{"T-12046" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Megaman - The Wily Wars */
{{"T-12053" }, 0xEA80, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Rockman Mega World (J) [A] */
{{"MK-1215" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Evander 'Real Deal' Holyfield's Boxing */
{{"MK-1228" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (U) */
{{"G-5538" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (J) */
{{"PR-1993" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (E) */
{{"G-4060" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Wonderboy in Monster World */
/* CODEMASTERS mapper */
/* 24C08 */
{{"T-120096" }, 0, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines 2 - Turbo Tournament (E) */
{{"00000000-00"}, 0x168B, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines Military */
{{"00000000-00"}, 0xCEE0, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines Military (Bad)*/
/* 24C16 */
{{"00000000-00"}, 0x165E, {8, 0x7FF, 0x7FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines Turbo Tournament 96 */
{{"00000000-00"}, 0x2C41, {8, 0x7FF, 0x7FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}} /* Micro Machines Turbo Tournament 96 (Bad)*/
};
T_EEPROM eeprom;
void EEPROM_Init()
{
uint8 i = 0;
/* initialize eeprom */
memset(&eeprom, 0, sizeof(T_EEPROM));
eeprom.sda = eeprom.old_sda = 1;
eeprom.scl = eeprom.old_scl = 1;
eeprom.state = STAND_BY;
sram.custom = 0;
/* look into game database */
while ((i<GAME_COUNT) && (!sram.custom))
{
if (strstr(rominfo.product,database[i].game_id) != NULL)
{
/* additional check (Micro Machines, Rockman Mega World) */
if ((database[i].chk == 0) || (database[i].chk == rominfo.checksum))
{
sram.custom = 1;
sram.on = 1;
sram.write = 1;
memcpy(&eeprom.type, &database[i].type, sizeof(T_EEPROM_TYPE));
/* Micromachines II need initialized values in RAM */
if (i == 16)
{
int j=0;
while (j<0x400)
{
/* memory array is filled with "PETETEST01234567" */
sram.sram[j++] = 0x50;
sram.sram[j++] = 0x45;
sram.sram[j++] = 0x54;
sram.sram[j++] = 0x45;
sram.sram[j++] = 0x54;
sram.sram[j++] = 0x45;
sram.sram[j++] = 0x53;
sram.sram[j++] = 0x54;
sram.sram[j++] = 0x30;
sram.sram[j++] = 0x31;
sram.sram[j++] = 0x32;
sram.sram[j++] = 0x33;
sram.sram[j++] = 0x34;
sram.sram[j++] = 0x35;
sram.sram[j++] = 0x36;
sram.sram[j++] = 0x37;
}
}
}
}
i++;
}
if (sram.custom)
{
/* set SRAM start & end address */
sram.start = sram.end = eeprom.type.sda_in_adr;
if (sram.end < eeprom.type.sda_out_adr) sram.end = eeprom.type.sda_out_adr;
if (sram.end < eeprom.type.scl_adr) sram.end = eeprom.type.scl_adr;
if (sram.start > eeprom.type.sda_out_adr) sram.start = eeprom.type.sda_out_adr;
if (sram.start > eeprom.type.scl_adr) sram.start = eeprom.type.scl_adr;
}
else if ((sram.end - sram.start) < 2)
{
/* Game not found in database but header indicates it uses EEPROM */
sram.custom = 1;
sram.on = 1;
sram.write = 1;
/* set SEGA mapper as default */
memcpy(&eeprom.type, &database[9].type, sizeof(T_EEPROM_TYPE));
}
}
static void Detect_START()
{
if (eeprom.old_scl && eeprom.scl)
{
if (eeprom.old_sda && !eeprom.sda)
{
eeprom.cycles = 0;
eeprom.slave_mask = 0;
if (eeprom.type.address_bits == 7)
{
eeprom.word_address = 0;
eeprom.state = GET_WORD_ADR_7BITS;
}
else eeprom.state = GET_SLAVE_ADR;
}
}
}
static void Detect_STOP()
{
if (eeprom.old_scl && eeprom.scl)
{
if (!eeprom.old_sda && eeprom.sda)
{
eeprom.state = STAND_BY;
}
}
}
void EEPROM_Write(unsigned int address, unsigned int value)
{
uint16 sram_address = 0;
/* decode SCL and SDA value */
if (eeprom.type.sda_in_adr == address) eeprom.sda = (value >> eeprom.type.sda_in_bit) & 1;
else eeprom.sda = eeprom.old_sda;
if (eeprom.type.scl_adr == address) eeprom.scl = (value >> eeprom.type.scl_bit) & 1;
else eeprom.scl = eeprom.old_scl;
/* EEPROM current state */
switch (eeprom.state)
{
/* Standby Mode */
case STAND_BY:
Detect_START();
Detect_STOP();
break;
/* Suspended Mode */
case WAIT_STOP:
Detect_STOP();
break;
/* Get Word Address 7 bits: MODE-1 only (24C01)
* and R/W bit
*/
case GET_WORD_ADR_7BITS:
Detect_START();
Detect_STOP();
/* look for SCL LOW to HIGH transition */
if (!eeprom.old_scl && eeprom.scl)
{
if (eeprom.cycles == 0) eeprom.cycles ++;
}
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl && (eeprom.cycles > 0))
{
if (eeprom.cycles < 8) eeprom.word_address |= (eeprom.old_sda << (7 - eeprom.cycles));
else if (eeprom.cycles == 8) eeprom.rw = eeprom.old_sda;
else
{ /* ACK CYCLE */
eeprom.cycles = 0;
eeprom.word_address &= eeprom.type.size_mask;
eeprom.state = eeprom.rw ? READ_DATA : WRITE_DATA;
}
eeprom.cycles ++;
}
break;
/* Get Slave Address (3bits) : MODE-2 & MODE-3 only (24C01 - 24C512) (0-3bits, depending on the array size)
* or/and Word Address MSB: MODE-2 only (24C04 - 24C16) (0-3bits, depending on the array size)
* and R/W bit
*/
case GET_SLAVE_ADR:
Detect_START();
Detect_STOP();
/* look for SCL LOW to HIGH transition */
if (!eeprom.old_scl && eeprom.scl)
{
if (eeprom.cycles == 0) eeprom.cycles ++;
}
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl && (eeprom.cycles > 0))
{
if ((eeprom.cycles > 4) && (eeprom.cycles <8))
{
if ((eeprom.type.address_bits == 16) ||
(eeprom.type.size_mask < (1 << (15 - eeprom.cycles))))
{
/* this is a SLAVE ADDRESS bit */
eeprom.slave_mask |= (eeprom.old_sda << (7 - eeprom.cycles));
}
else
{
/* this is a WORD ADDRESS high bit */
if (eeprom.old_sda) eeprom.word_address |= (1 << (15 - eeprom.cycles));
else eeprom.word_address &= ~(1 << (15 - eeprom.cycles));
}
}
else if (eeprom.cycles == 8) eeprom.rw = eeprom.old_sda;
else if (eeprom.cycles > 8)
{
/* ACK CYCLE */
eeprom.cycles = 0;
if (eeprom.type.address_bits == 16)
{
/* two ADDRESS bytes */
eeprom.state = eeprom.rw ? READ_DATA : GET_WORD_ADR_HIGH;
eeprom.slave_mask <<= 16;
}
else
{
/* one ADDRESS byte */
eeprom.state = eeprom.rw ? READ_DATA : GET_WORD_ADR_LOW;
eeprom.slave_mask <<= 8;
}
}
eeprom.cycles ++;
}
break;
/* Get Word Address MSB (4-8bits depending on the array size)
* MODE-3 only (24C32 - 24C512)
*/
case GET_WORD_ADR_HIGH:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl)
{
if (eeprom.cycles < 9)
{
if ((eeprom.type.size_mask + 1) < (1 << (17 - eeprom.cycles)))
{
/* ignored bit: slave mask should be right-shifted by one */
eeprom.slave_mask >>= 1;
}
else
{
/* this is a WORD ADDRESS high bit */
if (eeprom.old_sda) eeprom.word_address |= (1 << (16 - eeprom.cycles));
else eeprom.word_address &= ~(1 << (16 - eeprom.cycles));
}
eeprom.cycles ++;
}
else
{
/* ACK CYCLE */
eeprom.cycles = 1;
eeprom.state = GET_WORD_ADR_LOW;
}
}
break;
/* Get Word Address LSB: 7bits (24C01) or 8bits (24C02-24C512)
* MODE-2 and MODE-3 only (24C01 - 24C512)
*/
case GET_WORD_ADR_LOW:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl)
{
if (eeprom.cycles < 9)
{
if ((eeprom.type.size_mask + 1) < (1 << (9 - eeprom.cycles)))
{
/* ignored bit (X24C01): slave mask should be right-shifted by one */
eeprom.slave_mask >>= 1;
}
else
{
/* this is a WORD ADDRESS high bit */
if (eeprom.old_sda) eeprom.word_address |= (1 << (8 - eeprom.cycles));
else eeprom.word_address &= ~(1 << (8 - eeprom.cycles));
}
eeprom.cycles ++;
}
else
{
/* ACK CYCLE */
eeprom.cycles = 1;
eeprom.word_address &= eeprom.type.size_mask;
eeprom.state = WRITE_DATA;
}
}
break;
/*
* Read Cycle
*/
case READ_DATA:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl)
{
if (eeprom.cycles < 9) eeprom.cycles ++;
else
{
eeprom.cycles = 1;
/* ACK not received */
if (eeprom.old_sda) eeprom.state = WAIT_STOP;
}
}
break;
/*
* Write Cycle
*/
case WRITE_DATA:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (eeprom.old_scl && !eeprom.scl)
{
if (eeprom.cycles < 9)
{
/* Write DATA bits (max 64kBytes) */
sram_address = (eeprom.slave_mask | eeprom.word_address) & 0xFFFF;
if (eeprom.old_sda) sram.sram[sram_address] |= (1 << (8 - eeprom.cycles));
else sram.sram[sram_address] &= ~(1 << (8 - eeprom.cycles));
if (eeprom.cycles == 8)
{
/* WORD ADDRESS is incremented (roll up at maximum pagesize) */
eeprom.word_address = (eeprom.word_address & (0xFFFF - eeprom.type.pagewrite_mask)) |
((eeprom.word_address + 1) & eeprom.type.pagewrite_mask);
}
eeprom.cycles ++;
}
else eeprom.cycles = 1; /* ACK cycle */
}
break;
}
eeprom.old_scl = eeprom.scl;
eeprom.old_sda = eeprom.sda;
}
unsigned int EEPROM_Read(unsigned int address)
{
uint16 sram_address;
uint8 sda_out = eeprom.sda;
/* EEPROM state */
switch (eeprom.state)
{
case READ_DATA:
if (eeprom.cycles < 9)
{
/* Return DATA bits (max 64kBytes) */
sram_address = (eeprom.slave_mask | eeprom.word_address) & 0xFFFF;
sda_out = (sram.sram[sram_address] >> (8 - eeprom.cycles)) & 1;
if (eeprom.cycles == 8)
{
/* WORD ADDRESS is incremented (roll up at maximum array size) */
eeprom.word_address ++;
eeprom.word_address &= eeprom.type.size_mask;
}
}
break;
case GET_WORD_ADR_7BITS:
case GET_SLAVE_ADR:
case GET_WORD_ADR_HIGH:
case GET_WORD_ADR_LOW:
case WRITE_DATA:
if (eeprom.cycles == 9) sda_out = 0;
break;
default:
break;
}
if (address == eeprom.type.sda_out_adr) return (sda_out << eeprom.type.sda_out_bit);
else return 0;
}

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/* this defines the type of EEPROM inside the game cartridge as Backup RAM
* Here are some notes from 8BitWizard (http://www.spritesmind.net/_GenDev/forum):
*
* Mode 1 (7-bit) - the chip takes a single byte with a 7-bit memory address and a R/W bit (24C01)
* Mode 2 (8-bit) - the chip takes a 7-bit device address and R/W bit followed by an 8-bit memory address;
* the device address may contain up to three more memory address bits (24C01 - 24C16).
* You can also string eight 24C01, four 24C02, two 24C08, or various combinations, set their address config lines correctly,
* and the result appears exactly the same as a 24C16
* Mode 3 (16-bit) - the chip takes a 7-bit device address and R/W bit followed by a 16-bit memory address (24C32 and larger)
*
* Also, while most 24Cxx are addressed at 200000-2FFFFF, I have found two different ways of mapping the control lines.
* EA uses SDA on D7 (read/write) and SCL on D6 (write only), and I have found boards using different mapping (I think Accolade)
* which uses D1-read=SDA, D0-write=SDA, D1-write=SCL. Accolade also has a custom-chip mapper which may even use a third method.
*/
typedef struct
{
uint8 address_bits; /* number of bits needed to address the array: 7, 8 or 16 */
uint16 size_mask; /* size of the array (in bytes) - 1 */
uint16 pagewrite_mask; /* maximal number of bytes that can be written in a single write cycle - 1*/
uint32 sda_in_adr; /* 68k address used by SDA_IN signal */
uint32 sda_out_adr; /* 68k address used by SDA_OUT signal */
uint32 scl_adr; /* address used by SCL signal */
uint8 sda_in_bit; /* position of the SDA_IN bit */
uint8 sda_out_bit; /* position of the SDA_OUT bit */
uint8 scl_bit; /* position of the SCL bit */
} T_EEPROM_TYPE;
typedef enum
{
STAND_BY = 0,
WAIT_STOP,
GET_SLAVE_ADR,
GET_WORD_ADR_7BITS,
GET_WORD_ADR_HIGH,
GET_WORD_ADR_LOW,
WRITE_DATA,
READ_DATA,
} T_EEPROM_STATE;
typedef struct
{
uint8 sda;
uint8 scl;
uint8 old_sda;
uint8 old_scl;
uint8 cycles;
uint8 rw;
uint16 slave_mask;
uint16 word_address;
T_EEPROM_STATE state;
T_EEPROM_TYPE type;
} T_EEPROM;
/* global variables */
extern T_EEPROM eeprom;
/* Function prototypes */
extern void EEPROM_Init();
extern void EEPROM_Write(unsigned int address, unsigned int value);
extern unsigned int EEPROM_Read(unsigned int address);

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/*
Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
uint8 *cart_rom; /* cart_rom NEED to be previously dynamically allocated */
uint8 work_ram[0x10000]; /* 68K work RAM */
uint8 zram[0x2000]; /* Z80 work RAM */
uint8 zbusreq; /* /BUSREQ from Z80 */
uint8 zreset; /* /RESET to Z80 */
uint8 zbusack; /* /BUSACK to Z80 */
uint8 zirq; /* /IRQ to Z80 */
uint32 zbank; /* Address of Z80 bank window */
uint8 gen_running;
uint32 lastbusreqcnt;
uint8 lastbusack;
uint32 genromsize;
static int cpu_sync[512]; /* Z80-68K cycles synchronization table */
#ifdef LSB_FIRST
void bswap(uint8 *mem, int length)
{
int i;
for(i = 0; i < length; i += 2)
{
uint8 temp = mem[i+0];
mem[i+0] = mem[i+1];
mem[i+1] = temp;
}
}
#endif
/*--------------------------------------------------------------------------*/
/* Init, reset, shutdown functions */
/*--------------------------------------------------------------------------*/
void gen_init (void)
{
int i;
#ifdef LSB_FIRST
bswap(cart_rom, genromsize);
#endif
#ifdef NGC
ShadowROM ();
#else
memcpy(shadow_rom,cart_rom,genromsize);
#endif
m68k_set_cpu_type (M68K_CPU_TYPE_68000);
m68k_pulse_reset ();
gen_running = 1;
for (i=0; i<512; i++) cpu_sync[i] = (int)(((double)i * 7.0) / 15.0);
}
void gen_reset (void)
{
/* Clear RAM */
memset (work_ram, 0, sizeof (work_ram));
memset (zram, 0, sizeof (zram));
gen_running = 1;
zreset = 0; /* Z80 is reset */
zbusreq = 0; /* Z80 has control of the Z bus */
zbusack = 1; /* Z80 is busy using the Z bus */
zbank = 0; /* Assume default bank is 000000-007FFF */
zirq = 0; /* No interrupts occuring */
lastbusreqcnt = 0;
lastbusack = 1;
/* Reset the 68000 emulator */
m68k_pulse_reset ();
z80_reset (0);
z80_set_irq_callback (z80_irq_callback);
}
void gen_shutdown (void)
{
}
/*-----------------------------------------------------------------------
Bus controller chip functions
-----------------------------------------------------------------------*/
int gen_busack_r (void)
{
if (zbusack == 0)
{
if ((count_m68k + m68k_cycles_run() - lastbusreqcnt) > 16)
return 0; /* bus taken */
else return (lastbusack&1);
}
else return 1;
}
void gen_busreq_w (int state)
{
int z80_cycles_to_run;
input_raz ();
if (state == 1)
{
/* Bus Request */
lastbusreqcnt = count_m68k + m68k_cycles_run();
lastbusack = zbusack;
if (zbusreq == 0)
{
/* Z80 stopped */
/* z80 was ON during the last 68k cycles */
/* we execute the appropriate number of z80 cycles */
z80_cycles_to_run = aim_z80 - cpu_sync[aim_m68k - count_m68k -m68k_cycles_run()];
if (z80_cycles_to_run > 0) z80_run(z80_cycles_to_run);
}
}
else
{
/* Bus released */
if (zbusreq == 1)
{
/* Z80 started */
/* z80 was OFF during the last 68k cycles */
/* we burn the appropriate number of z80 cycles */
z80_cycles_to_run = aim_z80 - cpu_sync[aim_m68k - count_m68k - m68k_cycles_run()];
if (z80_cycles_to_run > 0) count_z80 = z80_cycles_to_run;
}
}
zbusreq = (state & 1);
zbusack = 1 ^ (zbusreq & zreset);
}
void gen_reset_w (int state)
{
zreset = (state & 1);
zbusack = 1 ^ (zbusreq & zreset);
if (zreset == 0)
{
lastbusreqcnt = 0;
lastbusack = 1;
fm_reset();
z80_reset (0);
z80_set_irq_callback (z80_irq_callback);
}
}
void gen_bank_w (int state)
{
zbank = ((zbank >> 1) | ((state & 1) << 23)) & 0xFF8000;
}
int z80_irq_callback (int param)
{
zirq = 0;
z80_set_irq_line (0, CLEAR_LINE);
return 0xFF;
}
int vdp_int_ack_callback (int int_level)
{
switch (int_level)
{
case 4:
hint_pending = 0;
vint_pending = 0;
break;
case 6:
vint_pending = 0;
break;
}
return M68K_INT_ACK_AUTOVECTOR;
}

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#ifndef _GENESIS_H_
#define _GENESIS_H_
/* Global variables */
extern uint8 *cart_rom;
extern uint8 work_ram[0x10000];
extern uint8 zram[0x2000];
extern uint8 zbusreq;
extern uint8 zbusack;
extern uint8 zreset;
extern uint8 zirq;
extern uint32 zbank;
extern uint8 gen_running;
extern uint32 lastbusreqcnt;
extern uint8 lastbusack;
extern uint32 genromsize;
/* Function prototypes */
void gen_init(void);
void gen_reset(void);
void gen_shutdown(void);
int gen_busack_r(void);
void gen_busreq_w(int state);
void gen_reset_w(int state);
void gen_bank_w(int state);
void bswap(uint8 *mem, int length);
int z80_irq_callback(int param);
void m68k_irq_ack_callback(int int_level);
#endif /* _GEN_H_ */

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#ifndef _HVC_H_
#define _HVC_H_
/* V counter values for NTSC 192-line display */
uint8 vc_ntsc_192[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA,
0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for NTSC 224-line display */
uint16 vc_ntsc_224[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA,
0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for NTSC 240-line display */
uint8 vc_ntsc_240[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05
};
/* V counter values for PAL 192-line display */
uint8 vc_pal_192[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2,
0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for PAL 224-line display */
uint16 vc_pal_224[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x100, 0x101, 0x102,
0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for PAL 240-line display */
uint16 vc_pal_240[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x100, 0x101, 0x102, 0x103, 0x104, 0x105, 0x106, 0x107, 0x108, 0x109, 0x10A,
0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
};
/*
VDP timing for an NTSC Genesis in display mode 5.
Version 0.4 (11/29/00)
by Charles MacDonald
WWW: http://cgfm2.emuviews.com
Unpublished work Copyright 2000 Charles MacDonald
Description 32-cell 40-cell
----------------------------------------------------------------------------
Range 00-93, E9-FF 00-B6, E4-FF
Display area 00-7F 00-9F
V counter increment 84, 85 A4, A5
V-blanking in 86, 87 A7, A8
V-blanking out 86, 87 A7, A8
H-blanking in 93, E9 B2, E4
H-blanking out 06, 07 06, 07
Comma seperated values show the H counter value before an event occurs,
and then the H counter value immediately after.
These values shouldn't be considered 100% accurate, they are probably
off by one or two.
Each H counter unit is equivalent to two pixels.
The gaps at 93-E9 and B6-E4 are where the H counter 'jumps' ahead.
The H counter will never actually be set to the values 94-E8 or B7-E3.
Perhaps this is the horizontal retrace period.
Interestingly enough, the timing values for the 32-cell display mode
are identical to that of the SMS.
It would appear that in 40-cell mode, the horizontal blanking period
is shorter as the active display period takes more time.
The V-blanking flag can also be forcibly set by disabling the display
through bit 6 of register #1.
*/
/*
uint8 cycle2hc32[488] = {
0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x05,
0x05, 0x05, 0x06, 0x06, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0A,
0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x10, 0x10,
0x10, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x16,
0x16, 0x16, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B,
0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21,
0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x26,
0x27, 0x27, 0x27, 0x28, 0x28, 0x29, 0x29, 0x29, 0x2A, 0x2A, 0x2A, 0x2B, 0x2B, 0x2B, 0x2C, 0x2C,
0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x2F, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x32,
0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36, 0x37, 0x37, 0x37,
0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3A, 0x3B, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D,
0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41, 0x42, 0x42, 0x42,
0x43, 0x43, 0x44, 0x44, 0x44, 0x45, 0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x47, 0x48, 0x48,
0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B, 0x4B, 0x4C, 0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E,
0x4E, 0x4E, 0x4F, 0x4F, 0x4F, 0x50, 0x50, 0x51, 0x51, 0x51, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53,
0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x58, 0x59, 0x59,
0x59, 0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5B, 0x5C, 0x5C, 0x5C, 0x5D, 0x5D, 0x5E, 0x5E, 0x5E, 0x5F,
0x5F, 0x5F, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64,
0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x6A,
0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E, 0x6E, 0x6E, 0x6F, 0x6F, 0x6F,
0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x74, 0x75, 0x75,
0x75, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B,
0x7B, 0x7B, 0x7C, 0x7C, 0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80,
0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x83, 0x83, 0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x86,
0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x89, 0x89, 0x89, 0x8A, 0x8A, 0x8A, 0x8B, 0x8B, 0x8B,
0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8E, 0x8F, 0x8F, 0x8F, 0x90, 0x90, 0x90, 0x91, 0x91,
0x91, 0x92, 0x92, 0x92, 0x93, 0x93,
0xE9, 0xE9, 0xE9, 0xEA, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC,
0xEC, 0xEC, 0xED, 0xED, 0xED, 0xEE, 0xEE, 0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1,
0xF2, 0xF2, 0xF2, 0xF3, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5, 0xF5, 0xF6, 0xF6, 0xF6, 0xF7, 0xF7,
0xF7, 0xF8, 0xF8, 0xF8, 0xF9, 0xF9, 0xF9, 0xFA, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC, 0xFC, 0xFD,
0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF
};
*/
uint8 cycle2hc32[489] = {
0xe8, 0xe8, 0xe8, 0xe9, 0xe9, 0xe9, 0xea, 0xea, 0xea, 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xed,
0xed, 0xed, 0xee, 0xee, 0xee, 0xef, 0xef, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf2, 0xf2, 0xf2,
0xf3, 0xf3, 0xf3, 0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf8, 0xf8,
0xf8, 0xf9, 0xf9, 0xf9, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd,
0xfe, 0xfe, 0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03,
0x03, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06, 0x06, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09,
0x09, 0x09, 0x0a, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e,
0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14,
0x14, 0x14, 0x15, 0x15, 0x15, 0x16, 0x16, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19,
0x1a, 0x1a, 0x1a, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e, 0x1f, 0x1f,
0x1f, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24,
0x25, 0x25, 0x26, 0x26, 0x26, 0x27, 0x27, 0x27, 0x28, 0x28, 0x28, 0x29, 0x29, 0x29, 0x2a, 0x2a,
0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30,
0x30, 0x30, 0x31, 0x31, 0x31, 0x32, 0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35,
0x36, 0x36, 0x36, 0x37, 0x37, 0x37, 0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3a, 0x3a, 0x3a, 0x3b,
0x3b, 0x3b, 0x3c, 0x3c, 0x3d, 0x3d, 0x3d, 0x3e, 0x3e, 0x3e, 0x3f, 0x3f, 0x3f, 0x40, 0x40, 0x40,
0x41, 0x41, 0x41, 0x42, 0x42, 0x42, 0x43, 0x43, 0x43, 0x44, 0x44, 0x45, 0x45, 0x45, 0x46, 0x46,
0x46, 0x47, 0x47, 0x47, 0x48, 0x48, 0x48, 0x49, 0x49, 0x49, 0x4a, 0x4a, 0x4a, 0x4b, 0x4b, 0x4b,
0x4c, 0x4c, 0x4d, 0x4d, 0x4d, 0x4e, 0x4e, 0x4e, 0x4f, 0x4f, 0x4f, 0x50, 0x50, 0x50, 0x51, 0x51,
0x51, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57,
0x57, 0x57, 0x58, 0x58, 0x58, 0x59, 0x59, 0x59, 0x5a, 0x5a, 0x5a, 0x5b, 0x5b, 0x5c, 0x5c, 0x5c,
0x5d, 0x5d, 0x5d, 0x5e, 0x5e, 0x5e, 0x5f, 0x5f, 0x5f, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x62,
0x62, 0x62, 0x63, 0x63, 0x64, 0x64, 0x64, 0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67,
0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x6a, 0x6a, 0x6a, 0x6b, 0x6b, 0x6c, 0x6c, 0x6c, 0x6d, 0x6d,
0x6d, 0x6e, 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x70, 0x70, 0x70, 0x71, 0x71, 0x71, 0x72, 0x72, 0x72,
0x73, 0x73, 0x74, 0x74, 0x74, 0x75, 0x75, 0x75, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78,
0x78, 0x79, 0x79, 0x79, 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7e,
0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x80, 0x81, 0x81, 0x81, 0x82, 0x82, 0x83, 0x83, 0x83,
0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x86, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x89,
0x89, 0x89, 0x8a, 0x8a, 0x8b, 0x8b, 0x8b, 0x8c, 0x8c, 0x8c, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e,
0x8f, 0x8f, 0x8f, 0x90, 0x90, 0x90, 0x91, 0x91, 0x92
};
/*
uint8 cycle2hc32[489] = {
0xe9, 0xe9, 0xe9, 0xea, 0xea, 0xea, 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed, 0xee,
0xee, 0xee, 0xef, 0xef, 0xef, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf2, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3,
0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf8, 0xf8, 0xf9, 0xf9,
0xf9, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd, 0xfe, 0xfe, 0xfe,
0xff, 0xff, 0xff, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04,
0x04, 0x05, 0x05, 0x05, 0x06, 0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0a,
0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f,
0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14, 0x14, 0x14, 0x15,
0x15, 0x15, 0x16, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1a, 0x1a, 0x1a,
0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f, 0x20, 0x20,
0x20, 0x21, 0x21, 0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25,
0x26, 0x26, 0x27, 0x27, 0x27, 0x28, 0x28, 0x28, 0x29, 0x29, 0x29, 0x2a, 0x2a, 0x2a, 0x2b, 0x2b,
0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x30, 0x31,
0x31, 0x31, 0x32, 0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35, 0x35, 0x36, 0x36,
0x37, 0x37, 0x37, 0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3a, 0x3a, 0x3a, 0x3b, 0x3b, 0x3b, 0x3c,
0x3c, 0x3c, 0x3d, 0x3d, 0x3e, 0x3e, 0x3e, 0x3f, 0x3f, 0x3f, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41,
0x42, 0x42, 0x42, 0x43, 0x43, 0x43, 0x44, 0x44, 0x44, 0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47,
0x47, 0x48, 0x48, 0x48, 0x49, 0x49, 0x49, 0x4a, 0x4a, 0x4a, 0x4b, 0x4b, 0x4b, 0x4c, 0x4c, 0x4c,
0x4d, 0x4d, 0x4e, 0x4e, 0x4e, 0x4f, 0x4f, 0x4f, 0x50, 0x50, 0x50, 0x51, 0x51, 0x51, 0x52, 0x52,
0x52, 0x53, 0x53, 0x53, 0x54, 0x54, 0x54, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x57, 0x58,
0x58, 0x58, 0x59, 0x59, 0x59, 0x5a, 0x5a, 0x5a, 0x5b, 0x5b, 0x5b, 0x5c, 0x5c, 0x5d, 0x5d, 0x5d,
0x5e, 0x5e, 0x5e, 0x5f, 0x5f, 0x5f, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63,
0x63, 0x63, 0x64, 0x64, 0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68,
0x69, 0x69, 0x69, 0x6a, 0x6a, 0x6a, 0x6b, 0x6b, 0x6b, 0x6c, 0x6c, 0x6d, 0x6d, 0x6d, 0x6e, 0x6e,
0x6e, 0x6f, 0x6f, 0x6f, 0x70, 0x70, 0x70, 0x71, 0x71, 0x71, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73,
0x74, 0x74, 0x75, 0x75, 0x75, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x78, 0x79, 0x79,
0x79, 0x7a, 0x7a, 0x7a, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e, 0x7f,
0x7f, 0x7f, 0x80, 0x80, 0x80, 0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84, 0x84,
0x85, 0x85, 0x85, 0x86, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x89, 0x89, 0x89, 0x8a,
0x8a, 0x8a, 0x8b, 0x8b, 0x8c, 0x8c, 0x8c, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f, 0x8f,
0x90, 0x90, 0x90, 0x91, 0x91, 0x91, 0x92, 0x92, 0x93
};*/
/*
uint8 cycle2hc40[488] = {
0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06,
0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D,
0x0D, 0x0E, 0x0E, 0x0F, 0x0F, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14,
0x14, 0x15, 0x15, 0x16, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B,
0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29,
0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B, 0x2C, 0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x30,
0x30, 0x30, 0x31, 0x31, 0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36,
0x37, 0x37, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D,
0x3E, 0x3E, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x42, 0x42, 0x43, 0x43, 0x43, 0x44, 0x44,
0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x48, 0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B,
0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E, 0x4E, 0x4F, 0x4F, 0x50, 0x50, 0x50, 0x51, 0x51, 0x52, 0x52,
0x53, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x59, 0x59,
0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5C, 0x5C, 0x5D, 0x5D, 0x5D, 0x5E, 0x5E, 0x5F, 0x5F, 0x60, 0x60,
0x60, 0x61, 0x61, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64, 0x65, 0x65, 0x66, 0x66, 0x67, 0x67,
0x67, 0x68, 0x68, 0x69, 0x69, 0x6A, 0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E,
0x6E, 0x6F, 0x6F, 0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x75,
0x75, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B, 0x7B, 0x7C,
0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80, 0x81, 0x81, 0x82, 0x82, 0x83,
0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x89, 0x89, 0x8A,
0x8A, 0x8A, 0x8B, 0x8B, 0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8F, 0x8F, 0x90, 0x90, 0x90,
0x91, 0x91, 0x92, 0x92, 0x93, 0x93, 0x94, 0x94, 0x94, 0x95, 0x95, 0x96, 0x96, 0x97, 0x97, 0x97,
0x98, 0x98, 0x99, 0x99, 0x9A, 0x9A, 0x9A, 0x9B, 0x9B, 0x9C, 0x9C, 0x9D, 0x9D, 0x9D, 0x9E, 0x9E,
0x9F, 0x9F, 0xA0, 0xA0, 0xA1, 0xA1, 0xA1, 0xA2, 0xA2, 0xA3, 0xA3, 0xA4, 0xA4, 0xA4, 0xA5, 0xA5,
0xA6, 0xA6, 0xA7, 0xA7, 0xA7, 0xA8, 0xA8, 0xA9, 0xA9, 0xAA, 0xAA, 0xAA, 0xAB, 0xAB, 0xAC, 0xAC,
0xAD, 0xAD, 0xAD, 0xAE, 0xAE, 0xAF, 0xAF, 0xB0, 0xB0, 0xB1, 0xB1, 0xB1, 0xB2, 0xB2, 0xB3, 0xB3,
0xB4, 0xB4, 0xB4, 0xB5, 0xB5, 0xB6, 0xB6,
0xE4, 0xE4, 0xE4, 0xE5, 0xE5, 0xE6, 0xE6, 0xE7, 0xE7,
0xE7, 0xE8, 0xE8, 0xE9, 0xE9, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC, 0xEC, 0xED, 0xED, 0xEE, 0xEE,
0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1, 0xF2, 0xF2, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5,
0xF5, 0xF6, 0xF6, 0xF7, 0xF7, 0xF7, 0xF8, 0xF8, 0xF9, 0xF9, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC,
0xFC, 0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF
};*/
uint8 cycle2hc40[489] = {
0xe4, 0xe4, 0xe4, 0xe5, 0xe5, 0xe6, 0xe6, 0xe7, 0xe7, 0xe7, 0xe8, 0xe8, 0xe9, 0xe9, 0xea, 0xea,
0xea, 0xeb, 0xeb, 0xec, 0xec, 0xed, 0xed, 0xed, 0xee, 0xee, 0xef, 0xef, 0xf0, 0xf0, 0xf0, 0xf1,
0xf1, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3, 0xf4, 0xf4, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf8,
0xf8, 0xf9, 0xf9, 0xf9, 0xfa, 0xfa, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfe, 0xfe, 0xff,
0xff, 0xff, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x05,
0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0a, 0x0a, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c,
0x0d, 0x0d, 0x0e, 0x0e, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13,
0x14, 0x14, 0x15, 0x15, 0x15, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x1a, 0x1a,
0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f, 0x20, 0x20, 0x21, 0x21,
0x21, 0x22, 0x22, 0x23, 0x23, 0x24, 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27, 0x27, 0x28,
0x28, 0x29, 0x29, 0x2a, 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2d, 0x2d, 0x2e, 0x2e, 0x2e, 0x2f,
0x2f, 0x30, 0x30, 0x31, 0x31, 0x31, 0x32, 0x32, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35, 0x36,
0x36, 0x37, 0x37, 0x37, 0x38, 0x38, 0x39, 0x39, 0x3a, 0x3a, 0x3a, 0x3b, 0x3b, 0x3c, 0x3c, 0x3d,
0x3d, 0x3d, 0x3e, 0x3e, 0x3f, 0x3f, 0x40, 0x40, 0x40, 0x41, 0x41, 0x42, 0x42, 0x43, 0x43, 0x43,
0x44, 0x44, 0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x48, 0x48, 0x49, 0x49, 0x49, 0x4a, 0x4a,
0x4b, 0x4b, 0x4c, 0x4c, 0x4d, 0x4d, 0x4d, 0x4e, 0x4e, 0x4f, 0x4f, 0x50, 0x50, 0x50, 0x51, 0x51,
0x52, 0x52, 0x53, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58,
0x59, 0x59, 0x59, 0x5a, 0x5a, 0x5b, 0x5b, 0x5c, 0x5c, 0x5c, 0x5d, 0x5d, 0x5e, 0x5e, 0x5f, 0x5f,
0x5f, 0x60, 0x60, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63, 0x63, 0x64, 0x64, 0x65, 0x65, 0x65, 0x66,
0x66, 0x67, 0x67, 0x68, 0x68, 0x68, 0x69, 0x69, 0x6a, 0x6a, 0x6b, 0x6b, 0x6b, 0x6c, 0x6c, 0x6d,
0x6d, 0x6e, 0x6e, 0x6e, 0x6f, 0x6f, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x72, 0x73, 0x73, 0x74,
0x74, 0x75, 0x75, 0x75, 0x76, 0x76, 0x77, 0x77, 0x78, 0x78, 0x78, 0x79, 0x79, 0x7a, 0x7a, 0x7b,
0x7b, 0x7b, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x80, 0x80, 0x81, 0x81, 0x81,
0x82, 0x82, 0x83, 0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88,
0x89, 0x89, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b, 0x8c, 0x8c, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8f, 0x8f,
0x90, 0x90, 0x90, 0x91, 0x91, 0x92, 0x92, 0x93, 0x93, 0x94, 0x94, 0x94, 0x95, 0x95, 0x96, 0x96,
0x97, 0x97, 0x97, 0x98, 0x98, 0x99, 0x99, 0x9a, 0x9a, 0x9a, 0x9b, 0x9b, 0x9c, 0x9c, 0x9d, 0x9d,
0x9d, 0x9e, 0x9e, 0x9f, 0x9f, 0xa0, 0xa0, 0xa0, 0xa1, 0xa1, 0xa2, 0xa2, 0xa3, 0xa3, 0xa3, 0xa4,
0xa4, 0xa5, 0xa5, 0xa6, 0xa6, 0xa6, 0xa7, 0xa7, 0xa8, 0xa8, 0xa9, 0xa9, 0xa9, 0xaa, 0xaa, 0xab,
0xab, 0xac, 0xac, 0xac, 0xad, 0xad, 0xae, 0xae, 0xaf, 0xaf, 0xaf, 0xb0, 0xb0, 0xb1, 0xb1, 0xb2,
0xb2, 0xb2, 0xb3, 0xb3, 0xb4, 0xb4, 0xb5, 0xb5, 0xb6
};
/*
uint8 cycle2hc40[489] = {
0xe4, 0xe4, 0xe4, 0xe5, 0xe5, 0xe6, 0xe6, 0xe6, 0xe7, 0xe7, 0xe8, 0xe8, 0xe9, 0xe9, 0xe9, 0xea,
0xea, 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xed, 0xed, 0xee, 0xee, 0xee, 0xef, 0xef, 0xf0, 0xf0, 0xf1,
0xf1, 0xf1, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3, 0xf4, 0xf4, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7,
0xf8, 0xf8, 0xf9, 0xf9, 0xf9, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfd, 0xfd, 0xfe, 0xfe,
0xfe, 0xff, 0xff, 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05,
0x05, 0x06, 0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09, 0x09, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b,
0x0c, 0x0c, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12,
0x13, 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19,
0x19, 0x1a, 0x1a, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e, 0x1f, 0x1f, 0x20,
0x20, 0x20, 0x21, 0x21, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26,
0x27, 0x27, 0x28, 0x28, 0x28, 0x29, 0x29, 0x2a, 0x2a, 0x2a, 0x2b, 0x2b, 0x2c, 0x2c, 0x2d, 0x2d,
0x2d, 0x2e, 0x2e, 0x2f, 0x2f, 0x30, 0x30, 0x30, 0x31, 0x31, 0x32, 0x32, 0x32, 0x33, 0x33, 0x34,
0x34, 0x35, 0x35, 0x35, 0x36, 0x36, 0x37, 0x37, 0x38, 0x38, 0x38, 0x39, 0x39, 0x3a, 0x3a, 0x3a,
0x3b, 0x3b, 0x3c, 0x3c, 0x3d, 0x3d, 0x3d, 0x3e, 0x3e, 0x3f, 0x3f, 0x3f, 0x40, 0x40, 0x41, 0x41,
0x42, 0x42, 0x42, 0x43, 0x43, 0x44, 0x44, 0x45, 0x45, 0x45, 0x46, 0x46, 0x47, 0x47, 0x47, 0x48,
0x48, 0x49, 0x49, 0x4a, 0x4a, 0x4a, 0x4b, 0x4b, 0x4c, 0x4c, 0x4d, 0x4d, 0x4d, 0x4e, 0x4e, 0x4f,
0x4f, 0x4f, 0x50, 0x50, 0x51, 0x51, 0x52, 0x52, 0x52, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x55,
0x56, 0x56, 0x57, 0x57, 0x57, 0x58, 0x58, 0x59, 0x59, 0x5a, 0x5a, 0x5a, 0x5b, 0x5b, 0x5c, 0x5c,
0x5c, 0x5d, 0x5d, 0x5e, 0x5e, 0x5f, 0x5f, 0x5f, 0x60, 0x60, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63,
0x63, 0x64, 0x64, 0x64, 0x65, 0x65, 0x66, 0x66, 0x67, 0x67, 0x67, 0x68, 0x68, 0x69, 0x69, 0x6a,
0x6a, 0x6a, 0x6b, 0x6b, 0x6c, 0x6c, 0x6c, 0x6d, 0x6d, 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x70, 0x70,
0x71, 0x71, 0x71, 0x72, 0x72, 0x73, 0x73, 0x74, 0x74, 0x74, 0x75, 0x75, 0x76, 0x76, 0x77, 0x77,
0x77, 0x78, 0x78, 0x79, 0x79, 0x79, 0x7a, 0x7a, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e,
0x7e, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x81, 0x81, 0x81, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84, 0x84,
0x85, 0x85, 0x86, 0x86, 0x86, 0x87, 0x87, 0x88, 0x88, 0x89, 0x89, 0x89, 0x8a, 0x8a, 0x8b, 0x8b,
0x8c, 0x8c, 0x8c, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f, 0x90, 0x90, 0x91, 0x91, 0x91, 0x92,
0x92, 0x93, 0x93, 0x94, 0x94, 0x94, 0x95, 0x95, 0x96, 0x96, 0x96, 0x97, 0x97, 0x98, 0x98, 0x99,
0x99, 0x99, 0x9a, 0x9a, 0x9b, 0x9b, 0x9b, 0x9c, 0x9c, 0x9d, 0x9d, 0x9e, 0x9e, 0x9e, 0x9f, 0x9f,
0xa0, 0xa0, 0xa1, 0xa1, 0xa1, 0xa2, 0xa2, 0xa3, 0xa3, 0xa3, 0xa4, 0xa4, 0xa5, 0xa5, 0xa6, 0xa6,
0xa6, 0xa7, 0xa7, 0xa8, 0xa8, 0xa9, 0xa9, 0xa9, 0xaa, 0xaa, 0xab, 0xab, 0xab, 0xac, 0xac, 0xad,
0xad, 0xae, 0xae, 0xae, 0xaf, 0xaf, 0xb0, 0xb0, 0xb1
};
*/
/* H counter values for a 256-pixel wide display (342 pixel max.) */
/*uint8 hc_256[171] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93,
0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};*/
/* H counter values for a 320-pixel wide display (422 pixels max.) */
/*uint8 hc_320[211] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6,
0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};*/
/*uint8 *hc_table[2] = {
hc_256,
hc_320,
};*/
#endif /* _HVC_H_ */

508
genplus-gx/source/input.c Normal file
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@ -0,0 +1,508 @@
/*
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
NGC port (June 2007): Added various Peripherals emulation (Eke-Eke)
*/
#include "shared.h"
t_input input;
uint8 current_pad = 0;
uint8 j_cart = 0;
void gamepad_reset(uint8 num);
void gamepad_update(uint8 num);
void gamepad_raz(uint8 num);
void lightgun_update(void);
void lightgun_reset(void);
void teamplayer_reset(uint8 port);
/*****************************************************************************
* Generic INPUTS Control
*
*****************************************************************************/
void input_reset (int padtype)
{
uint8 i;
input.max = 0;
for (i=0; i<MAX_DEVICES; i++)
{
input.dev[i] = NO_DEVICE;
input.pad[i] = 0;
}
switch (input.system[0])
{
case SYSTEM_GAMEPAD:
if (input.max++ < MAX_INPUTS) input.dev[0] = padtype;
gamepad_reset(0);
break;
case SYSTEM_WAYPLAY:
for (i=0; i<4; i++)
{
if (input.max++ < MAX_INPUTS) input.dev[i] = padtype;
gamepad_reset(i);
}
current_pad = 0;
break;
case SYSTEM_TEAMPLAYER:
for (i=0; i<4; i++)
{
if (input.max++ < MAX_INPUTS) input.dev[i] = padtype;
}
teamplayer_reset(0);
break;
}
switch (input.system[1])
{
case SYSTEM_GAMEPAD:
if (input.max++ < MAX_INPUTS) input.dev[4] = padtype;
gamepad_reset(4);
break;
case SYSTEM_TEAMPLAYER:
for (i=4; i<8; i++)
{
if (input.max++ < MAX_INPUTS) input.dev[i] = padtype;
}
teamplayer_reset(1);
break;
case SYSTEM_MENACER:
if (input.max++ < MAX_INPUTS) input.dev[4] = DEVICE_LIGHTGUN;
lightgun_reset();
break;
}
if (input.max > MAX_INPUTS) input.max = MAX_INPUTS;
/* J-CART: add two gamepad inputs */
if (j_cart)
{
input.dev[5] = padtype;
input.dev[6] = padtype;
gamepad_reset(5);
gamepad_reset(6);
input.max+=2;
}
}
void input_update()
{
uint8 i;
switch (input.system[0])
{
case SYSTEM_GAMEPAD:
if (input.dev[0] == DEVICE_6BUTTON) gamepad_update(0);
break;
case SYSTEM_WAYPLAY:
for (i=0; i<4; i++)
{
if (input.dev[i] == DEVICE_6BUTTON) gamepad_update(i);
}
break;
}
switch (input.system[1])
{
case SYSTEM_GAMEPAD:
if (input.dev[4] == DEVICE_6BUTTON) gamepad_update(4);
break;
case SYSTEM_MENACER:
lightgun_update();
break;
}
}
void input_raz()
{
uint8 i;
switch (input.system[0])
{
case SYSTEM_GAMEPAD:
if (input.dev[0] == DEVICE_6BUTTON) gamepad_raz(0);
break;
case SYSTEM_WAYPLAY:
for (i=0; i<4; i++)
{
if (input.dev[i] == DEVICE_6BUTTON) gamepad_raz(i);
}
break;
}
switch (input.system[1])
{
case SYSTEM_GAMEPAD:
if (input.dev[4] == DEVICE_6BUTTON) gamepad_raz(4);
break;
}
}
/*****************************************************************************
* LIGHTGUN specific functions
*
*****************************************************************************/
struct gun
{
int16 x;
int16 y;
} lightgun;
void lightgun_reset(void)
{
lightgun.x = bitmap.viewport.w >> 1;
lightgun.y = bitmap.viewport.h >> 1;
}
void lightgun_update(void)
{
if ((v_counter == lightgun.y))
{
if (reg[0x0B] & 8) m68k_set_irq(2);
if (reg[0x00] & 2)
{
hc_latch = lightgun.x + 166;
if (hc_latch >= bitmap.viewport.w + 52) hc_latch -= (bitmap.viewport.w + 52 + 48);
hc_latch >>= 1;
}
}
}
void lightgun_set ()
{
if ((input.pad[4] & INPUT_RIGHT)) lightgun.x ++;
if ((input.pad[4] & INPUT_LEFT)) lightgun.x --;
if ((input.pad[4] & INPUT_UP)) lightgun.y --;
if ((input.pad[4] & INPUT_DOWN)) lightgun.y ++;
if (lightgun.x < 0) lightgun.x = 0;
else if (lightgun.x > bitmap.viewport.w-34) lightgun.x = bitmap.viewport.w-34;
if (lightgun.y < 0) lightgun.y = 0;
else if (lightgun.y > bitmap.viewport.h-8) lightgun.y = bitmap.viewport.h-8;
}
uint8 lightgun_read (void)
{
uint8 retval = 0x00;
if ((input.pad[4] & INPUT_B)) retval |= 0x01;
if ((input.pad[4] & INPUT_A)) retval |= 0x02;
if ((input.pad[4] & INPUT_C)) retval |= 0x04;
if ((input.pad[4] & INPUT_START)) retval |= 0x08;
return (retval & 0x7F);
}
/*****************************************************************************
* GAMEPAD specific functions (2PLAYERS/4WAYPLAY)
*
*****************************************************************************/
struct pad
{
uint8 State;
uint8 Counter;
uint8 Delay;
} gamepad[MAX_DEVICES];
void gamepad_reset(uint8 i)
{
gamepad[i].State = 0x40;
if (input.dev[i] == DEVICE_6BUTTON) gamepad_raz(i);
}
void gamepad_raz(uint8 i)
{
gamepad[i].Counter = 0;
gamepad[i].Delay = 0;
}
void gamepad_update(uint8 i)
{
if (gamepad[i].Delay++ > 25) gamepad_raz(i);
}
uint8 gamepad_read (uint8 i)
{
int control;
unsigned char retval = 0xFF;
if (input.dev[i] == NO_DEVICE) return 0x7F;
control = (gamepad[i].State & 0x40) >> 6; /* current TH state */
if (input.dev[i] == DEVICE_6BUTTON)
{
control += (gamepad[i].Counter & 3) << 1; /* TH transitions counter */
}
switch (control)
{
case 1: /*** First High ***/
case 3: /*** Second High ***/
case 5: /*** Third High ***/
/* TH = 1 : ?1CBRLDU */
if (input.pad[i] & INPUT_C) retval &= ~0x20;
if (input.pad[i] & INPUT_B) retval &= ~0x10;
if (input.pad[i] & INPUT_UP) retval &= ~0x01;
if (input.pad[i] & INPUT_DOWN) retval &= ~0x02;
if (input.pad[i] & INPUT_LEFT) retval &= ~0x04;
if (input.pad[i] & INPUT_RIGHT) retval &= ~0x08;
break;
case 0: /*** First low ***/
case 2: /*** Second low ***/
/* TH = 0 : ?0SA00DU */
if (input.pad[i] & INPUT_A) retval &= ~0x10;
if (input.pad[i] & INPUT_START) retval &= ~0x20;
if (input.pad[i] & INPUT_UP) retval &= ~0x01;
if (input.pad[i] & INPUT_DOWN) retval &= ~0x02;
retval &= 0xB3;
break;
/* 6buttons specific (taken from gen-hw.txt) */
/* A 6-button gamepad allows the extra buttons to be read based on how */
/* many times TH is switched from 1 to 0 (and not 0 to 1). Observe the */
/* following sequence */
/*
TH = 1 : ?1CBRLDU 3-button pad return value
TH = 0 : ?0SA00DU 3-button pad return value
TH = 1 : ?1CBRLDU 3-button pad return value
TH = 0 : ?0SA0000 D3-0 are forced to '0'
TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0
TH = 0 : ?0SA1111 D3-0 are forced to '1'
*/
case 4: /*** Third Low ***/
/* TH = 0 : ?0SA0000 D3-0 are forced to '0'*/
if (input.pad[i] & INPUT_A) retval &= ~0x10;
if (input.pad[i] & INPUT_START) retval &= ~0x20;
retval &= 0xB0;
break;
case 6: /*** Fourth Low ***/
/* TH = 0 : ?0SA1111 D3-0 are forced to '1'*/
if (input.pad[i] & INPUT_A) retval &= ~0x10;
if (input.pad[i] & INPUT_START) retval &= ~0x20;
retval &= 0xBF;
break;
case 7: /*** Fourth High ***/
/* TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0*/
if (input.pad[i] & INPUT_X) retval &= ~0x04;
if (input.pad[i] & INPUT_Y) retval &= ~0x02;
if (input.pad[i] & INPUT_Z) retval &= ~0x01;
if (input.pad[i] & INPUT_B) retval &= ~0x10;
if (input.pad[i] & INPUT_C) retval &= ~0x20;
if (input.pad[i] & INPUT_MODE) retval &= ~0x08;
break;
default:
break;
}
/* bit7 is latched*/
return (retval&0x7f);
}
void gamepad_write (uint8 i, uint8 data)
{
if (input.dev[i] == DEVICE_6BUTTON)
{
/* TH=0 to TH=1 transition */
if (!(gamepad[i].State & 0x40) && (data & 0x40))
{
gamepad[i].Counter++;
gamepad[i].Delay = 0;
}
}
gamepad[i].State = data;
}
/*****************************************************************************
* TEAMPLAYER specific functions
*
*****************************************************************************/
struct teamplayer
{
uint8 State;
uint8 Counter;
uint8 Table[12];
} teamplayer[2];
void teamplayer_reset(uint8 port)
{
uint8 i;
uint8 index = 0;
uint8 pad_input = 0;
teamplayer[port].State = 0x60; /* TH = 1, TR = 1 */
teamplayer[port].Counter = 0;
/* this table determines which gamepad input should be returned during acquisition sequence
index = teamplayer read table index: 0=1st read, 1=2nd read, ...
pad_input = gamepad input 0-14: 0=P1_DIR, 1=P1_SABC, 2=P1_MXYZ, 4=P2_DIR, 5=P2_SABC, ...
*/
for (i=0; i<4; i++)
{
if (input.dev[(4*port) + i] == DEVICE_3BUTTON)
{
teamplayer[port].Table[index++] = pad_input;
teamplayer[port].Table[index++] = pad_input + 1;
}
else if (input.dev[(4*port) + i] == DEVICE_6BUTTON)
{
teamplayer[port].Table[index++] = pad_input;
teamplayer[port].Table[index++] = pad_input + 1;
teamplayer[port].Table[index++] = pad_input + 2;
}
pad_input += 4;
}
}
/* SEGA teamplayer returns successively:
- PAD1 inputs
- PAD2 inputs
- PAD3 inputs
- PAD4 inputs
Each PAD inputs is obtained through 2 or 3 sequential reads:
1/ DIR buttons
2/ START,A,C,B buttons
3/ MODE, X,Y,Z buttons (6Button only !)
*/
uint8 teamplayer_read(uint8 port, uint8 index)
{
uint8 retval = 0x7F;
uint8 pad_input = teamplayer[port].Table[index] & 0x03;
uint8 pad_num = (4 * port) + ((teamplayer[port].Table[index] >> 2) & 0x03);
switch (pad_input)
{
case 0:
/* Directions Buttons */
if (input.pad[pad_num] & INPUT_UP) retval &= ~0x01;
if (input.pad[pad_num] & INPUT_DOWN) retval &= ~0x02;
if (input.pad[pad_num] & INPUT_LEFT) retval &= ~0x04;
if (input.pad[pad_num] & INPUT_RIGHT) retval &= ~0x08;
break;
case 1:
/* S,A,C,B Buttons */
if (input.pad[pad_num] & INPUT_B) retval &= ~0x01;
if (input.pad[pad_num] & INPUT_C) retval &= ~0x02;
if (input.pad[pad_num] & INPUT_A) retval &= ~0x04;
if (input.pad[pad_num] & INPUT_START) retval &= ~0x08;
break;
case 2:
/* M,X,Y,Z Buttons (6-Buttons only)*/
if (input.pad[pad_num] & INPUT_Z) retval &= ~0x01;
if (input.pad[pad_num] & INPUT_Y) retval &= ~0x02;
if (input.pad[pad_num] & INPUT_X) retval &= ~0x04;
if (input.pad[pad_num] & INPUT_MODE) retval &= ~0x08;
break;
}
return retval;
}
/*****************************************************************************
* MULTITAP generic functions (TEAMPLAYER/4WAYPLAY)
*
*****************************************************************************/
void multitap_write (uint8 port, uint8 data)
{
uint8 old_state;
switch (input.system[port])
{
case SYSTEM_WAYPLAY:
if (!port) gamepad_write(current_pad, data);
else current_pad = (data >> 4) & 0x07;
break;
case SYSTEM_TEAMPLAYER:
old_state = teamplayer[port].State;
teamplayer[port].State = (data & io_reg[port+4]) | (teamplayer[port].State & ~io_reg[port+4]);
if (old_state != teamplayer[port].State) teamplayer[port].Counter ++;
if ((data&0x60) == 0x60) teamplayer[port].Counter = 0;
break;
}
}
uint8 multitap_read (uint8 port)
{
uint8 retval = 0x7F;
uint8 padnum;
switch (input.system[port])
{
case SYSTEM_WAYPLAY:
if (port == 1) return 0x7F;
if (current_pad >= 4) return 0x70; /* multitap detection (TH2 = 1) */
return gamepad_read(current_pad); /* 0x0C = Pad1, 0x1C = Pad2, ... */
case SYSTEM_TEAMPLAYER:
switch (teamplayer[port].Counter) /* acquisition sequence steps */
{
case 0: /* initial state: TH = 1, TR = 1 */
retval = 0x73;
break;
case 1: /* start request: TH = 0, TR = 1 */
retval = 0x3F;
break;
case 2:
case 3: /* ack request: TH=0, TR handshake */
retval = 0x00;
break;
case 4:
case 5:
case 6:
case 7: /* gamepads type */
padnum = (4 * port) + teamplayer[port].Counter - 4;
retval = input.dev[padnum];
break;
default: /* gamepads inputs acquisition */
retval = teamplayer_read(port, teamplayer[port].Counter - 8);
break;
}
/* TL must match TR state */
retval &= ~0x10;
if (teamplayer[port].State & 0x20) retval |= 0x10;
return retval;
}
return retval;
}

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#ifndef _INPUT_H_
#define _INPUT_H_
#include "types.h"
/* Input devices */
#ifdef NGC
#define MAX_INPUTS (4)
#else
#define MAX_INPUTS (8)
#endif
#define MAX_DEVICES (8)
#define DEVICE_3BUTTON (0x00) /* 3-button gamepad */
#define DEVICE_6BUTTON (0x01) /* 6-button gamepad */
#define DEVICE_MOUSE (0x02) /* Sega Mouse (not supported) */
#define DEVICE_LIGHTGUN (0x03) /* Sega Menacer */
#define DEVICE_2BUTTON (0x04) /* 2-button gamepad (not supported) */
#define NO_DEVICE (0x0F) /* unconnected */
/* Input bitmasks */
#define INPUT_MODE (0x00000800)
#define INPUT_Z (0x00000400)
#define INPUT_Y (0x00000200)
#define INPUT_X (0x00000100)
#define INPUT_START (0x00000080)
#define INPUT_C (0x00000040)
#define INPUT_B (0x00000020)
#define INPUT_A (0x00000010)
#define INPUT_LEFT (0x00000008)
#define INPUT_RIGHT (0x00000004)
#define INPUT_DOWN (0x00000002)
#define INPUT_UP (0x00000001)
/* System bitmasks */
#define SYSTEM_GAMEPAD (0) /* Single Gamepad */
#define SYSTEM_TEAMPLAYER (1) /* Sega TeamPlayer (1~8 players) */
#define SYSTEM_WAYPLAY (2) /* EA 4-Way Play (1~4 players) */
#define SYSTEM_MENACER (3) /* SEGA Menacer Lightgun */
#define NO_SYSTEM (4) /* Unconnected Port*/
typedef struct
{
uint8 dev[MAX_DEVICES]; /* Can be any of the DEVICE_* values */
uint32 pad[MAX_DEVICES]; /* Can be any of the INPUT_* bitmasks */
uint8 system[2]; /* Can be any of the SYSTEM_* bitmasks (PORTA & PORTB) */
uint8 max; /* maximum number of connected devices */
} t_input;
/* global variables */
extern t_input input;
extern uint8 j_cart;
/* Function prototypes */
extern void input_reset (int padtype);
extern void input_update(void);
extern void input_raz(void);
extern void lightgun_set (void);
extern uint8 lightgun_read (void);
extern uint8 gamepad_read (uint8 i);
extern void gamepad_write (uint8 i, uint8 data);
extern uint8 multitap_read (uint8 port);
extern void multitap_write (uint8 port, uint8 data);
#endif

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/*
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
I/O controller chip emulation
*/
#include "shared.h"
uint8 io_reg[0x10];
uint8 region_code = REGION_USA;
uint8 pad_type = DEVICE_3BUTTON;
/*****************************************************************************
* IO Read/Write wrappers
*
*****************************************************************************/
unsigned char Player1_Read (void)
{
return gamepad_read(0);
}
unsigned char Player2_Read (void)
{
return gamepad_read(4);
}
void Player1_Write (unsigned char data)
{
gamepad_write(0, data);
}
void Player2_Write (unsigned char data)
{
gamepad_write(4, data);
}
unsigned char MultiTap1_Read (void)
{
return multitap_read(0);
}
unsigned char MultiTap2_Read (void)
{
return multitap_read(1);
}
void MultiTap1_Write (unsigned char data)
{
multitap_write(0, data);
}
void MultiTap2_Write (unsigned char data)
{
multitap_write(1, data);
}
/*****************************************************************************
* I/O chip functions *
* *
*****************************************************************************
*/
struct port_t
{
void (*data_w)(uint8 data);
uint8 (*data_r)(void);
} port[3];
void io_reset(void)
{
/* I/O register default settings */
uint8 io_def[0x10] =
{
0xA0,
0x7F, 0x7F, 0x7F,
0x00, 0x00, 0x00,
0xFF, 0x00, 0x00,
0xFF, 0x00, 0x00,
0xFB, 0x00, 0x00,
};
/* Initialize I/O registers */
memcpy (io_reg, io_def, 0x10);
switch (input.system[0])
{
case SYSTEM_GAMEPAD:
port[0].data_w = Player1_Write;
port[0].data_r = Player1_Read;
break;
case SYSTEM_WAYPLAY:
case SYSTEM_TEAMPLAYER:
port[0].data_w = MultiTap1_Write;
port[0].data_r = MultiTap1_Read;
break;
default:
port[0].data_w = NULL;
port[0].data_r = NULL;
break;
}
switch (input.system[1])
{
case SYSTEM_GAMEPAD:
port[1].data_w = Player2_Write;
port[1].data_r = Player2_Read;
break;
case SYSTEM_WAYPLAY:
case SYSTEM_TEAMPLAYER:
port[1].data_w = MultiTap2_Write;
port[1].data_r = MultiTap2_Read;
break;
case SYSTEM_MENACER:
port[1].data_w = NULL;
port[1].data_r = lightgun_read;
break;
default:
port[1].data_w = NULL;
port[1].data_r = NULL;
break;
}
port[2].data_w = NULL;
port[2].data_r = NULL;
j_cart = 0;
input_reset(pad_type);
}
void io_write(int offset, int value)
{
switch (offset)
{
case 0x01: /* Port A Data */
case 0x02: /* Port B Data */
case 0x03: /* Port C Data */
io_reg[offset] = ((value & 0x80) | (value & io_reg[offset+3]));
if(port[offset-1].data_w) port[offset-1].data_w(value);
return;
case 0x05: /* Port B Ctrl */
if (((value & 0x7F) == 0x7F) &&
((input.system[0] == SYSTEM_TEAMPLAYER) ||
(input.system[1] == SYSTEM_TEAMPLAYER)))
{
/* autodetect 4-Way play ! */
input.system[0] = SYSTEM_WAYPLAY;
input.system[1] = SYSTEM_WAYPLAY;
port[0].data_w = MultiTap1_Write;
port[0].data_r = MultiTap1_Read;
port[1].data_w = MultiTap2_Write;
port[1].data_r = MultiTap2_Read;
input_reset(pad_type);
}
case 0x04: /* Port A Ctrl */
case 0x06: /* Port C Ctrl */
io_reg[offset] = value & 0xFF;
io_reg[offset-3] = ((io_reg[offset-3] & 0x80) | (io_reg[offset-3] & io_reg[offset]));
break;
case 0x07: /* Port A TxData */
case 0x0A: /* Port B TxData */
case 0x0D: /* Port C TxData */
io_reg[offset] = value;
break;
case 0x09: /* Port A S-Ctrl */
case 0x0C: /* Port B S-Ctrl */
case 0x0F: /* Port C S-Ctrl */
io_reg[offset] = (value & 0xF8);
break;
}
}
int io_read(int offset)
{
uint8 has_scd = 0x20; /* No Sega CD unit attached */
uint8 gen_ver = 0x00; /* Version 0 hardware */
uint8 input = 0x7F; /* default input state */
switch(offset)
{
case 0x00: /* Version */
return (region_code | has_scd | gen_ver);
case 0x01: /* Port A Data */
case 0x02: /* Port B Data */
case 0x03: /* Port C Data */
if(port[offset-1].data_r) input = port[offset-1].data_r();
return (io_reg[offset] | ((~io_reg[offset+3]) & input));
}
return (io_reg[offset]);
}

20
genplus-gx/source/io.h Normal file
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#ifndef _IO_H_
#define _IO_H_
#define REGION_USA 0x80
#define REGION_JAPAN_NTSC 0x00
#define REGION_EUROPE 0xC0
#define REGION_JAPAN_PAL 0x40
/* Global variables */
extern uint8 io_reg[0x10];
extern uint8 region_code;
extern uint8 pad_type;
/* Function prototypes */
extern void io_reset(void);
extern void io_write(int offset, int value);
extern int io_read(int offset);
#endif /* _IO_H_ */

894
genplus-gx/source/m68k/m68kcpu.c Normal file
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/* ======================================================================== */
/* ========================= LICENSING & COPYRIGHT ======================== */
/* ======================================================================== */
#if 0
static const char* copyright_notice =
"MUSASHI\n"
"Version 3.3 (2001-01-29)\n"
"A portable Motorola M680x0 processor emulation engine.\n"
"Copyright 1998-2001 Karl Stenerud. All rights reserved.\n"
"\n"
"This code may be freely used for non-commercial purpooses as long as this\n"
"copyright notice remains unaltered in the source code and any binary files\n"
"containing this code in compiled form.\n"
"\n"
"All other lisencing terms must be negotiated with the author\n"
"(Karl Stenerud).\n"
"\n"
"The latest version of this code can be obtained at:\n"
"http://kstenerud.cjb.net\n"
;
#endif
/* ======================================================================== */
/* ================================= NOTES ================================ */
/* ======================================================================== */
/* ======================================================================== */
/* ================================ INCLUDES ============================== */
/* ======================================================================== */
#include "m68kops.h"
#include "m68kcpu.h"
/* ======================================================================== */
/* ================================= DATA ================================= */
/* ======================================================================== */
int m68ki_initial_cycles;
int m68ki_remaining_cycles = 0; /* Number of clocks remaining */
uint m68ki_tracing = 0;
uint m68ki_address_space;
#ifdef M68K_LOG_ENABLE
char* m68ki_cpu_names[9] =
{
"Invalid CPU",
"M68000",
"M68010",
"Invalid CPU",
"M68EC020"
"Invalid CPU",
"Invalid CPU",
"Invalid CPU",
"M68020"
};
#endif /* M68K_LOG_ENABLE */
/* The CPU core */
m68ki_cpu_core m68ki_cpu = {0};
#if M68K_EMULATE_ADDRESS_ERROR
jmp_buf m68ki_address_error_trap;
#endif /* M68K_EMULATE_ADDRESS_ERROR */
/* Used by shift & rotate instructions */
uint8 m68ki_shift_8_table[65] =
{
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff
};
uint16 m68ki_shift_16_table[65] =
{
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff
};
uint m68ki_shift_32_table[65] =
{
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000,
0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00,
0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
};
/* Number of clock cycles to use for exception processing.
* I used 4 for any vectors that are undocumented for processing times.
*/
uint8 m68ki_exception_cycle_table[3][256] =
{
{ /* 000 */
4, /* 0: Reset - Initial Stack Pointer */
4, /* 1: Reset - Initial Program Counter */
50, /* 2: Bus Error (unemulated) */
50, /* 3: Address Error (unemulated) */
34, /* 4: Illegal Instruction */
38, /* 5: Divide by Zero -- ASG: changed from 42 */
40, /* 6: CHK -- ASG: chanaged from 44 */
34, /* 7: TRAPV */
34, /* 8: Privilege Violation */
34, /* 9: Trace */
4, /* 10: 1010 */
4, /* 11: 1111 */
4, /* 12: RESERVED */
4, /* 13: Coprocessor Protocol Violation (unemulated) */
4, /* 14: Format Error */
44, /* 15: Uninitialized Interrupt */
4, /* 16: RESERVED */
4, /* 17: RESERVED */
4, /* 18: RESERVED */
4, /* 19: RESERVED */
4, /* 20: RESERVED */
4, /* 21: RESERVED */
4, /* 22: RESERVED */
4, /* 23: RESERVED */
44, /* 24: Spurious Interrupt */
44, /* 25: Level 1 Interrupt Autovector */
44, /* 26: Level 2 Interrupt Autovector */
44, /* 27: Level 3 Interrupt Autovector */
44, /* 28: Level 4 Interrupt Autovector */
44, /* 29: Level 5 Interrupt Autovector */
44, /* 30: Level 6 Interrupt Autovector */
44, /* 31: Level 7 Interrupt Autovector */
34, /* 32: TRAP #0 -- ASG: chanaged from 38 */
34, /* 33: TRAP #1 */
34, /* 34: TRAP #2 */
34, /* 35: TRAP #3 */
34, /* 36: TRAP #4 */
34, /* 37: TRAP #5 */
34, /* 38: TRAP #6 */
34, /* 39: TRAP #7 */
34, /* 40: TRAP #8 */
34, /* 41: TRAP #9 */
34, /* 42: TRAP #10 */
34, /* 43: TRAP #11 */
34, /* 44: TRAP #12 */
34, /* 45: TRAP #13 */
34, /* 46: TRAP #14 */
34, /* 47: TRAP #15 */
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
4, /* 49: FP Inexact Result (unemulated) */
4, /* 50: FP Divide by Zero (unemulated) */
4, /* 51: FP Underflow (unemulated) */
4, /* 52: FP Operand Error (unemulated) */
4, /* 53: FP Overflow (unemulated) */
4, /* 54: FP Signaling NAN (unemulated) */
4, /* 55: FP Unimplemented Data Type (unemulated) */
4, /* 56: MMU Configuration Error (unemulated) */
4, /* 57: MMU Illegal Operation Error (unemulated) */
4, /* 58: MMU Access Level Violation Error (unemulated) */
4, /* 59: RESERVED */
4, /* 60: RESERVED */
4, /* 61: RESERVED */
4, /* 62: RESERVED */
4, /* 63: RESERVED */
/* 64-255: User Defined */
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 010 */
4, /* 0: Reset - Initial Stack Pointer */
4, /* 1: Reset - Initial Program Counter */
126, /* 2: Bus Error (unemulated) */
126, /* 3: Address Error (unemulated) */
38, /* 4: Illegal Instruction */
44, /* 5: Divide by Zero */
44, /* 6: CHK */
34, /* 7: TRAPV */
38, /* 8: Privilege Violation */
38, /* 9: Trace */
4, /* 10: 1010 */
4, /* 11: 1111 */
4, /* 12: RESERVED */
4, /* 13: Coprocessor Protocol Violation (unemulated) */
4, /* 14: Format Error */
44, /* 15: Uninitialized Interrupt */
4, /* 16: RESERVED */
4, /* 17: RESERVED */
4, /* 18: RESERVED */
4, /* 19: RESERVED */
4, /* 20: RESERVED */
4, /* 21: RESERVED */
4, /* 22: RESERVED */
4, /* 23: RESERVED */
46, /* 24: Spurious Interrupt */
46, /* 25: Level 1 Interrupt Autovector */
46, /* 26: Level 2 Interrupt Autovector */
46, /* 27: Level 3 Interrupt Autovector */
46, /* 28: Level 4 Interrupt Autovector */
46, /* 29: Level 5 Interrupt Autovector */
46, /* 30: Level 6 Interrupt Autovector */
46, /* 31: Level 7 Interrupt Autovector */
38, /* 32: TRAP #0 */
38, /* 33: TRAP #1 */
38, /* 34: TRAP #2 */
38, /* 35: TRAP #3 */
38, /* 36: TRAP #4 */
38, /* 37: TRAP #5 */
38, /* 38: TRAP #6 */
38, /* 39: TRAP #7 */
38, /* 40: TRAP #8 */
38, /* 41: TRAP #9 */
38, /* 42: TRAP #10 */
38, /* 43: TRAP #11 */
38, /* 44: TRAP #12 */
38, /* 45: TRAP #13 */
38, /* 46: TRAP #14 */
38, /* 47: TRAP #15 */
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
4, /* 49: FP Inexact Result (unemulated) */
4, /* 50: FP Divide by Zero (unemulated) */
4, /* 51: FP Underflow (unemulated) */
4, /* 52: FP Operand Error (unemulated) */
4, /* 53: FP Overflow (unemulated) */
4, /* 54: FP Signaling NAN (unemulated) */
4, /* 55: FP Unimplemented Data Type (unemulated) */
4, /* 56: MMU Configuration Error (unemulated) */
4, /* 57: MMU Illegal Operation Error (unemulated) */
4, /* 58: MMU Access Level Violation Error (unemulated) */
4, /* 59: RESERVED */
4, /* 60: RESERVED */
4, /* 61: RESERVED */
4, /* 62: RESERVED */
4, /* 63: RESERVED */
/* 64-255: User Defined */
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 020 */
4, /* 0: Reset - Initial Stack Pointer */
4, /* 1: Reset - Initial Program Counter */
50, /* 2: Bus Error (unemulated) */
50, /* 3: Address Error (unemulated) */
20, /* 4: Illegal Instruction */
38, /* 5: Divide by Zero */
40, /* 6: CHK */
20, /* 7: TRAPV */
34, /* 8: Privilege Violation */
25, /* 9: Trace */
20, /* 10: 1010 */
20, /* 11: 1111 */
4, /* 12: RESERVED */
4, /* 13: Coprocessor Protocol Violation (unemulated) */
4, /* 14: Format Error */
30, /* 15: Uninitialized Interrupt */
4, /* 16: RESERVED */
4, /* 17: RESERVED */
4, /* 18: RESERVED */
4, /* 19: RESERVED */
4, /* 20: RESERVED */
4, /* 21: RESERVED */
4, /* 22: RESERVED */
4, /* 23: RESERVED */
30, /* 24: Spurious Interrupt */
30, /* 25: Level 1 Interrupt Autovector */
30, /* 26: Level 2 Interrupt Autovector */
30, /* 27: Level 3 Interrupt Autovector */
30, /* 28: Level 4 Interrupt Autovector */
30, /* 29: Level 5 Interrupt Autovector */
30, /* 30: Level 6 Interrupt Autovector */
30, /* 31: Level 7 Interrupt Autovector */
20, /* 32: TRAP #0 */
20, /* 33: TRAP #1 */
20, /* 34: TRAP #2 */
20, /* 35: TRAP #3 */
20, /* 36: TRAP #4 */
20, /* 37: TRAP #5 */
20, /* 38: TRAP #6 */
20, /* 39: TRAP #7 */
20, /* 40: TRAP #8 */
20, /* 41: TRAP #9 */
20, /* 42: TRAP #10 */
20, /* 43: TRAP #11 */
20, /* 44: TRAP #12 */
20, /* 45: TRAP #13 */
20, /* 46: TRAP #14 */
20, /* 47: TRAP #15 */
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
4, /* 49: FP Inexact Result (unemulated) */
4, /* 50: FP Divide by Zero (unemulated) */
4, /* 51: FP Underflow (unemulated) */
4, /* 52: FP Operand Error (unemulated) */
4, /* 53: FP Overflow (unemulated) */
4, /* 54: FP Signaling NAN (unemulated) */
4, /* 55: FP Unimplemented Data Type (unemulated) */
4, /* 56: MMU Configuration Error (unemulated) */
4, /* 57: MMU Illegal Operation Error (unemulated) */
4, /* 58: MMU Access Level Violation Error (unemulated) */
4, /* 59: RESERVED */
4, /* 60: RESERVED */
4, /* 61: RESERVED */
4, /* 62: RESERVED */
4, /* 63: RESERVED */
/* 64-255: User Defined */
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
}
};
uint8 m68ki_ea_idx_cycle_table[64] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, /* ..01.000 no memory indirect, base NULL */
5, /* ..01..01 memory indirect, base NULL, outer NULL */
7, /* ..01..10 memory indirect, base NULL, outer 16 */
7, /* ..01..11 memory indirect, base NULL, outer 32 */
0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7,
2, /* ..10.000 no memory indirect, base 16 */
7, /* ..10..01 memory indirect, base 16, outer NULL */
9, /* ..10..10 memory indirect, base 16, outer 16 */
9, /* ..10..11 memory indirect, base 16, outer 32 */
0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9,
6, /* ..11.000 no memory indirect, base 32 */
11, /* ..11..01 memory indirect, base 32, outer NULL */
13, /* ..11..10 memory indirect, base 32, outer 16 */
13, /* ..11..11 memory indirect, base 32, outer 32 */
0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13
};
/* ======================================================================== */
/* =============================== CALLBACKS ============================== */
/* ======================================================================== */
/* Default callbacks used if the callback hasn't been set yet, or if the
* callback is set to NULL
*/
/* Interrupt acknowledge */
static int default_int_ack_callback_data;
static int default_int_ack_callback(int int_level)
{
default_int_ack_callback_data = int_level;
CPU_INT_LEVEL = 0;
return M68K_INT_ACK_AUTOVECTOR;
}
/* Breakpoint acknowledge */
static unsigned int default_bkpt_ack_callback_data;
static void default_bkpt_ack_callback(unsigned int data)
{
default_bkpt_ack_callback_data = data;
}
/* Called when a reset instruction is executed */
static void default_reset_instr_callback(void)
{
}
/* Called when the program counter changed by a large value */
static unsigned int default_pc_changed_callback_data;
static void default_pc_changed_callback(unsigned int new_pc)
{
default_pc_changed_callback_data = new_pc;
}
/* Called every time there's bus activity (read/write to/from memory */
static unsigned int default_set_fc_callback_data;
static void default_set_fc_callback(unsigned int new_fc)
{
default_set_fc_callback_data = new_fc;
}
/* Called every instruction cycle prior to execution */
static void default_instr_hook_callback(void)
{
}
/* ======================================================================== */
/* ================================= API ================================== */
/* ======================================================================== */
/* Access the internals of the CPU */
unsigned int m68k_get_reg(void* context, m68k_register_t regnum)
{
m68ki_cpu_core* cpu = context != NULL ?(m68ki_cpu_core*)context : &m68ki_cpu;
switch(regnum)
{
case M68K_REG_D0: return cpu->dar[0];
case M68K_REG_D1: return cpu->dar[1];
case M68K_REG_D2: return cpu->dar[2];
case M68K_REG_D3: return cpu->dar[3];
case M68K_REG_D4: return cpu->dar[4];
case M68K_REG_D5: return cpu->dar[5];
case M68K_REG_D6: return cpu->dar[6];
case M68K_REG_D7: return cpu->dar[7];
case M68K_REG_A0: return cpu->dar[8];
case M68K_REG_A1: return cpu->dar[9];
case M68K_REG_A2: return cpu->dar[10];
case M68K_REG_A3: return cpu->dar[11];
case M68K_REG_A4: return cpu->dar[12];
case M68K_REG_A5: return cpu->dar[13];
case M68K_REG_A6: return cpu->dar[14];
case M68K_REG_A7: return cpu->dar[15];
case M68K_REG_PC: return MASK_OUT_ABOVE_32(cpu->pc);
case M68K_REG_SR: return cpu->t1_flag |
cpu->t0_flag |
(cpu->s_flag << 11) |
(cpu->m_flag << 11) |
cpu->int_mask |
((cpu->x_flag & XFLAG_SET) >> 4) |
((cpu->n_flag & NFLAG_SET) >> 4) |
((!cpu->not_z_flag) << 2) |
((cpu->v_flag & VFLAG_SET) >> 6) |
((cpu->c_flag & CFLAG_SET) >> 8);
case M68K_REG_SP: return cpu->dar[15];
case M68K_REG_USP: return cpu->s_flag ? cpu->sp[0] : cpu->dar[15];
case M68K_REG_ISP: return cpu->s_flag && !cpu->m_flag ? cpu->dar[15] : cpu->sp[4];
case M68K_REG_MSP: return cpu->s_flag && cpu->m_flag ? cpu->dar[15] : cpu->sp[6];
case M68K_REG_SFC: return cpu->sfc;
case M68K_REG_DFC: return cpu->dfc;
case M68K_REG_VBR: return cpu->vbr;
case M68K_REG_CACR: return cpu->cacr;
case M68K_REG_CAAR: return cpu->caar;
case M68K_REG_PREF_ADDR: return cpu->pref_addr;
case M68K_REG_PREF_DATA: return cpu->pref_data;
case M68K_REG_PPC: return MASK_OUT_ABOVE_32(cpu->ppc);
case M68K_REG_IR: return cpu->ir;
case M68K_REG_CPU_TYPE:
switch(cpu->cpu_type)
{
case CPU_TYPE_000: return (unsigned int)M68K_CPU_TYPE_68000;
case CPU_TYPE_010: return (unsigned int)M68K_CPU_TYPE_68010;
case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020;
case CPU_TYPE_020: return (unsigned int)M68K_CPU_TYPE_68020;
}
return M68K_CPU_TYPE_INVALID;
default: return 0;
}
return 0;
}
void m68k_set_reg(m68k_register_t regnum, unsigned int value)
{
switch(regnum)
{
case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return;
case M68K_REG_SR: m68ki_set_sr(value); return;
case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_USP: if(FLAG_S)
REG_USP = MASK_OUT_ABOVE_32(value);
else
REG_SP = MASK_OUT_ABOVE_32(value);
return;
case M68K_REG_ISP: if(FLAG_S && !FLAG_M)
REG_SP = MASK_OUT_ABOVE_32(value);
else
REG_ISP = MASK_OUT_ABOVE_32(value);
return;
case M68K_REG_MSP: if(FLAG_S && FLAG_M)
REG_SP = MASK_OUT_ABOVE_32(value);
else
REG_MSP = MASK_OUT_ABOVE_32(value);
return;
case M68K_REG_VBR: REG_VBR = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_SFC: REG_SFC = value & 7; return;
case M68K_REG_DFC: REG_DFC = value & 7; return;
case M68K_REG_CACR: REG_CACR = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_CAAR: REG_CAAR = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_PPC: REG_PPC = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return;
case M68K_REG_CPU_TYPE: m68k_set_cpu_type(value); return;
default: return;
}
}
/* Set the callbacks */
void m68k_set_int_ack_callback(int (*callback)(int int_level))
{
CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback;
}
void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data))
{
CALLBACK_BKPT_ACK = callback ? callback : default_bkpt_ack_callback;
}
void m68k_set_reset_instr_callback(void (*callback)(void))
{
CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback;
}
void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc))
{
CALLBACK_PC_CHANGED = callback ? callback : default_pc_changed_callback;
}
void m68k_set_fc_callback(void (*callback)(unsigned int new_fc))
{
CALLBACK_SET_FC = callback ? callback : default_set_fc_callback;
}
void m68k_set_instr_hook_callback(void (*callback)(void))
{
CALLBACK_INSTR_HOOK = callback ? callback : default_instr_hook_callback;
}
#include <stdio.h>
/* Set the CPU type. */
void m68k_set_cpu_type(unsigned int cpu_type)
{
switch(cpu_type)
{
case M68K_CPU_TYPE_68000:
CPU_TYPE = CPU_TYPE_000;
CPU_ADDRESS_MASK = 0x00ffffff;
CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
CYC_INSTRUCTION = m68ki_cycles[0];
CYC_EXCEPTION = m68ki_exception_cycle_table[0];
CYC_BCC_NOTAKE_B = -2;
CYC_BCC_NOTAKE_W = 2;
CYC_DBCC_F_NOEXP = -2;
CYC_DBCC_F_EXP = 2;
CYC_SCC_R_FALSE = 2;
CYC_MOVEM_W = 2;
CYC_MOVEM_L = 3;
CYC_SHIFT = 1;
CYC_RESET = 132;
return;
case M68K_CPU_TYPE_68010:
CPU_TYPE = CPU_TYPE_010;
CPU_ADDRESS_MASK = 0x00ffffff;
CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
CYC_INSTRUCTION = m68ki_cycles[1];
CYC_EXCEPTION = m68ki_exception_cycle_table[1];
CYC_BCC_NOTAKE_B = -4;
CYC_BCC_NOTAKE_W = 0;
CYC_DBCC_F_NOEXP = 0;
CYC_DBCC_F_EXP = 6;
CYC_SCC_R_FALSE = 0;
CYC_MOVEM_W = 2;
CYC_MOVEM_L = 3;
CYC_SHIFT = 1;
CYC_RESET = 130;
return;
case M68K_CPU_TYPE_68EC020:
CPU_TYPE = CPU_TYPE_EC020;
CPU_ADDRESS_MASK = 0x00ffffff;
CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
CYC_INSTRUCTION = m68ki_cycles[2];
CYC_EXCEPTION = m68ki_exception_cycle_table[2];
CYC_BCC_NOTAKE_B = -2;
CYC_BCC_NOTAKE_W = 0;
CYC_DBCC_F_NOEXP = 0;
CYC_DBCC_F_EXP = 4;
CYC_SCC_R_FALSE = 0;
CYC_MOVEM_W = 2;
CYC_MOVEM_L = 2;
CYC_SHIFT = 0;
CYC_RESET = 518;
return;
case M68K_CPU_TYPE_68020:
CPU_TYPE = CPU_TYPE_020;
CPU_ADDRESS_MASK = 0xffffffff;
CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
CYC_INSTRUCTION = m68ki_cycles[2];
CYC_EXCEPTION = m68ki_exception_cycle_table[2];
CYC_BCC_NOTAKE_B = -2;
CYC_BCC_NOTAKE_W = 0;
CYC_DBCC_F_NOEXP = 0;
CYC_DBCC_F_EXP = 4;
CYC_SCC_R_FALSE = 0;
CYC_MOVEM_W = 2;
CYC_MOVEM_L = 2;
CYC_SHIFT = 0;
CYC_RESET = 518;
return;
}
}
/* Execute some instructions until we use up num_cycles clock cycles */
/* ASG: removed per-instruction interrupt checks */
int m68k_execute(int num_cycles)
{
/* Make sure we're not stopped */
if(!CPU_STOPPED)
{
/* Set our pool of clock cycles available */
SET_CYCLES(num_cycles);
m68ki_initial_cycles = num_cycles;
/* ASG: update cycles */
USE_CYCLES(CPU_INT_CYCLES);
CPU_INT_CYCLES = 0;
/* Return point if we had an address error */
m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */
/* Main loop. Keep going until we run out of clock cycles */
do
{
/* Set tracing accodring to T1. (T0 is done inside instruction) */
m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
/* Set the address space for reads */
m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */
/* Call external hook to peek at CPU */
m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */
/* Record previous program counter */
REG_PPC = REG_PC;
/* Read an instruction and call its handler */
REG_IR = m68ki_read_imm_16();
m68ki_instruction_jump_table[REG_IR]();
USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
/* Trace m68k_exception, if necessary */
m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
} while(GET_CYCLES() > 0);
/* set previous PC to current PC for the next entry into the loop */
REG_PPC = REG_PC;
/* ASG: update cycles */
USE_CYCLES(CPU_INT_CYCLES);
CPU_INT_CYCLES = 0;
/* return how many clocks we used */
return m68ki_initial_cycles - GET_CYCLES();
}
/* We get here if the CPU is stopped or halted */
SET_CYCLES(0);
CPU_INT_CYCLES = 0;
return num_cycles;
}
int m68k_cycles_run(void)
{
return m68ki_initial_cycles - GET_CYCLES();
}
int m68k_cycles_remaining(void)
{
return GET_CYCLES();
}
/* Change the timeslice */
void m68k_modify_timeslice(int cycles)
{
m68ki_initial_cycles += cycles;
ADD_CYCLES(cycles);
}
void m68k_end_timeslice(void)
{
m68ki_initial_cycles = GET_CYCLES();
SET_CYCLES(0);
}
/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
/* KS: Modified so that IPL* bits match with mask positions in the SR
* and cleaned out remenants of the interrupt controller.
*/
void m68k_set_irq(unsigned int int_level)
{
uint old_level = CPU_INT_LEVEL;
CPU_INT_LEVEL = int_level << 8;
/* A transition from < 7 to 7 always interrupts (NMI) */
/* Note: Level 7 can also level trigger like a normal IRQ */
if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700)
m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */
else
m68ki_check_interrupts(); /* Level triggered (IRQ) */
}
/* Pulse the RESET line on the CPU */
void m68k_pulse_reset(void)
{
static uint emulation_initialized = 0;
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
{
m68ki_build_opcode_table();
m68k_set_int_ack_callback(NULL);
m68k_set_bkpt_ack_callback(NULL);
m68k_set_reset_instr_callback(NULL);
m68k_set_pc_changed_callback(NULL);
m68k_set_fc_callback(NULL);
m68k_set_instr_hook_callback(NULL);
emulation_initialized = 1;
}
if(CPU_TYPE == 0) /* KW 990319 */
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
/* Clear all stop levels and eat up all remaining cycles */
CPU_STOPPED = 0;
SET_CYCLES(0);
/* Turn off tracing */
FLAG_T1 = FLAG_T0 = 0;
m68ki_clear_trace();
/* Interrupt mask to level 7 */
FLAG_INT_MASK = 0x0700;
/* Reset VBR */
REG_VBR = 0;
/* Go to supervisor mode */
m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
/* Invalidate the prefetch queue */
#if M68K_EMULATE_PREFETCH
/* Set to arbitrary number since our first fetch is from 0 */
CPU_PREF_ADDR = 0x1000;
#endif /* M68K_EMULATE_PREFETCH */
/* Read the initial stack pointer and program counter */
m68ki_jump(0);
REG_SP = m68ki_read_imm_32();
REG_PC = m68ki_read_imm_32();
m68ki_jump(REG_PC);
}
/* Pulse the HALT line on the CPU */
void m68k_pulse_halt(void)
{
CPU_STOPPED |= STOP_LEVEL_HALT;
}
/* Get and set the current CPU context */
/* This is to allow for multiple CPUs */
unsigned int m68k_context_size()
{
return sizeof(m68ki_cpu_core);
}
unsigned int m68k_get_context(void* dst)
{
if(dst) *(m68ki_cpu_core*)dst = m68ki_cpu;
return sizeof(m68ki_cpu_core);
}
void m68k_set_context(void* src)
{
if(src) m68ki_cpu = *(m68ki_cpu_core*)src;
}
void m68k_save_context( void (*save_value)(char*, unsigned int))
{
if(!save_value)
return;
save_value("CPU_TYPE" , m68k_get_reg(NULL, M68K_REG_CPU_TYPE));
save_value("D0" , REG_D[0]);
save_value("D1" , REG_D[1]);
save_value("D2" , REG_D[2]);
save_value("D3" , REG_D[3]);
save_value("D4" , REG_D[4]);
save_value("D5" , REG_D[5]);
save_value("D6" , REG_D[6]);
save_value("D7" , REG_D[7]);
save_value("A0" , REG_A[0]);
save_value("A1" , REG_A[1]);
save_value("A2" , REG_A[2]);
save_value("A3" , REG_A[3]);
save_value("A4" , REG_A[4]);
save_value("A5" , REG_A[5]);
save_value("A6" , REG_A[6]);
save_value("A7" , REG_A[7]);
save_value("PPC" , REG_PPC);
save_value("PC" , REG_PC);
save_value("USP" , REG_USP);
save_value("ISP" , REG_ISP);
save_value("MSP" , REG_MSP);
save_value("VBR" , REG_VBR);
save_value("SFC" , REG_SFC);
save_value("DFC" , REG_DFC);
save_value("CACR" , REG_CACR);
save_value("CAAR" , REG_CAAR);
save_value("SR" , m68ki_get_sr());
save_value("INT_LEVEL" , CPU_INT_LEVEL);
save_value("INT_CYCLES", CPU_INT_CYCLES);
save_value("STOPPED" , (CPU_STOPPED & STOP_LEVEL_STOP) != 0);
save_value("HALTED" , (CPU_STOPPED & STOP_LEVEL_HALT) != 0);
save_value("PREF_ADDR" , CPU_PREF_ADDR);
save_value("PREF_DATA" , CPU_PREF_DATA);
}
void m68k_load_context(unsigned int (*load_value)(char*))
{
unsigned int temp;
m68k_set_cpu_type(load_value("CPU_TYPE"));
REG_PPC = load_value("PPC");
REG_PC = load_value("PC");
m68ki_jump(REG_PC);
CPU_INT_LEVEL = 0;
m68ki_set_sr_noint(load_value("SR"));
REG_D[0] = load_value("D0");
REG_D[1] = load_value("D1");
REG_D[2] = load_value("D2");
REG_D[3] = load_value("D3");
REG_D[4] = load_value("D4");
REG_D[5] = load_value("D5");
REG_D[6] = load_value("D6");
REG_D[7] = load_value("D7");
REG_A[0] = load_value("A0");
REG_A[1] = load_value("A1");
REG_A[2] = load_value("A2");
REG_A[3] = load_value("A3");
REG_A[4] = load_value("A4");
REG_A[5] = load_value("A5");
REG_A[6] = load_value("A6");
REG_A[7] = load_value("A7");
REG_USP = load_value("USP");
REG_ISP = load_value("ISP");
REG_MSP = load_value("MSP");
REG_VBR = load_value("VBR");
REG_SFC = load_value("SFC");
REG_DFC = load_value("DFC");
REG_CACR = load_value("CACR");
REG_CAAR = load_value("CAAR");
CPU_INT_LEVEL = load_value("INT_LEVEL");
CPU_INT_CYCLES = load_value("INT_CYCLES");
CPU_STOPPED = 0;
temp = load_value("STOPPED");
if(temp) CPU_STOPPED |= STOP_LEVEL_STOP;
temp = load_value("HALTED");
if(temp) CPU_STOPPED |= STOP_LEVEL_HALT;
CPU_PREF_ADDR = load_value("PREF_ADDR");
CPU_PREF_DATA = load_value("PREF_DATA");
}
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */

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#ifndef _MACROS_H_
#define _MACROS_H_
#ifdef LSB_FIRST
#define READ_BYTE(BASE, ADDR) (BASE)[(ADDR)^1]
#define READ_WORD(BASE, ADDR) (((BASE)[ADDR]<<8) | \
(BASE)[(ADDR)+1])
#define READ_WORD_LONG(BASE, ADDR) (((BASE)[ADDR]<<24) | \
((BASE)[(ADDR)+1]<<16) | \
((BASE)[(ADDR)+2]<<8) | \
(BASE)[(ADDR)+3])
#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[(ADDR)^1] = (VAL)&0xff
#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>8) & 0xff; \
(BASE)[(ADDR)+1] = (VAL)&0xff
#define WRITE_WORD_LONG(BASE, ADDR, VAL) (BASE)[(ADDR] = ((VAL)>>24) & 0xff; \
(BASE)[(ADDR)+1] = ((VAL)>>16)&0xff; \
(BASE)[(ADDR)+2] = ((VAL)>>8)&0xff; \
(BASE)[(ADDR)+3] = (VAL)&0xff
#else
#define READ_BYTE(BASE, ADDR) (BASE)[ADDR]
#define READ_WORD(BASE, ADDR) *(uint16 *)((BASE) + (ADDR));
#define READ_WORD_LONG(BASE, ADDR) *(uint32 *)((BASE) + (ADDR));
#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[ADDR] = VAL & 0xff
#define WRITE_WORD(BASE, ADDR, VAL) *(uint16 *)((BASE) + (ADDR)) = VAL & 0xffff
#define WRITE_WORD_LONG(BASE, ADDR, VAL) *(uint32 *)((BASE) + (ADDR)) = VAL & 0xffffffff
#endif
#endif /* _MACROS_H_ */

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#include "shared.h"
static uint16 next_int = 1;
static uint8 prot_bytes[2]; /* simple protection faking (from Picodrive) */
unsigned int m68k_read_bus_8(unsigned int address)
{
uint16 temp = m68k_read_bus_16(address);
return ((address & 1) ? (temp & 0xFF) : (temp >> 8));
}
unsigned int m68k_read_bus_16(unsigned int address)
{
next_int ^= 0xFFFF;
return next_int;
}
void m68k_unused_w (unsigned int address, unsigned int value)
{
error("Unused 3 %08X = %08X \n", address, value);
}
void m68k_unused_8_w (unsigned int address, unsigned int value)
{
error("Unused 2 %08X = %02X \n", address, value);
}
void m68k_unused_16_w (unsigned int address, unsigned int value)
{
error("Unused 1 %08X = %04X \n", address, value);
}
/*
Functions to handle memory accesses which cause the Genesis to halt
either temporarily (press RESET button to restart) or unrecoverably
(cycle power to restart).
*/
void m68k_lockup_w_8 (unsigned int address, unsigned int value)
{
error ("Lockup %08X = %02X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
gen_running = 0;
m68k_end_timeslice ();
}
void m68k_lockup_w_16 (unsigned int address, unsigned int value)
{
error ("Lockup %08X = %04X (%08X)\n", address, value, m68k_get_reg (NULL, M68K_REG_PC));
gen_running = 0;
m68k_end_timeslice ();
}
unsigned int m68k_lockup_r_8 (unsigned int address)
{
error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
gen_running = 0;
m68k_end_timeslice ();
return -1;
}
unsigned int m68k_lockup_r_16 (unsigned int address)
{
error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
gen_running = 0;
m68k_end_timeslice ();
return -1;
}
/*--------------------------------------------------------------------------*/
/* 68000 memory handlers */
/*--------------------------------------------------------------------------*/
unsigned int m68k_read_memory_8 (unsigned int address)
{
switch ((address >> 21) & 7)
{
case 0: /* ROM Cartridge*/
case 1:
/* SRAM */
if (sram.on)
{
if (address >= sram.start && address <= sram.end)
{
if (sram.custom) return (EEPROM_Read(address)&0xffff);
return READ_BYTE(sram.sram, (address - sram.start) & 0xffff);
}
}
/* ROM data */
if (address < genromsize) return READ_BYTE(cart_rom, address);
/* default */
return 0x00;
case 7: /* RAM */
return READ_BYTE(work_ram, address & 0xFFFF);
case 5: /* Z80 & I/O */
if (address <= 0xA0FFFF) /* Z80 area */
{
/* Z80 controls Z bus */
if (zbusack == 1) return (m68k_read_bus_8 (address));
else
{
/* Read data from Z bus */
switch (address & 0x6000)
{
case 0x0000: /* RAM */
case 0x2000:
return (zram[(address & 0x1FFF)]);
case 0x4000: /* YM2612 */
return (fm_read (address & 3));
case 0x6000: /* Unused */
switch (address & 0xFF00)
{
case 0x7F00: /* VDP */
m68k_lockup_r_8 (address);
default: /* Unused */
return (0xFF);
}
break;
}
}
}
else if (address <= 0xA1001F)
{
/* I/O */
return (io_read((address >> 1) & 0x0F));
}
else if (address <= 0xA1FFFF) /* CONTROL */
{
switch ((address >> 8) & 0xFF)
{
case 0x11: /* BUSACK */
if ((address & 1) == 0) return (gen_busack_r () | (m68k_read_bus_8 (address) & 0xFE));
else return (m68k_read_bus_8 (address));
case 0x00: /* UNKNOWN (BallZ) */
case 0x10: /* MEMORY MODE */
case 0x12: /* RESET */
case 0x20: /* MEGA-CD */
case 0x40: /* TMSS */
case 0x41: /* BOOTROM */
case 0x50: /* SVP REGISTERS */
return (m68k_read_bus_8 (address));
default: /* Unused */
return (m68k_lockup_r_8 (address));
}
}
else
{
/* Unused */
return (m68k_lockup_r_8 (address));
}
break;
case 6: /* VDP */
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1F)
{
case 0x00: /* DATA */
case 0x02:
return (vdp_data_r () >> 8);
case 0x01: /* DATA */
case 0x03:
return (vdp_data_r () & 0xFF);
case 0x04: /* CTRL */
case 0x06:
return ((m68k_read_bus_8 (address) & 0xFC) | (vdp_ctrl_r () >> 8));
case 0x05: /* CTRL */
case 0x07:
return (vdp_ctrl_r () & 0xFF);
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (vdp_hvc_r () >> 8);
case 0x09: /* HVC */
case 0x0B:
case 0x0D:
case 0x0F:
return (vdp_hvc_r () & 0xFF);
case 0x10: /* PSG */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return (m68k_lockup_r_8 (address));
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
return (m68k_read_bus_8 (address));
}
}
else
{
/* Unused */
return (m68k_lockup_r_8 (address));
}
break;
case 2: /* Unused */
/* Some unlicensed games have a simple protection device mapped here */
return prot_bytes[(address>>2)&1];
case 3: /* Unused */
return (m68k_read_bus_8 (address));
case 4: /* Unused */
return (m68k_lockup_r_8 (address));
}
return -1;
}
unsigned int m68k_read_memory_16 (unsigned int address)
{
switch ((address >> 21) & 7)
{
case 0: /* ROM Cartridge */
case 1:
/* SRAM */
if (sram.on)
{
if (address >= sram.start && address <= sram.end)
{
if (sram.custom) return (EEPROM_Read(address) & 0xffff);
return *(uint16 *)(sram.sram + ((address - sram.start) & 0xffff));
}
}
/* ROM Data */
if (address < genromsize) return *(uint16 *)(cart_rom + address);
/* j-CART */
if (j_cart && ((address == 0x3FFFFE) || (address == 0x38FFFE)))
return (gamepad_read(5) | (gamepad_read(6) << 8));
/* Virtua Racing SVP */
if (address == 0x30fe02) return 0x01;
/* default */
return 0x00;
case 7: /* RAM */
return *(uint16 *)(work_ram + (address & 0xffff));
case 5: /* Z80 & I/O */
if (address <= 0xA0FFFF) /* Z80 area */
{
if (zbusack == 1) return (m68k_read_bus_16 (address));
else
{
uint8 temp;
switch (address & 0x6000)
{
case 0x0000: /* RAM */
case 0x2000:
temp = zram[address & 0x1FFF];
return (temp << 8 | temp);
case 0x4000: /* YM2612 */
temp = fm_read (address & 3);
return (temp << 8 | temp);
case 0x6000:
switch (address & 0xFF00)
{
case 0x7F00: /* VDP */
m68k_lockup_r_16 (address);
default: /* Unused */
return (0xFFFF);
}
break;
}
}
}
else if (address <= 0xA1001F) /* I/O */
{
uint8 temp = io_read ((address >> 1) & 0x0F);
return (temp << 8 | temp);
}
else if (address <= 0xA1FFFF) /* CONTROL */
{
switch ((address >> 8) & 0xFF)
{
case 0x11: /* BUSACK */
return ((m68k_read_bus_16 (address) & 0xFEFF) | (gen_busack_r () << 8));
case 0x00: /* UNKNOWN (BallZ) */
case 0x10: /* MEMORY MODE */
case 0x12: /* RESET */
case 0x20: /* MEGA-CD */
case 0x40: /* TMSS */
case 0x41: /* BOOTROM */
case 0x50: /* SVP REGISTERS */
return (m68k_read_bus_16 (address));
default: /* Unused */
return (m68k_lockup_r_16 (address));
}
}
else
{
/* Unused */
return (m68k_lockup_r_16 (address));
}
break;
case 6: /* VDP */
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1F)
{
case 0x00: /* DATA */
case 0x02:
return (vdp_data_r ());
case 0x04: /* CTRL */
case 0x06:
return (vdp_ctrl_r () | (m68k_read_bus_16 (address) & 0xFC00));
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (vdp_hvc_r ());
case 0x10: /* PSG */
case 0x12:
case 0x14:
case 0x16:
return (m68k_lockup_r_16 (address));
case 0x18: /* Unused */
case 0x1A:
case 0x1C:
case 0x1E:
return (m68k_read_bus_16 (address));
}
}
else
{
return (m68k_lockup_r_16 (address));
}
break;
case 2:
case 3:
return (m68k_read_bus_16 (address));
case 4:
return (m68k_lockup_r_16 (address));
}
return (0xA5A5);
}
unsigned int m68k_read_memory_32 (unsigned int address)
{
/* Split into 2 reads */
return (m68k_read_memory_16 (address + 0) << 16 |
m68k_read_memory_16 (address + 2));
}
void m68k_write_memory_8 (unsigned int address, unsigned int value)
{
switch ((address >> 21) & 7)
{
case 7: /* RAM */
WRITE_BYTE(work_ram, address & 0xFFFF, value);
return;
case 6: /* VDP */
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1F)
{
case 0x00: /* DATA */
case 0x01:
case 0x02:
case 0x03:
vdp_data_w (value << 8 | value);
return;
case 0x04: /* CTRL */
case 0x05:
case 0x06:
case 0x07:
vdp_ctrl_w (value << 8 | value);
return;
case 0x08: /* HVC */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
m68k_lockup_w_8 (address, value);
return;
case 0x10: /* PSG */
case 0x12:
case 0x14:
case 0x16:
m68k_unused_8_w (address, value);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write (value);
return;
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
m68k_unused_8_w (address, value);
return;
}
}
else
{
m68k_lockup_w_8 (address, value);
return;
}
case 5: /* Z80 & IO */
if (address <= 0xA0FFFF) /* Z80 area */
{
if (zbusack == 1)
{
m68k_unused_8_w (address, value);
return;
}
else
{
switch (address & 0x6000)
{
case 0x0000:
case 0x2000:
zram[(address & 0x1FFF)] = value;
return;
case 0x4000:
fm_write (address & 3, value);
return;
case 0x6000:
switch (address & 0xFF00)
{
case 0x6000: /* BANK */
gen_bank_w (value & 1);
return;
case 0x7F00: /* VDP */
m68k_lockup_w_8 (address, value);
return;
default: /* Unused */
m68k_unused_8_w (address, value);
return;
}
break;
}
}
}
else if (address <= 0xA1001F) /* I/O */
{
/* I/O chip only gets /LWR */
if (address & 1) io_write ((address >> 1) & 0x0F, value);
return;
}
else if (address <= 0xA1FFFF) /* CONTROL */
{
switch ((address >> 8) & 0xFF)
{
case 0x11: /* BUSREQ */
if ((address & 1) == 0) gen_busreq_w (value & 1);
else m68k_unused_8_w (address, value);
return;
case 0x12: /* RESET */
gen_reset_w (value & 1);
return;
case 0x30: /* TIME */
if (SSF2TNC) ssf2bankrom (address, value & 0xf); /* banked ROM */
else if (address == 0xA130F1) /* banked SRAM */
{
sram.on = value & 1;
sram.write = (value & 2) ? 0 : 1;
}
else m68k_unused_8_w (address, value);
return;
case 0x10: /* MEMORY MODE */
case 0x20: /* MEGA-CD */
case 0x40: /* TMSS */
case 0x41: /* BOOTROM */
case 0x50: /* SVP REGISTERS */
m68k_unused_8_w (address, value);
return;
default:
m68k_lockup_w_8 (address, value);
return;
}
}
else
{
/* Unused */
m68k_lockup_w_8 (address, value);
return;
}
break;
case 0: /* ROM Cartridge */
case 1:
/* external SRAM */
if (sram.on && sram.write)
{
if (address >= sram.start && address <= sram.end)
{
/* serial EEPROM */
if (sram.custom)
{
EEPROM_Write(address, value);
return;
}
/* normal SRAM */
WRITE_BYTE(sram.sram, (address - sram.start) & 0xffff, value & 0xff);
return;
}
}
m68k_unused_8_w (address, value);
return;
case 2: /* Unused */
/* Some unlicensed games have a simple protection device mapped here */
prot_bytes[(address>>2)&1] = value;
return;
case 3:
m68k_unused_8_w (address, value);
return;
case 4: /* Unused */
m68k_lockup_w_8 (address, value);
return;
}
}
void m68k_write_memory_16 (unsigned int address, unsigned int value)
{
switch ((address >> 21) & 7)
{
case 7: /* Work RAM */
*(uint16 *)(work_ram + (address& 0xFFFF)) = value & 0xffff;
return;
case 6: /* VDP */
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1C)
{
case 0x00: /* DATA */
vdp_data_w (value);
return;
case 0x04: /* CTRL */
vdp_ctrl_w (value);
return;
case 0x08: /* HV counter */
case 0x0C: /* HV counter */
m68k_lockup_w_16 (address, value);
return;
case 0x10: /* PSG */
case 0x14: /* PSG */
psg_write (value & 0xFF);
return;
case 0x18: /* Unused */
case 0x1C: /* Unused */
m68k_unused_8_w (address, value);
return;
}
}
else
{
/* Invalid address */
m68k_lockup_w_16 (address, value);
}
break;
case 5: /* Z80 area, I/O chip, miscellaneous. */
if (address <= 0xA0FFFF) /* Z80 area */
{
/* Writes are ignored when the Z80 hogs the Z-bus */
if (zbusack == 1)
{
m68k_unused_8_w (address, value);
return;
}
/* Write into Z80 address space */
switch (address & 0x6000)
{
case 0x0000: /* Work RAM */
case 0x2000: /* Work RAM */
zram[(address & 0x1FFF)] = (value >> 8) & 0xFF;
return;
case 0x4000: /* YM2612 */
fm_write (address & 3, (value >> 8) & 0xFF);
return;
case 0x6000: /* Bank register and VDP */
switch (address & 0x7F00)
{
case 0x6000: /* Bank register */
gen_bank_w ((value >> 8) & 1);
return;
case 0x7F00: /* VDP registers */
m68k_lockup_w_16 (address, value);
return;
default: /* Unused */
m68k_unused_8_w (address, value);
return;
}
break;
}
}
else if (address <= 0xA1001F) /* I/O */
{
io_write ((address >> 1) & 0x0F, value & 0x00FF);
return;
}
else if (address <= 0xA1FFFF) /* CONTROL */
{
switch ((address >> 8) & 0xFF)
{
case 0x11: /* BUSREQ */
gen_busreq_w ((value >> 8) & 1);
return;
case 0x12: /* RESET */
gen_reset_w ((value >> 8) & 1);
return;
case 0x30: /* TIME */
if (SSF2TNC) ssf2bankrom (address, value & 0xf); /* banked ROM */
else if (address == 0xA130F1) /* banked SRAM */
{
sram.on = value & 1;
sram.write = (value & 2) ? 0 : 1;
}
else m68k_unused_16_w (address, value);
return;
case 0x10: /* MEMORY MODE */
case 0x20: /* MEGA-CD */
case 0x40: /* TMSS */
case 0x41: /* BOOTROM */
case 0x50: /* SVP REGISTERS */
m68k_unused_16_w (address, value);
return;
default: /* Unused */
m68k_lockup_w_16 (address, value);
return;
}
}
else
{
m68k_lockup_w_16 (address, value);
return;
}
break;
case 0: /* Cartridge ROM */
case 1:
/* J-CART extension (TH signal) */
if ((address == 0x3FFFFE) || (address == 0x38FFFE))
{
if (!j_cart)
{
j_cart = 1;
input_reset(pad_type);
}
gamepad_write(5, (value&1) <<6 );
gamepad_write(6, (value&1) <<6);
return;
}
/* external SRAM */
if (sram.on && sram.write)
{
if (address >= sram.start && address <= sram.end)
{
/* serial EEPROM */
if (sram.custom)
{
EEPROM_Write(address, value);
return;
}
/* normal SRAM */
*(uint16 *)(sram.sram + ((address - sram.start) & 0xffff)) = value & 0xffff;
return;
}
}
m68k_unused_16_w (address, value);
return;
case 2: /* Unused */
case 3:
m68k_unused_16_w (address, value);
return;
case 4: /* Unused */
m68k_lockup_w_16 (address, value);
return;
}
}
void m68k_write_memory_32 (unsigned int address, unsigned int value)
{
/* Split into 2 writes */
m68k_write_memory_16 (address, (value >> 16) & 0xFFFF);
m68k_write_memory_16 (address + 2, value & 0xFFFF);
}

14
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#ifndef _MEM68K_H_
#define _MEM68K_H_
/* Function prototypes */
unsigned int m68k_read_bus_8 (unsigned int address);
unsigned int m68k_read_bus_16 (unsigned int address);
void m68k_unused_w (unsigned int address, unsigned int value);
void m68k_lockup_w_8 (unsigned int address, unsigned int value);
void m68k_lockup_w_16 (unsigned int address, unsigned int value);
unsigned int m68k_lockup_r_8 (unsigned int address);
unsigned int m68k_lockup_r_16 (unsigned int address);
#endif /* _MEM68K_H_ */

296
genplus-gx/source/membnk.c Normal file
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/*
membnk.c --
Memory handlers Z80 access to the banked V-bus address space.
*/
#include "shared.h"
void z80_write_banked_memory(unsigned int address, unsigned int data)
{
switch ((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
z80bank_unused_w (address, data);
return;
case 2: /* Unused */
case 3:
z80bank_unused_w (address, data);
return;
case 4: /* Unused (lockup) */
z80bank_lockup_w (address, data);
return;
case 5: /* Z80, I/O chip, etc. */
if (address <= 0xA0FFFF)
{
z80bank_lockup_w (address, data);
return;
}
else
{
switch ((address >> 8) & 0xFF)
{
case 0x00: /* I/O chip */
if(address <= 0xA1001F) io_write((address >> 1) & 0x0F, data);
else z80bank_unused_w (address, data);
return;
case 0x11: /* /BUSREQ */
if (address & 1) z80bank_unused_w (address, data);
else gen_busreq_w (data & 1);
return;
case 0x12: /* /RESET (w) */
if (address & 1) z80bank_unused_w (address, data);
else gen_reset_w (data & 1);
return;
case 0x10: /* MEMORY MODE */
case 0x13: /* TIME */
case 0x20: /* ? */
case 0x30: /* ? */
z80bank_unused_w (address, data);
return;
default: /* Invalid */
z80bank_lockup_w (address, data);
return;
}
}
return;
case 6: /* VDP */
z80bank_vdp_w (address, data);
return;
case 7: /* Work RAM */
WRITE_BYTE(work_ram, address & 0xFFFF, data);
return;
}
}
int z80_read_banked_memory(unsigned int address)
{
switch ((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
return READ_BYTE(cart_rom, address);
case 2: /* Unused */
case 3:
return z80bank_unused_r (address);
case 4: /* Unused (lockup) */
return z80bank_lockup_r (address);
case 5: /* Z80, I/O chip, etc. */
if (address <= 0xA0FFFF) return z80bank_lockup_r (address);
else
{
switch ((address >> 8) & 0xFF)
{
case 0x00: /* I/O chip */
if (address <= 0xA1001F) return io_read((address >> 1) & 0x0F);
else return z80bank_unused_r (address);
break;
case 0x11: /* /BUSACK from Z80 */
/* The Z80 can't read this bit (it would be halted
when the bit was zero) so we always return '1'. */
return 0xFF;
case 0x10: /* Unused */
case 0x12: /* Unused */
case 0x13: /* /TIME region */
case 0x20: /* Unused */
case 0x30: /* Unused */
return z80bank_unused_r (address);
default: /* Lockup */
return z80bank_lockup_r (address);
}
}
break;
case 6: /* VDP */
return z80bank_vdp_r (address);
case 7: /* Work RAM - can't be read on some Genesis models (!) */
return 0xFF;
}
return (-1);
}
void z80bank_vdp_w(int address, int data)
{
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1F)
{
case 0x00: /* Data port */
case 0x01:
case 0x02:
case 0x03:
vdp_data_w (data << 8 | data);
return;
case 0x04: /* Control port */
case 0x05:
case 0x06:
case 0x07:
vdp_ctrl_w (data << 8 | data);
return;
case 0x08: /* Lockup (HVC) */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
z80bank_lockup_w (address, data);
return;
case 0x10: /* Unused */
case 0x12:
case 0x14:
case 0x16:
z80bank_unused_w (address, data);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write (data);
return;
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
z80bank_unused_w (address, data);
return;
case 0x1C: /* Test register */
case 0x1D:
case 0x1E:
case 0x1F:
vdp_test_w (data << 8 | data);
return;
}
}
else
{
/* Invalid VDP address */
z80bank_lockup_w (address, data);
return;
}
}
int z80bank_vdp_r(int address)
{
if ((address & 0xE700E0) == 0xC00000)
{
switch (address & 0x1F)
{
case 0x00: /* Data */
case 0x02:
return (vdp_data_r () >> 8) & 0xFF;
case 0x01: /* Data */
case 0x03:
return vdp_data_r () & 0xFF;
case 0x04: /* Control */
case 0x06:
return (0xFC | (vdp_ctrl_r () >> 8)) & 0xFF;
case 0x05: /* Control */
case 0x07:
return vdp_ctrl_r () & 0xFF;
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (vdp_hvc_r () >> 8) & 0xFF;
case 0x09: /* HVC */
case 0x0B:
case 0x0D:
case 0x0F:
return vdp_hvc_r () & 0xFF;
case 0x10: /* Lockup */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return z80bank_lockup_r (address);
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
return (z80bank_unused_r (address) | 0xFF);
}
}
else
{
/* Invalid VDP address */
return z80bank_lockup_r (address);
}
return 0xFF;
}
/*
Handlers for access to unused addresses and those which make the
machine lock up.
*/
void z80bank_unused_w(int address, int data)
{
error("Z80 bank unused write %06X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
}
int z80bank_unused_r(int address)
{
error ("Z80 bank unused read %06X (%04X)\n", address, z80_get_reg (Z80_PC));
return (address & 1) ? 0x00 : 0xFF;
}
void z80bank_lockup_w(int address, int data)
{
error("Z80 bank lockup write %06X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
gen_running = 0;
z80_end_timeslice ();
}
int z80bank_lockup_r(int address)
{
error ("Z80 bank lockup read %06X (%04X)\n", address, z80_get_reg (Z80_PC));
gen_running = 0;
z80_end_timeslice ();
return 0xFF;
}

15
genplus-gx/source/membnk.h Normal file
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#ifndef _MEMBNK_H_
#define _MEMBNK_H_
/* Function prototypes */
void z80_write_banked_memory (unsigned int address, unsigned int data);
int z80_read_banked_memory (unsigned int address);
void z80bank_vdp_w (int address, int data);
int z80bank_vdp_r (int address);
void z80bank_unused_w (int address, int data);
int z80bank_unused_r (int address);
void z80bank_lockup_w (int address, int data);
int z80bank_lockup_r (int address);
#endif /* _MEMBNK_H_ */

48
genplus-gx/source/memvdp.c Normal file
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/*
memvdp.c --
Memory handlers for when the VDP reads the V-bus during DMA.
*/
#include "shared.h"
unsigned int vdp_dma_r(unsigned int address)
{
switch ((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
return *(uint16 *)(cart_rom + address);
case 2: /* Unused */
case 3:
return 0xFF00;
case 4: /* Work RAM */
case 6:
case 7:
return *(uint16 *)(work_ram + (address & 0xffff));
case 5: /* Z80 area and I/O chip */
/* Z80 area always returns $FFFF */
if (address <= 0xA0FFFF)
{
/* Return $FFFF only when the Z80 isn't hogging the Z-bus.
(e.g. Z80 isn't reset and 68000 has the bus) */
return (zbusack == 0) ? 0xFFFF : *(uint16 *)(work_ram + (address & 0xffff));
}
/* The I/O chip and work RAM try to drive the data bus which
results in both values being combined in random ways when read.
We return the I/O chip values which seem to have precedence, */
else if (address <= 0xA1001F)
{
uint8 temp = io_read((address >> 1) & 0x0F);
return (temp << 8 | temp);
}
/* All remaining locations access work RAM */
else return *(uint16 *)(work_ram + (address & 0xffff));
}
return -1;
}

8
genplus-gx/source/memvdp.h Normal file
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#ifndef _MEMVDP_H_
#define _MEMVDP_H_
/* Function prototypes */
unsigned int vdp_dma_r (unsigned int address);
#endif /* _MEMVDP_H_ */

246
genplus-gx/source/memz80.c Normal file
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/*
memz80.c --
Memory handlers for Z80 memory and port access, and the Z80 to
VDP interface.
*/
#define LOG_PORT 0 /* 1= Log Z80 I/O port accesses */
#include "shared.h"
unsigned int cpu_readmem16(unsigned int address)
{
switch ((address >> 13) & 7)
{
case 0: /* Work RAM */
case 1:
return zram[address & 0x1FFF];
case 2: /* YM2612 */
return fm_read (address & 3);
case 3: /* VDP */
if ((address & 0xFF00) == 0x7F00) return z80_vdp_r (address);
return 0xFF;
default: /* V-bus bank */
return z80_read_banked_memory (zbank | (address & 0x7FFF));
}
return 0xFF;
}
void cpu_writemem16(unsigned int address, unsigned int data)
{
switch ((address >> 13) & 7)
{
case 0: /* Work RAM */
case 1:
zram[address & 0x1FFF] = data;
return;
case 2: /* YM2612 */
fm_write (address & 3, data);
return;
case 3: /* Bank register and VDP */
switch (address & 0xFF00)
{
case 0x6000:
gen_bank_w (data & 1);
return;
case 0x7F00:
z80_vdp_w (address, data);
return;
default:
z80_unused_w (address, data);
return;
}
return;
default: /* V-bus bank */
z80_write_banked_memory (zbank | (address & 0x7FFF), data);
return;
}
}
int z80_vdp_r(int address)
{
switch (address & 0xFF)
{
case 0x00: /* VDP data port */
case 0x02:
return (vdp_data_r () >> 8) & 0xFF;
case 0x01: /* VDP data port */
case 0x03:
return (vdp_data_r () & 0xFF);
case 0x04: /* VDP control port */
case 0x06:
return (0xFF | ((vdp_ctrl_r () >> 8) & 3));
case 0x05: /* VDP control port */
case 0x07:
return (vdp_ctrl_r () & 0xFF);
case 0x08: /* HV counter */
case 0x0A:
case 0x0C:
case 0x0E:
return (vdp_hvc_r () >> 8) & 0xFF;
case 0x09: /* HV counter */
case 0x0B:
case 0x0D:
case 0x0F:
return (vdp_hvc_r () & 0xFF);
case 0x10: /* Unused (PSG) */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return z80_lockup_r (address);
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
return z80_unused_r (address);
case 0x1C: /* Unused (test register) */
case 0x1D:
case 0x1E:
case 0x1F:
return z80_unused_r (address);
default: /* Invalid VDP addresses */
return z80_lockup_r (address);
}
return 0xFF;
}
void z80_vdp_w(int address, int data)
{
switch (address & 0xFF)
{
case 0x00: /* VDP data port */
case 0x01:
case 0x02:
case 0x03:
vdp_data_w (data << 8 | data);
return;
case 0x04: /* VDP control port */
case 0x05:
case 0x06:
case 0x07:
vdp_ctrl_w (data << 8 | data);
return;
case 0x08: /* Unused (HV counter) */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
z80_lockup_w (address, data);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write (data);
return;
case 0x10: /* Unused */
case 0x12:
case 0x14:
case 0x16:
case 0x18:
case 0x19:
case 0x1A:
case 0x1B:
z80_unused_w (address, data);
return;
case 0x1C: /* Test register */
case 0x1D:
case 0x1E:
case 0x1F:
vdp_test_w (data << 8 | data);
return;
default: /* Invalid VDP addresses */
z80_lockup_w (address, data);
return;
}
}
/*
Port handlers. Ports are unused when not in Mark III compatability mode.
Games that access ports anyway:
- Thunder Force IV reads port $BF in it's interrupt handler.
*/
unsigned int cpu_readport16(unsigned int port)
{
#if LOG_PORT
error ("Z80 read port %04X (%04X)\n", port, z80_get_reg (Z80_PC));
#endif
return 0xFF;
}
void cpu_writeport16(unsigned int port, unsigned int data)
{
#if LOG_PORT
error("Z80 write %02X to port %04X (%04X)\n", data, port, z80_get_reg(Z80_PC));
#endif
}
/*
Handlers for access to unused addresses and those which make the
machine lock up.
*/
void z80_unused_w(int address, int data)
{
error("Z80 unused write %04X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
}
int z80_unused_r(int address)
{
error ("Z80 unused read %04X (%04X)\n", address, z80_get_reg (Z80_PC));
return 0xFF;
}
void z80_lockup_w(int address, int data)
{
error("Z80 lockup write %04X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
gen_running = 0;
z80_end_timeslice ();
}
int z80_lockup_r(int address)
{
error ("Z80 lockup read %04X (%04X)\n", address, z80_get_reg (Z80_PC));
gen_running = 0;
z80_end_timeslice ();
return 0xFF;
}

17
genplus-gx/source/memz80.h Normal file
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#ifndef _MEMZ80_H_
#define _MEMZ80_H_
/* Function prototypes */
unsigned int cpu_readmem16 (unsigned int address);
void cpu_writemem16 (unsigned int address, unsigned int data);
unsigned int cpu_readport16 (unsigned int port);
void cpu_writeport16 (unsigned int port, unsigned int data);
void z80_unused_w (int address, int data);
int z80_unused_r (int address);
void z80_lockup_w (int address, int data);
int z80_lockup_r (int address);
int z80_vdp_r (int address);
void z80_vdp_w (int address, int data);
#endif /* _MEMZ80_H_ */

86
genplus-gx/source/ngc/gcaram.c Normal file
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/****************************************************************************
* Genesis Plus 1.2a
*
* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
***************************************************************************/
#include "shared.h"
#include "gcaram.h"
#define ARAMSTART 0x8000
/**
* Nintendo GameCube ARAM Wrapper for libOGC aram.c
*
* This is an often overlooked area of ~16Mb extra RAM
* It's use in Genesis Plus is to shadow the ROM.
* Actually, only SSF2TNC needs shadowing, but it's always
* Good to know :)
*/
#define ARAM_READ 1
#define ARAM_WRITE 0
/**
* StartARAM
* This simply sets up the call to internal libOGC.
* Passing NULL for array list, and 0 items to allocate.
* Required so libOGC knows to handle any interrupts etc.
*/
void
StartARAM ()
{
AR_Init (NULL, 0);
}
/**
* ARAMPut
*
* Move data from MAIN memory to ARAM
*/
void
ARAMPut (char *src, char *dst, int len)
{
DCFlushRange (src, len);
AR_StartDMA( ARAM_WRITE, (u32)src, (u32)dst, len);
while (AR_GetDMAStatus());
}
/**
* ARAMFetch
*
* This function will move data from ARAM to MAIN memory
*/
void
ARAMFetch (char *dst, char *src, int len)
{
DCInvalidateRange(dst, len);
AR_StartDMA( ARAM_READ, (u32) dst, (u32) src, len);
while (AR_GetDMAStatus());
}
/**
* ShadowROM
* Copy the rom from cart_rom into ARAM
* NB: libOGC appears to use the first 0x4000 bytes.
* As there's plenty left, all ARAM addresses are 0x8000 based.
* Here, the ROM is simply copied in one swift movement :)
*/
void
ShadowROM ()
{
ARAMPut (cart_rom, (void *) ARAMSTART, genromsize);
}

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