mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-27 03:31:49 +01:00
Merge remote-tracking branch 'upstream/master'
This commit is contained in:
Sérgio Benjamim
commit
71065f83bb
4
.gitignore
vendored
4
.gitignore
vendored
@ -1,3 +1,7 @@
|
||||
.vs/
|
||||
Debug/
|
||||
Release/
|
||||
|
||||
psp2/*.o
|
||||
psp2/*.elf
|
||||
psp2/*.velf
|
||||
|
||||
@ -70,6 +70,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
|
||||
|
||||
[Core/SG]
|
||||
---------------
|
||||
* added support for new SMS Power Korean dumps (Star Soldier & Pippols)
|
||||
* added support for SG-1000 II clone hardware (2KB RAM + integrated VDP/PSG chip 315-5066)
|
||||
* fixed SG-1000 internal RAM size (1KB instead of 2KB)
|
||||
* restored SG-1000 Pause button support
|
||||
@ -77,6 +78,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
|
||||
[Core/CPU]
|
||||
---------------
|
||||
* improved 68k auto-vectored interrupts acknowledge cycle timing accuracy (Bubsy background color corruption during cutscenes)
|
||||
* fixed 68k undocumented behaviors for ABCD/SBCD/NBCD instructions (thanks to flamewing for his test ROM)
|
||||
* fixed Z80 interrupt duration (Bomb on Basic City music running too fast)
|
||||
* fixed Z80 SP register initialization on power-on for Master System & Game Gear
|
||||
(Ace of Aces, Shadow Dancer, Ecco the Dolphin, Evander Holyfield Real Deal Boxing)
|
||||
@ -117,6 +119,10 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
|
||||
---------------
|
||||
* rewrote optimized & more accurate PSG core from scratch
|
||||
* removed PSG boost noise feature & added optional high-quality PSG resampling
|
||||
* fixed YM2612 self-feedback regression introduced in 1.7.1
|
||||
* fixed YM2612 one-sample extra delay on operator1 output
|
||||
* fixed YM2612 LFO PM implementation: block & keyscale code should not be modified by LFO (verified on YM2612 die)
|
||||
* fixed YM2612 Timer B overflow handling
|
||||
|
||||
[Gamecube/Wii]
|
||||
---------------
|
||||
|
||||
Binary file not shown.
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|
Before Width: | Height: | Size: 3.2 MiB After Width: | Height: | Size: 3.2 MiB |
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|
Before Width: | Height: | Size: 3.3 MiB After Width: | Height: | Size: 3.3 MiB |
@ -2,7 +2,7 @@
|
||||
* Genesis Plus
|
||||
* SG-1000, Master System & Game Gear cartridge hardware support
|
||||
*
|
||||
* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2007-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
@ -160,13 +160,15 @@ static const rominfo_t game_list[] =
|
||||
{0x2E7166D5, 0, 0, 0, MAPPER_RAM_8K_EXT1, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* The Legend of Kage (TW) */
|
||||
{0xC550B4F0, 0, 0, 0, MAPPER_RAM_8K_EXT1, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* TwinBee (TW) */
|
||||
{0xFC87463C, 0, 0, 0, MAPPER_RAM_8K_EXT1, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Yie Ar Kung-Fu II (TW) */
|
||||
{0xDF7CBFA5, 0, 0, 0, MAPPER_RAM_8K_EXT1, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Pippols (TW) */
|
||||
{0xE0816BB7, 0, 0, 0, MAPPER_RAM_8K_EXT1, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Star Soldier (TW) */
|
||||
{0x69FC1494, 0, 0, 0, MAPPER_RAM_8K_EXT2, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Bomberman Special (TW) */
|
||||
{0xFFC4EE3F, 0, 0, 0, MAPPER_RAM_8K_EXT2, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Magical Kid Wiz (TW) */
|
||||
{0x2E366CCF, 0, 0, 0, MAPPER_RAM_8K_EXT2, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* The Castle (TW) */
|
||||
{0xAAAC12CF, 0, 0, 0, MAPPER_RAM_8K_EXT2, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Rally-X (TW) */
|
||||
{0xD2EDD329, 0, 0, 0, MAPPER_RAM_8K_EXT2, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Road Fighter (TW) */
|
||||
|
||||
/* games requiring 2K internal RAM (SG-1000 II clone hardware) */
|
||||
/* games requiring 2KB internal RAM (SG-1000 II clone hardware) */
|
||||
{0x7F7F009D, 0, 0, 0, MAPPER_NONE, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Circus Charlie (KR) */
|
||||
{0x77DB4704, 0, 0, 0, MAPPER_NONE, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Q*Bert */
|
||||
{0xC5A67B95, 0, 0, 0, MAPPER_NONE, SYSTEM_SGII, REGION_JAPAN_NTSC}, /* Othello Multivision BIOS */
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* Genesis Plus
|
||||
* SG-1000, Master System & Game Gear cartridge hardware support
|
||||
*
|
||||
* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2007-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
|
||||
@ -31,6 +31,8 @@
|
||||
- added proper cycle use on reset
|
||||
- added cycle accurate timings for MUL/DIV instructions (thanks to Jorge Cwik !)
|
||||
- fixed undocumented flags for DIV instructions (Blood Shot)
|
||||
- fixed undocumented behaviors for ABCD/SBCD/NBCD instructions (thanks to flamewing for his test ROM)
|
||||
- improved auto-vectored interrupts acknowledge cycle timing accuracy
|
||||
- added MAIN-CPU & SUB-CPU support for Mega CD emulation
|
||||
|
||||
*/
|
||||
|
||||
@ -143,13 +143,15 @@ static void m68k_op_abcd_8_rr(void)
|
||||
uint src = DY;
|
||||
uint dst = *r_dst;
|
||||
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
||||
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
uint corf = 0;
|
||||
|
||||
if(res > 9)
|
||||
res += 6;
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
||||
FLAG_X = FLAG_C = (res > 0x99) << 8;
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
|
||||
res += corf;
|
||||
FLAG_X = FLAG_C = (res > 0x9f) << 8;
|
||||
if(FLAG_C)
|
||||
res -= 0xa0;
|
||||
|
||||
@ -169,13 +171,15 @@ static void m68k_op_abcd_8_mm_ax7(void)
|
||||
uint ea = EA_A7_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
||||
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
uint corf = 0;
|
||||
|
||||
if(res > 9)
|
||||
res += 6;
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
||||
FLAG_X = FLAG_C = (res > 0x99) << 8;
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
|
||||
res += corf;
|
||||
FLAG_X = FLAG_C = (res > 0x9f) << 8;
|
||||
if(FLAG_C)
|
||||
res -= 0xa0;
|
||||
|
||||
@ -195,13 +199,15 @@ static void m68k_op_abcd_8_mm_ay7(void)
|
||||
uint ea = EA_AX_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
||||
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
uint corf = 0;
|
||||
|
||||
if(res > 9)
|
||||
res += 6;
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
||||
FLAG_X = FLAG_C = (res > 0x99) << 8;
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
|
||||
res += corf;
|
||||
FLAG_X = FLAG_C = (res > 0x9f) << 8;
|
||||
if(FLAG_C)
|
||||
res -= 0xa0;
|
||||
|
||||
@ -221,13 +227,15 @@ static void m68k_op_abcd_8_mm_axy7(void)
|
||||
uint ea = EA_A7_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
||||
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
uint corf = 0;
|
||||
|
||||
if(res > 9)
|
||||
res += 6;
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
||||
FLAG_X = FLAG_C = (res > 0x99) << 8;
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
|
||||
res += corf;
|
||||
FLAG_X = FLAG_C = (res > 0x9f) << 8;
|
||||
if(FLAG_C)
|
||||
res -= 0xa0;
|
||||
|
||||
@ -247,13 +255,15 @@ static void m68k_op_abcd_8_mm(void)
|
||||
uint ea = EA_AX_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
||||
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
uint corf = 0;
|
||||
|
||||
if(res > 9)
|
||||
res += 6;
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
||||
FLAG_X = FLAG_C = (res > 0x99) << 8;
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
|
||||
res += corf;
|
||||
FLAG_X = FLAG_C = (res > 0x9f) << 8;
|
||||
if(FLAG_C)
|
||||
res -= 0xa0;
|
||||
|
||||
@ -15846,32 +15856,33 @@ static void m68k_op_nbcd_8_d(void)
|
||||
{
|
||||
uint* r_dst = &DY;
|
||||
uint dst = *r_dst;
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -15879,32 +15890,33 @@ static void m68k_op_nbcd_8_ai(void)
|
||||
{
|
||||
uint ea = EA_AY_AI_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -15912,32 +15924,33 @@ static void m68k_op_nbcd_8_pi(void)
|
||||
{
|
||||
uint ea = EA_AY_PI_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -15945,32 +15958,33 @@ static void m68k_op_nbcd_8_pi7(void)
|
||||
{
|
||||
uint ea = EA_A7_PI_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -15978,32 +15992,33 @@ static void m68k_op_nbcd_8_pd(void)
|
||||
{
|
||||
uint ea = EA_AY_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -16011,32 +16026,33 @@ static void m68k_op_nbcd_8_pd7(void)
|
||||
{
|
||||
uint ea = EA_A7_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -16044,32 +16060,33 @@ static void m68k_op_nbcd_8_di(void)
|
||||
{
|
||||
uint ea = EA_AY_DI_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -16077,32 +16094,33 @@ static void m68k_op_nbcd_8_ix(void)
|
||||
{
|
||||
uint ea = EA_AY_IX_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -16110,32 +16128,33 @@ static void m68k_op_nbcd_8_aw(void)
|
||||
{
|
||||
uint ea = EA_AW_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -16143,32 +16162,33 @@ static void m68k_op_nbcd_8_al(void)
|
||||
{
|
||||
uint ea = EA_AL_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
||||
uint res = -dst - XFLAG_AS_1();
|
||||
|
||||
if(res != 0x9a)
|
||||
if(res)
|
||||
{
|
||||
FLAG_V = ~res; /* Undefined V behavior */
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if((res & 0x0f) == 0xa)
|
||||
res = (res & 0xf0) + 0x10;
|
||||
if(((res|dst) & 0x0f) == 0x0)
|
||||
res = (res & 0xf0) + 6;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res+0x9a);
|
||||
|
||||
FLAG_V &= res; /* Undefined V behavior part II */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
|
||||
m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
FLAG_Z |= res;
|
||||
FLAG_C = CFLAG_SET;
|
||||
FLAG_X = XFLAG_SET;
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
else
|
||||
{
|
||||
FLAG_V = VFLAG_CLEAR;
|
||||
FLAG_C = CFLAG_CLEAR;
|
||||
FLAG_X = XFLAG_CLEAR;
|
||||
FLAG_N = NFLAG_CLEAR;
|
||||
}
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
}
|
||||
|
||||
|
||||
@ -19736,26 +19756,28 @@ static void m68k_op_sbcd_8_rr(void)
|
||||
uint src = DY;
|
||||
uint dst = *r_dst;
|
||||
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
||||
uint corf = 0;
|
||||
|
||||
/* FLAG_V = ~res; */ /* Undefined V behavior */
|
||||
FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
|
||||
if(res > 0xf)
|
||||
corf = 6;
|
||||
|
||||
if(res > 9)
|
||||
res -= 6;
|
||||
res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
||||
if(res > 0x99)
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if(res > 0xff)
|
||||
{
|
||||
res += 0xa0;
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
|
||||
}
|
||||
else if(res < corf)
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
else
|
||||
FLAG_N = FLAG_X = FLAG_C = 0;
|
||||
FLAG_X = FLAG_C = 0;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res-corf);
|
||||
|
||||
/* FLAG_V &= res; */ /* Undefined V behavior part II */
|
||||
/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
FLAG_Z |= res;
|
||||
|
||||
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
||||
@ -19768,26 +19790,27 @@ static void m68k_op_sbcd_8_mm_ax7(void)
|
||||
uint ea = EA_A7_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
||||
uint corf = 0;
|
||||
|
||||
/* FLAG_V = ~res; */ /* Undefined V behavior */
|
||||
FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
|
||||
|
||||
if(res > 9)
|
||||
res -= 6;
|
||||
if(res > 0xf)
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
||||
if(res > 0x99)
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if(res > 0xff)
|
||||
{
|
||||
res += 0xa0;
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
|
||||
}
|
||||
else if(res < corf)
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
else
|
||||
FLAG_N = FLAG_X = FLAG_C = 0;
|
||||
FLAG_X = FLAG_C = 0;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res-corf);
|
||||
|
||||
/* FLAG_V &= res; */ /* Undefined V behavior part II */
|
||||
/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
FLAG_Z |= res;
|
||||
|
||||
m68ki_write_8(ea, res);
|
||||
@ -19800,26 +19823,27 @@ static void m68k_op_sbcd_8_mm_ay7(void)
|
||||
uint ea = EA_AX_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
||||
uint corf = 0;
|
||||
|
||||
/* FLAG_V = ~res; */ /* Undefined V behavior */
|
||||
FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
|
||||
|
||||
if(res > 9)
|
||||
res -= 6;
|
||||
if(res > 0xf)
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
||||
if(res > 0x99)
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if(res > 0xff)
|
||||
{
|
||||
res += 0xa0;
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
|
||||
}
|
||||
else if(res < corf)
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
else
|
||||
FLAG_N = FLAG_X = FLAG_C = 0;
|
||||
FLAG_X = FLAG_C = 0;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res-corf);
|
||||
|
||||
/* FLAG_V &= res; */ /* Undefined V behavior part II */
|
||||
/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
FLAG_Z |= res;
|
||||
|
||||
m68ki_write_8(ea, res);
|
||||
@ -19832,26 +19856,27 @@ static void m68k_op_sbcd_8_mm_axy7(void)
|
||||
uint ea = EA_A7_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
||||
uint corf = 0;
|
||||
|
||||
/* FLAG_V = ~res; */ /* Undefined V behavior */
|
||||
FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
|
||||
|
||||
if(res > 9)
|
||||
res -= 6;
|
||||
if(res > 0xf)
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
||||
if(res > 0x99)
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if(res > 0xff)
|
||||
{
|
||||
res += 0xa0;
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
|
||||
}
|
||||
else if(res < corf)
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
else
|
||||
FLAG_N = FLAG_X = FLAG_C = 0;
|
||||
FLAG_X = FLAG_C = 0;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res-corf);
|
||||
|
||||
/* FLAG_V &= res; */ /* Undefined V behavior part II */
|
||||
/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
FLAG_Z |= res;
|
||||
|
||||
m68ki_write_8(ea, res);
|
||||
@ -19864,26 +19889,27 @@ static void m68k_op_sbcd_8_mm(void)
|
||||
uint ea = EA_AX_PD_8();
|
||||
uint dst = m68ki_read_8(ea);
|
||||
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
||||
uint corf = 0;
|
||||
|
||||
/* FLAG_V = ~res; */ /* Undefined V behavior */
|
||||
FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
|
||||
|
||||
if(res > 9)
|
||||
res -= 6;
|
||||
if(res > 0xf)
|
||||
corf = 6;
|
||||
res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
||||
if(res > 0x99)
|
||||
FLAG_V = res; /* Undefined V behavior */
|
||||
|
||||
if(res > 0xff)
|
||||
{
|
||||
res += 0xa0;
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
|
||||
}
|
||||
else if(res < corf)
|
||||
FLAG_X = FLAG_C = CFLAG_SET;
|
||||
else
|
||||
FLAG_N = FLAG_X = FLAG_C = 0;
|
||||
FLAG_X = FLAG_C = 0;
|
||||
|
||||
res = MASK_OUT_ABOVE_8(res);
|
||||
res = MASK_OUT_ABOVE_8(res-corf);
|
||||
|
||||
/* FLAG_V &= res; */ /* Undefined V behavior part II */
|
||||
/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */
|
||||
FLAG_V &= ~res; /* Undefined V behavior part II */
|
||||
FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
||||
FLAG_Z |= res;
|
||||
|
||||
m68ki_write_8(ea, res);
|
||||
|
||||
@ -46,4 +46,11 @@
|
||||
#define INLINE static __inline__
|
||||
#endif /* INLINE */
|
||||
|
||||
/* Alignment macros for cross compiler compatibility */
|
||||
#if defined(_MSC_VER)
|
||||
#define ALIGNED_(x) __declspec(align(x))
|
||||
#elif defined(__GNUC__)
|
||||
#define ALIGNED_(x) __attribute__ ((aligned(x)))
|
||||
#endif
|
||||
|
||||
#endif /* _MACROS_H_ */
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
* Main 68k bus handlers
|
||||
*
|
||||
* Copyright (C) 1998-2003 Charles Mac Donald (original code)
|
||||
* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2007-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
@ -413,11 +413,6 @@ unsigned int ctrl_io_read_byte(unsigned int address)
|
||||
return m68k_read_bus_8(address);
|
||||
}
|
||||
|
||||
case 0x10: /* MEMORY MODE */
|
||||
case 0x12: /* Z80 RESET */
|
||||
case 0x13: /* unknown */
|
||||
case 0x40: /* TMSS */
|
||||
case 0x44: /* RADICA */
|
||||
case 0x50: /* SVP */
|
||||
{
|
||||
if ((address & 0xFC) == 0x00)
|
||||
@ -436,6 +431,15 @@ unsigned int ctrl_io_read_byte(unsigned int address)
|
||||
return m68k_read_bus_8(address);
|
||||
}
|
||||
|
||||
case 0x10: /* MEMORY MODE */
|
||||
case 0x12: /* Z80 RESET */
|
||||
case 0x13: /* unknown */
|
||||
case 0x40: /* TMSS */
|
||||
case 0x44: /* RADICA */
|
||||
{
|
||||
return m68k_read_bus_8(address);
|
||||
}
|
||||
|
||||
default: /* Invalid address */
|
||||
{
|
||||
return m68k_lockup_r_8(address);
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
* Main 68k bus handlers
|
||||
*
|
||||
* Copyright (C) 1998-2003 Charles Mac Donald (original code)
|
||||
* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2007-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
*
|
||||
* Noise implementation based on http://www.smspower.org/Development/SN76489#NoiseChannel
|
||||
*
|
||||
* Copyright (C) 2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2016-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
@ -78,6 +78,7 @@ static struct
|
||||
{
|
||||
int clocks;
|
||||
int latch;
|
||||
int zeroFreqInc;
|
||||
int noiseShiftValue;
|
||||
int noiseShiftWidth;
|
||||
int noiseBitMask;
|
||||
@ -103,6 +104,9 @@ void psg_init(PSG_TYPE type)
|
||||
psg.chanAmp[i][1] = 100;
|
||||
}
|
||||
|
||||
/* Initialize Tone zero frequency increment value */
|
||||
psg.zeroFreqInc = ((type == PSG_DISCRETE) ? 0x400 : 0x1) * PSG_MCYCLES_RATIO;
|
||||
|
||||
/* Initialize Noise LSFR type */
|
||||
psg.noiseShiftWidth = noiseShiftWidth[type];
|
||||
psg.noiseBitMask = noiseBitMask[type];
|
||||
@ -117,7 +121,7 @@ void psg_reset()
|
||||
{
|
||||
psg.regs[i*2] = 0;
|
||||
psg.regs[i*2+1] = 0;
|
||||
psg.freqInc[i] = (i < 3) ? (1 * PSG_MCYCLES_RATIO) : (16 * PSG_MCYCLES_RATIO);
|
||||
psg.freqInc[i] = (i < 3) ? (psg.zeroFreqInc) : (16 * PSG_MCYCLES_RATIO);
|
||||
psg.freqCounter[i] = 0;
|
||||
psg.polarity[i] = -1;
|
||||
psg.chanDelta[i][0] = 0;
|
||||
@ -126,8 +130,8 @@ void psg_reset()
|
||||
psg.chanOut[i][1] = 0;
|
||||
}
|
||||
|
||||
/* noise attenuation register is latched on power-on (verified on 315-5313A & 315-5660 integrated version only) */
|
||||
psg.latch = 7;
|
||||
/* tone #2 attenuation register is latched on power-on (verified on 315-5313A integrated version only) */
|
||||
psg.latch = 3;
|
||||
|
||||
/* reset noise shift register */
|
||||
psg.noiseShiftValue = 1 << psg.noiseShiftWidth;
|
||||
@ -298,8 +302,8 @@ void psg_write(unsigned int clocks, unsigned int data)
|
||||
}
|
||||
else
|
||||
{
|
||||
/* zero value behaves the same as a value of 1 (verified on integrated version only) */
|
||||
psg.freqInc[index>>1] = PSG_MCYCLES_RATIO;
|
||||
/* zero value behaves the same as a value of 1 on integrated version (0x400 on discrete version) */
|
||||
psg.freqInc[index>>1] = psg.zeroFreqInc;
|
||||
}
|
||||
|
||||
/* update noise channel counter increment if required */
|
||||
@ -328,7 +332,15 @@ void psg_write(unsigned int clocks, unsigned int data)
|
||||
psg.freqInc[3] = (0x10 << noiseFreq) * PSG_MCYCLES_RATIO;
|
||||
}
|
||||
|
||||
/* reset shift register value */
|
||||
/* check current noise shift register output */
|
||||
if (psg.noiseShiftValue & 1)
|
||||
{
|
||||
/* high to low transition will be applied at next internal cycle update */
|
||||
psg.chanDelta[3][0] = -psg.chanOut[3][0];
|
||||
psg.chanDelta[3][1] = -psg.chanOut[3][1];
|
||||
}
|
||||
|
||||
/* reset noise shift register value (noise channel output is forced low) */
|
||||
psg.noiseShiftValue = 1 << psg.noiseShiftWidth;;
|
||||
|
||||
break;
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
*
|
||||
* Noise implementation based on http://www.smspower.org/Development/SN76489#NoiseChannel
|
||||
*
|
||||
* Copyright (C) 2016 Eke-Eke (Genesis Plus GX)
|
||||
* Copyright (C) 2016-2017 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
|
||||
@ -12,16 +12,27 @@
|
||||
** Additional code & fixes by Eke-Eke for Genesis Plus GX
|
||||
**
|
||||
** Huge thanks to Nemesis, most of those fixes came from his tests on Sega Genesis hardware
|
||||
** More informations at http://gendev.spritesmind.net/forum/viewtopic.php?t=386
|
||||
** Additional info from YM2612 die shot analysis by Sauraen
|
||||
** See http://gendev.spritesmind.net/forum/viewtopic.php?t=386
|
||||
**
|
||||
** TODO:
|
||||
** - better documentation
|
||||
** - BUSY flag emulation
|
||||
** - accurate DAC output
|
||||
*/
|
||||
|
||||
/*
|
||||
** CHANGELOG:
|
||||
**
|
||||
** 09-04-2017 Eke-Eke (Genesis Plus GX):
|
||||
** - fixed LFO PM implementation: block & keyscale code should not be modified by LFO (verified on YM2612 die)
|
||||
** - fixed Timer B overflow handling
|
||||
**
|
||||
** 12-03-2017 Eke-Eke (Genesis Plus GX):
|
||||
** - fixed Op1 self-feedback regression introduced by previous modifications
|
||||
** - removed one-sample extra delay on Op1 calculated output
|
||||
** - refactored chan_calc() function
|
||||
**
|
||||
** 01-09-2012 Eke-Eke (Genesis Plus GX):
|
||||
** - removed input clock / output samplerate frequency ratio, chip now always run at (original) internal sample frequency
|
||||
** - removed now uneeded extra bits of precision
|
||||
@ -791,10 +802,11 @@ INLINE void INTERNAL_TIMER_B(int step)
|
||||
ym2612.OPN.ST.status |= 0x02;
|
||||
|
||||
/* reload the counter */
|
||||
if (ym2612.OPN.ST.TBL)
|
||||
do
|
||||
{
|
||||
ym2612.OPN.ST.TBC += ym2612.OPN.ST.TBL;
|
||||
else
|
||||
ym2612.OPN.ST.TBC = ym2612.OPN.ST.TBL;
|
||||
}
|
||||
while (ym2612.OPN.ST.TBC <= 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1268,29 +1280,23 @@ INLINE void update_ssg_eg_channels(FM_CH *CH)
|
||||
} while (--i);
|
||||
}
|
||||
|
||||
INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, INT32 pms, UINT32 block_fnum)
|
||||
INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, UINT32 pm, UINT8 kc, UINT32 fc)
|
||||
{
|
||||
INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + pms + ym2612.OPN.LFO_PM];
|
||||
INT32 lfo_fn_offset = lfo_pm_table[(((fc & 0x7f0) >> 4) << 8) + pm];
|
||||
|
||||
if (lfo_fn_table_index_offset) /* LFO phase modulation active */
|
||||
if (lfo_fn_offset) /* LFO phase modulation active */
|
||||
{
|
||||
UINT8 blk;
|
||||
unsigned int kc, fc;
|
||||
/* block is not modified by LFO PM */
|
||||
UINT8 blk = fc >> 11;
|
||||
|
||||
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
|
||||
but LFO works with one more bit of a precision so we really need 4096 elements */
|
||||
block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
|
||||
blk = (block_fnum&0x7000) >> 12;
|
||||
block_fnum = block_fnum & 0xfff;
|
||||
/* LFO works with one more bit of a precision (12-bit) */
|
||||
fc = ((fc << 1) + lfo_fn_offset) & 0xfff;
|
||||
|
||||
/* keyscale code */
|
||||
kc = (blk<<2) | opn_fktable[block_fnum >> 8];
|
||||
|
||||
/* (frequency) phase increment counter */
|
||||
fc = (((block_fnum << 5) >> (7 - blk)) + SLOT->DT[kc]) & DT_MASK;
|
||||
/* (frequency) phase increment counter (17-bit) */
|
||||
fc = (((fc << 5) >> (7 - blk)) + SLOT->DT[kc]) & DT_MASK;
|
||||
|
||||
/* update phase */
|
||||
SLOT->phase += (fc * SLOT->mul) >> 1;
|
||||
SLOT->phase += ((fc * SLOT->mul) >> 1);
|
||||
}
|
||||
else /* LFO phase modulation = zero */
|
||||
{
|
||||
@ -1300,39 +1306,36 @@ INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, INT32 pms, UINT32 block_fnum)
|
||||
|
||||
INLINE void update_phase_lfo_channel(FM_CH *CH)
|
||||
{
|
||||
UINT32 block_fnum = CH->block_fnum;
|
||||
UINT32 fc = CH->block_fnum;
|
||||
|
||||
INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + CH->pms + ym2612.OPN.LFO_PM];
|
||||
INT32 lfo_fn_offset = lfo_pm_table[(((fc & 0x7f0) >> 4) << 8) + CH->pms + ym2612.OPN.LFO_PM];
|
||||
|
||||
if (lfo_fn_table_index_offset) /* LFO phase modulation active */
|
||||
if (lfo_fn_offset) /* LFO phase modulation active */
|
||||
{
|
||||
UINT8 blk;
|
||||
unsigned int kc, fc, finc;
|
||||
UINT32 finc;
|
||||
|
||||
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
|
||||
but LFO works with one more bit of a precision so we really need 4096 elements */
|
||||
block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
|
||||
blk = (block_fnum&0x7000) >> 12;
|
||||
block_fnum = block_fnum & 0xfff;
|
||||
/* block & keyscale code are not modified by LFO PM */
|
||||
UINT8 blk = fc >> 11;
|
||||
UINT8 kc = CH->kcode;
|
||||
|
||||
/* keyscale code */
|
||||
kc = (blk<<2) | opn_fktable[block_fnum >> 8];
|
||||
/* LFO works with one more bit of a precision (12-bit) */
|
||||
fc = ((fc << 1) + lfo_fn_offset) & 0xfff;
|
||||
|
||||
/* (frequency) phase increment counter */
|
||||
fc = (block_fnum << 5) >> (7 - blk);
|
||||
/* (frequency) phase increment counter (17-bit) */
|
||||
fc = (fc << 5) >> (7 - blk);
|
||||
|
||||
/* apply DETUNE & MUL operator specific values */
|
||||
finc = (fc + CH->SLOT[SLOT1].DT[kc]) & DT_MASK;
|
||||
CH->SLOT[SLOT1].phase += (finc*CH->SLOT[SLOT1].mul) >> 1;
|
||||
CH->SLOT[SLOT1].phase += ((finc * CH->SLOT[SLOT1].mul) >> 1);
|
||||
|
||||
finc = (fc + CH->SLOT[SLOT2].DT[kc]) & DT_MASK;
|
||||
CH->SLOT[SLOT2].phase += (finc*CH->SLOT[SLOT2].mul) >> 1;
|
||||
CH->SLOT[SLOT2].phase += ((finc * CH->SLOT[SLOT2].mul) >> 1);
|
||||
|
||||
finc = (fc + CH->SLOT[SLOT3].DT[kc]) & DT_MASK;
|
||||
CH->SLOT[SLOT3].phase += (finc*CH->SLOT[SLOT3].mul) >> 1;
|
||||
CH->SLOT[SLOT3].phase += ((finc * CH->SLOT[SLOT3].mul) >> 1);
|
||||
|
||||
finc = (fc + CH->SLOT[SLOT4].DT[kc]) & DT_MASK;
|
||||
CH->SLOT[SLOT4].phase += (finc*CH->SLOT[SLOT4].mul) >> 1;
|
||||
CH->SLOT[SLOT4].phase += ((finc * CH->SLOT[SLOT4].mul) >> 1);
|
||||
}
|
||||
else /* LFO phase modulation = zero */
|
||||
{
|
||||
@ -1413,7 +1416,7 @@ INLINE signed int op_calc(UINT32 phase, unsigned int env, unsigned int pm)
|
||||
|
||||
INLINE signed int op_calc1(UINT32 phase, unsigned int env, unsigned int pm)
|
||||
{
|
||||
UINT32 p = (env<<3) + sin_tab[ ( (phase + pm ) >> SIN_BITS ) & SIN_MASK ];
|
||||
UINT32 p = (env<<3) + sin_tab[ ( ( phase >> SIN_BITS ) + pm ) & SIN_MASK ];
|
||||
|
||||
if (p >= TL_TAB_LEN)
|
||||
return 0;
|
||||
@ -1424,32 +1427,31 @@ INLINE void chan_calc(FM_CH *CH, int num)
|
||||
{
|
||||
do
|
||||
{
|
||||
INT32 out = 0;
|
||||
UINT32 AM = ym2612.OPN.LFO_AM >> CH->ams;
|
||||
unsigned int eg_out = volume_calc(&CH->SLOT[SLOT1]);
|
||||
|
||||
m2 = c1 = c2 = mem = 0;
|
||||
|
||||
*CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
|
||||
|
||||
if( eg_out < ENV_QUIET ) /* SLOT 1 */
|
||||
{
|
||||
INT32 out = CH->op1_out[0] + CH->op1_out[1];
|
||||
if (CH->FB < SIN_BITS)
|
||||
out = (CH->op1_out[0] + CH->op1_out[1]) >> CH->FB;
|
||||
|
||||
out = op_calc1(CH->SLOT[SLOT1].phase, eg_out, out );
|
||||
}
|
||||
|
||||
CH->op1_out[0] = CH->op1_out[1];
|
||||
CH->op1_out[1] = out;
|
||||
|
||||
if( !CH->connect1 ){
|
||||
/* algorithm 5 */
|
||||
mem = c1 = c2 = CH->op1_out[0];
|
||||
mem = c1 = c2 = out;
|
||||
}else{
|
||||
/* other algorithms */
|
||||
*CH->connect1 += CH->op1_out[0];
|
||||
}
|
||||
|
||||
CH->op1_out[1] = 0;
|
||||
if( eg_out < ENV_QUIET ) /* SLOT 1 */
|
||||
{
|
||||
if (!CH->FB)
|
||||
out=0;
|
||||
|
||||
CH->op1_out[1] = op_calc1(CH->SLOT[SLOT1].phase, eg_out, (out<<CH->FB) );
|
||||
}
|
||||
*CH->connect1 = out;
|
||||
}
|
||||
|
||||
eg_out = volume_calc(&CH->SLOT[SLOT3]);
|
||||
@ -1471,13 +1473,16 @@ INLINE void chan_calc(FM_CH *CH, int num)
|
||||
/* update phase counters AFTER output calculations */
|
||||
if(CH->pms)
|
||||
{
|
||||
/* add support for 3 slot mode */
|
||||
/* 3-slot mode */
|
||||
if ((ym2612.OPN.ST.mode & 0xC0) && (CH == &ym2612.CH[2]))
|
||||
{
|
||||
update_phase_lfo_slot(&CH->SLOT[SLOT1], CH->pms, ym2612.OPN.SL3.block_fnum[1]);
|
||||
update_phase_lfo_slot(&CH->SLOT[SLOT2], CH->pms, ym2612.OPN.SL3.block_fnum[2]);
|
||||
update_phase_lfo_slot(&CH->SLOT[SLOT3], CH->pms, ym2612.OPN.SL3.block_fnum[0]);
|
||||
update_phase_lfo_slot(&CH->SLOT[SLOT4], CH->pms, CH->block_fnum);
|
||||
/* keyscale code is not modifiedby LFO */
|
||||
UINT8 kc = ym2612.CH[2].kcode;
|
||||
UINT32 pm = ym2612.CH[2].pms + ym2612.OPN.LFO_PM;
|
||||
update_phase_lfo_slot(&ym2612.CH[2].SLOT[SLOT1], pm, kc, ym2612.OPN.SL3.block_fnum[1]);
|
||||
update_phase_lfo_slot(&ym2612.CH[2].SLOT[SLOT2], pm, kc, ym2612.OPN.SL3.block_fnum[2]);
|
||||
update_phase_lfo_slot(&ym2612.CH[2].SLOT[SLOT3], pm, kc, ym2612.OPN.SL3.block_fnum[0]);
|
||||
update_phase_lfo_slot(&ym2612.CH[2].SLOT[SLOT4], pm, kc, ym2612.CH[2].block_fnum);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1522,11 +1527,11 @@ INLINE void OPNWriteMode(int r, int v)
|
||||
ym2612.OPN.LFO_AM = 126;
|
||||
}
|
||||
break;
|
||||
case 0x24: /* timer A High 8*/
|
||||
case 0x24: /* timer A High */
|
||||
ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2);
|
||||
ym2612.OPN.ST.TAL = 1024 - ym2612.OPN.ST.TA;
|
||||
break;
|
||||
case 0x25: /* timer A Low 2*/
|
||||
case 0x25: /* timer A Low */
|
||||
ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x3fc)|(v&3);
|
||||
ym2612.OPN.ST.TAL = 1024 - ym2612.OPN.ST.TA;
|
||||
break;
|
||||
@ -1727,7 +1732,7 @@ INLINE void OPNWriteReg(int r, int v)
|
||||
case 0: /* 0xb0-0xb2 : FB,ALGO */
|
||||
{
|
||||
CH->ALGO = v&7;
|
||||
CH->FB = (v>>3)&7;
|
||||
CH->FB = SIN_BITS - ((v>>3)&7);
|
||||
setup_connection( CH, c );
|
||||
break;
|
||||
}
|
||||
|
||||
@ -54,10 +54,10 @@
|
||||
}
|
||||
|
||||
/* VDP context */
|
||||
uint8 sat[0x400] __attribute__((aligned(4))); /* Internal copy of sprite attribute table */
|
||||
uint8 vram[0x10000] __attribute__((aligned(4))); /* Video RAM (64K x 8-bit) */
|
||||
uint8 cram[0x80] __attribute__((aligned(4))); /* On-chip color RAM (64 x 9-bit) */
|
||||
uint8 vsram[0x80] __attribute__((aligned(4))); /* On-chip vertical scroll RAM (40 x 11-bit) */
|
||||
uint8 ALIGNED_(4) sat[0x400]; /* Internal copy of sprite attribute table */
|
||||
uint8 ALIGNED_(4) vram[0x10000]; /* Video RAM (64K x 8-bit) */
|
||||
uint8 ALIGNED_(4) cram[0x80]; /* On-chip color RAM (64 x 9-bit) */
|
||||
uint8 ALIGNED_(4) vsram[0x80]; /* On-chip vertical scroll RAM (40 x 11-bit) */
|
||||
uint8 reg[0x20]; /* Internal VDP registers (23 x 8-bit) */
|
||||
uint8 hint_pending; /* 0= Line interrupt is pending */
|
||||
uint8 vint_pending; /* 1= Frame interrupt is pending */
|
||||
|
||||
@ -553,7 +553,7 @@ static const uint32 tms_palette[16] =
|
||||
#endif
|
||||
|
||||
/* Cached and flipped patterns */
|
||||
static uint8 bg_pattern_cache[0x80000] __attribute__((aligned(4)));
|
||||
static uint8 ALIGNED_(4) bg_pattern_cache[0x80000];
|
||||
|
||||
/* Sprite pattern name offset look-up table (Mode 5) */
|
||||
static uint8 name_lut[0x400];
|
||||
|
||||
22
libretro/msvc/msvc-2017.sln
Normal file
22
libretro/msvc/msvc-2017.sln
Normal file
@ -0,0 +1,22 @@
|
||||
|
||||
Microsoft Visual Studio Solution File, Format Version 12.00
|
||||
# Visual Studio 15
|
||||
VisualStudioVersion = 15.0.26228.9
|
||||
MinimumVisualStudioVersion = 10.0.40219.1
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "msvc-2010", "msvc-2017\msvc-2017.vcxproj", "{29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}"
|
||||
EndProject
|
||||
Global
|
||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||
Debug|x86 = Debug|x86
|
||||
Release|x86 = Release|x86
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
{29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Release|x86.ActiveCfg = Release|Win32
|
||||
{29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Release|x86.Build.0 = Release|Win32
|
||||
EndGlobalSection
|
||||
GlobalSection(SolutionProperties) = preSolution
|
||||
HideSolutionNode = FALSE
|
||||
EndGlobalSection
|
||||
EndGlobal
|
||||
27
libretro/msvc/msvc-2017/libretro.def
Normal file
27
libretro/msvc/msvc-2017/libretro.def
Normal file
@ -0,0 +1,27 @@
|
||||
LIBRARY "msvc-2017"
|
||||
EXPORTS
|
||||
retro_set_environment
|
||||
retro_set_video_refresh
|
||||
retro_set_audio_sample
|
||||
retro_set_audio_sample_batch
|
||||
retro_set_input_poll
|
||||
retro_set_input_state
|
||||
retro_init
|
||||
retro_deinit
|
||||
retro_api_version
|
||||
retro_get_system_info
|
||||
retro_get_system_av_info
|
||||
retro_set_controller_port_device
|
||||
retro_reset
|
||||
retro_run
|
||||
retro_serialize_size
|
||||
retro_serialize
|
||||
retro_unserialize
|
||||
retro_cheat_reset
|
||||
retro_cheat_set
|
||||
retro_load_game
|
||||
retro_load_game_special
|
||||
retro_unload_game
|
||||
retro_get_region
|
||||
retro_get_memory_data
|
||||
retro_get_memory_size
|
||||
154
libretro/msvc/msvc-2017/msvc-2017.vcxproj
Normal file
154
libretro/msvc/msvc-2017/msvc-2017.vcxproj
Normal file
@ -0,0 +1,154 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ProjectConfiguration Include="Release|Win32">
|
||||
<Configuration>Release</Configuration>
|
||||
<Platform>Win32</Platform>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_93c.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_i2c.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_spi.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\ggenie.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\md_cart.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\sms_cart.c" />
|
||||
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|
||||
<ClCompile Include="..\..\..\core\cart_hw\svp\ssp16.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\svp\svp.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cdc.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cdd.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cd_cart.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\gfx.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\pcm.c" />
|
||||
<ClCompile Include="..\..\..\core\cd_hw\scd.c" />
|
||||
<ClCompile Include="..\..\..\core\genesis.c" />
|
||||
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|
||||
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|
||||
<ClCompile Include="..\..\..\core\input_hw\graphic_board.c" />
|
||||
<ClCompile Include="..\..\..\core\input_hw\input.c" />
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ClCompile Include="..\..\..\core\loadrom.c" />
|
||||
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|
||||
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|
||||
<ClCompile Include="..\..\..\core\mem68k.c" />
|
||||
<ClCompile Include="..\..\..\core\membnk.c" />
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ClCompile Include="..\..\..\core\sound\eq.c" />
|
||||
<ClCompile Include="..\..\..\core\sound\psg.c" />
|
||||
<ClCompile Include="..\..\..\core\sound\sound.c" />
|
||||
<ClCompile Include="..\..\..\core\sound\ym2413.c" />
|
||||
<ClCompile Include="..\..\..\core\sound\ym2612.c" />
|
||||
<ClCompile Include="..\..\..\core\state.c" />
|
||||
<ClCompile Include="..\..\..\core\system.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\bitwise.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\block.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\codebook.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\floor0.c" />
|
||||
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|
||||
<ClCompile Include="..\..\..\core\tremor\framing.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\info.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\mapping0.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\mdct.c" />
|
||||
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|
||||
<ClCompile Include="..\..\..\core\tremor\res012.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\sharedbook.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\synthesis.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\vorbisfile.c" />
|
||||
<ClCompile Include="..\..\..\core\tremor\window.c" />
|
||||
<ClCompile Include="..\..\..\core\vdp_ctrl.c" />
|
||||
<ClCompile Include="..\..\..\core\vdp_render.c" />
|
||||
<ClCompile Include="..\..\..\core\z80\z80.c" />
|
||||
<ClCompile Include="..\..\libretro.c" />
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ConfigurationType>DynamicLibrary</ConfigurationType>
|
||||
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|
||||
<WholeProgramOptimization>true</WholeProgramOptimization>
|
||||
<CharacterSet>Unicode</CharacterSet>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<ImportGroup Label="PropertySheets" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
|
||||
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||||
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|
||||
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|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
|
||||
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||||
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|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
<PreprocessorDefinitions>WIN32;_DEBUG;_WINDOWS;_USRDLL;MSVC2017_EXPORTS;_CRT_SECURE_NO_WARNINGS;INLINE=static _inline;__inline__=_inline;__extension__=;LSB_FIRST;__LIBRETRO__;USE_16BPP_RENDERING;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions);USE_LIBTREMOR;BYTE_ORDER=LITTLE_ENDIAN</PreprocessorDefinitions>
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||||
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|
||||
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||||
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|
||||
<SubSystem>Windows</SubSystem>
|
||||
<GenerateDebugInformation>true</GenerateDebugInformation>
|
||||
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||||
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|
||||
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|
||||
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
|
||||
<ClCompile>
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||||
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|
||||
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||||
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|
||||
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||||
<FunctionLevelLinking>true</FunctionLevelLinking>
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||||
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||||
<PreprocessorDefinitions>WIN32;NDEBUG;_WINDOWS;_USRDLL;MSVC2017_EXPORTS;_CRT_SECURE_NO_WARNINGS;INLINE=static _inline;__inline__=_inline;__extension__=;LSB_FIRST;__LIBRETRO__;USE_16BPP_RENDERING;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions);USE_LIBTREMOR;BYTE_ORDER=LITTLE_ENDIAN</PreprocessorDefinitions>
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||||
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|
||||
</ClCompile>
|
||||
<Link>
|
||||
<SubSystem>Windows</SubSystem>
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
241
libretro/msvc/msvc-2017/msvc-2017.vcxproj.filters
Normal file
241
libretro/msvc/msvc-2017/msvc-2017.vcxproj.filters
Normal file
@ -0,0 +1,241 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
<ClCompile Include="..\..\..\core\vdp_ctrl.c">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\scd.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cd_cart.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cdc.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\cdd.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\gfx.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cd_hw\pcm.c">
|
||||
<Filter>Source Files\cd_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\scrc32.c">
|
||||
<Filter>Source Files\libretro</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_spi.c">
|
||||
<Filter>Source Files\cart_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_93c.c">
|
||||
<Filter>Source Files\cart_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_i2c.c">
|
||||
<Filter>Source Files\cart_hw</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\sound\blip_buf.c">
|
||||
<Filter>Source Files\sound</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\window.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\bitwise.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\block.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\codebook.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\floor0.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\floor1.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\framing.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\info.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\mapping0.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\mdct.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\registry.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\res012.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\sharedbook.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\synthesis.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\core\tremor\vorbisfile.c">
|
||||
<Filter>Source Files\tremor</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
</Project>
|
||||
6
libretro/msvc/msvc-2017/msvc-2017.vcxproj.user
Normal file
6
libretro/msvc/msvc-2017/msvc-2017.vcxproj.user
Normal file
@ -0,0 +1,6 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<PropertyGroup>
|
||||
<ShowAllFiles>true</ShowAllFiles>
|
||||
</PropertyGroup>
|
||||
</Project>
|
||||
@ -116,8 +116,6 @@ END USERS SHOULD PREFERABLY USE LIBRETRO PORT WITH RETROARCH.
|
||||
|
||||
Original YM2612/YM2413 cores by Jarek Burczynski & Tatsuyuki Satoh
|
||||
|
||||
Original SN76489 core by Maxim
|
||||
|
||||
Original SVP core by Notaz
|
||||
|
||||
Blip Buffer & NTSC Video filter libraries by Shay Green (Blargg)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user