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[Core/VDP] optimized tile caching
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@ -5,7 +5,7 @@
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* Support for all TMS99xx modes, Mode 4 & Mode 5 rendering
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2014 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2015 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -3881,14 +3881,14 @@ void update_bg_pattern_cache_m4(int index)
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/* Get modified pattern name index */
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name = bg_name_list[i];
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/* Pattern cache base address */
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dst = &bg_pattern_cache[name << 6];
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/* Check modified lines */
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for(y = 0; y < 8; y++)
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{
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if(bg_name_dirty[name] & (1 << y))
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{
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/* Pattern cache base address */
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dst = &bg_pattern_cache[name << 6];
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/* Byteplane data */
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bp01 = *(uint16 *)&vram[(name << 5) | (y << 2) | (0)];
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bp23 = *(uint16 *)&vram[(name << 5) | (y << 2) | (2)];
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@ -3935,14 +3935,14 @@ void update_bg_pattern_cache_m5(int index)
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/* Get modified pattern name index */
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name = bg_name_list[i];
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/* Pattern cache base address */
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dst = &bg_pattern_cache[name << 6];
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/* Check modified lines */
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for(y = 0; y < 8; y ++)
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{
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if(bg_name_dirty[name] & (1 << y))
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{
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/* Pattern cache base address */
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dst = &bg_pattern_cache[name << 6];
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/* Byteplane data (one pattern = 4 bytes) */
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/* LIT_ENDIAN: byte0 (lsb) p2p3 p0p1 p6p7 p4p5 (msb) byte3 */
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/* BIG_ENDIAN: byte0 (msb) p0p1 p2p3 p4p5 p6p7 (lsb) byte3 */
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@ -5,7 +5,7 @@
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* Support for all TMS99xx modes, Mode 4 & Mode 5 rendering
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*
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* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2014 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2015 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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