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[Core/CPU] added Z80 wait-states on 68k bus access (fixes Remute Red Eyes demo)
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@ -5,7 +5,7 @@
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* Support for SG-1000, Mark-III, Master System, Game Gear & Mega Drive ports access
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*
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* Copyright (C) 1998-2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2020 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -111,6 +111,8 @@ unsigned char z80_memory_r(unsigned int address)
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{
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if ((address >> 8) == 0x7F)
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{
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/* average Z80 wait-states when accessing 68k area */
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Z80.cycles += 3 * 15;
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return (*zbank_memory_map[0xc0].read)(address);
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}
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return z80_unused_r(address);
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@ -118,6 +120,9 @@ unsigned char z80_memory_r(unsigned int address)
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default: /* $8000-$FFFF: 68k bank (32K) */
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{
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/* average Z80 wait-states when accessing 68k area */
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Z80.cycles += 3 * 15;
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address = zbank | (address & 0x7FFF);
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if (zbank_memory_map[address >> 16].read)
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{
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@ -158,6 +163,8 @@ void z80_memory_w(unsigned int address, unsigned char data)
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case 0x7F: /* $7F00-$7FFF: VDP */
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{
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/* average Z80 wait-states when accessing 68k area */
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Z80.cycles += 3 * 15;
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(*zbank_memory_map[0xc0].write)(address, data);
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return;
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}
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@ -172,6 +179,9 @@ void z80_memory_w(unsigned int address, unsigned char data)
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default: /* $8000-$FFFF: 68k bank (32K) */
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{
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/* average Z80 wait-states when accessing 68k area */
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Z80.cycles += 3 * 15;
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address = zbank | (address & 0x7FFF);
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if (zbank_memory_map[address >> 16].write)
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{
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@ -5,7 +5,7 @@
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* Support for SG-1000, Mark-III, Master System, Game Gear & Mega Drive ports access
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*
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* Copyright (C) 1998-2003 Charles Mac Donald (original code)
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* Copyright (C) 2007-2016 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2007-2020 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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