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https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-08 20:05:13 +01:00
[SCD] fixed access to read-only registers on MD side (Batman Returns)
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886084ca34
commit
7d833829e3
@ -180,7 +180,7 @@ static void bram_write_word(unsigned int address, unsigned int data)
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/* PCM chip & Gate-Array area */
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/* PCM chip & Gate-Array area */
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/*--------------------------------------------------------------------------*/
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/*--------------------------------------------------------------------------*/
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INLINE void s68k_poll_detect(reg)
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static void s68k_poll_detect(reg)
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{
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{
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/* detect SUB-CPU register polling */
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/* detect SUB-CPU register polling */
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if (s68k.poll.detected == (1 << reg))
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if (s68k.poll.detected == (1 << reg))
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@ -210,7 +210,7 @@ INLINE void s68k_poll_detect(reg)
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s68k.poll.pc = s68k.pc;
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s68k.poll.pc = s68k.pc;
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}
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}
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INLINE void s68k_poll_sync(reg)
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static void s68k_poll_sync(reg)
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{
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{
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/* relative MAIN-CPU cycle counter */
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/* relative MAIN-CPU cycle counter */
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unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE;
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unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE;
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@ -663,7 +663,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
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}
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}
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/* update PM0-1 & MODE bits */
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/* update PM0-1 & MODE bits */
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scd.regs[0x02 >> 1].byte.l = (scd.regs[0x01].byte.l & ~0x1c) | (data & 0x1c);
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scd.regs[0x02 >> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1c) | (data & 0x1c);
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return;
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return;
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}
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}
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@ -223,7 +223,7 @@ void z80_write_word(unsigned int address, unsigned int data)
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/* I/O Control */
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/* I/O Control */
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/*--------------------------------------------------------------------------*/
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/*--------------------------------------------------------------------------*/
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INLINE void m68k_poll_detect(reg)
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static void m68k_poll_detect(reg)
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{
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{
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/* detect MAIN-CPU register polling */
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/* detect MAIN-CPU register polling */
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if (m68k.poll.detected == (1 << reg))
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if (m68k.poll.detected == (1 << reg))
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@ -253,7 +253,7 @@ INLINE void m68k_poll_detect(reg)
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m68k.poll.pc = m68k.pc;
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m68k.poll.pc = m68k.pc;
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}
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}
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INLINE void m68k_poll_sync(reg)
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static void m68k_poll_sync(reg)
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{
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{
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/* relative SUB-CPU cycle counter */
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/* relative SUB-CPU cycle counter */
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unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE;
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unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE;
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@ -710,15 +710,11 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
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}
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}
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default:
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default:
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{
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/* default registers */
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if (address < 0xa12020)
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{
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{
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/* MAIN-CPU communication words */
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/* MAIN-CPU communication words */
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if (address >= 0xa12010)
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if ((address & 0x30) == 0x10)
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{
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{
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m68k_poll_sync(address & 0x1e);
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m68k_poll_sync(address & 0x1e);
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}
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/* register LSB */
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/* register LSB */
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if (address & 1)
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if (address & 1)
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@ -929,16 +925,11 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
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}
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}
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default:
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default:
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{
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if (address < 0xa12020)
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{
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{
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/* MAIN-CPU communication words */
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/* MAIN-CPU communication words */
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if (address >= 0xa12010)
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if ((address & 0x30) == 0x10)
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{
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{
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m68k_poll_sync(address & 0x1e);
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m68k_poll_sync(address & 0x1e);
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}
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/* default registers */
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scd.regs[(address >> 1) & 0xff].w = data;
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scd.regs[(address >> 1) & 0xff].w = data;
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return;
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return;
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}
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}
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