[SCD] fixed access to read-only registers on MD side (Batman Returns)

This commit is contained in:
EkeEke 2012-12-10 20:26:53 +01:00
parent 886084ca34
commit 7d833829e3
2 changed files with 12 additions and 21 deletions

View File

@ -180,7 +180,7 @@ static void bram_write_word(unsigned int address, unsigned int data)
/* PCM chip & Gate-Array area */ /* PCM chip & Gate-Array area */
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
INLINE void s68k_poll_detect(reg) static void s68k_poll_detect(reg)
{ {
/* detect SUB-CPU register polling */ /* detect SUB-CPU register polling */
if (s68k.poll.detected == (1 << reg)) if (s68k.poll.detected == (1 << reg))
@ -210,7 +210,7 @@ INLINE void s68k_poll_detect(reg)
s68k.poll.pc = s68k.pc; s68k.poll.pc = s68k.pc;
} }
INLINE void s68k_poll_sync(reg) static void s68k_poll_sync(reg)
{ {
/* relative MAIN-CPU cycle counter */ /* relative MAIN-CPU cycle counter */
unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE; unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE;
@ -663,7 +663,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
} }
/* update PM0-1 & MODE bits */ /* update PM0-1 & MODE bits */
scd.regs[0x02 >> 1].byte.l = (scd.regs[0x01].byte.l & ~0x1c) | (data & 0x1c); scd.regs[0x02 >> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1c) | (data & 0x1c);
return; return;
} }

View File

@ -223,7 +223,7 @@ void z80_write_word(unsigned int address, unsigned int data)
/* I/O Control */ /* I/O Control */
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
INLINE void m68k_poll_detect(reg) static void m68k_poll_detect(reg)
{ {
/* detect MAIN-CPU register polling */ /* detect MAIN-CPU register polling */
if (m68k.poll.detected == (1 << reg)) if (m68k.poll.detected == (1 << reg))
@ -253,7 +253,7 @@ INLINE void m68k_poll_detect(reg)
m68k.poll.pc = m68k.pc; m68k.poll.pc = m68k.pc;
} }
INLINE void m68k_poll_sync(reg) static void m68k_poll_sync(reg)
{ {
/* relative SUB-CPU cycle counter */ /* relative SUB-CPU cycle counter */
unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE;
@ -710,15 +710,11 @@ void ctrl_io_write_byte(unsigned int address, unsigned int data)
} }
default: default:
{
/* default registers */
if (address < 0xa12020)
{ {
/* MAIN-CPU communication words */ /* MAIN-CPU communication words */
if (address >= 0xa12010) if ((address & 0x30) == 0x10)
{ {
m68k_poll_sync(address & 0x1e); m68k_poll_sync(address & 0x1e);
}
/* register LSB */ /* register LSB */
if (address & 1) if (address & 1)
@ -929,16 +925,11 @@ void ctrl_io_write_word(unsigned int address, unsigned int data)
} }
default: default:
{
if (address < 0xa12020)
{ {
/* MAIN-CPU communication words */ /* MAIN-CPU communication words */
if (address >= 0xa12010) if ((address & 0x30) == 0x10)
{ {
m68k_poll_sync(address & 0x1e); m68k_poll_sync(address & 0x1e);
}
/* default registers */
scd.regs[(address >> 1) & 0xff].w = data; scd.regs[(address >> 1) & 0xff].w = data;
return; return;
} }