mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-13 22:35:10 +01:00
fixed SRAM being reinitialized after changing some system options when auto-SRAM is enabled
fixed BIOS lockup with games using SRAM when auto-SRAM is enabled improved Gamecube controller autodetection on startup
This commit is contained in:
parent
45756f6b14
commit
824b33fea9
@ -453,7 +453,7 @@ void cart_hw_reset()
|
|||||||
if (cart.hw.realtec & 1)
|
if (cart.hw.realtec & 1)
|
||||||
{
|
{
|
||||||
/* enable BOOTROM */
|
/* enable BOOTROM */
|
||||||
for (i=0; i<0x40; i++)
|
for (i=0x00; i<0x40; i++)
|
||||||
m68k_memory_map[i].base = mem_chunk;
|
m68k_memory_map[i].base = mem_chunk;
|
||||||
for (i=0; i<8; i++)
|
for (i=0; i<8; i++)
|
||||||
memcpy(mem_chunk + i*0x2000, cart.rom + 0x7e000, 0x2000);
|
memcpy(mem_chunk + i*0x2000, cart.rom + 0x7e000, 0x2000);
|
||||||
|
@ -101,8 +101,6 @@ void config_default(void)
|
|||||||
config.bilinear = 1;
|
config.bilinear = 1;
|
||||||
|
|
||||||
/* controllers options */
|
/* controllers options */
|
||||||
input.system[0] = SYSTEM_GAMEPAD;
|
|
||||||
input.system[1] = SYSTEM_GAMEPAD;
|
|
||||||
config.gun_cursor[0] = 1;
|
config.gun_cursor[0] = 1;
|
||||||
config.gun_cursor[1] = 1;
|
config.gun_cursor[1] = 1;
|
||||||
config.invert_mouse = 0;
|
config.invert_mouse = 0;
|
||||||
|
@ -118,7 +118,6 @@ static int FAT_ManageFile(char *filename, u8 direction, u8 filetype)
|
|||||||
{
|
{
|
||||||
memcpy(sram.sram, savebuffer, filesize);
|
memcpy(sram.sram, savebuffer, filesize);
|
||||||
sram.crc = crc32 (0, sram.sram, 0x10000);
|
sram.crc = crc32 (0, sram.sram, 0x10000);
|
||||||
system_reset ();
|
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -412,9 +411,6 @@ int ManageSRAM (u8 direction, u8 device)
|
|||||||
uncompress ((Bytef *) &sram.sram, &outzipped, (Bytef *) &savebuffer[2112+sizeof(inzipped)], inzipped);
|
uncompress ((Bytef *) &sram.sram, &outzipped, (Bytef *) &savebuffer[2112+sizeof(inzipped)], inzipped);
|
||||||
sram.crc = crc32 (0, &sram.sram[0], 0x10000);
|
sram.crc = crc32 (0, &sram.sram[0], 0x10000);
|
||||||
|
|
||||||
/*** reset system ***/
|
|
||||||
system_reset ();
|
|
||||||
|
|
||||||
/*** Inform user ***/
|
/*** Inform user ***/
|
||||||
sprintf (action, "Loaded %d bytes successfully", size);
|
sprintf (action, "Loaded %d bytes successfully", size);
|
||||||
GUI_WaitPrompt("Information",action);
|
GUI_WaitPrompt("Information",action);
|
||||||
|
@ -914,6 +914,7 @@ static void systemmenu ()
|
|||||||
|
|
||||||
/* reinitialize timings */
|
/* reinitialize timings */
|
||||||
system_init ();
|
system_init ();
|
||||||
|
memfile_autoload(config.sram_auto,-1);
|
||||||
unsigned char *temp = memalign(32,YM2612GetContextSize());
|
unsigned char *temp = memalign(32,YM2612GetContextSize());
|
||||||
if (temp) memcpy(temp, YM2612GetContextPtr(), YM2612GetContextSize());
|
if (temp) memcpy(temp, YM2612GetContextPtr(), YM2612GetContextSize());
|
||||||
audio_init(48000);
|
audio_init(48000);
|
||||||
@ -952,6 +953,7 @@ static void systemmenu ()
|
|||||||
{
|
{
|
||||||
system_init ();
|
system_init ();
|
||||||
system_reset ();
|
system_reset ();
|
||||||
|
memfile_autoload(config.sram_auto,-1);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -967,6 +969,7 @@ static void systemmenu ()
|
|||||||
system_reset (); /* clear any patches first */
|
system_reset (); /* clear any patches first */
|
||||||
system_init ();
|
system_init ();
|
||||||
system_reset ();
|
system_reset ();
|
||||||
|
memfile_autoload(config.sram_auto,-1);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
@ -599,7 +599,8 @@ void gx_input_Init(void)
|
|||||||
|
|
||||||
void gx_input_SetDefault(void)
|
void gx_input_SetDefault(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i,j;
|
||||||
|
u32 exp;
|
||||||
|
|
||||||
/* set default key mapping for each type of devices */
|
/* set default key mapping for each type of devices */
|
||||||
for (i=0; i<4; i++)
|
for (i=0; i<4; i++)
|
||||||
@ -649,19 +650,17 @@ void gx_input_SetDefault(void)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Default device assignation */
|
/* Default player inputs */
|
||||||
for (i=0; i<MAX_DEVICES; i++)
|
for (i=0; i<MAX_DEVICES; i++)
|
||||||
{
|
{
|
||||||
/* set gamepad by default */
|
config.input[i].device = -1;
|
||||||
config.input[i].device = (i < 4) ? 0 : -1;
|
|
||||||
config.input[i].port = i%4;
|
config.input[i].port = i%4;
|
||||||
config.input[i].padtype = 0;
|
config.input[i].padtype = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef HW_RVL
|
#ifdef HW_RVL
|
||||||
u32 exp;
|
/* Autodetect Wii Controllers */
|
||||||
VIDEO_WaitVSync();
|
VIDEO_WaitVSync();
|
||||||
int j;
|
|
||||||
for (i=0; i<4; i++)
|
for (i=0; i<4; i++)
|
||||||
{
|
{
|
||||||
/* try to autodetect connected controller */
|
/* try to autodetect connected controller */
|
||||||
@ -678,7 +677,7 @@ void gx_input_SetDefault(void)
|
|||||||
/* look for unassigned wiimotes */
|
/* look for unassigned wiimotes */
|
||||||
for (j=0; j<i; j++)
|
for (j=0; j<i; j++)
|
||||||
{
|
{
|
||||||
/* classic is used, wiimote is free */
|
/* classic controller is already assigned, which means wiimote is not used */
|
||||||
if (config.input[j].device == (WPAD_EXP_CLASSIC + 1))
|
if (config.input[j].device == (WPAD_EXP_CLASSIC + 1))
|
||||||
{
|
{
|
||||||
/* assign wiimote */
|
/* assign wiimote */
|
||||||
@ -688,13 +687,31 @@ void gx_input_SetDefault(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i=4; i<MAX_DEVICES; i++)
|
|
||||||
{
|
|
||||||
/* set gamepad if not assigned */
|
|
||||||
config.input[i].device = (config.input[i%4].device == 0) ? -1 : 0;
|
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* Autodetect Gamecube Controllers */
|
||||||
|
VIDEO_WaitVSync();
|
||||||
|
exp = PAD_ScanPads();
|
||||||
|
for (i=0; i<4; i++)
|
||||||
|
{
|
||||||
|
/* check if Gamecube Controller is connected */
|
||||||
|
if (exp & (1 << i))
|
||||||
|
{
|
||||||
|
for (j=0; j<MAX_DEVICES; j++)
|
||||||
|
{
|
||||||
|
/* look for the first unassigned player */
|
||||||
|
if (config.input[j].device == -1)
|
||||||
|
{
|
||||||
|
config.input[j].device = 0;
|
||||||
|
config.input[j].port = i;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* default emulated inputs */
|
||||||
|
input.system[0] = SYSTEM_GAMEPAD;
|
||||||
|
input.system[1] = (config.input[1].device != -1) ? SYSTEM_GAMEPAD : NO_SYSTEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
void gx_input_Config(u8 chan, u8 type, u8 max)
|
void gx_input_Config(u8 chan, u8 type, u8 max)
|
||||||
|
@ -67,13 +67,6 @@ static void load_bios(void)
|
|||||||
|
|
||||||
/* update BIOS flags */
|
/* update BIOS flags */
|
||||||
config.bios_enabled |= 2;
|
config.bios_enabled |= 2;
|
||||||
|
|
||||||
if (config.bios_enabled == 3)
|
|
||||||
{
|
|
||||||
/* initialize system */
|
|
||||||
system_init ();
|
|
||||||
audio_init(48000);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void init_machine(void)
|
static void init_machine(void)
|
||||||
@ -110,10 +103,6 @@ static void init_machine(void)
|
|||||||
bitmap.viewport.x = 0;
|
bitmap.viewport.x = 0;
|
||||||
bitmap.viewport.y = 0;
|
bitmap.viewport.y = 0;
|
||||||
bitmap.data = texturemem;
|
bitmap.data = texturemem;
|
||||||
|
|
||||||
/* default system */
|
|
||||||
input.system[0] = SYSTEM_GAMEPAD;
|
|
||||||
input.system[1] = SYSTEM_GAMEPAD;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**************************************************
|
/**************************************************
|
||||||
|
109
source/vdp.c
109
source/vdp.c
@ -292,6 +292,10 @@ void vdp_update_dma()
|
|||||||
/* DMA bytes left */
|
/* DMA bytes left */
|
||||||
int dma_bytes = (left_cycles * rate) / m68cycles_per_line;
|
int dma_bytes = (left_cycles * rate) / m68cycles_per_line;
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] DMA type %d (%d access/line)-> %d access (%d remaining) (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488,dma_type, rate, dma_length, dma_bytes, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
|
||||||
/* determinate DMA length in CPU cycles */
|
/* determinate DMA length in CPU cycles */
|
||||||
if (dma_length < dma_bytes)
|
if (dma_length < dma_bytes)
|
||||||
{
|
{
|
||||||
@ -312,6 +316,10 @@ void vdp_update_dma()
|
|||||||
/* 68K COPY to V-RAM */
|
/* 68K COPY to V-RAM */
|
||||||
/* 68K is frozen during DMA operation */
|
/* 68K is frozen during DMA operation */
|
||||||
count_m68k += dma_cycles;
|
count_m68k += dma_cycles;
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("-->CPU frozen for %d cycles\n", dma_cycles);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -319,6 +327,10 @@ void vdp_update_dma()
|
|||||||
/* set DMA end cyles count */
|
/* set DMA end cyles count */
|
||||||
dma_endCycles = count_m68k + dma_cycles;
|
dma_endCycles = count_m68k + dma_cycles;
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("-->DMA ends in %d cycles\n", dma_cycles);
|
||||||
|
#endif
|
||||||
|
|
||||||
/* set DMA Busy flag */
|
/* set DMA Busy flag */
|
||||||
status |= 0x0002;
|
status |= 0x0002;
|
||||||
}
|
}
|
||||||
@ -431,7 +443,7 @@ unsigned int vdp_ctrl_r(void)
|
|||||||
if (!(reg[1] & 0x40)) temp |= 0x8;
|
if (!(reg[1] & 0x40)) temp |= 0x8;
|
||||||
|
|
||||||
/* HBLANK flag (Sonic 3 and Sonic 2 "VS Modes", Lemmings 2, Mega Turrican) */
|
/* HBLANK flag (Sonic 3 and Sonic 2 "VS Modes", Lemmings 2, Mega Turrican) */
|
||||||
if ((count_m68k <= (line_m68k + 84)) || (count_m68k > (line_m68k + m68cycles_per_line - 36))) temp |= 0x4;
|
if ((count_m68k <= (line_m68k + 84)) || (count_m68k > (line_m68k + m68cycles_per_line))) temp |= 0x4;
|
||||||
|
|
||||||
/* clear pending flag */
|
/* clear pending flag */
|
||||||
pending = 0;
|
pending = 0;
|
||||||
@ -439,9 +451,33 @@ unsigned int vdp_ctrl_r(void)
|
|||||||
/* clear SPR/SCOL flags */
|
/* clear SPR/SCOL flags */
|
||||||
status &= 0xFF9F;
|
status &= 0xFF9F;
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VDP status read -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, temp, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
return (temp);
|
return (temp);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
unsigned int vdp_hvc_r(void)
|
||||||
|
{
|
||||||
|
uint8 hc = (hc_latch & 0x100) ? (hc_latch & 0xFF) : hctab[count_m68k % m68cycles_per_line];
|
||||||
|
uint8 vc = vctab[v_counter];
|
||||||
|
|
||||||
|
/* interlace mode 2 */
|
||||||
|
if (im2_flag) vc = (vc << 1) | ((vc >> 7) & 1);
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VDP HVC Read -> 0x%04x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488,(vc << 8) | hc, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
return ((vc << 8) | hc);
|
||||||
|
}
|
||||||
|
|
||||||
|
void vdp_test_w(unsigned int value)
|
||||||
|
{
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("Unused VDP Write 0x%x (%08x)\n", value, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
void vdp_data_w(unsigned int data)
|
void vdp_data_w(unsigned int data)
|
||||||
{
|
{
|
||||||
/* Clear pending flag */
|
/* Clear pending flag */
|
||||||
@ -494,15 +530,24 @@ unsigned int vdp_data_r(void)
|
|||||||
{
|
{
|
||||||
case 0x00: /* VRAM */
|
case 0x00: /* VRAM */
|
||||||
temp = *(uint16 *) & vram[(addr & 0xFFFE)];
|
temp = *(uint16 *) & vram[(addr & 0xFFFE)];
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VRAM 0x%x read -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, temp, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08: /* CRAM */
|
case 0x08: /* CRAM */
|
||||||
temp = *(uint16 *) & cram[(addr & 0x7E)];
|
temp = *(uint16 *) & cram[(addr & 0x7E)];
|
||||||
temp = UNPACK_CRAM (temp);
|
temp = UNPACK_CRAM (temp);
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] CRAM 0x%x read -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, temp, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x04: /* VSRAM */
|
case 0x04: /* VSRAM */
|
||||||
temp = *(uint16 *) & vsram[(addr & 0x7E)];
|
temp = *(uint16 *) & vsram[(addr & 0x7E)];
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VSRAM 0x%x read -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, temp, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -513,39 +558,31 @@ unsigned int vdp_data_r(void)
|
|||||||
return (temp);
|
return (temp);
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned int vdp_hvc_r(void)
|
|
||||||
{
|
|
||||||
uint8 hc = (hc_latch & 0x100) ? (hc_latch & 0xFF) : hctab[count_m68k % m68cycles_per_line];
|
|
||||||
uint8 vc = vctab[v_counter];
|
|
||||||
|
|
||||||
/* interlace mode 2 */
|
|
||||||
if (im2_flag) vc = (vc << 1) | ((vc >> 7) & 1);
|
|
||||||
|
|
||||||
return ((vc << 8) | hc);
|
|
||||||
}
|
|
||||||
|
|
||||||
void vdp_test_w(unsigned int value)
|
|
||||||
{
|
|
||||||
#ifdef LOGERROR
|
|
||||||
error("Unused VDP Write 0x%x (%08x)\n", value, m68k_get_reg (NULL, M68K_REG_PC));
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
/*--------------------------------------------------------------------------*/
|
/*--------------------------------------------------------------------------*/
|
||||||
/* VDP Interrupts callback */
|
/* VDP Interrupts callback */
|
||||||
/*--------------------------------------------------------------------------*/
|
/*--------------------------------------------------------------------------*/
|
||||||
|
|
||||||
int vdp_int_ack_callback(int int_level)
|
int vdp_int_ack_callback(int int_level)
|
||||||
{
|
{
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] INT Level %d ack (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488,int_level, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
|
||||||
/* VINT triggered ? */
|
/* VINT triggered ? */
|
||||||
if (irq_status&0x20)
|
if (irq_status&0x20)
|
||||||
{
|
{
|
||||||
vint_pending = 0;
|
vint_pending = 0;
|
||||||
status &= ~0x80; /* clear VINT flag */
|
status &= ~0x80; /* clear VINT flag */
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("---> VINT cleared\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
hint_pending = 0;
|
hint_pending = 0;
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("---> HINT cleared\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/* update IRQ status */
|
/* update IRQ status */
|
||||||
@ -585,6 +622,10 @@ static inline void data_w(unsigned int data)
|
|||||||
{
|
{
|
||||||
case 0x01: /* VRAM */
|
case 0x01: /* VRAM */
|
||||||
|
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VRAM 0x%x write -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, data, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Byte-swap data if A0 is set */
|
/* Byte-swap data if A0 is set */
|
||||||
if (addr & 1) data = (data >> 8) | (data << 8);
|
if (addr & 1) data = (data >> 8) | (data << 8);
|
||||||
|
|
||||||
@ -608,6 +649,9 @@ static inline void data_w(unsigned int data)
|
|||||||
|
|
||||||
case 0x03: /* CRAM */
|
case 0x03: /* CRAM */
|
||||||
{
|
{
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] CRAM 0x%x write -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, data, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
uint16 *p = (uint16 *) &cram[(addr & 0x7E)];
|
uint16 *p = (uint16 *) &cram[(addr & 0x7E)];
|
||||||
data = PACK_CRAM (data & 0x0EEE);
|
data = PACK_CRAM (data & 0x0EEE);
|
||||||
if (data != *p)
|
if (data != *p)
|
||||||
@ -622,12 +666,21 @@ static inline void data_w(unsigned int data)
|
|||||||
{
|
{
|
||||||
/* remap current line (Striker) */
|
/* remap current line (Striker) */
|
||||||
remap_buffer(v_counter,bitmap.viewport.w + 2*bitmap.viewport.x);
|
remap_buffer(v_counter,bitmap.viewport.w + 2*bitmap.viewport.x);
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("Line remapped\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
#ifdef LOGERROR
|
||||||
|
else error("Line NOT remapped\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
case 0x05: /* VSRAM */
|
case 0x05: /* VSRAM */
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VSRAM 0x%x write -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, addr, data, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
*(uint16 *) &vsram[(addr & 0x7E)] = data;
|
*(uint16 *) &vsram[(addr & 0x7E)] = data;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -642,6 +695,10 @@ static inline void data_w(unsigned int data)
|
|||||||
*/
|
*/
|
||||||
static inline void reg_w(unsigned int r, unsigned int d)
|
static inline void reg_w(unsigned int r, unsigned int d)
|
||||||
{
|
{
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("[%d(%d)][%d(%d)] VDP register %d write -> 0x%x (%x)\n", v_counter, count_m68k/488, count_m68k, count_m68k%488, r, d, m68k_get_reg (NULL, M68K_REG_PC));
|
||||||
|
#endif
|
||||||
|
|
||||||
/* See if Mode 4 (SMS mode) is enabled
|
/* See if Mode 4 (SMS mode) is enabled
|
||||||
According to official doc, VDP registers #11 to #23 can not be written unless bit2 in register #1 is set
|
According to official doc, VDP registers #11 to #23 can not be written unless bit2 in register #1 is set
|
||||||
Fix Captain Planet & Avengers (Alt version), Bass Master Classic Pro Edition (they incidentally activate Mode 4)
|
Fix Captain Planet & Avengers (Alt version), Bass Master Classic Pro Edition (they incidentally activate Mode 4)
|
||||||
@ -713,7 +770,14 @@ static inline void reg_w(unsigned int r, unsigned int d)
|
|||||||
*/
|
*/
|
||||||
reg[1] = d;
|
reg[1] = d;
|
||||||
render_line(v_counter, 0);
|
render_line(v_counter, 0);
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("Line redrawn\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
#ifdef LOGERROR
|
||||||
|
else
|
||||||
|
error("Line NOT redrawn\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -759,7 +823,14 @@ static inline void reg_w(unsigned int r, unsigned int d)
|
|||||||
/* remap entire line (see Road Rash I,II,III) */
|
/* remap entire line (see Road Rash I,II,III) */
|
||||||
reg[7] = d;
|
reg[7] = d;
|
||||||
remap_buffer(v_counter,bitmap.viewport.w + 2*bitmap.viewport.x);
|
remap_buffer(v_counter,bitmap.viewport.w + 2*bitmap.viewport.x);
|
||||||
|
#ifdef LOGERROR
|
||||||
|
error("--> Line remapped\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
#ifdef LOGERROR
|
||||||
|
else
|
||||||
|
error("--> Line NOT remapped\n");
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user