Merge pull request #304 from nukeykt/master

[Core/Sound] update nuked ym2413 core to v1.0
This commit is contained in:
ekeeke 2020-02-05 17:55:41 +01:00 committed by GitHub
commit 8359664e58
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 81 additions and 64 deletions

View File

@ -38,7 +38,7 @@
* siliconpr0n.org(digshadow, John McMaster): * siliconpr0n.org(digshadow, John McMaster):
* VRC VII decap and die shot. * VRC VII decap and die shot.
* *
* version: 0.9 * version: 1.0
*/ */
#include <string.h> #include <string.h>
@ -158,27 +158,27 @@ static const opll_patch_t patch_ds1001[opll_patch_max] = {
}; };
static const opll_patch_t patch_ym2413[opll_patch_max] = { static const opll_patch_t patch_ym2413[opll_patch_max] = {
{ 0x1e, 0x01, 0x00, 0x07,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x0d, 0x07 },{ 0x00, 0x08 },{ 0x00, 0x01 },{ 0x01, 0x07 } }, { 0x1e, 0x01, 0x00, 0x07,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x0d, 0x07 },{ 0x00, 0x08 },{ 0x00, 0x01 },{ 0x00, 0x07 } },
{ 0x1a, 0x00, 0x01, 0x05,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x00, 0x00 },{ 0x0d, 0x0f },{ 0x08, 0x07 },{ 0x02, 0x01 },{ 0x03, 0x03 } }, { 0x1a, 0x00, 0x01, 0x05,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x00, 0x00 },{ 0x0d, 0x0f },{ 0x08, 0x07 },{ 0x02, 0x01 },{ 0x03, 0x03 } },
{ 0x19, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0c },{ 0x02, 0x04 },{ 0x01, 0x02 },{ 0x01, 0x03 } }, { 0x19, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0c },{ 0x02, 0x04 },{ 0x01, 0x02 },{ 0x01, 0x03 } },
{ 0x0e, 0x00, 0x00, 0x07,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x0a, 0x06 },{ 0x08, 0x04 },{ 0x07, 0x02 },{ 0x01, 0x07 } }, { 0x0e, 0x00, 0x00, 0x07,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x0a, 0x06 },{ 0x08, 0x04 },{ 0x07, 0x02 },{ 0x00, 0x07 } },
{ 0x1e, 0x00, 0x00, 0x06,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x02, 0x01 },{ 0x00, 0x00 },{ 0x0e, 0x07 },{ 0x00, 0x06 },{ 0x00, 0x02 },{ 0x01, 0x08 } }, { 0x1e, 0x00, 0x00, 0x06,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x02, 0x01 },{ 0x00, 0x00 },{ 0x0e, 0x07 },{ 0x00, 0x06 },{ 0x00, 0x02 },{ 0x00, 0x08 } },
{ 0x16, 0x00, 0x00, 0x05,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x02 },{ 0x00, 0x00 },{ 0x0e, 0x07 },{ 0x00, 0x01 },{ 0x00, 0x01 },{ 0x01, 0x08 } }, { 0x16, 0x00, 0x00, 0x05,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x02 },{ 0x00, 0x00 },{ 0x0e, 0x07 },{ 0x00, 0x01 },{ 0x00, 0x01 },{ 0x00, 0x08 } },
{ 0x1d, 0x00, 0x00, 0x07,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x08, 0x08 },{ 0x02, 0x01 },{ 0x01, 0x00 },{ 0x01, 0x07 } }, { 0x1d, 0x00, 0x00, 0x07,{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x08, 0x08 },{ 0x02, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x07 } },
{ 0x2d, 0x01, 0x00, 0x04,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x03, 0x01 },{ 0x00, 0x00 },{ 0x0a, 0x07 },{ 0x02, 0x02 },{ 0x00, 0x00 },{ 0x01, 0x07 } }, { 0x2d, 0x01, 0x00, 0x04,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x03, 0x01 },{ 0x00, 0x00 },{ 0x0a, 0x07 },{ 0x02, 0x02 },{ 0x00, 0x00 },{ 0x00, 0x07 } },
{ 0x1b, 0x00, 0x00, 0x06,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x06, 0x06 },{ 0x04, 0x05 },{ 0x01, 0x01 },{ 0x01, 0x07 } }, { 0x1b, 0x00, 0x00, 0x06,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x06, 0x06 },{ 0x04, 0x05 },{ 0x01, 0x01 },{ 0x00, 0x07 } },
{ 0x0b, 0x01, 0x01, 0x00,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x08, 0x0f },{ 0x05, 0x07 },{ 0x07, 0x00 },{ 0x01, 0x07 } }, { 0x0b, 0x01, 0x01, 0x00,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x00, 0x00 },{ 0x08, 0x0f },{ 0x05, 0x07 },{ 0x07, 0x00 },{ 0x01, 0x07 } },
{ 0x03, 0x01, 0x00, 0x01,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0e },{ 0x0a, 0x04 },{ 0x01, 0x00 },{ 0x01, 0x04 } }, { 0x03, 0x01, 0x00, 0x01,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x03, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0e },{ 0x0a, 0x04 },{ 0x01, 0x00 },{ 0x00, 0x04 } },
{ 0x24, 0x00, 0x00, 0x07,{ 0x00, 0x01 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x07, 0x01 },{ 0x00, 0x00 },{ 0x0f, 0x0f },{ 0x08, 0x08 },{ 0x02, 0x01 },{ 0x02, 0x02 } }, { 0x24, 0x00, 0x00, 0x07,{ 0x00, 0x01 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x07, 0x01 },{ 0x00, 0x00 },{ 0x0f, 0x0f },{ 0x08, 0x08 },{ 0x02, 0x01 },{ 0x02, 0x02 } },
{ 0x0c, 0x00, 0x00, 0x05,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0c, 0x0f },{ 0x02, 0x05 },{ 0x02, 0x04 },{ 0x01, 0x02 } }, { 0x0c, 0x00, 0x00, 0x05,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0c, 0x0f },{ 0x02, 0x05 },{ 0x02, 0x04 },{ 0x00, 0x02 } },
{ 0x15, 0x00, 0x00, 0x03,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x0c, 0x09 },{ 0x09, 0x05 },{ 0x00, 0x00 },{ 0x03, 0x02 } }, { 0x15, 0x00, 0x00, 0x03,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x0c, 0x09 },{ 0x09, 0x05 },{ 0x00, 0x00 },{ 0x03, 0x02 } },
{ 0x09, 0x00, 0x00, 0x03,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0e },{ 0x01, 0x04 },{ 0x04, 0x01 },{ 0x01, 0x03 } }, { 0x09, 0x00, 0x00, 0x03,{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x01 },{ 0x02, 0x00 },{ 0x0f, 0x0e },{ 0x01, 0x04 },{ 0x04, 0x01 },{ 0x00, 0x03 } },
{ 0x18, 0x00, 0x01, 0x07,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0d, 0x00 },{ 0x0f, 0x00 },{ 0x06, 0x00 },{ 0x0a, 0x00 } }, { 0x18, 0x00, 0x01, 0x07,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0d, 0x00 },{ 0x0f, 0x00 },{ 0x06, 0x00 },{ 0x0a, 0x00 } },
{ 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0c, 0x00 },{ 0x08, 0x00 },{ 0x0a, 0x00 },{ 0x07, 0x00 } }, { 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x01, 0x00 },{ 0x00, 0x00 },{ 0x0c, 0x00 },{ 0x08, 0x00 },{ 0x0a, 0x00 },{ 0x07, 0x00 } },
{ 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x05, 0x00 },{ 0x00, 0x00 },{ 0x0f, 0x00 },{ 0x08, 0x00 },{ 0x05, 0x00 },{ 0x09, 0x00 } }, { 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x05, 0x00 },{ 0x00, 0x00 },{ 0x0f, 0x00 },{ 0x08, 0x00 },{ 0x05, 0x00 },{ 0x09, 0x00 } },
{ 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0f },{ 0x00, 0x08 },{ 0x00, 0x06 },{ 0x00, 0x0d } }, { 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0f },{ 0x00, 0x08 },{ 0x00, 0x06 },{ 0x00, 0x0d } },
{ 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0d },{ 0x00, 0x08 },{ 0x00, 0x06 },{ 0x00, 0x08 } }, { 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0d },{ 0x00, 0x08 },{ 0x00, 0x04 },{ 0x00, 0x08 } },
{ 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0a },{ 0x00, 0x0a },{ 0x00, 0x05 },{ 0x00, 0x05 } } { 0x00, 0x00, 0x00, 0x00,{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x00 },{ 0x00, 0x01 },{ 0x00, 0x00 },{ 0x00, 0x0a },{ 0x00, 0x0a },{ 0x00, 0x05 },{ 0x00, 0x05 } }
}; };
@ -469,7 +469,7 @@ void OPLL_PhaseGenerate(opll_t *chip) {
rm_bit = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7) rm_bit = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7)
| (chip->rm_hh_bit3 ^ chip->rm_tc_bit5) | (chip->rm_hh_bit3 ^ chip->rm_tc_bit5)
| (chip->rm_tc_bit3 ^ chip->rm_tc_bit5); | (chip->rm_tc_bit3 ^ chip->rm_tc_bit5);
pg_out = (rm_bit << 9) | 0x80; pg_out = (rm_bit << 9) | 0x100;
break; break;
default: default:
pg_out = phase >> 9; pg_out = phase >> 9;
@ -493,17 +493,17 @@ void OPLL_PhaseCalcIncrement(opll_t *chip) {
break; break;
case 1: case 1:
case 3: case 3:
freq += freq >> 7; freq += freq >> 8;
break; break;
case 2: case 2:
freq += freq >> 8; freq += freq >> 7;
break; break;
case 5: case 5:
case 7: case 7:
freq -= freq >> 7; freq -= freq >> 8;
break; break;
case 6: case 6:
freq -= freq >> 8; freq -= freq >> 7;
break; break;
} }
} }
@ -629,7 +629,7 @@ void OPLL_EnvelopeGenerate(opll_t *chip) {
next_state = eg_num_attack; next_state = eg_num_attack;
step = 0; step = 0;
sl = chip->eg_sl & 15; sl = chip->eg_sl;
switch (state) { switch (state) {
case eg_num_attack: case eg_num_attack:
@ -783,8 +783,7 @@ void OPLL_EnvelopeGenerate(opll_t *chip) {
if (chip->eg_rate & 0x40) { if (chip->eg_rate & 0x40) {
chip->eg_rate = 0x3c | (ksr & 3); chip->eg_rate = 0x3c | (ksr & 3);
} }
chip->eg_sl <<= 4; chip->eg_sl = chip->c_sl;
chip->eg_sl |= chip->c_sl;
} }
void OPLL_Channel(opll_t *chip) { void OPLL_Channel(opll_t *chip) {
@ -792,9 +791,9 @@ void OPLL_Channel(opll_t *chip) {
int16_t ch_out = chip->ch_out; int16_t ch_out = chip->ch_out;
uint8_t ismod = (chip->cycles / 3) & 1; uint8_t ismod = (chip->cycles / 3) & 1;
uint8_t mute_m = ismod || ((chip->rm_enable&0x40) && (chip->cycles+15)%18 >= 12); uint8_t mute_m = ismod || ((chip->rm_enable&0x40) && (chip->cycles+15)%18 >= 12);
uint8_t mute_r = !mute_m; uint8_t mute_r = 1;
if (chip->chip_type == opll_type_ds1001) { if (chip->chip_type == opll_type_ds1001) {
chip->output_m = chip->ch_out; chip->output_m = ch_out;
if (chip->output_m >= 0) { if (chip->output_m >= 0) {
chip->output_m++; chip->output_m++;
} }
@ -804,47 +803,20 @@ void OPLL_Channel(opll_t *chip) {
chip->output_r = 0; chip->output_r = 0;
return; return;
} else { } else {
/* This might be incorrect */ /* TODO: This might be incorrect */
if ((chip->rm_enable & 0x80)) {
switch (chip->cycles) {
case 16:
chip->ch_out_hh = chip->ch_out;
break;
case 17:
chip->ch_out_tm = chip->ch_out;
break;
case 0:
chip->ch_out_bd = chip->ch_out;
break;
case 1:
chip->ch_out_sd = chip->ch_out;
break;
case 2:
chip->ch_out_tc = chip->ch_out;
break;
}
}
if ((chip->rm_enable & 0x40)) { if ((chip->rm_enable & 0x40)) {
switch (chip->cycles) { switch (chip->cycles) {
case 0: case 16: /* HH */
case 9: case 17: /* TOM */
ch_out = chip->ch_out_hh; case 0: /* BD */
break; case 1: /* SD */
case 1: case 2: /* TC */
case 10: case 3: /* HH */
ch_out = chip->ch_out_tm; case 4: /* TOM */
break; case 5: /* BD */
case 2: case 9: /* TOM */
case 11: case 10: /* TOM */
ch_out = chip->ch_out_bd; mute_r = 0;
break;
case 3:
case 15:
ch_out = chip->ch_out_sd;
break;
case 4:
case 16:
ch_out = chip->ch_out_tc;
break; break;
} }
} }
@ -882,6 +854,7 @@ void OPLL_Operator(opll_t *chip) {
int16_t output; int16_t output;
uint32_t level; uint32_t level;
uint32_t phase; uint32_t phase;
int16_t routput;
if ((chip->rm_enable & 0x80) && (chip->cycles == 15 || chip->cycles == 16)) { if ((chip->rm_enable & 0x80) && (chip->cycles == 15 || chip->cycles == 16)) {
ismod1 = 0; ismod1 = 0;
} else { } else {
@ -941,7 +914,51 @@ void OPLL_Operator(opll_t *chip) {
} }
chip->op_mod = output&0x1ff; chip->op_mod = output&0x1ff;
chip->ch_out = ismod1 ? 0 : (output>>3); if (chip->chip_type == opll_type_ds1001) {
routput = 0;
} else {
switch (chip->cycles) {
case 2:
routput = chip->ch_out_hh;
break;
case 3:
routput = chip->ch_out_tm;
break;
case 4:
routput = chip->ch_out_bd;
break;
case 8:
routput = chip->ch_out_sd;
break;
case 9:
routput = chip->ch_out_tc;
break;
default:
routput = 0; /* TODO: Not quite true */
break;
}
switch (chip->cycles) {
case 15:
chip->ch_out_hh = output>>3;
break;
case 16:
chip->ch_out_tm = output>>3;
break;
case 17:
chip->ch_out_bd = output>>3;
break;
case 0:
chip->ch_out_sd = output>>3;
break;
case 1:
chip->ch_out_tc = output>>3;
break;
default:
break;
}
}
chip->ch_out = ismod1 ? routput : (output>>3);
} }
void OPLL_DoRhythm(opll_t *chip) { void OPLL_DoRhythm(opll_t *chip) {
@ -1008,8 +1025,8 @@ void OPLL_Clock(opll_t *chip, int32_t *buffer) {
if (chip->cycles == 0) { if (chip->cycles == 0) {
chip->lfo_am_out = (chip->lfo_am_counter >> 3) & 0x0f; chip->lfo_am_out = (chip->lfo_am_counter >> 3) & 0x0f;
} }
OPLL_DoModeWrite(chip);
chip->rm_enable >>= 1; chip->rm_enable >>= 1;
OPLL_DoModeWrite(chip);
chip->rm_select++; chip->rm_select++;
if (chip->rm_select > rm_num_tc) { if (chip->rm_select > rm_num_tc) {
chip->rm_select = rm_num_tc + 1; chip->rm_select = rm_num_tc + 1;

View File

@ -37,7 +37,7 @@
* siliconpr0n.org(digshadow, John McMaster): * siliconpr0n.org(digshadow, John McMaster):
* VRC VII decap and die shot. * VRC VII decap and die shot.
* *
* version: 0.9 * version: 1.0
*/ */
#ifndef OPLL_H #ifndef OPLL_H