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https://github.com/ekeeke/Genesis-Plus-GX.git
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[Core/VDP] improved DMA fill timing accuracy (again)
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@ -593,7 +593,7 @@ int vdp_context_load(uint8 *state)
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void vdp_dma_update(unsigned int cycles)
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void vdp_dma_update(unsigned int cycles)
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{
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{
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unsigned int dma_cycles, dma_bytes;
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int dma_cycles, dma_bytes;
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/* DMA transfer rate (bytes per line)
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/* DMA transfer rate (bytes per line)
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@ -630,6 +630,12 @@ void vdp_dma_update(unsigned int cycles)
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else if (rate == 204) rate = 198; /* 6 refresh slots per line in H40 mode when display is off */
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else if (rate == 204) rate = 198; /* 6 refresh slots per line in H40 mode when display is off */
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}
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}
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/* Adjust DMA start cycle for DMA fill to take in account intial data port write */
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else if (dmafill)
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{
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cycles += (2 * (MCYCLES_PER_LINE / rate));
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}
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/* Available DMA cycles */
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/* Available DMA cycles */
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if (status & 8)
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if (status & 8)
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{
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{
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@ -692,7 +698,7 @@ void vdp_dma_update(unsigned int cycles)
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}
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}
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/* Process DMA */
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/* Process DMA */
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if (dma_bytes)
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if (dma_bytes > 0)
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{
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{
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/* Update DMA length */
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/* Update DMA length */
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dma_length -= dma_bytes;
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dma_length -= dma_bytes;
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@ -2452,9 +2458,6 @@ static void vdp_68k_data_w_m5(unsigned int data)
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/* Check if DMA Fill is pending */
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/* Check if DMA Fill is pending */
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if (dmafill)
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if (dmafill)
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{
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{
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/* Clear DMA Fill pending flag */
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dmafill = 0;
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/* DMA length */
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/* DMA length */
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dma_length = (reg[20] << 8) | reg[19];
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dma_length = (reg[20] << 8) | reg[19];
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@ -2466,6 +2469,9 @@ static void vdp_68k_data_w_m5(unsigned int data)
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/* Trigger DMA */
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/* Trigger DMA */
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vdp_dma_update(m68k.cycles);
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vdp_dma_update(m68k.cycles);
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/* Clear DMA Fill pending flag */
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dmafill = 0;
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}
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}
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}
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}
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