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https://github.com/ekeeke/Genesis-Plus-GX.git
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[Core/CD] fixed CDC DMA to PCM RAM when transfer length is not word-aligned
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@ -55,6 +55,7 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
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* fixed word access to CDD control register (fixes spurious audio track playback on startup with Mode 1 patched games using MSU-MD driver)
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* fixed CD communication registers state on peripheral reset (fixes SUB-CPU side initialization in MSU-MD sample demo and some Mode 1 patched games using MSU-MD driver)
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* fixed 32x32 pixels stamp index masking during GFX operation (fixes graphics rotation/scaling effects in "Chuck Rock II - Son of Chuck")
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* fixed CDC DMA to PCM RAM when transfer length is not word-aligned
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* optimized Sub-CPU / Main-CPU synchronization
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[Core/MD]
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@ -2,7 +2,7 @@
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* Genesis Plus
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* CD data controller (LC8951x compatible)
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*
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* Copyright (C) 2012-2019 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -181,17 +181,14 @@ int cdc_context_load(uint8 *state)
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void cdc_dma_update(void)
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{
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/* maximal transfer length */
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int length = DMA_BYTES_PER_LINE;
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/* end of DMA transfer ? */
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if (cdc.dbc.w < DMA_BYTES_PER_LINE)
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{
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/* transfer remaining words using 16-bit DMA */
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cdc.dma_w((cdc.dbc.w + 1) >> 1);
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/* transfer remaining bytes using DMA */
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cdc.dma_w(cdc.dbc.w + 1);
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/* reset data byte counter (DBCH bits 4-7 should be set to 1) */
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cdc.dbc.w = 0xf000;
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/* reset data byte counter (DBCH bits 4-7 should also be set to 1) */
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cdc.dbc.w = 0xffff;
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/* clear !DTEN and !DTBSY */
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cdc.ifstat |= (BIT_DTBSY | BIT_DTEN);
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@ -234,11 +231,11 @@ void cdc_dma_update(void)
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}
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else
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{
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/* transfer all words using 16-bit DMA */
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cdc.dma_w(DMA_BYTES_PER_LINE >> 1);
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/* transfer limited amount of bytes using DMA */
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cdc.dma_w(DMA_BYTES_PER_LINE);
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/* decrement data byte counter */
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cdc.dbc.w -= length;
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cdc.dbc.w -= DMA_BYTES_PER_LINE;
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}
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}
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@ -2,7 +2,7 @@
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* Genesis Plus
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* CD data controller (LC8951x compatible)
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*
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* Copyright (C) 2012-2019 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -53,7 +53,7 @@ typedef struct
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uint8 head[2][4];
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uint8 stat[4];
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int cycles;
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void (*dma_w)(unsigned int words); /* DMA transfer callback */
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void (*dma_w)(unsigned int length); /* DMA transfer callback */
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uint8 ram[0x4000 + 2352]; /* 16K external RAM (with one block overhead to handle buffer overrun) */
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} cdc_t;
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@ -2,7 +2,7 @@
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* Genesis Plus
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* CD graphics processor
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*
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* Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -41,10 +41,13 @@
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/* WORD-RAM DMA interfaces (1M & 2M modes) */
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/***************************************************************/
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void word_ram_0_dma_w(unsigned int words)
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void word_ram_0_dma_w(unsigned int length)
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{
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uint16 data;
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/* 16-bit DMA only */
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unsigned int words = length >> 1;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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@ -74,10 +77,13 @@ void word_ram_0_dma_w(unsigned int words)
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}
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}
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void word_ram_1_dma_w(unsigned int words)
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void word_ram_1_dma_w(unsigned int length)
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{
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uint16 data;
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/* 16-bit DMA only */
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unsigned int words = length >> 1;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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@ -107,10 +113,13 @@ void word_ram_1_dma_w(unsigned int words)
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}
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}
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void word_ram_2M_dma_w(unsigned int words)
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void word_ram_2M_dma_w(unsigned int length)
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{
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uint16 data;
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/* 16-bit DMA only */
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unsigned int words = length >> 1;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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@ -2,7 +2,7 @@
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* Genesis Plus
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* CD graphics processor
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*
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* Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -61,9 +61,9 @@ typedef struct
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/***************************************************************/
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/* WORD-RAM DMA interfaces (1M & 2M modes) */
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/***************************************************************/
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extern void word_ram_0_dma_w(unsigned int words);
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extern void word_ram_1_dma_w(unsigned int words);
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extern void word_ram_2M_dma_w(unsigned int words);
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extern void word_ram_0_dma_w(unsigned int length);
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extern void word_ram_1_dma_w(unsigned int length);
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extern void word_ram_2M_dma_w(unsigned int length);
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/***************************************************************/
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/* WORD-RAM 0 & 1 CPU interfaces (1M mode) */
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@ -2,7 +2,7 @@
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* Genesis Plus
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* PCM sound chip (315-5476A) (RF5C164 compatible)
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*
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* Copyright (C) 2012-2021 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -395,36 +395,31 @@ unsigned char pcm_read(unsigned int address, unsigned int cycles)
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return 0xff;
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}
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void pcm_ram_dma_w(unsigned int words)
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void pcm_ram_dma_w(unsigned int length)
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{
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uint16 data;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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uint16 src_index = cdc.dac.w & 0x3fff;
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/* PCM-RAM destination address*/
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uint16 dst_index = (scd.regs[0x0a>>1].w << 2) & 0xffe;
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uint16 dst_index = (scd.regs[0x0a>>1].w << 2) & 0xfff;
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/* update DMA destination address */
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scd.regs[0x0a>>1].w += (words >> 1);
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scd.regs[0x0a>>1].w += (length >> 2);
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/* update DMA source address */
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cdc.dac.w += (words << 1);
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cdc.dac.w += length;
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/* DMA transfer */
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while (words--)
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while (length--)
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{
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/* read 16-bit word from CDC buffer */
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data = *(uint16 *)(cdc.ram + src_index);
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/* write 16-bit word to PCM RAM (endianness does not matter since PCM RAM is always accessed as byte)*/
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*(uint16 *)(pcm.bank + dst_index) = data ;
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/* copy byte from CDC buffer to PCM RAM bank */
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pcm.bank[dst_index] = cdc.ram[src_index];
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/* increment CDC buffer source address */
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src_index = (src_index + 2) & 0x3ffe;
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src_index = (src_index + 1) & 0x3fff;
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/* increment PCM-RAM destination address */
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dst_index = (dst_index + 2) & 0xffe;
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dst_index = (dst_index + 1) & 0xfff;
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}
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}
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@ -2,7 +2,7 @@
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* Genesis Plus
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* PCM sound chip (315-5476A) (RF5C164 compatible)
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*
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* Copyright (C) 2012-2021 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -72,6 +72,6 @@ extern int pcm_context_load(uint8 *state);
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extern void pcm_update(unsigned int samples);
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extern void pcm_write(unsigned int address, unsigned char data, unsigned int cycles);
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extern unsigned char pcm_read(unsigned int address, unsigned int cycles);
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extern void pcm_ram_dma_w(unsigned int words);
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extern void pcm_ram_dma_w(unsigned int length);
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#endif
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@ -2,7 +2,7 @@
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* Genesis Plus
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* Mega CD / Sega CD hardware
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*
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* Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -76,10 +76,13 @@ static void s68k_unused_16_w(unsigned int address, unsigned int data)
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/*--------------------------------------------------------------------------*/
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/* PRG-RAM DMA access */
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/*--------------------------------------------------------------------------*/
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void prg_ram_dma_w(unsigned int words)
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void prg_ram_dma_w(unsigned int length)
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{
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uint16 data;
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/* 16-bit DMA only */
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unsigned int words = length >> 1;
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/* CDC buffer source address */
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uint16 src_index = cdc.dac.w & 0x3ffe;
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@ -2,7 +2,7 @@
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* Genesis Plus
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* Mega CD / Sega CD hardware
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*
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* Copyright (C) 2012-2022 Eke-Eke (Genesis Plus GX)
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* Copyright (C) 2012-2023 Eke-Eke (Genesis Plus GX)
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*
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* Redistribution and use of this code or any derivative works are permitted
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* provided that the following conditions are met:
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@ -90,6 +90,6 @@ extern void scd_end_frame(unsigned int cycles);
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extern int scd_context_load(uint8 *state, char *version);
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extern int scd_context_save(uint8 *state);
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extern int scd_68k_irq_ack(int level);
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extern void prg_ram_dma_w(unsigned int words);
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extern void prg_ram_dma_w(unsigned int length);
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#endif
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