mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-06-02 16:48:43 +02:00
Finished processing cart and cd
This commit is contained in:
SergioMartin86
parent
85f5f5063e
commit
9d1a0fd69a
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@ -42,21 +42,11 @@
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#include "../genesis.h"
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#include "../mem68k.h"
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#include "areplay.h"
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#include "state.h"
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#define TYPE_PRO1 0x12
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#define TYPE_PRO2 0x22
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static struct
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{
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uint8_t enabled;
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uint8_t status;
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uint8_t ram[0x10000];
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uint16_t regs[13];
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uint16_t old[4];
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uint16_t data[4];
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uint32_t addr[4];
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} action_replay;
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static void ar_write_regs(uint32_t address, uint32_t data);
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static void ar2_write_reg(uint32_t address, uint32_t data);
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static void ar_write_ram_8(uint32_t address, uint32_t data);
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@ -42,6 +42,17 @@
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#define AR_SWITCH_ON (1)
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#define AR_SWITCH_TRAINER (2)
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struct action_replay_t
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{
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uint8_t enabled;
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uint8_t status;
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uint8_t ram[0x10000];
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uint16_t regs[13];
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uint16_t old[4];
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uint16_t data[4];
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uint32_t addr[4];
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};
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extern void areplay_init(void);
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extern void areplay_shutdown(void);
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extern void areplay_reset(int hard);
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@ -39,51 +39,50 @@
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#include <string.h>
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#include "eeprom_93c.h"
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#include "sram.h"
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#include "state.h"
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/* fixed board implementation */
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#define BIT_DATA (0)
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#define BIT_CLK (1)
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#define BIT_CS (2)
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#define _93C_BIT_DATA (0)
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#define _93C_BIT_CLK (1)
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#define _93C_BIT_CS (2)
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T_EEPROM_93C eeprom_93c;
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void eeprom_93c_init(void)
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{
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/* default eeprom state */
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memset(&eeprom_93c, 0, sizeof(T_EEPROM_93C));
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eeprom_93c.data = 1;
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eeprom_93c.state = WAIT_START;
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eeprom_93c.state = _93C_WAIT_START;
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sram.custom = 3;
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}
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void eeprom_93c_write(unsigned char data)
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{
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/* Make sure CS is HIGH */
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if (data & (1 << BIT_CS))
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if (data & (1 << _93C_BIT_CS))
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{
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/* Data latched on CLK postive edge */
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if ((data & (1 << BIT_CLK)) && !eeprom_93c.clk)
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if ((data & (1 << _93C_BIT_CLK)) && !eeprom_93c.clk)
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{
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/* Current EEPROM state */
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switch (eeprom_93c.state)
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{
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case WAIT_START:
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case _93C_WAIT_START:
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{
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/* Wait for START bit */
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if (data & (1 << BIT_DATA))
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if (data & (1 << _93C_BIT_DATA))
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{
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eeprom_93c.opcode = 0;
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eeprom_93c.cycles = 0;
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eeprom_93c.state = GET_OPCODE;
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eeprom_93c.state = _93C_GET_OPCODE;
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}
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break;
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}
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case GET_OPCODE:
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case _93C_GET_OPCODE:
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{
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/* 8-bit buffer (opcode + address) */
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eeprom_93c.opcode |= ((data >> BIT_DATA) & 1) << (7 - eeprom_93c.cycles);
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eeprom_93c.opcode |= ((data >> _93C_BIT_DATA) & 1) << (7 - eeprom_93c.cycles);
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eeprom_93c.cycles++;
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if (eeprom_93c.cycles == 8)
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@ -96,7 +95,7 @@ void eeprom_93c_write(unsigned char data)
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/* WRITE */
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eeprom_93c.buffer = 0;
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eeprom_93c.cycles = 0;
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eeprom_93c.state = WRITE_WORD;
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eeprom_93c.state = _93C_WRITE_WORD;
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break;
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}
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@ -105,7 +104,7 @@ void eeprom_93c_write(unsigned char data)
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/* READ */
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eeprom_93c.buffer = *(uint16_t *)(sram.sram + ((eeprom_93c.opcode & 0x3F) << 1));
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eeprom_93c.cycles = 0;
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eeprom_93c.state = READ_WORD;
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eeprom_93c.state = _93C_READ_WORD;
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/* Force DATA OUT */
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eeprom_93c.data = 0;
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@ -121,7 +120,7 @@ void eeprom_93c_write(unsigned char data)
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}
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/* wait for next command */
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eeprom_93c.state = WAIT_STANDBY;
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eeprom_93c.state = _93C_WAIT_STANDBY;
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break;
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}
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@ -135,7 +134,7 @@ void eeprom_93c_write(unsigned char data)
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/* WRITE ALL */
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eeprom_93c.buffer = 0;
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eeprom_93c.cycles = 0;
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eeprom_93c.state = WRITE_WORD;
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eeprom_93c.state = _93C_WRITE_WORD;
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break;
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}
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@ -148,7 +147,7 @@ void eeprom_93c_write(unsigned char data)
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}
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/* wait for next command */
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eeprom_93c.state = WAIT_STANDBY;
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eeprom_93c.state = _93C_WAIT_STANDBY;
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break;
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}
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@ -158,7 +157,7 @@ void eeprom_93c_write(unsigned char data)
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eeprom_93c.we = (eeprom_93c.opcode >> 4) & 1;
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/* wait for next command */
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eeprom_93c.state = WAIT_STANDBY;
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eeprom_93c.state = _93C_WAIT_STANDBY;
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break;
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}
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}
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@ -169,10 +168,10 @@ void eeprom_93c_write(unsigned char data)
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break;
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}
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case WRITE_WORD:
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case _93C_WRITE_WORD:
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{
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/* 16-bit data buffer */
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eeprom_93c.buffer |= ((data >> BIT_DATA) & 1) << (15 - eeprom_93c.cycles);
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eeprom_93c.buffer |= ((data >> _93C_BIT_DATA) & 1) << (15 - eeprom_93c.cycles);
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eeprom_93c.cycles++;
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if (eeprom_93c.cycles == 16)
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@ -198,12 +197,12 @@ void eeprom_93c_write(unsigned char data)
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}
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/* wait for next command */
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eeprom_93c.state = WAIT_STANDBY;
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eeprom_93c.state = _93C_WAIT_STANDBY;
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}
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break;
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}
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case READ_WORD:
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case _93C_READ_WORD:
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{
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/* set DATA OUT */
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eeprom_93c.data = ((eeprom_93c.buffer >> (15 - eeprom_93c.cycles)) & 1);
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@ -234,17 +233,17 @@ void eeprom_93c_write(unsigned char data)
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{
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/* standby mode */
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eeprom_93c.data = 1;
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eeprom_93c.state = WAIT_START;
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eeprom_93c.state = _93C_WAIT_START;
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}
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}
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/* Update input lines */
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eeprom_93c.cs = (data >> BIT_CS) & 1;
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eeprom_93c.clk = (data >> BIT_CLK) & 1;
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eeprom_93c.cs = (data >> _93C_BIT_CS) & 1;
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eeprom_93c.clk = (data >> _93C_BIT_CLK) & 1;
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}
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unsigned char eeprom_93c_read(void)
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{
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return ((eeprom_93c.cs << BIT_CS) | (eeprom_93c.data << BIT_DATA) | (1 << BIT_CLK));
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return ((eeprom_93c.cs << _93C_BIT_CS) | (eeprom_93c.data << _93C_BIT_DATA) | (1 << _93C_BIT_CLK));
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}
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@ -42,11 +42,11 @@
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typedef enum
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{
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WAIT_STANDBY,
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WAIT_START,
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GET_OPCODE,
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WRITE_WORD,
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READ_WORD
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_93C_WAIT_STANDBY,
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_93C_WAIT_START,
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_93C_GET_OPCODE,
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_93C_WRITE_WORD,
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_93C_READ_WORD
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} T_STATE_93C;
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typedef struct
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T_STATE_93C state; /* current operation state */
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} T_EEPROM_93C;
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/* global variables */
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extern T_EEPROM_93C eeprom_93c;
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/* Function prototypes */
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extern void eeprom_93c_init(void);
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extern void eeprom_93c_write(unsigned char data);
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@ -45,141 +45,7 @@
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#include "../mem68k.h"
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#include "../membnk.h"
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#include "../state.h"
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/* Some notes from 8BitWizard (http://gendev.spritesmind.net/forum/viewtopic.php?t=206):
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*
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* Mode 1 (7-bit) - the chip takes a single byte with a 7-bit memory address and a R/W bit (X24C01)
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* Mode 2 (8-bit) - the chip takes a 7-bit device address and R/W bit followed by an 8-bit memory address;
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* the device address may contain up to three more memory address bits (24C01 - 24C16).
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* You can also string eight 24C01, four 24C02, two 24C08, or various combinations, set their address config lines correctly,
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* and the result appears exactly the same as a 24C16
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* Mode 3 (16-bit) - the chip takes a 7-bit device address and R/W bit followed by a 16-bit memory address (24C32 and larger)
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*
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*/
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typedef enum
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{
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STAND_BY = 0,
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WAIT_STOP,
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GET_DEVICE_ADR,
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GET_WORD_ADR_7BITS,
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GET_WORD_ADR_HIGH,
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GET_WORD_ADR_LOW,
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WRITE_DATA,
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READ_DATA
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} T_I2C_STATE;
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typedef enum
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{
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NO_EEPROM = -1,
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EEPROM_X24C01,
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EEPROM_X24C02,
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EEPROM_24C01,
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EEPROM_24C02,
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EEPROM_24C04,
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EEPROM_24C08,
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EEPROM_24C16,
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EEPROM_24C32,
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EEPROM_24C64,
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EEPROM_24C65,
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EEPROM_24C128,
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EEPROM_24C256,
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EEPROM_24C512
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} T_I2C_TYPE;
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typedef struct
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{
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uint8_t address_bits;
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uint16_t size_mask;
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uint16_t pagewrite_mask;
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} T_I2C_SPEC;
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static const T_I2C_SPEC i2c_specs[] =
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{
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{ 7 , 0x7F , 0x03},
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{ 8 , 0xFF , 0x03},
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{ 8 , 0x7F , 0x07},
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{ 8 , 0xFF , 0x07},
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{ 8 , 0x1FF , 0x0F},
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{ 8 , 0x3FF , 0x0F},
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{ 8 , 0x7FF , 0x0F},
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{16 , 0xFFF , 0x1F},
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{16 , 0x1FFF , 0x1F},
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{16 , 0x1FFF , 0x3F},
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{16 , 0x3FFF , 0x3F},
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{16 , 0x7FFF , 0x3F},
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{16 , 0xFFFF , 0x7F}
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};
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typedef struct
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{
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char id[16];
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uint32_t sp;
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uint16_t chk;
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void (*mapper_init)(void);
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T_I2C_TYPE eeprom_type;
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} T_I2C_GAME;
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static void mapper_i2c_ea_init(void);
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static void mapper_i2c_sega_init(void);
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static void mapper_i2c_acclaim_16M_init(void);
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static void mapper_i2c_acclaim_32M_init(void);
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static void mapper_i2c_jcart_init(void);
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static const T_I2C_GAME i2c_database[] =
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{
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{"T-50176" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* Rings of Power */
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{"T-50396" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* NHLPA Hockey 93 */
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{"T-50446" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* John Madden Football 93 */
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{"T-50516" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* John Madden Football 93 (Championship Ed.) */
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{"T-50606" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* Bill Walsh College Football (warning: invalid SRAM header !) */
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{" T-12046" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Megaman - The Wily Wars (warning: SRAM hack exists !) */
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{" T-12053" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Rockman Mega World (warning: SRAM hack exists !) */
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{"MK-1215" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Evander 'Real Deal' Holyfield's Boxing */
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{"MK-1228" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (U)(E) */
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{"G-5538" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (J) */
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{"PR-1993" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (Prototype) */
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{" G-4060" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Wonderboy in Monster World (warning: SRAM hack exists !) */
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{"00001211" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Sports Talk Baseball */
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{"00004076" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Honoo no Toukyuuji Dodge Danpei */
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{"G-4524" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Ninja Burai Densetsu */
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{"00054503" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Game Toshokan */
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{"T-81033" , 0 , 0 , mapper_i2c_acclaim_16M_init , EEPROM_X24C02 }, /* NBA Jam (J) */
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{"T-081326" , 0 , 0 , mapper_i2c_acclaim_16M_init , EEPROM_X24C02 }, /* NBA Jam (UE) */
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{"T-081276" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C02 }, /* NFL Quarterback Club */
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{"T-81406" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C04 }, /* NBA Jam TE */
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{"T-081586" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C16 }, /* NFL Quarterback Club '96 */
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{"T-81476" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C65 }, /* Frank Thomas Big Hurt Baseball */
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{"T-81576" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C65 }, /* College Slam */
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{"T-120106" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C08 }, /* Brian Lara Cricket */
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{"00000000" , 0x444e4c44 , 0x168B , mapper_i2c_jcart_init , EEPROM_24C08 }, /* Micro Machines Military */
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{"00000000" , 0x444e4c44 , 0x165E , mapper_i2c_jcart_init , EEPROM_24C16 }, /* Micro Machines Turbo Tournament 96 */
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{"T-120096" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C16 }, /* Micro Machines 2 - Turbo Tournament */
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{"T-120146" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C65 }, /* Brian Lara Cricket 96 / Shane Warne Cricket */
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{"00000000" , 0xfffffffc , 0x168B , mapper_i2c_jcart_init , NO_EEPROM }, /* Super Skidmarks */
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{"00000000" , 0xfffffffc , 0x165E , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis (Prototype) */
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{"T-120066" , 0 , 0 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis */
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{"T-123456" , 0 , 0 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis 96 */
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{"XXXXXXXX" , 0 , 0xDF39 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis 96 (Prototype ?) */
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};
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struct
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{
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uint8_t sda; /* current SDA line state */
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uint8_t scl; /* current SCL line state */
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uint8_t old_sda; /* previous SDA line state */
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uint8_t old_scl; /* previous SCL line state */
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uint8_t cycles; /* operation internal cycle (0-9) */
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uint8_t rw; /* operation type (1:READ, 0:WRITE) */
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uint16_t device_address; /* device address */
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uint16_t word_address; /* memory address */
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uint8_t buffer; /* write buffer */
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T_I2C_STATE state; /* current operation state */
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T_I2C_SPEC spec; /* EEPROM characteristics */
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uint8_t scl_in_bit; /* SCL (write) bit position */
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uint8_t sda_in_bit; /* SDA (write) bit position */
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uint8_t sda_out_bit; /* SDA (read) bit position */
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} eeprom_i2c;
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#include "eeprom_i2c.h"
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||||
/********************************************************************/
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||||
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@ -672,7 +538,7 @@ static void mapper_i2c_generic_write16(uint32_t address, uint32_t data)
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/* EA mapper (PWA P10003 & P10004 boards) */
|
||||
/********************************************************************/
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||||
|
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static void mapper_i2c_ea_init(void)
|
||||
void mapper_i2c_ea_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -699,7 +565,7 @@ static void mapper_i2c_ea_init(void)
|
|||
/* SEGA mapper (171-5878, 171-6111, 171-6304 & 171-6584 boards) */
|
||||
/********************************************************************/
|
||||
|
||||
static void mapper_i2c_sega_init(void)
|
||||
void mapper_i2c_sega_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -726,7 +592,7 @@ static void mapper_i2c_sega_init(void)
|
|||
/* ACCLAIM 16M mapper (P/N 670120 board) */
|
||||
/********************************************************************/
|
||||
|
||||
static void mapper_i2c_acclaim_16M_init(void)
|
||||
void mapper_i2c_acclaim_16M_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -797,7 +663,7 @@ static void mapper_acclaim_32M_write16(uint32_t address, uint32_t data)
|
|||
}
|
||||
}
|
||||
|
||||
static void mapper_i2c_acclaim_32M_init(void)
|
||||
void mapper_i2c_acclaim_32M_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -839,7 +705,7 @@ static uint32_t mapper_i2c_jcart_read16(uint32_t address)
|
|||
return ((eeprom_i2c_out() << 7) | jcart_read(address));
|
||||
}
|
||||
|
||||
static void mapper_i2c_jcart_init(void)
|
||||
void mapper_i2c_jcart_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
|
|||
|
|
@ -38,6 +38,141 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
/* Some notes from 8BitWizard (http://gendev.spritesmind.net/forum/viewtopic.php?t=206):
|
||||
*
|
||||
* Mode 1 (7-bit) - the chip takes a single byte with a 7-bit memory address and a R/W bit (X24C01)
|
||||
* Mode 2 (8-bit) - the chip takes a 7-bit device address and R/W bit followed by an 8-bit memory address;
|
||||
* the device address may contain up to three more memory address bits (24C01 - 24C16).
|
||||
* You can also string eight 24C01, four 24C02, two 24C08, or various combinations, set their address config lines correctly,
|
||||
* and the result appears exactly the same as a 24C16
|
||||
* Mode 3 (16-bit) - the chip takes a 7-bit device address and R/W bit followed by a 16-bit memory address (24C32 and larger)
|
||||
*
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
STAND_BY = 0,
|
||||
WAIT_STOP,
|
||||
GET_DEVICE_ADR,
|
||||
GET_WORD_ADR_7BITS,
|
||||
GET_WORD_ADR_HIGH,
|
||||
GET_WORD_ADR_LOW,
|
||||
WRITE_DATA,
|
||||
READ_DATA
|
||||
} T_I2C_STATE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
NO_EEPROM = -1,
|
||||
EEPROM_X24C01,
|
||||
EEPROM_X24C02,
|
||||
EEPROM_24C01,
|
||||
EEPROM_24C02,
|
||||
EEPROM_24C04,
|
||||
EEPROM_24C08,
|
||||
EEPROM_24C16,
|
||||
EEPROM_24C32,
|
||||
EEPROM_24C64,
|
||||
EEPROM_24C65,
|
||||
EEPROM_24C128,
|
||||
EEPROM_24C256,
|
||||
EEPROM_24C512
|
||||
} T_I2C_TYPE;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t address_bits;
|
||||
uint16_t size_mask;
|
||||
uint16_t pagewrite_mask;
|
||||
} T_I2C_SPEC;
|
||||
|
||||
static const T_I2C_SPEC i2c_specs[] =
|
||||
{
|
||||
{ 7 , 0x7F , 0x03},
|
||||
{ 8 , 0xFF , 0x03},
|
||||
{ 8 , 0x7F , 0x07},
|
||||
{ 8 , 0xFF , 0x07},
|
||||
{ 8 , 0x1FF , 0x0F},
|
||||
{ 8 , 0x3FF , 0x0F},
|
||||
{ 8 , 0x7FF , 0x0F},
|
||||
{16 , 0xFFF , 0x1F},
|
||||
{16 , 0x1FFF , 0x1F},
|
||||
{16 , 0x1FFF , 0x3F},
|
||||
{16 , 0x3FFF , 0x3F},
|
||||
{16 , 0x7FFF , 0x3F},
|
||||
{16 , 0xFFFF , 0x7F}
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
char id[16];
|
||||
uint32_t sp;
|
||||
uint16_t chk;
|
||||
void (*mapper_init)(void);
|
||||
T_I2C_TYPE eeprom_type;
|
||||
} T_I2C_GAME;
|
||||
|
||||
extern void mapper_i2c_ea_init(void);
|
||||
extern void mapper_i2c_sega_init(void);
|
||||
extern void mapper_i2c_acclaim_16M_init(void);
|
||||
extern void mapper_i2c_acclaim_32M_init(void);
|
||||
extern void mapper_i2c_jcart_init(void);
|
||||
|
||||
static const T_I2C_GAME i2c_database[] =
|
||||
{
|
||||
{"T-50176" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* Rings of Power */
|
||||
{"T-50396" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* NHLPA Hockey 93 */
|
||||
{"T-50446" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* John Madden Football 93 */
|
||||
{"T-50516" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* John Madden Football 93 (Championship Ed.) */
|
||||
{"T-50606" , 0 , 0 , mapper_i2c_ea_init , EEPROM_X24C01 }, /* Bill Walsh College Football (warning: invalid SRAM header !) */
|
||||
{" T-12046" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Megaman - The Wily Wars (warning: SRAM hack exists !) */
|
||||
{" T-12053" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Rockman Mega World (warning: SRAM hack exists !) */
|
||||
{"MK-1215" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Evander 'Real Deal' Holyfield's Boxing */
|
||||
{"MK-1228" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (U)(E) */
|
||||
{"G-5538" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (J) */
|
||||
{"PR-1993" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Greatest Heavyweights of the Ring (Prototype) */
|
||||
{" G-4060" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Wonderboy in Monster World (warning: SRAM hack exists !) */
|
||||
{"00001211" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Sports Talk Baseball */
|
||||
{"00004076" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Honoo no Toukyuuji Dodge Danpei */
|
||||
{"G-4524" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Ninja Burai Densetsu */
|
||||
{"00054503" , 0 , 0 , mapper_i2c_sega_init , EEPROM_X24C01 }, /* Game Toshokan */
|
||||
{"T-81033" , 0 , 0 , mapper_i2c_acclaim_16M_init , EEPROM_X24C02 }, /* NBA Jam (J) */
|
||||
{"T-081326" , 0 , 0 , mapper_i2c_acclaim_16M_init , EEPROM_X24C02 }, /* NBA Jam (UE) */
|
||||
{"T-081276" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C02 }, /* NFL Quarterback Club */
|
||||
{"T-81406" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C04 }, /* NBA Jam TE */
|
||||
{"T-081586" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C16 }, /* NFL Quarterback Club '96 */
|
||||
{"T-81476" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C65 }, /* Frank Thomas Big Hurt Baseball */
|
||||
{"T-81576" , 0 , 0 , mapper_i2c_acclaim_32M_init , EEPROM_24C65 }, /* College Slam */
|
||||
{"T-120106" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C08 }, /* Brian Lara Cricket */
|
||||
{"00000000" , 0x444e4c44 , 0x168B , mapper_i2c_jcart_init , EEPROM_24C08 }, /* Micro Machines Military */
|
||||
{"00000000" , 0x444e4c44 , 0x165E , mapper_i2c_jcart_init , EEPROM_24C16 }, /* Micro Machines Turbo Tournament 96 */
|
||||
{"T-120096" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C16 }, /* Micro Machines 2 - Turbo Tournament */
|
||||
{"T-120146" , 0 , 0 , mapper_i2c_jcart_init , EEPROM_24C65 }, /* Brian Lara Cricket 96 / Shane Warne Cricket */
|
||||
{"00000000" , 0xfffffffc , 0x168B , mapper_i2c_jcart_init , NO_EEPROM }, /* Super Skidmarks */
|
||||
{"00000000" , 0xfffffffc , 0x165E , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis (Prototype) */
|
||||
{"T-120066" , 0 , 0 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis */
|
||||
{"T-123456" , 0 , 0 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis 96 */
|
||||
{"XXXXXXXX" , 0 , 0xDF39 , mapper_i2c_jcart_init , NO_EEPROM }, /* Pete Sampras Tennis 96 (Prototype ?) */
|
||||
};
|
||||
|
||||
struct eeprom_i2c_t
|
||||
{
|
||||
uint8_t sda; /* current SDA line state */
|
||||
uint8_t scl; /* current SCL line state */
|
||||
uint8_t old_sda; /* previous SDA line state */
|
||||
uint8_t old_scl; /* previous SCL line state */
|
||||
uint8_t cycles; /* operation internal cycle (0-9) */
|
||||
uint8_t rw; /* operation type (1:READ, 0:WRITE) */
|
||||
uint16_t device_address; /* device address */
|
||||
uint16_t word_address; /* memory address */
|
||||
uint8_t buffer; /* write buffer */
|
||||
T_I2C_STATE state; /* current operation state */
|
||||
T_I2C_SPEC spec; /* EEPROM characteristics */
|
||||
uint8_t scl_in_bit; /* SCL (write) bit position */
|
||||
uint8_t sda_in_bit; /* SDA (write) bit position */
|
||||
uint8_t sda_out_bit; /* SDA (read) bit position */
|
||||
};
|
||||
|
||||
/* Function prototypes */
|
||||
extern void eeprom_i2c_init(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -39,47 +39,15 @@
|
|||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include "sram.h"
|
||||
|
||||
/* max supported size 64KB (25x512/95x512) */
|
||||
#define SIZE_MASK 0xffff
|
||||
#define PAGE_MASK 0x7f
|
||||
|
||||
/* hard-coded board implementation (!WP pin not used) */
|
||||
#define BIT_DATA (0)
|
||||
#define BIT_CLK (1)
|
||||
#define BIT_HOLD (2)
|
||||
#define BIT_CS (3)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
STANDBY,
|
||||
GET_OPCODE,
|
||||
GET_ADDRESS,
|
||||
WRITE_BYTE,
|
||||
READ_BYTE
|
||||
} T_STATE_SPI;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t cs; /* !CS line state */
|
||||
uint8_t clk; /* SCLK line state */
|
||||
uint8_t out; /* SO line state */
|
||||
uint8_t status; /* status register */
|
||||
uint8_t opcode; /* 8-bit opcode */
|
||||
uint8_t buffer; /* 8-bit data buffer */
|
||||
uint16_t addr; /* 16-bit address */
|
||||
uint32_t cycles; /* current operation cycle */
|
||||
T_STATE_SPI state; /* current operation state */
|
||||
} T_EEPROM_SPI;
|
||||
|
||||
static T_EEPROM_SPI spi_eeprom;
|
||||
#include "eeprom_spi.h"
|
||||
#include "state.h"
|
||||
|
||||
void eeprom_spi_init(void)
|
||||
{
|
||||
/* reset eeprom state */
|
||||
memset(&spi_eeprom, 0, sizeof(T_EEPROM_SPI));
|
||||
spi_eeprom.out = 1;
|
||||
spi_eeprom.state = GET_OPCODE;
|
||||
spi_eeprom.state = _SPI_GET_OPCODE;
|
||||
|
||||
/* enable backup RAM */
|
||||
sram.custom = 2;
|
||||
|
|
@ -98,14 +66,14 @@ void eeprom_spi_write(unsigned char data)
|
|||
spi_eeprom.cycles = 0;
|
||||
spi_eeprom.out = 1;
|
||||
spi_eeprom.opcode = 0;
|
||||
spi_eeprom.state = GET_OPCODE;
|
||||
spi_eeprom.state = _SPI_GET_OPCODE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* !CS low -> process current operation */
|
||||
switch (spi_eeprom.state)
|
||||
{
|
||||
case GET_OPCODE:
|
||||
case _SPI_GET_OPCODE:
|
||||
{
|
||||
/* latch data on CLK positive edge */
|
||||
if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
|
||||
|
|
@ -127,7 +95,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* WRITE STATUS */
|
||||
spi_eeprom.buffer = 0;
|
||||
spi_eeprom.state = WRITE_BYTE;
|
||||
spi_eeprom.state = _SPI_WRITE_BYTE;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -135,7 +103,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* WRITE BYTE */
|
||||
spi_eeprom.addr = 0;
|
||||
spi_eeprom.state = GET_ADDRESS;
|
||||
spi_eeprom.state = _SPI_GET_ADDRESS;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -143,7 +111,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* READ BYTE */
|
||||
spi_eeprom.addr = 0;
|
||||
spi_eeprom.state = GET_ADDRESS;
|
||||
spi_eeprom.state = _SPI_GET_ADDRESS;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -151,7 +119,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* WRITE DISABLE */
|
||||
spi_eeprom.status &= ~0x02;
|
||||
spi_eeprom.state = STANDBY;
|
||||
spi_eeprom.state = _SPI_STANDBY;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -159,7 +127,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* READ STATUS */
|
||||
spi_eeprom.buffer = spi_eeprom.status;
|
||||
spi_eeprom.state = READ_BYTE;
|
||||
spi_eeprom.state = _SPI_READ_BYTE;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -167,14 +135,14 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* WRITE ENABLE */
|
||||
spi_eeprom.status |= 0x02;
|
||||
spi_eeprom.state = STANDBY;
|
||||
spi_eeprom.state = _SPI_STANDBY;
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
{
|
||||
/* specific instructions (not supported) */
|
||||
spi_eeprom.state = STANDBY;
|
||||
spi_eeprom.state = _SPI_STANDBY;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -188,7 +156,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
break;
|
||||
}
|
||||
|
||||
case GET_ADDRESS:
|
||||
case _SPI_GET_ADDRESS:
|
||||
{
|
||||
/* latch data on CLK positive edge */
|
||||
if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
|
||||
|
|
@ -211,13 +179,13 @@ void eeprom_spi_write(unsigned char data)
|
|||
{
|
||||
/* READ operation */
|
||||
spi_eeprom.buffer = sram.sram[spi_eeprom.addr];
|
||||
spi_eeprom.state = READ_BYTE;
|
||||
spi_eeprom.state = _SPI_READ_BYTE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* WRITE operation */
|
||||
spi_eeprom.buffer = 0;
|
||||
spi_eeprom.state = WRITE_BYTE;
|
||||
spi_eeprom.state = _SPI_WRITE_BYTE;
|
||||
}
|
||||
}
|
||||
else
|
||||
|
|
@ -229,7 +197,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
break;
|
||||
}
|
||||
|
||||
case WRITE_BYTE:
|
||||
case _SPI_WRITE_BYTE:
|
||||
{
|
||||
/* latch data on CLK positive edge */
|
||||
if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
|
||||
|
|
@ -251,7 +219,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
spi_eeprom.status = (spi_eeprom.status & 0x02) | (spi_eeprom.buffer & 0x0c);
|
||||
|
||||
/* wait for operation end */
|
||||
spi_eeprom.state = STANDBY;
|
||||
spi_eeprom.state = _SPI_STANDBY;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -312,7 +280,7 @@ void eeprom_spi_write(unsigned char data)
|
|||
break;
|
||||
}
|
||||
|
||||
case READ_BYTE:
|
||||
case _SPI_READ_BYTE:
|
||||
{
|
||||
/* output data on CLK positive edge */
|
||||
if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
|
||||
|
|
|
|||
|
|
@ -38,6 +38,38 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
/* max supported size 64KB (25x512/95x512) */
|
||||
#define SIZE_MASK 0xffff
|
||||
#define PAGE_MASK 0x7f
|
||||
|
||||
/* hard-coded board implementation (!WP pin not used) */
|
||||
#define BIT_DATA (0)
|
||||
#define BIT_CLK (1)
|
||||
#define BIT_HOLD (2)
|
||||
#define BIT_CS (3)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
_SPI_STANDBY,
|
||||
_SPI_GET_OPCODE,
|
||||
_SPI_GET_ADDRESS,
|
||||
_SPI_WRITE_BYTE,
|
||||
_SPI_READ_BYTE
|
||||
} T_STATE_SPI;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t cs; /* !CS line state */
|
||||
uint8_t clk; /* SCLK line state */
|
||||
uint8_t out; /* SO line state */
|
||||
uint8_t status; /* status register */
|
||||
uint8_t opcode; /* 8-bit opcode */
|
||||
uint8_t buffer; /* 8-bit data buffer */
|
||||
uint16_t addr; /* 16-bit address */
|
||||
uint32_t cycles; /* current operation cycle */
|
||||
T_STATE_SPI state; /* current operation state */
|
||||
} T_EEPROM_SPI;
|
||||
|
||||
/* Function prototypes */
|
||||
extern void eeprom_spi_init(void);
|
||||
extern void eeprom_spi_write(unsigned char data);
|
||||
|
|
|
|||
|
|
@ -44,17 +44,9 @@
|
|||
#include "../genesis.h"
|
||||
#include "../m68k/m68k.h"
|
||||
#include "../mem68k.h"
|
||||
#include "../state.h"
|
||||
#include "ggenie.h"
|
||||
|
||||
static struct
|
||||
{
|
||||
uint8_t enabled;
|
||||
uint16_t regs[0x20];
|
||||
uint16_t old[6];
|
||||
uint16_t data[6];
|
||||
uint32_t addr[6];
|
||||
} ggenie;
|
||||
|
||||
static unsigned int ggenie_read_byte(unsigned int address);
|
||||
static unsigned int ggenie_read_word(unsigned int address);
|
||||
static void ggenie_write_byte(unsigned int address, unsigned int data);
|
||||
|
|
|
|||
|
|
@ -41,6 +41,17 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
struct ggenie_t
|
||||
{
|
||||
uint8_t enabled;
|
||||
uint16_t regs[0x20];
|
||||
uint16_t old[6];
|
||||
uint16_t data[6];
|
||||
uint32_t addr[6];
|
||||
};
|
||||
|
||||
/* Function prototypes */
|
||||
extern void ggenie_init(void);
|
||||
extern void ggenie_shutdown(void);
|
||||
|
|
|
|||
|
|
@ -44,29 +44,6 @@
|
|||
#include "../state.h"
|
||||
#include "sram.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t unlock;
|
||||
uint8_t bank0;
|
||||
uint8_t special;
|
||||
uint8_t writeEnable;
|
||||
uint8_t overlayEnable;
|
||||
uint8_t playbackLoop;
|
||||
uint8_t playbackLoopTrack;
|
||||
uint8_t playbackEndTrack;
|
||||
uint16_t result;
|
||||
uint16_t fadeoutStartVolume;
|
||||
int fadeoutSamplesTotal;
|
||||
int fadeoutSamplesCount;
|
||||
int playbackSamplesCount;
|
||||
int playbackLoopSector;
|
||||
int playbackEndSector;
|
||||
uint8_t buffer[0x800];
|
||||
} T_MEGASD_HW;
|
||||
|
||||
/* MegaSD mapper hardware */
|
||||
static T_MEGASD_HW megasd_hw;
|
||||
|
||||
/* Internal function prototypes */
|
||||
static void megasd_ctrl_write_byte(unsigned int address, unsigned int data);
|
||||
static void megasd_ctrl_write_word(unsigned int address, unsigned int data);
|
||||
|
|
|
|||
|
|
@ -38,6 +38,29 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t unlock;
|
||||
uint8_t bank0;
|
||||
uint8_t special;
|
||||
uint8_t writeEnable;
|
||||
uint8_t overlayEnable;
|
||||
uint8_t playbackLoop;
|
||||
uint8_t playbackLoopTrack;
|
||||
uint8_t playbackEndTrack;
|
||||
uint16_t result;
|
||||
uint16_t fadeoutStartVolume;
|
||||
int fadeoutSamplesTotal;
|
||||
int fadeoutSamplesCount;
|
||||
int playbackSamplesCount;
|
||||
int playbackLoopSector;
|
||||
int playbackEndSector;
|
||||
uint8_t buffer[0x800];
|
||||
} T_MEGASD_HW;
|
||||
|
||||
|
||||
extern void megasd_reset(void);
|
||||
extern void megasd_rom_mapper_w(unsigned int address, unsigned int data);
|
||||
extern void megasd_enhanced_ssf2_mapper_w(unsigned int address, unsigned int data);
|
||||
|
|
|
|||
|
|
@ -44,8 +44,6 @@
|
|||
#include "../state.h"
|
||||
#include "sram.h"
|
||||
|
||||
T_SRAM sram;
|
||||
|
||||
/****************************************************************************
|
||||
* A quick guide to external RAM on the Genesis
|
||||
*
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
#include "../../genesis.h"
|
||||
#include "../../m68k/m68k.h"
|
||||
#include "../../membnk.h"
|
||||
#include "../../state.h"
|
||||
#include "state.h"
|
||||
#include "svp.h"
|
||||
|
||||
svp_t *svp;
|
||||
|
|
|
|||
101
core/state.c
101
core/state.c
|
|
@ -1,5 +1,33 @@
|
|||
#include "state.h"
|
||||
|
||||
// cart_hw/areplay.c
|
||||
|
||||
struct action_replay_t action_replay;
|
||||
|
||||
// cart_hw/eeprom_93c.c
|
||||
|
||||
T_EEPROM_93C eeprom_93c;
|
||||
|
||||
// cart_hw/eeprom_i2c.c
|
||||
|
||||
struct eeprom_i2c_t eeprom_i2c;
|
||||
|
||||
// cart_hw/eeprom_spi.c
|
||||
|
||||
T_EEPROM_SPI spi_eeprom;
|
||||
|
||||
// cart_hw/ggenie.c
|
||||
|
||||
struct ggenie_t ggenie;
|
||||
|
||||
// cart_hw/megasd.c
|
||||
|
||||
T_MEGASD_HW megasd_hw;
|
||||
|
||||
// cart_hw/sram.c
|
||||
|
||||
T_SRAM sram;
|
||||
|
||||
// genesis.c
|
||||
|
||||
uint8_t boot_rom[0x800];
|
||||
|
|
@ -38,3 +66,76 @@ int16_t SVP_cycles = 800;
|
|||
uint8_t pause_b;
|
||||
EQSTATE eq[2];
|
||||
int16_t llp,rrp;
|
||||
|
||||
// vdp.c
|
||||
|
||||
uint8_t ALIGNED_(4) sat[0x400]; /* Internal copy of sprite attribute table */
|
||||
uint8_t ALIGNED_(4) vram[0x10000]; /* Video RAM (64K x 8-bit) */
|
||||
uint8_t ALIGNED_(4) cram[0x80]; /* On-chip color RAM (64 x 9-bit) */
|
||||
uint8_t ALIGNED_(4) vsram[0x80]; /* On-chip vertical scroll RAM (40 x 11-bit) */
|
||||
uint8_t reg[0x20]; /* Internal VDP registers (23 x 8-bit) */
|
||||
uint8_t hint_pending; /* 0= Line interrupt is pending */
|
||||
uint8_t vint_pending; /* 1= Frame interrupt is pending */
|
||||
uint16_t status; /* VDP status flags */
|
||||
uint32_t dma_length; /* DMA remaining length */
|
||||
uint32_t dma_endCycles; /* DMA end cycle */
|
||||
uint8_t dma_type; /* DMA mode */
|
||||
uint16_t ntab; /* Name table A base address */
|
||||
uint16_t ntbb; /* Name table B base address */
|
||||
uint16_t ntwb; /* Name table W base address */
|
||||
uint16_t satb; /* Sprite attribute table base address */
|
||||
uint16_t hscb; /* Horizontal scroll table base address */
|
||||
uint8_t bg_name_dirty[0x800]; /* 1= This pattern is dirty */
|
||||
uint16_t bg_name_list[0x800]; /* List of modified pattern indices */
|
||||
uint16_t bg_list_index; /* # of modified patterns in list */
|
||||
uint8_t hscroll_mask; /* Horizontal Scrolling line mask */
|
||||
uint8_t playfield_shift; /* Width of planes A, B (in bits) */
|
||||
uint8_t playfield_col_mask; /* Playfield column mask */
|
||||
uint16_t playfield_row_mask; /* Playfield row mask */
|
||||
uint16_t vscroll; /* Latched vertical scroll value */
|
||||
uint8_t odd_frame; /* 1: odd field, 0: even field */
|
||||
uint8_t im2_flag; /* 1= Interlace mode 2 is being used */
|
||||
uint8_t interlaced; /* 1: Interlaced mode 1 or 2 */
|
||||
uint8_t vdp_pal; /* 1: PAL , 0: NTSC (default) */
|
||||
uint8_t h_counter; /* Horizontal counter */
|
||||
uint16_t v_counter; /* Vertical counter */
|
||||
uint16_t vc_max; /* Vertical counter overflow value */
|
||||
uint16_t lines_per_frame; /* PAL: 313 lines, NTSC: 262 lines */
|
||||
uint16_t max_sprite_pixels; /* Max. sprites pixels per line (parsing & rendering) */
|
||||
uint32_t fifo_cycles[4]; /* VDP FIFO read-out cycles */
|
||||
uint32_t hvc_latch; /* latched HV counter */
|
||||
uint32_t vint_cycle; /* VINT occurence cycle */
|
||||
const uint8_t *hctab; /* pointer to H Counter table */
|
||||
|
||||
uint8_t border; /* Border color index */
|
||||
uint8_t pending; /* Pending write flag */
|
||||
uint8_t code; /* Code register */
|
||||
uint16_t addr; /* Address register */
|
||||
uint16_t addr_latch; /* Latched A15, A14 of address */
|
||||
uint16_t sat_base_mask; /* Base bits of SAT */
|
||||
uint16_t sat_addr_mask; /* Index bits of SAT */
|
||||
uint16_t dma_src; /* DMA source address */
|
||||
int dmafill; /* DMA Fill pending flag */
|
||||
int cached_write; /* 2nd part of 32-bit CTRL port write (Genesis mode) or LSB of CRAM data (Game Gear mode) */
|
||||
uint16_t fifo[4]; /* FIFO ring-buffer */
|
||||
int fifo_idx; /* FIFO write index */
|
||||
int fifo_byte_access; /* FIFO byte access flag */
|
||||
int *fifo_timing; /* FIFO slots timing table */
|
||||
int hblank_start_cycle; /* HBLANK flag set cycle */
|
||||
int hblank_end_cycle; /* HBLANK flag clear cycle */
|
||||
|
||||
// vdp_render.c
|
||||
|
||||
struct clip_t clip[2];
|
||||
uint8_t ALIGNED_(4) bg_pattern_cache[0x80000]; /* Cached and flipped patterns */
|
||||
uint8_t name_lut[0x400]; /* Sprite pattern name offset look-up table (Mode 5) */
|
||||
uint32_t bp_lut[0x10000]; /* Bitplane to packed pixel look-up table (Mode 4) */
|
||||
uint8_t lut[LUT_MAX][LUT_SIZE]; /* Layer priority pixel look-up tables */
|
||||
PIXEL_OUT_T pixel[0x100]; /* Output pixel data look-up tables*/
|
||||
PIXEL_OUT_T pixel_lut[3][0x200];
|
||||
PIXEL_OUT_T pixel_lut_m4[0x40];
|
||||
uint8_t linebuf[2][0x200]; /* Background & Sprite line buffers */
|
||||
uint8_t spr_ovr; /* Sprite limit flag */
|
||||
object_info_t obj_info[2][MAX_SPRITES_PER_LINE];
|
||||
uint8_t object_count[2]; /* Sprite Counter */
|
||||
uint16_t spr_col; /* Sprite Collision Info */
|
||||
120
core/state.h
120
core/state.h
|
|
@ -1,12 +1,55 @@
|
|||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include "cart_hw/areplay.h"
|
||||
#include "cart_hw/eeprom_93c.h"
|
||||
#include "cart_hw/eeprom_i2c.h"
|
||||
#include "cart_hw/eeprom_spi.h"
|
||||
#include "cart_hw/ggenie.h"
|
||||
#include "cart_hw/megasd.h"
|
||||
#include "cart_hw/sram.h"
|
||||
#include "sound/eq.h"
|
||||
#include "genesis.h"
|
||||
#include "io_ctrl.h"
|
||||
#include "loadrom.h"
|
||||
#include "membnk.h"
|
||||
#include "system.h"
|
||||
#include "sound/eq.h"
|
||||
#include "macros.h"
|
||||
#include "vdp_render.h"
|
||||
#include "ntsc/md_ntsc.h"
|
||||
#include "ntsc/sms_ntsc.h"
|
||||
|
||||
#pragma once
|
||||
// cart_hw/svp.h
|
||||
|
||||
// Special case, as svp is inside the cart.rom allocation
|
||||
|
||||
// cart_hw/areplay.h
|
||||
|
||||
extern struct action_replay_t action_replay;
|
||||
|
||||
// cart_hw/eeprom_93c.h
|
||||
|
||||
extern T_EEPROM_93C eeprom_93c;
|
||||
|
||||
// cart_hw/eeprom_i2c.h
|
||||
|
||||
extern struct eeprom_i2c_t eeprom_i2c;
|
||||
|
||||
// cart_hw/eeprom_spi.h
|
||||
|
||||
extern T_EEPROM_SPI spi_eeprom;
|
||||
|
||||
// cart_hw/ggenie.h
|
||||
|
||||
extern struct ggenie_t ggenie;
|
||||
|
||||
// cart_hw/megasd.h
|
||||
|
||||
extern T_MEGASD_HW megasd_hw;
|
||||
|
||||
// cart_hw/sram.h
|
||||
|
||||
extern T_SRAM sram;
|
||||
|
||||
// genesis.h
|
||||
|
||||
|
|
@ -46,3 +89,76 @@ extern int16_t SVP_cycles;
|
|||
extern uint8_t pause_b;
|
||||
extern EQSTATE eq[2];
|
||||
extern int16_t llp,rrp;
|
||||
|
||||
// vdp.h
|
||||
|
||||
extern uint8_t ALIGNED_(4) sat[0x400]; /* Internal copy of sprite attribute table */
|
||||
extern uint8_t ALIGNED_(4) vram[0x10000]; /* Video RAM (64K x 8-bit) */
|
||||
extern uint8_t ALIGNED_(4) cram[0x80]; /* On-chip color RAM (64 x 9-bit) */
|
||||
extern uint8_t ALIGNED_(4) vsram[0x80]; /* On-chip vertical scroll RAM (40 x 11-bit) */
|
||||
extern uint8_t reg[0x20]; /* Internal VDP registers (23 x 8-bit) */
|
||||
extern uint8_t hint_pending; /* 0= Line interrupt is pending */
|
||||
extern uint8_t vint_pending; /* 1= Frame interrupt is pending */
|
||||
extern uint16_t status; /* VDP status flags */
|
||||
extern uint32_t dma_length; /* DMA remaining length */
|
||||
extern uint32_t dma_endCycles; /* DMA end cycle */
|
||||
extern uint8_t dma_type; /* DMA mode */
|
||||
extern uint16_t ntab; /* Name table A base address */
|
||||
extern uint16_t ntbb; /* Name table B base address */
|
||||
extern uint16_t ntwb; /* Name table W base address */
|
||||
extern uint16_t satb; /* Sprite attribute table base address */
|
||||
extern uint16_t hscb; /* Horizontal scroll table base address */
|
||||
extern uint8_t bg_name_dirty[0x800]; /* 1= This pattern is dirty */
|
||||
extern uint16_t bg_name_list[0x800]; /* List of modified pattern indices */
|
||||
extern uint16_t bg_list_index; /* # of modified patterns in list */
|
||||
extern uint8_t hscroll_mask; /* Horizontal Scrolling line mask */
|
||||
extern uint8_t playfield_shift; /* Width of planes A, B (in bits) */
|
||||
extern uint8_t playfield_col_mask; /* Playfield column mask */
|
||||
extern uint16_t playfield_row_mask; /* Playfield row mask */
|
||||
extern uint16_t vscroll; /* Latched vertical scroll value */
|
||||
extern uint8_t odd_frame; /* 1: odd field, 0: even field */
|
||||
extern uint8_t im2_flag; /* 1= Interlace mode 2 is being used */
|
||||
extern uint8_t interlaced; /* 1: Interlaced mode 1 or 2 */
|
||||
extern uint8_t vdp_pal; /* 1: PAL , 0: NTSC (default) */
|
||||
extern uint8_t h_counter; /* Horizontal counter */
|
||||
extern uint16_t v_counter; /* Vertical counter */
|
||||
extern uint16_t vc_max; /* Vertical counter overflow value */
|
||||
extern uint16_t lines_per_frame; /* PAL: 313 lines, NTSC: 262 lines */
|
||||
extern uint16_t max_sprite_pixels; /* Max. sprites pixels per line (parsing & rendering) */
|
||||
extern uint32_t fifo_cycles[4]; /* VDP FIFO read-out cycles */
|
||||
extern uint32_t hvc_latch; /* latched HV counter */
|
||||
extern uint32_t vint_cycle; /* VINT occurence cycle */
|
||||
extern const uint8_t *hctab; /* pointer to H Counter table */
|
||||
|
||||
extern uint8_t border; /* Border color index */
|
||||
extern uint8_t pending; /* Pending write flag */
|
||||
extern uint8_t code; /* Code register */
|
||||
extern uint16_t addr; /* Address register */
|
||||
extern uint16_t addr_latch; /* Latched A15, A14 of address */
|
||||
extern uint16_t sat_base_mask; /* Base bits of SAT */
|
||||
extern uint16_t sat_addr_mask; /* Index bits of SAT */
|
||||
extern uint16_t dma_src; /* DMA source address */
|
||||
extern int dmafill; /* DMA Fill pending flag */
|
||||
extern int cached_write; /* 2nd part of 32-bit CTRL port write (Genesis mode) or LSB of CRAM data (Game Gear mode) */
|
||||
extern uint16_t fifo[4]; /* FIFO ring-buffer */
|
||||
extern int fifo_idx; /* FIFO write index */
|
||||
extern int fifo_byte_access; /* FIFO byte access flag */
|
||||
extern int *fifo_timing; /* FIFO slots timing table */
|
||||
extern int hblank_start_cycle; /* HBLANK flag set cycle */
|
||||
extern int hblank_end_cycle; /* HBLANK flag clear cycle */
|
||||
|
||||
// vdp_render.h
|
||||
|
||||
extern struct clip_t clip[2];
|
||||
extern uint8_t ALIGNED_(4) bg_pattern_cache[0x80000]; /* Cached and flipped patterns */
|
||||
extern uint8_t name_lut[0x400]; /* Sprite pattern name offset look-up table (Mode 5) */
|
||||
extern uint32_t bp_lut[0x10000]; /* Bitplane to packed pixel look-up table (Mode 4) */
|
||||
extern uint8_t lut[LUT_MAX][LUT_SIZE]; /* Layer priority pixel look-up tables */
|
||||
extern PIXEL_OUT_T pixel[0x100]; /* Output pixel data look-up tables*/
|
||||
extern PIXEL_OUT_T pixel_lut[3][0x200];
|
||||
extern PIXEL_OUT_T pixel_lut_m4[0x40];
|
||||
extern uint8_t linebuf[2][0x200]; /* Background & Sprite line buffers */
|
||||
extern uint8_t spr_ovr; /* Sprite limit flag */
|
||||
extern object_info_t obj_info[2][MAX_SPRITES_PER_LINE];
|
||||
extern uint8_t object_count[2]; /* Sprite Counter */
|
||||
extern uint16_t spr_col; /* Sprite Collision Info */
|
||||
|
|
@ -73,47 +73,6 @@
|
|||
#define HBLANK_H40_START_MCYCLE (228)
|
||||
#define HBLANK_H40_END_MCYCLE (872)
|
||||
|
||||
/* VDP context */
|
||||
uint8_t ALIGNED_(4) sat[0x400]; /* Internal copy of sprite attribute table */
|
||||
uint8_t ALIGNED_(4) vram[0x10000]; /* Video RAM (64K x 8-bit) */
|
||||
uint8_t ALIGNED_(4) cram[0x80]; /* On-chip color RAM (64 x 9-bit) */
|
||||
uint8_t ALIGNED_(4) vsram[0x80]; /* On-chip vertical scroll RAM (40 x 11-bit) */
|
||||
uint8_t reg[0x20]; /* Internal VDP registers (23 x 8-bit) */
|
||||
uint8_t hint_pending; /* 0= Line interrupt is pending */
|
||||
uint8_t vint_pending; /* 1= Frame interrupt is pending */
|
||||
uint16_t status; /* VDP status flags */
|
||||
uint32_t dma_length; /* DMA remaining length */
|
||||
uint32_t dma_endCycles; /* DMA end cycle */
|
||||
uint8_t dma_type; /* DMA mode */
|
||||
|
||||
/* Global variables */
|
||||
uint16_t ntab; /* Name table A base address */
|
||||
uint16_t ntbb; /* Name table B base address */
|
||||
uint16_t ntwb; /* Name table W base address */
|
||||
uint16_t satb; /* Sprite attribute table base address */
|
||||
uint16_t hscb; /* Horizontal scroll table base address */
|
||||
uint8_t bg_name_dirty[0x800]; /* 1= This pattern is dirty */
|
||||
uint16_t bg_name_list[0x800]; /* List of modified pattern indices */
|
||||
uint16_t bg_list_index; /* # of modified patterns in list */
|
||||
uint8_t hscroll_mask; /* Horizontal Scrolling line mask */
|
||||
uint8_t playfield_shift; /* Width of planes A, B (in bits) */
|
||||
uint8_t playfield_col_mask; /* Playfield column mask */
|
||||
uint16_t playfield_row_mask; /* Playfield row mask */
|
||||
uint16_t vscroll; /* Latched vertical scroll value */
|
||||
uint8_t odd_frame; /* 1: odd field, 0: even field */
|
||||
uint8_t im2_flag; /* 1= Interlace mode 2 is being used */
|
||||
uint8_t interlaced; /* 1: Interlaced mode 1 or 2 */
|
||||
uint8_t vdp_pal; /* 1: PAL , 0: NTSC (default) */
|
||||
uint8_t h_counter; /* Horizontal counter */
|
||||
uint16_t v_counter; /* Vertical counter */
|
||||
uint16_t vc_max; /* Vertical counter overflow value */
|
||||
uint16_t lines_per_frame; /* PAL: 313 lines, NTSC: 262 lines */
|
||||
uint16_t max_sprite_pixels; /* Max. sprites pixels per line (parsing & rendering) */
|
||||
uint32_t fifo_cycles[4]; /* VDP FIFO read-out cycles */
|
||||
uint32_t hvc_latch; /* latched HV counter */
|
||||
uint32_t vint_cycle; /* VINT occurence cycle */
|
||||
const uint8_t *hctab; /* pointer to H Counter table */
|
||||
|
||||
/* Function pointers */
|
||||
void (*vdp_68k_data_w)(unsigned int data);
|
||||
void (*vdp_z80_data_w)(unsigned int data);
|
||||
|
|
@ -146,23 +105,6 @@ static const uint8_t shift_table[] = { 6, 7, 0, 8 };
|
|||
static const uint8_t col_mask_table[] = { 0x0F, 0x1F, 0x0F, 0x3F };
|
||||
static const uint16_t row_mask_table[] = { 0x0FF, 0x1FF, 0x2FF, 0x3FF };
|
||||
|
||||
static uint8_t border; /* Border color index */
|
||||
static uint8_t pending; /* Pending write flag */
|
||||
static uint8_t code; /* Code register */
|
||||
static uint16_t addr; /* Address register */
|
||||
static uint16_t addr_latch; /* Latched A15, A14 of address */
|
||||
static uint16_t sat_base_mask; /* Base bits of SAT */
|
||||
static uint16_t sat_addr_mask; /* Index bits of SAT */
|
||||
static uint16_t dma_src; /* DMA source address */
|
||||
static int dmafill; /* DMA Fill pending flag */
|
||||
static int cached_write; /* 2nd part of 32-bit CTRL port write (Genesis mode) or LSB of CRAM data (Game Gear mode) */
|
||||
static uint16_t fifo[4]; /* FIFO ring-buffer */
|
||||
static int fifo_idx; /* FIFO write index */
|
||||
static int fifo_byte_access; /* FIFO byte access flag */
|
||||
static int *fifo_timing; /* FIFO slots timing table */
|
||||
static int hblank_start_cycle; /* HBLANK flag set cycle */
|
||||
static int hblank_end_cycle; /* HBLANK flag clear cycle */
|
||||
|
||||
/* set Z80 or 68k interrupt lines */
|
||||
static void (*set_irq_line)(unsigned int level);
|
||||
static void (*set_irq_line_delay)(unsigned int level);
|
||||
|
|
|
|||
|
|
@ -43,47 +43,6 @@
|
|||
|
||||
#include <stdint.h>
|
||||
|
||||
/* VDP context */
|
||||
extern uint8_t reg[0x20];
|
||||
extern uint8_t sat[0x400];
|
||||
extern uint8_t vram[0x10000];
|
||||
extern uint8_t cram[0x80];
|
||||
extern uint8_t vsram[0x80];
|
||||
extern uint8_t hint_pending;
|
||||
extern uint8_t vint_pending;
|
||||
extern uint16_t status;
|
||||
extern uint32_t dma_length;
|
||||
extern uint32_t dma_endCycles;
|
||||
extern uint8_t dma_type;
|
||||
|
||||
/* Global variables */
|
||||
extern uint16_t ntab;
|
||||
extern uint16_t ntbb;
|
||||
extern uint16_t ntwb;
|
||||
extern uint16_t satb;
|
||||
extern uint16_t hscb;
|
||||
extern uint8_t bg_name_dirty[0x800];
|
||||
extern uint16_t bg_name_list[0x800];
|
||||
extern uint16_t bg_list_index;
|
||||
extern uint8_t hscroll_mask;
|
||||
extern uint8_t playfield_shift;
|
||||
extern uint8_t playfield_col_mask;
|
||||
extern uint16_t playfield_row_mask;
|
||||
extern uint8_t odd_frame;
|
||||
extern uint8_t im2_flag;
|
||||
extern uint8_t interlaced;
|
||||
extern uint8_t vdp_pal;
|
||||
extern uint8_t h_counter;
|
||||
extern uint16_t v_counter;
|
||||
extern uint16_t vc_max;
|
||||
extern uint16_t vscroll;
|
||||
extern uint16_t lines_per_frame;
|
||||
extern uint16_t max_sprite_pixels;
|
||||
extern uint32_t fifo_cycles[4];
|
||||
extern uint32_t hvc_latch;
|
||||
extern uint32_t vint_cycle;
|
||||
extern const uint8_t *hctab;
|
||||
|
||||
/* Function pointers */
|
||||
extern void (*vdp_68k_data_w)(unsigned int data);
|
||||
extern void (*vdp_z80_data_w)(unsigned int data);
|
||||
|
|
|
|||
|
|
@ -51,80 +51,9 @@
|
|||
#include "vdp_render.h"
|
||||
#include "state.h"
|
||||
|
||||
#ifndef HAVE_NO_SPRITE_LIMIT
|
||||
#define MAX_SPRITES_PER_LINE 20
|
||||
#define TMS_MAX_SPRITES_PER_LINE 4
|
||||
#define MODE4_MAX_SPRITES_PER_LINE 8
|
||||
#define MODE5_MAX_SPRITES_PER_LINE (bitmap.viewport.w >> 4)
|
||||
#define MODE5_MAX_SPRITE_PIXELS max_sprite_pixels
|
||||
#endif
|
||||
|
||||
/*** NTSC Filters ***/
|
||||
extern md_ntsc_t *md_ntsc;
|
||||
extern sms_ntsc_t *sms_ntsc;
|
||||
|
||||
|
||||
/* Output pixels type*/
|
||||
#if defined(USE_8BPP_RENDERING)
|
||||
#define PIXEL_OUT_T uint8_t
|
||||
#elif defined(USE_32BPP_RENDERING)
|
||||
#define PIXEL_OUT_T uint32_t
|
||||
#else
|
||||
#define PIXEL_OUT_T uint16_t
|
||||
#endif
|
||||
|
||||
|
||||
/* Pixel priority look-up tables information */
|
||||
#define LUT_MAX (6)
|
||||
#define LUT_SIZE (0x10000)
|
||||
|
||||
|
||||
#ifdef ALIGN_LONG
|
||||
#undef READ_LONG
|
||||
#undef WRITE_LONG
|
||||
|
||||
INLINE uint32_t READ_LONG(void *address)
|
||||
{
|
||||
if ((uint32_t)address & 3)
|
||||
{
|
||||
#ifdef LSB_FIRST /* little endian version */
|
||||
return ( *((uint8_t *)address) +
|
||||
(*((uint8_t *)address+1) << 8) +
|
||||
(*((uint8_t *)address+2) << 16) +
|
||||
(*((uint8_t *)address+3) << 24) );
|
||||
#else /* big endian version */
|
||||
return ( *((uint8_t *)address+3) +
|
||||
(*((uint8_t *)address+2) << 8) +
|
||||
(*((uint8_t *)address+1) << 16) +
|
||||
(*((uint8_t *)address) << 24) );
|
||||
#endif /* LSB_FIRST */
|
||||
}
|
||||
else return *(uint32_t *)address;
|
||||
}
|
||||
|
||||
INLINE void WRITE_LONG(void *address, uint32_t data)
|
||||
{
|
||||
if ((uint32_t)address & 3)
|
||||
{
|
||||
#ifdef LSB_FIRST
|
||||
*((uint8_t *)address) = data;
|
||||
*((uint8_t *)address+1) = (data >> 8);
|
||||
*((uint8_t *)address+2) = (data >> 16);
|
||||
*((uint8_t *)address+3) = (data >> 24);
|
||||
#else
|
||||
*((uint8_t *)address+3) = data;
|
||||
*((uint8_t *)address+2) = (data >> 8);
|
||||
*((uint8_t *)address+1) = (data >> 16);
|
||||
*((uint8_t *)address) = (data >> 24);
|
||||
#endif /* LSB_FIRST */
|
||||
return;
|
||||
}
|
||||
else *(uint32_t *)address = data;
|
||||
}
|
||||
|
||||
#endif /* ALIGN_LONG */
|
||||
|
||||
|
||||
/* Draw 2-cell column (8-pixels high) */
|
||||
/*
|
||||
Pattern cache base address: VHN NNNNNNNN NNYYYxxx
|
||||
|
|
@ -500,14 +429,6 @@ INLINE void WRITE_LONG(void *address, uint32_t data)
|
|||
#define MAKE_PIXEL(r,g,b) ((0xff << 24) | (r) << 20 | (r) << 16 | (g) << 12 | (g) << 8 | (b) << 4 | (b))
|
||||
#endif
|
||||
|
||||
/* Window & Plane A clipping */
|
||||
static struct clip_t
|
||||
{
|
||||
uint8_t left;
|
||||
uint8_t right;
|
||||
uint8_t enable;
|
||||
} clip[2];
|
||||
|
||||
/* Pattern attribute (priority + palette bits) expansion table */
|
||||
static const uint32_t atex_table[] =
|
||||
{
|
||||
|
|
@ -568,53 +489,12 @@ static const uint32_t tms_palette[16] =
|
|||
};
|
||||
#endif
|
||||
|
||||
/* Cached and flipped patterns */
|
||||
static uint8_t ALIGNED_(4) bg_pattern_cache[0x80000];
|
||||
|
||||
/* Sprite pattern name offset look-up table (Mode 5) */
|
||||
static uint8_t name_lut[0x400];
|
||||
|
||||
/* Bitplane to packed pixel look-up table (Mode 4) */
|
||||
static uint32_t bp_lut[0x10000];
|
||||
|
||||
/* Layer priority pixel look-up tables */
|
||||
static uint8_t lut[LUT_MAX][LUT_SIZE];
|
||||
|
||||
/* Output pixel data look-up tables*/
|
||||
static PIXEL_OUT_T pixel[0x100];
|
||||
static PIXEL_OUT_T pixel_lut[3][0x200];
|
||||
static PIXEL_OUT_T pixel_lut_m4[0x40];
|
||||
|
||||
/* Background & Sprite line buffers */
|
||||
static uint8_t linebuf[2][0x200];
|
||||
|
||||
/* Sprite limit flag */
|
||||
static uint8_t spr_ovr;
|
||||
|
||||
/* Sprite parsing lists */
|
||||
typedef struct
|
||||
{
|
||||
uint16_t ypos;
|
||||
uint16_t xpos;
|
||||
uint16_t attr;
|
||||
uint16_t size;
|
||||
} object_info_t;
|
||||
|
||||
static object_info_t obj_info[2][MAX_SPRITES_PER_LINE];
|
||||
|
||||
/* Sprite Counter */
|
||||
static uint8_t object_count[2];
|
||||
|
||||
/* Sprite Collision Info */
|
||||
uint16_t spr_col;
|
||||
|
||||
/* Function pointers */
|
||||
void (*render_bg)(int line);
|
||||
void (*render_obj)(int line);
|
||||
void (*parse_satb)(int line);
|
||||
void (*update_bg_pattern_cache)(int index);
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Sprite pattern name offset look-up table function (Mode 5) */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -100,8 +100,90 @@
|
|||
*out++ = PIXEL(r,g,b); \
|
||||
}
|
||||
|
||||
/* Global variables */
|
||||
extern uint16_t spr_col;
|
||||
/* Window & Plane A clipping */
|
||||
struct clip_t
|
||||
{
|
||||
uint8_t left;
|
||||
uint8_t right;
|
||||
uint8_t enable;
|
||||
};
|
||||
|
||||
/* Sprite parsing lists */
|
||||
typedef struct
|
||||
{
|
||||
uint16_t ypos;
|
||||
uint16_t xpos;
|
||||
uint16_t attr;
|
||||
uint16_t size;
|
||||
} object_info_t;
|
||||
|
||||
#ifndef HAVE_NO_SPRITE_LIMIT
|
||||
#define MAX_SPRITES_PER_LINE 20
|
||||
#define TMS_MAX_SPRITES_PER_LINE 4
|
||||
#define MODE4_MAX_SPRITES_PER_LINE 8
|
||||
#define MODE5_MAX_SPRITES_PER_LINE (bitmap.viewport.w >> 4)
|
||||
#define MODE5_MAX_SPRITE_PIXELS max_sprite_pixels
|
||||
#endif
|
||||
|
||||
/* Output pixels type*/
|
||||
#if defined(USE_8BPP_RENDERING)
|
||||
#define PIXEL_OUT_T uint8_t
|
||||
#elif defined(USE_32BPP_RENDERING)
|
||||
#define PIXEL_OUT_T uint32_t
|
||||
#else
|
||||
#define PIXEL_OUT_T uint16_t
|
||||
#endif
|
||||
|
||||
|
||||
/* Pixel priority look-up tables information */
|
||||
#define LUT_MAX (6)
|
||||
#define LUT_SIZE (0x10000)
|
||||
|
||||
#ifdef ALIGN_LONG
|
||||
#undef READ_LONG
|
||||
#undef WRITE_LONG
|
||||
|
||||
INLINE uint32_t READ_LONG(void *address)
|
||||
{
|
||||
if ((uint32_t)address & 3)
|
||||
{
|
||||
#ifdef LSB_FIRST /* little endian version */
|
||||
return ( *((uint8_t *)address) +
|
||||
(*((uint8_t *)address+1) << 8) +
|
||||
(*((uint8_t *)address+2) << 16) +
|
||||
(*((uint8_t *)address+3) << 24) );
|
||||
#else /* big endian version */
|
||||
return ( *((uint8_t *)address+3) +
|
||||
(*((uint8_t *)address+2) << 8) +
|
||||
(*((uint8_t *)address+1) << 16) +
|
||||
(*((uint8_t *)address) << 24) );
|
||||
#endif /* LSB_FIRST */
|
||||
}
|
||||
else return *(uint32_t *)address;
|
||||
}
|
||||
|
||||
INLINE void WRITE_LONG(void *address, uint32_t data)
|
||||
{
|
||||
if ((uint32_t)address & 3)
|
||||
{
|
||||
#ifdef LSB_FIRST
|
||||
*((uint8_t *)address) = data;
|
||||
*((uint8_t *)address+1) = (data >> 8);
|
||||
*((uint8_t *)address+2) = (data >> 16);
|
||||
*((uint8_t *)address+3) = (data >> 24);
|
||||
#else
|
||||
*((uint8_t *)address+3) = data;
|
||||
*((uint8_t *)address+2) = (data >> 8);
|
||||
*((uint8_t *)address+1) = (data >> 16);
|
||||
*((uint8_t *)address) = (data >> 24);
|
||||
#endif /* LSB_FIRST */
|
||||
return;
|
||||
}
|
||||
else *(uint32_t *)address = data;
|
||||
}
|
||||
|
||||
#endif /* ALIGN_LONG */
|
||||
|
||||
|
||||
/* Function prototypes */
|
||||
extern void render_init(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user