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https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-05 02:15:07 +01:00
moved FM timers back to integer, fixed libsamplerate warnings
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@ -49,10 +49,10 @@
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#undef HAVE_LIBM
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/* Define if you have C99's lrint function. */
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#define HAVE_LRINT 0
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#define HAVE_LRINT 1
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/* Define if you have C99's lrintf function. */
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#define HAVE_LRINTF 0
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#define HAVE_LRINTF 1
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/* Define to 1 if you have the `malloc' function. */
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#undef HAVE_MALLOC
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@ -540,17 +540,17 @@ typedef struct
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int clock; /* master clock (Hz) */
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int rate; /* sampling rate (Hz) */
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double freqbase; /* frequency base */
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int TimerBase; /* Timer base time */
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UINT8 address[2]; /* address register */
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UINT8 status; /* status flag */
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UINT32 mode; /* mode CSM / 3SLOT */
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UINT8 fn_h; /* freq latch */
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int TimerBase; /* Timer base time */
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int TA; /* timer a value */
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double TAL; /* timer a base */
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double TAC; /* timer a counter */
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int TAL; /* timer a base */
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int TAC; /* timer a counter */
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int TB; /* timer b */
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double TBL; /* timer b base */
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double TBC; /* timer b counter */
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int TBL; /* timer b base */
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int TBC; /* timer b counter */
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/* local time tables */
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INT32 dt_tab[8][32];/* DeTune table */
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@ -1065,10 +1065,10 @@ INLINE void update_phase_lfo_slot(FM_SLOT *SLOT , INT32 pms, UINT32 block_fnum)
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/* keyscale code */
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int kc = (blk<<2) | opn_fktable[fn >> 8];
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/* phase increment counter */
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/* (frequency) phase increment counter */
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int fc = (ym2612.OPN.fn_table[fn]>>(7-blk)) + SLOT->DT[kc];
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/* detects frequency overflow (credits to Nemesis) */
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/* (frequency) phase overflow (credits to Nemesis) */
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if (fc < 0) fc += fn_max;
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/* update phase */
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@ -1097,10 +1097,10 @@ INLINE void update_phase_lfo_channel(FM_CH *CH)
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/* keyscale code */
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int kc = (blk<<2) | opn_fktable[fn >> 8];
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/* phase increment counter */
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/* (frequency) phase increment counter */
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int fc = (ym2612.OPN.fn_table[fn]>>(7-blk));
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/* detects frequency overflow (credits to Nemesis) */
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/* (frequency) phase overflow (credits to Nemesis) */
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int finc = fc + CH->SLOT[SLOT1].DT[kc];
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if (finc < 0) finc += fn_max;
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CH->SLOT[SLOT1].phase += (finc*CH->SLOT[SLOT1].mul) >> 1;
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@ -1206,7 +1206,7 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , int fc , int kc )
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fc += SLOT->DT[kc];
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/* detects frequency overflow (credits to Nemesis) */
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/* (frequency) phase overflow (credits to Nemesis) */
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if (fc < 0) fc += fn_max;
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/* (frequency) phase increment counter */
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@ -1421,7 +1421,7 @@ static void INTERNAL_TIMER_B(int step)
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{
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if (ym2612.OPN.ST.mode & 0x02)
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{
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if ((ym2612.OPN.ST.TBC -= (ym2612.OPN.ST.TimerBase * (double)step)) <= 0)
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if ((ym2612.OPN.ST.TBC -= (ym2612.OPN.ST.TimerBase * step)) <= 0)
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{
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/* set status (if enabled) */
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if (ym2612.OPN.ST.mode & 0x08) ym2612.OPN.ST.status |= 0x02;
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@ -1437,28 +1437,25 @@ static void OPNSetPres(int pres)
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{
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int i;
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if (config.hq_fm)
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{
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ym2612.OPN.ST.rate = ym2612.OPN.ST.clock / pres;
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}
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/* frequency base */
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ym2612.OPN.ST.freqbase = ((double) ym2612.OPN.ST.clock / (double) ym2612.OPN.ST.rate) / ((double) pres);
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ym2612.OPN.ST.freqbase = ((double) ym2612.OPN.ST.clock / (double) ym2612.OPN.ST.rate) / ((double) pres);
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/* YM2612 running at original frequency (~53 kHz) */
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if (config.hq_fm) ym2612.OPN.ST.freqbase = 1.0;
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/* timer increment in usecs (timers are incremented after each updated samples) */
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ym2612.OPN.ST.TimerBase = 1000000.0 / (double)ym2612.OPN.ST.rate;
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ym2612.OPN.ST.TimerBase = (int) (ym2612.OPN.ST.freqbase * 4096.0);
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ym2612.OPN.eg_timer_add = (UINT32)((1<<EG_SH) * ym2612.OPN.ST.freqbase);
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//ym2612.OPN.eg_timer_overflow = ( 3 ) * (1<<EG_SH);
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ym2612.OPN.eg_timer_overflow = (351 * (1<<EG_SH)) / 144; /* correct frequency (Nemesis: tested on real HW) */
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/* make time tables */
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init_timetables(dt_tab);
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/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
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but LFO works with one more bit of a precision so we really need 4096 elements */
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but LFO works with one more bit of a precision so we really need 4096 elements */
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/* calculate fnumber -> increment counter table */
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for(i = 0; i < 4096; i++)
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{
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@ -1503,15 +1500,15 @@ static void OPNWriteMode(int r, int v)
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break;
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case 0x24: /* timer A High 8*/
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ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2);
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ym2612.OPN.ST.TAL = fm_timera_tab[ym2612.OPN.ST.TA];
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << 12;
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break;
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case 0x25: /* timer A Low 2*/
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ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x3fc)|(v&3);
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ym2612.OPN.ST.TAL = fm_timera_tab[ym2612.OPN.ST.TA];
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << 12;
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break;
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case 0x26: /* timer B */
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ym2612.OPN.ST.TB = v;
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ym2612.OPN.ST.TBL = fm_timerb_tab[ym2612.OPN.ST.TB];
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ym2612.OPN.ST.TBL = (256 - ym2612.OPN.ST.TB) << 16;
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break;
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case 0x27: /* mode, timer control */
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set_timers(v);
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@ -41,8 +41,6 @@ static SRC_DATA data;
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/* YM2612 data */
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int fm_reg[2][0x100]; /* Register arrays (2x256) */
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double fm_timera_tab[0x400]; /* Precalculated timer A values (in usecs) */
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double fm_timerb_tab[0x100]; /* Precalculated timer B values (in usecs) */
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/* return the number of samples that should have been rendered so far */
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static inline uint32 fm_sample_cnt(uint8 is_z80)
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@ -93,18 +91,9 @@ static inline void psg_update()
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void sound_init(int rate)
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{
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int i;
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double vclk = Master_Clock / 7.0; /* 68000 and YM2612 clock */
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double zclk = Master_Clock / 15.0; /* Z80 and SN76489 clock */
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/* Make Timer A table */
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/* Formula is "time(us) = (1024 - A) * 144 * 1000000 / clock" */
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for(i = 0; i < 1024; i += 1) fm_timera_tab[i] = ((double)((1024 - i) * 144) * 1000000.0 / vclk);
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/* Make Timer B table */
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/* Formula is "time(us) = 16 * (256 - B) * 144 * 1000000 / clock" */
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for(i = 0; i < 256; i += 1) fm_timerb_tab[i] = ((double)((256 - i) * 16 * 144) * 1000000.0 / vclk);
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/* cycle-accurate FM samples */
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if (config.hq_fm && !config.fm_core)
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{
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