mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-25 02:31:49 +01:00
fixed cart mapper, code cleanup
This commit is contained in:
ekeeke31
parent
0165ac387f
commit
c4c78f58be
@ -3,7 +3,7 @@
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* Genesis Plus 1.2a
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* Cartridge Hardware support
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*
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* code by Eke-Eke, GC/Wii port
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* Copyright (C) Eke-Eke, GC/Wii port
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*
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* Most cartridge protections documented by Haze
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* (http://haze.mameworld.info/)
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@ -112,7 +112,7 @@ T_CART_ENTRY rom_database[CART_CNT] =
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/* previous inputs */
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static int old_system[2] = {-1,-1};
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int old_system[2] = {-1,-1};
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/* temporary memory chunk */
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uint8 mem_chunk[0x10000];
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@ -341,9 +341,6 @@ void cart_hw_init()
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***********************************************/
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memset(&cart_hw, 0, sizeof(cart_hw));
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/* default write handler for !TIME signal */
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cart_hw.time_w = default_time_w;
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/* search for game into database */
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for (i=0; i < CART_CNT + 1; i++)
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{
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@ -405,11 +402,15 @@ void cart_hw_init()
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/* assume SSF2 mapper */
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cart_hw.bankshift = 1;
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}
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/* default write handler for !TIME signal */
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if (!cart_hw.time_w) cart_hw.time_w = default_time_w;
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}
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/************************************************************
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MAPPER handlers
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*************************************************************/
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/*
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"official" ROM/RAM switch
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*/
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@ -492,7 +493,7 @@ void special_mapper_w(uint32 address, uint32 data)
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Realtec ROM Bankswitch (Earth Defend, Balloon Boy & Funny World, Whac-A-Critter)
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*/
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void realtec_mapper_w(uint32 address, uint32 data)
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{
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{
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int i;
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uint32 base;
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@ -551,7 +552,7 @@ void seganet_mapper_w(uint32 address, uint32 data)
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else
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{
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/* ROM Write enabled */
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for (i=0; i<0x40; i++);
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for (i=0; i<0x40; i++)
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{
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m68k_memory_map[i].write8 = NULL;
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m68k_memory_map[i].write16 = NULL;
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@ -571,7 +572,7 @@ uint32 radica_mapper_r(uint32 address)
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/* 64 x 64k banks */
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for (i = 0; i < 64; i++)
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{
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{
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m68k_memory_map[i].base = &cart_rom[((address++)& 0x3f)<< 16];
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}
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return 0xff;
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@ -2,7 +2,7 @@
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* Genesis Plus 1.2a
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* Cartridge Hardware support
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*
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* code by Eke-Eke, GC/Wii port
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* Copyright (C) Eke-Eke, GC/Wii port
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*
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* Lots of protection mechanism have been discovered by Haze
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* (http://haze.mameworld.info/)
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@ -2,7 +2,7 @@
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* Genesis Plus 1.2a
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* Serial EEPROM support
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*
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* code by Eke-Eke, GC/Wii port
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* Copyright (C) Eke-Eke, GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -2,7 +2,7 @@
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* Genesis Plus 1.2a
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* Serial EEPROM support
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*
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* code by Eke-Eke, GC/Wii port
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* Copyright (C) Eke-Eke, GC/Wii port
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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182
source/mem68k.c
182
source/mem68k.c
@ -28,22 +28,6 @@ uint32 m68k_read_bus_8(uint32 address)
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{
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#ifdef LOGERROR
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error("Unused read8 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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error("D0 = %x \n", m68k_get_reg (NULL, M68K_REG_D0));
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error("D1 = %x \n", m68k_get_reg (NULL, M68K_REG_D1));
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error("D2 = %x \n", m68k_get_reg (NULL, M68K_REG_D2));
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error("D3 = %x \n", m68k_get_reg (NULL, M68K_REG_D3));
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error("D4 = %x \n", m68k_get_reg (NULL, M68K_REG_D4));
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error("D5 = %x \n", m68k_get_reg (NULL, M68K_REG_D5));
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error("D6 = %x \n", m68k_get_reg (NULL, M68K_REG_D6));
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error("D7 = %x \n", m68k_get_reg (NULL, M68K_REG_D7));
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error("A0 = %x \n", m68k_get_reg (NULL, M68K_REG_A0));
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error("A1 = %x \n", m68k_get_reg (NULL, M68K_REG_A1));
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error("A2 = %x \n", m68k_get_reg (NULL, M68K_REG_A2));
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error("A3 = %x \n", m68k_get_reg (NULL, M68K_REG_A3));
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error("A4 = %x \n", m68k_get_reg (NULL, M68K_REG_A4));
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error("A5 = %x \n", m68k_get_reg (NULL, M68K_REG_A5));
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error("A6 = %x \n", m68k_get_reg (NULL, M68K_REG_A6));
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error("A7 = %x \n", m68k_get_reg (NULL, M68K_REG_A7));
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#endif
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return m68k_read_pcrelative_8(REG_PC | (address&1));
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@ -53,22 +37,6 @@ uint32 m68k_read_bus_16(uint32 address)
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{
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#ifdef LOGERROR
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error("Unused read16 %08X (%08X)\n", address, m68k_get_reg (NULL, M68K_REG_PC));
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error("D0 = %x \n", m68k_get_reg (NULL, M68K_REG_D0));
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error("D1 = %x \n", m68k_get_reg (NULL, M68K_REG_D1));
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error("D2 = %x \n", m68k_get_reg (NULL, M68K_REG_D2));
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error("D3 = %x \n", m68k_get_reg (NULL, M68K_REG_D3));
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error("D4 = %x \n", m68k_get_reg (NULL, M68K_REG_D4));
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error("D5 = %x \n", m68k_get_reg (NULL, M68K_REG_D5));
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error("D6 = %x \n", m68k_get_reg (NULL, M68K_REG_D6));
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error("D7 = %x \n", m68k_get_reg (NULL, M68K_REG_D7));
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error("A0 = %x \n", m68k_get_reg (NULL, M68K_REG_A0));
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error("A1 = %x \n", m68k_get_reg (NULL, M68K_REG_A1));
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error("A2 = %x \n", m68k_get_reg (NULL, M68K_REG_A2));
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error("A3 = %x \n", m68k_get_reg (NULL, M68K_REG_A3));
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error("A4 = %x \n", m68k_get_reg (NULL, M68K_REG_A4));
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error("A5 = %x \n", m68k_get_reg (NULL, M68K_REG_A5));
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error("A6 = %x \n", m68k_get_reg (NULL, M68K_REG_A6));
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error("A7 = %x \n", m68k_get_reg (NULL, M68K_REG_A7));
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#endif
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return m68k_read_pcrelative_16(REG_PC);
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}
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@ -143,43 +111,35 @@ static int pico_page[7] = {0x00,0x01,0x03,0x07,0x0F,0x1F,0x3F};
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uint32 eeprom_read_byte(uint32 address)
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{
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if (address == eeprom.type.sda_out_adr)
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return eeprom_read(address, 0);
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else
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return READ_BYTE(cart_rom, address);
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if (address == eeprom.type.sda_out_adr) return eeprom_read(address, 0);
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else return READ_BYTE(cart_rom, address);
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}
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uint32 eeprom_read_word(uint32 address)
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{
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if (address == (eeprom.type.sda_out_adr & 0xfffffe))
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return eeprom_read(address, 1);
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else
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return *(uint16 *)(cart_rom + address);
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if (address == (eeprom.type.sda_out_adr & 0xfffffe)) return eeprom_read(address, 1);
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else return *(uint16 *)(cart_rom + address);
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}
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void eeprom_write_byte(uint32 address, uint32 data)
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{
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if ((address == eeprom.type.sda_in_adr) ||
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(address == eeprom.type.scl_adr))
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if ((address == eeprom.type.sda_in_adr) || (address == eeprom.type.scl_adr))
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eeprom_write(address, data, 0);
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else
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m68k_unused_8_w(address, data);
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else m68k_unused_8_w(address, data);
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}
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void eeprom_write_word(uint32 address, uint32 data)
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{
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if ((address == (eeprom.type.sda_in_adr&0xfffffe)) ||
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(address == (eeprom.type.scl_adr&0xfffffe)))
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if ((address == (eeprom.type.sda_in_adr&0xfffffe)) || (address == (eeprom.type.scl_adr&0xfffffe)))
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eeprom_write(address, data, 1);
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else
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m68k_unused_16_w (address, data);
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else m68k_unused_16_w (address, data);
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}
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/******* Z80 *************************************************/
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uint32 z80_read_byte(uint32 address)
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{
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{
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if (zbusack) return m68k_read_bus_8(address);
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switch ((address >> 13) & 3)
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@ -188,15 +148,13 @@ uint32 z80_read_byte(uint32 address)
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return fm_read(0, address & 3);
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case 3: /* MISC */
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if ((address & 0xff00) == 0x7f00)
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return m68k_lockup_r_8(address); /* VDP */
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else
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return (m68k_read_bus_8(address) | 0xff);
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if ((address & 0xff00) == 0x7f00) return m68k_lockup_r_8(address); /* VDP */
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else return (m68k_read_bus_8(address) | 0xff);
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default: /* ZRAM */
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return zram[address & 0x1fff];
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}
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}
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}
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uint32 z80_read_word(uint32 address)
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{
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@ -211,10 +169,8 @@ uint32 z80_read_word(uint32 address)
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}
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case 3: /* MISC */
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if ((address & 0xff00) == 0x7f00)
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return m68k_lockup_r_16(address); /* VDP */
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else
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return (m68k_read_bus_16(address) | 0xffff);
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if ((address & 0xff00) == 0x7f00) return m68k_lockup_r_16(address); /* VDP */
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else return (m68k_read_bus_16(address) | 0xffff);
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default: /* ZRAM */
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{
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@ -222,7 +178,7 @@ uint32 z80_read_word(uint32 address)
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return (temp << 8 | temp);
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}
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}
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}
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}
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void z80_write_byte(uint32 address, uint32 data)
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{
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@ -259,10 +215,10 @@ void z80_write_byte(uint32 address, uint32 data)
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count_m68k++; /* Z80 bus latency (Pacman 2: New Adventures) */
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return;
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}
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}
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}
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void z80_write_word(uint32 address, uint32 data)
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{
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{
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/* Z80 still hold the bus ? */
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if (zbusack)
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{
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@ -302,27 +258,20 @@ void z80_write_word(uint32 address, uint32 data)
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/******* I/O & CTRL ******************************************/
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uint32 ctrl_io_read_byte(uint32 address)
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{
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/* I/O & CONTROL REGISTERS */
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0)
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return m68k_read_bus_8(address);
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else
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return (io_read((address >> 1) & 0x0f));
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if (address & 0xe0) return m68k_read_bus_8(address);
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else return (io_read((address >> 1) & 0x0f));
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case 0x11: /* BUSACK */
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if (address & 1)
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return m68k_read_bus_8(address);
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else
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return ((m68k_read_pcrelative_8(REG_PC) & 0xfe) | zbusack);
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if (address & 1) return m68k_read_bus_8(address);
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else return ((m68k_read_pcrelative_8(REG_PC) & 0xfe) | zbusack);
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case 0x30: /* TIME */
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if (cart_hw.time_r)
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return cart_hw.time_r(address);
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else
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return m68k_read_bus_8(address);
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if (cart_hw.time_r) return cart_hw.time_r(address);
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else return m68k_read_bus_8(address);
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case 0x10: /* MEMORY MODE */
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case 0x12: /* RESET */
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@ -336,16 +285,15 @@ uint32 ctrl_io_read_byte(uint32 address)
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default: /* Invalid address */
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return m68k_lockup_r_8(address);
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}
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}
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}
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uint32 ctrl_io_read_word(uint32 address)
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{
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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{
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if (address & 0xe0)
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return m68k_read_bus_16(address);
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if (address & 0xe0) return m68k_read_bus_16(address);
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int temp = io_read((address >> 1) & 0x0f);
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return (temp << 8 | temp);
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}
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@ -353,33 +301,21 @@ uint32 ctrl_io_read_word(uint32 address)
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case 0x11: /* BUSACK */
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return ((m68k_read_pcrelative_16(REG_PC) & 0xfeff) | (zbusack << 8));
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case 0x30: /* TIME */
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if (cart_hw.time_r) return cart_hw.time_r(address);
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else return m68k_read_bus_16(address);
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case 0x50: /* SVP */
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if (svp)
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{
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switch (address & 0xff)
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{
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case 0:
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case 2:
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return svp->ssp1601.gr[SSP_XST].h;
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case 4:
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if ((address & 0xfd) == 0) return svp->ssp1601.gr[SSP_XST].h;
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else if ((address & 0xff) == 4)
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{
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uint32 temp = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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return temp;
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}
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default:
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return m68k_read_bus_16(address);
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}
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}
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else
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return m68k_read_bus_16(address);
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case 0x30: /* TIME */
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if (cart_hw.time_r)
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return cart_hw.time_r(address);
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else
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return m68k_read_bus_16(address);
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case 0x10: /* MEMORY MODE */
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@ -393,38 +329,29 @@ uint32 ctrl_io_read_word(uint32 address)
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default: /* Invalid address */
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return m68k_lockup_r_16(address);
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}
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}
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}
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void ctrl_io_write_byte(uint32 address, uint32 data)
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{
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if ((address & 0xe1) == 0x01)
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io_write((address >> 1) & 0x0f, data); /* get /LWR only */
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else
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m68k_unused_8_w(address, data);
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if ((address & 0xe1) == 0x01) io_write((address >> 1) & 0x0f, data); /* get /LWR only */
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else m68k_unused_8_w(address, data);
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return;
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case 0x11: /* BUSREQ */
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if (address & 1)
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m68k_unused_8_w(address, data);
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else
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gen_busreq_w(data & 1);
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if (address & 1) m68k_unused_8_w(address, data);
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else gen_busreq_w(data & 1);
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return;
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case 0x12: /* RESET */
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if (address & 1)
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m68k_unused_8_w(address, data);
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else
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gen_reset_w(data & 1);
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if (address & 1) m68k_unused_8_w(address, data);
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else gen_reset_w(data & 1);
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return;
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case 0x30: /* TIME */
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if (cart_hw.time_w)
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cart_hw.time_w(address, data);
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else
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m68k_unused_8_w(address, data);
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return;
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case 0x41: /* BOOTROM */
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@ -455,17 +382,15 @@ void ctrl_io_write_byte(uint32 address, uint32 data)
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m68k_lockup_w_8(address, data);
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return;
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}
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}
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}
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void ctrl_io_write_word(uint32 address, uint32 data)
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{
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{
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switch ((address >> 8) & 0xff)
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{
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case 0x00: /* I/O chip */
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if (address & 0xe0)
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m68k_unused_16_w (address, data);
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else
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io_write ((address >> 1) & 0x0f, data & 0xff);
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if (address & 0xe0) m68k_unused_16_w (address, data);
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else io_write ((address >> 1) & 0x0f, data & 0xff);
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return;
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|
||||
case 0x11: /* BUSREQ */
|
||||
@ -479,8 +404,7 @@ void ctrl_io_write_word(uint32 address, uint32 data)
|
||||
case 0x50: /* SVP REGISTERS */
|
||||
if (svp)
|
||||
{
|
||||
if (address & 0xfd)
|
||||
m68k_unused_16_w(address, data);
|
||||
if (address & 0xfd) m68k_unused_16_w(address, data);
|
||||
else
|
||||
{
|
||||
/* just guessing here (Notaz) */
|
||||
@ -489,18 +413,12 @@ void ctrl_io_write_word(uint32 address, uint32 data)
|
||||
svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
|
||||
}
|
||||
}
|
||||
else
|
||||
m68k_unused_16_w (address, data);
|
||||
else m68k_unused_16_w (address, data);
|
||||
return;
|
||||
|
||||
case 0x30: /* TIME */
|
||||
if (cart_hw.time_w)
|
||||
{
|
||||
cart_hw.time_w(address & 0xfe, data >> 8);
|
||||
cart_hw.time_w(address, data & 0xff);
|
||||
}
|
||||
else
|
||||
m68k_unused_16_w (address, data);
|
||||
return;
|
||||
|
||||
case 0x41: /* BOOTROM */
|
||||
@ -527,7 +445,7 @@ void ctrl_io_write_word(uint32 address, uint32 data)
|
||||
m68k_lockup_w_16 (address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/******* VDP *************************************************/
|
||||
@ -623,7 +541,7 @@ void vdp_write_byte(uint32 address, uint32 data)
|
||||
}
|
||||
|
||||
void vdp_write_word(uint32 address, uint32 data)
|
||||
{
|
||||
{
|
||||
switch (address & 0xfc)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
@ -651,7 +569,7 @@ void vdp_write_word(uint32 address, uint32 data)
|
||||
m68k_lockup_w_16 (address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/******* PICO ************************************************/
|
||||
|
||||
@ -60,7 +60,6 @@ void zbank_lockup_w(uint32 address, uint32 data)
|
||||
}
|
||||
|
||||
/* I/O & Control registers */
|
||||
|
||||
uint32 zbank_read_ctrl_io(uint32 address)
|
||||
{
|
||||
switch ((address >> 8) & 0xff)
|
||||
@ -89,10 +88,10 @@ uint32 zbank_read_ctrl_io(uint32 address)
|
||||
default: /* Invalid address */
|
||||
return zbank_lockup_r(address);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void zbank_write_ctrl_io(uint32 address, uint32 data)
|
||||
{
|
||||
{
|
||||
switch ((address >> 8) & 0xff)
|
||||
{
|
||||
case 0x00: /* I/O chip */
|
||||
@ -143,13 +142,12 @@ void zbank_write_ctrl_io(uint32 address, uint32 data)
|
||||
zbank_lockup_w(address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* VDP */
|
||||
|
||||
/* VDP */
|
||||
uint32 zbank_read_vdp(uint32 address)
|
||||
{
|
||||
{
|
||||
switch (address & 0xfd)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
@ -181,7 +179,7 @@ uint32 zbank_read_vdp(uint32 address)
|
||||
default: /* Invalid address */
|
||||
return zbank_lockup_r(address);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void zbank_write_vdp(uint32 address, uint32 data)
|
||||
{
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* Genesis Plus 1.2a
|
||||
* FreezeState support
|
||||
*
|
||||
* coded by Eke-Eke, GC/Wii port
|
||||
* Copyright (C) Eke-Eke, GC/Wii port
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
* Genesis Plus 1.2a
|
||||
* FreezeState support
|
||||
*
|
||||
* coded by Eke-Eke, GC/Wii port
|
||||
* Copyright (C) Eke-Eke, GC/Wii port
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@ -23,8 +23,6 @@
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
#define CLOCK_NTSC 53693175
|
||||
#define CLOCK_PAL 53203424
|
||||
#define SND_SIZE (snd.buffer_size * sizeof(int16))
|
||||
|
||||
/* Global variables */
|
||||
@ -32,7 +30,6 @@ t_bitmap bitmap;
|
||||
t_snd snd;
|
||||
uint8 vdp_rate;
|
||||
uint16 lines_per_frame;
|
||||
double Master_Clock;
|
||||
uint32 aim_m68k;
|
||||
uint32 count_m68k;
|
||||
uint32 line_m68k;
|
||||
@ -55,7 +52,6 @@ void system_init (void)
|
||||
/* PAL/NTSC timings */
|
||||
vdp_rate = vdp_pal ? 50 : 60;
|
||||
lines_per_frame = vdp_pal ? 313 : 262;
|
||||
Master_Clock = vdp_pal ? (double)CLOCK_PAL : (double)CLOCK_NTSC;
|
||||
|
||||
gen_init ();
|
||||
vdp_init ();
|
||||
@ -139,27 +135,29 @@ int system_frame (int do_skip)
|
||||
}
|
||||
odd_frame ^= 1;
|
||||
|
||||
/* update VDP status */
|
||||
status &= 0xFFF5; // clear VBLANK and DMA flags
|
||||
if (odd_frame && interlaced) status |= 0x0010; // even/odd field flag (interlaced modes only)
|
||||
/* clear VBLANK and DMA flags */
|
||||
status &= 0xFFF5;
|
||||
|
||||
/* even/odd field flag (interlaced modes only) */
|
||||
if (odd_frame && interlaced) status |= 0x0010;
|
||||
else status &= 0xFFEF;
|
||||
|
||||
/* Reload H Counter */
|
||||
/* reload HCounter */
|
||||
int h_counter = reg[10];
|
||||
|
||||
/* parse sprites for line 0 (done on last line) */
|
||||
parse_satb (0x80);
|
||||
|
||||
/* Line processing */
|
||||
/* process frame */
|
||||
for (line = 0; line < lines_per_frame; line ++)
|
||||
{
|
||||
/* Update VCounter */
|
||||
/* update VCounter */
|
||||
v_counter = line;
|
||||
|
||||
/* 6-Buttons or Menacer update */
|
||||
/* update 6-Buttons or Menacer */
|
||||
input_update();
|
||||
|
||||
/* Update CPU cycle counters */
|
||||
/* update CPU cycle counters */
|
||||
hint_m68k = count_m68k;
|
||||
line_m68k = aim_m68k;
|
||||
line_z80 = aim_z80;
|
||||
@ -176,9 +174,10 @@ int system_frame (int do_skip)
|
||||
gen_reset(0);
|
||||
}
|
||||
|
||||
/* Horizontal Interrupt */
|
||||
/* active display */
|
||||
if (line <= vdp_height)
|
||||
{
|
||||
/* H Interrupt */
|
||||
if(--h_counter < 0)
|
||||
{
|
||||
h_counter = reg[10];
|
||||
@ -198,13 +197,13 @@ int system_frame (int do_skip)
|
||||
/* update DMA timings */
|
||||
if (dma_length) dma_update();
|
||||
|
||||
/* Vertical Retrace */
|
||||
/* vertical retrace */
|
||||
if (line == vdp_height)
|
||||
{
|
||||
/* render overscan */
|
||||
if ((line < end_line) && (!do_skip)) render_line(line, 1);
|
||||
|
||||
/* update inputs */
|
||||
/* update inputs (doing this here fix Warriors of Eternal Sun) */
|
||||
update_input();
|
||||
|
||||
/* set VBLANK flag */
|
||||
@ -223,10 +222,12 @@ int system_frame (int do_skip)
|
||||
}
|
||||
else count_z80 = line_z80 + 39;
|
||||
|
||||
/* Vertical Interrupt */
|
||||
/* V Interrupt */
|
||||
status |= 0x80;
|
||||
vint_pending = 1;
|
||||
if (reg[1] & 0x20) irq_status = (irq_status & 0xff) | 0x2416; // 36 cycles latency after VINT occurence flag (Ex-Mutants, Tyrant)
|
||||
|
||||
/* 36 cycles latency after VINT occurence flag (Ex-Mutants, Tyrant) */
|
||||
if (reg[1] & 0x20) irq_status = (irq_status & 0xff) | 0x2416;
|
||||
}
|
||||
else if (!do_skip)
|
||||
{
|
||||
@ -241,10 +242,7 @@ int system_frame (int do_skip)
|
||||
if (dma_length) dma_update();
|
||||
|
||||
/* render overscan */
|
||||
if ((line < end_line) || (line >= start_line))
|
||||
{
|
||||
if (!do_skip) render_line(line, 1);
|
||||
}
|
||||
if ((!do_skip) && ((line < end_line) || (line >= start_line))) render_line(line, 1);
|
||||
|
||||
/* clear any pending Z80 interrupt */
|
||||
if (zirq)
|
||||
@ -254,7 +252,7 @@ int system_frame (int do_skip)
|
||||
}
|
||||
}
|
||||
|
||||
/* Process line */
|
||||
/* process line */
|
||||
m68k_run(aim_m68k);
|
||||
if (zreset == 1 && zbusreq == 0)
|
||||
{
|
||||
|
||||
62
source/vdp.c
62
source/vdp.c
@ -76,7 +76,6 @@ uint32 fifo_lastwrite; /* last VDP write cycle */
|
||||
uint8 fifo_latency; /* VDP write cycles latency */
|
||||
uint8 vdp_pal = 0; /* 1: PAL , 0: NTSC (default) */
|
||||
|
||||
double vdp_timings[4][4];
|
||||
|
||||
/* Tables that define the playfield layout */
|
||||
static const uint8 shift_table[] = { 6, 7, 0, 8 };
|
||||
@ -88,6 +87,7 @@ static uint16 sat_base_mask; /* Base bits of SAT */
|
||||
static uint16 sat_addr_mask; /* Index bits of SAT */
|
||||
static uint32 dma_endCycles; /* 68k cycles to DMA end */
|
||||
static uint8 dma_type; /* Type of DMA */
|
||||
static double vdp_timings[4][4]; /* DMA timings */
|
||||
|
||||
static inline void vdp_reg_w(unsigned int r, unsigned int d);
|
||||
|
||||
@ -159,6 +159,7 @@ void vdp_reset(void)
|
||||
pending = 0;
|
||||
|
||||
status = 0x200; /* fifo empty */
|
||||
status |= vdp_pal;
|
||||
|
||||
ntab = 0;
|
||||
ntbb = 0;
|
||||
@ -365,9 +366,10 @@ static inline void dma_vbus (void)
|
||||
dma_length = length;
|
||||
dma_update();
|
||||
|
||||
switch (source >> 21)
|
||||
/* DMA source */
|
||||
if ((source >> 17) == 0x50)
|
||||
{
|
||||
case 5:
|
||||
/* Z80 & I/O area */
|
||||
do
|
||||
{
|
||||
/* Return $FFFF only when the Z80 isn't hogging the Z-bus.
|
||||
@ -391,13 +393,10 @@ static inline void dma_vbus (void)
|
||||
data_write (temp);
|
||||
}
|
||||
while (--length);
|
||||
break;
|
||||
|
||||
case 0:
|
||||
case 1:
|
||||
if (svp) source = source - 2;
|
||||
|
||||
default:
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ROM & RAM */
|
||||
do
|
||||
{
|
||||
temp = *(uint16 *)(m68k_memory_map[source>>16].base + (source & 0xffff));
|
||||
@ -406,7 +405,6 @@ static inline void dma_vbus (void)
|
||||
data_write (temp);
|
||||
}
|
||||
while (--length);
|
||||
break;
|
||||
}
|
||||
|
||||
/* update length & source address registers */
|
||||
@ -442,7 +440,6 @@ static inline void dma_fill(unsigned int data)
|
||||
{
|
||||
/* update internal SAT (fix Battletech) */
|
||||
WRITE_BYTE(sat, (addr & sat_addr_mask)^1, data);
|
||||
|
||||
WRITE_BYTE(vram, addr^1, data);
|
||||
MARK_BG_DIRTY (addr);
|
||||
addr += reg[15];
|
||||
@ -618,38 +615,25 @@ static inline void vdp_reg_w(unsigned int r, unsigned int d)
|
||||
switch(r)
|
||||
{
|
||||
case 0x00: /* CTRL #1 */
|
||||
/* Check if HINT has been enabled or disabled */
|
||||
if (hint_pending && ((d&0x10) != (reg[0]&0x10)))
|
||||
{
|
||||
/* update IRQ status */
|
||||
irq_status &= 0x20;
|
||||
irq_status |= 0x10;
|
||||
if (vint_pending && (reg[1] & 0x20))
|
||||
{
|
||||
irq_status |= 6;
|
||||
}
|
||||
else if (d & 0x10)
|
||||
{
|
||||
irq_status |= 4;
|
||||
}
|
||||
if (vint_pending && (reg[1] & 0x20)) irq_status |= 6;
|
||||
else if (d & 0x10) irq_status |= 4;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x01: /* CTRL #2 */
|
||||
/* Check if VINT has been enabled or disabled */
|
||||
if (vint_pending && ((d&0x20) != (reg[1]&0x20)))
|
||||
{
|
||||
/* update IRQ status */
|
||||
irq_status &= 0x20;
|
||||
irq_status |= 0x110;
|
||||
if (d & 0x20)
|
||||
{
|
||||
irq_status |= 6;
|
||||
if (d & 0x20) irq_status |= 6;
|
||||
else if (hint_pending && (reg[0] & 0x10)) irq_status |= 4;
|
||||
}
|
||||
else if (hint_pending && (reg[0] & 0x10))
|
||||
{
|
||||
irq_status |= 4;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Check if the viewport height has actually been changed */
|
||||
if((reg[1] & 8) != (d & 8))
|
||||
@ -805,9 +789,11 @@ unsigned int vdp_ctrl_r(void)
|
||||
|
||||
/* update DMA Busy flag */
|
||||
if ((status & 2) && !dma_length && (count_m68k >= dma_endCycles))
|
||||
{
|
||||
status &= 0xFFFD;
|
||||
}
|
||||
|
||||
unsigned int temp = status | vdp_pal;
|
||||
unsigned int temp = status;
|
||||
|
||||
/* display OFF: VBLANK flag is set */
|
||||
if (!(reg[1] & 0x40)) temp |= 0x8;
|
||||
@ -917,6 +903,7 @@ void vdp_test_w(unsigned int value)
|
||||
int vdp_int_ack_callback(int int_level)
|
||||
{
|
||||
|
||||
/* VINT triggered ? */
|
||||
if (irq_status&0x20)
|
||||
{
|
||||
vint_pending = 0;
|
||||
@ -927,15 +914,10 @@ int vdp_int_ack_callback(int int_level)
|
||||
hint_pending = 0;
|
||||
}
|
||||
|
||||
/* update IRQ status */
|
||||
irq_status = 0x10;
|
||||
if (vint_pending && (reg[1] & 0x20))
|
||||
{
|
||||
irq_status |= 6;
|
||||
}
|
||||
else if (hint_pending && (reg[0] & 0x10))
|
||||
{
|
||||
irq_status |= 4;
|
||||
}
|
||||
if (vint_pending && (reg[1] & 0x20)) irq_status |= 6;
|
||||
else if (hint_pending && (reg[0] & 0x10)) irq_status |= 4;
|
||||
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
}
|
||||
|
||||
@ -63,7 +63,6 @@ extern int32 fifo_write_cnt;
|
||||
extern uint32 fifo_lastwrite;
|
||||
extern uint8 fifo_latency;
|
||||
extern uint8 vdp_pal;
|
||||
extern double vdp_timings[4][4];
|
||||
|
||||
extern uint8 *vctab;
|
||||
extern uint8 *hctab;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user