mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-11-20 17:49:22 +01:00
[Core/Input] added support for XE-A1P analog controller on both ports
This commit is contained in:
parent
f4f860e763
commit
c5cc7d93af
@ -51,15 +51,15 @@ void activator_reset(int index)
|
|||||||
activator[index].Counter = 0;
|
activator[index].Counter = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
INLINE unsigned char activator_read(int port)
|
INLINE unsigned char activator_read(int index)
|
||||||
{
|
{
|
||||||
/* IR sensors 1-16 data (active low) */
|
/* IR sensors 1-16 data (active low) */
|
||||||
uint16 data = ~input.pad[port << 2];
|
uint16 data = ~input.pad[index << 2];
|
||||||
|
|
||||||
/* D1 = D0 (data is ready) */
|
/* D1 = D0 (data is ready) */
|
||||||
uint8 temp = (activator[port].State & 0x01) << 1;
|
uint8 temp = (activator[index].State & 0x01) << 1;
|
||||||
|
|
||||||
switch (activator[port].Counter)
|
switch (activator[index].Counter)
|
||||||
{
|
{
|
||||||
case 0: /* x x x x 0 1 0 0 */
|
case 0: /* x x x x 0 1 0 0 */
|
||||||
temp |= 0x04;
|
temp |= 0x04;
|
||||||
|
@ -198,6 +198,13 @@ void input_init(void)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
case SYSTEM_XE_A1P:
|
||||||
|
{
|
||||||
|
input.dev[4] = DEVICE_XE_A1P;
|
||||||
|
player++;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
case SYSTEM_MENACER:
|
case SYSTEM_MENACER:
|
||||||
{
|
{
|
||||||
input.dev[4] = DEVICE_LIGHTGUN;
|
input.dev[4] = DEVICE_LIGHTGUN;
|
||||||
@ -305,19 +312,19 @@ void input_reset(void)
|
|||||||
|
|
||||||
case DEVICE_XE_A1P:
|
case DEVICE_XE_A1P:
|
||||||
{
|
{
|
||||||
xe_a1p_reset();
|
xe_a1p_reset(i);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
case DEVICE_PADDLE:
|
case DEVICE_PADDLE:
|
||||||
{
|
{
|
||||||
paddle_reset(i >> 2);
|
paddle_reset(i);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
case DEVICE_SPORTSPAD:
|
case DEVICE_SPORTSPAD:
|
||||||
{
|
{
|
||||||
sportspad_reset(i >> 2);
|
sportspad_reset(i);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -45,8 +45,8 @@ static struct
|
|||||||
|
|
||||||
void paddle_reset(int index)
|
void paddle_reset(int index)
|
||||||
{
|
{
|
||||||
input.analog[index << 2][0] = 128;
|
input.analog[index][0] = 128;
|
||||||
paddle[index].State = 0x40;
|
paddle[index>>2].State = 0x40;
|
||||||
}
|
}
|
||||||
|
|
||||||
INLINE unsigned char paddle_read(int port)
|
INLINE unsigned char paddle_read(int port)
|
||||||
|
@ -46,10 +46,10 @@ static struct
|
|||||||
|
|
||||||
void sportspad_reset(int index)
|
void sportspad_reset(int index)
|
||||||
{
|
{
|
||||||
input.analog[index << 2][0] = 128;
|
input.analog[index][0] = 128;
|
||||||
input.analog[index << 2][1] = 128;
|
input.analog[index][1] = 128;
|
||||||
sportspad[index].State = 0x40;
|
sportspad[index>>2].State = 0x40;
|
||||||
sportspad[index].Counter = 0;
|
sportspad[index>>2].Counter = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
INLINE unsigned char sportspad_read(int port)
|
INLINE unsigned char sportspad_read(int port)
|
||||||
|
@ -43,39 +43,41 @@ static struct
|
|||||||
uint8 State;
|
uint8 State;
|
||||||
uint8 Counter;
|
uint8 Counter;
|
||||||
uint8 Latency;
|
uint8 Latency;
|
||||||
} xe_a1p;
|
} xe_a1p[2];
|
||||||
|
|
||||||
void xe_a1p_reset(void)
|
void xe_a1p_reset(int index)
|
||||||
{
|
{
|
||||||
input.analog[0][0] = 128;
|
input.analog[index][0] = 128;
|
||||||
input.analog[0][1] = 128;
|
input.analog[index][1] = 128;
|
||||||
input.analog[1][0] = 128;
|
input.analog[index+1][0] = 128;
|
||||||
xe_a1p.State = 0x40;
|
index >>= 2;
|
||||||
xe_a1p.Counter = 0;
|
xe_a1p[index].State = 0x40;
|
||||||
xe_a1p.Latency = 0;
|
xe_a1p[index].Counter = 0;
|
||||||
|
xe_a1p[index].Latency = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned char xe_a1p_read()
|
INLINE unsigned char xe_a1p_read(int index)
|
||||||
{
|
{
|
||||||
unsigned int temp = 0x40;
|
unsigned int temp = 0x40;
|
||||||
|
unsigned int port = index << 2;
|
||||||
|
|
||||||
/* Left Stick X & Y analog values (bidirectional) */
|
/* Left Stick X & Y analog values (bidirectional) */
|
||||||
int x = input.analog[0][0];
|
int x = input.analog[port][0];
|
||||||
int y = input.analog[0][1];
|
int y = input.analog[port][1];
|
||||||
|
|
||||||
/* Right Stick X or Y value (unidirectional) */
|
/* Right Stick X or Y value (unidirectional) */
|
||||||
int z = input.analog[1][0];
|
int z = input.analog[port+1][0];
|
||||||
|
|
||||||
/* Buttons status (active low) */
|
/* Buttons status (active low) */
|
||||||
uint16 pad = ~input.pad[0];
|
uint16 pad = ~input.pad[port];
|
||||||
|
|
||||||
/* Current internal cycle (0-7) */
|
/* Current internal cycle (0-7) */
|
||||||
unsigned int cycle = xe_a1p.Counter & 7;
|
unsigned int cycle = xe_a1p[index].Counter & 7;
|
||||||
|
|
||||||
/* Current 4-bit data cycle */
|
/* Current 4-bit data cycle */
|
||||||
/* There are eight internal data cycle for each 5 acquisition sequence */
|
/* There are eight internal data cycle for each 5 acquisition sequence */
|
||||||
/* First 4 return the same 4-bit data, next 4 return next 4-bit data */
|
/* First 4 return the same 4-bit data, next 4 return next 4-bit data */
|
||||||
switch (xe_a1p.Counter >> 2)
|
switch (xe_a1p[index].Counter >> 2)
|
||||||
{
|
{
|
||||||
case 0:
|
case 0:
|
||||||
temp |= ((pad >> 8) & 0x0F); /* E1 E2 Start Select */
|
temp |= ((pad >> 8) & 0x0F); /* E1 E2 Start Select */
|
||||||
@ -119,42 +121,62 @@ unsigned char xe_a1p_read()
|
|||||||
cycle = (cycle + 1) & 7;
|
cycle = (cycle + 1) & 7;
|
||||||
|
|
||||||
/* Update internal cycle counter */
|
/* Update internal cycle counter */
|
||||||
xe_a1p.Counter = (xe_a1p.Counter & ~7) | cycle;
|
xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) | cycle;
|
||||||
|
|
||||||
/* Update internal latency on each read */
|
/* Update internal latency on each read */
|
||||||
xe_a1p.Latency++;
|
xe_a1p[index].Latency++;
|
||||||
|
|
||||||
return temp;
|
return temp;
|
||||||
}
|
}
|
||||||
|
|
||||||
void xe_a1p_write(unsigned char data, unsigned char mask)
|
INLINE void xe_a1p_write(int index, unsigned char data, unsigned char mask)
|
||||||
{
|
{
|
||||||
/* update bits set as output only */
|
/* update bits set as output only */
|
||||||
data = (xe_a1p.State & ~mask) | (data & mask);
|
data = (xe_a1p[index].State & ~mask) | (data & mask);
|
||||||
|
|
||||||
/* look for TH 1->0 transitions */
|
/* look for TH 1->0 transitions */
|
||||||
if (!(data & 0x40) && (xe_a1p.State & 0x40))
|
if (!(data & 0x40) && (xe_a1p[index].State & 0x40))
|
||||||
{
|
{
|
||||||
/* reset acquisition cycle */
|
/* reset acquisition cycle */
|
||||||
xe_a1p.Latency = xe_a1p.Counter = 0;
|
xe_a1p[index].Latency = xe_a1p[index].Counter = 0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* some games immediately write new data to TH */
|
/* some games immediately write new data to TH */
|
||||||
/* so we make sure first sequence has actually been handled */
|
/* so we make sure first sequence has actually been handled */
|
||||||
if (xe_a1p.Latency > 2)
|
if (xe_a1p[index].Latency > 2)
|
||||||
{
|
{
|
||||||
/* next acquisition sequence */
|
/* next acquisition sequence */
|
||||||
xe_a1p.Counter = (xe_a1p.Counter & ~7) + 8;
|
xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) + 8;
|
||||||
|
|
||||||
/* 5 sequence max with 8 cycles each */
|
/* 5 sequence max with 8 cycles each */
|
||||||
if (xe_a1p.Counter > 32)
|
if (xe_a1p[index].Counter > 32)
|
||||||
{
|
{
|
||||||
xe_a1p.Counter = 32;
|
xe_a1p[index].Counter = 32;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* update internal state */
|
/* update internal state */
|
||||||
xe_a1p.State = data;
|
xe_a1p[index].State = data;
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned char xe_a1p_1_read(void)
|
||||||
|
{
|
||||||
|
return xe_a1p_read(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned char xe_a1p_2_read(void)
|
||||||
|
{
|
||||||
|
return xe_a1p_read(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void xe_a1p_1_write(unsigned char data, unsigned char mask)
|
||||||
|
{
|
||||||
|
xe_a1p_write(0, data, mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
void xe_a1p_2_write(unsigned char data, unsigned char mask)
|
||||||
|
{
|
||||||
|
xe_a1p_write(1, data, mask);
|
||||||
}
|
}
|
||||||
|
@ -40,8 +40,10 @@
|
|||||||
#define _XE_A1PH_
|
#define _XE_A1PH_
|
||||||
|
|
||||||
/* Function prototypes */
|
/* Function prototypes */
|
||||||
extern void xe_a1p_reset(void);
|
extern void xe_a1p_reset(int index);
|
||||||
extern unsigned char xe_a1p_read(void);
|
extern unsigned char xe_a1p_1_read(void);
|
||||||
extern void xe_a1p_write(unsigned char data, unsigned char mask);
|
extern unsigned char xe_a1p_2_read(void);
|
||||||
|
extern void xe_a1p_1_write(unsigned char data, unsigned char mask);
|
||||||
|
extern void xe_a1p_2_write(unsigned char data, unsigned char mask);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -110,8 +110,8 @@ void io_init(void)
|
|||||||
|
|
||||||
case SYSTEM_XE_A1P:
|
case SYSTEM_XE_A1P:
|
||||||
{
|
{
|
||||||
port[0].data_w = xe_a1p_write;
|
port[0].data_w = xe_a1p_1_write;
|
||||||
port[0].data_r = xe_a1p_read;
|
port[0].data_r = xe_a1p_1_read;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -181,6 +181,13 @@ void io_init(void)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
case SYSTEM_XE_A1P:
|
||||||
|
{
|
||||||
|
port[1].data_w = xe_a1p_2_write;
|
||||||
|
port[1].data_r = xe_a1p_2_read;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
case SYSTEM_ACTIVATOR:
|
case SYSTEM_ACTIVATOR:
|
||||||
{
|
{
|
||||||
port[1].data_w = activator_2_write;
|
port[1].data_w = activator_2_write;
|
||||||
|
@ -2183,12 +2183,6 @@ static void ctrlmenu(void)
|
|||||||
input.system[1] += 2;
|
input.system[1] += 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* XE-1AP on port A only */
|
|
||||||
if (input.system[1] == SYSTEM_XE_A1P)
|
|
||||||
{
|
|
||||||
input.system[1]++;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* 4-wayplay uses both ports */
|
/* 4-wayplay uses both ports */
|
||||||
if (input.system[1] == SYSTEM_WAYPLAY)
|
if (input.system[1] == SYSTEM_WAYPLAY)
|
||||||
{
|
{
|
||||||
|
Loading…
Reference in New Issue
Block a user