mirror of
https://github.com/ekeeke/Genesis-Plus-GX.git
synced 2024-12-27 11:41:48 +01:00
fixed LFO implementation (YM2612)
fixed regression with EG update being done too early (YM2612)
This commit is contained in:
ekeeke31
parent
ee2d34a48f
commit
c8c71b9bff
@ -14,11 +14,14 @@
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**
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** 2006~2009 Eke-Eke (Genesis Plus GX):
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** Credits to Nemesis (@spritesmind.net), most of those fixes came from his tests on a Model 1 Sega Mega Drive
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** More informations here: http://gendev.spritesmind.net/forum/viewtopic.php?t=386
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** More informations at http://gendev.spritesmind.net/forum/viewtopic.php?t=386
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**
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** - removed unused multichip support
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** - added YM2612 Context external access functions
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** - implemented LFO phase update in CH3 special mode (Warlock birds, Alladin bug sound)
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** - fixed LFO implementation (Spider-Man & Venom : Separation Anxiety intro,Warlock birds, Alladin bug sound):
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** .added support for CH3 special mode
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** .fixed LFO update: it is done after output calculation, like EG/PG updates
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** .fixed LFO on/off behavior: LFO is reset when switched ON and holded at its current level when switched OFF (AM & PM can still be applied)
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** - improved internal timers emulation
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** - fixed Attack Rate update in some specific case (Batman & Robin intro)
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** - fixed EG behavior when Attack Rate is maximal
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@ -31,7 +34,7 @@
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** - adjusted some EG rates
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** - modified address/data port behavior
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**
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** TODO: complete SSG-EG documentation
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** TODO: fix SSG-EG documentation, BUSY flag support
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**
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**
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@ -134,6 +137,11 @@
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#define FREQ_MASK ((1<<FREQ_SH)-1)
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#define MAXOUT (+32767)
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#define MINOUT (-32768)
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/* envelope generator */
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#define ENV_BITS 10
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#define ENV_LEN (1<<ENV_BITS)
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#define ENV_STEP (128.0/ENV_LEN)
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@ -147,17 +155,13 @@
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#define EG_REL 1
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#define EG_OFF 0
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/* operator unit */
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#define SIN_BITS 10
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#define SIN_LEN (1<<SIN_BITS)
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#define SIN_MASK (SIN_LEN-1)
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#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
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#define MAXOUT (+32767)
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#define MINOUT (-32768)
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/* TL_TAB_LEN is calculated as:
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* 13 - sinus amplitude bits (Y axis)
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* 2 - sinus sign bit (Y axis)
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@ -177,6 +181,7 @@ static unsigned int sin_tab[SIN_LEN];
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/* 0.75, 1.5, 3, 6, 12, 24, 48 (dB)*/
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/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
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/* attenuation value (10 bits) = (SL << 2) << 3 */
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#define SC(db) (UINT32) ( db * (4.0/ENV_STEP) )
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static const UINT32 sl_table[16]={
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SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
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@ -540,7 +545,6 @@ typedef struct
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{
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UINT32 clock; /* master clock (Hz) */
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UINT32 rate; /* sampling rate (Hz) */
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double freqbase; /* frequency base */
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UINT16 address; /* address register */
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UINT8 status; /* status flag */
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UINT32 mode; /* mode CSM / 3SLOT */
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@ -768,7 +772,8 @@ INLINE void set_timers(int v )
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if ((ym2612.OPN.ST.mode ^ v) & 0xC0)
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{
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ym2612.CH[2].SLOT[SLOT1].Incr=-1; /* recalculate phase (from Gens) */
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/* phase increment need to be recalculated */
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ym2612.CH[2].SLOT[SLOT1].Incr=-1;
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/* CSM mode disabled and CSM key ON active*/
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if (((v & 0xC0) != 0x80) && ym2612.OPN.SL3.key_csm)
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@ -989,48 +994,33 @@ INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm)
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/* advance LFO to next sample */
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INLINE void advance_lfo()
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{
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UINT8 pos;
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/*UINT8 prev_pos;*/
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int pos;
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if (ym2612.OPN.lfo_inc) /* LFO enabled ? */
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{
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/*prev_pos = ym2612.OPN.lfo_cnt>>LFO_SH & 127;*/
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/* increment LFO counter */
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/* when LFO is enabled, one level will last for 108, 77, 71, 67, 62, 44, 8 or 5 samples */
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ym2612.OPN.lfo_cnt += ym2612.OPN.lfo_inc;
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/* LFO current position */
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pos = ( ym2612.OPN.lfo_cnt >> LFO_SH) & 127;
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/* update AM when LFO output changes */
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/*if (prev_pos != pos)*/
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/* actually I can't optimize is this way without rewritting chan_calc()
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to use chip->lfo_am instead of global lfo_am */
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{
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/* triangle */
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/* AM: 0 to 126 step +2, 126 to 0 step -2 */
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if (pos<64)
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LFO_AM = (pos&63) * 2;
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else
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LFO_AM = 126 - ((pos&63) * 2);
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}
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/* triangle */
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/* AM: 0 to 126 step +2, 126 to 0 step -2 */
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if (pos<64)
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LFO_AM = pos * 2;
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else
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LFO_AM = 126 - ((pos&63) * 2);
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/* PM works with 4 times slower clock */
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/*prev_pos >>= 2;*/
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pos >>= 2;
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/* update PM when LFO output changes */
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/*if (prev_pos != pos)*/ /* can't use global lfo_pm for this optimization, must be chip->lfo_pm instead*/
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{
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LFO_PM = pos;
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}
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LFO_PM = pos >> 2;
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}
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else
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/* when LFO is disabled, current level is held (fix Spider-Man & Venom : Separation Anxiety) */
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/*else
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{
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LFO_AM = 0;
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LFO_PM = 0;
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}
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}*/
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}
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@ -1237,13 +1227,15 @@ INLINE void update_ssg_eg_channel(FM_SLOT *SLOT)
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INLINE void update_phase_lfo_slot(FM_SLOT *SLOT , INT32 pms, UINT32 block_fnum)
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{
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UINT32 fnum_lfo = (block_fnum & 0x7f0) << 4; /* ((block_fnum & 0x7f0) >> 4) * 32 * 8; */
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UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
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INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + pms + LFO_PM ];
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if (lfo_fn_table_index_offset) /* LFO phase modulation active */
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{
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UINT8 blk = (block_fnum >> 11) & 7;
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UINT32 fn = (block_fnum*2 + (UINT32)lfo_fn_table_index_offset) & 0xfff;
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block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
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UINT8 blk = (block_fnum&0x7000) >> 12;
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UINT32 fn = block_fnum & 0xfff;
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/* keyscale code */
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int kc = (blk<<2) | opn_fktable[fn >> 8];
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@ -1266,18 +1258,20 @@ INLINE void update_phase_lfo_slot(FM_SLOT *SLOT , INT32 pms, UINT32 block_fnum)
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INLINE void update_phase_lfo_channel(FM_CH *CH)
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{
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UINT32 block_fnum = CH->block_fnum;
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UINT32 fnum_lfo = (block_fnum & 0x7f0) << 4; /* ((block_fnum & 0x7f0) >> 4) * 32 * 8; */
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UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
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INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + LFO_PM ];
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if (lfo_fn_table_index_offset) /* LFO phase modulation active */
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{
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block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
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UINT8 blk = (block_fnum >> 11) & 7;
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UINT32 fn = (block_fnum*2 + (UINT32)lfo_fn_table_index_offset) & 0xfff;
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UINT8 blk = (block_fnum&0x7000) >> 12;
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UINT32 fn = block_fnum & 0xfff;
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/* keyscale code */
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int kc = (blk<<2) | opn_fktable[fn >> 8];
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/* (frequency) phase increment counter */
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int fc = (ym2612.OPN.fn_table[fn]>>(7-blk));
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@ -1435,7 +1429,7 @@ INLINE void refresh_fc_eg_chan(FM_CH *CH )
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}
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/* initialize time tables */
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static void init_timetables(const UINT8 *dttable )
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static void init_timetables(const UINT8 *dttable, double freqbase)
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{
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int i,d;
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double rate;
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@ -1445,7 +1439,7 @@ static void init_timetables(const UINT8 *dttable )
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{
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for (i = 0;i <= 31;i++)
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{
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rate = ((double)dttable[d*32 + i]) * SIN_LEN * ym2612.OPN.ST.freqbase * (1<<FREQ_SH) / ((double)(1<<20));
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rate = ((double)dttable[d*32 + i]) * SIN_LEN * freqbase * (1<<FREQ_SH) / ((double)(1<<20));
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ym2612.OPN.ST.dt_tab[d][i] = (INT32) rate;
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ym2612.OPN.ST.dt_tab[d+4][i] = -ym2612.OPN.ST.dt_tab[d][i];
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}
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@ -1615,19 +1609,19 @@ static void OPNSetPres(int pres)
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int i;
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/* frequency base */
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ym2612.OPN.ST.freqbase = ((double) ym2612.OPN.ST.clock / (double) ym2612.OPN.ST.rate) / ((double) pres);
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double freqbase = ((double) ym2612.OPN.ST.clock / (double) ym2612.OPN.ST.rate) / ((double) pres);
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/* YM2612 running at original frequency (~53267 Hz) */
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if (config.hq_fm) ym2612.OPN.ST.freqbase = 1.0;
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if (config.hq_fm) freqbase = 1.0;
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ym2612.OPN.eg_timer_add = (UINT32)((1<<EG_SH) * ym2612.OPN.ST.freqbase);
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ym2612.OPN.eg_timer_add = (UINT32)((1<<EG_SH) * freqbase);
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ym2612.OPN.eg_timer_overflow = ( 3 ) * (1<<EG_SH);
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/* timer increment in usecs (timers are incremented after each updated samples) */
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ym2612.OPN.ST.TimerBase = (int) (ym2612.OPN.ST.freqbase * 4096.0);
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ym2612.OPN.ST.TimerBase = (int) ((1 << TIMER_SH) * freqbase);
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/* make time tables */
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init_timetables(dt_tab);
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init_timetables(dt_tab,freqbase);
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/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
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but LFO works with one more bit of a precision so we really need 4096 elements */
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@ -1640,18 +1634,18 @@ static void OPNSetPres(int pres)
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/* where sample clock is M/144 */
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/* this means the increment value for one clock sample is FNUM * 2^(B-1) = FNUM * 64 for octave 7 */
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/* we also need to handle the ratio between the chip frequency and the emulated frequency (can be 1.0) */
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ym2612.OPN.fn_table[i] = (UINT32)( (double)i * 32 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
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ym2612.OPN.fn_table[i] = (UINT32)( (double)i * 32 * freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
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}
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/* maximal frequency is required for Phase overflow calculation, register size is 17 bits (Nemesis) */
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ym2612.OPN.fn_max = (UINT32)( (double)0x20000 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) );
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ym2612.OPN.fn_max = (UINT32)( (double)0x20000 * freqbase * (1<<(FREQ_SH-10)) );
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/* LFO freq. table */
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for(i = 0; i < 8; i++)
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{
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/* Amplitude modulation: 64 output levels (triangle waveform); 1 level lasts for one of "lfo_samples_per_step" samples */
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/* Phase modulation: one entry from lfo_pm_output lasts for one of 4 * "lfo_samples_per_step" samples */
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ym2612.OPN.lfo_freq[i] = (UINT32)((1.0 / lfo_samples_per_step[i]) * (1<<LFO_SH) * ym2612.OPN.ST.freqbase);
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ym2612.OPN.lfo_freq[i] = (UINT32)((1.0 / lfo_samples_per_step[i]) * (1<<LFO_SH) * freqbase);
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}
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}
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@ -1669,6 +1663,14 @@ INLINE void OPNWriteMode(int r, int v)
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case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/ym2612) */
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if (v&0x08) /* LFO enabled ? */
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{
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if (!ym2612.OPN.lfo_inc)
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{
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/* restart LFO */
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ym2612.OPN.lfo_cnt = 0;
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LFO_AM = 0;
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LFO_PM = 0;
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}
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ym2612.OPN.lfo_inc = ym2612.OPN.lfo_freq[v&7];
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}
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else
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@ -1678,15 +1680,15 @@ INLINE void OPNWriteMode(int r, int v)
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break;
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case 0x24: /* timer A High 8*/
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ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2);
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << 12;
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << TIMER_SH;
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break;
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case 0x25: /* timer A Low 2*/
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ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x3fc)|(v&3);
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << 12;
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ym2612.OPN.ST.TAL = (1024 - ym2612.OPN.ST.TA) << TIMER_SH;
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break;
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case 0x26: /* timer B */
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ym2612.OPN.ST.TB = v;
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ym2612.OPN.ST.TBL = (256 - ym2612.OPN.ST.TB) << 16;
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ym2612.OPN.ST.TBL = (256 - ym2612.OPN.ST.TB) << (TIMER_SH + 4);
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break;
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case 0x27: /* mode, timer control */
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set_timers(v);
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@ -1902,14 +1904,14 @@ INLINE void OPNWriteReg(int r, int v)
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}
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}
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/* Generate 32bits samples for ym2612 */
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/* Generate 16 bits samples for ym2612 */
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void YM2612Update(int length)
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{
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int i;
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int lt,rt;
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int16 *bufL,*bufR;
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/* set buffers */
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/* Output samples buffers */
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int16 *bufFIR = Fir_Resampler_buffer();
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if (!bufFIR)
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{
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@ -1917,7 +1919,7 @@ void YM2612Update(int length)
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bufR = snd.fm.buffer[1] + snd.fm.pos;
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}
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/* refresh PG and EG parameters */
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/* refresh PG increments and EG rates if required */
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refresh_fc_eg_chan(&ym2612.CH[0]);
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refresh_fc_eg_chan(&ym2612.CH[1]);
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@ -1941,8 +1943,6 @@ void YM2612Update(int length)
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/* buffering */
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for(i=0; i < length ; i++)
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{
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advance_lfo();
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/* clear outputs */
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out_fm[0] = 0;
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out_fm[1] = 0;
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@ -1951,7 +1951,20 @@ void YM2612Update(int length)
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out_fm[4] = 0;
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out_fm[5] = 0;
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/* update SSG-EG */
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/* calculate FM */
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chan_calc(&ym2612.CH[0]);
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chan_calc(&ym2612.CH[1]);
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chan_calc(&ym2612.CH[2]);
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chan_calc(&ym2612.CH[3]);
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chan_calc(&ym2612.CH[4]);
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if (ym2612.dacen)
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{
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/* DAC Mode */
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*(ym2612.CH[5].connect4) += ym2612.dacout;
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}
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else chan_calc(&ym2612.CH[5]);
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/* update SSG-EG output */
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update_ssg_eg_channel(&ym2612.CH[0].SLOT[SLOT1]);
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update_ssg_eg_channel(&ym2612.CH[1].SLOT[SLOT1]);
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update_ssg_eg_channel(&ym2612.CH[2].SLOT[SLOT1]);
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@ -1959,6 +1972,9 @@ void YM2612Update(int length)
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update_ssg_eg_channel(&ym2612.CH[4].SLOT[SLOT1]);
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update_ssg_eg_channel(&ym2612.CH[5].SLOT[SLOT1]);
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/* advance LFO */
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advance_lfo();
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/* advance envelope generator */
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ym2612.OPN.eg_timer += ym2612.OPN.eg_timer_add;
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while (ym2612.OPN.eg_timer >= ym2612.OPN.eg_timer_overflow)
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@ -1974,31 +1990,19 @@ void YM2612Update(int length)
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advance_eg_channel(&ym2612.CH[5].SLOT[SLOT1]);
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}
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/* calculate FM */
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chan_calc(&ym2612.CH[0]);
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chan_calc(&ym2612.CH[1]);
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chan_calc(&ym2612.CH[2]);
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chan_calc(&ym2612.CH[3]);
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chan_calc(&ym2612.CH[4]);
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if (ym2612.dacen)
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{
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/* DAC Mode */
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*(ym2612.CH[5].connect4) += ym2612.dacout;
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}
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else chan_calc(&ym2612.CH[5]);
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lt = (out_fm[0] & ym2612.OPN.pan[0]);
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rt = (out_fm[0] & ym2612.OPN.pan[1]);
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lt += (out_fm[1] & ym2612.OPN.pan[2]);
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rt += (out_fm[1] & ym2612.OPN.pan[3]);
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lt += (out_fm[2] & ym2612.OPN.pan[4]);
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rt += (out_fm[2] & ym2612.OPN.pan[5]);
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lt += (out_fm[3] & ym2612.OPN.pan[6]);
|
||||
rt += (out_fm[3] & ym2612.OPN.pan[7]);
|
||||
lt += (out_fm[4] & ym2612.OPN.pan[8]);
|
||||
rt += (out_fm[4] & ym2612.OPN.pan[9]);
|
||||
lt += (out_fm[5] & ym2612.OPN.pan[10]);
|
||||
rt += (out_fm[5] & ym2612.OPN.pan[11]);
|
||||
/* 6-channels mixing */
|
||||
lt = ((out_fm[0]) & ym2612.OPN.pan[0]);
|
||||
rt = ((out_fm[0]) & ym2612.OPN.pan[1]);
|
||||
lt += ((out_fm[1]) & ym2612.OPN.pan[2]);
|
||||
rt += ((out_fm[1]) & ym2612.OPN.pan[3]);
|
||||
lt += ((out_fm[2]) & ym2612.OPN.pan[4]);
|
||||
rt += ((out_fm[2]) & ym2612.OPN.pan[5]);
|
||||
lt += ((out_fm[3]) & ym2612.OPN.pan[6]);
|
||||
rt += ((out_fm[3]) & ym2612.OPN.pan[7]);
|
||||
lt += ((out_fm[4]) & ym2612.OPN.pan[8]);
|
||||
rt += ((out_fm[4]) & ym2612.OPN.pan[9]);
|
||||
lt += ((out_fm[5]) & ym2612.OPN.pan[10]);
|
||||
rt += ((out_fm[5]) & ym2612.OPN.pan[11]);
|
||||
|
||||
/* limiter */
|
||||
Limit(lt,MAXOUT,MINOUT);
|
||||
@ -2060,19 +2064,24 @@ int YM2612ResetChip(void)
|
||||
int i;
|
||||
|
||||
OPNSetPres(6*24);
|
||||
OPNWriteMode(0x27,0x30); /* mode 0 , timer reset */
|
||||
|
||||
ym2612.OPN.eg_timer = 0;
|
||||
ym2612.OPN.eg_cnt = 0;
|
||||
ym2612.OPN.ST.status = 0;
|
||||
ym2612.OPN.ST.mode = 0;
|
||||
ym2612.OPN.eg_timer = 0;
|
||||
ym2612.OPN.eg_cnt = 0;
|
||||
|
||||
LFO_AM = 0;
|
||||
LFO_PM = 0;
|
||||
ym2612.OPN.lfo_cnt = 0;
|
||||
|
||||
ym2612.OPN.ST.TAC = 0;
|
||||
ym2612.OPN.ST.TBC = 0;
|
||||
|
||||
OPNWriteMode(0x27,0x30);
|
||||
OPNWriteMode(0x26,0x00);
|
||||
OPNWriteMode(0x25,0x00);
|
||||
OPNWriteMode(0x24,0x00);
|
||||
|
||||
reset_channels(&ym2612.CH[0] , 6 );
|
||||
|
||||
for(i = 0xb6 ; i >= 0xb4 ; i-- )
|
||||
{
|
||||
OPNWriteReg(i ,0xc0);
|
||||
@ -2087,7 +2096,7 @@ int YM2612ResetChip(void)
|
||||
/* DAC mode clear */
|
||||
ym2612.dacen = 0;
|
||||
ym2612.dacout = 0;
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user