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ekeeke31 2008-09-16 16:31:29 +00:00
parent 5b48f93b49
commit ea7f8eab4c
4 changed files with 92 additions and 104 deletions
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2
source/mem68k.c
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@ -297,7 +297,7 @@ unsigned int m68k_read_memory_8(unsigned int address)
return m68k_lockup_r_8(address); return m68k_lockup_r_8(address);
case UMK3_HACK: case UMK3_HACK:
return READ_BYTE(&cart_rom[offset<<19], address & 0x7ffff); return READ_BYTE(&cart_rom[offset << 19], address & 0x7ffff);
case PICO_HW: case PICO_HW:
switch (address & 0xff) switch (address & 0xff)

67
source/sound/fm.c
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@ -99,9 +99,6 @@
** change ADPCMA_DECODE_MIN/MAX. ** change ADPCMA_DECODE_MIN/MAX.
*/ */
/************************************************************************/ /************************************************************************/
/* comment of hiro-shi(Hiromitsu Shioya) */ /* comment of hiro-shi(Hiromitsu Shioya) */
/* YM2610(B) = OPN-B */ /* YM2610(B) = OPN-B */
@ -222,7 +219,7 @@ O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
O( 0),O( 1),O( 2),O( 3), O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3), O( 0),O( 1),O( 2),O( 3),
*/ */
O( 18),O( 18),O( 0),O( 0), O(18),O(18),O( 0),O( 0),
O( 0),O( 0),O( 2),O( 2), // Nemesis's tests O( 0),O( 0),O( 2),O( 2), // Nemesis's tests
O( 0),O( 1),O( 2),O( 3), O( 0),O( 1),O( 2),O( 3),
@ -449,10 +446,6 @@ static const UINT8 lfo_pm_output[7*8][8]={ /* 7 bits meaningful (of F-NUMBER), 8
/* all 128 LFO PM waveforms */ /* all 128 LFO PM waveforms */
static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */ static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */
/* register number to channel number , slot offset */ /* register number to channel number , slot offset */
#define OPN_CHAN(N) (N&3) #define OPN_CHAN(N) (N&3)
#define OPN_SLOT(N) ((N>>2)&3) #define OPN_SLOT(N) ((N>>2)&3)
@ -518,7 +511,7 @@ typedef struct
INT32 *connect2; /* SLOT2 output pointer */ INT32 *connect2; /* SLOT2 output pointer */
INT32 *connect4; /* SLOT4 output pointer */ INT32 *connect4; /* SLOT4 output pointer */
INT32 *mem_connect;/* where to put the delayed sample (MEM) */ INT32 *mem_connect; /* where to put the delayed sample (MEM) */
INT32 mem_value; /* delayed sample (MEM) value */ INT32 mem_value; /* delayed sample (MEM) value */
INT32 pms; /* channel PMS */ INT32 pms; /* channel PMS */
@ -532,22 +525,21 @@ typedef struct
typedef struct typedef struct
{ {
int clock; /* master clock (Hz) */ UINT32 clock; /* master clock (Hz) */
int rate; /* sampling rate (Hz) */ UINT32 rate; /* sampling rate (Hz) */
double freqbase; /* frequency base */ double freqbase; /* frequency base */
UINT8 address[2]; /* address register */ UINT8 address[2]; /* address register */
UINT8 status; /* status flag */ UINT8 status; /* status flag */
UINT32 mode; /* mode CSM / 3SLOT */ UINT32 mode; /* mode CSM / 3SLOT */
UINT8 fn_h; /* freq latch */ UINT8 fn_h; /* freq latch */
int TimerBase; /* Timer base time */ INT32 TimerBase; /* Timer base time */
int TA; /* timer a value */ INT32 TA; /* timer a value */
int TAL; /* timer a base */ INT32 TAL; /* timer a base */
int TAC; /* timer a counter */ INT32 TAC; /* timer a counter */
int TB; /* timer b */ INT32 TB; /* timer b value */
int TBL; /* timer b base */ INT32 TBL; /* timer b base */
int TBC; /* timer b counter */ INT32 TBC; /* timer b counter */
/* local time tables */ INT32 dt_tab[8][32]; /* DeTune table */
INT32 dt_tab[8][32];/* DeTune table */
} FM_ST; } FM_ST;
@ -576,22 +568,22 @@ typedef struct
UINT32 eg_cnt; /* global envelope generator counter */ UINT32 eg_cnt; /* global envelope generator counter */
UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
UINT32 eg_timer_add; /* step of eg_timer */ UINT32 eg_timer_add; /* step of eg_timer */
UINT32 eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */ UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 3 samples (on real chip) */
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers /* there are 2048 FNUMs that can be generated using FNUM/BLK registers
but LFO works with one more bit of a precision so we really need 4096 elements */ but LFO works with one more bit of a precision so we really need 4096 elements */
UINT32 fn_table[4096]; /* fnumber->increment counter */ UINT32 fn_table[4096]; /* fnumber->increment counter */
UINT32 fn_max; /* max increment (required for calculating phase overflow) */
/* LFO */ /* LFO */
UINT32 lfo_cnt; UINT32 lfo_cnt; /* current LFO phase */
UINT32 lfo_inc; UINT32 lfo_inc; /* step of LFO counter */
UINT32 lfo_freq[8]; /* LFO FREQ table */ UINT32 lfo_freq[8]; /* LFO FREQ table */
} FM_OPN; } FM_OPN;
/***********************************************************/
/* YM2612 chip */
/***********************************************************/
typedef struct typedef struct
{ {
FM_CH CH[6]; /* channel state */ FM_CH CH[6]; /* channel state */
@ -600,19 +592,16 @@ typedef struct
FM_OPN OPN; /* OPN state */ FM_OPN OPN; /* OPN state */
} YM2612; } YM2612;
/* emulated chip */
static YM2612 ym2612; static YM2612 ym2612;
/* current chip state */ /* current chip state */
static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */ static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
static INT32 mem; /* one sample delay memory */ static INT32 mem; /* one sample delay memory */
static INT32 out_fm[8]; /* outputs of working channels */ static INT32 out_fm[8]; /* outputs of working channels */
static UINT32 LFO_AM; /* runtime LFO calculations helper */ static UINT32 LFO_AM; /* runtime LFO calculations helper */
static INT32 LFO_PM; /* runtime LFO calculations helper */ static INT32 LFO_PM; /* runtime LFO calculations helper */
static int fn_max; /* maximal phase increment (used for phase overflow) */
/* limitter */ /* limitter */
#define Limit(val, max,min) { \ #define Limit(val, max,min) { \
@ -1086,7 +1075,7 @@ INLINE void update_phase_lfo_slot(FM_SLOT *SLOT , INT32 pms, UINT32 block_fnum)
int fc = (ym2612.OPN.fn_table[fn]>>(7-blk)) + SLOT->DT[kc]; int fc = (ym2612.OPN.fn_table[fn]>>(7-blk)) + SLOT->DT[kc];
/* (frequency) phase overflow (credits to Nemesis) */ /* (frequency) phase overflow (credits to Nemesis) */
if (fc < 0) fc += fn_max; if (fc < 0) fc += ym2612.OPN.fn_max;
/* update phase */ /* update phase */
SLOT->phase += (fc * SLOT->mul) >> 1; SLOT->phase += (fc * SLOT->mul) >> 1;
@ -1119,19 +1108,19 @@ INLINE void update_phase_lfo_channel(FM_CH *CH)
/* (frequency) phase overflow (credits to Nemesis) */ /* (frequency) phase overflow (credits to Nemesis) */
int finc = fc + CH->SLOT[SLOT1].DT[kc]; int finc = fc + CH->SLOT[SLOT1].DT[kc];
if (finc < 0) finc += fn_max; if (finc < 0) finc += ym2612.OPN.fn_max;
CH->SLOT[SLOT1].phase += (finc*CH->SLOT[SLOT1].mul) >> 1; CH->SLOT[SLOT1].phase += (finc*CH->SLOT[SLOT1].mul) >> 1;
finc = fc + CH->SLOT[SLOT2].DT[kc]; finc = fc + CH->SLOT[SLOT2].DT[kc];
if (finc < 0) finc += fn_max; if (finc < 0) finc += ym2612.OPN.fn_max;
CH->SLOT[SLOT2].phase += (finc*CH->SLOT[SLOT2].mul) >> 1; CH->SLOT[SLOT2].phase += (finc*CH->SLOT[SLOT2].mul) >> 1;
finc = fc + CH->SLOT[SLOT3].DT[kc]; finc = fc + CH->SLOT[SLOT3].DT[kc];
if (finc < 0) finc += fn_max; if (finc < 0) finc += ym2612.OPN.fn_max;
CH->SLOT[SLOT3].phase += (finc*CH->SLOT[SLOT3].mul) >> 1; CH->SLOT[SLOT3].phase += (finc*CH->SLOT[SLOT3].mul) >> 1;
finc = fc + CH->SLOT[SLOT4].DT[kc]; finc = fc + CH->SLOT[SLOT4].DT[kc];
if (finc < 0) finc += fn_max; if (finc < 0) finc += ym2612.OPN.fn_max;
CH->SLOT[SLOT4].phase += (finc*CH->SLOT[SLOT4].mul) >> 1; CH->SLOT[SLOT4].phase += (finc*CH->SLOT[SLOT4].mul) >> 1;
} }
else /* LFO phase modulation = zero */ else /* LFO phase modulation = zero */
@ -1224,7 +1213,7 @@ INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , int fc , int kc )
fc += SLOT->DT[kc]; fc += SLOT->DT[kc];
/* (frequency) phase overflow (credits to Nemesis) */ /* (frequency) phase overflow (credits to Nemesis) */
if (fc < 0) fc += fn_max; if (fc < 0) fc += ym2612.OPN.fn_max;
/* (frequency) phase increment counter */ /* (frequency) phase increment counter */
SLOT->Incr = (fc * SLOT->mul) >> 1; SLOT->Incr = (fc * SLOT->mul) >> 1;
@ -1492,8 +1481,8 @@ static void OPNSetPres(int pres)
ym2612.OPN.fn_table[i] = (UINT32)( (double)i * 32 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */ ym2612.OPN.fn_table[i] = (UINT32)( (double)i * 32 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
} }
/* maximal frequency, used for overflow, internal register is 17-bits (Nemesis) */ /* maximal frequency is required for Phase overflow calculation, register size is 17 bits (Nemesis) */
fn_max = (UINT32)( (double)0x1ffff * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) ); ym2612.OPN.fn_max = (UINT32)( (double)0x20000 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) );
/* LFO freq. table */ /* LFO freq. table */
for(i = 0; i < 8; i++) for(i = 0; i < 8; i++)

1
source/types.h
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@ -15,7 +15,6 @@
along with this program; if not, write to the Free Software along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#undef uint8 #undef uint8
#undef uint16 #undef uint16
#undef uint32 #undef uint32

2
source/vdp.c
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@ -63,7 +63,7 @@ uint8 border; /* Border color index */
uint8 bg_name_dirty[0x800]; /* 1= This pattern is dirty */ uint8 bg_name_dirty[0x800]; /* 1= This pattern is dirty */
uint16 bg_name_list[0x800]; /* List of modified pattern indices */ uint16 bg_name_list[0x800]; /* List of modified pattern indices */
uint16 bg_list_index; /* # of modified patterns in list */ uint16 bg_list_index; /* # of modified patterns in list */
uint8 bg_pattern_cache[0x80000]; /* Cached and flipped patterns */ uint8 bg_pattern_cache[0x80000];/* Cached and flipped patterns */
uint8 playfield_shift; /* Width of planes A, B (in bits) */ uint8 playfield_shift; /* Width of planes A, B (in bits) */
uint8 playfield_col_mask; /* Vertical scroll mask */ uint8 playfield_col_mask; /* Vertical scroll mask */
uint16 playfield_row_mask; /* Horizontal scroll mask */ uint16 playfield_row_mask; /* Horizontal scroll mask */