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@ -41,7 +41,6 @@
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/* ================================ INCLUDES ============================== */
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/* ======================================================================== */
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#include <stdint.h>
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#include <setjmp.h>
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#include "macros.h"
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@ -66,6 +65,7 @@
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#undef uint32
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#undef uint64
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#undef sint
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#undef uint
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#define sint8 signed char /* ASG: changed from char to signed char */
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#define sint16 signed short
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@ -223,9 +223,9 @@ typedef struct
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/* 68k idle loop detection */
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typedef struct
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{
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uint32_t pc;
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uint32_t cycle;
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uint32_t detected;
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uint pc;
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uint cycle;
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uint detected;
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} cpu_idle_t;
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typedef struct
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@ -234,38 +234,38 @@ typedef struct
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cpu_idle_t poll; /* polling detection */
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uint32_t cycles; /* current master cycle count */
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uint32_t cycle_end; /* aimed master cycle count for current execution frame */
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uint cycles; /* current master cycle count */
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uint cycle_end; /* aimed master cycle count for current execution frame */
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uint32_t dar[16]; /* Data and Address Registers */
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uint32_t pc; /* Program Counter */
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uint32_t sp[5]; /* User and Interrupt Stack Pointers */
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uint32_t ir; /* Instruction Register */
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uint32_t t1_flag; /* Trace 1 */
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uint32_t s_flag; /* Supervisor */
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uint32_t x_flag; /* Extend */
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uint32_t n_flag; /* Negative */
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uint32_t not_z_flag; /* Zero, inverted for speedups */
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uint32_t v_flag; /* Overflow */
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uint32_t c_flag; /* Carry */
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uint32_t int_mask; /* I0-I2 */
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uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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uint32_t stopped; /* Stopped state */
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uint dar[16]; /* Data and Address Registers */
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uint pc; /* Program Counter */
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uint sp[5]; /* User and Interrupt Stack Pointers */
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uint ir; /* Instruction Register */
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uint t1_flag; /* Trace 1 */
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uint s_flag; /* Supervisor */
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uint x_flag; /* Extend */
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uint n_flag; /* Negative */
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uint not_z_flag; /* Zero, inverted for speedups */
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uint v_flag; /* Overflow */
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uint c_flag; /* Carry */
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uint int_mask; /* I0-I2 */
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uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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uint stopped; /* Stopped state */
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uint32_t pref_addr; /* Last prefetch address */
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uint32_t pref_data; /* Data in the prefetch queue */
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uint pref_addr; /* Last prefetch address */
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uint pref_data; /* Data in the prefetch queue */
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uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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uint32_t aerr_enabled; /* Enables/deisables address error checks at runtime */
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uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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uint aerr_enabled; /* Enables/deisables address error checks at runtime */
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jmp_buf aerr_trap; /* Address error jump */
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uint32_t aerr_address; /* Address error location */
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uint32_t aerr_write_mode; /* Address error write mode */
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uint32_t aerr_fc; /* Address error FC code */
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uint aerr_address; /* Address error location */
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uint aerr_write_mode; /* Address error write mode */
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uint aerr_fc; /* Address error FC code */
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uint32_t tracing; /* Tracing enable flag */
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uint tracing; /* Tracing enable flag */
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uint32_t address_space; /* Current FC code */
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uint address_space; /* Current FC code */
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/* Callbacks to host */
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int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
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