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[Core/MD] improved Realtec mapper accuracy (verified on real cartridge hardware)

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ekeeke 2023-03-20 00:26:37 +01:00
parent ef922735ff
commit f0c8f83926
1 changed files with 37 additions and 19 deletions
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52
core/cart_hw/md_cart.c
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@ -809,6 +809,11 @@ void md_cart_reset(int hard_reset)
{ {
m68k.memory_map[i].base = cart.rom + 0x400000; m68k.memory_map[i].base = cart.rom + 0x400000;
} }
/* Reset mapper */
cart.hw.regs[0] = 0;
cart.hw.regs[1] = 0;
cart.hw.regs[2] = 0;
} }
/* reset cartridge mapping */ /* reset cartridge mapping */
@ -1624,7 +1629,7 @@ static uint32 mapper_smw_64_r(uint32 address)
/* /*
Realtec ROM bankswitch (Earth Defend, Balloon Boy & Funny World, Whac-A-Critter, Tom Clown) Realtec ROM bankswitch (Earth Defend, Balloon Boy & Funny World, Whac-A-Critter, Tom Clown)
(Note: register usage is inverted in TascoDlx documentation) Verified with real cartridge hardware (slightly different from behavior described in TascoDlx documentation)
*/ */
static void mapper_realtec_w(uint32 address, uint32 data) static void mapper_realtec_w(uint32 address, uint32 data)
{ {
@ -1632,34 +1637,47 @@ static void mapper_realtec_w(uint32 address, uint32 data)
{ {
case 0x402000: case 0x402000:
{ {
/* number of mapped 64k blocks (the written value is a number of 128k blocks) */ /* fixed ROM bank size */
cart.hw.regs[2] = data << 1; /* when bit 0 is set, ROM A16 pin is forced to value configured in register below (connected to VA17 otherwise) */
/* when bit 1 is set, ROM A17 pin is forced to value configured in register below (connected to VA18 otherwise) */
/* other bits have no effect */
cart.hw.regs[1] = (data & 3) << 1;
return; return;
} }
case 0x404000: case 0x404000:
{ {
/* 00000xxx */ /* fixed ROM bank selection (4 x 128KB banks) */
cart.hw.regs[0] = data & 7; /* bit 0 corresponds to ROM A16 pin value when forced */
/* bit 1 corresponds to ROM A17 pin value when forced */
/* other bits have no effect */
cart.hw.regs[2] = (data & 3) << 1;
return; return;
} }
case 0x400000: case 0x400000:
{ {
/* 00000yy1 */ /* ROM access enable */
cart.hw.regs[1] = data & 6; /* when bit 0 is set, ROM A17/A16 pins are set according to above registers and ROM A15/A12 pins are connected to VA16-VA13 (forced to 1 on reset) */
/* other bits habe no effect */
/* ensure mapped size is not null */ if (data & 0x01)
if (cart.hw.regs[2])
{ {
/* mapped start address is 00yy xxx0 0000 0000 0000 0000 */ /* once ROM access is enabled, ROM mapping can not be modified until next reset */
uint32 base = (cart.hw.regs[0] << 1) | (cart.hw.regs[1] << 3); if (!cart.hw.regs[0])
/* selected blocks are mirrored into the whole cartridge area */
int i;
for (i=0x00; i<0x40; i++)
{ {
m68k.memory_map[i].base = &cart.rom[(base + (i % cart.hw.regs[2])) << 16]; int i;
for (i=0x00; i<0x40; i++)
{
/* 0x000000-0x07ffff mapped area is mirrored in 4MB cartridge range (VA21-VA19 not connected) */
uint32 base = i & 7;
/* adjust 64k mapped area ROM base address according to fixed ROM bank configuration (see above) */
base = (base & ~cart.hw.regs[1]) | (cart.hw.regs[2] & cart.hw.regs[1]);
m68k.memory_map[i].base = &cart.rom[base << 16];
}
cart.hw.regs[0] = data;
} }
} }
return; return;