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[Core/MD] added emulation of 68k delay during Z80 acccess to 68k bus (fixes graphical glitch on Rick Dangerous II title screen introduced after adding emulation of 68k bus refresh delays)
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@ -76,7 +76,8 @@ Genesis Plus GX 1.7.5 (xx/xx/xxxx) (Eke-Eke)
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* added support for Everdrive extended SSF mapper
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* added support for Everdrive extended SSF mapper
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* added support for MegaSD CD hardware overlay (MD+ hacks) and extended SSF2 / ROM write mappers
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* added support for MegaSD CD hardware overlay (MD+ hacks) and extended SSF2 / ROM write mappers
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* added emulation of Z80 halt when accessing 68k bus during DMA from 68k bus
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* added emulation of Z80 halt when accessing 68k bus during DMA from 68k bus
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* added basic emulation of 68k bus access refresh delays (fixes Super Airwolf graphical glitch during intro & some Krikzz's mcd-verificator timing tests)
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* added emulation of 68k delay during Z80 acccess to 68k bus
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* added (basic) emulation of 68k bus refresh delays (fixes Super Airwolf graphical glitch during intro & some Krikzz's mcd-verificator timing tests)
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* added (very basic) emulation of Flashkit MD hardware
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* added (very basic) emulation of Flashkit MD hardware
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* added emulation of Micro Machines USA on-board TMSS bypass logic hardware
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* added emulation of Micro Machines USA on-board TMSS bypass logic hardware
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* added SRAM support for games larger than 8MB
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* added SRAM support for games larger than 8MB
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@ -108,8 +108,13 @@ static void z80_request_68k_bus_access(void)
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}
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}
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}
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}
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/* average Z80 wait-states when accessing 68k area */
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/* approximate 68k wait-states during Z80 access to 68k bus (cf https://docs.google.com/document/d/1ST9GbFfPnIjLT5loytFCm3pB0kWQ1Oe34DCBBV8saY8) */
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Z80.cycles += 3 * 15;
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/* value is adjusted to get ride of graphical glitches in Rick Dangerous 2 title screen when bus refresh delays are also emulated and still get */
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/* "M68K DELAY ON Z80 ROM READ" test "passed" in Ti_'s test ROM (misc_test.bin), although the measured delay value is still slightly too high. */
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m68k.cycles += ((Z80.cycles % 7) + 68);
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/* average Z80 wait-states when accessing 68k bus (cf https://docs.google.com/document/d/1ST9GbFfPnIjLT5loytFCm3pB0kWQ1Oe34DCBBV8saY8) */
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Z80.cycles += (3 * 15);
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}
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}
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unsigned char z80_memory_r(unsigned int address)
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unsigned char z80_memory_r(unsigned int address)
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