4 Commits

Author	SHA1	Message	Date
ekeeke31	efc7c3000a	[68k] improved MULU/MULS instructions timing accuracy	2010-08-07 14:22:36 +00:00
ekeeke31	f734e2fade	optimized CPU cores instruction cycle counting (master clock multiplier is now applied during init) ... fixed a recently introduced typo that make STOP instruction locks the machine (Thunderforce IV)	2010-01-27 07:18:25 +00:00
ekeeke31	086548476c	~functions inlining	2009-06-23 17:11:33 +00:00
ekeeke31	4835860232	~improved DIVU/DIVS/MULU/MULS timing accuracy (68k core) ... ~optimized 68k execution ~reverted recent changes to LFO phase modulation, need more testing (ym2162 core)	2009-06-23 16:38:29 +00:00